1 /*- 2 * Copyright (c) 2010 Lev Serebryakov <lev@FreeBSD.org>. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 /* 28 * This driver supports several multiport USB-to-RS232 serial adapters driven 29 * by MosChip mos7820 and mos7840, bridge chips. 30 * The adapters are sold under many different brand names. 31 * 32 * Datasheets are available at MosChip www site at 33 * http://www.moschip.com. The datasheets don't contain full 34 * programming information for the chip. 35 * 36 * It is nornal to have only two enabled ports in devices, based on 37 * quad-port mos7840. 38 * 39 */ 40 41 #include <sys/stdint.h> 42 #include <sys/param.h> 43 #include <sys/queue.h> 44 #include <sys/types.h> 45 #include <sys/systm.h> 46 #include <sys/kernel.h> 47 #include <sys/bus.h> 48 #include <sys/linker_set.h> 49 #include <sys/module.h> 50 #include <sys/lock.h> 51 #include <sys/condvar.h> 52 #include <sys/sysctl.h> 53 #include <sys/unistd.h> 54 #include <sys/callout.h> 55 #include <sys/malloc.h> 56 #include <sys/priv.h> 57 58 #include <bus/u4b/usb.h> 59 #include <bus/u4b/usbdi.h> 60 #include <bus/u4b/usbdi_util.h> 61 #include <bus/u4b/usb_cdc.h> 62 #include <bus/u4b/usbdevs.h> 63 64 #define USB_DEBUG_VAR umcs_debug 65 #include <bus/u4b/usb_debug.h> 66 #include <bus/u4b/usb_process.h> 67 68 #include <bus/u4b/serial/usb_serial.h> 69 70 #include <bus/u4b/serial/umcs.h> 71 72 #define UMCS7840_MODVER 1 73 74 #ifdef USB_DEBUG 75 static int umcs_debug = 0; 76 77 static SYSCTL_NODE(_hw_usb, OID_AUTO, umcs, CTLFLAG_RW, 0, "USB umcs quadport serial adapter"); 78 SYSCTL_INT(_hw_usb_umcs, OID_AUTO, debug, CTLFLAG_RW, &umcs_debug, 0, "Debug level"); 79 #endif /* USB_DEBUG */ 80 81 82 /* 83 * Two-port devices (both with 7820 chip and 7840 chip configured as two-port) 84 * have ports 0 and 2, with ports 1 and 3 omitted. 85 * So,PHYSICAL port numbers (indexes) on two-port device will be 0 and 2. 86 * This driver trys to use physical numbers as much as possible. 87 */ 88 89 /* 90 * Indexed by PHYSICAL port number. 91 * Pack non-regular registers to array to easier if-less access. 92 */ 93 struct umcs7840_port_registers { 94 uint8_t reg_sp; /* SP register. */ 95 uint8_t reg_control; /* CONTROL register. */ 96 uint8_t reg_dcr; /* DCR0 register. DCR1 & DCR2 can be 97 * calculated */ 98 }; 99 100 static const struct umcs7840_port_registers umcs7840_port_registers[UMCS7840_MAX_PORTS] = { 101 {.reg_sp = MCS7840_DEV_REG_SP1,.reg_control = MCS7840_DEV_REG_CONTROL1,.reg_dcr = MCS7840_DEV_REG_DCR0_1}, 102 {.reg_sp = MCS7840_DEV_REG_SP2,.reg_control = MCS7840_DEV_REG_CONTROL2,.reg_dcr = MCS7840_DEV_REG_DCR0_2}, 103 {.reg_sp = MCS7840_DEV_REG_SP3,.reg_control = MCS7840_DEV_REG_CONTROL3,.reg_dcr = MCS7840_DEV_REG_DCR0_3}, 104 {.reg_sp = MCS7840_DEV_REG_SP4,.reg_control = MCS7840_DEV_REG_CONTROL4,.reg_dcr = MCS7840_DEV_REG_DCR0_4}, 105 }; 106 107 enum { 108 UMCS7840_BULK_RD_EP, 109 UMCS7840_BULK_WR_EP, 110 UMCS7840_N_TRANSFERS 111 }; 112 113 struct umcs7840_softc_oneport { 114 struct usb_xfer *sc_xfer[UMCS7840_N_TRANSFERS]; /* Control structures 115 * for two transfers */ 116 117 uint8_t sc_lcr; /* local line control register */ 118 uint8_t sc_mcr; /* local modem control register */ 119 uint8_t sc_lsr; /* local line status register */ 120 uint8_t sc_msr; /* local modem status register */ 121 }; 122 123 struct umcs7840_softc { 124 struct ucom_super_softc sc_super_ucom; 125 struct ucom_softc sc_ucom[UMCS7840_MAX_PORTS]; /* Need to be continuous 126 * array, so indexed by 127 * LOGICAL port 128 * (subunit) number */ 129 130 struct usb_xfer *sc_intr_xfer; /* Interrupt endpoint */ 131 132 device_t sc_dev; /* Device for error prints */ 133 struct usb_device *sc_udev; /* USB Device for all operations */ 134 struct lock sc_lock; /* ucom requires this */ 135 136 uint8_t sc_driver_done; /* Flag when enumeration is finished */ 137 138 uint8_t sc_numports; /* Number of ports (subunits) */ 139 struct umcs7840_softc_oneport sc_ports[UMCS7840_MAX_PORTS]; /* Indexed by PHYSICAL 140 * port number. */ 141 }; 142 143 /* prototypes */ 144 static usb_error_t umcs7840_get_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t *); 145 static usb_error_t umcs7840_set_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t); 146 static usb_error_t umcs7840_get_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t *); 147 static usb_error_t umcs7840_set_UART_reg_sync(struct umcs7840_softc *, uint8_t, uint8_t, uint8_t); 148 149 static usb_error_t umcs7840_set_baudrate(struct umcs7840_softc *, uint8_t, uint32_t); 150 static usb_error_t umcs7840_calc_baudrate(uint32_t rate, uint16_t *, uint8_t *); 151 152 static void umcs7840_cfg_get_status(struct ucom_softc *, uint8_t *, uint8_t *); 153 static void umcs7840_cfg_set_dtr(struct ucom_softc *, uint8_t); 154 static void umcs7840_cfg_set_rts(struct ucom_softc *, uint8_t); 155 static void umcs7840_cfg_set_break(struct ucom_softc *, uint8_t); 156 static void umcs7840_cfg_param(struct ucom_softc *, struct termios *); 157 static void umcs7840_cfg_open(struct ucom_softc *); 158 static void umcs7840_cfg_close(struct ucom_softc *); 159 160 static int umcs7840_pre_param(struct ucom_softc *, struct termios *); 161 162 static void umcs7840_start_read(struct ucom_softc *); 163 static void umcs7840_stop_read(struct ucom_softc *); 164 165 static void umcs7840_start_write(struct ucom_softc *); 166 static void umcs7840_stop_write(struct ucom_softc *); 167 168 static void umcs7840_poll(struct ucom_softc *ucom); 169 170 static device_probe_t umcs7840_probe; 171 static device_attach_t umcs7840_attach; 172 static device_detach_t umcs7840_detach; 173 174 static usb_callback_t umcs7840_intr_callback; 175 static usb_callback_t umcs7840_read_callback1; 176 static usb_callback_t umcs7840_read_callback2; 177 static usb_callback_t umcs7840_read_callback3; 178 static usb_callback_t umcs7840_read_callback4; 179 static usb_callback_t umcs7840_write_callback1; 180 static usb_callback_t umcs7840_write_callback2; 181 static usb_callback_t umcs7840_write_callback3; 182 static usb_callback_t umcs7840_write_callback4; 183 184 static void umcs7840_read_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 185 static void umcs7840_write_callbackN(struct usb_xfer *, usb_error_t, uint8_t); 186 187 /* Indexed by LOGICAL port number (subunit), so two-port device uses 0 & 1 */ 188 static usb_callback_t *umcs7840_rw_callbacks[UMCS7840_MAX_PORTS][UMCS7840_N_TRANSFERS] = { 189 {&umcs7840_read_callback1, &umcs7840_write_callback1}, 190 {&umcs7840_read_callback2, &umcs7840_write_callback2}, 191 {&umcs7840_read_callback3, &umcs7840_write_callback3}, 192 {&umcs7840_read_callback4, &umcs7840_write_callback4}, 193 }; 194 195 static const struct usb_config umcs7840_bulk_config_data[UMCS7840_N_TRANSFERS] = { 196 [UMCS7840_BULK_RD_EP] = { 197 .type = UE_BULK, 198 .endpoint = 0x01, 199 .direction = UE_DIR_IN, 200 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 201 .bufsize = 0, /* use wMaxPacketSize */ 202 .callback = &umcs7840_read_callback1, 203 .if_index = 0, 204 }, 205 206 [UMCS7840_BULK_WR_EP] = { 207 .type = UE_BULK, 208 .endpoint = 0x02, 209 .direction = UE_DIR_OUT, 210 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 211 .bufsize = 0, /* use wMaxPacketSize */ 212 .callback = &umcs7840_write_callback1, 213 .if_index = 0, 214 }, 215 }; 216 217 static const struct usb_config umcs7840_intr_config_data[1] = { 218 [0] = { 219 .type = UE_INTERRUPT, 220 .endpoint = 0x09, 221 .direction = UE_DIR_IN, 222 .flags = {.pipe_bof = 1,.short_xfer_ok = 1,}, 223 .bufsize = 0, /* use wMaxPacketSize */ 224 .callback = &umcs7840_intr_callback, 225 .if_index = 0, 226 }, 227 }; 228 229 static struct ucom_callback umcs7840_callback = { 230 .ucom_cfg_get_status = &umcs7840_cfg_get_status, 231 232 .ucom_cfg_set_dtr = &umcs7840_cfg_set_dtr, 233 .ucom_cfg_set_rts = &umcs7840_cfg_set_rts, 234 .ucom_cfg_set_break = &umcs7840_cfg_set_break, 235 236 .ucom_cfg_param = &umcs7840_cfg_param, 237 .ucom_cfg_open = &umcs7840_cfg_open, 238 .ucom_cfg_close = &umcs7840_cfg_close, 239 240 .ucom_pre_param = &umcs7840_pre_param, 241 242 .ucom_start_read = &umcs7840_start_read, 243 .ucom_stop_read = &umcs7840_stop_read, 244 245 .ucom_start_write = &umcs7840_start_write, 246 .ucom_stop_write = &umcs7840_stop_write, 247 248 .ucom_poll = &umcs7840_poll, 249 }; 250 251 static const STRUCT_USB_HOST_ID umcs7840_devs[] = { 252 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7820, 0)}, 253 {USB_VPI(USB_VENDOR_MOSCHIP, USB_PRODUCT_MOSCHIP_MCS7840, 0)}, 254 }; 255 256 static device_method_t umcs7840_methods[] = { 257 DEVMETHOD(device_probe, umcs7840_probe), 258 DEVMETHOD(device_attach, umcs7840_attach), 259 DEVMETHOD(device_detach, umcs7840_detach), 260 {0, 0} 261 }; 262 263 static devclass_t umcs7840_devclass; 264 265 static driver_t umcs7840_driver = { 266 .name = "umcs7840", 267 .methods = umcs7840_methods, 268 .size = sizeof(struct umcs7840_softc), 269 }; 270 271 DRIVER_MODULE(umcs7840, uhub, umcs7840_driver, umcs7840_devclass, 0, 0); 272 MODULE_DEPEND(umcs7840, ucom, 1, 1, 1); 273 MODULE_DEPEND(umcs7840, usb, 1, 1, 1); 274 MODULE_VERSION(umcs7840, UMCS7840_MODVER); 275 276 static int 277 umcs7840_probe(device_t dev) 278 { 279 struct usb_attach_arg *uaa = device_get_ivars(dev); 280 281 if (uaa->usb_mode != USB_MODE_HOST) 282 return (ENXIO); 283 if (uaa->info.bConfigIndex != MCS7840_CONFIG_INDEX) 284 return (ENXIO); 285 if (uaa->info.bIfaceIndex != MCS7840_IFACE_INDEX) 286 return (ENXIO); 287 return (usbd_lookup_id_by_uaa(umcs7840_devs, sizeof(umcs7840_devs), uaa)); 288 } 289 290 static int 291 umcs7840_attach(device_t dev) 292 { 293 struct usb_config umcs7840_config_tmp[UMCS7840_N_TRANSFERS]; 294 struct usb_attach_arg *uaa = device_get_ivars(dev); 295 struct umcs7840_softc *sc = device_get_softc(dev); 296 297 uint8_t iface_index = MCS7840_IFACE_INDEX; 298 int error; 299 int subunit; 300 int n; 301 uint8_t data; 302 303 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) 304 umcs7840_config_tmp[n] = umcs7840_bulk_config_data[n]; 305 306 device_set_usb_desc(dev); 307 lockinit(&sc->sc_lock, "umcs7840", 0, LK_CANRECURSE); 308 309 sc->sc_dev = dev; 310 sc->sc_udev = uaa->device; 311 312 /* 313 * Get number of ports 314 * Documentation (full datasheet) says, that number of ports is 315 * set as MCS7840_DEV_MODE_SELECT24S bit in MODE R/Only 316 * register. But vendor driver uses these undocumented 317 * register & bit. 318 * 319 * Experiments show, that MODE register can have `0' 320 * (4 ports) bit on 2-port device, so use vendor driver's way. 321 * 322 * Also, see notes in header file for these constants. 323 */ 324 umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_GPIO, &data); 325 if (data & MCS7840_DEV_GPIO_4PORTS) { 326 sc->sc_numports = 4; 327 /* Store physical port numbers in sc_portno */ 328 sc->sc_ucom[0].sc_portno = 0; 329 sc->sc_ucom[1].sc_portno = 1; 330 sc->sc_ucom[2].sc_portno = 2; 331 sc->sc_ucom[3].sc_portno = 3; 332 } else { 333 sc->sc_numports = 2; 334 /* Store physical port numbers in sc_portno */ 335 sc->sc_ucom[0].sc_portno = 0; 336 sc->sc_ucom[1].sc_portno = 2; /* '1' is skipped */ 337 } 338 device_printf(dev, "Chip mcs%04x, found %d active ports\n", uaa->info.idProduct, sc->sc_numports); 339 if (!umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_MODE, &data)) { 340 device_printf(dev, "On-die confguration: RST: active %s, HRD: %s, PLL: %s, POR: %s, Ports: %s, EEPROM write %s, IrDA is %savailable\n", 341 (data & MCS7840_DEV_MODE_RESET) ? "low" : "high", 342 (data & MCS7840_DEV_MODE_SER_PRSNT) ? "yes" : "no", 343 (data & MCS7840_DEV_MODE_PLLBYPASS) ? "bypassed" : "avail", 344 (data & MCS7840_DEV_MODE_PORBYPASS) ? "bypassed" : "avail", 345 (data & MCS7840_DEV_MODE_SELECT24S) ? "2" : "4", 346 (data & MCS7840_DEV_MODE_EEPROMWR) ? "enabled" : "disabled", 347 (data & MCS7840_DEV_MODE_IRDA) ? "" : "not "); 348 } 349 /* Setup all transfers */ 350 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 351 for (n = 0; n < UMCS7840_N_TRANSFERS; ++n) { 352 /* Set endpoint address */ 353 umcs7840_config_tmp[n].endpoint = umcs7840_bulk_config_data[n].endpoint + 2 * sc->sc_ucom[subunit].sc_portno; 354 umcs7840_config_tmp[n].callback = umcs7840_rw_callbacks[subunit][n]; 355 } 356 error = usbd_transfer_setup(uaa->device, 357 &iface_index, sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, umcs7840_config_tmp, 358 UMCS7840_N_TRANSFERS, sc, &sc->sc_lock); 359 if (error) { 360 device_printf(dev, "allocating USB transfers failed for subunit %d of %d\n", 361 subunit + 1, sc->sc_numports); 362 goto detach; 363 } 364 } 365 error = usbd_transfer_setup(uaa->device, 366 &iface_index, &sc->sc_intr_xfer, umcs7840_intr_config_data, 367 1, sc, &sc->sc_lock); 368 if (error) { 369 device_printf(dev, "allocating USB transfers failed for interrupt\n"); 370 goto detach; 371 } 372 /* clear stall at first run */ 373 lockmgr(&sc->sc_lock, LK_EXCLUSIVE); 374 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 375 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_RD_EP]); 376 usbd_xfer_set_stall(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer[UMCS7840_BULK_WR_EP]); 377 } 378 lockmgr(&sc->sc_lock, LK_RELEASE); 379 380 error = ucom_attach(&sc->sc_super_ucom, sc->sc_ucom, sc->sc_numports, sc, 381 &umcs7840_callback, &sc->sc_lock); 382 if (error) 383 goto detach; 384 385 ucom_set_pnpinfo_usb(&sc->sc_super_ucom, dev); 386 387 return (0); 388 389 detach: 390 umcs7840_detach(dev); 391 return (ENXIO); 392 } 393 394 static int 395 umcs7840_detach(device_t dev) 396 { 397 struct umcs7840_softc *sc = device_get_softc(dev); 398 int subunit; 399 400 ucom_detach(&sc->sc_super_ucom, sc->sc_ucom); 401 402 for (subunit = 0; subunit < sc->sc_numports; ++subunit) 403 usbd_transfer_unsetup(sc->sc_ports[sc->sc_ucom[subunit].sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 404 usbd_transfer_unsetup(&sc->sc_intr_xfer, 1); 405 406 lockuninit(&sc->sc_lock); 407 return (0); 408 } 409 410 static void 411 umcs7840_cfg_open(struct ucom_softc *ucom) 412 { 413 struct umcs7840_softc *sc = ucom->sc_parent; 414 uint16_t pn = ucom->sc_portno; 415 uint8_t data; 416 417 /* If it very first open, finish global configuration */ 418 if (!sc->sc_driver_done) { 419 /* 420 * USB enumeration is finished, pass internal memory to FIFOs 421 * If it is done in the end of "attach", kernel panics. 422 */ 423 if (umcs7840_get_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, &data)) 424 return; 425 data |= MCS7840_DEV_CONTROL1_DRIVER_DONE; 426 if (umcs7840_set_reg_sync(sc, MCS7840_DEV_REG_CONTROL1, data)) 427 return; 428 sc->sc_driver_done = 1; 429 } 430 /* Toggle reset bit on-off */ 431 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 432 return; 433 data |= MCS7840_DEV_SPx_UART_RESET; 434 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 435 return; 436 data &= ~MCS7840_DEV_SPx_UART_RESET; 437 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 438 return; 439 440 /* Set RS-232 mode */ 441 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_SCRATCHPAD, MCS7840_UART_SCRATCHPAD_RS232)) 442 return; 443 444 /* Disable RX on time of initialization */ 445 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 446 return; 447 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 448 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 449 return; 450 451 /* Disable all interrupts */ 452 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0)) 453 return; 454 455 /* Reset FIFO -- documented */ 456 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 0)) 457 return; 458 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_FCR, 459 MCS7840_UART_FCR_ENABLE | MCS7840_UART_FCR_FLUSHRHR | 460 MCS7840_UART_FCR_FLUSHTHR | MCS7840_UART_FCR_RTL_1_14)) 461 return; 462 463 /* Set 8 bit, no parity, 1 stop bit -- documented */ 464 sc->sc_ports[pn].sc_lcr = MCS7840_UART_LCR_DATALEN8 | MCS7840_UART_LCR_STOPB1; 465 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr)) 466 return; 467 468 /* 469 * Enable DTR/RTS on modem control, enable modem interrupts -- 470 * documented 471 */ 472 sc->sc_ports[pn].sc_mcr = MCS7840_UART_MCR_DTR | MCS7840_UART_MCR_RTS | MCS7840_UART_MCR_IE; 473 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr)) 474 return; 475 476 /* Clearing Bulkin and Bulkout FIFO */ 477 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, &data)) 478 return; 479 data |= MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO; 480 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 481 return; 482 data &= ~(MCS7840_DEV_SPx_RESET_OUT_FIFO | MCS7840_DEV_SPx_RESET_IN_FIFO); 483 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_sp, data)) 484 return; 485 486 /* Set speed 9600 */ 487 if (umcs7840_set_baudrate(sc, pn, 9600)) 488 return; 489 490 491 /* Finally enable all interrupts -- documented */ 492 /* 493 * Copied from vendor driver, I don't know why we should read LCR 494 * here 495 */ 496 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, &sc->sc_ports[pn].sc_lcr)) 497 return; 498 if (umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 499 MCS7840_UART_IER_RXSTAT | MCS7840_UART_IER_MODEM)) 500 return; 501 502 /* Enable RX */ 503 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 504 return; 505 data &= ~MCS7840_DEV_CONTROLx_RX_DISABLE; 506 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 507 return; 508 509 /* Read LSR & MSR */ 510 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr)) 511 return; 512 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr)) 513 return; 514 DPRINTF("Port %d has been opened, LSR=%02x MSR=%02x\n", pn, sc->sc_ports[pn].sc_lsr, sc->sc_ports[pn].sc_msr); 515 } 516 517 static void 518 umcs7840_cfg_close(struct ucom_softc *ucom) 519 { 520 struct umcs7840_softc *sc = ucom->sc_parent; 521 uint16_t pn = ucom->sc_portno; 522 uint8_t data; 523 524 umcs7840_stop_read(ucom); 525 umcs7840_stop_write(ucom); 526 527 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, 0); 528 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_IER, 0); 529 530 /* Disable RX */ 531 if (umcs7840_get_reg_sync(sc, umcs7840_port_registers[pn].reg_control, &data)) 532 return; 533 data |= MCS7840_DEV_CONTROLx_RX_DISABLE; 534 if (umcs7840_set_reg_sync(sc, umcs7840_port_registers[pn].reg_control, data)) 535 return; 536 DPRINTF("Port %d has been closed\n", pn); 537 } 538 539 static void 540 umcs7840_cfg_set_dtr(struct ucom_softc *ucom, uint8_t onoff) 541 { 542 struct umcs7840_softc *sc = ucom->sc_parent; 543 uint8_t pn = ucom->sc_portno; 544 545 if (onoff) 546 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_DTR; 547 else 548 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_DTR; 549 550 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 551 DPRINTF("Port %d DTR set to: %s\n", pn, onoff ? "on" : "off"); 552 } 553 554 static void 555 umcs7840_cfg_set_rts(struct ucom_softc *ucom, uint8_t onoff) 556 { 557 struct umcs7840_softc *sc = ucom->sc_parent; 558 uint8_t pn = ucom->sc_portno; 559 560 if (onoff) 561 sc->sc_ports[pn].sc_mcr |= MCS7840_UART_MCR_RTS; 562 else 563 sc->sc_ports[pn].sc_mcr &= ~MCS7840_UART_MCR_RTS; 564 565 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 566 DPRINTF("Port %d RTS set to: %s\n", pn, onoff ? "on" : "off"); 567 } 568 569 static void 570 umcs7840_cfg_set_break(struct ucom_softc *ucom, uint8_t onoff) 571 { 572 struct umcs7840_softc *sc = ucom->sc_parent; 573 uint8_t pn = ucom->sc_portno; 574 575 if (onoff) 576 sc->sc_ports[pn].sc_lcr |= MCS7840_UART_LCR_BREAK; 577 else 578 sc->sc_ports[pn].sc_lcr &= ~MCS7840_UART_LCR_BREAK; 579 580 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 581 DPRINTF("Port %d BREAK set to: %s\n", pn, onoff ? "on" : "off"); 582 } 583 584 585 static void 586 umcs7840_cfg_param(struct ucom_softc *ucom, struct termios *t) 587 { 588 struct umcs7840_softc *sc = ucom->sc_parent; 589 uint8_t pn = ucom->sc_portno; 590 uint8_t lcr = sc->sc_ports[pn].sc_lcr; 591 uint8_t mcr = sc->sc_ports[pn].sc_mcr; 592 593 DPRINTF("Port %d config:\n", pn); 594 if (t->c_cflag & CSTOPB) { 595 DPRINTF(" 2 stop bits\n"); 596 lcr |= MCS7840_UART_LCR_STOPB2; 597 } else { 598 lcr |= MCS7840_UART_LCR_STOPB1; 599 DPRINTF(" 1 stop bit\n"); 600 } 601 602 lcr &= ~MCS7840_UART_LCR_PARITYMASK; 603 if (t->c_cflag & PARENB) { 604 lcr |= MCS7840_UART_LCR_PARITYON; 605 if (t->c_cflag & PARODD) { 606 lcr = MCS7840_UART_LCR_PARITYODD; 607 DPRINTF(" parity on - odd\n"); 608 } else { 609 lcr = MCS7840_UART_LCR_PARITYEVEN; 610 DPRINTF(" parity on - even\n"); 611 } 612 } else { 613 lcr &= ~MCS7840_UART_LCR_PARITYON; 614 DPRINTF(" parity off\n"); 615 } 616 617 lcr &= ~MCS7840_UART_LCR_DATALENMASK; 618 switch (t->c_cflag & CSIZE) { 619 case CS5: 620 lcr |= MCS7840_UART_LCR_DATALEN5; 621 DPRINTF(" 5 bit\n"); 622 break; 623 case CS6: 624 lcr |= MCS7840_UART_LCR_DATALEN6; 625 DPRINTF(" 6 bit\n"); 626 break; 627 case CS7: 628 lcr |= MCS7840_UART_LCR_DATALEN7; 629 DPRINTF(" 7 bit\n"); 630 break; 631 case CS8: 632 lcr |= MCS7840_UART_LCR_DATALEN8; 633 DPRINTF(" 8 bit\n"); 634 break; 635 } 636 637 if (t->c_cflag & CRTSCTS) { 638 mcr |= MCS7840_UART_MCR_CTSRTS; 639 DPRINTF(" CTS/RTS\n"); 640 } else 641 mcr &= ~MCS7840_UART_MCR_CTSRTS; 642 643 if (t->c_cflag & (CDTR_IFLOW | CDSR_OFLOW)) { 644 mcr |= MCS7840_UART_MCR_DTRDSR; 645 DPRINTF(" DTR/DSR\n"); 646 } else 647 mcr &= ~MCS7840_UART_MCR_DTRDSR; 648 649 sc->sc_ports[pn].sc_lcr = lcr; 650 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_LCR, sc->sc_ports[pn].sc_lcr); 651 DPRINTF("Port %d LCR=%02x\n", pn, sc->sc_ports[pn].sc_lcr); 652 653 sc->sc_ports[pn].sc_mcr = mcr; 654 umcs7840_set_UART_reg_sync(sc, pn, MCS7840_UART_REG_MCR, sc->sc_ports[pn].sc_mcr); 655 DPRINTF("Port %d MCR=%02x\n", pn, sc->sc_ports[pn].sc_mcr); 656 657 umcs7840_set_baudrate(sc, pn, t->c_ospeed); 658 } 659 660 661 static int 662 umcs7840_pre_param(struct ucom_softc *ucom, struct termios *t) 663 { 664 uint8_t clk; 665 uint16_t divisor; 666 667 if (umcs7840_calc_baudrate(t->c_ospeed, &divisor, &clk) || !divisor) 668 return (EINVAL); 669 return (0); 670 } 671 672 static void 673 umcs7840_start_read(struct ucom_softc *ucom) 674 { 675 struct umcs7840_softc *sc = ucom->sc_parent; 676 uint8_t pn = ucom->sc_portno; 677 678 /* Start interrupt transfer */ 679 usbd_transfer_start(sc->sc_intr_xfer); 680 681 /* Start read transfer */ 682 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 683 } 684 685 static void 686 umcs7840_stop_read(struct ucom_softc *ucom) 687 { 688 struct umcs7840_softc *sc = ucom->sc_parent; 689 uint8_t pn = ucom->sc_portno; 690 691 /* Stop read transfer */ 692 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_RD_EP]); 693 } 694 695 static void 696 umcs7840_start_write(struct ucom_softc *ucom) 697 { 698 struct umcs7840_softc *sc = ucom->sc_parent; 699 uint8_t pn = ucom->sc_portno; 700 701 /* Start interrupt transfer */ 702 usbd_transfer_start(sc->sc_intr_xfer); 703 704 /* Start write transfer */ 705 usbd_transfer_start(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 706 } 707 708 static void 709 umcs7840_stop_write(struct ucom_softc *ucom) 710 { 711 struct umcs7840_softc *sc = ucom->sc_parent; 712 uint8_t pn = ucom->sc_portno; 713 714 /* Stop write transfer */ 715 usbd_transfer_stop(sc->sc_ports[pn].sc_xfer[UMCS7840_BULK_WR_EP]); 716 } 717 718 static void 719 umcs7840_cfg_get_status(struct ucom_softc *ucom, uint8_t *lsr, uint8_t *msr) 720 { 721 struct umcs7840_softc *sc = ucom->sc_parent; 722 723 *lsr = sc->sc_ports[ucom->sc_portno].sc_lsr; 724 *msr = sc->sc_ports[ucom->sc_portno].sc_msr; 725 DPRINTF("Port %d status: LSR=%02x MSR=%02x\n", ucom->sc_portno, *lsr, *msr); 726 } 727 728 static void 729 umcs7840_intr_callback(struct usb_xfer *xfer, usb_error_t error) 730 { 731 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 732 struct usb_page_cache *pc; 733 uint8_t buf[13]; 734 int actlen; 735 int subunit; 736 737 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 738 739 switch (USB_GET_STATE(xfer)) { 740 case USB_ST_TRANSFERRED: 741 if (actlen == 5 || actlen == 13) { 742 pc = usbd_xfer_get_frame(xfer, 0); 743 usbd_copy_out(pc, 0, buf, actlen); 744 /* Check status of all ports */ 745 for (subunit = 0; subunit < sc->sc_numports; ++subunit) { 746 uint8_t pn = sc->sc_ucom[subunit].sc_portno; 747 748 if (buf[pn] & MCS7840_UART_ISR_NOPENDING) 749 continue; 750 DPRINTF("Port %d has pending interrupt: %02x (FIFO: %02x)\n", pn, buf[pn] & MCS7840_UART_ISR_INTMASK, buf[pn] & (~MCS7840_UART_ISR_INTMASK)); 751 switch (buf[pn] & MCS7840_UART_ISR_INTMASK) { 752 case MCS7840_UART_ISR_RXERR: 753 case MCS7840_UART_ISR_RXHASDATA: 754 case MCS7840_UART_ISR_RXTIMEOUT: 755 /* Read new LSR */ 756 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_LSR, &sc->sc_ports[pn].sc_lsr)) 757 break; /* Inner switch */ 758 ucom_status_change(&sc->sc_ucom[subunit]); 759 /* Inner switch */ 760 break; 761 case MCS7840_UART_ISR_TXEMPTY: 762 /* Do nothing */ 763 break; /* Inner switch */ 764 case MCS7840_UART_ISR_MSCHANGE: 765 /* Read new MSR */ 766 if (umcs7840_get_UART_reg_sync(sc, pn, MCS7840_UART_REG_MSR, &sc->sc_ports[pn].sc_msr)) 767 break; /* Inner switch */ 768 DPRINTF("Port %d: new MSR %02x\n", pn, sc->sc_ports[pn].sc_msr); 769 ucom_status_change(&sc->sc_ucom[subunit]); 770 break; 771 } 772 } 773 } else 774 device_printf(sc->sc_dev, "Invalid interrupt data length %d", actlen); 775 /* FALLTHROUGH */ 776 case USB_ST_SETUP: 777 tr_setup: 778 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 779 usbd_transfer_submit(xfer); 780 return; 781 782 default: /* Error */ 783 if (error != USB_ERR_CANCELLED) { 784 /* try to clear stall first */ 785 usbd_xfer_set_stall(xfer); 786 goto tr_setup; 787 } 788 return; 789 } 790 } 791 792 static void 793 umcs7840_read_callback1(struct usb_xfer *xfer, usb_error_t error) 794 { 795 umcs7840_read_callbackN(xfer, error, 0); 796 } 797 798 static void 799 umcs7840_read_callback2(struct usb_xfer *xfer, usb_error_t error) 800 { 801 umcs7840_read_callbackN(xfer, error, 1); 802 } 803 static void 804 umcs7840_read_callback3(struct usb_xfer *xfer, usb_error_t error) 805 { 806 umcs7840_read_callbackN(xfer, error, 2); 807 } 808 809 static void 810 umcs7840_read_callback4(struct usb_xfer *xfer, usb_error_t error) 811 { 812 umcs7840_read_callbackN(xfer, error, 3); 813 } 814 815 static void 816 umcs7840_read_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 817 { 818 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 819 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 820 struct usb_page_cache *pc; 821 int actlen; 822 823 usbd_xfer_status(xfer, &actlen, NULL, NULL, NULL); 824 825 DPRINTF("Port %d read, state = %d, data length = %d\n", ucom->sc_portno, USB_GET_STATE(xfer), actlen); 826 827 switch (USB_GET_STATE(xfer)) { 828 case USB_ST_TRANSFERRED: 829 pc = usbd_xfer_get_frame(xfer, 0); 830 ucom_put_data(ucom, pc, 0, actlen); 831 /* FALLTHROUGH */ 832 case USB_ST_SETUP: 833 tr_setup: 834 usbd_xfer_set_frame_len(xfer, 0, usbd_xfer_max_len(xfer)); 835 usbd_transfer_submit(xfer); 836 return; 837 838 default: /* Error */ 839 if (error != USB_ERR_CANCELLED) { 840 /* try to clear stall first */ 841 usbd_xfer_set_stall(xfer); 842 goto tr_setup; 843 } 844 return; 845 } 846 } 847 848 static void 849 umcs7840_write_callback1(struct usb_xfer *xfer, usb_error_t error) 850 { 851 umcs7840_write_callbackN(xfer, error, 0); 852 } 853 854 static void 855 umcs7840_write_callback2(struct usb_xfer *xfer, usb_error_t error) 856 { 857 umcs7840_write_callbackN(xfer, error, 1); 858 } 859 860 static void 861 umcs7840_write_callback3(struct usb_xfer *xfer, usb_error_t error) 862 { 863 umcs7840_write_callbackN(xfer, error, 2); 864 } 865 866 static void 867 umcs7840_write_callback4(struct usb_xfer *xfer, usb_error_t error) 868 { 869 umcs7840_write_callbackN(xfer, error, 3); 870 } 871 872 static void 873 umcs7840_write_callbackN(struct usb_xfer *xfer, usb_error_t error, uint8_t subunit) 874 { 875 struct umcs7840_softc *sc = usbd_xfer_softc(xfer); 876 struct ucom_softc *ucom = &sc->sc_ucom[subunit]; 877 struct usb_page_cache *pc; 878 uint32_t actlen; 879 880 DPRINTF("Port %d write, state = %d\n", ucom->sc_portno, USB_GET_STATE(xfer)); 881 882 switch (USB_GET_STATE(xfer)) { 883 case USB_ST_SETUP: 884 case USB_ST_TRANSFERRED: 885 tr_setup: 886 pc = usbd_xfer_get_frame(xfer, 0); 887 if (ucom_get_data(ucom, pc, 0, usbd_xfer_max_len(xfer), &actlen)) { 888 DPRINTF("Port %d write, has %d bytes\n", ucom->sc_portno, actlen); 889 usbd_xfer_set_frame_len(xfer, 0, actlen); 890 usbd_transfer_submit(xfer); 891 } 892 return; 893 894 default: /* Error */ 895 if (error != USB_ERR_CANCELLED) { 896 /* try to clear stall first */ 897 usbd_xfer_set_stall(xfer); 898 goto tr_setup; 899 } 900 return; 901 } 902 } 903 904 static void 905 umcs7840_poll(struct ucom_softc *ucom) 906 { 907 struct umcs7840_softc *sc = ucom->sc_parent; 908 909 DPRINTF("Port %d poll\n", ucom->sc_portno); 910 usbd_transfer_poll(sc->sc_ports[ucom->sc_portno].sc_xfer, UMCS7840_N_TRANSFERS); 911 usbd_transfer_poll(&sc->sc_intr_xfer, 1); 912 } 913 914 static usb_error_t 915 umcs7840_get_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t *data) 916 { 917 struct usb_device_request req; 918 usb_error_t err; 919 uint16_t len; 920 921 req.bmRequestType = UT_READ_VENDOR_DEVICE; 922 req.bRequest = MCS7840_RDREQ; 923 USETW(req.wValue, 0); 924 USETW(req.wIndex, reg); 925 USETW(req.wLength, UMCS7840_READ_LENGTH); 926 927 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 928 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 929 device_printf(sc->sc_dev, "Reading register %d failed: invalid length %d\n", reg, len); 930 return (USB_ERR_INVAL); 931 } else if (err) 932 device_printf(sc->sc_dev, "Reading register %d failed: %s\n", reg, usbd_errstr(err)); 933 return (err); 934 } 935 936 static usb_error_t 937 umcs7840_set_reg_sync(struct umcs7840_softc *sc, uint8_t reg, uint8_t data) 938 { 939 struct usb_device_request req; 940 usb_error_t err; 941 942 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 943 req.bRequest = MCS7840_WRREQ; 944 USETW(req.wValue, data); 945 USETW(req.wIndex, reg); 946 USETW(req.wLength, 0); 947 948 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 949 if (err) 950 device_printf(sc->sc_dev, "Writing register %d failed: %s\n", reg, usbd_errstr(err)); 951 952 return (err); 953 } 954 955 static usb_error_t 956 umcs7840_get_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t *data) 957 { 958 struct usb_device_request req; 959 uint16_t wVal; 960 usb_error_t err; 961 uint16_t len; 962 963 /* portno is port number */ 964 wVal = ((uint16_t)(portno + 1)) << 8; 965 966 req.bmRequestType = UT_READ_VENDOR_DEVICE; 967 req.bRequest = MCS7840_RDREQ; 968 USETW(req.wValue, wVal); 969 USETW(req.wIndex, reg); 970 USETW(req.wLength, UMCS7840_READ_LENGTH); 971 972 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, (void *)data, 0, &len, UMCS7840_CTRL_TIMEOUT); 973 if (err == USB_ERR_NORMAL_COMPLETION && len != 1) { 974 device_printf(sc->sc_dev, "Reading UART%d register %d failed: invalid length %d\n", portno, reg, len); 975 return (USB_ERR_INVAL); 976 } else if (err) 977 device_printf(sc->sc_dev, "Reading UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 978 return (err); 979 } 980 981 static usb_error_t 982 umcs7840_set_UART_reg_sync(struct umcs7840_softc *sc, uint8_t portno, uint8_t reg, uint8_t data) 983 { 984 struct usb_device_request req; 985 usb_error_t err; 986 uint16_t wVal; 987 988 /* portno is port number */ 989 wVal = ((uint16_t)(portno + 1)) << 8 | data; 990 991 req.bmRequestType = UT_WRITE_VENDOR_DEVICE; 992 req.bRequest = MCS7840_WRREQ; 993 USETW(req.wValue, wVal); 994 USETW(req.wIndex, reg); 995 USETW(req.wLength, 0); 996 997 err = usbd_do_request_proc(sc->sc_udev, &sc->sc_super_ucom.sc_tq, &req, NULL, 0, NULL, UMCS7840_CTRL_TIMEOUT); 998 if (err) 999 device_printf(sc->sc_dev, "Writing UART%d register %d failed: %s\n", portno, reg, usbd_errstr(err)); 1000 return (err); 1001 } 1002 1003 static usb_error_t 1004 umcs7840_set_baudrate(struct umcs7840_softc *sc, uint8_t portno, uint32_t rate) 1005 { 1006 usb_error_t err; 1007 uint16_t divisor; 1008 uint8_t clk; 1009 uint8_t data; 1010 1011 if (umcs7840_calc_baudrate(rate, &divisor, &clk)) { 1012 DPRINTF("Port %d bad speed: %d\n", portno, rate); 1013 return (-1); 1014 } 1015 if (divisor == 0 || (clk & MCS7840_DEV_SPx_CLOCK_MASK) != clk) { 1016 DPRINTF("Port %d bad speed calculation: %d\n", portno, rate); 1017 return (-1); 1018 } 1019 DPRINTF("Port %d set speed: %d (%02x / %d)\n", portno, rate, clk, divisor); 1020 1021 /* Set clock source for standard BAUD frequences */ 1022 err = umcs7840_get_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, &data); 1023 if (err) 1024 return (err); 1025 data &= MCS7840_DEV_SPx_CLOCK_MASK; 1026 data |= clk; 1027 err = umcs7840_set_reg_sync(sc, umcs7840_port_registers[portno].reg_sp, data); 1028 if (err) 1029 return (err); 1030 1031 /* Set divider */ 1032 sc->sc_ports[portno].sc_lcr |= MCS7840_UART_LCR_DIVISORS; 1033 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1034 if (err) 1035 return (err); 1036 1037 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLL, (uint8_t)(divisor & 0xff)); 1038 if (err) 1039 return (err); 1040 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_DLM, (uint8_t)((divisor >> 8) & 0xff)); 1041 if (err) 1042 return (err); 1043 1044 /* Turn off access to DLL/DLM registers of UART */ 1045 sc->sc_ports[portno].sc_lcr &= ~MCS7840_UART_LCR_DIVISORS; 1046 err = umcs7840_set_UART_reg_sync(sc, portno, MCS7840_UART_REG_LCR, sc->sc_ports[portno].sc_lcr); 1047 if (err) 1048 return (err); 1049 return (0); 1050 } 1051 1052 /* Maximum speeds for standard frequences, when PLL is not used */ 1053 static const uint32_t umcs7840_baudrate_divisors[] = {0, 115200, 230400, 403200, 460800, 806400, 921600, 1572864, 3145728,}; 1054 static const uint8_t umcs7840_baudrate_divisors_len = sizeof(umcs7840_baudrate_divisors) / sizeof(umcs7840_baudrate_divisors[0]); 1055 1056 static usb_error_t 1057 umcs7840_calc_baudrate(uint32_t rate, uint16_t *divisor, uint8_t *clk) 1058 { 1059 uint8_t i = 0; 1060 1061 if (rate > umcs7840_baudrate_divisors[umcs7840_baudrate_divisors_len - 1]) 1062 return (-1); 1063 1064 for (i = 0; i < umcs7840_baudrate_divisors_len - 1 && 1065 !(rate > umcs7840_baudrate_divisors[i] && rate <= umcs7840_baudrate_divisors[i + 1]); ++i); 1066 *divisor = umcs7840_baudrate_divisors[i + 1] / rate; 1067 /* 0x00 .. 0x70 */ 1068 *clk = i << MCS7840_DEV_SPx_CLOCK_SHIFT; 1069 return (0); 1070 } 1071