1 /* $FreeBSD: head/sys/dev/usb/wlan/if_rumreg.h 258780 2013-11-30 22:17:27Z eadler $ */ 2 3 /*- 4 * Copyright (c) 2005, 2006 Damien Bergamini <damien.bergamini@free.fr> 5 * Copyright (c) 2006 Niall O'Higgins <niallo@openbsd.org> 6 * 7 * Permission to use, copy, modify, and distribute this software for any 8 * purpose with or without fee is hereby granted, provided that the above 9 * copyright notice and this permission notice appear in all copies. 10 * 11 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 12 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 13 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 14 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 15 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 16 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 17 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 18 */ 19 20 #define RT2573_NOISE_FLOOR -95 21 22 #define RT2573_TX_DESC_SIZE (sizeof (struct rum_tx_desc)) 23 #define RT2573_RX_DESC_SIZE (sizeof (struct rum_rx_desc)) 24 25 #define RT2573_CONFIG_NO 1 26 #define RT2573_IFACE_INDEX 0 27 28 #define RT2573_MCU_CNTL 0x01 29 #define RT2573_WRITE_MAC 0x02 30 #define RT2573_READ_MAC 0x03 31 #define RT2573_WRITE_MULTI_MAC 0x06 32 #define RT2573_READ_MULTI_MAC 0x07 33 #define RT2573_READ_EEPROM 0x09 34 #define RT2573_WRITE_LED 0x0a 35 36 /* 37 * Control and status registers. 38 */ 39 #define RT2573_AIFSN_CSR 0x0400 40 #define RT2573_CWMIN_CSR 0x0404 41 #define RT2573_CWMAX_CSR 0x0408 42 #define RT2573_MCU_CODE_BASE 0x0800 43 #define RT2573_HW_BEACON_BASE0 0x2400 44 #define RT2573_MAC_CSR0 0x3000 45 #define RT2573_MAC_CSR1 0x3004 46 #define RT2573_MAC_CSR2 0x3008 47 #define RT2573_MAC_CSR3 0x300c 48 #define RT2573_MAC_CSR4 0x3010 49 #define RT2573_MAC_CSR5 0x3014 50 #define RT2573_MAC_CSR6 0x3018 51 #define RT2573_MAC_CSR7 0x301c 52 #define RT2573_MAC_CSR8 0x3020 53 #define RT2573_MAC_CSR9 0x3024 54 #define RT2573_MAC_CSR10 0x3028 55 #define RT2573_MAC_CSR11 0x302c 56 #define RT2573_MAC_CSR12 0x3030 57 #define RT2573_MAC_CSR13 0x3034 58 #define RT2573_MAC_CSR14 0x3038 59 #define RT2573_MAC_CSR15 0x303c 60 #define RT2573_TXRX_CSR0 0x3040 61 #define RT2573_TXRX_CSR1 0x3044 62 #define RT2573_TXRX_CSR2 0x3048 63 #define RT2573_TXRX_CSR3 0x304c 64 #define RT2573_TXRX_CSR4 0x3050 65 #define RT2573_TXRX_CSR5 0x3054 66 #define RT2573_TXRX_CSR6 0x3058 67 #define RT2573_TXRX_CSR7 0x305c 68 #define RT2573_TXRX_CSR8 0x3060 69 #define RT2573_TXRX_CSR9 0x3064 70 #define RT2573_TXRX_CSR10 0x3068 71 #define RT2573_TXRX_CSR11 0x306c 72 #define RT2573_TXRX_CSR12 0x3070 73 #define RT2573_TXRX_CSR13 0x3074 74 #define RT2573_TXRX_CSR14 0x3078 75 #define RT2573_TXRX_CSR15 0x307c 76 #define RT2573_PHY_CSR0 0x3080 77 #define RT2573_PHY_CSR1 0x3084 78 #define RT2573_PHY_CSR2 0x3088 79 #define RT2573_PHY_CSR3 0x308c 80 #define RT2573_PHY_CSR4 0x3090 81 #define RT2573_PHY_CSR5 0x3094 82 #define RT2573_PHY_CSR6 0x3098 83 #define RT2573_PHY_CSR7 0x309c 84 #define RT2573_SEC_CSR0 0x30a0 85 #define RT2573_SEC_CSR1 0x30a4 86 #define RT2573_SEC_CSR2 0x30a8 87 #define RT2573_SEC_CSR3 0x30ac 88 #define RT2573_SEC_CSR4 0x30b0 89 #define RT2573_SEC_CSR5 0x30b4 90 #define RT2573_STA_CSR0 0x30c0 91 #define RT2573_STA_CSR1 0x30c4 92 #define RT2573_STA_CSR2 0x30c8 93 #define RT2573_STA_CSR3 0x30cc 94 #define RT2573_STA_CSR4 0x30d0 95 #define RT2573_STA_CSR5 0x30d4 96 97 98 /* possible flags for register RT2573_MAC_CSR1 */ 99 #define RT2573_RESET_ASIC (1 << 0) 100 #define RT2573_RESET_BBP (1 << 1) 101 #define RT2573_HOST_READY (1 << 2) 102 103 /* possible flags for register MAC_CSR5 */ 104 #define RT2573_ONE_BSSID 3 105 106 /* possible flags for register TXRX_CSR0 */ 107 /* Tx filter flags are in the low 16 bits */ 108 #define RT2573_AUTO_TX_SEQ (1 << 15) 109 /* Rx filter flags are in the high 16 bits */ 110 #define RT2573_DISABLE_RX (1 << 16) 111 #define RT2573_DROP_CRC_ERROR (1 << 17) 112 #define RT2573_DROP_PHY_ERROR (1 << 18) 113 #define RT2573_DROP_CTL (1 << 19) 114 #define RT2573_DROP_NOT_TO_ME (1 << 20) 115 #define RT2573_DROP_TODS (1 << 21) 116 #define RT2573_DROP_VER_ERROR (1 << 22) 117 #define RT2573_DROP_MULTICAST (1 << 23) 118 #define RT2573_DROP_BROADCAST (1 << 24) 119 #define RT2573_DROP_ACKCTS (1 << 25) 120 121 /* possible flags for register TXRX_CSR4 */ 122 #define RT2573_SHORT_PREAMBLE (1 << 18) 123 #define RT2573_MRR_ENABLED (1 << 19) 124 #define RT2573_MRR_CCK_FALLBACK (1 << 22) 125 126 /* possible flags for register TXRX_CSR9 */ 127 #define RT2573_TSF_TICKING (1 << 16) 128 #define RT2573_TSF_MODE(x) (((x) & 0x3) << 17) 129 /* TBTT stands for Target Beacon Transmission Time */ 130 #define RT2573_ENABLE_TBTT (1 << 19) 131 #define RT2573_GENERATE_BEACON (1 << 20) 132 133 /* possible flags for register PHY_CSR0 */ 134 #define RT2573_PA_PE_2GHZ (1 << 16) 135 #define RT2573_PA_PE_5GHZ (1 << 17) 136 137 /* possible flags for register PHY_CSR3 */ 138 #define RT2573_BBP_READ (1 << 15) 139 #define RT2573_BBP_BUSY (1 << 16) 140 /* possible flags for register PHY_CSR4 */ 141 #define RT2573_RF_20BIT (20 << 24) 142 #define RT2573_RF_BUSY (1U << 31) 143 144 /* LED values */ 145 #define RT2573_LED_RADIO (1 << 8) 146 #define RT2573_LED_G (1 << 9) 147 #define RT2573_LED_A (1 << 10) 148 #define RT2573_LED_ON 0x1e1e 149 #define RT2573_LED_OFF 0x0 150 151 #define RT2573_MCU_RUN (1 << 3) 152 153 #define RT2573_SMART_MODE (1 << 0) 154 155 #define RT2573_BBPR94_DEFAULT 6 156 157 #define RT2573_BBP_WRITE (1 << 15) 158 159 /* dual-band RF */ 160 #define RT2573_RF_5226 1 161 #define RT2573_RF_5225 3 162 /* single-band RF */ 163 #define RT2573_RF_2528 2 164 #define RT2573_RF_2527 4 165 166 #define RT2573_BBP_VERSION 0 167 168 struct rum_tx_desc { 169 uint32_t flags; 170 #define RT2573_TX_BURST (1 << 0) 171 #define RT2573_TX_VALID (1 << 1) 172 #define RT2573_TX_MORE_FRAG (1 << 2) 173 #define RT2573_TX_NEED_ACK (1 << 3) 174 #define RT2573_TX_TIMESTAMP (1 << 4) 175 #define RT2573_TX_OFDM (1 << 5) 176 #define RT2573_TX_IFS_SIFS (1 << 6) 177 #define RT2573_TX_LONG_RETRY (1 << 7) 178 179 uint16_t wme; 180 #define RT2573_QID(v) (v) 181 #define RT2573_AIFSN(v) ((v) << 4) 182 #define RT2573_LOGCWMIN(v) ((v) << 8) 183 #define RT2573_LOGCWMAX(v) ((v) << 12) 184 185 uint16_t xflags; 186 #define RT2573_TX_HWSEQ (1 << 12) 187 188 uint8_t plcp_signal; 189 uint8_t plcp_service; 190 #define RT2573_PLCP_LENGEXT 0x80 191 192 uint8_t plcp_length_lo; 193 uint8_t plcp_length_hi; 194 195 uint32_t iv; 196 uint32_t eiv; 197 198 uint8_t offset; 199 uint8_t qid; 200 uint8_t txpower; 201 #define RT2573_DEFAULT_TXPOWER 0 202 203 uint8_t reserved; 204 } __packed; 205 206 struct rum_rx_desc { 207 uint32_t flags; 208 #define RT2573_RX_BUSY (1 << 0) 209 #define RT2573_RX_DROP (1 << 1) 210 #define RT2573_RX_CRC_ERROR (1 << 6) 211 #define RT2573_RX_OFDM (1 << 7) 212 213 uint8_t rate; 214 uint8_t rssi; 215 uint8_t reserved1; 216 uint8_t offset; 217 uint32_t iv; 218 uint32_t eiv; 219 uint32_t reserved2[2]; 220 } __packed; 221 222 #define RT2573_RF1 0 223 #define RT2573_RF2 2 224 #define RT2573_RF3 1 225 #define RT2573_RF4 3 226 227 #define RT2573_EEPROM_MACBBP 0x0000 228 #define RT2573_EEPROM_ADDRESS 0x0004 229 #define RT2573_EEPROM_ANTENNA 0x0020 230 #define RT2573_EEPROM_CONFIG2 0x0022 231 #define RT2573_EEPROM_BBP_BASE 0x0026 232 #define RT2573_EEPROM_TXPOWER 0x0046 233 #define RT2573_EEPROM_FREQ_OFFSET 0x005e 234 #define RT2573_EEPROM_RSSI_2GHZ_OFFSET 0x009a 235 #define RT2573_EEPROM_RSSI_5GHZ_OFFSET 0x009c 236