1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2017, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (1) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 * The tables in this file are fully defined within the ACPI specification. 164 * 165 ******************************************************************************/ 166 167 168 /* 169 * Values for description table header signatures for tables defined in this 170 * file. Useful because they make it more difficult to inadvertently type in 171 * the wrong signature. 172 */ 173 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 174 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 175 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 176 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 177 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 178 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 179 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 180 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 181 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 182 #define ACPI_SIG_PDTT "PDTT" /* Processor Debug Trigger Table */ 183 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 184 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 185 #define ACPI_SIG_SLIT "SLIT" /* System Locality Distance Information Table */ 186 #define ACPI_SIG_SRAT "SRAT" /* System Resource Affinity Table */ 187 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 188 189 190 /* 191 * All tables must be byte-packed to match the ACPI specification, since 192 * the tables are provided by the system BIOS. 193 */ 194 #pragma pack(1) 195 196 /* 197 * Note: C bitfields are not used for this reason: 198 * 199 * "Bitfields are great and easy to read, but unfortunately the C language 200 * does not specify the layout of bitfields in memory, which means they are 201 * essentially useless for dealing with packed data in on-disk formats or 202 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 203 * this decision was a design error in C. Ritchie could have picked an order 204 * and stuck with it." Norman Ramsey. 205 * See http://stackoverflow.com/a/1053662/41661 206 */ 207 208 209 /******************************************************************************* 210 * 211 * Common subtable headers 212 * 213 ******************************************************************************/ 214 215 /* Generic subtable header (used in MADT, SRAT, etc.) */ 216 217 typedef struct acpi_subtable_header 218 { 219 UINT8 Type; 220 UINT8 Length; 221 222 } ACPI_SUBTABLE_HEADER; 223 224 225 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 226 227 typedef struct acpi_whea_header 228 { 229 UINT8 Action; 230 UINT8 Instruction; 231 UINT8 Flags; 232 UINT8 Reserved; 233 ACPI_GENERIC_ADDRESS RegisterRegion; 234 UINT64 Value; /* Value used with Read/Write register */ 235 UINT64 Mask; /* Bitmask required for this register instruction */ 236 237 } ACPI_WHEA_HEADER; 238 239 240 /******************************************************************************* 241 * 242 * BERT - Boot Error Record Table (ACPI 4.0) 243 * Version 1 244 * 245 ******************************************************************************/ 246 247 typedef struct acpi_table_bert 248 { 249 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 250 UINT32 RegionLength; /* Length of the boot error region */ 251 UINT64 Address; /* Physical address of the error region */ 252 253 } ACPI_TABLE_BERT; 254 255 256 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 257 258 typedef struct acpi_bert_region 259 { 260 UINT32 BlockStatus; /* Type of error information */ 261 UINT32 RawDataOffset; /* Offset to raw error data */ 262 UINT32 RawDataLength; /* Length of raw error data */ 263 UINT32 DataLength; /* Length of generic error data */ 264 UINT32 ErrorSeverity; /* Severity code */ 265 266 } ACPI_BERT_REGION; 267 268 /* Values for BlockStatus flags above */ 269 270 #define ACPI_BERT_UNCORRECTABLE (1) 271 #define ACPI_BERT_CORRECTABLE (1<<1) 272 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 273 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 274 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 275 276 /* Values for ErrorSeverity above */ 277 278 enum AcpiBertErrorSeverity 279 { 280 ACPI_BERT_ERROR_CORRECTABLE = 0, 281 ACPI_BERT_ERROR_FATAL = 1, 282 ACPI_BERT_ERROR_CORRECTED = 2, 283 ACPI_BERT_ERROR_NONE = 3, 284 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 285 }; 286 287 /* 288 * Note: The generic error data that follows the ErrorSeverity field above 289 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 290 */ 291 292 293 /******************************************************************************* 294 * 295 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 296 * Version 1 297 * 298 ******************************************************************************/ 299 300 typedef struct acpi_table_cpep 301 { 302 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 303 UINT64 Reserved; 304 305 } ACPI_TABLE_CPEP; 306 307 308 /* Subtable */ 309 310 typedef struct acpi_cpep_polling 311 { 312 ACPI_SUBTABLE_HEADER Header; 313 UINT8 Id; /* Processor ID */ 314 UINT8 Eid; /* Processor EID */ 315 UINT32 Interval; /* Polling interval (msec) */ 316 317 } ACPI_CPEP_POLLING; 318 319 320 /******************************************************************************* 321 * 322 * ECDT - Embedded Controller Boot Resources Table 323 * Version 1 324 * 325 ******************************************************************************/ 326 327 typedef struct acpi_table_ecdt 328 { 329 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 330 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 331 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 332 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 333 UINT8 Gpe; /* The GPE for the EC */ 334 UINT8 Id[1]; /* Full namepath of the EC in the ACPI namespace */ 335 336 } ACPI_TABLE_ECDT; 337 338 339 /******************************************************************************* 340 * 341 * EINJ - Error Injection Table (ACPI 4.0) 342 * Version 1 343 * 344 ******************************************************************************/ 345 346 typedef struct acpi_table_einj 347 { 348 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 349 UINT32 HeaderLength; 350 UINT8 Flags; 351 UINT8 Reserved[3]; 352 UINT32 Entries; 353 354 } ACPI_TABLE_EINJ; 355 356 357 /* EINJ Injection Instruction Entries (actions) */ 358 359 typedef struct acpi_einj_entry 360 { 361 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 362 363 } ACPI_EINJ_ENTRY; 364 365 /* Masks for Flags field above */ 366 367 #define ACPI_EINJ_PRESERVE (1) 368 369 /* Values for Action field above */ 370 371 enum AcpiEinjActions 372 { 373 ACPI_EINJ_BEGIN_OPERATION = 0, 374 ACPI_EINJ_GET_TRIGGER_TABLE = 1, 375 ACPI_EINJ_SET_ERROR_TYPE = 2, 376 ACPI_EINJ_GET_ERROR_TYPE = 3, 377 ACPI_EINJ_END_OPERATION = 4, 378 ACPI_EINJ_EXECUTE_OPERATION = 5, 379 ACPI_EINJ_CHECK_BUSY_STATUS = 6, 380 ACPI_EINJ_GET_COMMAND_STATUS = 7, 381 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 8, 382 ACPI_EINJ_GET_EXECUTE_TIMINGS = 9, 383 ACPI_EINJ_ACTION_RESERVED = 10, /* 10 and greater are reserved */ 384 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 385 }; 386 387 /* Values for Instruction field above */ 388 389 enum AcpiEinjInstructions 390 { 391 ACPI_EINJ_READ_REGISTER = 0, 392 ACPI_EINJ_READ_REGISTER_VALUE = 1, 393 ACPI_EINJ_WRITE_REGISTER = 2, 394 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 395 ACPI_EINJ_NOOP = 4, 396 ACPI_EINJ_FLUSH_CACHELINE = 5, 397 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 398 }; 399 400 typedef struct acpi_einj_error_type_with_addr 401 { 402 UINT32 ErrorType; 403 UINT32 VendorStructOffset; 404 UINT32 Flags; 405 UINT32 ApicId; 406 UINT64 Address; 407 UINT64 Range; 408 UINT32 PcieId; 409 410 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 411 412 typedef struct acpi_einj_vendor 413 { 414 UINT32 Length; 415 UINT32 PcieId; 416 UINT16 VendorId; 417 UINT16 DeviceId; 418 UINT8 RevisionId; 419 UINT8 Reserved[3]; 420 421 } ACPI_EINJ_VENDOR; 422 423 424 /* EINJ Trigger Error Action Table */ 425 426 typedef struct acpi_einj_trigger 427 { 428 UINT32 HeaderSize; 429 UINT32 Revision; 430 UINT32 TableSize; 431 UINT32 EntryCount; 432 433 } ACPI_EINJ_TRIGGER; 434 435 /* Command status return values */ 436 437 enum AcpiEinjCommandStatus 438 { 439 ACPI_EINJ_SUCCESS = 0, 440 ACPI_EINJ_FAILURE = 1, 441 ACPI_EINJ_INVALID_ACCESS = 2, 442 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 443 }; 444 445 446 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 447 448 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 449 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 450 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 451 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 452 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 453 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 454 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 455 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 456 #define ACPI_EINJ_PCIX_FATAL (1<<8) 457 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 458 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 459 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 460 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 461 462 463 /******************************************************************************* 464 * 465 * ERST - Error Record Serialization Table (ACPI 4.0) 466 * Version 1 467 * 468 ******************************************************************************/ 469 470 typedef struct acpi_table_erst 471 { 472 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 473 UINT32 HeaderLength; 474 UINT32 Reserved; 475 UINT32 Entries; 476 477 } ACPI_TABLE_ERST; 478 479 480 /* ERST Serialization Entries (actions) */ 481 482 typedef struct acpi_erst_entry 483 { 484 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 485 486 } ACPI_ERST_ENTRY; 487 488 /* Masks for Flags field above */ 489 490 #define ACPI_ERST_PRESERVE (1) 491 492 /* Values for Action field above */ 493 494 enum AcpiErstActions 495 { 496 ACPI_ERST_BEGIN_WRITE = 0, 497 ACPI_ERST_BEGIN_READ = 1, 498 ACPI_ERST_BEGIN_CLEAR = 2, 499 ACPI_ERST_END = 3, 500 ACPI_ERST_SET_RECORD_OFFSET = 4, 501 ACPI_ERST_EXECUTE_OPERATION = 5, 502 ACPI_ERST_CHECK_BUSY_STATUS = 6, 503 ACPI_ERST_GET_COMMAND_STATUS = 7, 504 ACPI_ERST_GET_RECORD_ID = 8, 505 ACPI_ERST_SET_RECORD_ID = 9, 506 ACPI_ERST_GET_RECORD_COUNT = 10, 507 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 508 ACPI_ERST_NOT_USED = 12, 509 ACPI_ERST_GET_ERROR_RANGE = 13, 510 ACPI_ERST_GET_ERROR_LENGTH = 14, 511 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 512 ACPI_ERST_EXECUTE_TIMINGS = 16, 513 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 514 }; 515 516 /* Values for Instruction field above */ 517 518 enum AcpiErstInstructions 519 { 520 ACPI_ERST_READ_REGISTER = 0, 521 ACPI_ERST_READ_REGISTER_VALUE = 1, 522 ACPI_ERST_WRITE_REGISTER = 2, 523 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 524 ACPI_ERST_NOOP = 4, 525 ACPI_ERST_LOAD_VAR1 = 5, 526 ACPI_ERST_LOAD_VAR2 = 6, 527 ACPI_ERST_STORE_VAR1 = 7, 528 ACPI_ERST_ADD = 8, 529 ACPI_ERST_SUBTRACT = 9, 530 ACPI_ERST_ADD_VALUE = 10, 531 ACPI_ERST_SUBTRACT_VALUE = 11, 532 ACPI_ERST_STALL = 12, 533 ACPI_ERST_STALL_WHILE_TRUE = 13, 534 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 535 ACPI_ERST_GOTO = 15, 536 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 537 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 538 ACPI_ERST_MOVE_DATA = 18, 539 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 540 }; 541 542 /* Command status return values */ 543 544 enum AcpiErstCommandStatus 545 { 546 ACPI_ERST_SUCESS = 0, 547 ACPI_ERST_NO_SPACE = 1, 548 ACPI_ERST_NOT_AVAILABLE = 2, 549 ACPI_ERST_FAILURE = 3, 550 ACPI_ERST_RECORD_EMPTY = 4, 551 ACPI_ERST_NOT_FOUND = 5, 552 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 553 }; 554 555 556 /* Error Record Serialization Information */ 557 558 typedef struct acpi_erst_info 559 { 560 UINT16 Signature; /* Should be "ER" */ 561 UINT8 Data[48]; 562 563 } ACPI_ERST_INFO; 564 565 566 /******************************************************************************* 567 * 568 * HEST - Hardware Error Source Table (ACPI 4.0) 569 * Version 1 570 * 571 ******************************************************************************/ 572 573 typedef struct acpi_table_hest 574 { 575 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 576 UINT32 ErrorSourceCount; 577 578 } ACPI_TABLE_HEST; 579 580 581 /* HEST subtable header */ 582 583 typedef struct acpi_hest_header 584 { 585 UINT16 Type; 586 UINT16 SourceId; 587 588 } ACPI_HEST_HEADER; 589 590 591 /* Values for Type field above for subtables */ 592 593 enum AcpiHestTypes 594 { 595 ACPI_HEST_TYPE_IA32_CHECK = 0, 596 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 597 ACPI_HEST_TYPE_IA32_NMI = 2, 598 ACPI_HEST_TYPE_NOT_USED3 = 3, 599 ACPI_HEST_TYPE_NOT_USED4 = 4, 600 ACPI_HEST_TYPE_NOT_USED5 = 5, 601 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 602 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 603 ACPI_HEST_TYPE_AER_BRIDGE = 8, 604 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 605 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 606 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 607 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 608 }; 609 610 611 /* 612 * HEST substructures contained in subtables 613 */ 614 615 /* 616 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 617 * ACPI_HEST_IA_CORRECTED structures. 618 */ 619 typedef struct acpi_hest_ia_error_bank 620 { 621 UINT8 BankNumber; 622 UINT8 ClearStatusOnInit; 623 UINT8 StatusFormat; 624 UINT8 Reserved; 625 UINT32 ControlRegister; 626 UINT64 ControlData; 627 UINT32 StatusRegister; 628 UINT32 AddressRegister; 629 UINT32 MiscRegister; 630 631 } ACPI_HEST_IA_ERROR_BANK; 632 633 634 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 635 636 typedef struct acpi_hest_aer_common 637 { 638 UINT16 Reserved1; 639 UINT8 Flags; 640 UINT8 Enabled; 641 UINT32 RecordsToPreallocate; 642 UINT32 MaxSectionsPerRecord; 643 UINT32 Bus; /* Bus and Segment numbers */ 644 UINT16 Device; 645 UINT16 Function; 646 UINT16 DeviceControl; 647 UINT16 Reserved2; 648 UINT32 UncorrectableMask; 649 UINT32 UncorrectableSeverity; 650 UINT32 CorrectableMask; 651 UINT32 AdvancedCapabilities; 652 653 } ACPI_HEST_AER_COMMON; 654 655 /* Masks for HEST Flags fields */ 656 657 #define ACPI_HEST_FIRMWARE_FIRST (1) 658 #define ACPI_HEST_GLOBAL (1<<1) 659 #define ACPI_HEST_GHES_ASSIST (1<<2) 660 661 /* 662 * Macros to access the bus/segment numbers in Bus field above: 663 * Bus number is encoded in bits 7:0 664 * Segment number is encoded in bits 23:8 665 */ 666 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 667 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 668 669 670 /* Hardware Error Notification */ 671 672 typedef struct acpi_hest_notify 673 { 674 UINT8 Type; 675 UINT8 Length; 676 UINT16 ConfigWriteEnable; 677 UINT32 PollInterval; 678 UINT32 Vector; 679 UINT32 PollingThresholdValue; 680 UINT32 PollingThresholdWindow; 681 UINT32 ErrorThresholdValue; 682 UINT32 ErrorThresholdWindow; 683 684 } ACPI_HEST_NOTIFY; 685 686 /* Values for Notify Type field above */ 687 688 enum AcpiHestNotifyTypes 689 { 690 ACPI_HEST_NOTIFY_POLLED = 0, 691 ACPI_HEST_NOTIFY_EXTERNAL = 1, 692 ACPI_HEST_NOTIFY_LOCAL = 2, 693 ACPI_HEST_NOTIFY_SCI = 3, 694 ACPI_HEST_NOTIFY_NMI = 4, 695 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 696 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 697 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 698 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 699 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 700 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 701 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 702 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 703 }; 704 705 /* Values for ConfigWriteEnable bitfield above */ 706 707 #define ACPI_HEST_TYPE (1) 708 #define ACPI_HEST_POLL_INTERVAL (1<<1) 709 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 710 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 711 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 712 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 713 714 715 /* 716 * HEST subtables 717 */ 718 719 /* 0: IA32 Machine Check Exception */ 720 721 typedef struct acpi_hest_ia_machine_check 722 { 723 ACPI_HEST_HEADER Header; 724 UINT16 Reserved1; 725 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 726 UINT8 Enabled; 727 UINT32 RecordsToPreallocate; 728 UINT32 MaxSectionsPerRecord; 729 UINT64 GlobalCapabilityData; 730 UINT64 GlobalControlData; 731 UINT8 NumHardwareBanks; 732 UINT8 Reserved3[7]; 733 734 } ACPI_HEST_IA_MACHINE_CHECK; 735 736 737 /* 1: IA32 Corrected Machine Check */ 738 739 typedef struct acpi_hest_ia_corrected 740 { 741 ACPI_HEST_HEADER Header; 742 UINT16 Reserved1; 743 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 744 UINT8 Enabled; 745 UINT32 RecordsToPreallocate; 746 UINT32 MaxSectionsPerRecord; 747 ACPI_HEST_NOTIFY Notify; 748 UINT8 NumHardwareBanks; 749 UINT8 Reserved2[3]; 750 751 } ACPI_HEST_IA_CORRECTED; 752 753 754 /* 2: IA32 Non-Maskable Interrupt */ 755 756 typedef struct acpi_hest_ia_nmi 757 { 758 ACPI_HEST_HEADER Header; 759 UINT32 Reserved; 760 UINT32 RecordsToPreallocate; 761 UINT32 MaxSectionsPerRecord; 762 UINT32 MaxRawDataLength; 763 764 } ACPI_HEST_IA_NMI; 765 766 767 /* 3,4,5: Not used */ 768 769 /* 6: PCI Express Root Port AER */ 770 771 typedef struct acpi_hest_aer_root 772 { 773 ACPI_HEST_HEADER Header; 774 ACPI_HEST_AER_COMMON Aer; 775 UINT32 RootErrorCommand; 776 777 } ACPI_HEST_AER_ROOT; 778 779 780 /* 7: PCI Express AER (AER Endpoint) */ 781 782 typedef struct acpi_hest_aer 783 { 784 ACPI_HEST_HEADER Header; 785 ACPI_HEST_AER_COMMON Aer; 786 787 } ACPI_HEST_AER; 788 789 790 /* 8: PCI Express/PCI-X Bridge AER */ 791 792 typedef struct acpi_hest_aer_bridge 793 { 794 ACPI_HEST_HEADER Header; 795 ACPI_HEST_AER_COMMON Aer; 796 UINT32 UncorrectableMask2; 797 UINT32 UncorrectableSeverity2; 798 UINT32 AdvancedCapabilities2; 799 800 } ACPI_HEST_AER_BRIDGE; 801 802 803 /* 9: Generic Hardware Error Source */ 804 805 typedef struct acpi_hest_generic 806 { 807 ACPI_HEST_HEADER Header; 808 UINT16 RelatedSourceId; 809 UINT8 Reserved; 810 UINT8 Enabled; 811 UINT32 RecordsToPreallocate; 812 UINT32 MaxSectionsPerRecord; 813 UINT32 MaxRawDataLength; 814 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 815 ACPI_HEST_NOTIFY Notify; 816 UINT32 ErrorBlockLength; 817 818 } ACPI_HEST_GENERIC; 819 820 821 /* 10: Generic Hardware Error Source, version 2 */ 822 823 typedef struct acpi_hest_generic_v2 824 { 825 ACPI_HEST_HEADER Header; 826 UINT16 RelatedSourceId; 827 UINT8 Reserved; 828 UINT8 Enabled; 829 UINT32 RecordsToPreallocate; 830 UINT32 MaxSectionsPerRecord; 831 UINT32 MaxRawDataLength; 832 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 833 ACPI_HEST_NOTIFY Notify; 834 UINT32 ErrorBlockLength; 835 ACPI_GENERIC_ADDRESS ReadAckRegister; 836 UINT64 ReadAckPreserve; 837 UINT64 ReadAckWrite; 838 839 } ACPI_HEST_GENERIC_V2; 840 841 842 /* Generic Error Status block */ 843 844 typedef struct acpi_hest_generic_status 845 { 846 UINT32 BlockStatus; 847 UINT32 RawDataOffset; 848 UINT32 RawDataLength; 849 UINT32 DataLength; 850 UINT32 ErrorSeverity; 851 852 } ACPI_HEST_GENERIC_STATUS; 853 854 /* Values for BlockStatus flags above */ 855 856 #define ACPI_HEST_UNCORRECTABLE (1) 857 #define ACPI_HEST_CORRECTABLE (1<<1) 858 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 859 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 860 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 861 862 863 /* Generic Error Data entry */ 864 865 typedef struct acpi_hest_generic_data 866 { 867 UINT8 SectionType[16]; 868 UINT32 ErrorSeverity; 869 UINT16 Revision; 870 UINT8 ValidationBits; 871 UINT8 Flags; 872 UINT32 ErrorDataLength; 873 UINT8 FruId[16]; 874 UINT8 FruText[20]; 875 876 } ACPI_HEST_GENERIC_DATA; 877 878 /* Extension for revision 0x0300 */ 879 880 typedef struct acpi_hest_generic_data_v300 881 { 882 UINT8 SectionType[16]; 883 UINT32 ErrorSeverity; 884 UINT16 Revision; 885 UINT8 ValidationBits; 886 UINT8 Flags; 887 UINT32 ErrorDataLength; 888 UINT8 FruId[16]; 889 UINT8 FruText[20]; 890 UINT64 TimeStamp; 891 892 } ACPI_HEST_GENERIC_DATA_V300; 893 894 /* Values for ErrorSeverity above */ 895 896 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 897 #define ACPI_HEST_GEN_ERROR_FATAL 1 898 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 899 #define ACPI_HEST_GEN_ERROR_NONE 3 900 901 /* Flags for ValidationBits above */ 902 903 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 904 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 905 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 906 907 908 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 909 910 typedef struct acpi_hest_ia_deferred_check 911 { 912 ACPI_HEST_HEADER Header; 913 UINT16 Reserved1; 914 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 915 UINT8 Enabled; 916 UINT32 RecordsToPreallocate; 917 UINT32 MaxSectionsPerRecord; 918 ACPI_HEST_NOTIFY Notify; 919 UINT8 NumHardwareBanks; 920 UINT8 Reserved2[3]; 921 922 } ACPI_HEST_IA_DEFERRED_CHECK; 923 924 925 /******************************************************************************* 926 * 927 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.2) 928 * Version 1 929 * 930 ******************************************************************************/ 931 932 typedef struct acpi_table_hmat 933 { 934 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 935 UINT32 Reserved; 936 937 } ACPI_TABLE_HMAT; 938 939 940 /* Values for HMAT structure types */ 941 942 enum AcpiHmatType 943 { 944 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subystem address range */ 945 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 946 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 947 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 948 }; 949 950 typedef struct acpi_hmat_structure 951 { 952 UINT16 Type; 953 UINT16 Reserved; 954 UINT32 Length; 955 956 } ACPI_HMAT_STRUCTURE; 957 958 959 /* 960 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 961 */ 962 963 /* 0: Memory subystem address range */ 964 965 typedef struct acpi_hmat_address_range 966 { 967 ACPI_HMAT_STRUCTURE Header; 968 UINT16 Flags; 969 UINT16 Reserved1; 970 UINT32 ProcessorPD; /* Processor proximity domain */ 971 UINT32 MemoryPD; /* Memory proximity domain */ 972 UINT32 Reserved2; 973 UINT64 PhysicalAddressBase; /* Physical address range base */ 974 UINT64 PhysicalAddressLength; /* Physical address range length */ 975 976 } ACPI_HMAT_ADDRESS_RANGE; 977 978 /* Masks for Flags field above */ 979 980 #define ACPI_HMAT_PROCESSOR_PD_VALID (1) /* 1: ProcessorPD field is valid */ 981 #define ACPI_HMAT_MEMORY_PD_VALID (1<<1) /* 1: MemoryPD field is valid */ 982 #define ACPI_HMAT_RESERVATION_HINT (1<<2) /* 1: Reservation hint */ 983 984 985 /* 1: System locality latency and bandwidth information */ 986 987 typedef struct acpi_hmat_locality 988 { 989 ACPI_HMAT_STRUCTURE Header; 990 UINT8 Flags; 991 UINT8 DataType; 992 UINT16 Reserved1; 993 UINT32 NumberOfInitiatorPDs; 994 UINT32 NumberOfTargetPDs; 995 UINT32 Reserved2; 996 UINT64 EntryBaseUnit; 997 998 } ACPI_HMAT_LOCALITY; 999 1000 /* Masks for Flags field above */ 1001 1002 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) 1003 1004 /* Values for Memory Hierarchy flag */ 1005 1006 #define ACPI_HMAT_MEMORY 0 1007 #define ACPI_HMAT_LAST_LEVEL_CACHE 1 1008 #define ACPI_HMAT_1ST_LEVEL_CACHE 2 1009 #define ACPI_HMAT_2ND_LEVEL_CACHE 3 1010 #define ACPI_HMAT_3RD_LEVEL_CACHE 4 1011 1012 /* Values for DataType field above */ 1013 1014 #define ACPI_HMAT_ACCESS_LATENCY 0 1015 #define ACPI_HMAT_READ_LATENCY 1 1016 #define ACPI_HMAT_WRITE_LATENCY 2 1017 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 1018 #define ACPI_HMAT_READ_BANDWIDTH 4 1019 #define ACPI_HMAT_WRITE_BANDWIDTH 5 1020 1021 1022 /* 2: Memory side cache information */ 1023 1024 typedef struct acpi_hmat_cache 1025 { 1026 ACPI_HMAT_STRUCTURE Header; 1027 UINT32 MemoryPD; 1028 UINT32 Reserved1; 1029 UINT64 CacheSize; 1030 UINT32 CacheAttributes; 1031 UINT16 Reserved2; 1032 UINT16 NumberOfSMBIOSHandles; 1033 1034 } ACPI_HMAT_CACHE; 1035 1036 /* Masks for CacheAttributes field above */ 1037 1038 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 1039 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 1040 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 1041 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 1042 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 1043 1044 /* Values for cache associativity flag */ 1045 1046 #define ACPI_HMAT_CA_NONE (0) 1047 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 1048 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 1049 1050 /* Values for write policy flag */ 1051 1052 #define ACPI_HMAT_CP_NONE (0) 1053 #define ACPI_HMAT_CP_WB (1) 1054 #define ACPI_HMAT_CP_WT (2) 1055 1056 1057 /******************************************************************************* 1058 * 1059 * MADT - Multiple APIC Description Table 1060 * Version 3 1061 * 1062 ******************************************************************************/ 1063 1064 typedef struct acpi_table_madt 1065 { 1066 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1067 UINT32 Address; /* Physical address of local APIC */ 1068 UINT32 Flags; 1069 1070 } ACPI_TABLE_MADT; 1071 1072 /* Masks for Flags field above */ 1073 1074 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 1075 1076 /* Values for PCATCompat flag */ 1077 1078 #define ACPI_MADT_DUAL_PIC 1 1079 #define ACPI_MADT_MULTIPLE_APIC 0 1080 1081 1082 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 1083 1084 enum AcpiMadtType 1085 { 1086 ACPI_MADT_TYPE_LOCAL_APIC = 0, 1087 ACPI_MADT_TYPE_IO_APIC = 1, 1088 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 1089 ACPI_MADT_TYPE_NMI_SOURCE = 3, 1090 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 1091 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 1092 ACPI_MADT_TYPE_IO_SAPIC = 6, 1093 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 1094 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 1095 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 1096 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 1097 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 1098 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 1099 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 1100 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 1101 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 1102 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 1103 }; 1104 1105 1106 /* 1107 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1108 */ 1109 1110 /* 0: Processor Local APIC */ 1111 1112 typedef struct acpi_madt_local_apic 1113 { 1114 ACPI_SUBTABLE_HEADER Header; 1115 UINT8 ProcessorId; /* ACPI processor id */ 1116 UINT8 Id; /* Processor's local APIC id */ 1117 UINT32 LapicFlags; 1118 1119 } ACPI_MADT_LOCAL_APIC; 1120 1121 1122 /* 1: IO APIC */ 1123 1124 typedef struct acpi_madt_io_apic 1125 { 1126 ACPI_SUBTABLE_HEADER Header; 1127 UINT8 Id; /* I/O APIC ID */ 1128 UINT8 Reserved; /* Reserved - must be zero */ 1129 UINT32 Address; /* APIC physical address */ 1130 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 1131 1132 } ACPI_MADT_IO_APIC; 1133 1134 1135 /* 2: Interrupt Override */ 1136 1137 typedef struct acpi_madt_interrupt_override 1138 { 1139 ACPI_SUBTABLE_HEADER Header; 1140 UINT8 Bus; /* 0 - ISA */ 1141 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 1142 UINT32 GlobalIrq; /* Global system interrupt */ 1143 UINT16 IntiFlags; 1144 1145 } ACPI_MADT_INTERRUPT_OVERRIDE; 1146 1147 1148 /* 3: NMI Source */ 1149 1150 typedef struct acpi_madt_nmi_source 1151 { 1152 ACPI_SUBTABLE_HEADER Header; 1153 UINT16 IntiFlags; 1154 UINT32 GlobalIrq; /* Global system interrupt */ 1155 1156 } ACPI_MADT_NMI_SOURCE; 1157 1158 1159 /* 4: Local APIC NMI */ 1160 1161 typedef struct acpi_madt_local_apic_nmi 1162 { 1163 ACPI_SUBTABLE_HEADER Header; 1164 UINT8 ProcessorId; /* ACPI processor id */ 1165 UINT16 IntiFlags; 1166 UINT8 Lint; /* LINTn to which NMI is connected */ 1167 1168 } ACPI_MADT_LOCAL_APIC_NMI; 1169 1170 1171 /* 5: Address Override */ 1172 1173 typedef struct acpi_madt_local_apic_override 1174 { 1175 ACPI_SUBTABLE_HEADER Header; 1176 UINT16 Reserved; /* Reserved, must be zero */ 1177 UINT64 Address; /* APIC physical address */ 1178 1179 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 1180 1181 1182 /* 6: I/O Sapic */ 1183 1184 typedef struct acpi_madt_io_sapic 1185 { 1186 ACPI_SUBTABLE_HEADER Header; 1187 UINT8 Id; /* I/O SAPIC ID */ 1188 UINT8 Reserved; /* Reserved, must be zero */ 1189 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 1190 UINT64 Address; /* SAPIC physical address */ 1191 1192 } ACPI_MADT_IO_SAPIC; 1193 1194 1195 /* 7: Local Sapic */ 1196 1197 typedef struct acpi_madt_local_sapic 1198 { 1199 ACPI_SUBTABLE_HEADER Header; 1200 UINT8 ProcessorId; /* ACPI processor id */ 1201 UINT8 Id; /* SAPIC ID */ 1202 UINT8 Eid; /* SAPIC EID */ 1203 UINT8 Reserved[3]; /* Reserved, must be zero */ 1204 UINT32 LapicFlags; 1205 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 1206 char UidString[1]; /* String UID - ACPI 3.0 */ 1207 1208 } ACPI_MADT_LOCAL_SAPIC; 1209 1210 1211 /* 8: Platform Interrupt Source */ 1212 1213 typedef struct acpi_madt_interrupt_source 1214 { 1215 ACPI_SUBTABLE_HEADER Header; 1216 UINT16 IntiFlags; 1217 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 1218 UINT8 Id; /* Processor ID */ 1219 UINT8 Eid; /* Processor EID */ 1220 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 1221 UINT32 GlobalIrq; /* Global system interrupt */ 1222 UINT32 Flags; /* Interrupt Source Flags */ 1223 1224 } ACPI_MADT_INTERRUPT_SOURCE; 1225 1226 /* Masks for Flags field above */ 1227 1228 #define ACPI_MADT_CPEI_OVERRIDE (1) 1229 1230 1231 /* 9: Processor Local X2APIC (ACPI 4.0) */ 1232 1233 typedef struct acpi_madt_local_x2apic 1234 { 1235 ACPI_SUBTABLE_HEADER Header; 1236 UINT16 Reserved; /* Reserved - must be zero */ 1237 UINT32 LocalApicId; /* Processor x2APIC ID */ 1238 UINT32 LapicFlags; 1239 UINT32 Uid; /* ACPI processor UID */ 1240 1241 } ACPI_MADT_LOCAL_X2APIC; 1242 1243 1244 /* 10: Local X2APIC NMI (ACPI 4.0) */ 1245 1246 typedef struct acpi_madt_local_x2apic_nmi 1247 { 1248 ACPI_SUBTABLE_HEADER Header; 1249 UINT16 IntiFlags; 1250 UINT32 Uid; /* ACPI processor UID */ 1251 UINT8 Lint; /* LINTn to which NMI is connected */ 1252 UINT8 Reserved[3]; /* Reserved - must be zero */ 1253 1254 } ACPI_MADT_LOCAL_X2APIC_NMI; 1255 1256 1257 /* 11: Generic Interrupt (ACPI 5.0 + ACPI 6.0 changes) */ 1258 1259 typedef struct acpi_madt_generic_interrupt 1260 { 1261 ACPI_SUBTABLE_HEADER Header; 1262 UINT16 Reserved; /* Reserved - must be zero */ 1263 UINT32 CpuInterfaceNumber; 1264 UINT32 Uid; 1265 UINT32 Flags; 1266 UINT32 ParkingVersion; 1267 UINT32 PerformanceInterrupt; 1268 UINT64 ParkedAddress; 1269 UINT64 BaseAddress; 1270 UINT64 GicvBaseAddress; 1271 UINT64 GichBaseAddress; 1272 UINT32 VgicInterrupt; 1273 UINT64 GicrBaseAddress; 1274 UINT64 ArmMpidr; 1275 UINT8 EfficiencyClass; 1276 UINT8 Reserved2[3]; 1277 1278 } ACPI_MADT_GENERIC_INTERRUPT; 1279 1280 /* Masks for Flags field above */ 1281 1282 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 1283 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 1284 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 1285 1286 1287 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 1288 1289 typedef struct acpi_madt_generic_distributor 1290 { 1291 ACPI_SUBTABLE_HEADER Header; 1292 UINT16 Reserved; /* Reserved - must be zero */ 1293 UINT32 GicId; 1294 UINT64 BaseAddress; 1295 UINT32 GlobalIrqBase; 1296 UINT8 Version; 1297 UINT8 Reserved2[3]; /* Reserved - must be zero */ 1298 1299 } ACPI_MADT_GENERIC_DISTRIBUTOR; 1300 1301 /* Values for Version field above */ 1302 1303 enum AcpiMadtGicVersion 1304 { 1305 ACPI_MADT_GIC_VERSION_NONE = 0, 1306 ACPI_MADT_GIC_VERSION_V1 = 1, 1307 ACPI_MADT_GIC_VERSION_V2 = 2, 1308 ACPI_MADT_GIC_VERSION_V3 = 3, 1309 ACPI_MADT_GIC_VERSION_V4 = 4, 1310 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1311 }; 1312 1313 1314 /* 13: Generic MSI Frame (ACPI 5.1) */ 1315 1316 typedef struct acpi_madt_generic_msi_frame 1317 { 1318 ACPI_SUBTABLE_HEADER Header; 1319 UINT16 Reserved; /* Reserved - must be zero */ 1320 UINT32 MsiFrameId; 1321 UINT64 BaseAddress; 1322 UINT32 Flags; 1323 UINT16 SpiCount; 1324 UINT16 SpiBase; 1325 1326 } ACPI_MADT_GENERIC_MSI_FRAME; 1327 1328 /* Masks for Flags field above */ 1329 1330 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1331 1332 1333 /* 14: Generic Redistributor (ACPI 5.1) */ 1334 1335 typedef struct acpi_madt_generic_redistributor 1336 { 1337 ACPI_SUBTABLE_HEADER Header; 1338 UINT16 Reserved; /* reserved - must be zero */ 1339 UINT64 BaseAddress; 1340 UINT32 Length; 1341 1342 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1343 1344 1345 /* 15: Generic Translator (ACPI 6.0) */ 1346 1347 typedef struct acpi_madt_generic_translator 1348 { 1349 ACPI_SUBTABLE_HEADER Header; 1350 UINT16 Reserved; /* reserved - must be zero */ 1351 UINT32 TranslationId; 1352 UINT64 BaseAddress; 1353 UINT32 Reserved2; 1354 1355 } ACPI_MADT_GENERIC_TRANSLATOR; 1356 1357 1358 /* 1359 * Common flags fields for MADT subtables 1360 */ 1361 1362 /* MADT Local APIC flags */ 1363 1364 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1365 1366 /* MADT MPS INTI flags (IntiFlags) */ 1367 1368 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1369 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1370 1371 /* Values for MPS INTI flags */ 1372 1373 #define ACPI_MADT_POLARITY_CONFORMS 0 1374 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1375 #define ACPI_MADT_POLARITY_RESERVED 2 1376 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1377 1378 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1379 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1380 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1381 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1382 1383 1384 /******************************************************************************* 1385 * 1386 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1387 * Version 1 1388 * 1389 ******************************************************************************/ 1390 1391 typedef struct acpi_table_msct 1392 { 1393 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1394 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1395 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1396 UINT32 MaxClockDomains; /* Max number of clock domains */ 1397 UINT64 MaxAddress; /* Max physical address in system */ 1398 1399 } ACPI_TABLE_MSCT; 1400 1401 1402 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1403 1404 typedef struct acpi_msct_proximity 1405 { 1406 UINT8 Revision; 1407 UINT8 Length; 1408 UINT32 RangeStart; /* Start of domain range */ 1409 UINT32 RangeEnd; /* End of domain range */ 1410 UINT32 ProcessorCapacity; 1411 UINT64 MemoryCapacity; /* In bytes */ 1412 1413 } ACPI_MSCT_PROXIMITY; 1414 1415 1416 /******************************************************************************* 1417 * 1418 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1419 * Version 1 1420 * 1421 ******************************************************************************/ 1422 1423 typedef struct acpi_table_nfit 1424 { 1425 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1426 UINT32 Reserved; /* Reserved, must be zero */ 1427 1428 } ACPI_TABLE_NFIT; 1429 1430 /* Subtable header for NFIT */ 1431 1432 typedef struct acpi_nfit_header 1433 { 1434 UINT16 Type; 1435 UINT16 Length; 1436 1437 } ACPI_NFIT_HEADER; 1438 1439 1440 /* Values for subtable type in ACPI_NFIT_HEADER */ 1441 1442 enum AcpiNfitType 1443 { 1444 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1445 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1446 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1447 ACPI_NFIT_TYPE_SMBIOS = 3, 1448 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1449 ACPI_NFIT_TYPE_DATA_REGION = 5, 1450 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1451 ACPI_NFIT_TYPE_RESERVED = 7 /* 7 and greater are reserved */ 1452 }; 1453 1454 /* 1455 * NFIT Subtables 1456 */ 1457 1458 /* 0: System Physical Address Range Structure */ 1459 1460 typedef struct acpi_nfit_system_address 1461 { 1462 ACPI_NFIT_HEADER Header; 1463 UINT16 RangeIndex; 1464 UINT16 Flags; 1465 UINT32 Reserved; /* Reseved, must be zero */ 1466 UINT32 ProximityDomain; 1467 UINT8 RangeGuid[16]; 1468 UINT64 Address; 1469 UINT64 Length; 1470 UINT64 MemoryMapping; 1471 1472 } ACPI_NFIT_SYSTEM_ADDRESS; 1473 1474 /* Flags */ 1475 1476 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1477 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1478 1479 /* Range Type GUIDs appear in the include/acuuid.h file */ 1480 1481 1482 /* 1: Memory Device to System Address Range Map Structure */ 1483 1484 typedef struct acpi_nfit_memory_map 1485 { 1486 ACPI_NFIT_HEADER Header; 1487 UINT32 DeviceHandle; 1488 UINT16 PhysicalId; 1489 UINT16 RegionId; 1490 UINT16 RangeIndex; 1491 UINT16 RegionIndex; 1492 UINT64 RegionSize; 1493 UINT64 RegionOffset; 1494 UINT64 Address; 1495 UINT16 InterleaveIndex; 1496 UINT16 InterleaveWays; 1497 UINT16 Flags; 1498 UINT16 Reserved; /* Reserved, must be zero */ 1499 1500 } ACPI_NFIT_MEMORY_MAP; 1501 1502 /* Flags */ 1503 1504 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1505 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1506 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1507 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1508 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1509 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1510 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1511 1512 1513 /* 2: Interleave Structure */ 1514 1515 typedef struct acpi_nfit_interleave 1516 { 1517 ACPI_NFIT_HEADER Header; 1518 UINT16 InterleaveIndex; 1519 UINT16 Reserved; /* Reserved, must be zero */ 1520 UINT32 LineCount; 1521 UINT32 LineSize; 1522 UINT32 LineOffset[1]; /* Variable length */ 1523 1524 } ACPI_NFIT_INTERLEAVE; 1525 1526 1527 /* 3: SMBIOS Management Information Structure */ 1528 1529 typedef struct acpi_nfit_smbios 1530 { 1531 ACPI_NFIT_HEADER Header; 1532 UINT32 Reserved; /* Reserved, must be zero */ 1533 UINT8 Data[1]; /* Variable length */ 1534 1535 } ACPI_NFIT_SMBIOS; 1536 1537 1538 /* 4: NVDIMM Control Region Structure */ 1539 1540 typedef struct acpi_nfit_control_region 1541 { 1542 ACPI_NFIT_HEADER Header; 1543 UINT16 RegionIndex; 1544 UINT16 VendorId; 1545 UINT16 DeviceId; 1546 UINT16 RevisionId; 1547 UINT16 SubsystemVendorId; 1548 UINT16 SubsystemDeviceId; 1549 UINT16 SubsystemRevisionId; 1550 UINT8 ValidFields; 1551 UINT8 ManufacturingLocation; 1552 UINT16 ManufacturingDate; 1553 UINT8 Reserved[2]; /* Reserved, must be zero */ 1554 UINT32 SerialNumber; 1555 UINT16 Code; 1556 UINT16 Windows; 1557 UINT64 WindowSize; 1558 UINT64 CommandOffset; 1559 UINT64 CommandSize; 1560 UINT64 StatusOffset; 1561 UINT64 StatusSize; 1562 UINT16 Flags; 1563 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1564 1565 } ACPI_NFIT_CONTROL_REGION; 1566 1567 /* Flags */ 1568 1569 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1570 1571 /* ValidFields bits */ 1572 1573 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1574 1575 1576 /* 5: NVDIMM Block Data Window Region Structure */ 1577 1578 typedef struct acpi_nfit_data_region 1579 { 1580 ACPI_NFIT_HEADER Header; 1581 UINT16 RegionIndex; 1582 UINT16 Windows; 1583 UINT64 Offset; 1584 UINT64 Size; 1585 UINT64 Capacity; 1586 UINT64 StartAddress; 1587 1588 } ACPI_NFIT_DATA_REGION; 1589 1590 1591 /* 6: Flush Hint Address Structure */ 1592 1593 typedef struct acpi_nfit_flush_address 1594 { 1595 ACPI_NFIT_HEADER Header; 1596 UINT32 DeviceHandle; 1597 UINT16 HintCount; 1598 UINT8 Reserved[6]; /* Reserved, must be zero */ 1599 UINT64 HintAddress[1]; /* Variable length */ 1600 1601 } ACPI_NFIT_FLUSH_ADDRESS; 1602 1603 1604 /******************************************************************************* 1605 * 1606 * PDTT - Processor Debug Trigger Table (ACPI 6.2) 1607 * Version 0 1608 * 1609 ******************************************************************************/ 1610 1611 typedef struct acpi_table_pdtt 1612 { 1613 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1614 UINT8 TriggerCount; 1615 UINT8 Reserved[3]; 1616 UINT32 ArrayOffset; 1617 1618 } ACPI_TABLE_PDTT; 1619 1620 1621 /* 1622 * PDTT Communication Channel Identifier Structure. 1623 * The number of these structures is defined by TriggerCount above, 1624 * starting at ArrayOffset. 1625 */ 1626 typedef struct acpi_pdtt_channel 1627 { 1628 UINT16 SubChannelId; 1629 1630 } ACPI_PDTT_CHANNEL; 1631 1632 1633 /* Mask and Flags for above */ 1634 1635 #define ACPI_PDTT_SUBCHANNEL_ID_MASK 0x00FF 1636 #define ACPI_PDTT_RUNTIME_TRIGGER (1<<8) 1637 #define ACPI_PPTT_WAIT_COMPLETION (1<<9) 1638 1639 1640 /******************************************************************************* 1641 * 1642 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1643 * Version 1 1644 * 1645 ******************************************************************************/ 1646 1647 typedef struct acpi_table_pptt 1648 { 1649 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1650 1651 } ACPI_TABLE_PPTT; 1652 1653 /* Values for Type field above */ 1654 1655 enum AcpiPpttType 1656 { 1657 ACPI_PPTT_TYPE_PROCESSOR = 0, 1658 ACPI_PPTT_TYPE_CACHE = 1, 1659 ACPI_PPTT_TYPE_ID = 2, 1660 ACPI_PPTT_TYPE_RESERVED = 3 1661 }; 1662 1663 1664 /* 0: Processor Hierarchy Node Structure */ 1665 1666 typedef struct acpi_pptt_processor 1667 { 1668 ACPI_SUBTABLE_HEADER Header; 1669 UINT16 Reserved; 1670 UINT32 Flags; 1671 UINT32 Parent; 1672 UINT32 AcpiProcessorId; 1673 UINT32 NumberOfPrivResources; 1674 1675 } ACPI_PPTT_PROCESSOR; 1676 1677 /* Flags */ 1678 1679 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) /* Physical package */ 1680 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (2) /* ACPI Processor ID valid */ 1681 1682 1683 /* 1: Cache Type Structure */ 1684 1685 typedef struct acpi_pptt_cache 1686 { 1687 ACPI_SUBTABLE_HEADER Header; 1688 UINT16 Reserved; 1689 UINT32 Flags; 1690 UINT32 NextLevelOfCache; 1691 UINT32 Size; 1692 UINT32 NumberOfSets; 1693 UINT8 Associativity; 1694 UINT8 Attributes; 1695 UINT16 LineSize; 1696 1697 } ACPI_PPTT_CACHE; 1698 1699 /* Flags */ 1700 1701 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1702 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1703 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1704 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1705 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1706 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1707 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1708 1709 /* Masks for Attributes */ 1710 1711 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1712 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1713 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1714 1715 1716 /* 2: ID Structure */ 1717 1718 typedef struct acpi_pptt_id 1719 { 1720 ACPI_SUBTABLE_HEADER Header; 1721 UINT16 Reserved; 1722 UINT32 VendorId; 1723 UINT64 Level1Id; 1724 UINT64 Level2Id; 1725 UINT16 MajorRev; 1726 UINT16 MinorRev; 1727 UINT16 SpinRev; 1728 1729 } ACPI_PPTT_ID; 1730 1731 1732 /******************************************************************************* 1733 * 1734 * SBST - Smart Battery Specification Table 1735 * Version 1 1736 * 1737 ******************************************************************************/ 1738 1739 typedef struct acpi_table_sbst 1740 { 1741 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1742 UINT32 WarningLevel; 1743 UINT32 LowLevel; 1744 UINT32 CriticalLevel; 1745 1746 } ACPI_TABLE_SBST; 1747 1748 1749 /******************************************************************************* 1750 * 1751 * SLIT - System Locality Distance Information Table 1752 * Version 1 1753 * 1754 ******************************************************************************/ 1755 1756 typedef struct acpi_table_slit 1757 { 1758 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1759 UINT64 LocalityCount; 1760 UINT8 Entry[1]; /* Real size = localities^2 */ 1761 1762 } ACPI_TABLE_SLIT; 1763 1764 1765 /******************************************************************************* 1766 * 1767 * SRAT - System Resource Affinity Table 1768 * Version 3 1769 * 1770 ******************************************************************************/ 1771 1772 typedef struct acpi_table_srat 1773 { 1774 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1775 UINT32 TableRevision; /* Must be value '1' */ 1776 UINT64 Reserved; /* Reserved, must be zero */ 1777 1778 } ACPI_TABLE_SRAT; 1779 1780 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1781 1782 enum AcpiSratType 1783 { 1784 ACPI_SRAT_TYPE_CPU_AFFINITY = 0, 1785 ACPI_SRAT_TYPE_MEMORY_AFFINITY = 1, 1786 ACPI_SRAT_TYPE_X2APIC_CPU_AFFINITY = 2, 1787 ACPI_SRAT_TYPE_GICC_AFFINITY = 3, 1788 ACPI_SRAT_TYPE_GIC_ITS_AFFINITY = 4, /* ACPI 6.2 */ 1789 ACPI_SRAT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1790 }; 1791 1792 /* 1793 * SRAT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1794 */ 1795 1796 /* 0: Processor Local APIC/SAPIC Affinity */ 1797 1798 typedef struct acpi_srat_cpu_affinity 1799 { 1800 ACPI_SUBTABLE_HEADER Header; 1801 UINT8 ProximityDomainLo; 1802 UINT8 ApicId; 1803 UINT32 Flags; 1804 UINT8 LocalSapicEid; 1805 UINT8 ProximityDomainHi[3]; 1806 UINT32 ClockDomain; 1807 1808 } ACPI_SRAT_CPU_AFFINITY; 1809 1810 /* Flags */ 1811 1812 #define ACPI_SRAT_CPU_USE_AFFINITY (1) /* 00: Use affinity structure */ 1813 1814 1815 /* 1: Memory Affinity */ 1816 1817 typedef struct acpi_srat_mem_affinity 1818 { 1819 ACPI_SUBTABLE_HEADER Header; 1820 UINT32 ProximityDomain; 1821 UINT16 Reserved; /* Reserved, must be zero */ 1822 UINT64 BaseAddress; 1823 UINT64 Length; 1824 UINT32 Reserved1; 1825 UINT32 Flags; 1826 UINT64 Reserved2; /* Reserved, must be zero */ 1827 1828 } ACPI_SRAT_MEM_AFFINITY; 1829 1830 /* Flags */ 1831 1832 #define ACPI_SRAT_MEM_ENABLED (1) /* 00: Use affinity structure */ 1833 #define ACPI_SRAT_MEM_HOT_PLUGGABLE (1<<1) /* 01: Memory region is hot pluggable */ 1834 #define ACPI_SRAT_MEM_NON_VOLATILE (1<<2) /* 02: Memory region is non-volatile */ 1835 1836 1837 /* 2: Processor Local X2_APIC Affinity (ACPI 4.0) */ 1838 1839 typedef struct acpi_srat_x2apic_cpu_affinity 1840 { 1841 ACPI_SUBTABLE_HEADER Header; 1842 UINT16 Reserved; /* Reserved, must be zero */ 1843 UINT32 ProximityDomain; 1844 UINT32 ApicId; 1845 UINT32 Flags; 1846 UINT32 ClockDomain; 1847 UINT32 Reserved2; 1848 1849 } ACPI_SRAT_X2APIC_CPU_AFFINITY; 1850 1851 /* Flags for ACPI_SRAT_CPU_AFFINITY and ACPI_SRAT_X2APIC_CPU_AFFINITY */ 1852 1853 #define ACPI_SRAT_CPU_ENABLED (1) /* 00: Use affinity structure */ 1854 1855 1856 /* 3: GICC Affinity (ACPI 5.1) */ 1857 1858 typedef struct acpi_srat_gicc_affinity 1859 { 1860 ACPI_SUBTABLE_HEADER Header; 1861 UINT32 ProximityDomain; 1862 UINT32 AcpiProcessorUid; 1863 UINT32 Flags; 1864 UINT32 ClockDomain; 1865 1866 } ACPI_SRAT_GICC_AFFINITY; 1867 1868 /* Flags for ACPI_SRAT_GICC_AFFINITY */ 1869 1870 #define ACPI_SRAT_GICC_ENABLED (1) /* 00: Use affinity structure */ 1871 1872 1873 /* 4: GCC ITS Affinity (ACPI 6.2) */ 1874 1875 typedef struct acpi_srat_gic_its_affinity 1876 { 1877 ACPI_SUBTABLE_HEADER Header; 1878 UINT32 ProximityDomain; 1879 UINT16 Reserved; 1880 UINT32 ItsId; 1881 1882 } ACPI_SRAT_GIC_ITS_AFFINITY; 1883 1884 1885 /* Reset to default packing */ 1886 1887 #pragma pack() 1888 1889 #endif /* __ACTBL1_H__ */ 1890