1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2020, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 180 #define ACPI_SIG_MTMR "MTMR" /* MID Timer table */ 181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 182 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 183 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 184 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 185 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 186 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 187 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 188 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 189 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 190 191 192 /* 193 * All tables must be byte-packed to match the ACPI specification, since 194 * the tables are provided by the system BIOS. 195 */ 196 #pragma pack(1) 197 198 /* 199 * Note: C bitfields are not used for this reason: 200 * 201 * "Bitfields are great and easy to read, but unfortunately the C language 202 * does not specify the layout of bitfields in memory, which means they are 203 * essentially useless for dealing with packed data in on-disk formats or 204 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 205 * this decision was a design error in C. Ritchie could have picked an order 206 * and stuck with it." Norman Ramsey. 207 * See http://stackoverflow.com/a/1053662/41661 208 */ 209 210 211 /******************************************************************************* 212 * 213 * IORT - IO Remapping Table 214 * 215 * Conforms to "IO Remapping Table System Software on ARM Platforms", 216 * Document number: ARM DEN 0049D, March 2018 217 * 218 ******************************************************************************/ 219 220 typedef struct acpi_table_iort 221 { 222 ACPI_TABLE_HEADER Header; 223 UINT32 NodeCount; 224 UINT32 NodeOffset; 225 UINT32 Reserved; 226 227 } ACPI_TABLE_IORT; 228 229 230 /* 231 * IORT subtables 232 */ 233 typedef struct acpi_iort_node 234 { 235 UINT8 Type; 236 UINT16 Length; 237 UINT8 Revision; 238 UINT32 Reserved; 239 UINT32 MappingCount; 240 UINT32 MappingOffset; 241 char NodeData[1]; 242 243 } ACPI_IORT_NODE; 244 245 /* Values for subtable Type above */ 246 247 enum AcpiIortNodeType 248 { 249 ACPI_IORT_NODE_ITS_GROUP = 0x00, 250 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 251 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 252 ACPI_IORT_NODE_SMMU = 0x03, 253 ACPI_IORT_NODE_SMMU_V3 = 0x04, 254 ACPI_IORT_NODE_PMCG = 0x05 255 }; 256 257 258 typedef struct acpi_iort_id_mapping 259 { 260 UINT32 InputBase; /* Lowest value in input range */ 261 UINT32 IdCount; /* Number of IDs */ 262 UINT32 OutputBase; /* Lowest value in output range */ 263 UINT32 OutputReference; /* A reference to the output node */ 264 UINT32 Flags; 265 266 } ACPI_IORT_ID_MAPPING; 267 268 /* Masks for Flags field above for IORT subtable */ 269 270 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 271 272 273 typedef struct acpi_iort_memory_access 274 { 275 UINT32 CacheCoherency; 276 UINT8 Hints; 277 UINT16 Reserved; 278 UINT8 MemoryFlags; 279 280 } ACPI_IORT_MEMORY_ACCESS; 281 282 /* Values for CacheCoherency field above */ 283 284 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 285 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 286 287 /* Masks for Hints field above */ 288 289 #define ACPI_IORT_HT_TRANSIENT (1) 290 #define ACPI_IORT_HT_WRITE (1<<1) 291 #define ACPI_IORT_HT_READ (1<<2) 292 #define ACPI_IORT_HT_OVERRIDE (1<<3) 293 294 /* Masks for MemoryFlags field above */ 295 296 #define ACPI_IORT_MF_COHERENCY (1) 297 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 298 299 300 /* 301 * IORT node specific subtables 302 */ 303 typedef struct acpi_iort_its_group 304 { 305 UINT32 ItsCount; 306 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 307 308 } ACPI_IORT_ITS_GROUP; 309 310 311 typedef struct acpi_iort_named_component 312 { 313 UINT32 NodeFlags; 314 UINT64 MemoryProperties; /* Memory access properties */ 315 UINT8 MemoryAddressLimit; /* Memory address size limit */ 316 char DeviceName[1]; /* Path of namespace object */ 317 318 } ACPI_IORT_NAMED_COMPONENT; 319 320 /* Masks for Flags field above */ 321 322 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 323 #define ACPI_IORT_NC_PASID_BITS (31<<1) 324 325 typedef struct acpi_iort_root_complex 326 { 327 UINT64 MemoryProperties; /* Memory access properties */ 328 UINT32 AtsAttribute; 329 UINT32 PciSegmentNumber; 330 UINT8 MemoryAddressLimit; /* Memory address size limit */ 331 UINT8 Reserved[3]; /* Reserved, must be zero */ 332 333 } ACPI_IORT_ROOT_COMPLEX; 334 335 /* Values for AtsAttribute field above */ 336 337 #define ACPI_IORT_ATS_SUPPORTED 0x00000001 /* The root complex supports ATS */ 338 #define ACPI_IORT_ATS_UNSUPPORTED 0x00000000 /* The root complex doesn't support ATS */ 339 340 341 typedef struct acpi_iort_smmu 342 { 343 UINT64 BaseAddress; /* SMMU base address */ 344 UINT64 Span; /* Length of memory range */ 345 UINT32 Model; 346 UINT32 Flags; 347 UINT32 GlobalInterruptOffset; 348 UINT32 ContextInterruptCount; 349 UINT32 ContextInterruptOffset; 350 UINT32 PmuInterruptCount; 351 UINT32 PmuInterruptOffset; 352 UINT64 Interrupts[1]; /* Interrupt array */ 353 354 } ACPI_IORT_SMMU; 355 356 /* Values for Model field above */ 357 358 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 359 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 360 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 361 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 362 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 363 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 364 365 /* Masks for Flags field above */ 366 367 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 368 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 369 370 /* Global interrupt format */ 371 372 typedef struct acpi_iort_smmu_gsi 373 { 374 UINT32 NSgIrpt; 375 UINT32 NSgIrptFlags; 376 UINT32 NSgCfgIrpt; 377 UINT32 NSgCfgIrptFlags; 378 379 } ACPI_IORT_SMMU_GSI; 380 381 382 typedef struct acpi_iort_smmu_v3 383 { 384 UINT64 BaseAddress; /* SMMUv3 base address */ 385 UINT32 Flags; 386 UINT32 Reserved; 387 UINT64 VatosAddress; 388 UINT32 Model; 389 UINT32 EventGsiv; 390 UINT32 PriGsiv; 391 UINT32 GerrGsiv; 392 UINT32 SyncGsiv; 393 UINT32 Pxm; 394 UINT32 IdMappingIndex; 395 396 } ACPI_IORT_SMMU_V3; 397 398 /* Values for Model field above */ 399 400 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 401 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 402 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 403 404 /* Masks for Flags field above */ 405 406 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 407 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 408 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 409 410 typedef struct acpi_iort_pmcg 411 { 412 UINT64 Page0BaseAddress; 413 UINT32 OverflowGsiv; 414 UINT32 NodeReference; 415 UINT64 Page1BaseAddress; 416 417 } ACPI_IORT_PMCG; 418 419 420 /******************************************************************************* 421 * 422 * IVRS - I/O Virtualization Reporting Structure 423 * Version 1 424 * 425 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 426 * Revision 1.26, February 2009. 427 * 428 ******************************************************************************/ 429 430 typedef struct acpi_table_ivrs 431 { 432 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 433 UINT32 Info; /* Common virtualization info */ 434 UINT64 Reserved; 435 436 } ACPI_TABLE_IVRS; 437 438 /* Values for Info field above */ 439 440 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 441 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 442 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 443 444 445 /* IVRS subtable header */ 446 447 typedef struct acpi_ivrs_header 448 { 449 UINT8 Type; /* Subtable type */ 450 UINT8 Flags; 451 UINT16 Length; /* Subtable length */ 452 UINT16 DeviceId; /* ID of IOMMU */ 453 454 } ACPI_IVRS_HEADER; 455 456 /* Values for subtable Type above */ 457 458 enum AcpiIvrsType 459 { 460 ACPI_IVRS_TYPE_HARDWARE = 0x10, 461 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 462 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 463 ACPI_IVRS_TYPE_MEMORY3 = 0x22 464 }; 465 466 /* Masks for Flags field above for IVHD subtable */ 467 468 #define ACPI_IVHD_TT_ENABLE (1) 469 #define ACPI_IVHD_PASS_PW (1<<1) 470 #define ACPI_IVHD_RES_PASS_PW (1<<2) 471 #define ACPI_IVHD_ISOC (1<<3) 472 #define ACPI_IVHD_IOTLB (1<<4) 473 474 /* Masks for Flags field above for IVMD subtable */ 475 476 #define ACPI_IVMD_UNITY (1) 477 #define ACPI_IVMD_READ (1<<1) 478 #define ACPI_IVMD_WRITE (1<<2) 479 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 480 481 482 /* 483 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 484 */ 485 486 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 487 488 typedef struct acpi_ivrs_hardware 489 { 490 ACPI_IVRS_HEADER Header; 491 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 492 UINT64 BaseAddress; /* IOMMU control registers */ 493 UINT16 PciSegmentGroup; 494 UINT16 Info; /* MSI number and unit ID */ 495 UINT32 Reserved; 496 497 } ACPI_IVRS_HARDWARE; 498 499 /* Masks for Info field above */ 500 501 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 502 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 503 504 505 /* 506 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 507 * Upper two bits of the Type field are the (encoded) length of the structure. 508 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 509 * are reserved for future use but not defined. 510 */ 511 typedef struct acpi_ivrs_de_header 512 { 513 UINT8 Type; 514 UINT16 Id; 515 UINT8 DataSetting; 516 517 } ACPI_IVRS_DE_HEADER; 518 519 /* Length of device entry is in the top two bits of Type field above */ 520 521 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 522 523 /* Values for device entry Type field above */ 524 525 enum AcpiIvrsDeviceEntryType 526 { 527 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 528 529 ACPI_IVRS_TYPE_PAD4 = 0, 530 ACPI_IVRS_TYPE_ALL = 1, 531 ACPI_IVRS_TYPE_SELECT = 2, 532 ACPI_IVRS_TYPE_START = 3, 533 ACPI_IVRS_TYPE_END = 4, 534 535 /* 8-byte device entries */ 536 537 ACPI_IVRS_TYPE_PAD8 = 64, 538 ACPI_IVRS_TYPE_NOT_USED = 65, 539 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 540 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 541 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 542 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 543 ACPI_IVRS_TYPE_SPECIAL = 72 /* Uses ACPI_IVRS_DEVICE8C */ 544 }; 545 546 /* Values for Data field above */ 547 548 #define ACPI_IVHD_INIT_PASS (1) 549 #define ACPI_IVHD_EINT_PASS (1<<1) 550 #define ACPI_IVHD_NMI_PASS (1<<2) 551 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 552 #define ACPI_IVHD_LINT0_PASS (1<<6) 553 #define ACPI_IVHD_LINT1_PASS (1<<7) 554 555 556 /* Types 0-4: 4-byte device entry */ 557 558 typedef struct acpi_ivrs_device4 559 { 560 ACPI_IVRS_DE_HEADER Header; 561 562 } ACPI_IVRS_DEVICE4; 563 564 /* Types 66-67: 8-byte device entry */ 565 566 typedef struct acpi_ivrs_device8a 567 { 568 ACPI_IVRS_DE_HEADER Header; 569 UINT8 Reserved1; 570 UINT16 UsedId; 571 UINT8 Reserved2; 572 573 } ACPI_IVRS_DEVICE8A; 574 575 /* Types 70-71: 8-byte device entry */ 576 577 typedef struct acpi_ivrs_device8b 578 { 579 ACPI_IVRS_DE_HEADER Header; 580 UINT32 ExtendedData; 581 582 } ACPI_IVRS_DEVICE8B; 583 584 /* Values for ExtendedData above */ 585 586 #define ACPI_IVHD_ATS_DISABLED (1<<31) 587 588 /* Type 72: 8-byte device entry */ 589 590 typedef struct acpi_ivrs_device8c 591 { 592 ACPI_IVRS_DE_HEADER Header; 593 UINT8 Handle; 594 UINT16 UsedId; 595 UINT8 Variety; 596 597 } ACPI_IVRS_DEVICE8C; 598 599 /* Values for Variety field above */ 600 601 #define ACPI_IVHD_IOAPIC 1 602 #define ACPI_IVHD_HPET 2 603 604 605 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 606 607 typedef struct acpi_ivrs_memory 608 { 609 ACPI_IVRS_HEADER Header; 610 UINT16 AuxData; 611 UINT64 Reserved; 612 UINT64 StartAddress; 613 UINT64 MemoryLength; 614 615 } ACPI_IVRS_MEMORY; 616 617 618 /******************************************************************************* 619 * 620 * LPIT - Low Power Idle Table 621 * 622 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 623 * 624 ******************************************************************************/ 625 626 typedef struct acpi_table_lpit 627 { 628 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 629 630 } ACPI_TABLE_LPIT; 631 632 633 /* LPIT subtable header */ 634 635 typedef struct acpi_lpit_header 636 { 637 UINT32 Type; /* Subtable type */ 638 UINT32 Length; /* Subtable length */ 639 UINT16 UniqueId; 640 UINT16 Reserved; 641 UINT32 Flags; 642 643 } ACPI_LPIT_HEADER; 644 645 /* Values for subtable Type above */ 646 647 enum AcpiLpitType 648 { 649 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 650 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 651 }; 652 653 /* Masks for Flags field above */ 654 655 #define ACPI_LPIT_STATE_DISABLED (1) 656 #define ACPI_LPIT_NO_COUNTER (1<<1) 657 658 /* 659 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 660 */ 661 662 /* 0x00: Native C-state instruction based LPI structure */ 663 664 typedef struct acpi_lpit_native 665 { 666 ACPI_LPIT_HEADER Header; 667 ACPI_GENERIC_ADDRESS EntryTrigger; 668 UINT32 Residency; 669 UINT32 Latency; 670 ACPI_GENERIC_ADDRESS ResidencyCounter; 671 UINT64 CounterFrequency; 672 673 } ACPI_LPIT_NATIVE; 674 675 676 /******************************************************************************* 677 * 678 * MADT - Multiple APIC Description Table 679 * Version 3 680 * 681 ******************************************************************************/ 682 683 typedef struct acpi_table_madt 684 { 685 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 686 UINT32 Address; /* Physical address of local APIC */ 687 UINT32 Flags; 688 689 } ACPI_TABLE_MADT; 690 691 /* Masks for Flags field above */ 692 693 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 694 695 /* Values for PCATCompat flag */ 696 697 #define ACPI_MADT_DUAL_PIC 1 698 #define ACPI_MADT_MULTIPLE_APIC 0 699 700 701 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 702 703 enum AcpiMadtType 704 { 705 ACPI_MADT_TYPE_LOCAL_APIC = 0, 706 ACPI_MADT_TYPE_IO_APIC = 1, 707 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 708 ACPI_MADT_TYPE_NMI_SOURCE = 3, 709 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 710 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 711 ACPI_MADT_TYPE_IO_SAPIC = 6, 712 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 713 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 714 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 715 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 716 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 717 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 718 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 719 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 720 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 721 ACPI_MADT_TYPE_RESERVED = 16 /* 16 and greater are reserved */ 722 }; 723 724 725 /* 726 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 727 */ 728 729 /* 0: Processor Local APIC */ 730 731 typedef struct acpi_madt_local_apic 732 { 733 ACPI_SUBTABLE_HEADER Header; 734 UINT8 ProcessorId; /* ACPI processor id */ 735 UINT8 Id; /* Processor's local APIC id */ 736 UINT32 LapicFlags; 737 738 } ACPI_MADT_LOCAL_APIC; 739 740 741 /* 1: IO APIC */ 742 743 typedef struct acpi_madt_io_apic 744 { 745 ACPI_SUBTABLE_HEADER Header; 746 UINT8 Id; /* I/O APIC ID */ 747 UINT8 Reserved; /* Reserved - must be zero */ 748 UINT32 Address; /* APIC physical address */ 749 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 750 751 } ACPI_MADT_IO_APIC; 752 753 754 /* 2: Interrupt Override */ 755 756 typedef struct acpi_madt_interrupt_override 757 { 758 ACPI_SUBTABLE_HEADER Header; 759 UINT8 Bus; /* 0 - ISA */ 760 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 761 UINT32 GlobalIrq; /* Global system interrupt */ 762 UINT16 IntiFlags; 763 764 } ACPI_MADT_INTERRUPT_OVERRIDE; 765 766 767 /* 3: NMI Source */ 768 769 typedef struct acpi_madt_nmi_source 770 { 771 ACPI_SUBTABLE_HEADER Header; 772 UINT16 IntiFlags; 773 UINT32 GlobalIrq; /* Global system interrupt */ 774 775 } ACPI_MADT_NMI_SOURCE; 776 777 778 /* 4: Local APIC NMI */ 779 780 typedef struct acpi_madt_local_apic_nmi 781 { 782 ACPI_SUBTABLE_HEADER Header; 783 UINT8 ProcessorId; /* ACPI processor id */ 784 UINT16 IntiFlags; 785 UINT8 Lint; /* LINTn to which NMI is connected */ 786 787 } ACPI_MADT_LOCAL_APIC_NMI; 788 789 790 /* 5: Address Override */ 791 792 typedef struct acpi_madt_local_apic_override 793 { 794 ACPI_SUBTABLE_HEADER Header; 795 UINT16 Reserved; /* Reserved, must be zero */ 796 UINT64 Address; /* APIC physical address */ 797 798 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 799 800 801 /* 6: I/O Sapic */ 802 803 typedef struct acpi_madt_io_sapic 804 { 805 ACPI_SUBTABLE_HEADER Header; 806 UINT8 Id; /* I/O SAPIC ID */ 807 UINT8 Reserved; /* Reserved, must be zero */ 808 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 809 UINT64 Address; /* SAPIC physical address */ 810 811 } ACPI_MADT_IO_SAPIC; 812 813 814 /* 7: Local Sapic */ 815 816 typedef struct acpi_madt_local_sapic 817 { 818 ACPI_SUBTABLE_HEADER Header; 819 UINT8 ProcessorId; /* ACPI processor id */ 820 UINT8 Id; /* SAPIC ID */ 821 UINT8 Eid; /* SAPIC EID */ 822 UINT8 Reserved[3]; /* Reserved, must be zero */ 823 UINT32 LapicFlags; 824 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 825 char UidString[1]; /* String UID - ACPI 3.0 */ 826 827 } ACPI_MADT_LOCAL_SAPIC; 828 829 830 /* 8: Platform Interrupt Source */ 831 832 typedef struct acpi_madt_interrupt_source 833 { 834 ACPI_SUBTABLE_HEADER Header; 835 UINT16 IntiFlags; 836 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 837 UINT8 Id; /* Processor ID */ 838 UINT8 Eid; /* Processor EID */ 839 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 840 UINT32 GlobalIrq; /* Global system interrupt */ 841 UINT32 Flags; /* Interrupt Source Flags */ 842 843 } ACPI_MADT_INTERRUPT_SOURCE; 844 845 /* Masks for Flags field above */ 846 847 #define ACPI_MADT_CPEI_OVERRIDE (1) 848 849 850 /* 9: Processor Local X2APIC (ACPI 4.0) */ 851 852 typedef struct acpi_madt_local_x2apic 853 { 854 ACPI_SUBTABLE_HEADER Header; 855 UINT16 Reserved; /* Reserved - must be zero */ 856 UINT32 LocalApicId; /* Processor x2APIC ID */ 857 UINT32 LapicFlags; 858 UINT32 Uid; /* ACPI processor UID */ 859 860 } ACPI_MADT_LOCAL_X2APIC; 861 862 863 /* 10: Local X2APIC NMI (ACPI 4.0) */ 864 865 typedef struct acpi_madt_local_x2apic_nmi 866 { 867 ACPI_SUBTABLE_HEADER Header; 868 UINT16 IntiFlags; 869 UINT32 Uid; /* ACPI processor UID */ 870 UINT8 Lint; /* LINTn to which NMI is connected */ 871 UINT8 Reserved[3]; /* Reserved - must be zero */ 872 873 } ACPI_MADT_LOCAL_X2APIC_NMI; 874 875 876 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 877 878 typedef struct acpi_madt_generic_interrupt 879 { 880 ACPI_SUBTABLE_HEADER Header; 881 UINT16 Reserved; /* Reserved - must be zero */ 882 UINT32 CpuInterfaceNumber; 883 UINT32 Uid; 884 UINT32 Flags; 885 UINT32 ParkingVersion; 886 UINT32 PerformanceInterrupt; 887 UINT64 ParkedAddress; 888 UINT64 BaseAddress; 889 UINT64 GicvBaseAddress; 890 UINT64 GichBaseAddress; 891 UINT32 VgicInterrupt; 892 UINT64 GicrBaseAddress; 893 UINT64 ArmMpidr; 894 UINT8 EfficiencyClass; 895 UINT8 Reserved2[1]; 896 UINT16 SpeInterrupt; /* ACPI 6.3 */ 897 898 } ACPI_MADT_GENERIC_INTERRUPT; 899 900 /* Masks for Flags field above */ 901 902 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 903 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 904 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 905 906 907 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 908 909 typedef struct acpi_madt_generic_distributor 910 { 911 ACPI_SUBTABLE_HEADER Header; 912 UINT16 Reserved; /* Reserved - must be zero */ 913 UINT32 GicId; 914 UINT64 BaseAddress; 915 UINT32 GlobalIrqBase; 916 UINT8 Version; 917 UINT8 Reserved2[3]; /* Reserved - must be zero */ 918 919 } ACPI_MADT_GENERIC_DISTRIBUTOR; 920 921 /* Values for Version field above */ 922 923 enum AcpiMadtGicVersion 924 { 925 ACPI_MADT_GIC_VERSION_NONE = 0, 926 ACPI_MADT_GIC_VERSION_V1 = 1, 927 ACPI_MADT_GIC_VERSION_V2 = 2, 928 ACPI_MADT_GIC_VERSION_V3 = 3, 929 ACPI_MADT_GIC_VERSION_V4 = 4, 930 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 931 }; 932 933 934 /* 13: Generic MSI Frame (ACPI 5.1) */ 935 936 typedef struct acpi_madt_generic_msi_frame 937 { 938 ACPI_SUBTABLE_HEADER Header; 939 UINT16 Reserved; /* Reserved - must be zero */ 940 UINT32 MsiFrameId; 941 UINT64 BaseAddress; 942 UINT32 Flags; 943 UINT16 SpiCount; 944 UINT16 SpiBase; 945 946 } ACPI_MADT_GENERIC_MSI_FRAME; 947 948 /* Masks for Flags field above */ 949 950 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 951 952 953 /* 14: Generic Redistributor (ACPI 5.1) */ 954 955 typedef struct acpi_madt_generic_redistributor 956 { 957 ACPI_SUBTABLE_HEADER Header; 958 UINT16 Reserved; /* reserved - must be zero */ 959 UINT64 BaseAddress; 960 UINT32 Length; 961 962 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 963 964 965 /* 15: Generic Translator (ACPI 6.0) */ 966 967 typedef struct acpi_madt_generic_translator 968 { 969 ACPI_SUBTABLE_HEADER Header; 970 UINT16 Reserved; /* reserved - must be zero */ 971 UINT32 TranslationId; 972 UINT64 BaseAddress; 973 UINT32 Reserved2; 974 975 } ACPI_MADT_GENERIC_TRANSLATOR; 976 977 978 /* 979 * Common flags fields for MADT subtables 980 */ 981 982 /* MADT Local APIC flags */ 983 984 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 985 986 /* MADT MPS INTI flags (IntiFlags) */ 987 988 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 989 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 990 991 /* Values for MPS INTI flags */ 992 993 #define ACPI_MADT_POLARITY_CONFORMS 0 994 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 995 #define ACPI_MADT_POLARITY_RESERVED 2 996 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 997 998 #define ACPI_MADT_TRIGGER_CONFORMS (0) 999 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1000 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1001 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1002 1003 1004 /******************************************************************************* 1005 * 1006 * MCFG - PCI Memory Mapped Configuration table and subtable 1007 * Version 1 1008 * 1009 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1010 * 1011 ******************************************************************************/ 1012 1013 typedef struct acpi_table_mcfg 1014 { 1015 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1016 UINT8 Reserved[8]; 1017 1018 } ACPI_TABLE_MCFG; 1019 1020 1021 /* Subtable */ 1022 1023 typedef struct acpi_mcfg_allocation 1024 { 1025 UINT64 Address; /* Base address, processor-relative */ 1026 UINT16 PciSegment; /* PCI segment group number */ 1027 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1028 UINT8 EndBusNumber; /* Final PCI Bus number */ 1029 UINT32 Reserved; 1030 1031 } ACPI_MCFG_ALLOCATION; 1032 1033 1034 /******************************************************************************* 1035 * 1036 * MCHI - Management Controller Host Interface Table 1037 * Version 1 1038 * 1039 * Conforms to "Management Component Transport Protocol (MCTP) Host 1040 * Interface Specification", Revision 1.0.0a, October 13, 2009 1041 * 1042 ******************************************************************************/ 1043 1044 typedef struct acpi_table_mchi 1045 { 1046 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1047 UINT8 InterfaceType; 1048 UINT8 Protocol; 1049 UINT64 ProtocolData; 1050 UINT8 InterruptType; 1051 UINT8 Gpe; 1052 UINT8 PciDeviceFlag; 1053 UINT32 GlobalInterrupt; 1054 ACPI_GENERIC_ADDRESS ControlRegister; 1055 UINT8 PciSegment; 1056 UINT8 PciBus; 1057 UINT8 PciDevice; 1058 UINT8 PciFunction; 1059 1060 } ACPI_TABLE_MCHI; 1061 1062 1063 /******************************************************************************* 1064 * 1065 * MPST - Memory Power State Table (ACPI 5.0) 1066 * Version 1 1067 * 1068 ******************************************************************************/ 1069 1070 #define ACPI_MPST_CHANNEL_INFO \ 1071 UINT8 ChannelId; \ 1072 UINT8 Reserved1[3]; \ 1073 UINT16 PowerNodeCount; \ 1074 UINT16 Reserved2; 1075 1076 /* Main table */ 1077 1078 typedef struct acpi_table_mpst 1079 { 1080 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1081 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1082 1083 } ACPI_TABLE_MPST; 1084 1085 1086 /* Memory Platform Communication Channel Info */ 1087 1088 typedef struct acpi_mpst_channel 1089 { 1090 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1091 1092 } ACPI_MPST_CHANNEL; 1093 1094 1095 /* Memory Power Node Structure */ 1096 1097 typedef struct acpi_mpst_power_node 1098 { 1099 UINT8 Flags; 1100 UINT8 Reserved1; 1101 UINT16 NodeId; 1102 UINT32 Length; 1103 UINT64 RangeAddress; 1104 UINT64 RangeLength; 1105 UINT32 NumPowerStates; 1106 UINT32 NumPhysicalComponents; 1107 1108 } ACPI_MPST_POWER_NODE; 1109 1110 /* Values for Flags field above */ 1111 1112 #define ACPI_MPST_ENABLED 1 1113 #define ACPI_MPST_POWER_MANAGED 2 1114 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1115 1116 1117 /* Memory Power State Structure (follows POWER_NODE above) */ 1118 1119 typedef struct acpi_mpst_power_state 1120 { 1121 UINT8 PowerState; 1122 UINT8 InfoIndex; 1123 1124 } ACPI_MPST_POWER_STATE; 1125 1126 1127 /* Physical Component ID Structure (follows POWER_STATE above) */ 1128 1129 typedef struct acpi_mpst_component 1130 { 1131 UINT16 ComponentId; 1132 1133 } ACPI_MPST_COMPONENT; 1134 1135 1136 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1137 1138 typedef struct acpi_mpst_data_hdr 1139 { 1140 UINT16 CharacteristicsCount; 1141 UINT16 Reserved; 1142 1143 } ACPI_MPST_DATA_HDR; 1144 1145 typedef struct acpi_mpst_power_data 1146 { 1147 UINT8 StructureId; 1148 UINT8 Flags; 1149 UINT16 Reserved1; 1150 UINT32 AveragePower; 1151 UINT32 PowerSaving; 1152 UINT64 ExitLatency; 1153 UINT64 Reserved2; 1154 1155 } ACPI_MPST_POWER_DATA; 1156 1157 /* Values for Flags field above */ 1158 1159 #define ACPI_MPST_PRESERVE 1 1160 #define ACPI_MPST_AUTOENTRY 2 1161 #define ACPI_MPST_AUTOEXIT 4 1162 1163 1164 /* Shared Memory Region (not part of an ACPI table) */ 1165 1166 typedef struct acpi_mpst_shared 1167 { 1168 UINT32 Signature; 1169 UINT16 PccCommand; 1170 UINT16 PccStatus; 1171 UINT32 CommandRegister; 1172 UINT32 StatusRegister; 1173 UINT32 PowerStateId; 1174 UINT32 PowerNodeId; 1175 UINT64 EnergyConsumed; 1176 UINT64 AveragePower; 1177 1178 } ACPI_MPST_SHARED; 1179 1180 1181 /******************************************************************************* 1182 * 1183 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1184 * Version 1 1185 * 1186 ******************************************************************************/ 1187 1188 typedef struct acpi_table_msct 1189 { 1190 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1191 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1192 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1193 UINT32 MaxClockDomains; /* Max number of clock domains */ 1194 UINT64 MaxAddress; /* Max physical address in system */ 1195 1196 } ACPI_TABLE_MSCT; 1197 1198 1199 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1200 1201 typedef struct acpi_msct_proximity 1202 { 1203 UINT8 Revision; 1204 UINT8 Length; 1205 UINT32 RangeStart; /* Start of domain range */ 1206 UINT32 RangeEnd; /* End of domain range */ 1207 UINT32 ProcessorCapacity; 1208 UINT64 MemoryCapacity; /* In bytes */ 1209 1210 } ACPI_MSCT_PROXIMITY; 1211 1212 1213 /******************************************************************************* 1214 * 1215 * MSDM - Microsoft Data Management table 1216 * 1217 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1218 * November 29, 2011. Copyright 2011 Microsoft 1219 * 1220 ******************************************************************************/ 1221 1222 /* Basic MSDM table is only the common ACPI header */ 1223 1224 typedef struct acpi_table_msdm 1225 { 1226 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1227 1228 } ACPI_TABLE_MSDM; 1229 1230 1231 /******************************************************************************* 1232 * 1233 * MTMR - MID Timer Table 1234 * Version 1 1235 * 1236 * Conforms to "Simple Firmware Interface Specification", 1237 * Draft 0.8.2, Oct 19, 2010 1238 * NOTE: The ACPI MTMR is equivalent to the SFI MTMR table. 1239 * 1240 ******************************************************************************/ 1241 1242 typedef struct acpi_table_mtmr 1243 { 1244 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1245 1246 } ACPI_TABLE_MTMR; 1247 1248 /* MTMR entry */ 1249 1250 typedef struct acpi_mtmr_entry 1251 { 1252 ACPI_GENERIC_ADDRESS PhysicalAddress; 1253 UINT32 Frequency; 1254 UINT32 Irq; 1255 1256 } ACPI_MTMR_ENTRY; 1257 1258 1259 /******************************************************************************* 1260 * 1261 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1262 * Version 1 1263 * 1264 ******************************************************************************/ 1265 1266 typedef struct acpi_table_nfit 1267 { 1268 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1269 UINT32 Reserved; /* Reserved, must be zero */ 1270 1271 } ACPI_TABLE_NFIT; 1272 1273 /* Subtable header for NFIT */ 1274 1275 typedef struct acpi_nfit_header 1276 { 1277 UINT16 Type; 1278 UINT16 Length; 1279 1280 } ACPI_NFIT_HEADER; 1281 1282 1283 /* Values for subtable type in ACPI_NFIT_HEADER */ 1284 1285 enum AcpiNfitType 1286 { 1287 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1288 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1289 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1290 ACPI_NFIT_TYPE_SMBIOS = 3, 1291 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1292 ACPI_NFIT_TYPE_DATA_REGION = 5, 1293 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1294 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1295 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1296 }; 1297 1298 /* 1299 * NFIT Subtables 1300 */ 1301 1302 /* 0: System Physical Address Range Structure */ 1303 1304 typedef struct acpi_nfit_system_address 1305 { 1306 ACPI_NFIT_HEADER Header; 1307 UINT16 RangeIndex; 1308 UINT16 Flags; 1309 UINT32 Reserved; /* Reserved, must be zero */ 1310 UINT32 ProximityDomain; 1311 UINT8 RangeGuid[16]; 1312 UINT64 Address; 1313 UINT64 Length; 1314 UINT64 MemoryMapping; 1315 1316 } ACPI_NFIT_SYSTEM_ADDRESS; 1317 1318 /* Flags */ 1319 1320 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1321 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1322 1323 /* Range Type GUIDs appear in the include/acuuid.h file */ 1324 1325 1326 /* 1: Memory Device to System Address Range Map Structure */ 1327 1328 typedef struct acpi_nfit_memory_map 1329 { 1330 ACPI_NFIT_HEADER Header; 1331 UINT32 DeviceHandle; 1332 UINT16 PhysicalId; 1333 UINT16 RegionId; 1334 UINT16 RangeIndex; 1335 UINT16 RegionIndex; 1336 UINT64 RegionSize; 1337 UINT64 RegionOffset; 1338 UINT64 Address; 1339 UINT16 InterleaveIndex; 1340 UINT16 InterleaveWays; 1341 UINT16 Flags; 1342 UINT16 Reserved; /* Reserved, must be zero */ 1343 1344 } ACPI_NFIT_MEMORY_MAP; 1345 1346 /* Flags */ 1347 1348 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1349 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1350 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1351 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1352 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1353 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1354 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1355 1356 1357 /* 2: Interleave Structure */ 1358 1359 typedef struct acpi_nfit_interleave 1360 { 1361 ACPI_NFIT_HEADER Header; 1362 UINT16 InterleaveIndex; 1363 UINT16 Reserved; /* Reserved, must be zero */ 1364 UINT32 LineCount; 1365 UINT32 LineSize; 1366 UINT32 LineOffset[1]; /* Variable length */ 1367 1368 } ACPI_NFIT_INTERLEAVE; 1369 1370 1371 /* 3: SMBIOS Management Information Structure */ 1372 1373 typedef struct acpi_nfit_smbios 1374 { 1375 ACPI_NFIT_HEADER Header; 1376 UINT32 Reserved; /* Reserved, must be zero */ 1377 UINT8 Data[1]; /* Variable length */ 1378 1379 } ACPI_NFIT_SMBIOS; 1380 1381 1382 /* 4: NVDIMM Control Region Structure */ 1383 1384 typedef struct acpi_nfit_control_region 1385 { 1386 ACPI_NFIT_HEADER Header; 1387 UINT16 RegionIndex; 1388 UINT16 VendorId; 1389 UINT16 DeviceId; 1390 UINT16 RevisionId; 1391 UINT16 SubsystemVendorId; 1392 UINT16 SubsystemDeviceId; 1393 UINT16 SubsystemRevisionId; 1394 UINT8 ValidFields; 1395 UINT8 ManufacturingLocation; 1396 UINT16 ManufacturingDate; 1397 UINT8 Reserved[2]; /* Reserved, must be zero */ 1398 UINT32 SerialNumber; 1399 UINT16 Code; 1400 UINT16 Windows; 1401 UINT64 WindowSize; 1402 UINT64 CommandOffset; 1403 UINT64 CommandSize; 1404 UINT64 StatusOffset; 1405 UINT64 StatusSize; 1406 UINT16 Flags; 1407 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1408 1409 } ACPI_NFIT_CONTROL_REGION; 1410 1411 /* Flags */ 1412 1413 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1414 1415 /* ValidFields bits */ 1416 1417 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1418 1419 1420 /* 5: NVDIMM Block Data Window Region Structure */ 1421 1422 typedef struct acpi_nfit_data_region 1423 { 1424 ACPI_NFIT_HEADER Header; 1425 UINT16 RegionIndex; 1426 UINT16 Windows; 1427 UINT64 Offset; 1428 UINT64 Size; 1429 UINT64 Capacity; 1430 UINT64 StartAddress; 1431 1432 } ACPI_NFIT_DATA_REGION; 1433 1434 1435 /* 6: Flush Hint Address Structure */ 1436 1437 typedef struct acpi_nfit_flush_address 1438 { 1439 ACPI_NFIT_HEADER Header; 1440 UINT32 DeviceHandle; 1441 UINT16 HintCount; 1442 UINT8 Reserved[6]; /* Reserved, must be zero */ 1443 UINT64 HintAddress[1]; /* Variable length */ 1444 1445 } ACPI_NFIT_FLUSH_ADDRESS; 1446 1447 1448 /* 7: Platform Capabilities Structure */ 1449 1450 typedef struct acpi_nfit_capabilities 1451 { 1452 ACPI_NFIT_HEADER Header; 1453 UINT8 HighestCapability; 1454 UINT8 Reserved[3]; /* Reserved, must be zero */ 1455 UINT32 Capabilities; 1456 UINT32 Reserved2; 1457 1458 } ACPI_NFIT_CAPABILITIES; 1459 1460 /* Capabilities Flags */ 1461 1462 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1463 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1464 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1465 1466 1467 /* 1468 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1469 */ 1470 typedef struct nfit_device_handle 1471 { 1472 UINT32 Handle; 1473 1474 } NFIT_DEVICE_HANDLE; 1475 1476 /* Device handle construction and extraction macros */ 1477 1478 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1479 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1480 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1481 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1482 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1483 1484 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1485 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1486 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1487 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1488 #define ACPI_NFIT_NODE_ID_OFFSET 16 1489 1490 /* Macro to construct a NFIT/NVDIMM device handle */ 1491 1492 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1493 ((dimm) | \ 1494 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1495 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1496 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1497 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1498 1499 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1500 1501 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1502 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1503 1504 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1505 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1506 1507 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1508 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1509 1510 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1511 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1512 1513 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1514 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1515 1516 1517 /******************************************************************************* 1518 * 1519 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1520 * Version 2 (ACPI 6.2) 1521 * 1522 ******************************************************************************/ 1523 1524 typedef struct acpi_table_pcct 1525 { 1526 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1527 UINT32 Flags; 1528 UINT64 Reserved; 1529 1530 } ACPI_TABLE_PCCT; 1531 1532 /* Values for Flags field above */ 1533 1534 #define ACPI_PCCT_DOORBELL 1 1535 1536 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1537 1538 enum AcpiPcctType 1539 { 1540 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1541 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1542 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1543 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1544 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1545 ACPI_PCCT_TYPE_RESERVED = 5 /* 5 and greater are reserved */ 1546 }; 1547 1548 /* 1549 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1550 */ 1551 1552 /* 0: Generic Communications Subspace */ 1553 1554 typedef struct acpi_pcct_subspace 1555 { 1556 ACPI_SUBTABLE_HEADER Header; 1557 UINT8 Reserved[6]; 1558 UINT64 BaseAddress; 1559 UINT64 Length; 1560 ACPI_GENERIC_ADDRESS DoorbellRegister; 1561 UINT64 PreserveMask; 1562 UINT64 WriteMask; 1563 UINT32 Latency; 1564 UINT32 MaxAccessRate; 1565 UINT16 MinTurnaroundTime; 1566 1567 } ACPI_PCCT_SUBSPACE; 1568 1569 1570 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1571 1572 typedef struct acpi_pcct_hw_reduced 1573 { 1574 ACPI_SUBTABLE_HEADER Header; 1575 UINT32 PlatformInterrupt; 1576 UINT8 Flags; 1577 UINT8 Reserved; 1578 UINT64 BaseAddress; 1579 UINT64 Length; 1580 ACPI_GENERIC_ADDRESS DoorbellRegister; 1581 UINT64 PreserveMask; 1582 UINT64 WriteMask; 1583 UINT32 Latency; 1584 UINT32 MaxAccessRate; 1585 UINT16 MinTurnaroundTime; 1586 1587 } ACPI_PCCT_HW_REDUCED; 1588 1589 1590 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1591 1592 typedef struct acpi_pcct_hw_reduced_type2 1593 { 1594 ACPI_SUBTABLE_HEADER Header; 1595 UINT32 PlatformInterrupt; 1596 UINT8 Flags; 1597 UINT8 Reserved; 1598 UINT64 BaseAddress; 1599 UINT64 Length; 1600 ACPI_GENERIC_ADDRESS DoorbellRegister; 1601 UINT64 PreserveMask; 1602 UINT64 WriteMask; 1603 UINT32 Latency; 1604 UINT32 MaxAccessRate; 1605 UINT16 MinTurnaroundTime; 1606 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1607 UINT64 AckPreserveMask; 1608 UINT64 AckWriteMask; 1609 1610 } ACPI_PCCT_HW_REDUCED_TYPE2; 1611 1612 1613 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1614 1615 typedef struct acpi_pcct_ext_pcc_master 1616 { 1617 ACPI_SUBTABLE_HEADER Header; 1618 UINT32 PlatformInterrupt; 1619 UINT8 Flags; 1620 UINT8 Reserved1; 1621 UINT64 BaseAddress; 1622 UINT32 Length; 1623 ACPI_GENERIC_ADDRESS DoorbellRegister; 1624 UINT64 PreserveMask; 1625 UINT64 WriteMask; 1626 UINT32 Latency; 1627 UINT32 MaxAccessRate; 1628 UINT32 MinTurnaroundTime; 1629 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1630 UINT64 AckPreserveMask; 1631 UINT64 AckSetMask; 1632 UINT64 Reserved2; 1633 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1634 UINT64 CmdCompleteMask; 1635 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1636 UINT64 CmdUpdatePreserveMask; 1637 UINT64 CmdUpdateSetMask; 1638 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1639 UINT64 ErrorStatusMask; 1640 1641 } ACPI_PCCT_EXT_PCC_MASTER; 1642 1643 1644 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1645 1646 typedef struct acpi_pcct_ext_pcc_slave 1647 { 1648 ACPI_SUBTABLE_HEADER Header; 1649 UINT32 PlatformInterrupt; 1650 UINT8 Flags; 1651 UINT8 Reserved1; 1652 UINT64 BaseAddress; 1653 UINT32 Length; 1654 ACPI_GENERIC_ADDRESS DoorbellRegister; 1655 UINT64 PreserveMask; 1656 UINT64 WriteMask; 1657 UINT32 Latency; 1658 UINT32 MaxAccessRate; 1659 UINT32 MinTurnaroundTime; 1660 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1661 UINT64 AckPreserveMask; 1662 UINT64 AckSetMask; 1663 UINT64 Reserved2; 1664 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1665 UINT64 CmdCompleteMask; 1666 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1667 UINT64 CmdUpdatePreserveMask; 1668 UINT64 CmdUpdateSetMask; 1669 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1670 UINT64 ErrorStatusMask; 1671 1672 } ACPI_PCCT_EXT_PCC_SLAVE; 1673 1674 1675 /* Values for doorbell flags above */ 1676 1677 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1678 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1679 1680 1681 /* 1682 * PCC memory structures (not part of the ACPI table) 1683 */ 1684 1685 /* Shared Memory Region */ 1686 1687 typedef struct acpi_pcct_shared_memory 1688 { 1689 UINT32 Signature; 1690 UINT16 Command; 1691 UINT16 Status; 1692 1693 } ACPI_PCCT_SHARED_MEMORY; 1694 1695 1696 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1697 1698 typedef struct acpi_pcct_ext_pcc_shared_memory 1699 { 1700 UINT32 Signature; 1701 UINT32 Flags; 1702 UINT32 Length; 1703 UINT32 Command; 1704 1705 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1706 1707 1708 /******************************************************************************* 1709 * 1710 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1711 * Version 0 1712 * 1713 ******************************************************************************/ 1714 1715 typedef struct acpi_table_pdtt 1716 { 1717 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1718 UINT8 TriggerCount; 1719 UINT8 Reserved[3]; 1720 UINT32 ArrayOffset; 1721 1722 } ACPI_TABLE_PDTT; 1723 1724 1725 /* 1726 * PDTT Communication Channel Identifier Structure. 1727 * The number of these structures is defined by TriggerCount above, 1728 * starting at ArrayOffset. 1729 */ 1730 typedef struct acpi_pdtt_channel 1731 { 1732 UINT8 SubchannelId; 1733 UINT8 Flags; 1734 1735 } ACPI_PDTT_CHANNEL; 1736 1737 /* Flags for above */ 1738 1739 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1740 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1741 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1742 1743 1744 /******************************************************************************* 1745 * 1746 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1747 * Version 1 1748 * 1749 ******************************************************************************/ 1750 1751 typedef struct acpi_table_pmtt 1752 { 1753 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1754 UINT32 Reserved; 1755 1756 } ACPI_TABLE_PMTT; 1757 1758 1759 /* Common header for PMTT subtables that follow main table */ 1760 1761 typedef struct acpi_pmtt_header 1762 { 1763 UINT8 Type; 1764 UINT8 Reserved1; 1765 UINT16 Length; 1766 UINT16 Flags; 1767 UINT16 Reserved2; 1768 1769 } ACPI_PMTT_HEADER; 1770 1771 /* Values for Type field above */ 1772 1773 #define ACPI_PMTT_TYPE_SOCKET 0 1774 #define ACPI_PMTT_TYPE_CONTROLLER 1 1775 #define ACPI_PMTT_TYPE_DIMM 2 1776 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFF are reserved */ 1777 1778 /* Values for Flags field above */ 1779 1780 #define ACPI_PMTT_TOP_LEVEL 0x0001 1781 #define ACPI_PMTT_PHYSICAL 0x0002 1782 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1783 1784 1785 /* 1786 * PMTT subtables, correspond to Type in acpi_pmtt_header 1787 */ 1788 1789 1790 /* 0: Socket Structure */ 1791 1792 typedef struct acpi_pmtt_socket 1793 { 1794 ACPI_PMTT_HEADER Header; 1795 UINT16 SocketId; 1796 UINT16 Reserved; 1797 1798 } ACPI_PMTT_SOCKET; 1799 1800 1801 /* 1: Memory Controller subtable */ 1802 1803 typedef struct acpi_pmtt_controller 1804 { 1805 ACPI_PMTT_HEADER Header; 1806 UINT32 ReadLatency; 1807 UINT32 WriteLatency; 1808 UINT32 ReadBandwidth; 1809 UINT32 WriteBandwidth; 1810 UINT16 AccessWidth; 1811 UINT16 Alignment; 1812 UINT16 Reserved; 1813 UINT16 DomainCount; 1814 1815 } ACPI_PMTT_CONTROLLER; 1816 1817 /* 1a: Proximity Domain substructure */ 1818 1819 typedef struct acpi_pmtt_domain 1820 { 1821 UINT32 ProximityDomain; 1822 1823 } ACPI_PMTT_DOMAIN; 1824 1825 1826 /* 2: Physical Component Identifier (DIMM) */ 1827 1828 typedef struct acpi_pmtt_physical_component 1829 { 1830 ACPI_PMTT_HEADER Header; 1831 UINT16 ComponentId; 1832 UINT16 Reserved; 1833 UINT32 MemorySize; 1834 UINT32 BiosHandle; 1835 1836 } ACPI_PMTT_PHYSICAL_COMPONENT; 1837 1838 1839 /******************************************************************************* 1840 * 1841 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1842 * Version 1 1843 * 1844 ******************************************************************************/ 1845 1846 typedef struct acpi_table_pptt 1847 { 1848 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1849 1850 } ACPI_TABLE_PPTT; 1851 1852 /* Values for Type field above */ 1853 1854 enum AcpiPpttType 1855 { 1856 ACPI_PPTT_TYPE_PROCESSOR = 0, 1857 ACPI_PPTT_TYPE_CACHE = 1, 1858 ACPI_PPTT_TYPE_ID = 2, 1859 ACPI_PPTT_TYPE_RESERVED = 3 1860 }; 1861 1862 1863 /* 0: Processor Hierarchy Node Structure */ 1864 1865 typedef struct acpi_pptt_processor 1866 { 1867 ACPI_SUBTABLE_HEADER Header; 1868 UINT16 Reserved; 1869 UINT32 Flags; 1870 UINT32 Parent; 1871 UINT32 AcpiProcessorId; 1872 UINT32 NumberOfPrivResources; 1873 1874 } ACPI_PPTT_PROCESSOR; 1875 1876 /* Flags */ 1877 1878 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 1879 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 1880 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 1881 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 1882 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 1883 1884 1885 /* 1: Cache Type Structure */ 1886 1887 typedef struct acpi_pptt_cache 1888 { 1889 ACPI_SUBTABLE_HEADER Header; 1890 UINT16 Reserved; 1891 UINT32 Flags; 1892 UINT32 NextLevelOfCache; 1893 UINT32 Size; 1894 UINT32 NumberOfSets; 1895 UINT8 Associativity; 1896 UINT8 Attributes; 1897 UINT16 LineSize; 1898 1899 } ACPI_PPTT_CACHE; 1900 1901 /* Flags */ 1902 1903 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 1904 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 1905 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 1906 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 1907 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 1908 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 1909 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 1910 1911 /* Masks for Attributes */ 1912 1913 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 1914 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 1915 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 1916 1917 /* Attributes describing cache */ 1918 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 1919 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 1920 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 1921 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 1922 1923 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 1924 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 1925 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 1926 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 1927 1928 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 1929 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 1930 1931 /* 2: ID Structure */ 1932 1933 typedef struct acpi_pptt_id 1934 { 1935 ACPI_SUBTABLE_HEADER Header; 1936 UINT16 Reserved; 1937 UINT32 VendorId; 1938 UINT64 Level1Id; 1939 UINT64 Level2Id; 1940 UINT16 MajorRev; 1941 UINT16 MinorRev; 1942 UINT16 SpinRev; 1943 1944 } ACPI_PPTT_ID; 1945 1946 1947 /******************************************************************************* 1948 * 1949 * RASF - RAS Feature Table (ACPI 5.0) 1950 * Version 1 1951 * 1952 ******************************************************************************/ 1953 1954 typedef struct acpi_table_rasf 1955 { 1956 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1957 UINT8 ChannelId[12]; 1958 1959 } ACPI_TABLE_RASF; 1960 1961 /* RASF Platform Communication Channel Shared Memory Region */ 1962 1963 typedef struct acpi_rasf_shared_memory 1964 { 1965 UINT32 Signature; 1966 UINT16 Command; 1967 UINT16 Status; 1968 UINT16 Version; 1969 UINT8 Capabilities[16]; 1970 UINT8 SetCapabilities[16]; 1971 UINT16 NumParameterBlocks; 1972 UINT32 SetCapabilitiesStatus; 1973 1974 } ACPI_RASF_SHARED_MEMORY; 1975 1976 /* RASF Parameter Block Structure Header */ 1977 1978 typedef struct acpi_rasf_parameter_block 1979 { 1980 UINT16 Type; 1981 UINT16 Version; 1982 UINT16 Length; 1983 1984 } ACPI_RASF_PARAMETER_BLOCK; 1985 1986 /* RASF Parameter Block Structure for PATROL_SCRUB */ 1987 1988 typedef struct acpi_rasf_patrol_scrub_parameter 1989 { 1990 ACPI_RASF_PARAMETER_BLOCK Header; 1991 UINT16 PatrolScrubCommand; 1992 UINT64 RequestedAddressRange[2]; 1993 UINT64 ActualAddressRange[2]; 1994 UINT16 Flags; 1995 UINT8 RequestedSpeed; 1996 1997 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 1998 1999 /* Masks for Flags and Speed fields above */ 2000 2001 #define ACPI_RASF_SCRUBBER_RUNNING 1 2002 #define ACPI_RASF_SPEED (7<<1) 2003 #define ACPI_RASF_SPEED_SLOW (0<<1) 2004 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2005 #define ACPI_RASF_SPEED_FAST (7<<1) 2006 2007 /* Channel Commands */ 2008 2009 enum AcpiRasfCommands 2010 { 2011 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2012 }; 2013 2014 /* Platform RAS Capabilities */ 2015 2016 enum AcpiRasfCapabiliities 2017 { 2018 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2019 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2020 }; 2021 2022 /* Patrol Scrub Commands */ 2023 2024 enum AcpiRasfPatrolScrubCommands 2025 { 2026 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2027 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2028 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2029 }; 2030 2031 /* Channel Command flags */ 2032 2033 #define ACPI_RASF_GENERATE_SCI (1<<15) 2034 2035 /* Status values */ 2036 2037 enum AcpiRasfStatus 2038 { 2039 ACPI_RASF_SUCCESS = 0, 2040 ACPI_RASF_NOT_VALID = 1, 2041 ACPI_RASF_NOT_SUPPORTED = 2, 2042 ACPI_RASF_BUSY = 3, 2043 ACPI_RASF_FAILED = 4, 2044 ACPI_RASF_ABORTED = 5, 2045 ACPI_RASF_INVALID_DATA = 6 2046 }; 2047 2048 /* Status flags */ 2049 2050 #define ACPI_RASF_COMMAND_COMPLETE (1) 2051 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2052 #define ACPI_RASF_ERROR (1<<2) 2053 #define ACPI_RASF_STATUS (0x1F<<3) 2054 2055 2056 /******************************************************************************* 2057 * 2058 * SBST - Smart Battery Specification Table 2059 * Version 1 2060 * 2061 ******************************************************************************/ 2062 2063 typedef struct acpi_table_sbst 2064 { 2065 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2066 UINT32 WarningLevel; 2067 UINT32 LowLevel; 2068 UINT32 CriticalLevel; 2069 2070 } ACPI_TABLE_SBST; 2071 2072 2073 /******************************************************************************* 2074 * 2075 * SDEI - Software Delegated Exception Interface Descriptor Table 2076 * 2077 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2078 * May 8th, 2017. Copyright 2017 ARM Ltd. 2079 * 2080 ******************************************************************************/ 2081 2082 typedef struct acpi_table_sdei 2083 { 2084 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2085 2086 } ACPI_TABLE_SDEI; 2087 2088 2089 /******************************************************************************* 2090 * 2091 * SDEV - Secure Devices Table (ACPI 6.2) 2092 * Version 1 2093 * 2094 ******************************************************************************/ 2095 2096 typedef struct acpi_table_sdev 2097 { 2098 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2099 2100 } ACPI_TABLE_SDEV; 2101 2102 2103 typedef struct acpi_sdev_header 2104 { 2105 UINT8 Type; 2106 UINT8 Flags; 2107 UINT16 Length; 2108 2109 } ACPI_SDEV_HEADER; 2110 2111 2112 /* Values for subtable type above */ 2113 2114 enum AcpiSdevType 2115 { 2116 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2117 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2118 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2119 }; 2120 2121 /* Values for flags above */ 2122 2123 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2124 2125 /* 2126 * SDEV subtables 2127 */ 2128 2129 /* 0: Namespace Device Based Secure Device Structure */ 2130 2131 typedef struct acpi_sdev_namespace 2132 { 2133 ACPI_SDEV_HEADER Header; 2134 UINT16 DeviceIdOffset; 2135 UINT16 DeviceIdLength; 2136 UINT16 VendorDataOffset; 2137 UINT16 VendorDataLength; 2138 2139 } ACPI_SDEV_NAMESPACE; 2140 2141 /* 1: PCIe Endpoint Device Based Device Structure */ 2142 2143 typedef struct acpi_sdev_pcie 2144 { 2145 ACPI_SDEV_HEADER Header; 2146 UINT16 Segment; 2147 UINT16 StartBus; 2148 UINT16 PathOffset; 2149 UINT16 PathLength; 2150 UINT16 VendorDataOffset; 2151 UINT16 VendorDataLength; 2152 2153 } ACPI_SDEV_PCIE; 2154 2155 /* 1a: PCIe Endpoint path entry */ 2156 2157 typedef struct acpi_sdev_pcie_path 2158 { 2159 UINT8 Device; 2160 UINT8 Function; 2161 2162 } ACPI_SDEV_PCIE_PATH; 2163 2164 2165 /* Reset to default packing */ 2166 2167 #pragma pack() 2168 2169 #endif /* __ACTBL2_H__ */ 2170