1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2021, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_BDAT "BDAT" /* BIOS Data ACPI Table */ 172 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 173 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 174 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 175 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 176 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 177 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 178 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 179 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 180 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 181 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 182 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 183 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 184 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 185 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 186 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 187 #define ACPI_SIG_PRMT "PRMT" /* Platform Runtime Mechanism Table */ 188 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 189 #define ACPI_SIG_RGRT "RGRT" /* Regulatory Graphics Resource Table */ 190 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 191 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 192 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 193 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 194 #define ACPI_SIG_SVKL "SVKL" /* Storage Volume Key Location Table */ 195 196 197 /* 198 * All tables must be byte-packed to match the ACPI specification, since 199 * the tables are provided by the system BIOS. 200 */ 201 #pragma pack(1) 202 203 /* 204 * Note: C bitfields are not used for this reason: 205 * 206 * "Bitfields are great and easy to read, but unfortunately the C language 207 * does not specify the layout of bitfields in memory, which means they are 208 * essentially useless for dealing with packed data in on-disk formats or 209 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 210 * this decision was a design error in C. Ritchie could have picked an order 211 * and stuck with it." Norman Ramsey. 212 * See http://stackoverflow.com/a/1053662/41661 213 */ 214 215 216 /******************************************************************************* 217 * 218 * BDAT - BIOS Data ACPI Table 219 * 220 * Conforms to "BIOS Data ACPI Table", Interface Specification v4.0 Draft 5 221 * Nov 2020 222 * 223 ******************************************************************************/ 224 225 typedef struct acpi_table_bdat 226 { 227 ACPI_TABLE_HEADER Header; 228 ACPI_GENERIC_ADDRESS Gas; 229 230 } ACPI_TABLE_BDAT; 231 232 233 /******************************************************************************* 234 * 235 * IORT - IO Remapping Table 236 * 237 * Conforms to "IO Remapping Table System Software on ARM Platforms", 238 * Document number: ARM DEN 0049E.b, Feb 2021 239 * 240 ******************************************************************************/ 241 242 typedef struct acpi_table_iort 243 { 244 ACPI_TABLE_HEADER Header; 245 UINT32 NodeCount; 246 UINT32 NodeOffset; 247 UINT32 Reserved; 248 249 } ACPI_TABLE_IORT; 250 251 252 /* 253 * IORT subtables 254 */ 255 typedef struct acpi_iort_node 256 { 257 UINT8 Type; 258 UINT16 Length; 259 UINT8 Revision; 260 UINT32 Identifier; 261 UINT32 MappingCount; 262 UINT32 MappingOffset; 263 char NodeData[1]; 264 265 } ACPI_IORT_NODE; 266 267 /* Values for subtable Type above */ 268 269 enum AcpiIortNodeType 270 { 271 ACPI_IORT_NODE_ITS_GROUP = 0x00, 272 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 273 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 274 ACPI_IORT_NODE_SMMU = 0x03, 275 ACPI_IORT_NODE_SMMU_V3 = 0x04, 276 ACPI_IORT_NODE_PMCG = 0x05, 277 ACPI_IORT_NODE_RMR = 0x06, 278 }; 279 280 281 typedef struct acpi_iort_id_mapping 282 { 283 UINT32 InputBase; /* Lowest value in input range */ 284 UINT32 IdCount; /* Number of IDs */ 285 UINT32 OutputBase; /* Lowest value in output range */ 286 UINT32 OutputReference; /* A reference to the output node */ 287 UINT32 Flags; 288 289 } ACPI_IORT_ID_MAPPING; 290 291 /* Masks for Flags field above for IORT subtable */ 292 293 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 294 295 296 typedef struct acpi_iort_memory_access 297 { 298 UINT32 CacheCoherency; 299 UINT8 Hints; 300 UINT16 Reserved; 301 UINT8 MemoryFlags; 302 303 } ACPI_IORT_MEMORY_ACCESS; 304 305 /* Values for CacheCoherency field above */ 306 307 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 308 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 309 310 /* Masks for Hints field above */ 311 312 #define ACPI_IORT_HT_TRANSIENT (1) 313 #define ACPI_IORT_HT_WRITE (1<<1) 314 #define ACPI_IORT_HT_READ (1<<2) 315 #define ACPI_IORT_HT_OVERRIDE (1<<3) 316 317 /* Masks for MemoryFlags field above */ 318 319 #define ACPI_IORT_MF_COHERENCY (1) 320 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 321 322 323 /* 324 * IORT node specific subtables 325 */ 326 typedef struct acpi_iort_its_group 327 { 328 UINT32 ItsCount; 329 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 330 331 } ACPI_IORT_ITS_GROUP; 332 333 334 typedef struct acpi_iort_named_component 335 { 336 UINT32 NodeFlags; 337 UINT64 MemoryProperties; /* Memory access properties */ 338 UINT8 MemoryAddressLimit; /* Memory address size limit */ 339 char DeviceName[1]; /* Path of namespace object */ 340 341 } ACPI_IORT_NAMED_COMPONENT; 342 343 /* Masks for Flags field above */ 344 345 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 346 #define ACPI_IORT_NC_PASID_BITS (31<<1) 347 348 typedef struct acpi_iort_root_complex 349 { 350 UINT64 MemoryProperties; /* Memory access properties */ 351 UINT32 AtsAttribute; 352 UINT32 PciSegmentNumber; 353 UINT8 MemoryAddressLimit; /* Memory address size limit */ 354 UINT8 Reserved[3]; /* Reserved, must be zero */ 355 356 } ACPI_IORT_ROOT_COMPLEX; 357 358 /* Masks for AtsAttribute field above */ 359 360 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 361 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 362 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 363 364 365 typedef struct acpi_iort_smmu 366 { 367 UINT64 BaseAddress; /* SMMU base address */ 368 UINT64 Span; /* Length of memory range */ 369 UINT32 Model; 370 UINT32 Flags; 371 UINT32 GlobalInterruptOffset; 372 UINT32 ContextInterruptCount; 373 UINT32 ContextInterruptOffset; 374 UINT32 PmuInterruptCount; 375 UINT32 PmuInterruptOffset; 376 UINT64 Interrupts[1]; /* Interrupt array */ 377 378 } ACPI_IORT_SMMU; 379 380 /* Values for Model field above */ 381 382 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 383 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 384 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 385 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 386 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 387 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 388 389 /* Masks for Flags field above */ 390 391 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 392 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 393 394 /* Global interrupt format */ 395 396 typedef struct acpi_iort_smmu_gsi 397 { 398 UINT32 NSgIrpt; 399 UINT32 NSgIrptFlags; 400 UINT32 NSgCfgIrpt; 401 UINT32 NSgCfgIrptFlags; 402 403 } ACPI_IORT_SMMU_GSI; 404 405 406 typedef struct acpi_iort_smmu_v3 407 { 408 UINT64 BaseAddress; /* SMMUv3 base address */ 409 UINT32 Flags; 410 UINT32 Reserved; 411 UINT64 VatosAddress; 412 UINT32 Model; 413 UINT32 EventGsiv; 414 UINT32 PriGsiv; 415 UINT32 GerrGsiv; 416 UINT32 SyncGsiv; 417 UINT32 Pxm; 418 UINT32 IdMappingIndex; 419 420 } ACPI_IORT_SMMU_V3; 421 422 /* Values for Model field above */ 423 424 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 425 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 426 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 427 428 /* Masks for Flags field above */ 429 430 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 431 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 432 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 433 434 typedef struct acpi_iort_pmcg 435 { 436 UINT64 Page0BaseAddress; 437 UINT32 OverflowGsiv; 438 UINT32 NodeReference; 439 UINT64 Page1BaseAddress; 440 441 } ACPI_IORT_PMCG; 442 443 typedef struct acpi_iort_rmr { 444 UINT32 Flags; 445 UINT32 RmrCount; 446 UINT32 RmrOffset; 447 448 } ACPI_IORT_RMR; 449 450 typedef struct acpi_iort_rmr_desc { 451 UINT64 BaseAddress; 452 UINT64 Length; 453 UINT32 Reserved; 454 455 } ACPI_IORT_RMR_DESC; 456 457 /******************************************************************************* 458 * 459 * IVRS - I/O Virtualization Reporting Structure 460 * Version 1 461 * 462 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 463 * Revision 1.26, February 2009. 464 * 465 ******************************************************************************/ 466 467 typedef struct acpi_table_ivrs 468 { 469 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 470 UINT32 Info; /* Common virtualization info */ 471 UINT64 Reserved; 472 473 } ACPI_TABLE_IVRS; 474 475 /* Values for Info field above */ 476 477 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 478 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 479 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 480 481 482 /* IVRS subtable header */ 483 484 typedef struct acpi_ivrs_header 485 { 486 UINT8 Type; /* Subtable type */ 487 UINT8 Flags; 488 UINT16 Length; /* Subtable length */ 489 UINT16 DeviceId; /* ID of IOMMU */ 490 491 } ACPI_IVRS_HEADER; 492 493 /* Values for subtable Type above */ 494 495 enum AcpiIvrsType 496 { 497 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 498 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 499 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 500 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 501 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 502 ACPI_IVRS_TYPE_MEMORY3 = 0x22 503 }; 504 505 /* Masks for Flags field above for IVHD subtable */ 506 507 #define ACPI_IVHD_TT_ENABLE (1) 508 #define ACPI_IVHD_PASS_PW (1<<1) 509 #define ACPI_IVHD_RES_PASS_PW (1<<2) 510 #define ACPI_IVHD_ISOC (1<<3) 511 #define ACPI_IVHD_IOTLB (1<<4) 512 513 /* Masks for Flags field above for IVMD subtable */ 514 515 #define ACPI_IVMD_UNITY (1) 516 #define ACPI_IVMD_READ (1<<1) 517 #define ACPI_IVMD_WRITE (1<<2) 518 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 519 520 521 /* 522 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 523 */ 524 525 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 526 527 typedef struct acpi_ivrs_hardware_10 528 { 529 ACPI_IVRS_HEADER Header; 530 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 531 UINT64 BaseAddress; /* IOMMU control registers */ 532 UINT16 PciSegmentGroup; 533 UINT16 Info; /* MSI number and unit ID */ 534 UINT32 FeatureReporting; 535 536 } ACPI_IVRS_HARDWARE1; 537 538 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 539 540 typedef struct acpi_ivrs_hardware_11 541 { 542 ACPI_IVRS_HEADER Header; 543 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 544 UINT64 BaseAddress; /* IOMMU control registers */ 545 UINT16 PciSegmentGroup; 546 UINT16 Info; /* MSI number and unit ID */ 547 UINT32 Attributes; 548 UINT64 EfrRegisterImage; 549 UINT64 Reserved; 550 } ACPI_IVRS_HARDWARE2; 551 552 /* Masks for Info field above */ 553 554 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 555 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 556 557 558 /* 559 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 560 * Upper two bits of the Type field are the (encoded) length of the structure. 561 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 562 * are reserved for future use but not defined. 563 */ 564 typedef struct acpi_ivrs_de_header 565 { 566 UINT8 Type; 567 UINT16 Id; 568 UINT8 DataSetting; 569 570 } ACPI_IVRS_DE_HEADER; 571 572 /* Length of device entry is in the top two bits of Type field above */ 573 574 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 575 576 /* Values for device entry Type field above */ 577 578 enum AcpiIvrsDeviceEntryType 579 { 580 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 581 582 ACPI_IVRS_TYPE_PAD4 = 0, 583 ACPI_IVRS_TYPE_ALL = 1, 584 ACPI_IVRS_TYPE_SELECT = 2, 585 ACPI_IVRS_TYPE_START = 3, 586 ACPI_IVRS_TYPE_END = 4, 587 588 /* 8-byte device entries */ 589 590 ACPI_IVRS_TYPE_PAD8 = 64, 591 ACPI_IVRS_TYPE_NOT_USED = 65, 592 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 593 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 594 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 595 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 596 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 597 598 /* Variable-length device entries */ 599 600 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 601 }; 602 603 /* Values for Data field above */ 604 605 #define ACPI_IVHD_INIT_PASS (1) 606 #define ACPI_IVHD_EINT_PASS (1<<1) 607 #define ACPI_IVHD_NMI_PASS (1<<2) 608 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 609 #define ACPI_IVHD_LINT0_PASS (1<<6) 610 #define ACPI_IVHD_LINT1_PASS (1<<7) 611 612 613 /* Types 0-4: 4-byte device entry */ 614 615 typedef struct acpi_ivrs_device4 616 { 617 ACPI_IVRS_DE_HEADER Header; 618 619 } ACPI_IVRS_DEVICE4; 620 621 /* Types 66-67: 8-byte device entry */ 622 623 typedef struct acpi_ivrs_device8a 624 { 625 ACPI_IVRS_DE_HEADER Header; 626 UINT8 Reserved1; 627 UINT16 UsedId; 628 UINT8 Reserved2; 629 630 } ACPI_IVRS_DEVICE8A; 631 632 /* Types 70-71: 8-byte device entry */ 633 634 typedef struct acpi_ivrs_device8b 635 { 636 ACPI_IVRS_DE_HEADER Header; 637 UINT32 ExtendedData; 638 639 } ACPI_IVRS_DEVICE8B; 640 641 /* Values for ExtendedData above */ 642 643 #define ACPI_IVHD_ATS_DISABLED (1<<31) 644 645 /* Type 72: 8-byte device entry */ 646 647 typedef struct acpi_ivrs_device8c 648 { 649 ACPI_IVRS_DE_HEADER Header; 650 UINT8 Handle; 651 UINT16 UsedId; 652 UINT8 Variety; 653 654 } ACPI_IVRS_DEVICE8C; 655 656 /* Values for Variety field above */ 657 658 #define ACPI_IVHD_IOAPIC 1 659 #define ACPI_IVHD_HPET 2 660 661 /* Type 240: variable-length device entry */ 662 663 typedef struct acpi_ivrs_device_hid 664 { 665 ACPI_IVRS_DE_HEADER Header; 666 UINT64 AcpiHid; 667 UINT64 AcpiCid; 668 UINT8 UidType; 669 UINT8 UidLength; 670 671 } ACPI_IVRS_DEVICE_HID; 672 673 /* Values for UidType above */ 674 675 #define ACPI_IVRS_UID_NOT_PRESENT 0 676 #define ACPI_IVRS_UID_IS_INTEGER 1 677 #define ACPI_IVRS_UID_IS_STRING 2 678 679 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 680 681 typedef struct acpi_ivrs_memory 682 { 683 ACPI_IVRS_HEADER Header; 684 UINT16 AuxData; 685 UINT64 Reserved; 686 UINT64 StartAddress; 687 UINT64 MemoryLength; 688 689 } ACPI_IVRS_MEMORY; 690 691 692 /******************************************************************************* 693 * 694 * LPIT - Low Power Idle Table 695 * 696 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 697 * 698 ******************************************************************************/ 699 700 typedef struct acpi_table_lpit 701 { 702 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 703 704 } ACPI_TABLE_LPIT; 705 706 707 /* LPIT subtable header */ 708 709 typedef struct acpi_lpit_header 710 { 711 UINT32 Type; /* Subtable type */ 712 UINT32 Length; /* Subtable length */ 713 UINT16 UniqueId; 714 UINT16 Reserved; 715 UINT32 Flags; 716 717 } ACPI_LPIT_HEADER; 718 719 /* Values for subtable Type above */ 720 721 enum AcpiLpitType 722 { 723 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 724 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 725 }; 726 727 /* Masks for Flags field above */ 728 729 #define ACPI_LPIT_STATE_DISABLED (1) 730 #define ACPI_LPIT_NO_COUNTER (1<<1) 731 732 /* 733 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 734 */ 735 736 /* 0x00: Native C-state instruction based LPI structure */ 737 738 typedef struct acpi_lpit_native 739 { 740 ACPI_LPIT_HEADER Header; 741 ACPI_GENERIC_ADDRESS EntryTrigger; 742 UINT32 Residency; 743 UINT32 Latency; 744 ACPI_GENERIC_ADDRESS ResidencyCounter; 745 UINT64 CounterFrequency; 746 747 } ACPI_LPIT_NATIVE; 748 749 750 /******************************************************************************* 751 * 752 * MADT - Multiple APIC Description Table 753 * Version 3 754 * 755 ******************************************************************************/ 756 757 typedef struct acpi_table_madt 758 { 759 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 760 UINT32 Address; /* Physical address of local APIC */ 761 UINT32 Flags; 762 763 } ACPI_TABLE_MADT; 764 765 /* Masks for Flags field above */ 766 767 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 768 769 /* Values for PCATCompat flag */ 770 771 #define ACPI_MADT_DUAL_PIC 1 772 #define ACPI_MADT_MULTIPLE_APIC 0 773 774 775 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 776 777 enum AcpiMadtType 778 { 779 ACPI_MADT_TYPE_LOCAL_APIC = 0, 780 ACPI_MADT_TYPE_IO_APIC = 1, 781 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 782 ACPI_MADT_TYPE_NMI_SOURCE = 3, 783 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 784 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 785 ACPI_MADT_TYPE_IO_SAPIC = 6, 786 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 787 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 788 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 789 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 790 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 791 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 792 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 793 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 794 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 795 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 796 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 797 }; 798 799 800 /* 801 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 802 */ 803 804 /* 0: Processor Local APIC */ 805 806 typedef struct acpi_madt_local_apic 807 { 808 ACPI_SUBTABLE_HEADER Header; 809 UINT8 ProcessorId; /* ACPI processor id */ 810 UINT8 Id; /* Processor's local APIC id */ 811 UINT32 LapicFlags; 812 813 } ACPI_MADT_LOCAL_APIC; 814 815 816 /* 1: IO APIC */ 817 818 typedef struct acpi_madt_io_apic 819 { 820 ACPI_SUBTABLE_HEADER Header; 821 UINT8 Id; /* I/O APIC ID */ 822 UINT8 Reserved; /* Reserved - must be zero */ 823 UINT32 Address; /* APIC physical address */ 824 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 825 826 } ACPI_MADT_IO_APIC; 827 828 829 /* 2: Interrupt Override */ 830 831 typedef struct acpi_madt_interrupt_override 832 { 833 ACPI_SUBTABLE_HEADER Header; 834 UINT8 Bus; /* 0 - ISA */ 835 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 836 UINT32 GlobalIrq; /* Global system interrupt */ 837 UINT16 IntiFlags; 838 839 } ACPI_MADT_INTERRUPT_OVERRIDE; 840 841 842 /* 3: NMI Source */ 843 844 typedef struct acpi_madt_nmi_source 845 { 846 ACPI_SUBTABLE_HEADER Header; 847 UINT16 IntiFlags; 848 UINT32 GlobalIrq; /* Global system interrupt */ 849 850 } ACPI_MADT_NMI_SOURCE; 851 852 853 /* 4: Local APIC NMI */ 854 855 typedef struct acpi_madt_local_apic_nmi 856 { 857 ACPI_SUBTABLE_HEADER Header; 858 UINT8 ProcessorId; /* ACPI processor id */ 859 UINT16 IntiFlags; 860 UINT8 Lint; /* LINTn to which NMI is connected */ 861 862 } ACPI_MADT_LOCAL_APIC_NMI; 863 864 865 /* 5: Address Override */ 866 867 typedef struct acpi_madt_local_apic_override 868 { 869 ACPI_SUBTABLE_HEADER Header; 870 UINT16 Reserved; /* Reserved, must be zero */ 871 UINT64 Address; /* APIC physical address */ 872 873 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 874 875 876 /* 6: I/O Sapic */ 877 878 typedef struct acpi_madt_io_sapic 879 { 880 ACPI_SUBTABLE_HEADER Header; 881 UINT8 Id; /* I/O SAPIC ID */ 882 UINT8 Reserved; /* Reserved, must be zero */ 883 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 884 UINT64 Address; /* SAPIC physical address */ 885 886 } ACPI_MADT_IO_SAPIC; 887 888 889 /* 7: Local Sapic */ 890 891 typedef struct acpi_madt_local_sapic 892 { 893 ACPI_SUBTABLE_HEADER Header; 894 UINT8 ProcessorId; /* ACPI processor id */ 895 UINT8 Id; /* SAPIC ID */ 896 UINT8 Eid; /* SAPIC EID */ 897 UINT8 Reserved[3]; /* Reserved, must be zero */ 898 UINT32 LapicFlags; 899 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 900 char UidString[1]; /* String UID - ACPI 3.0 */ 901 902 } ACPI_MADT_LOCAL_SAPIC; 903 904 905 /* 8: Platform Interrupt Source */ 906 907 typedef struct acpi_madt_interrupt_source 908 { 909 ACPI_SUBTABLE_HEADER Header; 910 UINT16 IntiFlags; 911 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 912 UINT8 Id; /* Processor ID */ 913 UINT8 Eid; /* Processor EID */ 914 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 915 UINT32 GlobalIrq; /* Global system interrupt */ 916 UINT32 Flags; /* Interrupt Source Flags */ 917 918 } ACPI_MADT_INTERRUPT_SOURCE; 919 920 /* Masks for Flags field above */ 921 922 #define ACPI_MADT_CPEI_OVERRIDE (1) 923 924 925 /* 9: Processor Local X2APIC (ACPI 4.0) */ 926 927 typedef struct acpi_madt_local_x2apic 928 { 929 ACPI_SUBTABLE_HEADER Header; 930 UINT16 Reserved; /* Reserved - must be zero */ 931 UINT32 LocalApicId; /* Processor x2APIC ID */ 932 UINT32 LapicFlags; 933 UINT32 Uid; /* ACPI processor UID */ 934 935 } ACPI_MADT_LOCAL_X2APIC; 936 937 938 /* 10: Local X2APIC NMI (ACPI 4.0) */ 939 940 typedef struct acpi_madt_local_x2apic_nmi 941 { 942 ACPI_SUBTABLE_HEADER Header; 943 UINT16 IntiFlags; 944 UINT32 Uid; /* ACPI processor UID */ 945 UINT8 Lint; /* LINTn to which NMI is connected */ 946 UINT8 Reserved[3]; /* Reserved - must be zero */ 947 948 } ACPI_MADT_LOCAL_X2APIC_NMI; 949 950 951 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 952 953 typedef struct acpi_madt_generic_interrupt 954 { 955 ACPI_SUBTABLE_HEADER Header; 956 UINT16 Reserved; /* Reserved - must be zero */ 957 UINT32 CpuInterfaceNumber; 958 UINT32 Uid; 959 UINT32 Flags; 960 UINT32 ParkingVersion; 961 UINT32 PerformanceInterrupt; 962 UINT64 ParkedAddress; 963 UINT64 BaseAddress; 964 UINT64 GicvBaseAddress; 965 UINT64 GichBaseAddress; 966 UINT32 VgicInterrupt; 967 UINT64 GicrBaseAddress; 968 UINT64 ArmMpidr; 969 UINT8 EfficiencyClass; 970 UINT8 Reserved2[1]; 971 UINT16 SpeInterrupt; /* ACPI 6.3 */ 972 973 } ACPI_MADT_GENERIC_INTERRUPT; 974 975 /* Masks for Flags field above */ 976 977 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 978 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 979 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 980 981 982 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 983 984 typedef struct acpi_madt_generic_distributor 985 { 986 ACPI_SUBTABLE_HEADER Header; 987 UINT16 Reserved; /* Reserved - must be zero */ 988 UINT32 GicId; 989 UINT64 BaseAddress; 990 UINT32 GlobalIrqBase; 991 UINT8 Version; 992 UINT8 Reserved2[3]; /* Reserved - must be zero */ 993 994 } ACPI_MADT_GENERIC_DISTRIBUTOR; 995 996 /* Values for Version field above */ 997 998 enum AcpiMadtGicVersion 999 { 1000 ACPI_MADT_GIC_VERSION_NONE = 0, 1001 ACPI_MADT_GIC_VERSION_V1 = 1, 1002 ACPI_MADT_GIC_VERSION_V2 = 2, 1003 ACPI_MADT_GIC_VERSION_V3 = 3, 1004 ACPI_MADT_GIC_VERSION_V4 = 4, 1005 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 1006 }; 1007 1008 1009 /* 13: Generic MSI Frame (ACPI 5.1) */ 1010 1011 typedef struct acpi_madt_generic_msi_frame 1012 { 1013 ACPI_SUBTABLE_HEADER Header; 1014 UINT16 Reserved; /* Reserved - must be zero */ 1015 UINT32 MsiFrameId; 1016 UINT64 BaseAddress; 1017 UINT32 Flags; 1018 UINT16 SpiCount; 1019 UINT16 SpiBase; 1020 1021 } ACPI_MADT_GENERIC_MSI_FRAME; 1022 1023 /* Masks for Flags field above */ 1024 1025 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1026 1027 1028 /* 14: Generic Redistributor (ACPI 5.1) */ 1029 1030 typedef struct acpi_madt_generic_redistributor 1031 { 1032 ACPI_SUBTABLE_HEADER Header; 1033 UINT16 Reserved; /* reserved - must be zero */ 1034 UINT64 BaseAddress; 1035 UINT32 Length; 1036 1037 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1038 1039 1040 /* 15: Generic Translator (ACPI 6.0) */ 1041 1042 typedef struct acpi_madt_generic_translator 1043 { 1044 ACPI_SUBTABLE_HEADER Header; 1045 UINT16 Reserved; /* reserved - must be zero */ 1046 UINT32 TranslationId; 1047 UINT64 BaseAddress; 1048 UINT32 Reserved2; 1049 1050 } ACPI_MADT_GENERIC_TRANSLATOR; 1051 1052 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1053 1054 typedef struct acpi_madt_multiproc_wakeup 1055 { 1056 ACPI_SUBTABLE_HEADER Header; 1057 UINT16 MailboxVersion; 1058 UINT32 Reserved; /* reserved - must be zero */ 1059 UINT64 BaseAddress; 1060 1061 } ACPI_MADT_MULTIPROC_WAKEUP; 1062 1063 #define ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE 2032 1064 #define ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE 2048 1065 1066 typedef struct acpi_madt_multiproc_wakeup_mailbox 1067 { 1068 UINT16 Command; 1069 UINT16 Reserved; /* reserved - must be zero */ 1070 UINT32 ApicId; 1071 UINT64 WakeupVector; 1072 UINT8 ReservedOs[ACPI_MULTIPROC_WAKEUP_MB_OS_SIZE]; /* reserved for OS use */ 1073 UINT8 ReservedFirmware[ACPI_MULTIPROC_WAKEUP_MB_FIRMWARE_SIZE]; /* reserved for firmware use */ 1074 1075 } ACPI_MADT_MULTIPROC_WAKEUP_MAILBOX; 1076 1077 #define ACPI_MP_WAKE_COMMAND_WAKEUP 1 1078 1079 1080 /* 1081 * Common flags fields for MADT subtables 1082 */ 1083 1084 /* MADT Local APIC flags */ 1085 1086 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1087 1088 /* MADT MPS INTI flags (IntiFlags) */ 1089 1090 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1091 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1092 1093 /* Values for MPS INTI flags */ 1094 1095 #define ACPI_MADT_POLARITY_CONFORMS 0 1096 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1097 #define ACPI_MADT_POLARITY_RESERVED 2 1098 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1099 1100 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1101 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1102 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1103 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1104 1105 1106 /******************************************************************************* 1107 * 1108 * MCFG - PCI Memory Mapped Configuration table and subtable 1109 * Version 1 1110 * 1111 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1112 * 1113 ******************************************************************************/ 1114 1115 typedef struct acpi_table_mcfg 1116 { 1117 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1118 UINT8 Reserved[8]; 1119 1120 } ACPI_TABLE_MCFG; 1121 1122 1123 /* Subtable */ 1124 1125 typedef struct acpi_mcfg_allocation 1126 { 1127 UINT64 Address; /* Base address, processor-relative */ 1128 UINT16 PciSegment; /* PCI segment group number */ 1129 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1130 UINT8 EndBusNumber; /* Final PCI Bus number */ 1131 UINT32 Reserved; 1132 1133 } ACPI_MCFG_ALLOCATION; 1134 1135 1136 /******************************************************************************* 1137 * 1138 * MCHI - Management Controller Host Interface Table 1139 * Version 1 1140 * 1141 * Conforms to "Management Component Transport Protocol (MCTP) Host 1142 * Interface Specification", Revision 1.0.0a, October 13, 2009 1143 * 1144 ******************************************************************************/ 1145 1146 typedef struct acpi_table_mchi 1147 { 1148 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1149 UINT8 InterfaceType; 1150 UINT8 Protocol; 1151 UINT64 ProtocolData; 1152 UINT8 InterruptType; 1153 UINT8 Gpe; 1154 UINT8 PciDeviceFlag; 1155 UINT32 GlobalInterrupt; 1156 ACPI_GENERIC_ADDRESS ControlRegister; 1157 UINT8 PciSegment; 1158 UINT8 PciBus; 1159 UINT8 PciDevice; 1160 UINT8 PciFunction; 1161 1162 } ACPI_TABLE_MCHI; 1163 1164 1165 /******************************************************************************* 1166 * 1167 * MPST - Memory Power State Table (ACPI 5.0) 1168 * Version 1 1169 * 1170 ******************************************************************************/ 1171 1172 #define ACPI_MPST_CHANNEL_INFO \ 1173 UINT8 ChannelId; \ 1174 UINT8 Reserved1[3]; \ 1175 UINT16 PowerNodeCount; \ 1176 UINT16 Reserved2; 1177 1178 /* Main table */ 1179 1180 typedef struct acpi_table_mpst 1181 { 1182 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1183 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1184 1185 } ACPI_TABLE_MPST; 1186 1187 1188 /* Memory Platform Communication Channel Info */ 1189 1190 typedef struct acpi_mpst_channel 1191 { 1192 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1193 1194 } ACPI_MPST_CHANNEL; 1195 1196 1197 /* Memory Power Node Structure */ 1198 1199 typedef struct acpi_mpst_power_node 1200 { 1201 UINT8 Flags; 1202 UINT8 Reserved1; 1203 UINT16 NodeId; 1204 UINT32 Length; 1205 UINT64 RangeAddress; 1206 UINT64 RangeLength; 1207 UINT32 NumPowerStates; 1208 UINT32 NumPhysicalComponents; 1209 1210 } ACPI_MPST_POWER_NODE; 1211 1212 /* Values for Flags field above */ 1213 1214 #define ACPI_MPST_ENABLED 1 1215 #define ACPI_MPST_POWER_MANAGED 2 1216 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1217 1218 1219 /* Memory Power State Structure (follows POWER_NODE above) */ 1220 1221 typedef struct acpi_mpst_power_state 1222 { 1223 UINT8 PowerState; 1224 UINT8 InfoIndex; 1225 1226 } ACPI_MPST_POWER_STATE; 1227 1228 1229 /* Physical Component ID Structure (follows POWER_STATE above) */ 1230 1231 typedef struct acpi_mpst_component 1232 { 1233 UINT16 ComponentId; 1234 1235 } ACPI_MPST_COMPONENT; 1236 1237 1238 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1239 1240 typedef struct acpi_mpst_data_hdr 1241 { 1242 UINT16 CharacteristicsCount; 1243 UINT16 Reserved; 1244 1245 } ACPI_MPST_DATA_HDR; 1246 1247 typedef struct acpi_mpst_power_data 1248 { 1249 UINT8 StructureId; 1250 UINT8 Flags; 1251 UINT16 Reserved1; 1252 UINT32 AveragePower; 1253 UINT32 PowerSaving; 1254 UINT64 ExitLatency; 1255 UINT64 Reserved2; 1256 1257 } ACPI_MPST_POWER_DATA; 1258 1259 /* Values for Flags field above */ 1260 1261 #define ACPI_MPST_PRESERVE 1 1262 #define ACPI_MPST_AUTOENTRY 2 1263 #define ACPI_MPST_AUTOEXIT 4 1264 1265 1266 /* Shared Memory Region (not part of an ACPI table) */ 1267 1268 typedef struct acpi_mpst_shared 1269 { 1270 UINT32 Signature; 1271 UINT16 PccCommand; 1272 UINT16 PccStatus; 1273 UINT32 CommandRegister; 1274 UINT32 StatusRegister; 1275 UINT32 PowerStateId; 1276 UINT32 PowerNodeId; 1277 UINT64 EnergyConsumed; 1278 UINT64 AveragePower; 1279 1280 } ACPI_MPST_SHARED; 1281 1282 1283 /******************************************************************************* 1284 * 1285 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1286 * Version 1 1287 * 1288 ******************************************************************************/ 1289 1290 typedef struct acpi_table_msct 1291 { 1292 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1293 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1294 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1295 UINT32 MaxClockDomains; /* Max number of clock domains */ 1296 UINT64 MaxAddress; /* Max physical address in system */ 1297 1298 } ACPI_TABLE_MSCT; 1299 1300 1301 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1302 1303 typedef struct acpi_msct_proximity 1304 { 1305 UINT8 Revision; 1306 UINT8 Length; 1307 UINT32 RangeStart; /* Start of domain range */ 1308 UINT32 RangeEnd; /* End of domain range */ 1309 UINT32 ProcessorCapacity; 1310 UINT64 MemoryCapacity; /* In bytes */ 1311 1312 } ACPI_MSCT_PROXIMITY; 1313 1314 1315 /******************************************************************************* 1316 * 1317 * MSDM - Microsoft Data Management table 1318 * 1319 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1320 * November 29, 2011. Copyright 2011 Microsoft 1321 * 1322 ******************************************************************************/ 1323 1324 /* Basic MSDM table is only the common ACPI header */ 1325 1326 typedef struct acpi_table_msdm 1327 { 1328 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1329 1330 } ACPI_TABLE_MSDM; 1331 1332 1333 /******************************************************************************* 1334 * 1335 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1336 * Version 1 1337 * 1338 ******************************************************************************/ 1339 1340 typedef struct acpi_table_nfit 1341 { 1342 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1343 UINT32 Reserved; /* Reserved, must be zero */ 1344 1345 } ACPI_TABLE_NFIT; 1346 1347 /* Subtable header for NFIT */ 1348 1349 typedef struct acpi_nfit_header 1350 { 1351 UINT16 Type; 1352 UINT16 Length; 1353 1354 } ACPI_NFIT_HEADER; 1355 1356 1357 /* Values for subtable type in ACPI_NFIT_HEADER */ 1358 1359 enum AcpiNfitType 1360 { 1361 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1362 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1363 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1364 ACPI_NFIT_TYPE_SMBIOS = 3, 1365 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1366 ACPI_NFIT_TYPE_DATA_REGION = 5, 1367 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1368 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1369 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1370 }; 1371 1372 /* 1373 * NFIT Subtables 1374 */ 1375 1376 /* 0: System Physical Address Range Structure */ 1377 1378 typedef struct acpi_nfit_system_address 1379 { 1380 ACPI_NFIT_HEADER Header; 1381 UINT16 RangeIndex; 1382 UINT16 Flags; 1383 UINT32 Reserved; /* Reserved, must be zero */ 1384 UINT32 ProximityDomain; 1385 UINT8 RangeGuid[16]; 1386 UINT64 Address; 1387 UINT64 Length; 1388 UINT64 MemoryMapping; 1389 UINT64 LocationCookie; /* ACPI 6.4 */ 1390 1391 } ACPI_NFIT_SYSTEM_ADDRESS; 1392 1393 /* Flags */ 1394 1395 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1396 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1397 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1398 1399 /* Range Type GUIDs appear in the include/acuuid.h file */ 1400 1401 1402 /* 1: Memory Device to System Address Range Map Structure */ 1403 1404 typedef struct acpi_nfit_memory_map 1405 { 1406 ACPI_NFIT_HEADER Header; 1407 UINT32 DeviceHandle; 1408 UINT16 PhysicalId; 1409 UINT16 RegionId; 1410 UINT16 RangeIndex; 1411 UINT16 RegionIndex; 1412 UINT64 RegionSize; 1413 UINT64 RegionOffset; 1414 UINT64 Address; 1415 UINT16 InterleaveIndex; 1416 UINT16 InterleaveWays; 1417 UINT16 Flags; 1418 UINT16 Reserved; /* Reserved, must be zero */ 1419 1420 } ACPI_NFIT_MEMORY_MAP; 1421 1422 /* Flags */ 1423 1424 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1425 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1426 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1427 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1428 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1429 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1430 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1431 1432 1433 /* 2: Interleave Structure */ 1434 1435 typedef struct acpi_nfit_interleave 1436 { 1437 ACPI_NFIT_HEADER Header; 1438 UINT16 InterleaveIndex; 1439 UINT16 Reserved; /* Reserved, must be zero */ 1440 UINT32 LineCount; 1441 UINT32 LineSize; 1442 UINT32 LineOffset[1]; /* Variable length */ 1443 1444 } ACPI_NFIT_INTERLEAVE; 1445 1446 1447 /* 3: SMBIOS Management Information Structure */ 1448 1449 typedef struct acpi_nfit_smbios 1450 { 1451 ACPI_NFIT_HEADER Header; 1452 UINT32 Reserved; /* Reserved, must be zero */ 1453 UINT8 Data[1]; /* Variable length */ 1454 1455 } ACPI_NFIT_SMBIOS; 1456 1457 1458 /* 4: NVDIMM Control Region Structure */ 1459 1460 typedef struct acpi_nfit_control_region 1461 { 1462 ACPI_NFIT_HEADER Header; 1463 UINT16 RegionIndex; 1464 UINT16 VendorId; 1465 UINT16 DeviceId; 1466 UINT16 RevisionId; 1467 UINT16 SubsystemVendorId; 1468 UINT16 SubsystemDeviceId; 1469 UINT16 SubsystemRevisionId; 1470 UINT8 ValidFields; 1471 UINT8 ManufacturingLocation; 1472 UINT16 ManufacturingDate; 1473 UINT8 Reserved[2]; /* Reserved, must be zero */ 1474 UINT32 SerialNumber; 1475 UINT16 Code; 1476 UINT16 Windows; 1477 UINT64 WindowSize; 1478 UINT64 CommandOffset; 1479 UINT64 CommandSize; 1480 UINT64 StatusOffset; 1481 UINT64 StatusSize; 1482 UINT16 Flags; 1483 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1484 1485 } ACPI_NFIT_CONTROL_REGION; 1486 1487 /* Flags */ 1488 1489 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1490 1491 /* ValidFields bits */ 1492 1493 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1494 1495 1496 /* 5: NVDIMM Block Data Window Region Structure */ 1497 1498 typedef struct acpi_nfit_data_region 1499 { 1500 ACPI_NFIT_HEADER Header; 1501 UINT16 RegionIndex; 1502 UINT16 Windows; 1503 UINT64 Offset; 1504 UINT64 Size; 1505 UINT64 Capacity; 1506 UINT64 StartAddress; 1507 1508 } ACPI_NFIT_DATA_REGION; 1509 1510 1511 /* 6: Flush Hint Address Structure */ 1512 1513 typedef struct acpi_nfit_flush_address 1514 { 1515 ACPI_NFIT_HEADER Header; 1516 UINT32 DeviceHandle; 1517 UINT16 HintCount; 1518 UINT8 Reserved[6]; /* Reserved, must be zero */ 1519 UINT64 HintAddress[1]; /* Variable length */ 1520 1521 } ACPI_NFIT_FLUSH_ADDRESS; 1522 1523 1524 /* 7: Platform Capabilities Structure */ 1525 1526 typedef struct acpi_nfit_capabilities 1527 { 1528 ACPI_NFIT_HEADER Header; 1529 UINT8 HighestCapability; 1530 UINT8 Reserved[3]; /* Reserved, must be zero */ 1531 UINT32 Capabilities; 1532 UINT32 Reserved2; 1533 1534 } ACPI_NFIT_CAPABILITIES; 1535 1536 /* Capabilities Flags */ 1537 1538 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1539 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1540 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1541 1542 1543 /* 1544 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1545 */ 1546 typedef struct nfit_device_handle 1547 { 1548 UINT32 Handle; 1549 1550 } NFIT_DEVICE_HANDLE; 1551 1552 /* Device handle construction and extraction macros */ 1553 1554 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1555 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1556 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1557 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1558 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1559 1560 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1561 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1562 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1563 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1564 #define ACPI_NFIT_NODE_ID_OFFSET 16 1565 1566 /* Macro to construct a NFIT/NVDIMM device handle */ 1567 1568 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1569 ((dimm) | \ 1570 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1571 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1572 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1573 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1574 1575 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1576 1577 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1578 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1579 1580 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1581 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1582 1583 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1584 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1585 1586 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1587 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1588 1589 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1590 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1591 1592 1593 /******************************************************************************* 1594 * 1595 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1596 * Version 2 (ACPI 6.2) 1597 * 1598 ******************************************************************************/ 1599 1600 typedef struct acpi_table_pcct 1601 { 1602 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1603 UINT32 Flags; 1604 UINT64 Reserved; 1605 1606 } ACPI_TABLE_PCCT; 1607 1608 /* Values for Flags field above */ 1609 1610 #define ACPI_PCCT_DOORBELL 1 1611 1612 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1613 1614 enum AcpiPcctType 1615 { 1616 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1617 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1618 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1619 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1620 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1621 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1622 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1623 }; 1624 1625 /* 1626 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1627 */ 1628 1629 /* 0: Generic Communications Subspace */ 1630 1631 typedef struct acpi_pcct_subspace 1632 { 1633 ACPI_SUBTABLE_HEADER Header; 1634 UINT8 Reserved[6]; 1635 UINT64 BaseAddress; 1636 UINT64 Length; 1637 ACPI_GENERIC_ADDRESS DoorbellRegister; 1638 UINT64 PreserveMask; 1639 UINT64 WriteMask; 1640 UINT32 Latency; 1641 UINT32 MaxAccessRate; 1642 UINT16 MinTurnaroundTime; 1643 1644 } ACPI_PCCT_SUBSPACE; 1645 1646 1647 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1648 1649 typedef struct acpi_pcct_hw_reduced 1650 { 1651 ACPI_SUBTABLE_HEADER Header; 1652 UINT32 PlatformInterrupt; 1653 UINT8 Flags; 1654 UINT8 Reserved; 1655 UINT64 BaseAddress; 1656 UINT64 Length; 1657 ACPI_GENERIC_ADDRESS DoorbellRegister; 1658 UINT64 PreserveMask; 1659 UINT64 WriteMask; 1660 UINT32 Latency; 1661 UINT32 MaxAccessRate; 1662 UINT16 MinTurnaroundTime; 1663 1664 } ACPI_PCCT_HW_REDUCED; 1665 1666 1667 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1668 1669 typedef struct acpi_pcct_hw_reduced_type2 1670 { 1671 ACPI_SUBTABLE_HEADER Header; 1672 UINT32 PlatformInterrupt; 1673 UINT8 Flags; 1674 UINT8 Reserved; 1675 UINT64 BaseAddress; 1676 UINT64 Length; 1677 ACPI_GENERIC_ADDRESS DoorbellRegister; 1678 UINT64 PreserveMask; 1679 UINT64 WriteMask; 1680 UINT32 Latency; 1681 UINT32 MaxAccessRate; 1682 UINT16 MinTurnaroundTime; 1683 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1684 UINT64 AckPreserveMask; 1685 UINT64 AckWriteMask; 1686 1687 } ACPI_PCCT_HW_REDUCED_TYPE2; 1688 1689 1690 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1691 1692 typedef struct acpi_pcct_ext_pcc_master 1693 { 1694 ACPI_SUBTABLE_HEADER Header; 1695 UINT32 PlatformInterrupt; 1696 UINT8 Flags; 1697 UINT8 Reserved1; 1698 UINT64 BaseAddress; 1699 UINT32 Length; 1700 ACPI_GENERIC_ADDRESS DoorbellRegister; 1701 UINT64 PreserveMask; 1702 UINT64 WriteMask; 1703 UINT32 Latency; 1704 UINT32 MaxAccessRate; 1705 UINT32 MinTurnaroundTime; 1706 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1707 UINT64 AckPreserveMask; 1708 UINT64 AckSetMask; 1709 UINT64 Reserved2; 1710 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1711 UINT64 CmdCompleteMask; 1712 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1713 UINT64 CmdUpdatePreserveMask; 1714 UINT64 CmdUpdateSetMask; 1715 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1716 UINT64 ErrorStatusMask; 1717 1718 } ACPI_PCCT_EXT_PCC_MASTER; 1719 1720 1721 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1722 1723 typedef struct acpi_pcct_ext_pcc_slave 1724 { 1725 ACPI_SUBTABLE_HEADER Header; 1726 UINT32 PlatformInterrupt; 1727 UINT8 Flags; 1728 UINT8 Reserved1; 1729 UINT64 BaseAddress; 1730 UINT32 Length; 1731 ACPI_GENERIC_ADDRESS DoorbellRegister; 1732 UINT64 PreserveMask; 1733 UINT64 WriteMask; 1734 UINT32 Latency; 1735 UINT32 MaxAccessRate; 1736 UINT32 MinTurnaroundTime; 1737 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1738 UINT64 AckPreserveMask; 1739 UINT64 AckSetMask; 1740 UINT64 Reserved2; 1741 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1742 UINT64 CmdCompleteMask; 1743 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1744 UINT64 CmdUpdatePreserveMask; 1745 UINT64 CmdUpdateSetMask; 1746 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1747 UINT64 ErrorStatusMask; 1748 1749 } ACPI_PCCT_EXT_PCC_SLAVE; 1750 1751 /* 5: HW Registers based Communications Subspace */ 1752 1753 typedef struct acpi_pcct_hw_reg 1754 { 1755 ACPI_SUBTABLE_HEADER Header; 1756 UINT16 Version; 1757 UINT64 BaseAddress; 1758 UINT64 Length; 1759 ACPI_GENERIC_ADDRESS DoorbellRegister; 1760 UINT64 DoorbellPreserve; 1761 UINT64 DoorbellWrite; 1762 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1763 UINT64 CmdCompleteMask; 1764 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1765 UINT64 ErrorStatusMask; 1766 UINT32 NominalLatency; 1767 UINT32 MinTurnaroundTime; 1768 1769 } ACPI_PCCT_HW_REG; 1770 1771 1772 /* Values for doorbell flags above */ 1773 1774 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1775 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1776 1777 1778 /* 1779 * PCC memory structures (not part of the ACPI table) 1780 */ 1781 1782 /* Shared Memory Region */ 1783 1784 typedef struct acpi_pcct_shared_memory 1785 { 1786 UINT32 Signature; 1787 UINT16 Command; 1788 UINT16 Status; 1789 1790 } ACPI_PCCT_SHARED_MEMORY; 1791 1792 1793 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1794 1795 typedef struct acpi_pcct_ext_pcc_shared_memory 1796 { 1797 UINT32 Signature; 1798 UINT32 Flags; 1799 UINT32 Length; 1800 UINT32 Command; 1801 1802 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1803 1804 1805 /******************************************************************************* 1806 * 1807 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1808 * Version 0 1809 * 1810 ******************************************************************************/ 1811 1812 typedef struct acpi_table_pdtt 1813 { 1814 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1815 UINT8 TriggerCount; 1816 UINT8 Reserved[3]; 1817 UINT32 ArrayOffset; 1818 1819 } ACPI_TABLE_PDTT; 1820 1821 1822 /* 1823 * PDTT Communication Channel Identifier Structure. 1824 * The number of these structures is defined by TriggerCount above, 1825 * starting at ArrayOffset. 1826 */ 1827 typedef struct acpi_pdtt_channel 1828 { 1829 UINT8 SubchannelId; 1830 UINT8 Flags; 1831 1832 } ACPI_PDTT_CHANNEL; 1833 1834 /* Flags for above */ 1835 1836 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1837 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1838 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1839 1840 1841 /******************************************************************************* 1842 * 1843 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1844 * Version 1 1845 * 1846 ******************************************************************************/ 1847 1848 typedef struct acpi_table_phat 1849 { 1850 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1851 1852 } ACPI_TABLE_PHAT; 1853 1854 /* Common header for PHAT subtables that follow main table */ 1855 1856 typedef struct acpi_phat_header 1857 { 1858 UINT16 Type; 1859 UINT16 Length; 1860 UINT8 Revision; 1861 1862 } ACPI_PHAT_HEADER; 1863 1864 1865 /* Values for Type field above */ 1866 1867 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1868 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1869 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1870 1871 /* 1872 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 1873 */ 1874 1875 /* 0: Firmware Version Data Record */ 1876 1877 typedef struct acpi_phat_version_data 1878 { 1879 ACPI_PHAT_HEADER Header; 1880 UINT8 Reserved[3]; 1881 UINT32 ElementCount; 1882 1883 } ACPI_PHAT_VERSION_DATA; 1884 1885 typedef struct acpi_phat_version_element 1886 { 1887 UINT8 Guid[16]; 1888 UINT64 VersionValue; 1889 UINT32 ProducerId; 1890 1891 } ACPI_PHAT_VERSION_ELEMENT; 1892 1893 1894 /* 1: Firmware Health Data Record */ 1895 1896 typedef struct acpi_phat_health_data 1897 { 1898 ACPI_PHAT_HEADER Header; 1899 UINT8 Reserved[2]; 1900 UINT8 Health; 1901 UINT8 DeviceGuid[16]; 1902 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 1903 1904 } ACPI_PHAT_HEALTH_DATA; 1905 1906 /* Values for Health field above */ 1907 1908 #define ACPI_PHAT_ERRORS_FOUND 0 1909 #define ACPI_PHAT_NO_ERRORS 1 1910 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1911 #define ACPI_PHAT_ADVISORY 3 1912 1913 1914 /******************************************************************************* 1915 * 1916 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1917 * Version 1 1918 * 1919 ******************************************************************************/ 1920 1921 typedef struct acpi_table_pmtt 1922 { 1923 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1924 UINT32 MemoryDeviceCount; 1925 /* 1926 * Immediately followed by: 1927 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1928 */ 1929 1930 } ACPI_TABLE_PMTT; 1931 1932 1933 /* Common header for PMTT subtables that follow main table */ 1934 1935 typedef struct acpi_pmtt_header 1936 { 1937 UINT8 Type; 1938 UINT8 Reserved1; 1939 UINT16 Length; 1940 UINT16 Flags; 1941 UINT16 Reserved2; 1942 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 1943 /* 1944 * Immediately followed by: 1945 * UINT8 TypeSpecificData[] 1946 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1947 */ 1948 1949 } ACPI_PMTT_HEADER; 1950 1951 /* Values for Type field above */ 1952 1953 #define ACPI_PMTT_TYPE_SOCKET 0 1954 #define ACPI_PMTT_TYPE_CONTROLLER 1 1955 #define ACPI_PMTT_TYPE_DIMM 2 1956 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 1957 #define ACPI_PMTT_TYPE_VENDOR 0xFF 1958 1959 /* Values for Flags field above */ 1960 1961 #define ACPI_PMTT_TOP_LEVEL 0x0001 1962 #define ACPI_PMTT_PHYSICAL 0x0002 1963 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1964 1965 1966 /* 1967 * PMTT subtables, correspond to Type in acpi_pmtt_header 1968 */ 1969 1970 1971 /* 0: Socket Structure */ 1972 1973 typedef struct acpi_pmtt_socket 1974 { 1975 ACPI_PMTT_HEADER Header; 1976 UINT16 SocketId; 1977 UINT16 Reserved; 1978 1979 } ACPI_PMTT_SOCKET; 1980 /* 1981 * Immediately followed by: 1982 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1983 */ 1984 1985 1986 /* 1: Memory Controller subtable */ 1987 1988 typedef struct acpi_pmtt_controller 1989 { 1990 ACPI_PMTT_HEADER Header; 1991 UINT16 ControllerId; 1992 UINT16 Reserved; 1993 1994 } ACPI_PMTT_CONTROLLER; 1995 /* 1996 * Immediately followed by: 1997 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1998 */ 1999 2000 2001 /* 2: Physical Component Identifier (DIMM) */ 2002 2003 typedef struct acpi_pmtt_physical_component 2004 { 2005 ACPI_PMTT_HEADER Header; 2006 UINT32 BiosHandle; 2007 2008 } ACPI_PMTT_PHYSICAL_COMPONENT; 2009 2010 2011 /* 0xFF: Vendor Specific Data */ 2012 2013 typedef struct acpi_pmtt_vendor_specific 2014 { 2015 ACPI_PMTT_HEADER Header; 2016 UINT8 TypeUuid[16]; 2017 UINT8 Specific[]; 2018 /* 2019 * Immediately followed by: 2020 * UINT8 VendorSpecificData[]; 2021 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 2022 */ 2023 2024 } ACPI_PMTT_VENDOR_SPECIFIC; 2025 2026 2027 /******************************************************************************* 2028 * 2029 * PPTT - Processor Properties Topology Table (ACPI 6.2) 2030 * Version 1 2031 * 2032 ******************************************************************************/ 2033 2034 typedef struct acpi_table_pptt 2035 { 2036 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2037 2038 } ACPI_TABLE_PPTT; 2039 2040 /* Values for Type field above */ 2041 2042 enum AcpiPpttType 2043 { 2044 ACPI_PPTT_TYPE_PROCESSOR = 0, 2045 ACPI_PPTT_TYPE_CACHE = 1, 2046 ACPI_PPTT_TYPE_ID = 2, 2047 ACPI_PPTT_TYPE_RESERVED = 3 2048 }; 2049 2050 2051 /* 0: Processor Hierarchy Node Structure */ 2052 2053 typedef struct acpi_pptt_processor 2054 { 2055 ACPI_SUBTABLE_HEADER Header; 2056 UINT16 Reserved; 2057 UINT32 Flags; 2058 UINT32 Parent; 2059 UINT32 AcpiProcessorId; 2060 UINT32 NumberOfPrivResources; 2061 2062 } ACPI_PPTT_PROCESSOR; 2063 2064 /* Flags */ 2065 2066 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2067 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2068 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2069 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2070 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2071 2072 2073 /* 1: Cache Type Structure */ 2074 2075 typedef struct acpi_pptt_cache 2076 { 2077 ACPI_SUBTABLE_HEADER Header; 2078 UINT16 Reserved; 2079 UINT32 Flags; 2080 UINT32 NextLevelOfCache; 2081 UINT32 Size; 2082 UINT32 NumberOfSets; 2083 UINT8 Associativity; 2084 UINT8 Attributes; 2085 UINT16 LineSize; 2086 2087 } ACPI_PPTT_CACHE; 2088 2089 /* 1: Cache Type Structure for PPTT version 3 */ 2090 2091 typedef struct acpi_pptt_cache_v1 2092 { 2093 UINT32 CacheId; 2094 2095 } ACPI_PPTT_CACHE_V1; 2096 2097 2098 /* Flags */ 2099 2100 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2101 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2102 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2103 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2104 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2105 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2106 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2107 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2108 2109 /* Masks for Attributes */ 2110 2111 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2112 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2113 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2114 2115 /* Attributes describing cache */ 2116 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2117 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2118 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2119 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2120 2121 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2122 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2123 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2124 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2125 2126 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2127 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2128 2129 /* 2: ID Structure */ 2130 2131 typedef struct acpi_pptt_id 2132 { 2133 ACPI_SUBTABLE_HEADER Header; 2134 UINT16 Reserved; 2135 UINT32 VendorId; 2136 UINT64 Level1Id; 2137 UINT64 Level2Id; 2138 UINT16 MajorRev; 2139 UINT16 MinorRev; 2140 UINT16 SpinRev; 2141 2142 } ACPI_PPTT_ID; 2143 2144 2145 /******************************************************************************* 2146 * 2147 * PRMT - Platform Runtime Mechanism Table 2148 * Version 1 2149 * 2150 ******************************************************************************/ 2151 2152 typedef struct acpi_table_prmt 2153 { 2154 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2155 2156 } ACPI_TABLE_PRMT; 2157 2158 typedef struct acpi_table_prmt_header 2159 { 2160 UINT8 PlatformGuid[16]; 2161 UINT32 ModuleInfoOffset; 2162 UINT32 ModuleInfoCount; 2163 2164 } ACPI_TABLE_PRMT_HEADER; 2165 2166 typedef struct acpi_prmt_module_info 2167 { 2168 UINT16 Revision; 2169 UINT16 Length; 2170 UINT8 ModuleGuid[16]; 2171 UINT16 MajorRev; 2172 UINT16 MinorRev; 2173 UINT16 HandlerInfoCount; 2174 UINT32 HandlerInfoOffset; 2175 UINT64 MmioListPointer; 2176 2177 } ACPI_PRMT_MODULE_INFO; 2178 2179 typedef struct acpi_prmt_handler_info 2180 { 2181 UINT16 Revision; 2182 UINT16 Length; 2183 UINT8 HandlerGuid[16]; 2184 UINT64 HandlerAddress; 2185 UINT64 StaticDataBufferAddress; 2186 UINT64 AcpiParamBufferAddress; 2187 2188 } ACPI_PRMT_HANDLER_INFO; 2189 2190 2191 /******************************************************************************* 2192 * 2193 * RASF - RAS Feature Table (ACPI 5.0) 2194 * Version 1 2195 * 2196 ******************************************************************************/ 2197 2198 typedef struct acpi_table_rasf 2199 { 2200 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2201 UINT8 ChannelId[12]; 2202 2203 } ACPI_TABLE_RASF; 2204 2205 /* RASF Platform Communication Channel Shared Memory Region */ 2206 2207 typedef struct acpi_rasf_shared_memory 2208 { 2209 UINT32 Signature; 2210 UINT16 Command; 2211 UINT16 Status; 2212 UINT16 Version; 2213 UINT8 Capabilities[16]; 2214 UINT8 SetCapabilities[16]; 2215 UINT16 NumParameterBlocks; 2216 UINT32 SetCapabilitiesStatus; 2217 2218 } ACPI_RASF_SHARED_MEMORY; 2219 2220 /* RASF Parameter Block Structure Header */ 2221 2222 typedef struct acpi_rasf_parameter_block 2223 { 2224 UINT16 Type; 2225 UINT16 Version; 2226 UINT16 Length; 2227 2228 } ACPI_RASF_PARAMETER_BLOCK; 2229 2230 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2231 2232 typedef struct acpi_rasf_patrol_scrub_parameter 2233 { 2234 ACPI_RASF_PARAMETER_BLOCK Header; 2235 UINT16 PatrolScrubCommand; 2236 UINT64 RequestedAddressRange[2]; 2237 UINT64 ActualAddressRange[2]; 2238 UINT16 Flags; 2239 UINT8 RequestedSpeed; 2240 2241 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2242 2243 /* Masks for Flags and Speed fields above */ 2244 2245 #define ACPI_RASF_SCRUBBER_RUNNING 1 2246 #define ACPI_RASF_SPEED (7<<1) 2247 #define ACPI_RASF_SPEED_SLOW (0<<1) 2248 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2249 #define ACPI_RASF_SPEED_FAST (7<<1) 2250 2251 /* Channel Commands */ 2252 2253 enum AcpiRasfCommands 2254 { 2255 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2256 }; 2257 2258 /* Platform RAS Capabilities */ 2259 2260 enum AcpiRasfCapabiliities 2261 { 2262 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2263 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2264 }; 2265 2266 /* Patrol Scrub Commands */ 2267 2268 enum AcpiRasfPatrolScrubCommands 2269 { 2270 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2271 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2272 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2273 }; 2274 2275 /* Channel Command flags */ 2276 2277 #define ACPI_RASF_GENERATE_SCI (1<<15) 2278 2279 /* Status values */ 2280 2281 enum AcpiRasfStatus 2282 { 2283 ACPI_RASF_SUCCESS = 0, 2284 ACPI_RASF_NOT_VALID = 1, 2285 ACPI_RASF_NOT_SUPPORTED = 2, 2286 ACPI_RASF_BUSY = 3, 2287 ACPI_RASF_FAILED = 4, 2288 ACPI_RASF_ABORTED = 5, 2289 ACPI_RASF_INVALID_DATA = 6 2290 }; 2291 2292 /* Status flags */ 2293 2294 #define ACPI_RASF_COMMAND_COMPLETE (1) 2295 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2296 #define ACPI_RASF_ERROR (1<<2) 2297 #define ACPI_RASF_STATUS (0x1F<<3) 2298 2299 2300 /******************************************************************************* 2301 * 2302 * RGRT - Regulatory Graphics Resource Table 2303 * Version 1 2304 * 2305 * Conforms to "ACPI RGRT" available at: 2306 * https://microsoft.github.io/mu/dyn/mu_plus/MsCorePkg/AcpiRGRT/feature_acpi_rgrt/ 2307 * 2308 ******************************************************************************/ 2309 2310 typedef struct acpi_table_rgrt 2311 { 2312 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2313 UINT16 Version; 2314 UINT8 ImageType; 2315 UINT8 Reserved; 2316 UINT8 Image[0]; 2317 2318 } ACPI_TABLE_RGRT; 2319 2320 /* ImageType values */ 2321 2322 enum AcpiRgrtImageType 2323 { 2324 ACPI_RGRT_TYPE_RESERVED0 = 0, 2325 ACPI_RGRT_IMAGE_TYPE_PNG = 1, 2326 ACPI_RGRT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2327 }; 2328 2329 2330 /******************************************************************************* 2331 * 2332 * SBST - Smart Battery Specification Table 2333 * Version 1 2334 * 2335 ******************************************************************************/ 2336 2337 typedef struct acpi_table_sbst 2338 { 2339 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2340 UINT32 WarningLevel; 2341 UINT32 LowLevel; 2342 UINT32 CriticalLevel; 2343 2344 } ACPI_TABLE_SBST; 2345 2346 2347 /******************************************************************************* 2348 * 2349 * SDEI - Software Delegated Exception Interface Descriptor Table 2350 * 2351 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2352 * May 8th, 2017. Copyright 2017 ARM Ltd. 2353 * 2354 ******************************************************************************/ 2355 2356 typedef struct acpi_table_sdei 2357 { 2358 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2359 2360 } ACPI_TABLE_SDEI; 2361 2362 2363 /******************************************************************************* 2364 * 2365 * SDEV - Secure Devices Table (ACPI 6.2) 2366 * Version 1 2367 * 2368 ******************************************************************************/ 2369 2370 typedef struct acpi_table_sdev 2371 { 2372 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2373 2374 } ACPI_TABLE_SDEV; 2375 2376 2377 typedef struct acpi_sdev_header 2378 { 2379 UINT8 Type; 2380 UINT8 Flags; 2381 UINT16 Length; 2382 2383 } ACPI_SDEV_HEADER; 2384 2385 2386 /* Values for subtable type above */ 2387 2388 enum AcpiSdevType 2389 { 2390 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2391 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2392 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2393 }; 2394 2395 /* Values for flags above */ 2396 2397 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2398 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2399 2400 /* 2401 * SDEV subtables 2402 */ 2403 2404 /* 0: Namespace Device Based Secure Device Structure */ 2405 2406 typedef struct acpi_sdev_namespace 2407 { 2408 ACPI_SDEV_HEADER Header; 2409 UINT16 DeviceIdOffset; 2410 UINT16 DeviceIdLength; 2411 UINT16 VendorDataOffset; 2412 UINT16 VendorDataLength; 2413 2414 } ACPI_SDEV_NAMESPACE; 2415 2416 typedef struct acpi_sdev_secure_component 2417 { 2418 UINT16 SecureComponentOffset; 2419 UINT16 SecureComponentLength; 2420 2421 } ACPI_SDEV_SECURE_COMPONENT; 2422 2423 2424 /* 2425 * SDEV sub-subtables ("Components") for above 2426 */ 2427 typedef struct acpi_sdev_component 2428 { 2429 ACPI_SDEV_HEADER Header; 2430 2431 } ACPI_SDEV_COMPONENT; 2432 2433 2434 /* Values for sub-subtable type above */ 2435 2436 enum AcpiSacType 2437 { 2438 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2439 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2440 }; 2441 2442 typedef struct acpi_sdev_id_component 2443 { 2444 ACPI_SDEV_HEADER Header; 2445 UINT16 HardwareIdOffset; 2446 UINT16 HardwareIdLength; 2447 UINT16 SubsystemIdOffset; 2448 UINT16 SubsystemIdLength; 2449 UINT16 HardwareRevision; 2450 UINT8 HardwareRevPresent; 2451 UINT8 ClassCodePresent; 2452 UINT8 PciBaseClass; 2453 UINT8 PciSubClass; 2454 UINT8 PciProgrammingXface; 2455 2456 } ACPI_SDEV_ID_COMPONENT; 2457 2458 typedef struct acpi_sdev_mem_component 2459 { 2460 ACPI_SDEV_HEADER Header; 2461 UINT32 Reserved; 2462 UINT64 MemoryBaseAddress; 2463 UINT64 MemoryLength; 2464 2465 } ACPI_SDEV_MEM_COMPONENT; 2466 2467 2468 /* 1: PCIe Endpoint Device Based Device Structure */ 2469 2470 typedef struct acpi_sdev_pcie 2471 { 2472 ACPI_SDEV_HEADER Header; 2473 UINT16 Segment; 2474 UINT16 StartBus; 2475 UINT16 PathOffset; 2476 UINT16 PathLength; 2477 UINT16 VendorDataOffset; 2478 UINT16 VendorDataLength; 2479 2480 } ACPI_SDEV_PCIE; 2481 2482 /* 1a: PCIe Endpoint path entry */ 2483 2484 typedef struct acpi_sdev_pcie_path 2485 { 2486 UINT8 Device; 2487 UINT8 Function; 2488 2489 } ACPI_SDEV_PCIE_PATH; 2490 2491 2492 /******************************************************************************* 2493 * 2494 * SVKL - Storage Volume Key Location Table (ACPI 6.4) 2495 * From: "Guest-Host-Communication Interface (GHCI) for Intel 2496 * Trust Domain Extensions (Intel TDX)". 2497 * Version 1 2498 * 2499 ******************************************************************************/ 2500 2501 typedef struct acpi_table_svkl 2502 { 2503 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2504 UINT32 Count; 2505 2506 } ACPI_TABLE_SVKL; 2507 2508 typedef struct acpi_svkl_key 2509 { 2510 UINT16 Type; 2511 UINT16 Format; 2512 UINT32 Size; 2513 UINT64 Address; 2514 2515 } ACPI_SVKL_KEY; 2516 2517 enum acpi_svkl_type 2518 { 2519 ACPI_SVKL_TYPE_MAIN_STORAGE = 0, 2520 ACPI_SVKL_TYPE_RESERVED = 1 /* 1 and greater are reserved */ 2521 }; 2522 2523 enum acpi_svkl_format 2524 { 2525 ACPI_SVKL_FORMAT_RAW_BINARY = 0, 2526 ACPI_SVKL_FORMAT_RESERVED = 1 /* 1 and greater are reserved */ 2527 }; 2528 2529 2530 /* Reset to default packing */ 2531 2532 #pragma pack() 2533 2534 #endif /* __ACTBL2_H__ */ 2535