1 /****************************************************************************** 2 * 3 * Name: actbl2.h - ACPI Table Definitions (tables not in ACPI spec) 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2021, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL2_H__ 153 #define __ACTBL2_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables (2) 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_IORT "IORT" /* IO Remapping Table */ 172 #define ACPI_SIG_IVRS "IVRS" /* I/O Virtualization Reporting Structure */ 173 #define ACPI_SIG_LPIT "LPIT" /* Low Power Idle Table */ 174 #define ACPI_SIG_MADT "APIC" /* Multiple APIC Description Table */ 175 #define ACPI_SIG_MCFG "MCFG" /* PCI Memory Mapped Configuration table */ 176 #define ACPI_SIG_MCHI "MCHI" /* Management Controller Host Interface table */ 177 #define ACPI_SIG_MPST "MPST" /* Memory Power State Table */ 178 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table */ 179 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 180 #define ACPI_SIG_NFIT "NFIT" /* NVDIMM Firmware Interface Table */ 181 #define ACPI_SIG_PCCT "PCCT" /* Platform Communications Channel Table */ 182 #define ACPI_SIG_PDTT "PDTT" /* Platform Debug Trigger Table */ 183 #define ACPI_SIG_PHAT "PHAT" /* Platform Health Assessment Table */ 184 #define ACPI_SIG_PMTT "PMTT" /* Platform Memory Topology Table */ 185 #define ACPI_SIG_PPTT "PPTT" /* Processor Properties Topology Table */ 186 #define ACPI_SIG_RASF "RASF" /* RAS Feature table */ 187 #define ACPI_SIG_SBST "SBST" /* Smart Battery Specification Table */ 188 #define ACPI_SIG_SDEI "SDEI" /* Software Delegated Exception Interface Table */ 189 #define ACPI_SIG_SDEV "SDEV" /* Secure Devices table */ 190 #define ACPI_SIG_NHLT "NHLT" /* Non-HDAudio Link Table */ 191 192 193 /* 194 * All tables must be byte-packed to match the ACPI specification, since 195 * the tables are provided by the system BIOS. 196 */ 197 #pragma pack(1) 198 199 /* 200 * Note: C bitfields are not used for this reason: 201 * 202 * "Bitfields are great and easy to read, but unfortunately the C language 203 * does not specify the layout of bitfields in memory, which means they are 204 * essentially useless for dealing with packed data in on-disk formats or 205 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 206 * this decision was a design error in C. Ritchie could have picked an order 207 * and stuck with it." Norman Ramsey. 208 * See http://stackoverflow.com/a/1053662/41661 209 */ 210 211 212 /******************************************************************************* 213 * 214 * IORT - IO Remapping Table 215 * 216 * Conforms to "IO Remapping Table System Software on ARM Platforms", 217 * Document number: ARM DEN 0049E.b, Feb 2021 218 * 219 ******************************************************************************/ 220 221 typedef struct acpi_table_iort 222 { 223 ACPI_TABLE_HEADER Header; 224 UINT32 NodeCount; 225 UINT32 NodeOffset; 226 UINT32 Reserved; 227 228 } ACPI_TABLE_IORT; 229 230 231 /* 232 * IORT subtables 233 */ 234 typedef struct acpi_iort_node 235 { 236 UINT8 Type; 237 UINT16 Length; 238 UINT8 Revision; 239 UINT32 Identifier; 240 UINT32 MappingCount; 241 UINT32 MappingOffset; 242 char NodeData[1]; 243 244 } ACPI_IORT_NODE; 245 246 /* Values for subtable Type above */ 247 248 enum AcpiIortNodeType 249 { 250 ACPI_IORT_NODE_ITS_GROUP = 0x00, 251 ACPI_IORT_NODE_NAMED_COMPONENT = 0x01, 252 ACPI_IORT_NODE_PCI_ROOT_COMPLEX = 0x02, 253 ACPI_IORT_NODE_SMMU = 0x03, 254 ACPI_IORT_NODE_SMMU_V3 = 0x04, 255 ACPI_IORT_NODE_PMCG = 0x05, 256 ACPI_IORT_NODE_RMR = 0x06, 257 }; 258 259 260 typedef struct acpi_iort_id_mapping 261 { 262 UINT32 InputBase; /* Lowest value in input range */ 263 UINT32 IdCount; /* Number of IDs */ 264 UINT32 OutputBase; /* Lowest value in output range */ 265 UINT32 OutputReference; /* A reference to the output node */ 266 UINT32 Flags; 267 268 } ACPI_IORT_ID_MAPPING; 269 270 /* Masks for Flags field above for IORT subtable */ 271 272 #define ACPI_IORT_ID_SINGLE_MAPPING (1) 273 274 275 typedef struct acpi_iort_memory_access 276 { 277 UINT32 CacheCoherency; 278 UINT8 Hints; 279 UINT16 Reserved; 280 UINT8 MemoryFlags; 281 282 } ACPI_IORT_MEMORY_ACCESS; 283 284 /* Values for CacheCoherency field above */ 285 286 #define ACPI_IORT_NODE_COHERENT 0x00000001 /* The device node is fully coherent */ 287 #define ACPI_IORT_NODE_NOT_COHERENT 0x00000000 /* The device node is not coherent */ 288 289 /* Masks for Hints field above */ 290 291 #define ACPI_IORT_HT_TRANSIENT (1) 292 #define ACPI_IORT_HT_WRITE (1<<1) 293 #define ACPI_IORT_HT_READ (1<<2) 294 #define ACPI_IORT_HT_OVERRIDE (1<<3) 295 296 /* Masks for MemoryFlags field above */ 297 298 #define ACPI_IORT_MF_COHERENCY (1) 299 #define ACPI_IORT_MF_ATTRIBUTES (1<<1) 300 301 302 /* 303 * IORT node specific subtables 304 */ 305 typedef struct acpi_iort_its_group 306 { 307 UINT32 ItsCount; 308 UINT32 Identifiers[1]; /* GIC ITS identifier array */ 309 310 } ACPI_IORT_ITS_GROUP; 311 312 313 typedef struct acpi_iort_named_component 314 { 315 UINT32 NodeFlags; 316 UINT64 MemoryProperties; /* Memory access properties */ 317 UINT8 MemoryAddressLimit; /* Memory address size limit */ 318 char DeviceName[1]; /* Path of namespace object */ 319 320 } ACPI_IORT_NAMED_COMPONENT; 321 322 /* Masks for Flags field above */ 323 324 #define ACPI_IORT_NC_STALL_SUPPORTED (1) 325 #define ACPI_IORT_NC_PASID_BITS (31<<1) 326 327 typedef struct acpi_iort_root_complex 328 { 329 UINT64 MemoryProperties; /* Memory access properties */ 330 UINT32 AtsAttribute; 331 UINT32 PciSegmentNumber; 332 UINT8 MemoryAddressLimit; /* Memory address size limit */ 333 UINT8 Reserved[3]; /* Reserved, must be zero */ 334 335 } ACPI_IORT_ROOT_COMPLEX; 336 337 /* Masks for AtsAttribute field above */ 338 339 #define ACPI_IORT_ATS_SUPPORTED (1) /* The root complex ATS support */ 340 #define ACPI_IORT_PRI_SUPPORTED (1<<1) /* The root complex PRI support */ 341 #define ACPI_IORT_PASID_FWD_SUPPORTED (1<<2) /* The root complex PASID forward support */ 342 343 344 typedef struct acpi_iort_smmu 345 { 346 UINT64 BaseAddress; /* SMMU base address */ 347 UINT64 Span; /* Length of memory range */ 348 UINT32 Model; 349 UINT32 Flags; 350 UINT32 GlobalInterruptOffset; 351 UINT32 ContextInterruptCount; 352 UINT32 ContextInterruptOffset; 353 UINT32 PmuInterruptCount; 354 UINT32 PmuInterruptOffset; 355 UINT64 Interrupts[1]; /* Interrupt array */ 356 357 } ACPI_IORT_SMMU; 358 359 /* Values for Model field above */ 360 361 #define ACPI_IORT_SMMU_V1 0x00000000 /* Generic SMMUv1 */ 362 #define ACPI_IORT_SMMU_V2 0x00000001 /* Generic SMMUv2 */ 363 #define ACPI_IORT_SMMU_CORELINK_MMU400 0x00000002 /* ARM Corelink MMU-400 */ 364 #define ACPI_IORT_SMMU_CORELINK_MMU500 0x00000003 /* ARM Corelink MMU-500 */ 365 #define ACPI_IORT_SMMU_CORELINK_MMU401 0x00000004 /* ARM Corelink MMU-401 */ 366 #define ACPI_IORT_SMMU_CAVIUM_THUNDERX 0x00000005 /* Cavium ThunderX SMMUv2 */ 367 368 /* Masks for Flags field above */ 369 370 #define ACPI_IORT_SMMU_DVM_SUPPORTED (1) 371 #define ACPI_IORT_SMMU_COHERENT_WALK (1<<1) 372 373 /* Global interrupt format */ 374 375 typedef struct acpi_iort_smmu_gsi 376 { 377 UINT32 NSgIrpt; 378 UINT32 NSgIrptFlags; 379 UINT32 NSgCfgIrpt; 380 UINT32 NSgCfgIrptFlags; 381 382 } ACPI_IORT_SMMU_GSI; 383 384 385 typedef struct acpi_iort_smmu_v3 386 { 387 UINT64 BaseAddress; /* SMMUv3 base address */ 388 UINT32 Flags; 389 UINT32 Reserved; 390 UINT64 VatosAddress; 391 UINT32 Model; 392 UINT32 EventGsiv; 393 UINT32 PriGsiv; 394 UINT32 GerrGsiv; 395 UINT32 SyncGsiv; 396 UINT32 Pxm; 397 UINT32 IdMappingIndex; 398 399 } ACPI_IORT_SMMU_V3; 400 401 /* Values for Model field above */ 402 403 #define ACPI_IORT_SMMU_V3_GENERIC 0x00000000 /* Generic SMMUv3 */ 404 #define ACPI_IORT_SMMU_V3_HISILICON_HI161X 0x00000001 /* HiSilicon Hi161x SMMUv3 */ 405 #define ACPI_IORT_SMMU_V3_CAVIUM_CN99XX 0x00000002 /* Cavium CN99xx SMMUv3 */ 406 407 /* Masks for Flags field above */ 408 409 #define ACPI_IORT_SMMU_V3_COHACC_OVERRIDE (1) 410 #define ACPI_IORT_SMMU_V3_HTTU_OVERRIDE (3<<1) 411 #define ACPI_IORT_SMMU_V3_PXM_VALID (1<<3) 412 413 typedef struct acpi_iort_pmcg 414 { 415 UINT64 Page0BaseAddress; 416 UINT32 OverflowGsiv; 417 UINT32 NodeReference; 418 UINT64 Page1BaseAddress; 419 420 } ACPI_IORT_PMCG; 421 422 typedef struct acpi_iort_rmr { 423 UINT32 Flags; 424 UINT32 RmrCount; 425 UINT32 RmrOffset; 426 427 } ACPI_IORT_RMR; 428 429 typedef struct acpi_iort_rmr_desc { 430 UINT64 BaseAddress; 431 UINT64 Length; 432 UINT32 Reserved; 433 434 } ACPI_IORT_RMR_DESC; 435 436 /******************************************************************************* 437 * 438 * IVRS - I/O Virtualization Reporting Structure 439 * Version 1 440 * 441 * Conforms to "AMD I/O Virtualization Technology (IOMMU) Specification", 442 * Revision 1.26, February 2009. 443 * 444 ******************************************************************************/ 445 446 typedef struct acpi_table_ivrs 447 { 448 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 449 UINT32 Info; /* Common virtualization info */ 450 UINT64 Reserved; 451 452 } ACPI_TABLE_IVRS; 453 454 /* Values for Info field above */ 455 456 #define ACPI_IVRS_PHYSICAL_SIZE 0x00007F00 /* 7 bits, physical address size */ 457 #define ACPI_IVRS_VIRTUAL_SIZE 0x003F8000 /* 7 bits, virtual address size */ 458 #define ACPI_IVRS_ATS_RESERVED 0x00400000 /* ATS address translation range reserved */ 459 460 461 /* IVRS subtable header */ 462 463 typedef struct acpi_ivrs_header 464 { 465 UINT8 Type; /* Subtable type */ 466 UINT8 Flags; 467 UINT16 Length; /* Subtable length */ 468 UINT16 DeviceId; /* ID of IOMMU */ 469 470 } ACPI_IVRS_HEADER; 471 472 /* Values for subtable Type above */ 473 474 enum AcpiIvrsType 475 { 476 ACPI_IVRS_TYPE_HARDWARE1 = 0x10, 477 ACPI_IVRS_TYPE_HARDWARE2 = 0x11, 478 ACPI_IVRS_TYPE_HARDWARE3 = 0x40, 479 ACPI_IVRS_TYPE_MEMORY1 = 0x20, 480 ACPI_IVRS_TYPE_MEMORY2 = 0x21, 481 ACPI_IVRS_TYPE_MEMORY3 = 0x22 482 }; 483 484 /* Masks for Flags field above for IVHD subtable */ 485 486 #define ACPI_IVHD_TT_ENABLE (1) 487 #define ACPI_IVHD_PASS_PW (1<<1) 488 #define ACPI_IVHD_RES_PASS_PW (1<<2) 489 #define ACPI_IVHD_ISOC (1<<3) 490 #define ACPI_IVHD_IOTLB (1<<4) 491 492 /* Masks for Flags field above for IVMD subtable */ 493 494 #define ACPI_IVMD_UNITY (1) 495 #define ACPI_IVMD_READ (1<<1) 496 #define ACPI_IVMD_WRITE (1<<2) 497 #define ACPI_IVMD_EXCLUSION_RANGE (1<<3) 498 499 500 /* 501 * IVRS subtables, correspond to Type in ACPI_IVRS_HEADER 502 */ 503 504 /* 0x10: I/O Virtualization Hardware Definition Block (IVHD) */ 505 506 typedef struct acpi_ivrs_hardware_10 507 { 508 ACPI_IVRS_HEADER Header; 509 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 510 UINT64 BaseAddress; /* IOMMU control registers */ 511 UINT16 PciSegmentGroup; 512 UINT16 Info; /* MSI number and unit ID */ 513 UINT32 FeatureReporting; 514 515 } ACPI_IVRS_HARDWARE1; 516 517 /* 0x11: I/O Virtualization Hardware Definition Block (IVHD) */ 518 519 typedef struct acpi_ivrs_hardware_11 520 { 521 ACPI_IVRS_HEADER Header; 522 UINT16 CapabilityOffset; /* Offset for IOMMU control fields */ 523 UINT64 BaseAddress; /* IOMMU control registers */ 524 UINT16 PciSegmentGroup; 525 UINT16 Info; /* MSI number and unit ID */ 526 UINT32 Attributes; 527 UINT64 EfrRegisterImage; 528 UINT64 Reserved; 529 } ACPI_IVRS_HARDWARE2; 530 531 /* Masks for Info field above */ 532 533 #define ACPI_IVHD_MSI_NUMBER_MASK 0x001F /* 5 bits, MSI message number */ 534 #define ACPI_IVHD_UNIT_ID_MASK 0x1F00 /* 5 bits, UnitID */ 535 536 537 /* 538 * Device Entries for IVHD subtable, appear after ACPI_IVRS_HARDWARE structure. 539 * Upper two bits of the Type field are the (encoded) length of the structure. 540 * Currently, only 4 and 8 byte entries are defined. 16 and 32 byte entries 541 * are reserved for future use but not defined. 542 */ 543 typedef struct acpi_ivrs_de_header 544 { 545 UINT8 Type; 546 UINT16 Id; 547 UINT8 DataSetting; 548 549 } ACPI_IVRS_DE_HEADER; 550 551 /* Length of device entry is in the top two bits of Type field above */ 552 553 #define ACPI_IVHD_ENTRY_LENGTH 0xC0 554 555 /* Values for device entry Type field above */ 556 557 enum AcpiIvrsDeviceEntryType 558 { 559 /* 4-byte device entries, all use ACPI_IVRS_DEVICE4 */ 560 561 ACPI_IVRS_TYPE_PAD4 = 0, 562 ACPI_IVRS_TYPE_ALL = 1, 563 ACPI_IVRS_TYPE_SELECT = 2, 564 ACPI_IVRS_TYPE_START = 3, 565 ACPI_IVRS_TYPE_END = 4, 566 567 /* 8-byte device entries */ 568 569 ACPI_IVRS_TYPE_PAD8 = 64, 570 ACPI_IVRS_TYPE_NOT_USED = 65, 571 ACPI_IVRS_TYPE_ALIAS_SELECT = 66, /* Uses ACPI_IVRS_DEVICE8A */ 572 ACPI_IVRS_TYPE_ALIAS_START = 67, /* Uses ACPI_IVRS_DEVICE8A */ 573 ACPI_IVRS_TYPE_EXT_SELECT = 70, /* Uses ACPI_IVRS_DEVICE8B */ 574 ACPI_IVRS_TYPE_EXT_START = 71, /* Uses ACPI_IVRS_DEVICE8B */ 575 ACPI_IVRS_TYPE_SPECIAL = 72, /* Uses ACPI_IVRS_DEVICE8C */ 576 577 /* Variable-length device entries */ 578 579 ACPI_IVRS_TYPE_HID = 240 /* Uses ACPI_IVRS_DEVICE_HID */ 580 }; 581 582 /* Values for Data field above */ 583 584 #define ACPI_IVHD_INIT_PASS (1) 585 #define ACPI_IVHD_EINT_PASS (1<<1) 586 #define ACPI_IVHD_NMI_PASS (1<<2) 587 #define ACPI_IVHD_SYSTEM_MGMT (3<<4) 588 #define ACPI_IVHD_LINT0_PASS (1<<6) 589 #define ACPI_IVHD_LINT1_PASS (1<<7) 590 591 592 /* Types 0-4: 4-byte device entry */ 593 594 typedef struct acpi_ivrs_device4 595 { 596 ACPI_IVRS_DE_HEADER Header; 597 598 } ACPI_IVRS_DEVICE4; 599 600 /* Types 66-67: 8-byte device entry */ 601 602 typedef struct acpi_ivrs_device8a 603 { 604 ACPI_IVRS_DE_HEADER Header; 605 UINT8 Reserved1; 606 UINT16 UsedId; 607 UINT8 Reserved2; 608 609 } ACPI_IVRS_DEVICE8A; 610 611 /* Types 70-71: 8-byte device entry */ 612 613 typedef struct acpi_ivrs_device8b 614 { 615 ACPI_IVRS_DE_HEADER Header; 616 UINT32 ExtendedData; 617 618 } ACPI_IVRS_DEVICE8B; 619 620 /* Values for ExtendedData above */ 621 622 #define ACPI_IVHD_ATS_DISABLED (1<<31) 623 624 /* Type 72: 8-byte device entry */ 625 626 typedef struct acpi_ivrs_device8c 627 { 628 ACPI_IVRS_DE_HEADER Header; 629 UINT8 Handle; 630 UINT16 UsedId; 631 UINT8 Variety; 632 633 } ACPI_IVRS_DEVICE8C; 634 635 /* Values for Variety field above */ 636 637 #define ACPI_IVHD_IOAPIC 1 638 #define ACPI_IVHD_HPET 2 639 640 /* Type 240: variable-length device entry */ 641 642 typedef struct acpi_ivrs_device_hid 643 { 644 ACPI_IVRS_DE_HEADER Header; 645 UINT64 AcpiHid; 646 UINT64 AcpiCid; 647 UINT8 UidType; 648 UINT8 UidLength; 649 650 } ACPI_IVRS_DEVICE_HID; 651 652 653 /* 0x20, 0x21, 0x22: I/O Virtualization Memory Definition Block (IVMD) */ 654 655 typedef struct acpi_ivrs_memory 656 { 657 ACPI_IVRS_HEADER Header; 658 UINT16 AuxData; 659 UINT64 Reserved; 660 UINT64 StartAddress; 661 UINT64 MemoryLength; 662 663 } ACPI_IVRS_MEMORY; 664 665 666 /******************************************************************************* 667 * 668 * LPIT - Low Power Idle Table 669 * 670 * Conforms to "ACPI Low Power Idle Table (LPIT)" July 2014. 671 * 672 ******************************************************************************/ 673 674 typedef struct acpi_table_lpit 675 { 676 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 677 678 } ACPI_TABLE_LPIT; 679 680 681 /* LPIT subtable header */ 682 683 typedef struct acpi_lpit_header 684 { 685 UINT32 Type; /* Subtable type */ 686 UINT32 Length; /* Subtable length */ 687 UINT16 UniqueId; 688 UINT16 Reserved; 689 UINT32 Flags; 690 691 } ACPI_LPIT_HEADER; 692 693 /* Values for subtable Type above */ 694 695 enum AcpiLpitType 696 { 697 ACPI_LPIT_TYPE_NATIVE_CSTATE = 0x00, 698 ACPI_LPIT_TYPE_RESERVED = 0x01 /* 1 and above are reserved */ 699 }; 700 701 /* Masks for Flags field above */ 702 703 #define ACPI_LPIT_STATE_DISABLED (1) 704 #define ACPI_LPIT_NO_COUNTER (1<<1) 705 706 /* 707 * LPIT subtables, correspond to Type in ACPI_LPIT_HEADER 708 */ 709 710 /* 0x00: Native C-state instruction based LPI structure */ 711 712 typedef struct acpi_lpit_native 713 { 714 ACPI_LPIT_HEADER Header; 715 ACPI_GENERIC_ADDRESS EntryTrigger; 716 UINT32 Residency; 717 UINT32 Latency; 718 ACPI_GENERIC_ADDRESS ResidencyCounter; 719 UINT64 CounterFrequency; 720 721 } ACPI_LPIT_NATIVE; 722 723 724 /******************************************************************************* 725 * 726 * MADT - Multiple APIC Description Table 727 * Version 3 728 * 729 ******************************************************************************/ 730 731 typedef struct acpi_table_madt 732 { 733 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 734 UINT32 Address; /* Physical address of local APIC */ 735 UINT32 Flags; 736 737 } ACPI_TABLE_MADT; 738 739 /* Masks for Flags field above */ 740 741 #define ACPI_MADT_PCAT_COMPAT (1) /* 00: System also has dual 8259s */ 742 743 /* Values for PCATCompat flag */ 744 745 #define ACPI_MADT_DUAL_PIC 1 746 #define ACPI_MADT_MULTIPLE_APIC 0 747 748 749 /* Values for MADT subtable type in ACPI_SUBTABLE_HEADER */ 750 751 enum AcpiMadtType 752 { 753 ACPI_MADT_TYPE_LOCAL_APIC = 0, 754 ACPI_MADT_TYPE_IO_APIC = 1, 755 ACPI_MADT_TYPE_INTERRUPT_OVERRIDE = 2, 756 ACPI_MADT_TYPE_NMI_SOURCE = 3, 757 ACPI_MADT_TYPE_LOCAL_APIC_NMI = 4, 758 ACPI_MADT_TYPE_LOCAL_APIC_OVERRIDE = 5, 759 ACPI_MADT_TYPE_IO_SAPIC = 6, 760 ACPI_MADT_TYPE_LOCAL_SAPIC = 7, 761 ACPI_MADT_TYPE_INTERRUPT_SOURCE = 8, 762 ACPI_MADT_TYPE_LOCAL_X2APIC = 9, 763 ACPI_MADT_TYPE_LOCAL_X2APIC_NMI = 10, 764 ACPI_MADT_TYPE_GENERIC_INTERRUPT = 11, 765 ACPI_MADT_TYPE_GENERIC_DISTRIBUTOR = 12, 766 ACPI_MADT_TYPE_GENERIC_MSI_FRAME = 13, 767 ACPI_MADT_TYPE_GENERIC_REDISTRIBUTOR = 14, 768 ACPI_MADT_TYPE_GENERIC_TRANSLATOR = 15, 769 ACPI_MADT_TYPE_MULTIPROC_WAKEUP = 16, 770 ACPI_MADT_TYPE_RESERVED = 17 /* 17 and greater are reserved */ 771 }; 772 773 774 /* 775 * MADT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 776 */ 777 778 /* 0: Processor Local APIC */ 779 780 typedef struct acpi_madt_local_apic 781 { 782 ACPI_SUBTABLE_HEADER Header; 783 UINT8 ProcessorId; /* ACPI processor id */ 784 UINT8 Id; /* Processor's local APIC id */ 785 UINT32 LapicFlags; 786 787 } ACPI_MADT_LOCAL_APIC; 788 789 790 /* 1: IO APIC */ 791 792 typedef struct acpi_madt_io_apic 793 { 794 ACPI_SUBTABLE_HEADER Header; 795 UINT8 Id; /* I/O APIC ID */ 796 UINT8 Reserved; /* Reserved - must be zero */ 797 UINT32 Address; /* APIC physical address */ 798 UINT32 GlobalIrqBase; /* Global system interrupt where INTI lines start */ 799 800 } ACPI_MADT_IO_APIC; 801 802 803 /* 2: Interrupt Override */ 804 805 typedef struct acpi_madt_interrupt_override 806 { 807 ACPI_SUBTABLE_HEADER Header; 808 UINT8 Bus; /* 0 - ISA */ 809 UINT8 SourceIrq; /* Interrupt source (IRQ) */ 810 UINT32 GlobalIrq; /* Global system interrupt */ 811 UINT16 IntiFlags; 812 813 } ACPI_MADT_INTERRUPT_OVERRIDE; 814 815 816 /* 3: NMI Source */ 817 818 typedef struct acpi_madt_nmi_source 819 { 820 ACPI_SUBTABLE_HEADER Header; 821 UINT16 IntiFlags; 822 UINT32 GlobalIrq; /* Global system interrupt */ 823 824 } ACPI_MADT_NMI_SOURCE; 825 826 827 /* 4: Local APIC NMI */ 828 829 typedef struct acpi_madt_local_apic_nmi 830 { 831 ACPI_SUBTABLE_HEADER Header; 832 UINT8 ProcessorId; /* ACPI processor id */ 833 UINT16 IntiFlags; 834 UINT8 Lint; /* LINTn to which NMI is connected */ 835 836 } ACPI_MADT_LOCAL_APIC_NMI; 837 838 839 /* 5: Address Override */ 840 841 typedef struct acpi_madt_local_apic_override 842 { 843 ACPI_SUBTABLE_HEADER Header; 844 UINT16 Reserved; /* Reserved, must be zero */ 845 UINT64 Address; /* APIC physical address */ 846 847 } ACPI_MADT_LOCAL_APIC_OVERRIDE; 848 849 850 /* 6: I/O Sapic */ 851 852 typedef struct acpi_madt_io_sapic 853 { 854 ACPI_SUBTABLE_HEADER Header; 855 UINT8 Id; /* I/O SAPIC ID */ 856 UINT8 Reserved; /* Reserved, must be zero */ 857 UINT32 GlobalIrqBase; /* Global interrupt for SAPIC start */ 858 UINT64 Address; /* SAPIC physical address */ 859 860 } ACPI_MADT_IO_SAPIC; 861 862 863 /* 7: Local Sapic */ 864 865 typedef struct acpi_madt_local_sapic 866 { 867 ACPI_SUBTABLE_HEADER Header; 868 UINT8 ProcessorId; /* ACPI processor id */ 869 UINT8 Id; /* SAPIC ID */ 870 UINT8 Eid; /* SAPIC EID */ 871 UINT8 Reserved[3]; /* Reserved, must be zero */ 872 UINT32 LapicFlags; 873 UINT32 Uid; /* Numeric UID - ACPI 3.0 */ 874 char UidString[1]; /* String UID - ACPI 3.0 */ 875 876 } ACPI_MADT_LOCAL_SAPIC; 877 878 879 /* 8: Platform Interrupt Source */ 880 881 typedef struct acpi_madt_interrupt_source 882 { 883 ACPI_SUBTABLE_HEADER Header; 884 UINT16 IntiFlags; 885 UINT8 Type; /* 1=PMI, 2=INIT, 3=corrected */ 886 UINT8 Id; /* Processor ID */ 887 UINT8 Eid; /* Processor EID */ 888 UINT8 IoSapicVector; /* Vector value for PMI interrupts */ 889 UINT32 GlobalIrq; /* Global system interrupt */ 890 UINT32 Flags; /* Interrupt Source Flags */ 891 892 } ACPI_MADT_INTERRUPT_SOURCE; 893 894 /* Masks for Flags field above */ 895 896 #define ACPI_MADT_CPEI_OVERRIDE (1) 897 898 899 /* 9: Processor Local X2APIC (ACPI 4.0) */ 900 901 typedef struct acpi_madt_local_x2apic 902 { 903 ACPI_SUBTABLE_HEADER Header; 904 UINT16 Reserved; /* Reserved - must be zero */ 905 UINT32 LocalApicId; /* Processor x2APIC ID */ 906 UINT32 LapicFlags; 907 UINT32 Uid; /* ACPI processor UID */ 908 909 } ACPI_MADT_LOCAL_X2APIC; 910 911 912 /* 10: Local X2APIC NMI (ACPI 4.0) */ 913 914 typedef struct acpi_madt_local_x2apic_nmi 915 { 916 ACPI_SUBTABLE_HEADER Header; 917 UINT16 IntiFlags; 918 UINT32 Uid; /* ACPI processor UID */ 919 UINT8 Lint; /* LINTn to which NMI is connected */ 920 UINT8 Reserved[3]; /* Reserved - must be zero */ 921 922 } ACPI_MADT_LOCAL_X2APIC_NMI; 923 924 925 /* 11: Generic Interrupt - GICC (ACPI 5.0 + ACPI 6.0 + ACPI 6.3 changes) */ 926 927 typedef struct acpi_madt_generic_interrupt 928 { 929 ACPI_SUBTABLE_HEADER Header; 930 UINT16 Reserved; /* Reserved - must be zero */ 931 UINT32 CpuInterfaceNumber; 932 UINT32 Uid; 933 UINT32 Flags; 934 UINT32 ParkingVersion; 935 UINT32 PerformanceInterrupt; 936 UINT64 ParkedAddress; 937 UINT64 BaseAddress; 938 UINT64 GicvBaseAddress; 939 UINT64 GichBaseAddress; 940 UINT32 VgicInterrupt; 941 UINT64 GicrBaseAddress; 942 UINT64 ArmMpidr; 943 UINT8 EfficiencyClass; 944 UINT8 Reserved2[1]; 945 UINT16 SpeInterrupt; /* ACPI 6.3 */ 946 947 } ACPI_MADT_GENERIC_INTERRUPT; 948 949 /* Masks for Flags field above */ 950 951 /* ACPI_MADT_ENABLED (1) Processor is usable if set */ 952 #define ACPI_MADT_PERFORMANCE_IRQ_MODE (1<<1) /* 01: Performance Interrupt Mode */ 953 #define ACPI_MADT_VGIC_IRQ_MODE (1<<2) /* 02: VGIC Maintenance Interrupt mode */ 954 955 956 /* 12: Generic Distributor (ACPI 5.0 + ACPI 6.0 changes) */ 957 958 typedef struct acpi_madt_generic_distributor 959 { 960 ACPI_SUBTABLE_HEADER Header; 961 UINT16 Reserved; /* Reserved - must be zero */ 962 UINT32 GicId; 963 UINT64 BaseAddress; 964 UINT32 GlobalIrqBase; 965 UINT8 Version; 966 UINT8 Reserved2[3]; /* Reserved - must be zero */ 967 968 } ACPI_MADT_GENERIC_DISTRIBUTOR; 969 970 /* Values for Version field above */ 971 972 enum AcpiMadtGicVersion 973 { 974 ACPI_MADT_GIC_VERSION_NONE = 0, 975 ACPI_MADT_GIC_VERSION_V1 = 1, 976 ACPI_MADT_GIC_VERSION_V2 = 2, 977 ACPI_MADT_GIC_VERSION_V3 = 3, 978 ACPI_MADT_GIC_VERSION_V4 = 4, 979 ACPI_MADT_GIC_VERSION_RESERVED = 5 /* 5 and greater are reserved */ 980 }; 981 982 983 /* 13: Generic MSI Frame (ACPI 5.1) */ 984 985 typedef struct acpi_madt_generic_msi_frame 986 { 987 ACPI_SUBTABLE_HEADER Header; 988 UINT16 Reserved; /* Reserved - must be zero */ 989 UINT32 MsiFrameId; 990 UINT64 BaseAddress; 991 UINT32 Flags; 992 UINT16 SpiCount; 993 UINT16 SpiBase; 994 995 } ACPI_MADT_GENERIC_MSI_FRAME; 996 997 /* Masks for Flags field above */ 998 999 #define ACPI_MADT_OVERRIDE_SPI_VALUES (1) 1000 1001 1002 /* 14: Generic Redistributor (ACPI 5.1) */ 1003 1004 typedef struct acpi_madt_generic_redistributor 1005 { 1006 ACPI_SUBTABLE_HEADER Header; 1007 UINT16 Reserved; /* reserved - must be zero */ 1008 UINT64 BaseAddress; 1009 UINT32 Length; 1010 1011 } ACPI_MADT_GENERIC_REDISTRIBUTOR; 1012 1013 1014 /* 15: Generic Translator (ACPI 6.0) */ 1015 1016 typedef struct acpi_madt_generic_translator 1017 { 1018 ACPI_SUBTABLE_HEADER Header; 1019 UINT16 Reserved; /* reserved - must be zero */ 1020 UINT32 TranslationId; 1021 UINT64 BaseAddress; 1022 UINT32 Reserved2; 1023 1024 } ACPI_MADT_GENERIC_TRANSLATOR; 1025 1026 /* 16: Multiprocessor wakeup (ACPI 6.4) */ 1027 1028 typedef struct acpi_madt_multiproc_wakeup 1029 { 1030 ACPI_SUBTABLE_HEADER Header; 1031 UINT16 MailboxVersion; 1032 UINT32 Reserved; /* reserved - must be zero */ 1033 UINT64 BaseAddress; 1034 1035 } ACPI_MADT_MULTIPROC_WAKEUP; 1036 1037 1038 /* 1039 * Common flags fields for MADT subtables 1040 */ 1041 1042 /* MADT Local APIC flags */ 1043 1044 #define ACPI_MADT_ENABLED (1) /* 00: Processor is usable if set */ 1045 1046 /* MADT MPS INTI flags (IntiFlags) */ 1047 1048 #define ACPI_MADT_POLARITY_MASK (3) /* 00-01: Polarity of APIC I/O input signals */ 1049 #define ACPI_MADT_TRIGGER_MASK (3<<2) /* 02-03: Trigger mode of APIC input signals */ 1050 1051 /* Values for MPS INTI flags */ 1052 1053 #define ACPI_MADT_POLARITY_CONFORMS 0 1054 #define ACPI_MADT_POLARITY_ACTIVE_HIGH 1 1055 #define ACPI_MADT_POLARITY_RESERVED 2 1056 #define ACPI_MADT_POLARITY_ACTIVE_LOW 3 1057 1058 #define ACPI_MADT_TRIGGER_CONFORMS (0) 1059 #define ACPI_MADT_TRIGGER_EDGE (1<<2) 1060 #define ACPI_MADT_TRIGGER_RESERVED (2<<2) 1061 #define ACPI_MADT_TRIGGER_LEVEL (3<<2) 1062 1063 1064 /******************************************************************************* 1065 * 1066 * MCFG - PCI Memory Mapped Configuration table and subtable 1067 * Version 1 1068 * 1069 * Conforms to "PCI Firmware Specification", Revision 3.0, June 20, 2005 1070 * 1071 ******************************************************************************/ 1072 1073 typedef struct acpi_table_mcfg 1074 { 1075 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1076 UINT8 Reserved[8]; 1077 1078 } ACPI_TABLE_MCFG; 1079 1080 1081 /* Subtable */ 1082 1083 typedef struct acpi_mcfg_allocation 1084 { 1085 UINT64 Address; /* Base address, processor-relative */ 1086 UINT16 PciSegment; /* PCI segment group number */ 1087 UINT8 StartBusNumber; /* Starting PCI Bus number */ 1088 UINT8 EndBusNumber; /* Final PCI Bus number */ 1089 UINT32 Reserved; 1090 1091 } ACPI_MCFG_ALLOCATION; 1092 1093 1094 /******************************************************************************* 1095 * 1096 * MCHI - Management Controller Host Interface Table 1097 * Version 1 1098 * 1099 * Conforms to "Management Component Transport Protocol (MCTP) Host 1100 * Interface Specification", Revision 1.0.0a, October 13, 2009 1101 * 1102 ******************************************************************************/ 1103 1104 typedef struct acpi_table_mchi 1105 { 1106 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1107 UINT8 InterfaceType; 1108 UINT8 Protocol; 1109 UINT64 ProtocolData; 1110 UINT8 InterruptType; 1111 UINT8 Gpe; 1112 UINT8 PciDeviceFlag; 1113 UINT32 GlobalInterrupt; 1114 ACPI_GENERIC_ADDRESS ControlRegister; 1115 UINT8 PciSegment; 1116 UINT8 PciBus; 1117 UINT8 PciDevice; 1118 UINT8 PciFunction; 1119 1120 } ACPI_TABLE_MCHI; 1121 1122 1123 /******************************************************************************* 1124 * 1125 * MPST - Memory Power State Table (ACPI 5.0) 1126 * Version 1 1127 * 1128 ******************************************************************************/ 1129 1130 #define ACPI_MPST_CHANNEL_INFO \ 1131 UINT8 ChannelId; \ 1132 UINT8 Reserved1[3]; \ 1133 UINT16 PowerNodeCount; \ 1134 UINT16 Reserved2; 1135 1136 /* Main table */ 1137 1138 typedef struct acpi_table_mpst 1139 { 1140 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1141 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1142 1143 } ACPI_TABLE_MPST; 1144 1145 1146 /* Memory Platform Communication Channel Info */ 1147 1148 typedef struct acpi_mpst_channel 1149 { 1150 ACPI_MPST_CHANNEL_INFO /* Platform Communication Channel */ 1151 1152 } ACPI_MPST_CHANNEL; 1153 1154 1155 /* Memory Power Node Structure */ 1156 1157 typedef struct acpi_mpst_power_node 1158 { 1159 UINT8 Flags; 1160 UINT8 Reserved1; 1161 UINT16 NodeId; 1162 UINT32 Length; 1163 UINT64 RangeAddress; 1164 UINT64 RangeLength; 1165 UINT32 NumPowerStates; 1166 UINT32 NumPhysicalComponents; 1167 1168 } ACPI_MPST_POWER_NODE; 1169 1170 /* Values for Flags field above */ 1171 1172 #define ACPI_MPST_ENABLED 1 1173 #define ACPI_MPST_POWER_MANAGED 2 1174 #define ACPI_MPST_HOT_PLUG_CAPABLE 4 1175 1176 1177 /* Memory Power State Structure (follows POWER_NODE above) */ 1178 1179 typedef struct acpi_mpst_power_state 1180 { 1181 UINT8 PowerState; 1182 UINT8 InfoIndex; 1183 1184 } ACPI_MPST_POWER_STATE; 1185 1186 1187 /* Physical Component ID Structure (follows POWER_STATE above) */ 1188 1189 typedef struct acpi_mpst_component 1190 { 1191 UINT16 ComponentId; 1192 1193 } ACPI_MPST_COMPONENT; 1194 1195 1196 /* Memory Power State Characteristics Structure (follows all POWER_NODEs) */ 1197 1198 typedef struct acpi_mpst_data_hdr 1199 { 1200 UINT16 CharacteristicsCount; 1201 UINT16 Reserved; 1202 1203 } ACPI_MPST_DATA_HDR; 1204 1205 typedef struct acpi_mpst_power_data 1206 { 1207 UINT8 StructureId; 1208 UINT8 Flags; 1209 UINT16 Reserved1; 1210 UINT32 AveragePower; 1211 UINT32 PowerSaving; 1212 UINT64 ExitLatency; 1213 UINT64 Reserved2; 1214 1215 } ACPI_MPST_POWER_DATA; 1216 1217 /* Values for Flags field above */ 1218 1219 #define ACPI_MPST_PRESERVE 1 1220 #define ACPI_MPST_AUTOENTRY 2 1221 #define ACPI_MPST_AUTOEXIT 4 1222 1223 1224 /* Shared Memory Region (not part of an ACPI table) */ 1225 1226 typedef struct acpi_mpst_shared 1227 { 1228 UINT32 Signature; 1229 UINT16 PccCommand; 1230 UINT16 PccStatus; 1231 UINT32 CommandRegister; 1232 UINT32 StatusRegister; 1233 UINT32 PowerStateId; 1234 UINT32 PowerNodeId; 1235 UINT64 EnergyConsumed; 1236 UINT64 AveragePower; 1237 1238 } ACPI_MPST_SHARED; 1239 1240 1241 /******************************************************************************* 1242 * 1243 * MSCT - Maximum System Characteristics Table (ACPI 4.0) 1244 * Version 1 1245 * 1246 ******************************************************************************/ 1247 1248 typedef struct acpi_table_msct 1249 { 1250 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1251 UINT32 ProximityOffset; /* Location of proximity info struct(s) */ 1252 UINT32 MaxProximityDomains;/* Max number of proximity domains */ 1253 UINT32 MaxClockDomains; /* Max number of clock domains */ 1254 UINT64 MaxAddress; /* Max physical address in system */ 1255 1256 } ACPI_TABLE_MSCT; 1257 1258 1259 /* Subtable - Maximum Proximity Domain Information. Version 1 */ 1260 1261 typedef struct acpi_msct_proximity 1262 { 1263 UINT8 Revision; 1264 UINT8 Length; 1265 UINT32 RangeStart; /* Start of domain range */ 1266 UINT32 RangeEnd; /* End of domain range */ 1267 UINT32 ProcessorCapacity; 1268 UINT64 MemoryCapacity; /* In bytes */ 1269 1270 } ACPI_MSCT_PROXIMITY; 1271 1272 1273 /******************************************************************************* 1274 * 1275 * MSDM - Microsoft Data Management table 1276 * 1277 * Conforms to "Microsoft Software Licensing Tables (SLIC and MSDM)", 1278 * November 29, 2011. Copyright 2011 Microsoft 1279 * 1280 ******************************************************************************/ 1281 1282 /* Basic MSDM table is only the common ACPI header */ 1283 1284 typedef struct acpi_table_msdm 1285 { 1286 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1287 1288 } ACPI_TABLE_MSDM; 1289 1290 1291 /******************************************************************************* 1292 * 1293 * NFIT - NVDIMM Interface Table (ACPI 6.0+) 1294 * Version 1 1295 * 1296 ******************************************************************************/ 1297 1298 typedef struct acpi_table_nfit 1299 { 1300 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1301 UINT32 Reserved; /* Reserved, must be zero */ 1302 1303 } ACPI_TABLE_NFIT; 1304 1305 /* Subtable header for NFIT */ 1306 1307 typedef struct acpi_nfit_header 1308 { 1309 UINT16 Type; 1310 UINT16 Length; 1311 1312 } ACPI_NFIT_HEADER; 1313 1314 1315 /* Values for subtable type in ACPI_NFIT_HEADER */ 1316 1317 enum AcpiNfitType 1318 { 1319 ACPI_NFIT_TYPE_SYSTEM_ADDRESS = 0, 1320 ACPI_NFIT_TYPE_MEMORY_MAP = 1, 1321 ACPI_NFIT_TYPE_INTERLEAVE = 2, 1322 ACPI_NFIT_TYPE_SMBIOS = 3, 1323 ACPI_NFIT_TYPE_CONTROL_REGION = 4, 1324 ACPI_NFIT_TYPE_DATA_REGION = 5, 1325 ACPI_NFIT_TYPE_FLUSH_ADDRESS = 6, 1326 ACPI_NFIT_TYPE_CAPABILITIES = 7, 1327 ACPI_NFIT_TYPE_RESERVED = 8 /* 8 and greater are reserved */ 1328 }; 1329 1330 /* 1331 * NFIT Subtables 1332 */ 1333 1334 /* 0: System Physical Address Range Structure */ 1335 1336 typedef struct acpi_nfit_system_address 1337 { 1338 ACPI_NFIT_HEADER Header; 1339 UINT16 RangeIndex; 1340 UINT16 Flags; 1341 UINT32 Reserved; /* Reserved, must be zero */ 1342 UINT32 ProximityDomain; 1343 UINT8 RangeGuid[16]; 1344 UINT64 Address; 1345 UINT64 Length; 1346 UINT64 MemoryMapping; 1347 UINT64 LocationCookie; /* ACPI 6.4 */ 1348 1349 } ACPI_NFIT_SYSTEM_ADDRESS; 1350 1351 /* Flags */ 1352 1353 #define ACPI_NFIT_ADD_ONLINE_ONLY (1) /* 00: Add/Online Operation Only */ 1354 #define ACPI_NFIT_PROXIMITY_VALID (1<<1) /* 01: Proximity Domain Valid */ 1355 #define ACPI_NFIT_LOCATION_COOKIE_VALID (1<<2) /* 02: SPA location cookie valid (ACPI 6.4) */ 1356 1357 /* Range Type GUIDs appear in the include/acuuid.h file */ 1358 1359 1360 /* 1: Memory Device to System Address Range Map Structure */ 1361 1362 typedef struct acpi_nfit_memory_map 1363 { 1364 ACPI_NFIT_HEADER Header; 1365 UINT32 DeviceHandle; 1366 UINT16 PhysicalId; 1367 UINT16 RegionId; 1368 UINT16 RangeIndex; 1369 UINT16 RegionIndex; 1370 UINT64 RegionSize; 1371 UINT64 RegionOffset; 1372 UINT64 Address; 1373 UINT16 InterleaveIndex; 1374 UINT16 InterleaveWays; 1375 UINT16 Flags; 1376 UINT16 Reserved; /* Reserved, must be zero */ 1377 1378 } ACPI_NFIT_MEMORY_MAP; 1379 1380 /* Flags */ 1381 1382 #define ACPI_NFIT_MEM_SAVE_FAILED (1) /* 00: Last SAVE to Memory Device failed */ 1383 #define ACPI_NFIT_MEM_RESTORE_FAILED (1<<1) /* 01: Last RESTORE from Memory Device failed */ 1384 #define ACPI_NFIT_MEM_FLUSH_FAILED (1<<2) /* 02: Platform flush failed */ 1385 #define ACPI_NFIT_MEM_NOT_ARMED (1<<3) /* 03: Memory Device is not armed */ 1386 #define ACPI_NFIT_MEM_HEALTH_OBSERVED (1<<4) /* 04: Memory Device observed SMART/health events */ 1387 #define ACPI_NFIT_MEM_HEALTH_ENABLED (1<<5) /* 05: SMART/health events enabled */ 1388 #define ACPI_NFIT_MEM_MAP_FAILED (1<<6) /* 06: Mapping to SPA failed */ 1389 1390 1391 /* 2: Interleave Structure */ 1392 1393 typedef struct acpi_nfit_interleave 1394 { 1395 ACPI_NFIT_HEADER Header; 1396 UINT16 InterleaveIndex; 1397 UINT16 Reserved; /* Reserved, must be zero */ 1398 UINT32 LineCount; 1399 UINT32 LineSize; 1400 UINT32 LineOffset[1]; /* Variable length */ 1401 1402 } ACPI_NFIT_INTERLEAVE; 1403 1404 1405 /* 3: SMBIOS Management Information Structure */ 1406 1407 typedef struct acpi_nfit_smbios 1408 { 1409 ACPI_NFIT_HEADER Header; 1410 UINT32 Reserved; /* Reserved, must be zero */ 1411 UINT8 Data[1]; /* Variable length */ 1412 1413 } ACPI_NFIT_SMBIOS; 1414 1415 1416 /* 4: NVDIMM Control Region Structure */ 1417 1418 typedef struct acpi_nfit_control_region 1419 { 1420 ACPI_NFIT_HEADER Header; 1421 UINT16 RegionIndex; 1422 UINT16 VendorId; 1423 UINT16 DeviceId; 1424 UINT16 RevisionId; 1425 UINT16 SubsystemVendorId; 1426 UINT16 SubsystemDeviceId; 1427 UINT16 SubsystemRevisionId; 1428 UINT8 ValidFields; 1429 UINT8 ManufacturingLocation; 1430 UINT16 ManufacturingDate; 1431 UINT8 Reserved[2]; /* Reserved, must be zero */ 1432 UINT32 SerialNumber; 1433 UINT16 Code; 1434 UINT16 Windows; 1435 UINT64 WindowSize; 1436 UINT64 CommandOffset; 1437 UINT64 CommandSize; 1438 UINT64 StatusOffset; 1439 UINT64 StatusSize; 1440 UINT16 Flags; 1441 UINT8 Reserved1[6]; /* Reserved, must be zero */ 1442 1443 } ACPI_NFIT_CONTROL_REGION; 1444 1445 /* Flags */ 1446 1447 #define ACPI_NFIT_CONTROL_BUFFERED (1) /* Block Data Windows implementation is buffered */ 1448 1449 /* ValidFields bits */ 1450 1451 #define ACPI_NFIT_CONTROL_MFG_INFO_VALID (1) /* Manufacturing fields are valid */ 1452 1453 1454 /* 5: NVDIMM Block Data Window Region Structure */ 1455 1456 typedef struct acpi_nfit_data_region 1457 { 1458 ACPI_NFIT_HEADER Header; 1459 UINT16 RegionIndex; 1460 UINT16 Windows; 1461 UINT64 Offset; 1462 UINT64 Size; 1463 UINT64 Capacity; 1464 UINT64 StartAddress; 1465 1466 } ACPI_NFIT_DATA_REGION; 1467 1468 1469 /* 6: Flush Hint Address Structure */ 1470 1471 typedef struct acpi_nfit_flush_address 1472 { 1473 ACPI_NFIT_HEADER Header; 1474 UINT32 DeviceHandle; 1475 UINT16 HintCount; 1476 UINT8 Reserved[6]; /* Reserved, must be zero */ 1477 UINT64 HintAddress[1]; /* Variable length */ 1478 1479 } ACPI_NFIT_FLUSH_ADDRESS; 1480 1481 1482 /* 7: Platform Capabilities Structure */ 1483 1484 typedef struct acpi_nfit_capabilities 1485 { 1486 ACPI_NFIT_HEADER Header; 1487 UINT8 HighestCapability; 1488 UINT8 Reserved[3]; /* Reserved, must be zero */ 1489 UINT32 Capabilities; 1490 UINT32 Reserved2; 1491 1492 } ACPI_NFIT_CAPABILITIES; 1493 1494 /* Capabilities Flags */ 1495 1496 #define ACPI_NFIT_CAPABILITY_CACHE_FLUSH (1) /* 00: Cache Flush to NVDIMM capable */ 1497 #define ACPI_NFIT_CAPABILITY_MEM_FLUSH (1<<1) /* 01: Memory Flush to NVDIMM capable */ 1498 #define ACPI_NFIT_CAPABILITY_MEM_MIRRORING (1<<2) /* 02: Memory Mirroring capable */ 1499 1500 1501 /* 1502 * NFIT/DVDIMM device handle support - used as the _ADR for each NVDIMM 1503 */ 1504 typedef struct nfit_device_handle 1505 { 1506 UINT32 Handle; 1507 1508 } NFIT_DEVICE_HANDLE; 1509 1510 /* Device handle construction and extraction macros */ 1511 1512 #define ACPI_NFIT_DIMM_NUMBER_MASK 0x0000000F 1513 #define ACPI_NFIT_CHANNEL_NUMBER_MASK 0x000000F0 1514 #define ACPI_NFIT_MEMORY_ID_MASK 0x00000F00 1515 #define ACPI_NFIT_SOCKET_ID_MASK 0x0000F000 1516 #define ACPI_NFIT_NODE_ID_MASK 0x0FFF0000 1517 1518 #define ACPI_NFIT_DIMM_NUMBER_OFFSET 0 1519 #define ACPI_NFIT_CHANNEL_NUMBER_OFFSET 4 1520 #define ACPI_NFIT_MEMORY_ID_OFFSET 8 1521 #define ACPI_NFIT_SOCKET_ID_OFFSET 12 1522 #define ACPI_NFIT_NODE_ID_OFFSET 16 1523 1524 /* Macro to construct a NFIT/NVDIMM device handle */ 1525 1526 #define ACPI_NFIT_BUILD_DEVICE_HANDLE(dimm, channel, memory, socket, node) \ 1527 ((dimm) | \ 1528 ((channel) << ACPI_NFIT_CHANNEL_NUMBER_OFFSET) | \ 1529 ((memory) << ACPI_NFIT_MEMORY_ID_OFFSET) | \ 1530 ((socket) << ACPI_NFIT_SOCKET_ID_OFFSET) | \ 1531 ((node) << ACPI_NFIT_NODE_ID_OFFSET)) 1532 1533 /* Macros to extract individual fields from a NFIT/NVDIMM device handle */ 1534 1535 #define ACPI_NFIT_GET_DIMM_NUMBER(handle) \ 1536 ((handle) & ACPI_NFIT_DIMM_NUMBER_MASK) 1537 1538 #define ACPI_NFIT_GET_CHANNEL_NUMBER(handle) \ 1539 (((handle) & ACPI_NFIT_CHANNEL_NUMBER_MASK) >> ACPI_NFIT_CHANNEL_NUMBER_OFFSET) 1540 1541 #define ACPI_NFIT_GET_MEMORY_ID(handle) \ 1542 (((handle) & ACPI_NFIT_MEMORY_ID_MASK) >> ACPI_NFIT_MEMORY_ID_OFFSET) 1543 1544 #define ACPI_NFIT_GET_SOCKET_ID(handle) \ 1545 (((handle) & ACPI_NFIT_SOCKET_ID_MASK) >> ACPI_NFIT_SOCKET_ID_OFFSET) 1546 1547 #define ACPI_NFIT_GET_NODE_ID(handle) \ 1548 (((handle) & ACPI_NFIT_NODE_ID_MASK) >> ACPI_NFIT_NODE_ID_OFFSET) 1549 1550 1551 /******************************************************************************* 1552 * 1553 * PCCT - Platform Communications Channel Table (ACPI 5.0) 1554 * Version 2 (ACPI 6.2) 1555 * 1556 ******************************************************************************/ 1557 1558 typedef struct acpi_table_pcct 1559 { 1560 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1561 UINT32 Flags; 1562 UINT64 Reserved; 1563 1564 } ACPI_TABLE_PCCT; 1565 1566 /* Values for Flags field above */ 1567 1568 #define ACPI_PCCT_DOORBELL 1 1569 1570 /* Values for subtable type in ACPI_SUBTABLE_HEADER */ 1571 1572 enum AcpiPcctType 1573 { 1574 ACPI_PCCT_TYPE_GENERIC_SUBSPACE = 0, 1575 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE = 1, 1576 ACPI_PCCT_TYPE_HW_REDUCED_SUBSPACE_TYPE2 = 2, /* ACPI 6.1 */ 1577 ACPI_PCCT_TYPE_EXT_PCC_MASTER_SUBSPACE = 3, /* ACPI 6.2 */ 1578 ACPI_PCCT_TYPE_EXT_PCC_SLAVE_SUBSPACE = 4, /* ACPI 6.2 */ 1579 ACPI_PCCT_TYPE_HW_REG_COMM_SUBSPACE = 5, /* ACPI 6.4 */ 1580 ACPI_PCCT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1581 }; 1582 1583 /* 1584 * PCCT Subtables, correspond to Type in ACPI_SUBTABLE_HEADER 1585 */ 1586 1587 /* 0: Generic Communications Subspace */ 1588 1589 typedef struct acpi_pcct_subspace 1590 { 1591 ACPI_SUBTABLE_HEADER Header; 1592 UINT8 Reserved[6]; 1593 UINT64 BaseAddress; 1594 UINT64 Length; 1595 ACPI_GENERIC_ADDRESS DoorbellRegister; 1596 UINT64 PreserveMask; 1597 UINT64 WriteMask; 1598 UINT32 Latency; 1599 UINT32 MaxAccessRate; 1600 UINT16 MinTurnaroundTime; 1601 1602 } ACPI_PCCT_SUBSPACE; 1603 1604 1605 /* 1: HW-reduced Communications Subspace (ACPI 5.1) */ 1606 1607 typedef struct acpi_pcct_hw_reduced 1608 { 1609 ACPI_SUBTABLE_HEADER Header; 1610 UINT32 PlatformInterrupt; 1611 UINT8 Flags; 1612 UINT8 Reserved; 1613 UINT64 BaseAddress; 1614 UINT64 Length; 1615 ACPI_GENERIC_ADDRESS DoorbellRegister; 1616 UINT64 PreserveMask; 1617 UINT64 WriteMask; 1618 UINT32 Latency; 1619 UINT32 MaxAccessRate; 1620 UINT16 MinTurnaroundTime; 1621 1622 } ACPI_PCCT_HW_REDUCED; 1623 1624 1625 /* 2: HW-reduced Communications Subspace Type 2 (ACPI 6.1) */ 1626 1627 typedef struct acpi_pcct_hw_reduced_type2 1628 { 1629 ACPI_SUBTABLE_HEADER Header; 1630 UINT32 PlatformInterrupt; 1631 UINT8 Flags; 1632 UINT8 Reserved; 1633 UINT64 BaseAddress; 1634 UINT64 Length; 1635 ACPI_GENERIC_ADDRESS DoorbellRegister; 1636 UINT64 PreserveMask; 1637 UINT64 WriteMask; 1638 UINT32 Latency; 1639 UINT32 MaxAccessRate; 1640 UINT16 MinTurnaroundTime; 1641 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1642 UINT64 AckPreserveMask; 1643 UINT64 AckWriteMask; 1644 1645 } ACPI_PCCT_HW_REDUCED_TYPE2; 1646 1647 1648 /* 3: Extended PCC Master Subspace Type 3 (ACPI 6.2) */ 1649 1650 typedef struct acpi_pcct_ext_pcc_master 1651 { 1652 ACPI_SUBTABLE_HEADER Header; 1653 UINT32 PlatformInterrupt; 1654 UINT8 Flags; 1655 UINT8 Reserved1; 1656 UINT64 BaseAddress; 1657 UINT32 Length; 1658 ACPI_GENERIC_ADDRESS DoorbellRegister; 1659 UINT64 PreserveMask; 1660 UINT64 WriteMask; 1661 UINT32 Latency; 1662 UINT32 MaxAccessRate; 1663 UINT32 MinTurnaroundTime; 1664 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1665 UINT64 AckPreserveMask; 1666 UINT64 AckSetMask; 1667 UINT64 Reserved2; 1668 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1669 UINT64 CmdCompleteMask; 1670 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1671 UINT64 CmdUpdatePreserveMask; 1672 UINT64 CmdUpdateSetMask; 1673 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1674 UINT64 ErrorStatusMask; 1675 1676 } ACPI_PCCT_EXT_PCC_MASTER; 1677 1678 1679 /* 4: Extended PCC Slave Subspace Type 4 (ACPI 6.2) */ 1680 1681 typedef struct acpi_pcct_ext_pcc_slave 1682 { 1683 ACPI_SUBTABLE_HEADER Header; 1684 UINT32 PlatformInterrupt; 1685 UINT8 Flags; 1686 UINT8 Reserved1; 1687 UINT64 BaseAddress; 1688 UINT32 Length; 1689 ACPI_GENERIC_ADDRESS DoorbellRegister; 1690 UINT64 PreserveMask; 1691 UINT64 WriteMask; 1692 UINT32 Latency; 1693 UINT32 MaxAccessRate; 1694 UINT32 MinTurnaroundTime; 1695 ACPI_GENERIC_ADDRESS PlatformAckRegister; 1696 UINT64 AckPreserveMask; 1697 UINT64 AckSetMask; 1698 UINT64 Reserved2; 1699 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1700 UINT64 CmdCompleteMask; 1701 ACPI_GENERIC_ADDRESS CmdUpdateRegister; 1702 UINT64 CmdUpdatePreserveMask; 1703 UINT64 CmdUpdateSetMask; 1704 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1705 UINT64 ErrorStatusMask; 1706 1707 } ACPI_PCCT_EXT_PCC_SLAVE; 1708 1709 /* 5: HW Registers based Communications Subspace */ 1710 1711 typedef struct acpi_pcct_hw_reg 1712 { 1713 ACPI_SUBTABLE_HEADER Header; 1714 UINT16 Version; 1715 UINT64 BaseAddress; 1716 UINT64 Length; 1717 ACPI_GENERIC_ADDRESS DoorbellRegister; 1718 UINT64 DoorbellPreserve; 1719 UINT64 DoorbellWrite; 1720 ACPI_GENERIC_ADDRESS CmdCompleteRegister; 1721 UINT64 CmdCompleteMask; 1722 ACPI_GENERIC_ADDRESS ErrorStatusRegister; 1723 UINT64 ErrorStatusMask; 1724 UINT32 NominalLatency; 1725 UINT32 MinTurnaroundTime; 1726 1727 } ACPI_PCCT_HW_REG; 1728 1729 1730 /* Values for doorbell flags above */ 1731 1732 #define ACPI_PCCT_INTERRUPT_POLARITY (1) 1733 #define ACPI_PCCT_INTERRUPT_MODE (1<<1) 1734 1735 1736 /* 1737 * PCC memory structures (not part of the ACPI table) 1738 */ 1739 1740 /* Shared Memory Region */ 1741 1742 typedef struct acpi_pcct_shared_memory 1743 { 1744 UINT32 Signature; 1745 UINT16 Command; 1746 UINT16 Status; 1747 1748 } ACPI_PCCT_SHARED_MEMORY; 1749 1750 1751 /* Extended PCC Subspace Shared Memory Region (ACPI 6.2) */ 1752 1753 typedef struct acpi_pcct_ext_pcc_shared_memory 1754 { 1755 UINT32 Signature; 1756 UINT32 Flags; 1757 UINT32 Length; 1758 UINT32 Command; 1759 1760 } ACPI_PCCT_EXT_PCC_SHARED_MEMORY; 1761 1762 1763 /******************************************************************************* 1764 * 1765 * PDTT - Platform Debug Trigger Table (ACPI 6.2) 1766 * Version 0 1767 * 1768 ******************************************************************************/ 1769 1770 typedef struct acpi_table_pdtt 1771 { 1772 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1773 UINT8 TriggerCount; 1774 UINT8 Reserved[3]; 1775 UINT32 ArrayOffset; 1776 1777 } ACPI_TABLE_PDTT; 1778 1779 1780 /* 1781 * PDTT Communication Channel Identifier Structure. 1782 * The number of these structures is defined by TriggerCount above, 1783 * starting at ArrayOffset. 1784 */ 1785 typedef struct acpi_pdtt_channel 1786 { 1787 UINT8 SubchannelId; 1788 UINT8 Flags; 1789 1790 } ACPI_PDTT_CHANNEL; 1791 1792 /* Flags for above */ 1793 1794 #define ACPI_PDTT_RUNTIME_TRIGGER (1) 1795 #define ACPI_PDTT_WAIT_COMPLETION (1<<1) 1796 #define ACPI_PDTT_TRIGGER_ORDER (1<<2) 1797 1798 1799 /******************************************************************************* 1800 * 1801 * PHAT - Platform Health Assessment Table (ACPI 6.4) 1802 * Version 1 1803 * 1804 ******************************************************************************/ 1805 1806 typedef struct acpi_table_phat 1807 { 1808 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1809 1810 } ACPI_TABLE_PHAT; 1811 1812 /* Common header for PHAT subtables that follow main table */ 1813 1814 typedef struct acpi_phat_header 1815 { 1816 UINT16 Type; 1817 UINT16 Length; 1818 UINT8 Revision; 1819 1820 } ACPI_PHAT_HEADER; 1821 1822 1823 /* Values for Type field above */ 1824 1825 #define ACPI_PHAT_TYPE_FW_VERSION_DATA 0 1826 #define ACPI_PHAT_TYPE_FW_HEALTH_DATA 1 1827 #define ACPI_PHAT_TYPE_RESERVED 2 /* 0x02-0xFFFF are reserved */ 1828 1829 /* 1830 * PHAT subtables, correspond to Type in ACPI_PHAT_HEADER 1831 */ 1832 1833 /* 0: Firmware Version Data Record */ 1834 1835 typedef struct acpi_phat_version_data 1836 { 1837 ACPI_PHAT_HEADER Header; 1838 UINT8 Reserved[3]; 1839 UINT32 ElementCount; 1840 1841 } ACPI_PHAT_VERSION_DATA; 1842 1843 typedef struct acpi_phat_version_element 1844 { 1845 UINT8 Guid[16]; 1846 UINT64 VersionValue; 1847 UINT32 ProducerId; 1848 1849 } ACPI_PHAT_VERSION_ELEMENT; 1850 1851 1852 /* 1: Firmware Health Data Record */ 1853 1854 typedef struct acpi_phat_health_data 1855 { 1856 ACPI_PHAT_HEADER Header; 1857 UINT8 Reserved[2]; 1858 UINT8 Health; 1859 UINT8 DeviceGuid[16]; 1860 UINT32 DeviceSpecificOffset; /* Zero if no Device-specific data */ 1861 1862 } ACPI_PHAT_HEALTH_DATA; 1863 1864 /* Values for Health field above */ 1865 1866 #define ACPI_PHAT_ERRORS_FOUND 0 1867 #define ACPI_PHAT_NO_ERRORS 1 1868 #define ACPI_PHAT_UNKNOWN_ERRORS 2 1869 #define ACPI_PHAT_ADVISORY 3 1870 1871 1872 /******************************************************************************* 1873 * 1874 * PMTT - Platform Memory Topology Table (ACPI 5.0) 1875 * Version 1 1876 * 1877 ******************************************************************************/ 1878 1879 typedef struct acpi_table_pmtt 1880 { 1881 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1882 UINT32 MemoryDeviceCount; 1883 /* 1884 * Immediately followed by: 1885 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1886 */ 1887 1888 } ACPI_TABLE_PMTT; 1889 1890 1891 /* Common header for PMTT subtables that follow main table */ 1892 1893 typedef struct acpi_pmtt_header 1894 { 1895 UINT8 Type; 1896 UINT8 Reserved1; 1897 UINT16 Length; 1898 UINT16 Flags; 1899 UINT16 Reserved2; 1900 UINT32 MemoryDeviceCount; /* Zero means no memory device structs follow */ 1901 /* 1902 * Immediately followed by: 1903 * UINT8 TypeSpecificData[] 1904 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1905 */ 1906 1907 } ACPI_PMTT_HEADER; 1908 1909 /* Values for Type field above */ 1910 1911 #define ACPI_PMTT_TYPE_SOCKET 0 1912 #define ACPI_PMTT_TYPE_CONTROLLER 1 1913 #define ACPI_PMTT_TYPE_DIMM 2 1914 #define ACPI_PMTT_TYPE_RESERVED 3 /* 0x03-0xFE are reserved */ 1915 #define ACPI_PMTT_TYPE_VENDOR 0xFF 1916 1917 /* Values for Flags field above */ 1918 1919 #define ACPI_PMTT_TOP_LEVEL 0x0001 1920 #define ACPI_PMTT_PHYSICAL 0x0002 1921 #define ACPI_PMTT_MEMORY_TYPE 0x000C 1922 1923 1924 /* 1925 * PMTT subtables, correspond to Type in acpi_pmtt_header 1926 */ 1927 1928 1929 /* 0: Socket Structure */ 1930 1931 typedef struct acpi_pmtt_socket 1932 { 1933 ACPI_PMTT_HEADER Header; 1934 UINT16 SocketId; 1935 UINT16 Reserved; 1936 1937 } ACPI_PMTT_SOCKET; 1938 /* 1939 * Immediately followed by: 1940 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1941 */ 1942 1943 1944 /* 1: Memory Controller subtable */ 1945 1946 typedef struct acpi_pmtt_controller 1947 { 1948 ACPI_PMTT_HEADER Header; 1949 UINT16 ControllerId; 1950 UINT16 Reserved; 1951 1952 } ACPI_PMTT_CONTROLLER; 1953 /* 1954 * Immediately followed by: 1955 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1956 */ 1957 1958 1959 /* 2: Physical Component Identifier (DIMM) */ 1960 1961 typedef struct acpi_pmtt_physical_component 1962 { 1963 ACPI_PMTT_HEADER Header; 1964 UINT32 BiosHandle; 1965 1966 } ACPI_PMTT_PHYSICAL_COMPONENT; 1967 1968 1969 /* 0xFF: Vendor Specific Data */ 1970 1971 typedef struct acpi_pmtt_vendor_specific 1972 { 1973 ACPI_PMTT_HEADER Header; 1974 UINT8 TypeUuid[16]; 1975 UINT8 Specific[]; 1976 /* 1977 * Immediately followed by: 1978 * UINT8 VendorSpecificData[]; 1979 * MEMORY_DEVICE MemoryDeviceStruct[MemoryDeviceCount]; 1980 */ 1981 1982 } ACPI_PMTT_VENDOR_SPECIFIC; 1983 1984 1985 /******************************************************************************* 1986 * 1987 * PPTT - Processor Properties Topology Table (ACPI 6.2) 1988 * Version 1 1989 * 1990 ******************************************************************************/ 1991 1992 typedef struct acpi_table_pptt 1993 { 1994 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1995 1996 } ACPI_TABLE_PPTT; 1997 1998 /* Values for Type field above */ 1999 2000 enum AcpiPpttType 2001 { 2002 ACPI_PPTT_TYPE_PROCESSOR = 0, 2003 ACPI_PPTT_TYPE_CACHE = 1, 2004 ACPI_PPTT_TYPE_ID = 2, 2005 ACPI_PPTT_TYPE_RESERVED = 3 2006 }; 2007 2008 2009 /* 0: Processor Hierarchy Node Structure */ 2010 2011 typedef struct acpi_pptt_processor 2012 { 2013 ACPI_SUBTABLE_HEADER Header; 2014 UINT16 Reserved; 2015 UINT32 Flags; 2016 UINT32 Parent; 2017 UINT32 AcpiProcessorId; 2018 UINT32 NumberOfPrivResources; 2019 2020 } ACPI_PPTT_PROCESSOR; 2021 2022 /* Flags */ 2023 2024 #define ACPI_PPTT_PHYSICAL_PACKAGE (1) 2025 #define ACPI_PPTT_ACPI_PROCESSOR_ID_VALID (1<<1) 2026 #define ACPI_PPTT_ACPI_PROCESSOR_IS_THREAD (1<<2) /* ACPI 6.3 */ 2027 #define ACPI_PPTT_ACPI_LEAF_NODE (1<<3) /* ACPI 6.3 */ 2028 #define ACPI_PPTT_ACPI_IDENTICAL (1<<4) /* ACPI 6.3 */ 2029 2030 2031 /* 1: Cache Type Structure */ 2032 2033 typedef struct acpi_pptt_cache 2034 { 2035 ACPI_SUBTABLE_HEADER Header; 2036 UINT16 Reserved; 2037 UINT32 Flags; 2038 UINT32 NextLevelOfCache; 2039 UINT32 Size; 2040 UINT32 NumberOfSets; 2041 UINT8 Associativity; 2042 UINT8 Attributes; 2043 UINT16 LineSize; 2044 2045 } ACPI_PPTT_CACHE; 2046 2047 /* 1: Cache Type Structure for PPTT version 3 */ 2048 2049 typedef struct acpi_pptt_cache_v1 2050 { 2051 UINT32 CacheId; 2052 2053 } ACPI_PPTT_CACHE_V1; 2054 2055 2056 /* Flags */ 2057 2058 #define ACPI_PPTT_SIZE_PROPERTY_VALID (1) /* Physical property valid */ 2059 #define ACPI_PPTT_NUMBER_OF_SETS_VALID (1<<1) /* Number of sets valid */ 2060 #define ACPI_PPTT_ASSOCIATIVITY_VALID (1<<2) /* Associativity valid */ 2061 #define ACPI_PPTT_ALLOCATION_TYPE_VALID (1<<3) /* Allocation type valid */ 2062 #define ACPI_PPTT_CACHE_TYPE_VALID (1<<4) /* Cache type valid */ 2063 #define ACPI_PPTT_WRITE_POLICY_VALID (1<<5) /* Write policy valid */ 2064 #define ACPI_PPTT_LINE_SIZE_VALID (1<<6) /* Line size valid */ 2065 #define ACPI_PPTT_CACHE_ID_VALID (1<<7) /* Cache ID valid */ 2066 2067 /* Masks for Attributes */ 2068 2069 #define ACPI_PPTT_MASK_ALLOCATION_TYPE (0x03) /* Allocation type */ 2070 #define ACPI_PPTT_MASK_CACHE_TYPE (0x0C) /* Cache type */ 2071 #define ACPI_PPTT_MASK_WRITE_POLICY (0x10) /* Write policy */ 2072 2073 /* Attributes describing cache */ 2074 #define ACPI_PPTT_CACHE_READ_ALLOCATE (0x0) /* Cache line is allocated on read */ 2075 #define ACPI_PPTT_CACHE_WRITE_ALLOCATE (0x01) /* Cache line is allocated on write */ 2076 #define ACPI_PPTT_CACHE_RW_ALLOCATE (0x02) /* Cache line is allocated on read and write */ 2077 #define ACPI_PPTT_CACHE_RW_ALLOCATE_ALT (0x03) /* Alternate representation of above */ 2078 2079 #define ACPI_PPTT_CACHE_TYPE_DATA (0x0) /* Data cache */ 2080 #define ACPI_PPTT_CACHE_TYPE_INSTR (1<<2) /* Instruction cache */ 2081 #define ACPI_PPTT_CACHE_TYPE_UNIFIED (2<<2) /* Unified I & D cache */ 2082 #define ACPI_PPTT_CACHE_TYPE_UNIFIED_ALT (3<<2) /* Alternate representation of above */ 2083 2084 #define ACPI_PPTT_CACHE_POLICY_WB (0x0) /* Cache is write back */ 2085 #define ACPI_PPTT_CACHE_POLICY_WT (1<<4) /* Cache is write through */ 2086 2087 /* 2: ID Structure */ 2088 2089 typedef struct acpi_pptt_id 2090 { 2091 ACPI_SUBTABLE_HEADER Header; 2092 UINT16 Reserved; 2093 UINT32 VendorId; 2094 UINT64 Level1Id; 2095 UINT64 Level2Id; 2096 UINT16 MajorRev; 2097 UINT16 MinorRev; 2098 UINT16 SpinRev; 2099 2100 } ACPI_PPTT_ID; 2101 2102 2103 /******************************************************************************* 2104 * 2105 * RASF - RAS Feature Table (ACPI 5.0) 2106 * Version 1 2107 * 2108 ******************************************************************************/ 2109 2110 typedef struct acpi_table_rasf 2111 { 2112 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2113 UINT8 ChannelId[12]; 2114 2115 } ACPI_TABLE_RASF; 2116 2117 /* RASF Platform Communication Channel Shared Memory Region */ 2118 2119 typedef struct acpi_rasf_shared_memory 2120 { 2121 UINT32 Signature; 2122 UINT16 Command; 2123 UINT16 Status; 2124 UINT16 Version; 2125 UINT8 Capabilities[16]; 2126 UINT8 SetCapabilities[16]; 2127 UINT16 NumParameterBlocks; 2128 UINT32 SetCapabilitiesStatus; 2129 2130 } ACPI_RASF_SHARED_MEMORY; 2131 2132 /* RASF Parameter Block Structure Header */ 2133 2134 typedef struct acpi_rasf_parameter_block 2135 { 2136 UINT16 Type; 2137 UINT16 Version; 2138 UINT16 Length; 2139 2140 } ACPI_RASF_PARAMETER_BLOCK; 2141 2142 /* RASF Parameter Block Structure for PATROL_SCRUB */ 2143 2144 typedef struct acpi_rasf_patrol_scrub_parameter 2145 { 2146 ACPI_RASF_PARAMETER_BLOCK Header; 2147 UINT16 PatrolScrubCommand; 2148 UINT64 RequestedAddressRange[2]; 2149 UINT64 ActualAddressRange[2]; 2150 UINT16 Flags; 2151 UINT8 RequestedSpeed; 2152 2153 } ACPI_RASF_PATROL_SCRUB_PARAMETER; 2154 2155 /* Masks for Flags and Speed fields above */ 2156 2157 #define ACPI_RASF_SCRUBBER_RUNNING 1 2158 #define ACPI_RASF_SPEED (7<<1) 2159 #define ACPI_RASF_SPEED_SLOW (0<<1) 2160 #define ACPI_RASF_SPEED_MEDIUM (4<<1) 2161 #define ACPI_RASF_SPEED_FAST (7<<1) 2162 2163 /* Channel Commands */ 2164 2165 enum AcpiRasfCommands 2166 { 2167 ACPI_RASF_EXECUTE_RASF_COMMAND = 1 2168 }; 2169 2170 /* Platform RAS Capabilities */ 2171 2172 enum AcpiRasfCapabiliities 2173 { 2174 ACPI_HW_PATROL_SCRUB_SUPPORTED = 0, 2175 ACPI_SW_PATROL_SCRUB_EXPOSED = 1 2176 }; 2177 2178 /* Patrol Scrub Commands */ 2179 2180 enum AcpiRasfPatrolScrubCommands 2181 { 2182 ACPI_RASF_GET_PATROL_PARAMETERS = 1, 2183 ACPI_RASF_START_PATROL_SCRUBBER = 2, 2184 ACPI_RASF_STOP_PATROL_SCRUBBER = 3 2185 }; 2186 2187 /* Channel Command flags */ 2188 2189 #define ACPI_RASF_GENERATE_SCI (1<<15) 2190 2191 /* Status values */ 2192 2193 enum AcpiRasfStatus 2194 { 2195 ACPI_RASF_SUCCESS = 0, 2196 ACPI_RASF_NOT_VALID = 1, 2197 ACPI_RASF_NOT_SUPPORTED = 2, 2198 ACPI_RASF_BUSY = 3, 2199 ACPI_RASF_FAILED = 4, 2200 ACPI_RASF_ABORTED = 5, 2201 ACPI_RASF_INVALID_DATA = 6 2202 }; 2203 2204 /* Status flags */ 2205 2206 #define ACPI_RASF_COMMAND_COMPLETE (1) 2207 #define ACPI_RASF_SCI_DOORBELL (1<<1) 2208 #define ACPI_RASF_ERROR (1<<2) 2209 #define ACPI_RASF_STATUS (0x1F<<3) 2210 2211 2212 /******************************************************************************* 2213 * 2214 * SBST - Smart Battery Specification Table 2215 * Version 1 2216 * 2217 ******************************************************************************/ 2218 2219 typedef struct acpi_table_sbst 2220 { 2221 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2222 UINT32 WarningLevel; 2223 UINT32 LowLevel; 2224 UINT32 CriticalLevel; 2225 2226 } ACPI_TABLE_SBST; 2227 2228 2229 /******************************************************************************* 2230 * 2231 * SDEI - Software Delegated Exception Interface Descriptor Table 2232 * 2233 * Conforms to "Software Delegated Exception Interface (SDEI)" ARM DEN0054A, 2234 * May 8th, 2017. Copyright 2017 ARM Ltd. 2235 * 2236 ******************************************************************************/ 2237 2238 typedef struct acpi_table_sdei 2239 { 2240 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2241 2242 } ACPI_TABLE_SDEI; 2243 2244 2245 /******************************************************************************* 2246 * 2247 * SDEV - Secure Devices Table (ACPI 6.2) 2248 * Version 1 2249 * 2250 ******************************************************************************/ 2251 2252 typedef struct acpi_table_sdev 2253 { 2254 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2255 2256 } ACPI_TABLE_SDEV; 2257 2258 2259 typedef struct acpi_sdev_header 2260 { 2261 UINT8 Type; 2262 UINT8 Flags; 2263 UINT16 Length; 2264 2265 } ACPI_SDEV_HEADER; 2266 2267 2268 /* Values for subtable type above */ 2269 2270 enum AcpiSdevType 2271 { 2272 ACPI_SDEV_TYPE_NAMESPACE_DEVICE = 0, 2273 ACPI_SDEV_TYPE_PCIE_ENDPOINT_DEVICE = 1, 2274 ACPI_SDEV_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 2275 }; 2276 2277 /* Values for flags above */ 2278 2279 #define ACPI_SDEV_HANDOFF_TO_UNSECURE_OS (1) 2280 #define ACPI_SDEV_SECURE_COMPONENTS_PRESENT (1<<1) 2281 2282 /* 2283 * SDEV subtables 2284 */ 2285 2286 /* 0: Namespace Device Based Secure Device Structure */ 2287 2288 typedef struct acpi_sdev_namespace 2289 { 2290 ACPI_SDEV_HEADER Header; 2291 UINT16 DeviceIdOffset; 2292 UINT16 DeviceIdLength; 2293 UINT16 VendorDataOffset; 2294 UINT16 VendorDataLength; 2295 2296 } ACPI_SDEV_NAMESPACE; 2297 2298 typedef struct acpi_sdev_secure_component 2299 { 2300 UINT16 SecureComponentOffset; 2301 UINT16 SecureComponentLength; 2302 2303 } ACPI_SDEV_SECURE_COMPONENT; 2304 2305 2306 /* 2307 * SDEV sub-subtables ("Components") for above 2308 */ 2309 typedef struct acpi_sdev_component 2310 { 2311 ACPI_SDEV_HEADER Header; 2312 2313 } ACPI_SDEV_COMPONENT; 2314 2315 2316 /* Values for sub-subtable type above */ 2317 2318 enum AcpiSacType 2319 { 2320 ACPI_SDEV_TYPE_ID_COMPONENT = 0, 2321 ACPI_SDEV_TYPE_MEM_COMPONENT = 1 2322 }; 2323 2324 typedef struct acpi_sdev_id_component 2325 { 2326 ACPI_SDEV_HEADER Header; 2327 UINT16 HardwareIdOffset; 2328 UINT16 HardwareIdLength; 2329 UINT16 SubsystemIdOffset; 2330 UINT16 SubsystemIdLength; 2331 UINT16 HardwareRevision; 2332 UINT8 HardwareRevPresent; 2333 UINT8 ClassCodePresent; 2334 UINT8 PciBaseClass; 2335 UINT8 PciSubClass; 2336 UINT8 PciProgrammingXface; 2337 2338 } ACPI_SDEV_ID_COMPONENT; 2339 2340 typedef struct acpi_sdev_mem_component 2341 { 2342 ACPI_SDEV_HEADER Header; 2343 UINT32 Reserved; 2344 UINT64 MemoryBaseAddress; 2345 UINT64 MemoryLength; 2346 2347 } ACPI_SDEV_MEM_COMPONENT; 2348 2349 2350 /* 1: PCIe Endpoint Device Based Device Structure */ 2351 2352 typedef struct acpi_sdev_pcie 2353 { 2354 ACPI_SDEV_HEADER Header; 2355 UINT16 Segment; 2356 UINT16 StartBus; 2357 UINT16 PathOffset; 2358 UINT16 PathLength; 2359 UINT16 VendorDataOffset; 2360 UINT16 VendorDataLength; 2361 2362 } ACPI_SDEV_PCIE; 2363 2364 /* 1a: PCIe Endpoint path entry */ 2365 2366 typedef struct acpi_sdev_pcie_path 2367 { 2368 UINT8 Device; 2369 UINT8 Function; 2370 2371 } ACPI_SDEV_PCIE_PATH; 2372 2373 2374 /* Reset to default packing */ 2375 2376 #pragma pack() 2377 2378 #endif /* __ACTBL2_H__ */ 2379