1 /*- 2 * Copyright (c) 1998 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/i386/include/atomic.h,v 1.9.2.1 2000/07/07 00:38:47 obrien Exp $ 27 */ 28 #ifndef _CPU_ATOMIC_H_ 29 #define _CPU_ATOMIC_H_ 30 31 #ifndef _SYS_TYPES_H_ 32 #include <sys/types.h> 33 #endif 34 35 /* 36 * Various simple arithmetic on memory which is atomic in the presence 37 * of interrupts and multiple processors. 38 * 39 * atomic_set_char(P, V) (*(u_char*)(P) |= (V)) 40 * atomic_clear_char(P, V) (*(u_char*)(P) &= ~(V)) 41 * atomic_add_char(P, V) (*(u_char*)(P) += (V)) 42 * atomic_subtract_char(P, V) (*(u_char*)(P) -= (V)) 43 * 44 * atomic_set_short(P, V) (*(u_short*)(P) |= (V)) 45 * atomic_clear_short(P, V) (*(u_short*)(P) &= ~(V)) 46 * atomic_add_short(P, V) (*(u_short*)(P) += (V)) 47 * atomic_subtract_short(P, V) (*(u_short*)(P) -= (V)) 48 * 49 * atomic_set_int(P, V) (*(u_int*)(P) |= (V)) 50 * atomic_clear_int(P, V) (*(u_int*)(P) &= ~(V)) 51 * atomic_add_int(P, V) (*(u_int*)(P) += (V)) 52 * atomic_subtract_int(P, V) (*(u_int*)(P) -= (V)) 53 * 54 * atomic_set_long(P, V) (*(u_long*)(P) |= (V)) 55 * atomic_clear_long(P, V) (*(u_long*)(P) &= ~(V)) 56 * atomic_add_long(P, V) (*(u_long*)(P) += (V)) 57 * atomic_subtract_long(P, V) (*(u_long*)(P) -= (V)) 58 * atomic_readandclear_long(P) (return (*(u_long*)(P)); *(u_long*)(P) = 0;) 59 * atomic_readandclear_int(P) (return (*(u_int*)(P)); *(u_int*)(P) = 0;) 60 */ 61 62 /* 63 * The above functions are expanded inline in the statically-linked 64 * kernel and lock prefixes are generated. 65 * 66 * Kernel modules call real functions which are built into the kernel. 67 */ 68 #if defined(KLD_MODULE) 69 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 70 extern void atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v); \ 71 extern void atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v); 72 73 int atomic_testandset_int(volatile u_int *p, u_int v); 74 75 #else /* !KLD_MODULE */ 76 #define MPLOCKED "lock ; " 77 78 /* 79 * The assembly is volatilized to demark potential before-and-after side 80 * effects if an interrupt or SMP collision were to occur. The primary 81 * atomic instructions are MP safe, the nonlocked instructions are 82 * local-interrupt-safe (so we don't depend on C 'X |= Y' generating an 83 * atomic instruction). 84 * 85 * +m - memory is read and written (=m - memory is only written) 86 * iq - integer constant or %ax/%bx/%cx/%dx (ir = int constant or any reg) 87 * (Note: byte instructions only work on %ax,%bx,%cx, or %dx). iq 88 * is good enough for our needs so don't get fancy. 89 * r - any register. 90 * 91 * NOTE: 64-bit immediate values are not supported for most x86-64 92 * instructions so we have to use "r". 93 */ 94 95 /* egcs 1.1.2+ version */ 96 #define ATOMIC_ASM(NAME, TYPE, OP, CONS, V) \ 97 static __inline void \ 98 atomic_##NAME##_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 99 { \ 100 __asm __volatile(MPLOCKED OP \ 101 : "+m" (*p) \ 102 : CONS (V)); \ 103 } \ 104 static __inline void \ 105 atomic_##NAME##_##TYPE##_nonlocked(volatile u_##TYPE *p, u_##TYPE v)\ 106 { \ 107 __asm __volatile(OP \ 108 : "+m" (*p) \ 109 : CONS (V)); \ 110 } 111 112 #endif /* KLD_MODULE */ 113 114 /* egcs 1.1.2+ version */ 115 ATOMIC_ASM(set, char, "orb %b1,%0", "iq", v) 116 ATOMIC_ASM(clear, char, "andb %b1,%0", "iq", ~v) 117 ATOMIC_ASM(add, char, "addb %b1,%0", "iq", v) 118 ATOMIC_ASM(subtract, char, "subb %b1,%0", "iq", v) 119 120 ATOMIC_ASM(set, short, "orw %w1,%0", "iq", v) 121 ATOMIC_ASM(clear, short, "andw %w1,%0", "iq", ~v) 122 ATOMIC_ASM(add, short, "addw %w1,%0", "iq", v) 123 ATOMIC_ASM(subtract, short, "subw %w1,%0", "iq", v) 124 125 ATOMIC_ASM(set, int, "orl %1,%0", "iq", v) 126 ATOMIC_ASM(clear, int, "andl %1,%0", "iq", ~v) 127 ATOMIC_ASM(add, int, "addl %1,%0", "iq", v) 128 ATOMIC_ASM(subtract, int, "subl %1,%0", "iq", v) 129 130 ATOMIC_ASM(set, long, "orq %1,%0", "r", v) 131 ATOMIC_ASM(clear, long, "andq %1,%0", "r", ~v) 132 ATOMIC_ASM(add, long, "addq %1,%0", "r", v) 133 ATOMIC_ASM(subtract, long, "subq %1,%0", "r", v) 134 135 #if defined(KLD_MODULE) 136 137 u_long atomic_readandclear_long(volatile u_long *addr); 138 u_int atomic_readandclear_int(volatile u_int *addr); 139 140 #else /* !KLD_MODULE */ 141 142 static __inline u_long 143 atomic_readandclear_long(volatile u_long *addr) 144 { 145 u_long res; 146 147 res = 0; 148 __asm __volatile( 149 " xchgq %1,%0 ; " 150 "# atomic_readandclear_long" 151 : "+r" (res), /* 0 */ 152 "=m" (*addr) /* 1 */ 153 : "m" (*addr)); 154 155 return (res); 156 } 157 158 static __inline u_int 159 atomic_readandclear_int(volatile u_int *addr) 160 { 161 u_int res; 162 163 res = 0; 164 __asm __volatile( 165 " xchgl %1,%0 ; " 166 "# atomic_readandclear_int" 167 : "+r" (res), /* 0 */ 168 "=m" (*addr) /* 1 */ 169 : "m" (*addr)); 170 171 return (res); 172 } 173 174 #endif /* KLD_MODULE */ 175 176 /* 177 * atomic_poll_acquire_int(P) Returns non-zero on success, 0 if the lock 178 * has already been acquired. 179 * atomic_poll_release_int(P) 180 * 181 * These support the NDIS driver and are also used for IPIQ interlocks 182 * between cpus. Both the acquisition and release must be 183 * cache-synchronizing instructions. 184 */ 185 186 #if defined(KLD_MODULE) 187 188 extern int atomic_swap_int(volatile int *addr, int value); 189 extern long atomic_swap_long(volatile long *addr, long value); 190 extern void *atomic_swap_ptr(volatile void **addr, void *value); 191 extern int atomic_poll_acquire_int(volatile u_int *p); 192 extern void atomic_poll_release_int(volatile u_int *p); 193 194 #else 195 196 static __inline int 197 atomic_swap_int(volatile int *addr, int value) 198 { 199 __asm __volatile("xchgl %0, %1" : 200 "=r" (value), "=m" (*addr) : "0" (value) : "memory"); 201 return (value); 202 } 203 204 static __inline long 205 atomic_swap_long(volatile long *addr, long value) 206 { 207 __asm __volatile("xchgq %0, %1" : 208 "=r" (value), "=m" (*addr) : "0" (value) : "memory"); 209 return (value); 210 } 211 212 static __inline void * 213 atomic_swap_ptr(volatile void **addr, void *value) 214 { 215 __asm __volatile("xchgq %0, %1" : 216 "=r" (value), "=m" (*addr) : "0" (value) : "memory"); 217 return (value); 218 } 219 220 static __inline 221 int 222 atomic_poll_acquire_int(volatile u_int *p) 223 { 224 u_int data; 225 226 __asm __volatile(MPLOCKED "btsl $0,%0; setnc %%al; andl $255,%%eax" : "+m" (*p), "=a" (data)); 227 return(data); 228 } 229 230 static __inline 231 void 232 atomic_poll_release_int(volatile u_int *p) 233 { 234 __asm __volatile(MPLOCKED "btrl $0,%0" : "+m" (*p)); 235 } 236 237 #endif 238 239 /* 240 * These functions operate on a 32 bit interrupt interlock which is defined 241 * as follows: 242 * 243 * bit 0-30 interrupt handler disabled bits (counter) 244 * bit 31 interrupt handler currently running bit (1 = run) 245 * 246 * atomic_intr_cond_test(P) Determine if the interlock is in an 247 * acquired state. Returns 0 if it not 248 * acquired, non-zero if it is. 249 * 250 * atomic_intr_cond_try(P) 251 * Increment the request counter and attempt to 252 * set bit 31 to acquire the interlock. If 253 * we are unable to set bit 31 the request 254 * counter is decremented and we return -1, 255 * otherwise we return 0. 256 * 257 * atomic_intr_cond_enter(P, func, arg) 258 * Increment the request counter and attempt to 259 * set bit 31 to acquire the interlock. If 260 * we are unable to set bit 31 func(arg) is 261 * called in a loop until we are able to set 262 * bit 31. 263 * 264 * atomic_intr_cond_exit(P, func, arg) 265 * Decrement the request counter and clear bit 266 * 31. If the request counter is still non-zero 267 * call func(arg) once. 268 * 269 * atomic_intr_handler_disable(P) 270 * Set bit 30, indicating that the interrupt 271 * handler has been disabled. Must be called 272 * after the hardware is disabled. 273 * 274 * Returns bit 31 indicating whether a serialized 275 * accessor is active (typically the interrupt 276 * handler is running). 0 == not active, 277 * non-zero == active. 278 * 279 * atomic_intr_handler_enable(P) 280 * Clear bit 30, indicating that the interrupt 281 * handler has been enabled. Must be called 282 * before the hardware is actually enabled. 283 * 284 * atomic_intr_handler_is_enabled(P) 285 * Returns bit 30, 0 indicates that the handler 286 * is enabled, non-zero indicates that it is 287 * disabled. The request counter portion of 288 * the field is ignored. 289 */ 290 291 #if defined(KLD_MODULE) 292 293 void atomic_intr_init(__atomic_intr_t *p); 294 int atomic_intr_handler_disable(__atomic_intr_t *p); 295 void atomic_intr_handler_enable(__atomic_intr_t *p); 296 int atomic_intr_handler_is_enabled(__atomic_intr_t *p); 297 int atomic_intr_cond_test(__atomic_intr_t *p); 298 int atomic_intr_cond_try(__atomic_intr_t *p); 299 void atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg); 300 void atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg); 301 302 #else 303 304 static __inline 305 void 306 atomic_intr_init(__atomic_intr_t *p) 307 { 308 *p = 0; 309 } 310 311 static __inline 312 int 313 atomic_intr_handler_disable(__atomic_intr_t *p) 314 { 315 int data; 316 317 __asm __volatile(MPLOCKED "orl $0x40000000,%1; movl %1,%%eax; " \ 318 "andl $0x80000000,%%eax" \ 319 : "=a"(data) , "+m"(*p)); 320 return(data); 321 } 322 323 static __inline 324 void 325 atomic_intr_handler_enable(__atomic_intr_t *p) 326 { 327 __asm __volatile(MPLOCKED "andl $0xBFFFFFFF,%0" : "+m" (*p)); 328 } 329 330 static __inline 331 int 332 atomic_intr_handler_is_enabled(__atomic_intr_t *p) 333 { 334 int data; 335 336 __asm __volatile("movl %1,%%eax; andl $0x40000000,%%eax" \ 337 : "=a"(data) : "m"(*p)); 338 return(data); 339 } 340 341 static __inline 342 void 343 atomic_intr_cond_enter(__atomic_intr_t *p, void (*func)(void *), void *arg) 344 { 345 __asm __volatile(MPLOCKED "incl %0; " \ 346 "1: ;" \ 347 MPLOCKED "btsl $31,%0; jnc 2f; " \ 348 "movq %2,%%rdi; call *%1; " \ 349 "jmp 1b; " \ 350 "2: ;" \ 351 : "+m" (*p) \ 352 : "r"(func), "m"(arg) \ 353 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11"); 354 /* YYY the function call may clobber even more registers? */ 355 } 356 357 /* 358 * Attempt to enter the interrupt condition variable. Returns zero on 359 * success, 1 on failure. 360 */ 361 static __inline 362 int 363 atomic_intr_cond_try(__atomic_intr_t *p) 364 { 365 int ret; 366 367 __asm __volatile(MPLOCKED "incl %0; " \ 368 "1: ;" \ 369 "subl %%eax,%%eax; " \ 370 MPLOCKED "btsl $31,%0; jnc 2f; " \ 371 MPLOCKED "decl %0; " \ 372 "movl $1,%%eax;" \ 373 "2: ;" 374 : "+m" (*p), "=&a"(ret) 375 : : "cx", "dx"); 376 return (ret); 377 } 378 379 380 static __inline 381 int 382 atomic_intr_cond_test(__atomic_intr_t *p) 383 { 384 return((int)(*p & 0x80000000)); 385 } 386 387 static __inline 388 void 389 atomic_intr_cond_exit(__atomic_intr_t *p, void (*func)(void *), void *arg) 390 { 391 __asm __volatile(MPLOCKED "decl %0; " \ 392 MPLOCKED "btrl $31,%0; " \ 393 "testl $0x3FFFFFFF,%0; jz 1f; " \ 394 "movq %2,%%rdi; call *%1; " \ 395 "1: ;" \ 396 : "+m" (*p) \ 397 : "r"(func), "m"(arg) \ 398 : "ax", "cx", "dx", "rsi", "rdi", "r8", "r9", "r10", "r11"); 399 /* YYY the function call may clobber even more registers? */ 400 } 401 402 #endif 403 404 /* 405 * Atomic compare and set 406 * 407 * if (*_dst == _old) *_dst = _new (all 32 bit words) 408 * 409 * Returns 0 on failure, non-zero on success. The inline is designed to 410 * allow the compiler to optimize the common case where the caller calls 411 * these functions from inside a conditional. 412 */ 413 #if defined(KLD_MODULE) 414 415 extern int atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new); 416 extern long atomic_cmpset_long(volatile u_long *_dst, u_long _exp, u_long _src); 417 extern u_int atomic_fetchadd_int(volatile u_int *_p, u_int _v); 418 extern u_long atomic_fetchadd_long(volatile u_long *_p, u_long _v); 419 420 #else 421 422 static __inline int 423 atomic_cmpset_int(volatile u_int *_dst, u_int _old, u_int _new) 424 { 425 u_int res = _old; 426 427 __asm __volatile(MPLOCKED "cmpxchgl %2,%1; " \ 428 : "+a" (res), "=m" (*_dst) \ 429 : "r" (_new), "m" (*_dst) \ 430 : "memory"); 431 return (res == _old); 432 } 433 434 static __inline long 435 atomic_cmpset_long(volatile u_long *_dst, u_long _old, u_long _new) 436 { 437 u_long res = _old; 438 439 __asm __volatile(MPLOCKED "cmpxchgq %2,%1; " \ 440 : "+a" (res), "=m" (*_dst) \ 441 : "r" (_new), "m" (*_dst) \ 442 : "memory"); 443 return (res == _old); 444 } 445 446 /* 447 * Atomically add the value of v to the integer pointed to by p and return 448 * the previous value of *p. 449 */ 450 static __inline u_int 451 atomic_fetchadd_int(volatile u_int *_p, u_int _v) 452 { 453 __asm __volatile(MPLOCKED "xaddl %0,%1; " \ 454 : "+r" (_v), "=m" (*_p) \ 455 : "m" (*_p) \ 456 : "memory"); 457 return (_v); 458 } 459 460 static __inline u_long 461 atomic_fetchadd_long(volatile u_long *_p, u_long _v) 462 { 463 __asm __volatile(MPLOCKED "xaddq %0,%1; " \ 464 : "+r" (_v), "=m" (*_p) \ 465 : "m" (*_p) \ 466 : "memory"); 467 return (_v); 468 } 469 470 static __inline int 471 atomic_testandset_int(volatile u_int *p, u_int v) 472 { 473 u_char res; 474 475 __asm __volatile( 476 " " MPLOCKED " " 477 " btsl %2,%1 ; " 478 " setc %0 ; " 479 "# atomic_testandset_int" 480 : "=q" (res), /* 0 */ 481 "+m" (*p) /* 1 */ 482 : "Ir" (v & 0x1f) /* 2 */ 483 : "cc"); 484 return (res); 485 } 486 487 #endif /* KLD_MODULE */ 488 489 #if defined(KLD_MODULE) 490 491 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ 492 extern u_##TYPE atomic_load_acq_##TYPE(volatile u_##TYPE *p); \ 493 extern void atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v); 494 495 #else /* !KLD_MODULE */ 496 497 #define ATOMIC_STORE_LOAD(TYPE, LOP, SOP) \ 498 static __inline u_##TYPE \ 499 atomic_load_acq_##TYPE(volatile u_##TYPE *p) \ 500 { \ 501 u_##TYPE res; \ 502 \ 503 __asm __volatile(MPLOCKED LOP \ 504 : "=a" (res), /* 0 */ \ 505 "=m" (*p) /* 1 */ \ 506 : "m" (*p) /* 2 */ \ 507 : "memory"); \ 508 \ 509 return (res); \ 510 } \ 511 \ 512 /* \ 513 * The XCHG instruction asserts LOCK automagically. \ 514 */ \ 515 static __inline void \ 516 atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v)\ 517 { \ 518 __asm __volatile(SOP \ 519 : "=m" (*p), /* 0 */ \ 520 "+r" (v) /* 1 */ \ 521 : "m" (*p)); /* 2 */ \ 522 } \ 523 struct __hack 524 525 #endif /* !KLD_MODULE */ 526 527 ATOMIC_STORE_LOAD(char, "cmpxchgb %b0,%1", "xchgb %b1,%0"); 528 ATOMIC_STORE_LOAD(short,"cmpxchgw %w0,%1", "xchgw %w1,%0"); 529 ATOMIC_STORE_LOAD(int, "cmpxchgl %0,%1", "xchgl %1,%0"); 530 ATOMIC_STORE_LOAD(long, "cmpxchgq %0,%1", "xchgq %1,%0"); 531 532 #undef ATOMIC_ASM 533 #undef ATOMIC_STORE_LOAD 534 535 /* Acquire and release variants are identical to the normal ones. */ 536 #define atomic_set_acq_char atomic_set_char 537 #define atomic_set_rel_char atomic_set_char 538 #define atomic_clear_acq_char atomic_clear_char 539 #define atomic_clear_rel_char atomic_clear_char 540 #define atomic_add_acq_char atomic_add_char 541 #define atomic_add_rel_char atomic_add_char 542 #define atomic_subtract_acq_char atomic_subtract_char 543 #define atomic_subtract_rel_char atomic_subtract_char 544 545 #define atomic_set_acq_short atomic_set_short 546 #define atomic_set_rel_short atomic_set_short 547 #define atomic_clear_acq_short atomic_clear_short 548 #define atomic_clear_rel_short atomic_clear_short 549 #define atomic_add_acq_short atomic_add_short 550 #define atomic_add_rel_short atomic_add_short 551 #define atomic_subtract_acq_short atomic_subtract_short 552 #define atomic_subtract_rel_short atomic_subtract_short 553 554 #define atomic_set_acq_int atomic_set_int 555 #define atomic_set_rel_int atomic_set_int 556 #define atomic_clear_acq_int atomic_clear_int 557 #define atomic_clear_rel_int atomic_clear_int 558 #define atomic_add_acq_int atomic_add_int 559 #define atomic_add_rel_int atomic_add_int 560 #define atomic_subtract_acq_int atomic_subtract_int 561 #define atomic_subtract_rel_int atomic_subtract_int 562 #define atomic_cmpset_acq_int atomic_cmpset_int 563 #define atomic_cmpset_rel_int atomic_cmpset_int 564 565 #define atomic_set_acq_long atomic_set_long 566 #define atomic_set_rel_long atomic_set_long 567 #define atomic_clear_acq_long atomic_clear_long 568 #define atomic_clear_rel_long atomic_clear_long 569 #define atomic_add_acq_long atomic_add_long 570 #define atomic_add_rel_long atomic_add_long 571 #define atomic_subtract_acq_long atomic_subtract_long 572 #define atomic_subtract_rel_long atomic_subtract_long 573 #define atomic_cmpset_acq_long atomic_cmpset_long 574 #define atomic_cmpset_rel_long atomic_cmpset_long 575 576 /* cpumask_t is 64-bits on x86-64 */ 577 #define atomic_set_cpumask atomic_set_long 578 #define atomic_clear_cpumask atomic_clear_long 579 #define atomic_cmpset_cpumask atomic_cmpset_long 580 581 /* Operations on 8-bit bytes. */ 582 #define atomic_set_8 atomic_set_char 583 #define atomic_set_acq_8 atomic_set_acq_char 584 #define atomic_set_rel_8 atomic_set_rel_char 585 #define atomic_clear_8 atomic_clear_char 586 #define atomic_clear_acq_8 atomic_clear_acq_char 587 #define atomic_clear_rel_8 atomic_clear_rel_char 588 #define atomic_add_8 atomic_add_char 589 #define atomic_add_acq_8 atomic_add_acq_char 590 #define atomic_add_rel_8 atomic_add_rel_char 591 #define atomic_subtract_8 atomic_subtract_char 592 #define atomic_subtract_acq_8 atomic_subtract_acq_char 593 #define atomic_subtract_rel_8 atomic_subtract_rel_char 594 #define atomic_load_acq_8 atomic_load_acq_char 595 #define atomic_store_rel_8 atomic_store_rel_char 596 597 /* Operations on 16-bit words. */ 598 #define atomic_set_16 atomic_set_short 599 #define atomic_set_acq_16 atomic_set_acq_short 600 #define atomic_set_rel_16 atomic_set_rel_short 601 #define atomic_clear_16 atomic_clear_short 602 #define atomic_clear_acq_16 atomic_clear_acq_short 603 #define atomic_clear_rel_16 atomic_clear_rel_short 604 #define atomic_add_16 atomic_add_short 605 #define atomic_add_acq_16 atomic_add_acq_short 606 #define atomic_add_rel_16 atomic_add_rel_short 607 #define atomic_subtract_16 atomic_subtract_short 608 #define atomic_subtract_acq_16 atomic_subtract_acq_short 609 #define atomic_subtract_rel_16 atomic_subtract_rel_short 610 #define atomic_load_acq_16 atomic_load_acq_short 611 #define atomic_store_rel_16 atomic_store_rel_short 612 613 /* Operations on 32-bit double words. */ 614 #define atomic_set_32 atomic_set_int 615 #define atomic_set_acq_32 atomic_set_acq_int 616 #define atomic_set_rel_32 atomic_set_rel_int 617 #define atomic_clear_32 atomic_clear_int 618 #define atomic_clear_acq_32 atomic_clear_acq_int 619 #define atomic_clear_rel_32 atomic_clear_rel_int 620 #define atomic_add_32 atomic_add_int 621 #define atomic_add_acq_32 atomic_add_acq_int 622 #define atomic_add_rel_32 atomic_add_rel_int 623 #define atomic_subtract_32 atomic_subtract_int 624 #define atomic_subtract_acq_32 atomic_subtract_acq_int 625 #define atomic_subtract_rel_32 atomic_subtract_rel_int 626 #define atomic_load_acq_32 atomic_load_acq_int 627 #define atomic_store_rel_32 atomic_store_rel_int 628 #define atomic_cmpset_32 atomic_cmpset_int 629 #define atomic_cmpset_acq_32 atomic_cmpset_acq_int 630 #define atomic_cmpset_rel_32 atomic_cmpset_rel_int 631 #define atomic_readandclear_32 atomic_readandclear_int 632 #define atomic_fetchadd_32 atomic_fetchadd_int 633 634 /* Operations on 64-bit quad words. */ 635 #define atomic_load_acq_64 atomic_load_acq_long 636 #define atomic_store_rel_64 atomic_store_rel_long 637 #define atomic_swap_64 atomic_swap_long 638 639 /* Operations on pointers. */ 640 #define atomic_set_ptr(p, v) \ 641 atomic_set_long((volatile u_long *)(p), (u_long)(v)) 642 #define atomic_set_acq_ptr(p, v) \ 643 atomic_set_acq_long((volatile u_long *)(p), (u_long)(v)) 644 #define atomic_set_rel_ptr(p, v) \ 645 atomic_set_rel_long((volatile u_long *)(p), (u_long)(v)) 646 #define atomic_clear_ptr(p, v) \ 647 atomic_clear_long((volatile u_long *)(p), (u_long)(v)) 648 #define atomic_clear_acq_ptr(p, v) \ 649 atomic_clear_acq_long((volatile u_long *)(p), (u_long)(v)) 650 #define atomic_clear_rel_ptr(p, v) \ 651 atomic_clear_rel_long((volatile u_long *)(p), (u_long)(v)) 652 #define atomic_add_ptr(p, v) \ 653 atomic_add_long((volatile u_long *)(p), (u_long)(v)) 654 #define atomic_add_acq_ptr(p, v) \ 655 atomic_add_acq_long((volatile u_long *)(p), (u_long)(v)) 656 #define atomic_add_rel_ptr(p, v) \ 657 atomic_add_rel_long((volatile u_long *)(p), (u_long)(v)) 658 #define atomic_subtract_ptr(p, v) \ 659 atomic_subtract_long((volatile u_long *)(p), (u_long)(v)) 660 #define atomic_subtract_acq_ptr(p, v) \ 661 atomic_subtract_acq_long((volatile u_long *)(p), (u_long)(v)) 662 #define atomic_subtract_rel_ptr(p, v) \ 663 atomic_subtract_rel_long((volatile u_long *)(p), (u_long)(v)) 664 #define atomic_load_acq_ptr(p) \ 665 atomic_load_acq_long((volatile u_long *)(p)) 666 #define atomic_store_rel_ptr(p, v) \ 667 atomic_store_rel_long((volatile u_long *)(p), (v)) 668 #define atomic_cmpset_ptr(dst, old, new) \ 669 atomic_cmpset_long((volatile u_long *)(dst), (u_long)(old), \ 670 (u_long)(new)) 671 #define atomic_cmpset_acq_ptr(dst, old, new) \ 672 atomic_cmpset_acq_long((volatile u_long *)(dst), (u_long)(old), \ 673 (u_long)(new)) 674 #define atomic_cmpset_rel_ptr(dst, old, new) \ 675 atomic_cmpset_rel_long((volatile u_long *)(dst), (u_long)(old), \ 676 (u_long)(new)) 677 #define atomic_readandclear_ptr(p) \ 678 atomic_readandclear_long((volatile u_long *)(p)) 679 680 #endif /* ! _CPU_ATOMIC_H_ */ 681