xref: /dragonfly/sys/cpu/x86_64/include/pmap.h (revision 9f7604d7)
1 /*-
2  * Copyright (c) 1991 Regents of the University of California.
3  * Copyright (c) 2003 Peter Wemm.
4  * Copyright (c) 2008 The DragonFly Project.
5  * All rights reserved.
6  *
7  * This code is derived from software contributed to Berkeley by
8  * the Systems Programming Group of the University of Utah Computer
9  * Science Department and William Jolitz of UUNET Technologies Inc.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 4. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  * Derived from hp300 version by Mike Hibler, this version by William
36  * Jolitz uses a recursive map [a pde points to the page directory] to
37  * map the page tables using the pagetables themselves. This is done to
38  * reduce the impact on kernel virtual memory for lots of sparse address
39  * space, and to reduce the cost of memory to each process.
40  *
41  * from: hp300: @(#)pmap.h	7.2 (Berkeley) 12/16/90
42  * from: @(#)pmap.h	7.4 (Berkeley) 5/12/91
43  */
44 
45 #ifndef _CPU_PMAP_H_
46 #define _CPU_PMAP_H_
47 
48 /*
49  * Page-directory and page-table entries follow this format, with a few
50  * of the fields not present here and there, depending on a lot of things.
51  */
52 				/* ---- Intel Nomenclature ---- */
53 #define	X86_PG_V		0x001	/* P	Valid			*/
54 #define	X86_PG_RW		0x002	/* R/W	Read/Write		*/
55 #define	X86_PG_U		0x004	/* U/S  User/Supervisor		*/
56 #define	X86_PG_NC_PWT		0x008	/* PWT	Write through		*/
57 #define	X86_PG_NC_PCD		0x010	/* PCD	Cache disable		*/
58 #define	X86_PG_A		0x020	/* A	Accessed		*/
59 #define	X86_PG_M		0x040	/* D	Dirty			*/
60 #define	X86_PG_PS		0x080	/* PS	Page size (0=4k,1=2M)	*/
61 #define	X86_PG_PTE_PAT		0x080	/* PAT	PAT index		*/
62 #define	X86_PG_G		0x100	/* G	Global			*/
63 #define	X86_PG_AVAIL1		0x200	/*    /	Available for system	*/
64 #define	X86_PG_AVAIL2		0x400	/*   <	programmers use		*/
65 #define	X86_PG_AVAIL3		0x800	/*    \				*/
66 #define	X86_PG_PDE_PAT		0x1000	/* PAT	PAT index		*/
67 #define	X86_PG_NX		(1ul<<63) /* No-execute */
68 
69 
70 /* Our various interpretations of the above */
71 //#define PG_W		PG_AVAIL1	/* "Wired" pseudoflag */
72 //#define	PG_MANAGED	PG_AVAIL2
73 //#define	PG_DEVICE	PG_AVAIL3
74 #define	PG_FRAME	(0x000ffffffffff000ul)
75 #define	PG_PS_FRAME	(0x000fffffffe00000ul)
76 //#define	PG_PROT		(PG_RW|PG_U)	/* all protection bits . */
77 //#define PG_N		(PG_NC_PWT|PG_NC_PCD)	/* Non-cacheable */
78 
79 /*
80  * Promotion to a 2MB (PDE) page mapping requires that the corresponding 4KB
81  * (PTE) page mappings have identical settings for the following fields:
82  */
83 /*
84 #define	PG_PTE_PROMOTE	(PG_NX | PG_MANAGED | PG_W | PG_G | PG_PTE_PAT | \
85 	    PG_M | PG_A | PG_NC_PCD | PG_NC_PWT | PG_U | PG_RW | PG_V)
86 */
87 /*
88  * Page Protection Exception bits
89  */
90 
91 #define PGEX_P		0x01	/* Protection violation vs. not present */
92 #define PGEX_W		0x02	/* during a Write cycle */
93 #define PGEX_U		0x04	/* access from User mode (UPL) */
94 #define PGEX_RSV	0x08	/* reserved PTE field is non-zero */
95 #define PGEX_I		0x10	/* during an instruction fetch */
96 
97 /*
98  * Virtual kernel bits, managed by software.  Stored in tf_xflags.
99  *
100  * PGEX_FPFAULT - Force the FP unit to generate a T_DNA fault if an
101  *		  emulated user process tried to use it.  This bit is
102  *		  only used by vmspace_ctl().
103  */
104 #define PGEX_FPFAULT	0x80
105 
106 #endif /* !_CPU_PMAP_H_ */
107