1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/agp/agp.c,v 1.58 2007/11/12 21:51:36 jhb Exp $ 27 * $DragonFly: src/sys/dev/agp/agp.c,v 1.30 2008/01/07 01:34:58 corecode Exp $ 28 */ 29 30 #include "opt_bus.h" 31 #include "opt_pci.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/bus.h> 40 #include <sys/ioccom.h> 41 #include <sys/agpio.h> 42 #include <sys/lock.h> 43 #include <sys/proc.h> 44 #include <sys/rman.h> 45 46 #include <bus/pci/pcivar.h> 47 #include <bus/pci/pcireg.h> 48 #include "agppriv.h" 49 #include "agpvar.h" 50 #include "agpreg.h" 51 52 #include <vm/vm.h> 53 #include <vm/vm_object.h> 54 #include <vm/vm_page.h> 55 #include <vm/vm_pageout.h> 56 #include <vm/pmap.h> 57 58 #include <machine/md_var.h> 59 60 MODULE_VERSION(agp, 1); 61 62 MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); 63 64 #define CDEV_MAJOR 148 65 /* agp_drv.c */ 66 static d_open_t agp_open; 67 static d_close_t agp_close; 68 static d_ioctl_t agp_ioctl; 69 static d_mmap_t agp_mmap; 70 71 static struct dev_ops agp_ops = { 72 { "agp", CDEV_MAJOR, D_TTY }, 73 .d_open = agp_open, 74 .d_close = agp_close, 75 .d_ioctl = agp_ioctl, 76 .d_mmap = agp_mmap, 77 }; 78 79 static devclass_t agp_devclass; 80 #define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) 81 82 /* Helper functions for implementing chipset mini drivers. */ 83 84 void 85 agp_flush_cache(void) 86 { 87 #if defined(__i386__) || defined(__amd64__) 88 wbinvd(); 89 #endif 90 } 91 92 u_int8_t 93 agp_find_caps(device_t dev) 94 { 95 u_int32_t status; 96 u_int8_t ptr, next; 97 98 /* 99 * Check the CAP_LIST bit of the PCI status register first. 100 */ 101 status = pci_read_config(dev, PCIR_STATUS, 2); 102 if (!(status & 0x10)) 103 return 0; 104 105 /* 106 * Traverse the capabilities list. 107 */ 108 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); 109 ptr != 0; 110 ptr = next) { 111 u_int32_t capid = pci_read_config(dev, ptr, 4); 112 next = AGP_CAPID_GET_NEXT_PTR(capid); 113 114 /* 115 * If this capability entry ID is 2, then we are done. 116 */ 117 if (AGP_CAPID_GET_CAP_ID(capid) == 2) 118 return ptr; 119 } 120 121 return 0; 122 } 123 124 /* 125 * Find an AGP display device (if any). 126 */ 127 static device_t 128 agp_find_display(void) 129 { 130 devclass_t pci = devclass_find("pci"); 131 device_t bus, dev = 0; 132 device_t *kids; 133 int busnum, numkids, i; 134 135 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { 136 bus = devclass_get_device(pci, busnum); 137 if (!bus) 138 continue; 139 device_get_children(bus, &kids, &numkids); 140 for (i = 0; i < numkids; i++) { 141 dev = kids[i]; 142 if (pci_get_class(dev) == PCIC_DISPLAY 143 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) 144 if (agp_find_caps(dev)) { 145 kfree(kids, M_TEMP); 146 return dev; 147 } 148 149 } 150 kfree(kids, M_TEMP); 151 } 152 153 return 0; 154 } 155 156 struct agp_gatt * 157 agp_alloc_gatt(device_t dev) 158 { 159 u_int32_t apsize = AGP_GET_APERTURE(dev); 160 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 161 struct agp_gatt *gatt; 162 163 if (bootverbose) 164 device_printf(dev, 165 "allocating GATT for aperture of size %dM\n", 166 apsize / (1024*1024)); 167 168 if (entries == 0) { 169 device_printf(dev, "bad aperture size\n"); 170 return NULL; 171 } 172 173 gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_INTWAIT); 174 gatt->ag_entries = entries; 175 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 176 M_WAITOK|M_ZERO, 0, ~0, PAGE_SIZE, 0); 177 if (!gatt->ag_virtual) { 178 if (bootverbose) 179 device_printf(dev, "contiguous allocation failed\n"); 180 kfree(gatt, M_AGP); 181 return 0; 182 } 183 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 184 agp_flush_cache(); 185 186 return gatt; 187 } 188 189 void 190 agp_free_gatt(struct agp_gatt *gatt) 191 { 192 contigfree(gatt->ag_virtual, 193 gatt->ag_entries * sizeof(u_int32_t), M_AGP); 194 kfree(gatt, M_AGP); 195 } 196 197 static u_int agp_max[][2] = { 198 {0, 0}, 199 {32, 4}, 200 {64, 28}, 201 {128, 96}, 202 {256, 204}, 203 {512, 440}, 204 {1024, 942}, 205 {2048, 1920}, 206 {4096, 3932} 207 }; 208 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 209 210 /** 211 * Sets the PCI resource which represents the AGP aperture. 212 * 213 * If not called, the default AGP aperture resource of AGP_APBASE will 214 * be used. Must be called before agp_generic_attach(). 215 */ 216 void 217 agp_set_aperture_resource(device_t dev, int rid) 218 { 219 struct agp_softc *sc = device_get_softc(dev); 220 221 sc->as_aperture_rid = rid; 222 } 223 224 int 225 agp_generic_attach(device_t dev) 226 { 227 struct agp_softc *sc = device_get_softc(dev); 228 int i; 229 u_int memsize; 230 231 /* 232 * Find and map the aperture, RF_SHAREABLE for DRM but not RF_ACTIVE 233 * because the kernel doesn't need to map it. 234 */ 235 if (sc->as_aperture_rid == 0) 236 sc->as_aperture_rid = AGP_APBASE; 237 238 sc->as_aperture = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 239 &sc->as_aperture_rid, RF_SHAREABLE); 240 if (!sc->as_aperture) 241 return ENOMEM; 242 243 /* 244 * Work out an upper bound for agp memory allocation. This 245 * uses a heurisitc table from the Linux driver. 246 */ 247 memsize = ptoa(Maxmem) >> 20; 248 for (i = 0; i < agp_max_size; i++) { 249 if (memsize <= agp_max[i][0]) 250 break; 251 } 252 if (i == agp_max_size) i = agp_max_size - 1; 253 sc->as_maxmem = agp_max[i][1] << 20U; 254 255 /* 256 * The lock is used to prevent re-entry to 257 * agp_generic_bind_memory() since that function can sleep. 258 */ 259 lockinit(&sc->as_lock, "agplk", 0, 0); 260 261 /* 262 * Initialise stuff for the userland device. 263 */ 264 agp_devclass = devclass_find("agp"); 265 TAILQ_INIT(&sc->as_memory); 266 sc->as_nextid = 1; 267 268 dev_ops_add(&agp_ops, -1, device_get_unit(dev)); 269 make_dev(&agp_ops, device_get_unit(dev), UID_ROOT, GID_WHEEL, 270 0600, "agpgart"); 271 272 return 0; 273 } 274 275 void 276 agp_free_cdev(device_t dev) 277 { 278 dev_ops_remove(&agp_ops, -1, device_get_unit(dev)); 279 } 280 281 void 282 agp_free_res(device_t dev) 283 { 284 struct agp_softc *sc = device_get_softc(dev); 285 286 bus_release_resource(dev, SYS_RES_MEMORY, sc->as_aperture_rid, 287 sc->as_aperture); 288 agp_flush_cache(); 289 } 290 291 int 292 agp_generic_detach(device_t dev) 293 { 294 agp_free_cdev(dev); 295 agp_free_res(dev); 296 return 0; 297 } 298 299 /** 300 * Default AGP aperture size detection which simply returns the size of 301 * the aperture's PCI resource. 302 */ 303 int 304 agp_generic_get_aperture(device_t dev) 305 { 306 struct agp_softc *sc = device_get_softc(dev); 307 308 return rman_get_size(sc->as_aperture); 309 } 310 311 /** 312 * Default AGP aperture size setting function, which simply doesn't allow 313 * changes to resource size. 314 */ 315 int 316 agp_generic_set_aperture(device_t dev, u_int32_t aperture) 317 { 318 u_int32_t current_aperture; 319 320 current_aperture = AGP_GET_APERTURE(dev); 321 if (current_aperture != aperture) 322 return EINVAL; 323 else 324 return 0; 325 } 326 327 /* 328 * This does the enable logic for v3, with the same topology 329 * restrictions as in place for v2 -- one bus, one device on the bus. 330 */ 331 static int 332 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) 333 { 334 u_int32_t tstatus, mstatus; 335 u_int32_t command; 336 int rq, sba, fw, rate, arqsz, cal; 337 338 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 339 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 340 341 /* Set RQ to the min of mode, tstatus and mstatus */ 342 rq = AGP_MODE_GET_RQ(mode); 343 if (AGP_MODE_GET_RQ(tstatus) < rq) 344 rq = AGP_MODE_GET_RQ(tstatus); 345 if (AGP_MODE_GET_RQ(mstatus) < rq) 346 rq = AGP_MODE_GET_RQ(mstatus); 347 348 /* 349 * ARQSZ - Set the value to the maximum one. 350 * Don't allow the mode register to override values. 351 */ 352 arqsz = AGP_MODE_GET_ARQSZ(mode); 353 if (AGP_MODE_GET_ARQSZ(tstatus) > rq) 354 rq = AGP_MODE_GET_ARQSZ(tstatus); 355 if (AGP_MODE_GET_ARQSZ(mstatus) > rq) 356 rq = AGP_MODE_GET_ARQSZ(mstatus); 357 358 /* Calibration cycle - don't allow override by mode register */ 359 cal = AGP_MODE_GET_CAL(tstatus); 360 if (AGP_MODE_GET_CAL(mstatus) < cal) 361 cal = AGP_MODE_GET_CAL(mstatus); 362 363 /* SBA must be supported for AGP v3. */ 364 sba = 1; 365 366 /* Set FW if all three support it. */ 367 fw = (AGP_MODE_GET_FW(tstatus) 368 & AGP_MODE_GET_FW(mstatus) 369 & AGP_MODE_GET_FW(mode)); 370 371 /* Figure out the max rate */ 372 rate = (AGP_MODE_GET_RATE(tstatus) 373 & AGP_MODE_GET_RATE(mstatus) 374 & AGP_MODE_GET_RATE(mode)); 375 if (rate & AGP_MODE_V3_RATE_8x) 376 rate = AGP_MODE_V3_RATE_8x; 377 else 378 rate = AGP_MODE_V3_RATE_4x; 379 if (bootverbose) 380 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); 381 382 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); 383 384 /* Construct the new mode word and tell the hardware */ 385 command = 0; 386 command = AGP_MODE_SET_RQ(0, rq); 387 command = AGP_MODE_SET_ARQSZ(command, arqsz); 388 command = AGP_MODE_SET_CAL(command, cal); 389 command = AGP_MODE_SET_SBA(command, sba); 390 command = AGP_MODE_SET_FW(command, fw); 391 command = AGP_MODE_SET_RATE(command, rate); 392 command = AGP_MODE_SET_MODE_3(command, 1); 393 command = AGP_MODE_SET_AGP(command, 1); 394 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 395 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 396 397 return 0; 398 } 399 400 static int 401 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) 402 { 403 u_int32_t tstatus, mstatus; 404 u_int32_t command; 405 int rq, sba, fw, rate; 406 407 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 408 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 409 410 /* Set RQ to the min of mode, tstatus and mstatus */ 411 rq = AGP_MODE_GET_RQ(mode); 412 if (AGP_MODE_GET_RQ(tstatus) < rq) 413 rq = AGP_MODE_GET_RQ(tstatus); 414 if (AGP_MODE_GET_RQ(mstatus) < rq) 415 rq = AGP_MODE_GET_RQ(mstatus); 416 417 /* Set SBA if all three can deal with SBA */ 418 sba = (AGP_MODE_GET_SBA(tstatus) 419 & AGP_MODE_GET_SBA(mstatus) 420 & AGP_MODE_GET_SBA(mode)); 421 422 /* Similar for FW */ 423 fw = (AGP_MODE_GET_FW(tstatus) 424 & AGP_MODE_GET_FW(mstatus) 425 & AGP_MODE_GET_FW(mode)); 426 427 /* Figure out the max rate */ 428 rate = (AGP_MODE_GET_RATE(tstatus) 429 & AGP_MODE_GET_RATE(mstatus) 430 & AGP_MODE_GET_RATE(mode)); 431 if (rate & AGP_MODE_V2_RATE_4x) 432 rate = AGP_MODE_V2_RATE_4x; 433 else if (rate & AGP_MODE_V2_RATE_2x) 434 rate = AGP_MODE_V2_RATE_2x; 435 else 436 rate = AGP_MODE_V2_RATE_1x; 437 if (bootverbose) 438 device_printf(dev, "Setting AGP v2 mode %d\n", rate); 439 440 /* Construct the new mode word and tell the hardware */ 441 command = 0; 442 command = AGP_MODE_SET_RQ(0, rq); 443 command = AGP_MODE_SET_SBA(command, sba); 444 command = AGP_MODE_SET_FW(command, fw); 445 command = AGP_MODE_SET_RATE(command, rate); 446 command = AGP_MODE_SET_AGP(command, 1); 447 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 448 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 449 450 return 0; 451 } 452 453 int 454 agp_generic_enable(device_t dev, u_int32_t mode) 455 { 456 device_t mdev = agp_find_display(); 457 u_int32_t tstatus, mstatus; 458 459 if (!mdev) { 460 AGP_DPF("can't find display\n"); 461 return ENXIO; 462 } 463 464 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 465 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 466 467 /* 468 * Check display and bridge for AGP v3 support. AGP v3 allows 469 * more variety in topology than v2, e.g. multiple AGP devices 470 * attached to one bridge, or multiple AGP bridges in one 471 * system. This doesn't attempt to address those situations, 472 * but should work fine for a classic single AGP slot system 473 * with AGP v3. 474 */ 475 if (AGP_MODE_GET_MODE_3(mode) && 476 AGP_MODE_GET_MODE_3(tstatus) && 477 AGP_MODE_GET_MODE_3(mstatus)) 478 return (agp_v3_enable(dev, mdev, mode)); 479 else 480 return (agp_v2_enable(dev, mdev, mode)); 481 } 482 483 struct agp_memory * 484 agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) 485 { 486 struct agp_softc *sc = device_get_softc(dev); 487 struct agp_memory *mem; 488 489 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 490 return 0; 491 492 if (sc->as_allocated + size > sc->as_maxmem) 493 return 0; 494 495 if (type != 0) { 496 kprintf("agp_generic_alloc_memory: unsupported type %d\n", 497 type); 498 return 0; 499 } 500 501 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT); 502 mem->am_id = sc->as_nextid++; 503 mem->am_size = size; 504 mem->am_type = 0; 505 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); 506 mem->am_physical = 0; 507 mem->am_offset = 0; 508 mem->am_is_bound = 0; 509 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 510 sc->as_allocated += size; 511 512 return mem; 513 } 514 515 int 516 agp_generic_free_memory(device_t dev, struct agp_memory *mem) 517 { 518 struct agp_softc *sc = device_get_softc(dev); 519 520 if (mem->am_is_bound) 521 return EBUSY; 522 523 sc->as_allocated -= mem->am_size; 524 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 525 vm_object_deallocate(mem->am_obj); 526 kfree(mem, M_AGP); 527 return 0; 528 } 529 530 int 531 agp_generic_bind_memory(device_t dev, struct agp_memory *mem, 532 vm_offset_t offset) 533 { 534 struct agp_softc *sc = device_get_softc(dev); 535 vm_offset_t i, j, k; 536 vm_page_t m; 537 int error; 538 539 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 540 541 if (mem->am_is_bound) { 542 device_printf(dev, "memory already bound\n"); 543 lockmgr(&sc->as_lock, LK_RELEASE); 544 return EINVAL; 545 } 546 547 if (offset < 0 548 || (offset & (AGP_PAGE_SIZE - 1)) != 0 549 || offset + mem->am_size > AGP_GET_APERTURE(dev)) { 550 device_printf(dev, "binding memory at bad offset %#x,%#x,%#x\n", 551 (int) offset, (int)mem->am_size, 552 (int)AGP_GET_APERTURE(dev)); 553 kprintf("Check BIOS's aperature size vs X\n"); 554 lockmgr(&sc->as_lock, LK_RELEASE); 555 return EINVAL; 556 } 557 558 /* 559 * Bind the individual pages and flush the chipset's 560 * TLB. 561 */ 562 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 563 /* 564 * Find a page from the object and wire it 565 * down. This page will be mapped using one or more 566 * entries in the GATT (assuming that PAGE_SIZE >= 567 * AGP_PAGE_SIZE. If this is the first call to bind, 568 * the pages will be allocated and zeroed. 569 */ 570 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), 571 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 572 if ((m->flags & PG_ZERO) == 0) 573 vm_page_zero_fill(m); 574 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); 575 vm_page_wire(m); 576 577 /* 578 * Install entries in the GATT, making sure that if 579 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 580 * aligned to PAGE_SIZE, we don't modify too many GATT 581 * entries. 582 */ 583 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; 584 j += AGP_PAGE_SIZE) { 585 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; 586 AGP_DPF("binding offset %#x to pa %#x\n", 587 offset + i + j, pa); 588 error = AGP_BIND_PAGE(dev, offset + i + j, pa); 589 if (error) { 590 /* 591 * Bail out. Reverse all the mappings 592 * and unwire the pages. 593 */ 594 vm_page_wakeup(m); 595 for (k = 0; k < i + j; k += AGP_PAGE_SIZE) 596 AGP_UNBIND_PAGE(dev, offset + k); 597 for (k = 0; k <= i; k += PAGE_SIZE) { 598 m = vm_page_lookup(mem->am_obj, 599 OFF_TO_IDX(k)); 600 vm_page_unwire(m, 0); 601 } 602 lockmgr(&sc->as_lock, LK_RELEASE); 603 return error; 604 } 605 } 606 vm_page_wakeup(m); 607 } 608 609 /* 610 * Flush the cpu cache since we are providing a new mapping 611 * for these pages. 612 */ 613 agp_flush_cache(); 614 615 /* 616 * Make sure the chipset gets the new mappings. 617 */ 618 AGP_FLUSH_TLB(dev); 619 620 mem->am_offset = offset; 621 mem->am_is_bound = 1; 622 623 lockmgr(&sc->as_lock, LK_RELEASE); 624 625 return 0; 626 } 627 628 int 629 agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) 630 { 631 struct agp_softc *sc = device_get_softc(dev); 632 vm_page_t m; 633 int i; 634 635 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 636 637 if (!mem->am_is_bound) { 638 device_printf(dev, "memory is not bound\n"); 639 lockmgr(&sc->as_lock, LK_RELEASE); 640 return EINVAL; 641 } 642 643 644 /* 645 * Unbind the individual pages and flush the chipset's 646 * TLB. Unwire the pages so they can be swapped. 647 */ 648 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 649 AGP_UNBIND_PAGE(dev, mem->am_offset + i); 650 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 651 m = vm_page_lookup(mem->am_obj, atop(i)); 652 vm_page_unwire(m, 0); 653 } 654 655 agp_flush_cache(); 656 AGP_FLUSH_TLB(dev); 657 658 mem->am_offset = 0; 659 mem->am_is_bound = 0; 660 661 lockmgr(&sc->as_lock, LK_RELEASE); 662 663 return 0; 664 } 665 666 /* Helper functions for implementing user/kernel api */ 667 668 static int 669 agp_acquire_helper(device_t dev, enum agp_acquire_state state) 670 { 671 struct agp_softc *sc = device_get_softc(dev); 672 673 if (sc->as_state != AGP_ACQUIRE_FREE) 674 return EBUSY; 675 sc->as_state = state; 676 677 return 0; 678 } 679 680 static int 681 agp_release_helper(device_t dev, enum agp_acquire_state state) 682 { 683 struct agp_softc *sc = device_get_softc(dev); 684 685 if (sc->as_state == AGP_ACQUIRE_FREE) 686 return 0; 687 688 if (sc->as_state != state) 689 return EBUSY; 690 691 sc->as_state = AGP_ACQUIRE_FREE; 692 return 0; 693 } 694 695 static struct agp_memory * 696 agp_find_memory(device_t dev, int id) 697 { 698 struct agp_softc *sc = device_get_softc(dev); 699 struct agp_memory *mem; 700 701 AGP_DPF("searching for memory block %d\n", id); 702 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 703 AGP_DPF("considering memory block %d\n", mem->am_id); 704 if (mem->am_id == id) 705 return mem; 706 } 707 return 0; 708 } 709 710 /* Implementation of the userland ioctl api */ 711 712 static int 713 agp_info_user(device_t dev, agp_info *info) 714 { 715 struct agp_softc *sc = device_get_softc(dev); 716 717 bzero(info, sizeof *info); 718 info->bridge_id = pci_get_devid(dev); 719 info->agp_mode = 720 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 721 info->aper_base = rman_get_start(sc->as_aperture); 722 info->aper_size = AGP_GET_APERTURE(dev) >> 20; 723 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 724 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 725 726 return 0; 727 } 728 729 static int 730 agp_setup_user(device_t dev, agp_setup *setup) 731 { 732 return AGP_ENABLE(dev, setup->agp_mode); 733 } 734 735 static int 736 agp_allocate_user(device_t dev, agp_allocate *alloc) 737 { 738 struct agp_memory *mem; 739 740 mem = AGP_ALLOC_MEMORY(dev, 741 alloc->type, 742 alloc->pg_count << AGP_PAGE_SHIFT); 743 if (mem) { 744 alloc->key = mem->am_id; 745 alloc->physical = mem->am_physical; 746 return 0; 747 } else { 748 return ENOMEM; 749 } 750 } 751 752 static int 753 agp_deallocate_user(device_t dev, int id) 754 { 755 struct agp_memory *mem = agp_find_memory(dev, id); 756 757 if (mem) { 758 AGP_FREE_MEMORY(dev, mem); 759 return 0; 760 } else { 761 return ENOENT; 762 } 763 } 764 765 static int 766 agp_bind_user(device_t dev, agp_bind *bind) 767 { 768 struct agp_memory *mem = agp_find_memory(dev, bind->key); 769 770 if (!mem) 771 return ENOENT; 772 773 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); 774 } 775 776 static int 777 agp_unbind_user(device_t dev, agp_unbind *unbind) 778 { 779 struct agp_memory *mem = agp_find_memory(dev, unbind->key); 780 781 if (!mem) 782 return ENOENT; 783 784 return AGP_UNBIND_MEMORY(dev, mem); 785 } 786 787 static int 788 agp_open(struct dev_open_args *ap) 789 { 790 cdev_t kdev = ap->a_head.a_dev; 791 device_t dev = KDEV2DEV(kdev); 792 struct agp_softc *sc = device_get_softc(dev); 793 794 if (!sc->as_isopen) { 795 sc->as_isopen = 1; 796 device_busy(dev); 797 } 798 799 return 0; 800 } 801 802 static int 803 agp_close(struct dev_close_args *ap) 804 { 805 cdev_t kdev = ap->a_head.a_dev; 806 device_t dev = KDEV2DEV(kdev); 807 struct agp_softc *sc = device_get_softc(dev); 808 struct agp_memory *mem; 809 810 /* 811 * Clear the GATT and force release on last close 812 */ 813 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { 814 if (mem->am_is_bound) 815 AGP_UNBIND_MEMORY(dev, mem); 816 AGP_FREE_MEMORY(dev, mem); 817 } 818 if (sc->as_state == AGP_ACQUIRE_USER) 819 agp_release_helper(dev, AGP_ACQUIRE_USER); 820 sc->as_isopen = 0; 821 device_unbusy(dev); 822 823 return 0; 824 } 825 826 static int 827 agp_ioctl(struct dev_ioctl_args *ap) 828 { 829 cdev_t kdev = ap->a_head.a_dev; 830 device_t dev = KDEV2DEV(kdev); 831 832 switch (ap->a_cmd) { 833 case AGPIOC_INFO: 834 return agp_info_user(dev, (agp_info *)ap->a_data); 835 836 case AGPIOC_ACQUIRE: 837 return agp_acquire_helper(dev, AGP_ACQUIRE_USER); 838 839 case AGPIOC_RELEASE: 840 return agp_release_helper(dev, AGP_ACQUIRE_USER); 841 842 case AGPIOC_SETUP: 843 return agp_setup_user(dev, (agp_setup *)ap->a_data); 844 845 case AGPIOC_ALLOCATE: 846 return agp_allocate_user(dev, (agp_allocate *)ap->a_data); 847 848 case AGPIOC_DEALLOCATE: 849 return agp_deallocate_user(dev, *(int *)ap->a_data); 850 851 case AGPIOC_BIND: 852 return agp_bind_user(dev, (agp_bind *)ap->a_data); 853 854 case AGPIOC_UNBIND: 855 return agp_unbind_user(dev, (agp_unbind *)ap->a_data); 856 857 } 858 859 return EINVAL; 860 } 861 862 static int 863 agp_mmap(struct dev_mmap_args *ap) 864 { 865 cdev_t kdev = ap->a_head.a_dev; 866 device_t dev = KDEV2DEV(kdev); 867 struct agp_softc *sc = device_get_softc(dev); 868 869 if (ap->a_offset > AGP_GET_APERTURE(dev)) 870 return EINVAL; 871 ap->a_result = atop(rman_get_start(sc->as_aperture) + ap->a_offset); 872 return 0; 873 } 874 875 /* Implementation of the kernel api */ 876 877 device_t 878 agp_find_device(void) 879 { 880 device_t *children, child; 881 int i, count; 882 883 if (!agp_devclass) 884 return NULL; 885 if (devclass_get_devices(agp_devclass, &children, &count) != 0) 886 return NULL; 887 child = NULL; 888 for (i = 0; i < count; i++) { 889 if (device_is_attached(children[i])) { 890 child = children[i]; 891 break; 892 } 893 } 894 kfree(children, M_TEMP); 895 return child; 896 } 897 898 enum agp_acquire_state 899 agp_state(device_t dev) 900 { 901 struct agp_softc *sc = device_get_softc(dev); 902 return sc->as_state; 903 } 904 905 void 906 agp_get_info(device_t dev, struct agp_info *info) 907 { 908 struct agp_softc *sc = device_get_softc(dev); 909 910 info->ai_mode = 911 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 912 info->ai_aperture_base = rman_get_start(sc->as_aperture); 913 info->ai_aperture_size = rman_get_size(sc->as_aperture); 914 info->ai_memory_allowed = sc->as_maxmem; 915 info->ai_memory_used = sc->as_allocated; 916 } 917 918 int 919 agp_acquire(device_t dev) 920 { 921 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 922 } 923 924 int 925 agp_release(device_t dev) 926 { 927 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 928 } 929 930 int 931 agp_enable(device_t dev, u_int32_t mode) 932 { 933 return AGP_ENABLE(dev, mode); 934 } 935 936 void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) 937 { 938 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); 939 } 940 941 void agp_free_memory(device_t dev, void *handle) 942 { 943 struct agp_memory *mem = (struct agp_memory *) handle; 944 AGP_FREE_MEMORY(dev, mem); 945 } 946 947 int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) 948 { 949 struct agp_memory *mem = (struct agp_memory *) handle; 950 return AGP_BIND_MEMORY(dev, mem, offset); 951 } 952 953 int agp_unbind_memory(device_t dev, void *handle) 954 { 955 struct agp_memory *mem = (struct agp_memory *) handle; 956 return AGP_UNBIND_MEMORY(dev, mem); 957 } 958 959 void agp_memory_info(device_t dev, void *handle, struct 960 agp_memory_info *mi) 961 { 962 struct agp_memory *mem = (struct agp_memory *) handle; 963 964 mi->ami_size = mem->am_size; 965 mi->ami_physical = mem->am_physical; 966 mi->ami_offset = mem->am_offset; 967 mi->ami_is_bound = mem->am_is_bound; 968 } 969