1 /*- 2 * Copyright (c) 2000 Doug Rabson 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/pci/agp.c,v 1.56 2007/07/13 16:28:11 anholt Exp $ 27 * $DragonFly: src/sys/dev/agp/agp.c,v 1.27 2007/09/12 08:31:43 hasso Exp $ 28 */ 29 30 #include "opt_bus.h" 31 #include "opt_pci.h" 32 33 #include <sys/param.h> 34 #include <sys/systm.h> 35 #include <sys/device.h> 36 #include <sys/conf.h> 37 #include <sys/malloc.h> 38 #include <sys/kernel.h> 39 #include <sys/bus.h> 40 #include <sys/ioccom.h> 41 #include <sys/agpio.h> 42 #include <sys/lock.h> 43 #include <sys/proc.h> 44 #include <sys/rman.h> 45 46 #include <bus/pci/pcivar.h> 47 #include <bus/pci/pcireg.h> 48 #include "agppriv.h" 49 #include "agpvar.h" 50 #include "agpreg.h" 51 52 #include <vm/vm.h> 53 #include <vm/vm_object.h> 54 #include <vm/vm_page.h> 55 #include <vm/vm_pageout.h> 56 #include <vm/pmap.h> 57 58 #include <machine/md_var.h> 59 60 MODULE_VERSION(agp, 1); 61 62 MALLOC_DEFINE(M_AGP, "agp", "AGP data structures"); 63 64 #define CDEV_MAJOR 148 65 /* agp_drv.c */ 66 static d_open_t agp_open; 67 static d_close_t agp_close; 68 static d_ioctl_t agp_ioctl; 69 static d_mmap_t agp_mmap; 70 71 static struct dev_ops agp_ops = { 72 { "agp", CDEV_MAJOR, D_TTY }, 73 .d_open = agp_open, 74 .d_close = agp_close, 75 .d_ioctl = agp_ioctl, 76 .d_mmap = agp_mmap, 77 }; 78 79 static devclass_t agp_devclass; 80 #define KDEV2DEV(kdev) devclass_get_device(agp_devclass, minor(kdev)) 81 82 /* Helper functions for implementing chipset mini drivers. */ 83 84 void 85 agp_flush_cache(void) 86 { 87 #if defined(__i386__) || defined(__amd64__) 88 wbinvd(); 89 #endif 90 } 91 92 u_int8_t 93 agp_find_caps(device_t dev) 94 { 95 u_int32_t status; 96 u_int8_t ptr, next; 97 98 /* 99 * Check the CAP_LIST bit of the PCI status register first. 100 */ 101 status = pci_read_config(dev, PCIR_STATUS, 2); 102 if (!(status & 0x10)) 103 return 0; 104 105 /* 106 * Traverse the capabilities list. 107 */ 108 for (ptr = pci_read_config(dev, AGP_CAPPTR, 1); 109 ptr != 0; 110 ptr = next) { 111 u_int32_t capid = pci_read_config(dev, ptr, 4); 112 next = AGP_CAPID_GET_NEXT_PTR(capid); 113 114 /* 115 * If this capability entry ID is 2, then we are done. 116 */ 117 if (AGP_CAPID_GET_CAP_ID(capid) == 2) 118 return ptr; 119 } 120 121 return 0; 122 } 123 124 /* 125 * Find an AGP display device (if any). 126 */ 127 static device_t 128 agp_find_display(void) 129 { 130 devclass_t pci = devclass_find("pci"); 131 device_t bus, dev = 0; 132 device_t *kids; 133 int busnum, numkids, i; 134 135 for (busnum = 0; busnum < devclass_get_maxunit(pci); busnum++) { 136 bus = devclass_get_device(pci, busnum); 137 if (!bus) 138 continue; 139 device_get_children(bus, &kids, &numkids); 140 for (i = 0; i < numkids; i++) { 141 dev = kids[i]; 142 if (pci_get_class(dev) == PCIC_DISPLAY 143 && pci_get_subclass(dev) == PCIS_DISPLAY_VGA) 144 if (agp_find_caps(dev)) { 145 kfree(kids, M_TEMP); 146 return dev; 147 } 148 149 } 150 kfree(kids, M_TEMP); 151 } 152 153 return 0; 154 } 155 156 struct agp_gatt * 157 agp_alloc_gatt(device_t dev) 158 { 159 u_int32_t apsize = AGP_GET_APERTURE(dev); 160 u_int32_t entries = apsize >> AGP_PAGE_SHIFT; 161 struct agp_gatt *gatt; 162 163 if (bootverbose) 164 device_printf(dev, 165 "allocating GATT for aperture of size %dM\n", 166 apsize / (1024*1024)); 167 168 if (entries == 0) { 169 device_printf(dev, "bad aperture size\n"); 170 return NULL; 171 } 172 173 gatt = kmalloc(sizeof(struct agp_gatt), M_AGP, M_INTWAIT); 174 gatt->ag_entries = entries; 175 gatt->ag_virtual = contigmalloc(entries * sizeof(u_int32_t), M_AGP, 176 M_WAITOK, 0, ~0, PAGE_SIZE, 0); 177 if (!gatt->ag_virtual) { 178 if (bootverbose) 179 device_printf(dev, "contiguous allocation failed\n"); 180 kfree(gatt, M_AGP); 181 return 0; 182 } 183 bzero(gatt->ag_virtual, entries * sizeof(u_int32_t)); 184 gatt->ag_physical = vtophys((vm_offset_t) gatt->ag_virtual); 185 agp_flush_cache(); 186 187 return gatt; 188 } 189 190 void 191 agp_free_gatt(struct agp_gatt *gatt) 192 { 193 contigfree(gatt->ag_virtual, 194 gatt->ag_entries * sizeof(u_int32_t), M_AGP); 195 kfree(gatt, M_AGP); 196 } 197 198 static u_int agp_max[][2] = { 199 {0, 0}, 200 {32, 4}, 201 {64, 28}, 202 {128, 96}, 203 {256, 204}, 204 {512, 440}, 205 {1024, 942}, 206 {2048, 1920}, 207 {4096, 3932} 208 }; 209 #define agp_max_size (sizeof(agp_max) / sizeof(agp_max[0])) 210 211 /** 212 * Sets the PCI resource which represents the AGP aperture. 213 * 214 * If not called, the default AGP aperture resource of AGP_APBASE will 215 * be used. Must be called before agp_generic_attach(). 216 */ 217 void 218 agp_set_aperture_resource(device_t dev, int rid) 219 { 220 struct agp_softc *sc = device_get_softc(dev); 221 222 sc->as_aperture_rid = rid; 223 } 224 225 int 226 agp_generic_attach(device_t dev) 227 { 228 struct agp_softc *sc = device_get_softc(dev); 229 int i; 230 u_int memsize; 231 232 /* 233 * Find and map the aperture, RF_SHAREABLE for DRM but not RF_ACTIVE 234 * because the kernel doesn't need to map it. 235 */ 236 if (sc->as_aperture_rid == 0) 237 sc->as_aperture_rid = AGP_APBASE; 238 239 sc->as_aperture = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 240 &sc->as_aperture_rid, RF_SHAREABLE); 241 if (!sc->as_aperture) 242 return ENOMEM; 243 244 /* 245 * Work out an upper bound for agp memory allocation. This 246 * uses a heurisitc table from the Linux driver. 247 */ 248 memsize = ptoa(Maxmem) >> 20; 249 for (i = 0; i < agp_max_size; i++) { 250 if (memsize <= agp_max[i][0]) 251 break; 252 } 253 if (i == agp_max_size) i = agp_max_size - 1; 254 sc->as_maxmem = agp_max[i][1] << 20U; 255 256 /* 257 * The lock is used to prevent re-entry to 258 * agp_generic_bind_memory() since that function can sleep. 259 */ 260 lockinit(&sc->as_lock, "agplk", 0, 0); 261 262 /* 263 * Initialise stuff for the userland device. 264 */ 265 agp_devclass = devclass_find("agp"); 266 TAILQ_INIT(&sc->as_memory); 267 sc->as_nextid = 1; 268 269 dev_ops_add(&agp_ops, -1, device_get_unit(dev)); 270 make_dev(&agp_ops, device_get_unit(dev), UID_ROOT, GID_WHEEL, 271 0600, "agpgart"); 272 273 return 0; 274 } 275 276 int 277 agp_generic_detach(device_t dev) 278 { 279 struct agp_softc *sc = device_get_softc(dev); 280 281 bus_release_resource(dev, SYS_RES_MEMORY, AGP_APBASE, sc->as_aperture); 282 agp_flush_cache(); 283 dev_ops_remove(&agp_ops, -1, device_get_unit(dev)); 284 return 0; 285 } 286 287 /** 288 * Default AGP aperture size detection which simply returns the size of 289 * the aperture's PCI resource. 290 */ 291 int 292 agp_generic_get_aperture(device_t dev) 293 { 294 struct agp_softc *sc = device_get_softc(dev); 295 296 return rman_get_size(sc->as_aperture); 297 } 298 299 /** 300 * Default AGP aperture size setting function, which simply doesn't allow 301 * changes to resource size. 302 */ 303 int 304 agp_generic_set_aperture(device_t dev, u_int32_t aperture) 305 { 306 u_int32_t current_aperture; 307 308 current_aperture = AGP_GET_APERTURE(dev); 309 if (current_aperture != aperture) 310 return EINVAL; 311 else 312 return 0; 313 } 314 315 /* 316 * This does the enable logic for v3, with the same topology 317 * restrictions as in place for v2 -- one bus, one device on the bus. 318 */ 319 static int 320 agp_v3_enable(device_t dev, device_t mdev, u_int32_t mode) 321 { 322 u_int32_t tstatus, mstatus; 323 u_int32_t command; 324 int rq, sba, fw, rate, arqsz, cal; 325 326 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 327 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 328 329 /* Set RQ to the min of mode, tstatus and mstatus */ 330 rq = AGP_MODE_GET_RQ(mode); 331 if (AGP_MODE_GET_RQ(tstatus) < rq) 332 rq = AGP_MODE_GET_RQ(tstatus); 333 if (AGP_MODE_GET_RQ(mstatus) < rq) 334 rq = AGP_MODE_GET_RQ(mstatus); 335 336 /* 337 * ARQSZ - Set the value to the maximum one. 338 * Don't allow the mode register to override values. 339 */ 340 arqsz = AGP_MODE_GET_ARQSZ(mode); 341 if (AGP_MODE_GET_ARQSZ(tstatus) > rq) 342 rq = AGP_MODE_GET_ARQSZ(tstatus); 343 if (AGP_MODE_GET_ARQSZ(mstatus) > rq) 344 rq = AGP_MODE_GET_ARQSZ(mstatus); 345 346 /* Calibration cycle - don't allow override by mode register */ 347 cal = AGP_MODE_GET_CAL(tstatus); 348 if (AGP_MODE_GET_CAL(mstatus) < cal) 349 cal = AGP_MODE_GET_CAL(mstatus); 350 351 /* SBA must be supported for AGP v3. */ 352 sba = 1; 353 354 /* Set FW if all three support it. */ 355 fw = (AGP_MODE_GET_FW(tstatus) 356 & AGP_MODE_GET_FW(mstatus) 357 & AGP_MODE_GET_FW(mode)); 358 359 /* Figure out the max rate */ 360 rate = (AGP_MODE_GET_RATE(tstatus) 361 & AGP_MODE_GET_RATE(mstatus) 362 & AGP_MODE_GET_RATE(mode)); 363 if (rate & AGP_MODE_V3_RATE_8x) 364 rate = AGP_MODE_V3_RATE_8x; 365 else 366 rate = AGP_MODE_V3_RATE_4x; 367 if (bootverbose) 368 device_printf(dev, "Setting AGP v3 mode %d\n", rate * 4); 369 370 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, 0, 4); 371 372 /* Construct the new mode word and tell the hardware */ 373 command = 0; 374 command = AGP_MODE_SET_RQ(0, rq); 375 command = AGP_MODE_SET_ARQSZ(command, arqsz); 376 command = AGP_MODE_SET_CAL(command, cal); 377 command = AGP_MODE_SET_SBA(command, sba); 378 command = AGP_MODE_SET_FW(command, fw); 379 command = AGP_MODE_SET_RATE(command, rate); 380 command = AGP_MODE_SET_MODE_3(command, 1); 381 command = AGP_MODE_SET_AGP(command, 1); 382 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 383 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 384 385 return 0; 386 } 387 388 static int 389 agp_v2_enable(device_t dev, device_t mdev, u_int32_t mode) 390 { 391 u_int32_t tstatus, mstatus; 392 u_int32_t command; 393 int rq, sba, fw, rate; 394 395 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 396 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 397 398 /* Set RQ to the min of mode, tstatus and mstatus */ 399 rq = AGP_MODE_GET_RQ(mode); 400 if (AGP_MODE_GET_RQ(tstatus) < rq) 401 rq = AGP_MODE_GET_RQ(tstatus); 402 if (AGP_MODE_GET_RQ(mstatus) < rq) 403 rq = AGP_MODE_GET_RQ(mstatus); 404 405 /* Set SBA if all three can deal with SBA */ 406 sba = (AGP_MODE_GET_SBA(tstatus) 407 & AGP_MODE_GET_SBA(mstatus) 408 & AGP_MODE_GET_SBA(mode)); 409 410 /* Similar for FW */ 411 fw = (AGP_MODE_GET_FW(tstatus) 412 & AGP_MODE_GET_FW(mstatus) 413 & AGP_MODE_GET_FW(mode)); 414 415 /* Figure out the max rate */ 416 rate = (AGP_MODE_GET_RATE(tstatus) 417 & AGP_MODE_GET_RATE(mstatus) 418 & AGP_MODE_GET_RATE(mode)); 419 if (rate & AGP_MODE_V2_RATE_4x) 420 rate = AGP_MODE_V2_RATE_4x; 421 else if (rate & AGP_MODE_V2_RATE_2x) 422 rate = AGP_MODE_V2_RATE_2x; 423 else 424 rate = AGP_MODE_V2_RATE_1x; 425 if (bootverbose) 426 device_printf(dev, "Setting AGP v2 mode %d\n", rate); 427 428 /* Construct the new mode word and tell the hardware */ 429 command = 0; 430 command = AGP_MODE_SET_RQ(0, rq); 431 command = AGP_MODE_SET_SBA(command, sba); 432 command = AGP_MODE_SET_FW(command, fw); 433 command = AGP_MODE_SET_RATE(command, rate); 434 command = AGP_MODE_SET_AGP(command, 1); 435 pci_write_config(dev, agp_find_caps(dev) + AGP_COMMAND, command, 4); 436 pci_write_config(mdev, agp_find_caps(mdev) + AGP_COMMAND, command, 4); 437 438 return 0; 439 } 440 441 int 442 agp_generic_enable(device_t dev, u_int32_t mode) 443 { 444 device_t mdev = agp_find_display(); 445 u_int32_t tstatus, mstatus; 446 447 if (!mdev) { 448 AGP_DPF("can't find display\n"); 449 return ENXIO; 450 } 451 452 tstatus = pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 453 mstatus = pci_read_config(mdev, agp_find_caps(mdev) + AGP_STATUS, 4); 454 455 /* 456 * Check display and bridge for AGP v3 support. AGP v3 allows 457 * more variety in topology than v2, e.g. multiple AGP devices 458 * attached to one bridge, or multiple AGP bridges in one 459 * system. This doesn't attempt to address those situations, 460 * but should work fine for a classic single AGP slot system 461 * with AGP v3. 462 */ 463 if (AGP_MODE_GET_MODE_3(mode) && 464 AGP_MODE_GET_MODE_3(tstatus) && 465 AGP_MODE_GET_MODE_3(mstatus)) 466 return (agp_v3_enable(dev, mdev, mode)); 467 else 468 return (agp_v2_enable(dev, mdev, mode)); 469 } 470 471 struct agp_memory * 472 agp_generic_alloc_memory(device_t dev, int type, vm_size_t size) 473 { 474 struct agp_softc *sc = device_get_softc(dev); 475 struct agp_memory *mem; 476 477 if ((size & (AGP_PAGE_SIZE - 1)) != 0) 478 return 0; 479 480 if (sc->as_allocated + size > sc->as_maxmem) 481 return 0; 482 483 if (type != 0) { 484 kprintf("agp_generic_alloc_memory: unsupported type %d\n", 485 type); 486 return 0; 487 } 488 489 mem = kmalloc(sizeof *mem, M_AGP, M_INTWAIT); 490 mem->am_id = sc->as_nextid++; 491 mem->am_size = size; 492 mem->am_type = 0; 493 mem->am_obj = vm_object_allocate(OBJT_DEFAULT, atop(round_page(size))); 494 mem->am_physical = 0; 495 mem->am_offset = 0; 496 mem->am_is_bound = 0; 497 TAILQ_INSERT_TAIL(&sc->as_memory, mem, am_link); 498 sc->as_allocated += size; 499 500 return mem; 501 } 502 503 int 504 agp_generic_free_memory(device_t dev, struct agp_memory *mem) 505 { 506 struct agp_softc *sc = device_get_softc(dev); 507 508 if (mem->am_is_bound) 509 return EBUSY; 510 511 sc->as_allocated -= mem->am_size; 512 TAILQ_REMOVE(&sc->as_memory, mem, am_link); 513 vm_object_deallocate(mem->am_obj); 514 kfree(mem, M_AGP); 515 return 0; 516 } 517 518 int 519 agp_generic_bind_memory(device_t dev, struct agp_memory *mem, 520 vm_offset_t offset) 521 { 522 struct agp_softc *sc = device_get_softc(dev); 523 vm_offset_t i, j, k; 524 vm_page_t m; 525 int error; 526 527 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 528 529 if (mem->am_is_bound) { 530 device_printf(dev, "memory already bound\n"); 531 lockmgr(&sc->as_lock, LK_RELEASE); 532 return EINVAL; 533 } 534 535 if (offset < 0 536 || (offset & (AGP_PAGE_SIZE - 1)) != 0 537 || offset + mem->am_size > AGP_GET_APERTURE(dev)) { 538 device_printf(dev, "binding memory at bad offset %#x,%#x,%#x\n", 539 (int) offset, (int)mem->am_size, 540 (int)AGP_GET_APERTURE(dev)); 541 kprintf("Check BIOS's aperature size vs X\n"); 542 lockmgr(&sc->as_lock, LK_RELEASE); 543 return EINVAL; 544 } 545 546 /* 547 * Bind the individual pages and flush the chipset's 548 * TLB. 549 */ 550 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 551 /* 552 * Find a page from the object and wire it 553 * down. This page will be mapped using one or more 554 * entries in the GATT (assuming that PAGE_SIZE >= 555 * AGP_PAGE_SIZE. If this is the first call to bind, 556 * the pages will be allocated and zeroed. 557 */ 558 m = vm_page_grab(mem->am_obj, OFF_TO_IDX(i), 559 VM_ALLOC_NORMAL | VM_ALLOC_ZERO | VM_ALLOC_RETRY); 560 if ((m->flags & PG_ZERO) == 0) 561 vm_page_zero_fill(m); 562 AGP_DPF("found page pa=%#x\n", VM_PAGE_TO_PHYS(m)); 563 vm_page_wire(m); 564 565 /* 566 * Install entries in the GATT, making sure that if 567 * AGP_PAGE_SIZE < PAGE_SIZE and mem->am_size is not 568 * aligned to PAGE_SIZE, we don't modify too many GATT 569 * entries. 570 */ 571 for (j = 0; j < PAGE_SIZE && i + j < mem->am_size; 572 j += AGP_PAGE_SIZE) { 573 vm_offset_t pa = VM_PAGE_TO_PHYS(m) + j; 574 AGP_DPF("binding offset %#x to pa %#x\n", 575 offset + i + j, pa); 576 error = AGP_BIND_PAGE(dev, offset + i + j, pa); 577 if (error) { 578 /* 579 * Bail out. Reverse all the mappings 580 * and unwire the pages. 581 */ 582 vm_page_wakeup(m); 583 for (k = 0; k < i + j; k += AGP_PAGE_SIZE) 584 AGP_UNBIND_PAGE(dev, offset + k); 585 for (k = 0; k <= i; k += PAGE_SIZE) { 586 m = vm_page_lookup(mem->am_obj, 587 OFF_TO_IDX(k)); 588 vm_page_unwire(m, 0); 589 } 590 lockmgr(&sc->as_lock, LK_RELEASE); 591 return error; 592 } 593 } 594 vm_page_wakeup(m); 595 } 596 597 /* 598 * Flush the cpu cache since we are providing a new mapping 599 * for these pages. 600 */ 601 agp_flush_cache(); 602 603 /* 604 * Make sure the chipset gets the new mappings. 605 */ 606 AGP_FLUSH_TLB(dev); 607 608 mem->am_offset = offset; 609 mem->am_is_bound = 1; 610 611 lockmgr(&sc->as_lock, LK_RELEASE); 612 613 return 0; 614 } 615 616 int 617 agp_generic_unbind_memory(device_t dev, struct agp_memory *mem) 618 { 619 struct agp_softc *sc = device_get_softc(dev); 620 vm_page_t m; 621 int i; 622 623 lockmgr(&sc->as_lock, LK_EXCLUSIVE); 624 625 if (!mem->am_is_bound) { 626 device_printf(dev, "memory is not bound\n"); 627 lockmgr(&sc->as_lock, LK_RELEASE); 628 return EINVAL; 629 } 630 631 632 /* 633 * Unbind the individual pages and flush the chipset's 634 * TLB. Unwire the pages so they can be swapped. 635 */ 636 for (i = 0; i < mem->am_size; i += AGP_PAGE_SIZE) 637 AGP_UNBIND_PAGE(dev, mem->am_offset + i); 638 for (i = 0; i < mem->am_size; i += PAGE_SIZE) { 639 m = vm_page_lookup(mem->am_obj, atop(i)); 640 vm_page_unwire(m, 0); 641 } 642 643 agp_flush_cache(); 644 AGP_FLUSH_TLB(dev); 645 646 mem->am_offset = 0; 647 mem->am_is_bound = 0; 648 649 lockmgr(&sc->as_lock, LK_RELEASE); 650 651 return 0; 652 } 653 654 /* Helper functions for implementing user/kernel api */ 655 656 static int 657 agp_acquire_helper(device_t dev, enum agp_acquire_state state) 658 { 659 struct agp_softc *sc = device_get_softc(dev); 660 661 if (sc->as_state != AGP_ACQUIRE_FREE) 662 return EBUSY; 663 sc->as_state = state; 664 665 return 0; 666 } 667 668 static int 669 agp_release_helper(device_t dev, enum agp_acquire_state state) 670 { 671 struct agp_softc *sc = device_get_softc(dev); 672 673 if (sc->as_state == AGP_ACQUIRE_FREE) 674 return 0; 675 676 if (sc->as_state != state) 677 return EBUSY; 678 679 sc->as_state = AGP_ACQUIRE_FREE; 680 return 0; 681 } 682 683 static struct agp_memory * 684 agp_find_memory(device_t dev, int id) 685 { 686 struct agp_softc *sc = device_get_softc(dev); 687 struct agp_memory *mem; 688 689 AGP_DPF("searching for memory block %d\n", id); 690 TAILQ_FOREACH(mem, &sc->as_memory, am_link) { 691 AGP_DPF("considering memory block %d\n", mem->am_id); 692 if (mem->am_id == id) 693 return mem; 694 } 695 return 0; 696 } 697 698 /* Implementation of the userland ioctl api */ 699 700 static int 701 agp_info_user(device_t dev, agp_info *info) 702 { 703 struct agp_softc *sc = device_get_softc(dev); 704 705 bzero(info, sizeof *info); 706 info->bridge_id = pci_get_devid(dev); 707 info->agp_mode = 708 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 709 info->aper_base = rman_get_start(sc->as_aperture); 710 info->aper_size = AGP_GET_APERTURE(dev) >> 20; 711 info->pg_total = info->pg_system = sc->as_maxmem >> AGP_PAGE_SHIFT; 712 info->pg_used = sc->as_allocated >> AGP_PAGE_SHIFT; 713 714 return 0; 715 } 716 717 static int 718 agp_setup_user(device_t dev, agp_setup *setup) 719 { 720 return AGP_ENABLE(dev, setup->agp_mode); 721 } 722 723 static int 724 agp_allocate_user(device_t dev, agp_allocate *alloc) 725 { 726 struct agp_memory *mem; 727 728 mem = AGP_ALLOC_MEMORY(dev, 729 alloc->type, 730 alloc->pg_count << AGP_PAGE_SHIFT); 731 if (mem) { 732 alloc->key = mem->am_id; 733 alloc->physical = mem->am_physical; 734 return 0; 735 } else { 736 return ENOMEM; 737 } 738 } 739 740 static int 741 agp_deallocate_user(device_t dev, int id) 742 { 743 struct agp_memory *mem = agp_find_memory(dev, id); 744 745 if (mem) { 746 AGP_FREE_MEMORY(dev, mem); 747 return 0; 748 } else { 749 return ENOENT; 750 } 751 } 752 753 static int 754 agp_bind_user(device_t dev, agp_bind *bind) 755 { 756 struct agp_memory *mem = agp_find_memory(dev, bind->key); 757 758 if (!mem) 759 return ENOENT; 760 761 return AGP_BIND_MEMORY(dev, mem, bind->pg_start << AGP_PAGE_SHIFT); 762 } 763 764 static int 765 agp_unbind_user(device_t dev, agp_unbind *unbind) 766 { 767 struct agp_memory *mem = agp_find_memory(dev, unbind->key); 768 769 if (!mem) 770 return ENOENT; 771 772 return AGP_UNBIND_MEMORY(dev, mem); 773 } 774 775 static int 776 agp_open(struct dev_open_args *ap) 777 { 778 cdev_t kdev = ap->a_head.a_dev; 779 device_t dev = KDEV2DEV(kdev); 780 struct agp_softc *sc = device_get_softc(dev); 781 782 if (!sc->as_isopen) { 783 sc->as_isopen = 1; 784 device_busy(dev); 785 } 786 787 return 0; 788 } 789 790 static int 791 agp_close(struct dev_close_args *ap) 792 { 793 cdev_t kdev = ap->a_head.a_dev; 794 device_t dev = KDEV2DEV(kdev); 795 struct agp_softc *sc = device_get_softc(dev); 796 struct agp_memory *mem; 797 798 /* 799 * Clear the GATT and force release on last close 800 */ 801 while ((mem = TAILQ_FIRST(&sc->as_memory)) != 0) { 802 if (mem->am_is_bound) 803 AGP_UNBIND_MEMORY(dev, mem); 804 AGP_FREE_MEMORY(dev, mem); 805 } 806 if (sc->as_state == AGP_ACQUIRE_USER) 807 agp_release_helper(dev, AGP_ACQUIRE_USER); 808 sc->as_isopen = 0; 809 device_unbusy(dev); 810 811 return 0; 812 } 813 814 static int 815 agp_ioctl(struct dev_ioctl_args *ap) 816 { 817 cdev_t kdev = ap->a_head.a_dev; 818 device_t dev = KDEV2DEV(kdev); 819 820 switch (ap->a_cmd) { 821 case AGPIOC_INFO: 822 return agp_info_user(dev, (agp_info *)ap->a_data); 823 824 case AGPIOC_ACQUIRE: 825 return agp_acquire_helper(dev, AGP_ACQUIRE_USER); 826 827 case AGPIOC_RELEASE: 828 return agp_release_helper(dev, AGP_ACQUIRE_USER); 829 830 case AGPIOC_SETUP: 831 return agp_setup_user(dev, (agp_setup *)ap->a_data); 832 833 case AGPIOC_ALLOCATE: 834 return agp_allocate_user(dev, (agp_allocate *)ap->a_data); 835 836 case AGPIOC_DEALLOCATE: 837 return agp_deallocate_user(dev, *(int *)ap->a_data); 838 839 case AGPIOC_BIND: 840 return agp_bind_user(dev, (agp_bind *)ap->a_data); 841 842 case AGPIOC_UNBIND: 843 return agp_unbind_user(dev, (agp_unbind *)ap->a_data); 844 845 } 846 847 return EINVAL; 848 } 849 850 static int 851 agp_mmap(struct dev_mmap_args *ap) 852 { 853 cdev_t kdev = ap->a_head.a_dev; 854 device_t dev = KDEV2DEV(kdev); 855 struct agp_softc *sc = device_get_softc(dev); 856 857 if (ap->a_offset > AGP_GET_APERTURE(dev)) 858 return EINVAL; 859 ap->a_result = atop(rman_get_start(sc->as_aperture) + ap->a_offset); 860 return 0; 861 } 862 863 /* Implementation of the kernel api */ 864 865 device_t 866 agp_find_device(void) 867 { 868 device_t *children, child; 869 int i, count; 870 871 if (!agp_devclass) 872 return NULL; 873 if (devclass_get_devices(agp_devclass, &children, &count) != 0) 874 return NULL; 875 child = NULL; 876 for (i = 0; i < count; i++) { 877 if (device_is_attached(children[i])) { 878 child = children[i]; 879 break; 880 } 881 } 882 kfree(children, M_TEMP); 883 return child; 884 } 885 886 enum agp_acquire_state 887 agp_state(device_t dev) 888 { 889 struct agp_softc *sc = device_get_softc(dev); 890 return sc->as_state; 891 } 892 893 void 894 agp_get_info(device_t dev, struct agp_info *info) 895 { 896 struct agp_softc *sc = device_get_softc(dev); 897 898 info->ai_mode = 899 pci_read_config(dev, agp_find_caps(dev) + AGP_STATUS, 4); 900 info->ai_aperture_base = rman_get_start(sc->as_aperture); 901 info->ai_aperture_size = rman_get_size(sc->as_aperture); 902 info->ai_memory_allowed = sc->as_maxmem; 903 info->ai_memory_used = sc->as_allocated; 904 } 905 906 int 907 agp_acquire(device_t dev) 908 { 909 return agp_acquire_helper(dev, AGP_ACQUIRE_KERNEL); 910 } 911 912 int 913 agp_release(device_t dev) 914 { 915 return agp_release_helper(dev, AGP_ACQUIRE_KERNEL); 916 } 917 918 int 919 agp_enable(device_t dev, u_int32_t mode) 920 { 921 return AGP_ENABLE(dev, mode); 922 } 923 924 void *agp_alloc_memory(device_t dev, int type, vm_size_t bytes) 925 { 926 return (void *) AGP_ALLOC_MEMORY(dev, type, bytes); 927 } 928 929 void agp_free_memory(device_t dev, void *handle) 930 { 931 struct agp_memory *mem = (struct agp_memory *) handle; 932 AGP_FREE_MEMORY(dev, mem); 933 } 934 935 int agp_bind_memory(device_t dev, void *handle, vm_offset_t offset) 936 { 937 struct agp_memory *mem = (struct agp_memory *) handle; 938 return AGP_BIND_MEMORY(dev, mem, offset); 939 } 940 941 int agp_unbind_memory(device_t dev, void *handle) 942 { 943 struct agp_memory *mem = (struct agp_memory *) handle; 944 return AGP_UNBIND_MEMORY(dev, mem); 945 } 946 947 void agp_memory_info(device_t dev, void *handle, struct 948 agp_memory_info *mi) 949 { 950 struct agp_memory *mem = (struct agp_memory *) handle; 951 952 mi->ami_size = mem->am_size; 953 mi->ami_physical = mem->am_physical; 954 mi->ami_offset = mem->am_offset; 955 mi->ami_is_bound = mem->am_is_bound; 956 } 957