xref: /dragonfly/sys/dev/agp/agp_via.c (revision fb151170)
1 /*-
2  * Copyright (c) 2000 Doug Rabson
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  *
26  *	$FreeBSD: src/sys/dev/agp/agp_via.c,v 1.26 2007/11/12 21:51:37 jhb Exp $
27  */
28 
29 #include "opt_bus.h"
30 
31 #include <sys/param.h>
32 #include <sys/systm.h>
33 #include <sys/malloc.h>
34 #include <sys/kernel.h>
35 #include <sys/bus.h>
36 #include <sys/lock.h>
37 
38 #include <bus/pci/pcivar.h>
39 #include <bus/pci/pcireg.h>
40 #include "agppriv.h"
41 #include "agpreg.h"
42 
43 #include <vm/vm.h>
44 #include <vm/vm_object.h>
45 #include <vm/pmap.h>
46 
47 #define	REG_GARTCTRL	0
48 #define	REG_APSIZE	1
49 #define	REG_ATTBASE	2
50 
51 struct agp_via_softc {
52 	struct agp_softc agp;
53 	u_int32_t	initial_aperture; /* aperture size at startup */
54 	struct agp_gatt *gatt;
55 	int		*regs;
56 };
57 
58 static int via_v2_regs[] = { AGP_VIA_GARTCTRL, AGP_VIA_APSIZE,
59     AGP_VIA_ATTBASE };
60 static int via_v3_regs[] = { AGP3_VIA_GARTCTRL, AGP3_VIA_APSIZE,
61     AGP3_VIA_ATTBASE };
62 
63 static const char*
64 agp_via_match(device_t dev)
65 {
66 	if (pci_get_class(dev) != PCIC_BRIDGE
67 	    || pci_get_subclass(dev) != PCIS_BRIDGE_HOST)
68 		return NULL;
69 
70 	if (agp_find_caps(dev) == 0)
71 		return NULL;
72 
73 	switch (pci_get_devid(dev)) {
74 	case 0x01981106:
75 		return ("VIA 8763 (P4X600) host to PCI bridge");
76 	case 0x02591106:
77 		return ("VIA PM800/PN800/PM880/PN880 host to PCI bridge");
78 	case 0x02691106:
79 		return ("VIA KT880 host to PCI bridge");
80 	case 0x02961106:
81 		return ("VIA 3296 (P4M800) host to PCI bridge");
82 	case 0x03051106:
83 		return ("VIA 82C8363 (Apollo KT133x/KM133) host to PCI bridge");
84 	case 0x03911106:
85 		return ("VIA 8371 (Apollo KX133) host to PCI bridge");
86 	case 0x05011106:
87 		return ("VIA 8501 (Apollo MVP4) host to PCI bridge");
88 	case 0x05971106:
89 		return ("VIA 82C597 (Apollo VP3) host to PCI bridge");
90 	case 0x05981106:
91 		return ("VIA 82C598 (Apollo MVP3) host to PCI bridge");
92 	case 0x06011106:
93 		return ("VIA 8601 (Apollo ProMedia/PLE133Ta) host to PCI bridge");
94 	case 0x06051106:
95 		return ("VIA 82C694X (Apollo Pro 133A) host to PCI bridge");
96 	case 0x06911106:
97 		return ("VIA 82C691 (Apollo Pro) host to PCI bridge");
98 	case 0x30911106:
99 		return ("VIA 8633 (Pro 266) host to PCI bridge");
100 	case 0x30991106:
101 		return ("VIA 8367 (KT266/KY266x/KT333) host to PCI bridge");
102 	case 0x31011106:
103 		return ("VIA 8653 (Pro266T) host to PCI bridge");
104 	case 0x31121106:
105 		return ("VIA 8361 (KLE133) host to PCI bridge");
106 	case 0x31161106:
107 		return ("VIA XM266 (PM266/KM266) host to PCI bridge");
108 	case 0x31231106:
109 		return ("VIA 862x (CLE266) host to PCI bridge");
110 	case 0x31281106:
111 		return ("VIA 8753 (P4X266) host to PCI bridge");
112 	case 0x31481106:
113 		return ("VIA 8703 (P4M266x/P4N266) host to PCI bridge");
114 	case 0x31561106:
115 		return ("VIA XN266 (Apollo Pro266) host to PCI bridge");
116 	case 0x31681106:
117 		return ("VIA 8754 (PT800) host to PCI bridge");
118 	case 0x31891106:
119 		return ("VIA 8377 (Apollo KT400/KT400A/KT600) host to PCI bridge");
120 	case 0x32051106:
121 		return ("VIA 8235/8237 (Apollo KM400/KM400A) host to PCI bridge");
122 	case 0x32081106:
123 		return ("VIA 8783 (PT890) host to PCI bridge");
124 	case 0x32581106:
125 		return ("VIA PT880 host to PCI bridge");
126 	case 0xb1981106:
127 		return ("VIA VT83xx/VT87xx/KTxxx/Px8xx host to PCI bridge");
128 	};
129 
130 	return NULL;
131 }
132 
133 static int
134 agp_via_probe(device_t dev)
135 {
136 	const char *desc;
137 
138 	if (resource_disabled("agp", device_get_unit(dev)))
139 		return (ENXIO);
140 	desc = agp_via_match(dev);
141 	if (desc) {
142 		device_verbose(dev);
143 		device_set_desc(dev, desc);
144 		return BUS_PROBE_DEFAULT;
145 	}
146 
147 	return ENXIO;
148 }
149 
150 static int
151 agp_via_attach(device_t dev)
152 {
153 	struct agp_via_softc *sc = device_get_softc(dev);
154 	struct agp_gatt *gatt;
155 	int error;
156 	u_int32_t agpsel;
157 
158 	/* XXX: This should be keying off of whether the bridge is AGP3 capable,
159 	 * rather than a bunch of device ids for chipsets that happen to do 8x.
160 	 */
161 	switch (pci_get_devid(dev)) {
162 	case 0x01981106:
163 	case 0x02591106:
164 	case 0x02691106:
165 	case 0x02961106:
166 	case 0x31231106:
167 	case 0x31681106:
168 	case 0x31891106:
169 	case 0x32051106:
170 	case 0x32581106:
171 	case 0xb1981106:
172 		/* The newer VIA chipsets will select the AGP version based on
173 		 * what AGP versions the card supports.  We still have to
174 		 * program it using the v2 registers if it has chosen to use
175 		 * compatibility mode.
176 		 */
177 		agpsel = pci_read_config(dev, AGP_VIA_AGPSEL, 1);
178 		if ((agpsel & (1 << 1)) == 0)
179 			sc->regs = via_v3_regs;
180 		else
181 			sc->regs = via_v2_regs;
182 		break;
183 	default:
184 		sc->regs = via_v2_regs;
185 		break;
186 	}
187 
188 	error = agp_generic_attach(dev);
189 	if (error)
190 		return error;
191 
192 	sc->initial_aperture = AGP_GET_APERTURE(dev);
193 	if (sc->initial_aperture == 0) {
194 		device_printf(dev, "bad initial aperture size, disabling\n");
195 		return ENXIO;
196 	}
197 
198 	for (;;) {
199 		gatt = agp_alloc_gatt(dev);
200 		if (gatt)
201 			break;
202 
203 		/*
204 		 * Probably contigmalloc failure. Try reducing the
205 		 * aperture so that the gatt size reduces.
206 		 */
207 		if (AGP_SET_APERTURE(dev, AGP_GET_APERTURE(dev) / 2)) {
208 			agp_generic_detach(dev);
209 			return ENOMEM;
210 		}
211 	}
212 	sc->gatt = gatt;
213 
214 	if (sc->regs == via_v2_regs) {
215 		/* Install the gatt. */
216 		pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical | 3, 4);
217 
218 		/* Enable the aperture. */
219 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
220 	} else {
221 		u_int32_t gartctrl;
222 
223 		/* Install the gatt. */
224 		pci_write_config(dev, sc->regs[REG_ATTBASE], gatt->ag_physical, 4);
225 
226 		/* Enable the aperture. */
227 		gartctrl = pci_read_config(dev, sc->regs[REG_ATTBASE], 4);
228 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl | (3 << 7), 4);
229 	}
230 
231 	return 0;
232 }
233 
234 static int
235 agp_via_detach(device_t dev)
236 {
237 	struct agp_via_softc *sc = device_get_softc(dev);
238 
239 	agp_free_cdev(dev);
240 
241 	pci_write_config(dev, sc->regs[REG_GARTCTRL], 0, 4);
242 	pci_write_config(dev, sc->regs[REG_ATTBASE], 0, 4);
243 	AGP_SET_APERTURE(dev, sc->initial_aperture);
244 	agp_free_gatt(sc->gatt);
245 	agp_free_res(dev);
246 
247 	return 0;
248 }
249 
250 static u_int32_t
251 agp_via_get_aperture(device_t dev)
252 {
253 	struct agp_via_softc *sc = device_get_softc(dev);
254 	u_int32_t apsize;
255 
256 	apsize = pci_read_config(dev, sc->regs[REG_APSIZE], 1) & 0x1f;
257 
258 	/*
259 	 * The size is determined by the number of low bits of
260 	 * register APBASE which are forced to zero. The low 20 bits
261 	 * are always forced to zero and each zero bit in the apsize
262 	 * field just read forces the corresponding bit in the 27:20
263 	 * to be zero. We calculate the aperture size accordingly.
264 	 */
265 	return (((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1;
266 }
267 
268 static int
269 agp_via_set_aperture(device_t dev, u_int32_t aperture)
270 {
271 	struct agp_via_softc *sc = device_get_softc(dev);
272 	u_int32_t apsize;
273 
274 	/*
275 	 * Reverse the magic from get_aperture.
276 	 */
277 	apsize = ((aperture - 1) >> 20) ^ 0xff;
278 
279 	/*
280 	 * Double check for sanity.
281 	 */
282 	if ((((apsize ^ 0xff) << 20) | ((1 << 20) - 1)) + 1 != aperture)
283 		return EINVAL;
284 
285 	pci_write_config(dev, sc->regs[REG_APSIZE], apsize, 1);
286 
287 	return 0;
288 }
289 
290 static int
291 agp_via_bind_page(device_t dev, int offset, vm_offset_t physical)
292 {
293 	struct agp_via_softc *sc = device_get_softc(dev);
294 
295 	if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
296 		return EINVAL;
297 
298 	sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical;
299 	return 0;
300 }
301 
302 static int
303 agp_via_unbind_page(device_t dev, int offset)
304 {
305 	struct agp_via_softc *sc = device_get_softc(dev);
306 
307 	if (offset < 0 || offset >= (sc->gatt->ag_entries << AGP_PAGE_SHIFT))
308 		return EINVAL;
309 
310 	sc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
311 	return 0;
312 }
313 
314 static void
315 agp_via_flush_tlb(device_t dev)
316 {
317 	struct agp_via_softc *sc = device_get_softc(dev);
318 	u_int32_t gartctrl;
319 
320 	if (sc->regs == via_v2_regs) {
321 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x8f, 4);
322 		pci_write_config(dev, sc->regs[REG_GARTCTRL], 0x0f, 4);
323 	} else {
324 		gartctrl = pci_read_config(dev, sc->regs[REG_GARTCTRL], 4);
325 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl &
326 		    ~(1 << 7), 4);
327 		pci_write_config(dev, sc->regs[REG_GARTCTRL], gartctrl, 4);
328 	}
329 
330 }
331 
332 static device_method_t agp_via_methods[] = {
333 	/* Device interface */
334 	DEVMETHOD(device_probe,		agp_via_probe),
335 	DEVMETHOD(device_attach,	agp_via_attach),
336 	DEVMETHOD(device_detach,	agp_via_detach),
337 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
338 	DEVMETHOD(device_suspend,	bus_generic_suspend),
339 	DEVMETHOD(device_resume,	bus_generic_resume),
340 
341 	/* AGP interface */
342 	DEVMETHOD(agp_get_aperture,	agp_via_get_aperture),
343 	DEVMETHOD(agp_set_aperture,	agp_via_set_aperture),
344 	DEVMETHOD(agp_bind_page,	agp_via_bind_page),
345 	DEVMETHOD(agp_unbind_page,	agp_via_unbind_page),
346 	DEVMETHOD(agp_flush_tlb,	agp_via_flush_tlb),
347 	DEVMETHOD(agp_enable,		agp_generic_enable),
348 	DEVMETHOD(agp_alloc_memory,	agp_generic_alloc_memory),
349 	DEVMETHOD(agp_free_memory,	agp_generic_free_memory),
350 	DEVMETHOD(agp_bind_memory,	agp_generic_bind_memory),
351 	DEVMETHOD(agp_unbind_memory,	agp_generic_unbind_memory),
352 
353 	{ 0, 0 }
354 };
355 
356 static driver_t agp_via_driver = {
357 	"agp",
358 	agp_via_methods,
359 	sizeof(struct agp_via_softc),
360 };
361 
362 static devclass_t agp_devclass;
363 
364 DRIVER_MODULE(agp_via, pci, agp_via_driver, agp_devclass, NULL, NULL);
365 MODULE_DEPEND(agp_via, agp, 1, 1, 1);
366 MODULE_DEPEND(agp_via, pci, 1, 1, 1);
367