1 /* 2 * Copyright (c) 2009 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #include "ahci.h" 36 37 static void ahci_pm_dummy_done(struct ata_xfer *xa); 38 39 int 40 ahci_pm_port_init(struct ahci_port *ap, struct ata_port *at) 41 { 42 at->at_probe = ATA_PROBE_NEED_HARD_RESET; 43 return (0); 44 } 45 46 /* 47 * AHCI port multiplier probe. This routine is run by the hardreset code 48 * if it gets past the device detect, whether or not BSY is found to be 49 * stuck. 50 * 51 * We MUST use CLO to properly probe whether the port multiplier exists 52 * or not. 53 * 54 * Return 0 on success, non-zero on failure. 55 */ 56 int 57 ahci_pm_port_probe(struct ahci_port *ap, int orig_error) 58 { 59 struct ahci_cmd_hdr *cmd_slot; 60 struct ata_port *at; 61 struct ahci_ccb *ccb = NULL; 62 u_int8_t *fis = NULL; 63 int error; 64 u_int32_t cmd; 65 int count; 66 int i; 67 68 count = 2; 69 retry: 70 /* 71 * This code is only called from hardreset, which does not 72 * high level command processing. The port should be stopped. 73 * 74 * Set PMA mode while the port is stopped. 75 * 76 * NOTE: On retry the port might be running, stopped, or failed. 77 */ 78 ahci_port_stop(ap, 0); 79 ap->ap_state = AP_S_NORMAL; 80 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC; 81 if ((cmd & AHCI_PREG_CMD_PMA) == 0) { 82 cmd |= AHCI_PREG_CMD_PMA; 83 ahci_pwrite(ap, AHCI_PREG_CMD, cmd); 84 } 85 86 /* 87 * Flush any errors and request CLO unconditionally, then start 88 * the port. 89 */ 90 ahci_flush_tfd(ap); 91 ahci_port_clo(ap); 92 if (ahci_port_start(ap)) { 93 kprintf("%s: PMPROBE failed to start port, cannot softreset\n", 94 PORTNAME(ap)); 95 error = EIO; 96 goto err; 97 } 98 99 /* 100 * Check whether CLO worked 101 */ 102 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 103 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 104 kprintf("%s: PMPROBE CLO %s, need port reset\n", 105 PORTNAME(ap), 106 (ahci_read(ap->ap_sc, AHCI_REG_CAP) & AHCI_REG_CAP_SCLO) 107 ? "failed" : "unsupported"); 108 error = EBUSY; 109 goto err; 110 } 111 112 /* 113 * Use the error CCB for all commands 114 * 115 * NOTE! This CCB is used for both the first and second commands. 116 * The second command must use CCB slot 1 to properly load 117 * the signature. 118 */ 119 ccb = ahci_get_err_ccb(ap); 120 ccb->ccb_xa.flags = ATA_F_POLL; 121 ccb->ccb_xa.complete = ahci_pm_dummy_done; 122 ccb->ccb_xa.at = &ap->ap_ata[15]; 123 cmd_slot = ccb->ccb_cmd_hdr; 124 KKASSERT(ccb->ccb_slot == 1); 125 126 /* 127 * Prep the first H2D command with SRST feature & clear busy/reset 128 * flags. 129 */ 130 fis = ccb->ccb_cmd_table->cfis; 131 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 132 fis[0] = ATA_FIS_TYPE_H2D; 133 fis[1] = 0x0F; /* Target 15 */ 134 fis[15] = ATA_FIS_CONTROL_SRST | ATA_FIS_CONTROL_4BIT; 135 136 cmd_slot->prdtl = 0; 137 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 138 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */ 139 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */ 140 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */ 141 142 ccb->ccb_xa.state = ATA_S_PENDING; 143 144 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) { 145 kprintf("%s: PMPROBE First FIS failed\n", PORTNAME(ap)); 146 if (--count) { 147 ahci_put_err_ccb(ccb); 148 goto retry; 149 } 150 error = EBUSY; 151 goto err; 152 } 153 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 154 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 155 kprintf("%s: PMPROBE Busy after first FIS\n", PORTNAME(ap)); 156 } 157 158 /* 159 * The device may have muffed up the PHY when it reset. 160 */ 161 ahci_os_sleep(100); 162 ahci_flush_tfd(ap); 163 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 164 /* ahci_pm_phy_status(ap, 15, &cmd); */ 165 166 /* 167 * Prep second D2H command to read status and complete reset sequence 168 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA 169 * Rev 2.6 and it is unclear how the second FIS should be set up 170 * from the AHCI document. 171 * 172 * Give the device 3ms before sending the second FIS. 173 * 174 * It is unclear which other fields in the FIS are used. Just zero 175 * everything. 176 */ 177 ccb->ccb_xa.flags = ATA_F_POLL; 178 179 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 180 fis[0] = ATA_FIS_TYPE_H2D; 181 fis[1] = 0x0F; 182 fis[15] = ATA_FIS_CONTROL_4BIT; 183 184 cmd_slot->prdtl = 0; 185 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 186 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */ 187 188 ccb->ccb_xa.state = ATA_S_PENDING; 189 190 if (ahci_poll(ccb, 5000, ahci_quick_timeout) != ATA_S_COMPLETE) { 191 kprintf("%s: PMPROBE Second FIS failed\n", PORTNAME(ap)); 192 if (--count) { 193 ahci_put_err_ccb(ccb); 194 goto retry; 195 } 196 error = EBUSY; 197 goto err; 198 } 199 200 /* 201 * What? We succeeded? Yup, but for some reason the signature 202 * is still latched from the original detect (that saw target 0 203 * behind the PM), and I don't know how to clear the condition 204 * other then by retrying the whole reset sequence. 205 */ 206 if (--count) { 207 fis[15] = 0; 208 ahci_put_err_ccb(ccb); 209 goto retry; 210 } 211 212 /* 213 * Get the signature. The caller sets the ap fields. 214 */ 215 if (ahci_port_signature_detect(ap, NULL) == ATA_PORT_T_PM) { 216 ap->ap_ata[15].at_probe = ATA_PROBE_GOOD; 217 error = 0; 218 } else { 219 error = EBUSY; 220 } 221 222 /* 223 * Fall through / clean up the CCB and perform error processing. 224 */ 225 err: 226 if (ccb != NULL) 227 ahci_put_err_ccb(ccb); 228 229 if (error == 0 && ahci_pm_identify(ap)) { 230 kprintf("%s: PM - cannot identify port multiplier\n", 231 PORTNAME(ap)); 232 error = EBUSY; 233 } 234 235 /* 236 * If we probed the PM reset the state for the targets behind 237 * it so they get probed by the state machine. 238 */ 239 if (error == 0) { 240 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) { 241 at = &ap->ap_ata[i]; 242 at->at_probe = ATA_PROBE_NEED_INIT; 243 at->at_features |= ATA_PORT_F_RESCAN; 244 } 245 ap->ap_type = ATA_PORT_T_PM; 246 return (0); 247 } 248 249 /* 250 * If we failed turn off PMA, otherwise identify the port multiplier. 251 * CAM will iterate the devices. 252 */ 253 ahci_port_stop(ap, 0); 254 ahci_port_clo(ap); 255 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC; 256 cmd &= ~AHCI_PREG_CMD_PMA; 257 ahci_pwrite(ap, AHCI_PREG_CMD, cmd); 258 ahci_port_init(ap); 259 if (orig_error == 0) { 260 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 261 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 262 kprintf("%s: PM probe: port will not come ready\n", 263 PORTNAME(ap)); 264 orig_error = EBUSY; 265 } 266 } 267 return(orig_error); 268 } 269 270 /* 271 * Identify the port multiplier 272 */ 273 int 274 ahci_pm_identify(struct ahci_port *ap) 275 { 276 u_int32_t chipid; 277 u_int32_t rev; 278 u_int32_t nports; 279 u_int32_t data1; 280 u_int32_t data2; 281 int has_dummy_port; 282 283 ap->ap_probe = ATA_PROBE_FAILED; 284 if (ahci_pm_read(ap, 15, 0, &chipid)) 285 goto err; 286 if (ahci_pm_read(ap, 15, 1, &rev)) 287 goto err; 288 if (ahci_pm_read(ap, 15, 2, &nports)) 289 goto err; 290 nports &= 0x0000000F; /* only the low 4 bits */ 291 ap->ap_probe = ATA_PROBE_GOOD; 292 293 /* 294 * Ignore fake port on PMs which have it. We can probe it but the 295 * softreset will probably fail. 296 */ 297 switch(chipid) { 298 case 0x37261095: 299 has_dummy_port = 1; 300 break; 301 default: 302 has_dummy_port = 0; 303 break; 304 } 305 if (has_dummy_port) { 306 if (nports > 1) 307 --nports; 308 } 309 310 kprintf("%s: Port multiplier: chip=%08x rev=0x%b nports=%d\n", 311 PORTNAME(ap), 312 chipid, 313 rev, SATA_PFMT_PM_REV, 314 nports); 315 if (has_dummy_port) { 316 kprintf("%s: Port multiplier: Ignoring dummy port #%d\n", 317 PORTNAME(ap), nports); 318 } 319 ap->ap_pmcount = nports; 320 321 if (ahci_pm_read(ap, 15, SATA_PMREG_FEA, &data1)) { 322 kprintf("%s: Port multiplier: Warning, " 323 "cannot read feature register\n", PORTNAME(ap)); 324 } else { 325 kprintf("%s: Port multiplier features: 0x%b\n", 326 PORTNAME(ap), 327 data1, 328 SATA_PFMT_PM_FEA); 329 } 330 if (ahci_pm_read(ap, 15, SATA_PMREG_FEAEN, &data2) == 0) { 331 kprintf("%s: Port multiplier defaults: 0x%b\n", 332 PORTNAME(ap), 333 data2, 334 SATA_PFMT_PM_FEA); 335 } 336 337 /* 338 * Turn on async notification if we support and the PM supports it. 339 * This allows the PM to forward async notification events to us and 340 * it will also generate an event for target 15 for hot-plug events 341 * (or is supposed to anyway). 342 */ 343 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF) && 344 (data1 & SATA_PMFEA_ASYNCNOTIFY)) { 345 u_int32_t serr_bits = AHCI_PREG_SERR_DIAG_N | 346 AHCI_PREG_SERR_DIAG_X; 347 data2 |= SATA_PMFEA_ASYNCNOTIFY; 348 if (ahci_pm_write(ap, 15, SATA_PMREG_FEAEN, data2)) { 349 kprintf("%s: Port multiplier: AsyncNotify cannot be " 350 "enabled\n", PORTNAME(ap)); 351 } else if (ahci_pm_write(ap, 15, SATA_PMREG_EEENA, serr_bits)) { 352 kprintf("%s: Port mulltiplier: AsyncNotify unable " 353 "to enable error info bits\n", PORTNAME(ap)); 354 } else { 355 kprintf("%s: Port multiplier: AsyncNotify enabled\n", 356 PORTNAME(ap)); 357 } 358 } 359 360 return (0); 361 err: 362 kprintf("%s: Port multiplier cannot be identified\n", PORTNAME(ap)); 363 return (EIO); 364 } 365 366 /* 367 * Do a COMRESET sequence on the target behind a port multiplier. 368 * 369 * If hard is 2 we also cycle the phy on the target. 370 * 371 * This must be done prior to any softreset or probe attempts on 372 * targets behind the port multiplier. 373 * 374 * Returns 0 on success or an error. 375 */ 376 int 377 ahci_pm_hardreset(struct ahci_port *ap, int target, int hard) 378 { 379 struct ata_port *at; 380 u_int32_t data; 381 int loop; 382 int error = EIO; 383 384 at = &ap->ap_ata[target]; 385 386 /* 387 * Turn off power management and kill the phy on the target 388 * if requested. Hold state for 10ms. 389 */ 390 data = AHCI_PREG_SCTL_IPM_DISABLED; 391 if (hard == 2) 392 data |= AHCI_PREG_SCTL_DET_DISABLE; 393 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) 394 goto err; 395 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 396 goto err; 397 ahci_os_sleep(10); 398 399 /* 400 * Start transmitting COMRESET. COMRESET must be sent for at 401 * least 1ms. 402 */ 403 at->at_probe = ATA_PROBE_FAILED; 404 at->at_type = ATA_PORT_T_NONE; 405 data = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_INIT; 406 if (AhciForceGen1 & (1 << ap->ap_num)) { 407 kprintf("%s.%d: Force 1.5GBits\n", PORTNAME(ap), target); 408 data |= AHCI_PREG_SCTL_SPD_GEN1; 409 } else { 410 data |= AHCI_PREG_SCTL_SPD_ANY; 411 } 412 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 413 goto err; 414 415 /* 416 * It takes about 100ms for the DET logic to settle down, 417 * from trial and error testing. If this is too short 418 * the softreset code will fail. 419 */ 420 ahci_os_sleep(100); 421 422 if (ahci_pm_phy_status(ap, target, &data)) { 423 kprintf("%s: (A)Cannot clear phy status\n", 424 ATANAME(ap ,at)); 425 } 426 427 /* 428 * Flush any status, then clear DET to initiate negotiation. 429 */ 430 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 431 data = AHCI_PREG_SCTL_IPM_DISABLED | AHCI_PREG_SCTL_DET_NONE; 432 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 433 goto err; 434 435 /* 436 * Try to determine if there is a device on the port. 437 * 438 * Give the device 3/10 second to at least be detected. 439 * If we fail clear any pending status since we may have 440 * cycled the phy and probably caused another PRCS interrupt. 441 */ 442 for (loop = 3; loop; --loop) { 443 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) 444 goto err; 445 if (data & AHCI_PREG_SSTS_DET) 446 break; 447 ahci_os_sleep(100); 448 } 449 if (loop == 0) { 450 kprintf("%s.%d: Port appears to be unplugged\n", 451 PORTNAME(ap), target); 452 error = ENODEV; 453 goto err; 454 } 455 456 /* 457 * There is something on the port. Give the device 3 seconds 458 * to fully negotiate. 459 */ 460 for (loop = 30; loop; --loop) { 461 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) 462 goto err; 463 if ((data & AHCI_PREG_SSTS_DET) == AHCI_PREG_SSTS_DET_DEV) 464 break; 465 ahci_os_sleep(100); 466 } 467 468 /* 469 * Device not detected 470 */ 471 if (loop == 0) { 472 kprintf("%s: Device may be powered down\n", 473 PORTNAME(ap)); 474 error = ENODEV; 475 goto err; 476 } 477 478 /* 479 * Device detected 480 */ 481 kprintf("%s.%d: Device detected data=%08x\n", 482 PORTNAME(ap), target, data); 483 /* 484 * Clear SERR on the target so we get a new NOTIFY event if a hot-plug 485 * or hot-unplug occurs. 486 */ 487 ahci_os_sleep(100); 488 489 error = 0; 490 err: 491 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_SOFT_RESET; 492 return (error); 493 } 494 495 /* 496 * AHCI soft reset through port multiplier. 497 * 498 * This function keeps port communications intact and attempts to generate 499 * a reset to the connected device using device commands. Unlike 500 * hard-port operations we can't do fancy stop/starts or stuff like 501 * that without messing up other commands that might be running or 502 * queued. 503 */ 504 int 505 ahci_pm_softreset(struct ahci_port *ap, int target) 506 { 507 struct ata_port *at; 508 struct ahci_ccb *ccb; 509 struct ahci_cmd_hdr *cmd_slot; 510 u_int8_t *fis; 511 int count; 512 int error; 513 u_int32_t data; 514 int tried_longer; 515 516 error = EIO; 517 at = &ap->ap_ata[target]; 518 519 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap)); 520 521 count = 2; 522 tried_longer = 0; 523 retry: 524 /* 525 * Try to clear the phy so we get a good signature, otherwise 526 * the PM may not latch a new signature. 527 * 528 * NOTE: This cannot be safely done between the first and second 529 * softreset FISs. It's now or never. 530 */ 531 #if 1 532 if (ahci_pm_phy_status(ap, target, &data)) { 533 kprintf("%s: (B)Cannot clear phy status\n", 534 ATANAME(ap ,at)); 535 } 536 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 537 #endif 538 539 /* 540 * Prep first D2H command with SRST feature & clear busy/reset flags 541 * 542 * It is unclear which other fields in the FIS are used. Just zero 543 * everything. 544 * 545 * When soft-resetting a port behind a multiplier at will be 546 * non-NULL, assigning it to the ccb prevents the port interrupt 547 * from hard-resetting the port if a problem crops up. 548 */ 549 ccb = ahci_get_err_ccb(ap); 550 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE; 551 ccb->ccb_xa.complete = ahci_pm_dummy_done; 552 ccb->ccb_xa.at = at; 553 554 fis = ccb->ccb_cmd_table->cfis; 555 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 556 fis[0] = ATA_FIS_TYPE_H2D; 557 fis[1] = at->at_target; 558 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT; 559 560 cmd_slot = ccb->ccb_cmd_hdr; 561 cmd_slot->prdtl = 0; 562 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 563 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */ 564 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */ 565 cmd_slot->flags |= htole16(at->at_target << 566 AHCI_CMD_LIST_FLAG_PMP_SHIFT); 567 568 ccb->ccb_xa.state = ATA_S_PENDING; 569 570 /* 571 * XXX hack to ignore IFS errors which can occur during the target 572 * device's reset. 573 * 574 * If an IFS error occurs the target is probably powering up, 575 * so we try for a longer period of time. 576 */ 577 ap->ap_flags |= AP_F_IGNORE_IFS; 578 ap->ap_flags &= ~(AP_F_IFS_IGNORED | AP_F_IFS_OCCURED); 579 580 if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) { 581 kprintf("%s: (PM) First FIS failed\n", ATANAME(ap, at)); 582 if (ap->ap_flags & AP_F_IFS_OCCURED) { 583 if (tried_longer == 0) 584 count += 4; 585 ++tried_longer; 586 } 587 ahci_put_err_ccb(ccb); 588 if (--count) 589 goto retry; 590 goto err; 591 } 592 593 /* 594 * WARNING! SENSITIVE TIME PERIOD! WARNING! 595 * 596 * The first and second FISes are supposed to be back-to-back, 597 * I think the idea is to get the second sent and then after 598 * the device resets it will send a signature. Do not delay 599 * here and most definitely do not issue any commands to other 600 * targets! 601 */ 602 603 /* 604 * Prep second D2H command to read status and complete reset sequence 605 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA 606 * Rev 2.6 and it is unclear how the second FIS should be set up 607 * from the AHCI document. 608 * 609 * Give the device 3ms before sending the second FIS. 610 * 611 * It is unclear which other fields in the FIS are used. Just zero 612 * everything. 613 */ 614 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 615 fis[0] = ATA_FIS_TYPE_H2D; 616 fis[1] = at->at_target; 617 fis[15] = ATA_FIS_CONTROL_4BIT; 618 619 cmd_slot->prdtl = 0; 620 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 621 cmd_slot->flags |= htole16(at->at_target << 622 AHCI_CMD_LIST_FLAG_PMP_SHIFT); 623 624 ccb->ccb_xa.state = ATA_S_PENDING; 625 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE; 626 627 if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) { 628 kprintf("%s: (PM) Second FIS failed\n", ATANAME(ap, at)); 629 ahci_put_err_ccb(ccb); 630 #if 1 631 if (--count) 632 goto retry; 633 #endif 634 goto err; 635 } 636 637 ahci_put_err_ccb(ccb); 638 ahci_os_sleep(100); 639 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 640 if (ahci_pm_phy_status(ap, target, &data)) { 641 kprintf("%s: (C)Cannot clear phy status\n", 642 ATANAME(ap ,at)); 643 } 644 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 645 646 /* 647 * Do it again, even if we think we got a good result 648 */ 649 if (--count) { 650 fis[15] = 0; 651 goto retry; 652 } 653 654 /* 655 * If the softreset is trying to clear a BSY condition after a 656 * normal portreset we assign the port type. 657 * 658 * If the softreset is being run first as part of the ccb error 659 * processing code then report if the device signature changed 660 * unexpectedly. 661 */ 662 if (at->at_type == ATA_PORT_T_NONE) { 663 at->at_type = ahci_port_signature_detect(ap, at); 664 } else { 665 if (ahci_port_signature_detect(ap, at) != at->at_type) { 666 kprintf("%s: device signature unexpectedly " 667 "changed\n", ATANAME(ap, at)); 668 error = EBUSY; /* XXX */ 669 } 670 } 671 error = 0; 672 673 /* 674 * Who knows what kind of mess occured. We have exclusive access 675 * to the port so try to clean up potential problems. 676 */ 677 ahci_os_sleep(100); 678 err: 679 /* 680 * Clear error status so we can detect removal. 681 */ 682 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) { 683 kprintf("%s: ahci_pm_softreset unable to clear SERR\n", 684 ATANAME(ap, at)); 685 ap->ap_flags &= ~AP_F_IGNORE_IFS; 686 } 687 /* ahci_pwrite(ap, AHCI_PREG_SERR, -1);*/ 688 689 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_IDENT; 690 return (error); 691 } 692 693 694 /* 695 * Return the phy status for a target behind a port multiplier and 696 * reset SATA_PMREG_SERR. 697 * 698 * Returned bits follow AHCI_PREG_SSTS bits. The AHCI_PREG_SSTS_SPD 699 * bits can be used to determine the link speed and will be 0 if there 700 * is no link. 701 * 702 * 0 is returned if any communications error occurs. 703 */ 704 int 705 ahci_pm_phy_status(struct ahci_port *ap, int target, u_int32_t *datap) 706 { 707 int error; 708 709 error = ahci_pm_read(ap, target, SATA_PMREG_SSTS, datap); 710 if (error == 0) 711 error = ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 712 if (error) 713 *datap = 0; 714 return(error); 715 } 716 717 int 718 ahci_pm_set_feature(struct ahci_port *ap, int feature, int enable) 719 { 720 struct ata_xfer *xa; 721 int error; 722 723 xa = ahci_ata_get_xfer(ap, &ap->ap_ata[15]); 724 725 xa->fis->type = ATA_FIS_TYPE_H2D; 726 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15; 727 xa->fis->command = enable ? ATA_C_SATA_FEATURE_ENA : 728 ATA_C_SATA_FEATURE_DIS; 729 xa->fis->sector_count = feature; 730 xa->fis->control = ATA_FIS_CONTROL_4BIT; 731 732 xa->complete = ahci_pm_dummy_done; 733 xa->datalen = 0; 734 xa->flags = ATA_F_POLL; 735 xa->timeout = 1000; 736 737 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) 738 error = 0; 739 else 740 error = EIO; 741 ahci_ata_put_xfer(xa); 742 return(error); 743 } 744 745 /* 746 * Check that a target is still good. 747 */ 748 void 749 ahci_pm_check_good(struct ahci_port *ap, int target) 750 { 751 struct ata_port *at; 752 u_int32_t data; 753 754 /* 755 * It looks like we might have to read the EINFO register 756 * to allow the PM to generate a new event. 757 */ 758 if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) { 759 kprintf("%s: Port multiplier EINFO could not be read\n", 760 PORTNAME(ap)); 761 } 762 763 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) { 764 kprintf("%s: Port multiplier: SERR could not be cleared\n", 765 PORTNAME(ap)); 766 } 767 768 if (target == CAM_TARGET_WILDCARD || target >= ap->ap_pmcount) 769 return; 770 at = &ap->ap_ata[target]; 771 772 /* 773 * If the device needs an init or hard reset also make sure the 774 * PHY is turned on. 775 */ 776 if (at->at_probe <= ATA_PROBE_NEED_HARD_RESET) { 777 /*kprintf("%s DOHARD\n", ATANAME(ap, at));*/ 778 ahci_pm_hardreset(ap, target, 1); 779 } 780 781 /* 782 * Read the detect status 783 */ 784 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) { 785 kprintf("%s: Unable to access PM SSTS register target %d\n", 786 PORTNAME(ap), target); 787 return; 788 } 789 if ((data & AHCI_PREG_SSTS_DET) != AHCI_PREG_SSTS_DET_DEV) { 790 /*kprintf("%s: DETECT %08x\n", ATANAME(ap, at), data);*/ 791 if (at->at_probe != ATA_PROBE_FAILED) { 792 at->at_probe = ATA_PROBE_FAILED; 793 at->at_type = ATA_PORT_T_NONE; 794 at->at_features |= ATA_PORT_F_RESCAN; 795 kprintf("%s: HOTPLUG (PM) - Device removed\n", 796 ATANAME(ap, at)); 797 } 798 } else { 799 if (at->at_probe == ATA_PROBE_FAILED) { 800 at->at_probe = ATA_PROBE_NEED_HARD_RESET; 801 at->at_features |= ATA_PORT_F_RESCAN; 802 kprintf("%s: HOTPLUG (PM) - Device inserted\n", 803 ATANAME(ap, at)); 804 } 805 } 806 } 807 808 /* 809 * Read a PM register 810 */ 811 int 812 ahci_pm_read(struct ahci_port *ap, int target, int which, u_int32_t *datap) 813 { 814 struct ata_xfer *xa; 815 int error; 816 817 xa = ahci_ata_get_xfer(ap, &ap->ap_ata[15]); 818 819 xa->fis->type = ATA_FIS_TYPE_H2D; 820 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15; 821 xa->fis->command = ATA_C_READ_PM; 822 xa->fis->features = which; 823 xa->fis->device = target | ATA_H2D_DEVICE_LBA; 824 xa->fis->control = ATA_FIS_CONTROL_4BIT; 825 826 xa->complete = ahci_pm_dummy_done; 827 xa->datalen = 0; 828 xa->flags = ATA_F_POLL | ATA_F_AUTOSENSE; 829 xa->timeout = 1000; 830 831 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) { 832 *datap = xa->rfis.sector_count | (xa->rfis.lba_low << 8) | 833 (xa->rfis.lba_mid << 16) | (xa->rfis.lba_high << 24); 834 error = 0; 835 } else { 836 kprintf("%s.%d pm_read SCA[%d] failed\n", 837 PORTNAME(ap), target, which); 838 *datap = 0; 839 error = EIO; 840 } 841 ahci_ata_put_xfer(xa); 842 return (error); 843 } 844 845 /* 846 * Write a PM register 847 */ 848 int 849 ahci_pm_write(struct ahci_port *ap, int target, int which, u_int32_t data) 850 { 851 struct ata_xfer *xa; 852 int error; 853 854 xa = ahci_ata_get_xfer(ap, &ap->ap_ata[15]); 855 856 xa->fis->type = ATA_FIS_TYPE_H2D; 857 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15; 858 xa->fis->command = ATA_C_WRITE_PM; 859 xa->fis->features = which; 860 xa->fis->device = target | ATA_H2D_DEVICE_LBA; 861 xa->fis->sector_count = (u_int8_t)data; 862 xa->fis->lba_low = (u_int8_t)(data >> 8); 863 xa->fis->lba_mid = (u_int8_t)(data >> 16); 864 xa->fis->lba_high = (u_int8_t)(data >> 24); 865 xa->fis->control = ATA_FIS_CONTROL_4BIT; 866 867 xa->complete = ahci_pm_dummy_done; 868 xa->datalen = 0; 869 xa->flags = ATA_F_POLL; 870 xa->timeout = 1000; 871 872 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) 873 error = 0; 874 else 875 error = EIO; 876 ahci_ata_put_xfer(xa); 877 return(error); 878 } 879 880 /* 881 * Dummy done callback for xa. 882 */ 883 static void 884 ahci_pm_dummy_done(struct ata_xfer *xa) 885 { 886 } 887 888