1 /* 2 * (MPSAFE) 3 * 4 * Copyright (c) 2009 The DragonFly Project. All rights reserved. 5 * 6 * This code is derived from software contributed to The DragonFly Project 7 * by Matthew Dillon <dillon@backplane.com> 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in 17 * the documentation and/or other materials provided with the 18 * distribution. 19 * 3. Neither the name of The DragonFly Project nor the names of its 20 * contributors may be used to endorse or promote products derived 21 * from this software without specific, prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 24 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 25 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 26 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 27 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 28 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 29 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 30 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 31 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 32 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 33 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 */ 36 37 #include "ahci.h" 38 39 static void ahci_pm_dummy_done(struct ata_xfer *xa); 40 41 int 42 ahci_pm_port_init(struct ahci_port *ap, struct ata_port *at) 43 { 44 at->at_probe = ATA_PROBE_NEED_HARD_RESET; 45 return (0); 46 } 47 48 /* 49 * AHCI port multiplier probe. This routine is run by the hardreset code 50 * if it gets past the device detect, whether or not BSY is found to be 51 * stuck. 52 * 53 * We MUST use CLO to properly probe whether the port multiplier exists 54 * or not. 55 * 56 * Return 0 on success, non-zero on failure. 57 */ 58 int 59 ahci_pm_port_probe(struct ahci_port *ap, int orig_error) 60 { 61 struct ahci_cmd_hdr *cmd_slot; 62 struct ata_port *at; 63 struct ahci_ccb *ccb = NULL; 64 u_int8_t *fis = NULL; 65 int error; 66 u_int32_t cmd; 67 u_int32_t fbs; 68 int count; 69 int rstcount; 70 int i; 71 int fbsmode; 72 int sig; 73 74 count = 2; 75 rstcount = 2; 76 retry: 77 fbsmode = 0; 78 79 /* 80 * This code is only called from hardreset, which does not 81 * high level command processing. The port should be stopped. 82 * 83 * Set PMA mode while the port is stopped. 84 * 85 * NOTE: On retry the port might be running, stopped, or failed. 86 */ 87 ahci_port_stop(ap, 0); 88 ap->ap_state = AP_S_NORMAL; 89 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC; 90 #if 1 91 if ((cmd & AHCI_PREG_CMD_PMA) == 0) { 92 cmd |= AHCI_PREG_CMD_PMA; 93 ahci_pwrite(ap, AHCI_PREG_CMD, cmd); 94 } 95 #endif 96 97 /* 98 * Check to see if FBS is supported by checking the cap and the 99 * support bit in the port CMD register. If it looks good, try 100 * to write to the FBS register. 101 */ 102 if (ap->ap_sc->sc_cap & AHCI_REG_CAP_FBSS) { 103 const char *str1 = ""; 104 const char *str2 = ""; 105 const char *str3 = ""; 106 107 if (cmd & AHCI_PREG_CMD_FBSCP) { 108 str1 = "HW indicates support"; 109 } else if (ap->ap_sc->sc_flags & AHCI_F_FORCE_FBSS) { 110 cmd |= AHCI_PREG_CMD_FBSCP; /* Force on */ 111 str1 = "HW indicates no-support, force"; 112 } else { 113 str1 = "HW indicates no-support"; 114 } 115 if (cmd & AHCI_PREG_CMD_FBSCP) { 116 fbs = ahci_pread(ap, AHCI_PREG_FBS); 117 ahci_pwrite(ap, AHCI_PREG_FBS, fbs | AHCI_PREG_FBS_EN); 118 fbs = ahci_pread(ap, AHCI_PREG_FBS); 119 if (fbs & AHCI_PREG_FBS_EN) { 120 str2 = ", enable succeeded"; 121 fbsmode = 1; 122 } else { 123 str2 = ", enable failed"; 124 } 125 126 /* 127 * Must be off during the PM probe, we will enable 128 * it at the end. 129 */ 130 ahci_pwrite(ap, AHCI_PREG_FBS, fbs & ~AHCI_PREG_FBS_EN); 131 } 132 kprintf("%s: FBS Cap detected: %s%s%s\n", 133 PORTNAME(ap), str1, str2, str3); 134 } 135 136 /* 137 * If the probe fails, cleanup any previous state. 138 */ 139 if (fbsmode == 0 && (ap->ap_flags & AP_F_FBSS_ENABLED)) { 140 ap->ap_flags &= ~AP_F_FBSS_ENABLED; 141 ahci_pwrite(ap, AHCI_PREG_FBS, 0); 142 } 143 144 /* 145 * Flush any errors and request CLO unconditionally, then start 146 * the port. 147 */ 148 ahci_flush_tfd(ap); 149 ahci_port_clo(ap); 150 if (ahci_port_start(ap)) { 151 kprintf("%s: PMPROBE cannot start port\n", 152 PORTNAME(ap)); 153 error = EIO; 154 goto err; 155 } 156 157 /* 158 * When a PM is present and the cable or driver cycles, the PM may 159 * hang in BSY and require another COMRESET sequence to clean it up. 160 * The CLO above didn't work (for example, if there is no CLO 161 * support), so do another hard COMRESET to try to clear the busy 162 * condition. 163 */ 164 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 165 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 166 if (--rstcount) { 167 int pmdetect; 168 169 kprintf("%s: PMPROBE BUSY, comreset and retry\n", 170 PORTNAME(ap)); 171 ahci_comreset(ap, &pmdetect); 172 if (pmdetect) 173 goto retry; 174 } 175 kprintf("%s: PMPROBE BUSY, giving up\n", 176 PORTNAME(ap)); 177 error = EBUSY; 178 goto err; 179 } 180 181 /* 182 * Use the error CCB for all commands 183 * 184 * NOTE! This CCB is used for both the first and second commands. 185 * The second command must use CCB slot 1 to properly load 186 * the signature. 187 */ 188 ccb = ahci_get_err_ccb(ap); 189 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_SILENT; 190 ccb->ccb_xa.complete = ahci_pm_dummy_done; 191 ccb->ccb_xa.at = ap->ap_ata[15]; 192 cmd_slot = ccb->ccb_cmd_hdr; 193 KKASSERT(ccb->ccb_slot == 1); 194 195 /* 196 * Prep the first H2D command with SRST feature & clear busy/reset 197 * flags. 198 */ 199 fis = ccb->ccb_cmd_table->cfis; 200 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 201 fis[0] = ATA_FIS_TYPE_H2D; 202 fis[1] = 0x0F; /* Target 15 */ 203 fis[15] = ATA_FIS_CONTROL_SRST | ATA_FIS_CONTROL_4BIT; 204 205 cmd_slot->prdtl = 0; 206 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 207 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */ 208 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */ 209 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */ 210 211 ccb->ccb_xa.state = ATA_S_PENDING; 212 213 if (bootverbose) { 214 kprintf("%s: PMPROBE PreStatus 0x%b\n", 215 PORTNAME(ap), 216 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS); 217 } 218 219 /* 220 * The only way one can determine if a port multiplier is on the 221 * port is to probe target 15, and of course this will fail if 222 * there is no port multiplier. 223 * 224 * The probing has to be done whether or not a device is probed on 225 * target 0, because when a PM is attached target 0 represents 226 * slot #0 behind the PM. 227 * 228 * Port multipliers are expected to answer more quickly than normal 229 * devices, use a shorter timeout than normal. 230 * 231 * If there is no PM here this command can still succeed due to 232 * the _C_ 233 */ 234 if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) { 235 kprintf("%s: PMPROBE(1) No Port Multiplier was found.\n", 236 PORTNAME(ap)); 237 if (--count) { 238 rstcount = 2; 239 ahci_put_err_ccb(ccb); 240 goto retry; 241 } 242 error = EBUSY; 243 goto err; 244 } 245 246 if (bootverbose) { 247 kprintf("%s: PMPROBE PosStatus 0x%b\n", 248 PORTNAME(ap), 249 ahci_pread(ap, AHCI_PREG_TFD), AHCI_PFMT_TFD_STS); 250 } 251 #if 0 252 /* 253 * REMOVED - Ignore a BSY condition between the first and second 254 * FIS in the PM probe. Seems to work better. 255 */ 256 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 257 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 258 kprintf("%s: PMPROBE Busy after first FIS\n", PORTNAME(ap)); 259 } else if (bootverbose) { 260 kprintf("%s: PMPROBE Clean after first FIS\n", PORTNAME(ap)); 261 } 262 #endif 263 264 /* 265 * The device may have muffed up the PHY when it reset. 266 */ 267 ahci_flush_tfd(ap); 268 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 269 /* ahci_pm_phy_status(ap, 15, &cmd); */ 270 271 /* 272 * Prep second D2H command to read status and complete reset sequence 273 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA 274 * Rev 2.6 and it is unclear how the second FIS should be set up 275 * from the AHCI document. 276 * 277 * Give the device 3ms before sending the second FIS. 278 * 279 * It is unclear which other fields in the FIS are used. Just zero 280 * everything. 281 */ 282 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_SILENT; 283 284 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 285 fis[0] = ATA_FIS_TYPE_H2D; 286 fis[1] = 0x0F; 287 fis[15] = ATA_FIS_CONTROL_4BIT; 288 289 cmd_slot->prdtl = 0; 290 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 291 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */ 292 293 ccb->ccb_xa.state = ATA_S_PENDING; 294 295 /* 296 * The only way one can determine if a port multiplier is on the 297 * port is to probe target 15, and of course this will fail if 298 * there is no port multiplier. 299 * 300 * The probing has to be done whether or not a device is probed on 301 * target 0, because when a PM is attached target 0 represents 302 * slot #0 behind the PM. 303 */ 304 if (ahci_poll(ccb, 5000, ahci_quick_timeout) != ATA_S_COMPLETE) { 305 kprintf("%s: PMPROBE(2) No Port Multiplier was found.\n", 306 PORTNAME(ap)); 307 if (--count) { 308 rstcount = 2; 309 ahci_put_err_ccb(ccb); 310 goto retry; 311 } 312 error = EBUSY; 313 goto err; 314 } 315 316 /* 317 * Some controllers return completion for the second FIS before 318 * updating the signature register. Sleep a bit to allow for it. 319 */ 320 ahci_os_sleep(500); 321 322 /* 323 * What? We succeeded? Yup, but for some reason the signature 324 * is still latched from the original detect (that saw target 0 325 * behind the PM), and I don't know how to clear the condition 326 * other then by retrying the whole reset sequence. 327 */ 328 sig = ahci_port_signature_detect(ap, NULL); 329 if (sig == ATA_PORT_T_PM) { 330 kprintf("%s: PMPROBE PM Signature detected\n", 331 PORTNAME(ap)); 332 ap->ap_ata[15]->at_probe = ATA_PROBE_GOOD; 333 error = 0; 334 } else if (--count == 0) { 335 kprintf("%s: PMPROBE PM Signature not detected\n", 336 PORTNAME(ap)); 337 error = EBUSY; 338 } else { 339 rstcount = 2; 340 fis[15] = 0; 341 ahci_put_err_ccb(ccb); 342 if (bootverbose) { 343 kprintf("%s: PMPROBE retry on count\n", 344 PORTNAME(ap)); 345 } 346 goto retry; 347 } 348 349 /* 350 * Fall through / clean up the CCB and perform error processing. 351 */ 352 err: 353 if (ccb != NULL) 354 ahci_put_err_ccb(ccb); 355 356 if (error == 0 && ahci_pm_identify(ap)) { 357 ahci_os_sleep(500); 358 if (ahci_pm_identify(ap)) { 359 kprintf("%s: PM - cannot identify port multiplier\n", 360 PORTNAME(ap)); 361 error = EBUSY; 362 } else { 363 kprintf("%s: PM - Had to identify twice\n", 364 PORTNAME(ap)); 365 } 366 } 367 368 /* 369 * Turn on FBS mode, clear any stale error. Enforce a 1/10 second 370 * delay primarily for the IGN_CR quirk. 371 */ 372 if (error == 0 && fbsmode) { 373 ahci_port_stop(ap, 0); 374 ap->ap_flags |= AP_F_FBSS_ENABLED; 375 fbs = ahci_pread(ap, AHCI_PREG_FBS); 376 fbs &= ~AHCI_PREG_FBS_DEV; 377 fbs |= AHCI_PREG_FBS_DEC; 378 ahci_pwrite(ap, AHCI_PREG_FBS, fbs | AHCI_PREG_FBS_EN); 379 ahci_os_sleep(100); 380 if (ahci_port_start(ap)) { 381 kprintf("%s: PMPROBE failed to restart port " 382 "after FBS enable\n", 383 PORTNAME(ap)); 384 ahci_pwrite(ap, AHCI_PREG_FBS, fbs & ~AHCI_PREG_FBS_EN); 385 ap->ap_flags &= ~AP_F_FBSS_ENABLED; 386 } 387 } 388 389 390 /* 391 * If we probed the PM reset the state for the targets behind 392 * it so they get probed by the state machine. 393 */ 394 if (error == 0) { 395 for (i = 0; i < AHCI_MAX_PMPORTS; ++i) { 396 at = ap->ap_ata[i]; 397 at->at_probe = ATA_PROBE_NEED_INIT; 398 at->at_features |= ATA_PORT_F_RESCAN; 399 } 400 ap->ap_type = ATA_PORT_T_PM; 401 return (0); 402 } 403 404 /* 405 * If we failed turn off PMA, otherwise identify the port multiplier. 406 * CAM will iterate the devices. 407 */ 408 ahci_port_stop(ap, 0); 409 ahci_port_clo(ap); 410 #if 1 411 cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC; 412 cmd &= ~AHCI_PREG_CMD_PMA; 413 ahci_pwrite(ap, AHCI_PREG_CMD, cmd); 414 #endif 415 if (orig_error == 0) { 416 if (ahci_pwait_clr(ap, AHCI_PREG_TFD, 417 AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) { 418 kprintf("%s: PM probe: port will not come ready\n", 419 PORTNAME(ap)); 420 orig_error = EBUSY; 421 ahci_port_init(ap); 422 } 423 } 424 return(orig_error); 425 } 426 427 /* 428 * Identify the port multiplier 429 */ 430 int 431 ahci_pm_identify(struct ahci_port *ap) 432 { 433 u_int32_t chipid; 434 u_int32_t rev; 435 u_int32_t nports; 436 u_int32_t data1; 437 u_int32_t data2; 438 int has_dummy_port; 439 440 ap->ap_probe = ATA_PROBE_FAILED; 441 if (ahci_pm_read(ap, 15, 0, &chipid)) 442 goto err; 443 if (ahci_pm_read(ap, 15, 1, &rev)) 444 goto err; 445 if (ahci_pm_read(ap, 15, 2, &nports)) 446 goto err; 447 nports &= 0x0000000F; /* only the low 4 bits */ 448 ap->ap_probe = ATA_PROBE_GOOD; 449 450 if ((rev & SATA_PMREV_MASK) == 0) { 451 if (bootverbose) 452 kprintf("%s: PM identify register empty!\n", 453 PORTNAME(ap)); 454 return EIO; 455 } 456 457 /* 458 * Ignore fake port on PMs which have it. We can probe it but the 459 * softreset will probably fail. 460 */ 461 switch(chipid) { 462 case 0x37261095: 463 has_dummy_port = 1; 464 break; 465 default: 466 has_dummy_port = 0; 467 break; 468 } 469 if (has_dummy_port) { 470 if (nports > 1) 471 --nports; 472 } 473 474 kprintf("%s: Port multiplier: chip=%08x rev=0x%b nports=%d\n", 475 PORTNAME(ap), 476 chipid, 477 rev, SATA_PFMT_PM_REV, 478 nports); 479 if (has_dummy_port) { 480 kprintf("%s: Port multiplier: Ignoring dummy port #%d\n", 481 PORTNAME(ap), nports); 482 } 483 ap->ap_pmcount = nports; 484 485 if (ahci_pm_read(ap, 15, SATA_PMREG_FEA, &data1)) { 486 kprintf("%s: Port multiplier: Warning, " 487 "cannot read feature register\n", PORTNAME(ap)); 488 } else { 489 kprintf("%s: Port multiplier features: 0x%b\n", 490 PORTNAME(ap), 491 data1, 492 SATA_PFMT_PM_FEA); 493 } 494 if (ahci_pm_read(ap, 15, SATA_PMREG_FEAEN, &data2) == 0) { 495 kprintf("%s: Port multiplier defaults: 0x%b\n", 496 PORTNAME(ap), 497 data2, 498 SATA_PFMT_PM_FEA); 499 } 500 501 /* 502 * Turn on async notification if we support and the PM supports it. 503 * This allows the PM to forward async notification events to us and 504 * it will also generate an event for target 15 for hot-plug events 505 * (or is supposed to anyway). 506 */ 507 if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF) && 508 (data1 & SATA_PMFEA_ASYNCNOTIFY)) { 509 u_int32_t serr_bits = AHCI_PREG_SERR_DIAG_N | 510 AHCI_PREG_SERR_DIAG_X; 511 data2 |= SATA_PMFEA_ASYNCNOTIFY; 512 if (ahci_pm_write(ap, 15, SATA_PMREG_FEAEN, data2)) { 513 kprintf("%s: Port multiplier: AsyncNotify cannot be " 514 "enabled\n", PORTNAME(ap)); 515 } else if (ahci_pm_write(ap, 15, SATA_PMREG_EEENA, serr_bits)) { 516 kprintf("%s: Port mulltiplier: AsyncNotify unable " 517 "to enable error info bits\n", PORTNAME(ap)); 518 } else { 519 kprintf("%s: Port multiplier: AsyncNotify enabled\n", 520 PORTNAME(ap)); 521 } 522 } 523 524 return (0); 525 err: 526 kprintf("%s: Port multiplier cannot be identified\n", PORTNAME(ap)); 527 return (EIO); 528 } 529 530 /* 531 * Do a COMRESET sequence on the target behind a port multiplier. 532 * 533 * If hard is 2 we also cycle the phy on the target. 534 * 535 * This must be done prior to any softreset or probe attempts on 536 * targets behind the port multiplier. 537 * 538 * Returns 0 on success or an error. 539 */ 540 int 541 ahci_pm_hardreset(struct ahci_port *ap, int target, int hard) 542 { 543 struct ata_port *at; 544 u_int32_t data; 545 int loop; 546 int error = EIO; 547 548 at = ap->ap_ata[target]; 549 550 /* 551 * Turn off power management and kill the phy on the target 552 * if requested. Hold state for 10ms. 553 */ 554 data = ap->ap_sc->sc_ipm_disable; 555 if (hard == 2) 556 data |= AHCI_PREG_SCTL_DET_DISABLE; 557 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) 558 goto err; 559 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 560 goto err; 561 ahci_os_sleep(10); 562 563 /* 564 * Start transmitting COMRESET. COMRESET must be sent for at 565 * least 1ms. 566 */ 567 at->at_probe = ATA_PROBE_FAILED; 568 at->at_type = ATA_PORT_T_NONE; 569 data = ap->ap_sc->sc_ipm_disable | AHCI_PREG_SCTL_DET_INIT; 570 switch(AhciForceGen) { 571 case 0: 572 data |= AHCI_PREG_SCTL_SPD_ANY; 573 break; 574 case 1: 575 data |= AHCI_PREG_SCTL_SPD_GEN1; 576 break; 577 case 2: 578 data |= AHCI_PREG_SCTL_SPD_GEN2; 579 break; 580 case 3: 581 data |= AHCI_PREG_SCTL_SPD_GEN3; 582 break; 583 default: 584 data |= AHCI_PREG_SCTL_SPD_GEN3; 585 break; 586 } 587 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 588 goto err; 589 590 /* 591 * It takes about 100ms for the DET logic to settle down, 592 * from trial and error testing. If this is too short 593 * the softreset code will fail. 594 */ 595 ahci_os_sleep(100); 596 597 if (ahci_pm_phy_status(ap, target, &data)) { 598 kprintf("%s: (A)Cannot clear phy status\n", 599 ATANAME(ap ,at)); 600 } 601 602 /* 603 * Flush any status, then clear DET to initiate negotiation. 604 */ 605 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 606 data = ap->ap_sc->sc_ipm_disable | AHCI_PREG_SCTL_DET_NONE; 607 if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data)) 608 goto err; 609 610 /* 611 * Try to determine if there is a device on the port. This 612 * operation usually runs sequentially on the PM, use a short 613 * 3/10 second timeout. The disks should already be sufficiently 614 * powered. 615 * 616 * If we fail clear any pending status since we may have 617 * cycled the phy and probably caused another PRCS interrupt. 618 */ 619 for (loop = 3; loop; --loop) { 620 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) 621 goto err; 622 if (data & AHCI_PREG_SSTS_DET) 623 break; 624 ahci_os_sleep(100); 625 } 626 if (loop == 0) { 627 kprintf("%s.%d: Port appears to be unplugged\n", 628 PORTNAME(ap), target); 629 error = ENODEV; 630 goto err; 631 } 632 633 /* 634 * There is something on the port. Give the device 3 seconds 635 * to fully negotiate. 636 */ 637 for (loop = 30; loop; --loop) { 638 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) 639 goto err; 640 if ((data & AHCI_PREG_SSTS_DET) == AHCI_PREG_SSTS_DET_DEV) 641 break; 642 ahci_os_sleep(100); 643 } 644 645 /* 646 * Device not detected 647 */ 648 if (loop == 0) { 649 kprintf("%s: Device may be powered down\n", 650 PORTNAME(ap)); 651 error = ENODEV; 652 goto err; 653 } 654 655 /* 656 * Device detected 657 */ 658 kprintf("%s.%d: Device detected data=%08x\n", 659 PORTNAME(ap), target, data); 660 /* 661 * Clear SERR on the target so we get a new NOTIFY event if a hot-plug 662 * or hot-unplug occurs. Clear any spurious IFS that may have 663 * occured during the probe. 664 * 665 * WARNING! 100ms seems to work in most cases but 666 */ 667 ahci_os_sleep(100); 668 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 669 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 670 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS); 671 672 error = 0; 673 err: 674 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_SOFT_RESET; 675 return (error); 676 } 677 678 /* 679 * AHCI soft reset through port multiplier. 680 * 681 * This function keeps port communications intact and attempts to generate 682 * a reset to the connected device using device commands. Unlike 683 * hard-port operations we can't do fancy stop/starts or stuff like 684 * that without messing up other commands that might be running or 685 * queued. 686 */ 687 int 688 ahci_pm_softreset(struct ahci_port *ap, int target) 689 { 690 struct ata_port *at; 691 struct ahci_ccb *ccb; 692 struct ahci_cmd_hdr *cmd_slot; 693 u_int8_t *fis; 694 int count; 695 int error; 696 u_int32_t data; 697 698 error = EIO; 699 at = ap->ap_ata[target]; 700 701 DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap)); 702 703 count = 2; 704 retry: 705 /* 706 * Try to clear the phy so we get a good signature, otherwise 707 * the PM may not latch a new signature. 708 * 709 * NOTE: This cannot be safely done between the first and second 710 * softreset FISs. It's now or never. 711 */ 712 if (ahci_pm_phy_status(ap, target, &data)) { 713 kprintf("%s: (B)Cannot clear phy status\n", 714 ATANAME(ap ,at)); 715 } 716 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 717 718 /* 719 * Prep first D2H command with SRST feature & clear busy/reset flags 720 * 721 * It is unclear which other fields in the FIS are used. Just zero 722 * everything. 723 * 724 * When soft-resetting a port behind a multiplier at will be 725 * non-NULL, assigning it to the ccb prevents the port interrupt 726 * from hard-resetting the port if a problem crops up. 727 */ 728 ccb = ahci_get_err_ccb(ap); 729 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE; 730 ccb->ccb_xa.complete = ahci_pm_dummy_done; 731 ccb->ccb_xa.at = at; 732 733 fis = ccb->ccb_cmd_table->cfis; 734 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 735 fis[0] = ATA_FIS_TYPE_H2D; 736 fis[1] = at->at_target; 737 fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT; 738 739 cmd_slot = ccb->ccb_cmd_hdr; 740 cmd_slot->prdtl = 0; 741 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 742 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */ 743 cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */ 744 cmd_slot->flags |= htole16(at->at_target << 745 AHCI_CMD_LIST_FLAG_PMP_SHIFT); 746 747 ccb->ccb_xa.state = ATA_S_PENDING; 748 749 /* 750 * This soft reset of the AP target can cause a stream of IFS 751 * errors to occur. Setting AP_F_IGNORE_IFS prevents the port 752 * from being hard reset (because its the target behind the 753 * port that isn't happy). 754 * 755 * The act of sending the soft reset can cause the target to 756 * blow the port up and generate IFS errors. 757 */ 758 ap->ap_flags |= AP_F_IGNORE_IFS; 759 ap->ap_flags &= ~AP_F_IFS_IGNORED; 760 761 if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) { 762 kprintf("%s: Soft-reset through PM failed, %s\n", 763 ATANAME(ap, at), 764 (count > 1 ? "retrying" : "giving up")); 765 ahci_put_err_ccb(ccb); 766 if (--count) { 767 if (ap->ap_flags & AP_F_IFS_IGNORED) 768 ahci_os_sleep(5000); 769 else 770 ahci_os_sleep(1000); 771 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 772 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS); 773 goto retry; 774 } 775 goto err; 776 } 777 778 /* 779 * WARNING! SENSITIVE TIME PERIOD! WARNING! 780 * 781 * The first and second FISes are supposed to be back-to-back, 782 * I think the idea is to get the second sent and then after 783 * the device resets it will send a signature. Do not delay 784 * here and most definitely do not issue any commands to other 785 * targets! 786 */ 787 788 /* 789 * Prep second D2H command to read status and complete reset sequence 790 * AHCI 10.4.1 and "Serial ATA Revision 2.6". I can't find the ATA 791 * Rev 2.6 and it is unclear how the second FIS should be set up 792 * from the AHCI document. 793 * 794 * Give the device 3ms before sending the second FIS. 795 * 796 * It is unclear which other fields in the FIS are used. Just zero 797 * everything. 798 */ 799 bzero(fis, sizeof(ccb->ccb_cmd_table->cfis)); 800 fis[0] = ATA_FIS_TYPE_H2D; 801 fis[1] = at->at_target; 802 fis[15] = ATA_FIS_CONTROL_4BIT; 803 804 cmd_slot->prdtl = 0; 805 cmd_slot->flags = htole16(5); /* FIS length: 5 DWORDS */ 806 cmd_slot->flags |= htole16(at->at_target << 807 AHCI_CMD_LIST_FLAG_PMP_SHIFT); 808 809 ccb->ccb_xa.state = ATA_S_PENDING; 810 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE; 811 812 ap->ap_flags &= ~AP_F_IFS_IGNORED; 813 814 if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) { 815 kprintf("%s: Soft-reset(2) through PM failed, %s\n", 816 ATANAME(ap, at), 817 (count > 1 ? "retrying" : "giving up")); 818 if (--count) { 819 ahci_os_sleep(1000); 820 ahci_put_err_ccb(ccb); 821 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 822 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS); 823 goto retry; 824 } 825 goto err; 826 } 827 828 ahci_put_err_ccb(ccb); 829 ahci_os_sleep(100); 830 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 831 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS); 832 833 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 834 if (ahci_pm_phy_status(ap, target, &data)) { 835 kprintf("%s: (C)Cannot clear phy status\n", 836 ATANAME(ap ,at)); 837 } 838 ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 839 840 /* 841 * Do it again, even if we think we got a good result 842 */ 843 if (--count) { 844 fis[15] = 0; 845 goto retry; 846 } 847 848 /* 849 * If the softreset is trying to clear a BSY condition after a 850 * normal portreset we assign the port type. 851 * 852 * If the softreset is being run first as part of the ccb error 853 * processing code then report if the device signature changed 854 * unexpectedly. 855 */ 856 if (at->at_type == ATA_PORT_T_NONE) { 857 at->at_type = ahci_port_signature_detect(ap, at); 858 } else { 859 if (ahci_port_signature_detect(ap, at) != at->at_type) { 860 kprintf("%s: device signature unexpectedly " 861 "changed\n", ATANAME(ap, at)); 862 error = EBUSY; /* XXX */ 863 } 864 } 865 error = 0; 866 867 /* 868 * Who knows what kind of mess occured. We have exclusive access 869 * to the port so try to clean up potential problems. 870 */ 871 err: 872 ahci_os_sleep(100); 873 874 /* 875 * Clear error status so we can detect removal. 876 */ 877 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) { 878 kprintf("%s: ahci_pm_softreset unable to clear SERR\n", 879 ATANAME(ap, at)); 880 } 881 ahci_pwrite(ap, AHCI_PREG_SERR, -1); 882 ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS); 883 ap->ap_flags &= ~(AP_F_IGNORE_IFS | AP_F_IFS_IGNORED); 884 885 at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_IDENT; 886 return (error); 887 } 888 889 890 /* 891 * Return the phy status for a target behind a port multiplier and 892 * reset SATA_PMREG_SERR. 893 * 894 * Returned bits follow AHCI_PREG_SSTS bits. The AHCI_PREG_SSTS_SPD 895 * bits can be used to determine the link speed and will be 0 if there 896 * is no link. 897 * 898 * 0 is returned if any communications error occurs. 899 */ 900 int 901 ahci_pm_phy_status(struct ahci_port *ap, int target, u_int32_t *datap) 902 { 903 int error; 904 905 error = ahci_pm_read(ap, target, SATA_PMREG_SSTS, datap); 906 if (error == 0) 907 error = ahci_pm_write(ap, target, SATA_PMREG_SERR, -1); 908 if (error) 909 *datap = 0; 910 return(error); 911 } 912 913 /* 914 * Check that a target is still good. 915 */ 916 void 917 ahci_pm_check_good(struct ahci_port *ap, int target) 918 { 919 struct ata_port *at; 920 u_int32_t data; 921 922 /* 923 * It looks like we might have to read the EINFO register 924 * to allow the PM to generate a new event. 925 */ 926 if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) { 927 kprintf("%s: Port multiplier EINFO could not be read\n", 928 PORTNAME(ap)); 929 } 930 931 if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) { 932 kprintf("%s: Port multiplier: SERR could not be cleared\n", 933 PORTNAME(ap)); 934 } 935 936 if (target == CAM_TARGET_WILDCARD || target >= ap->ap_pmcount) 937 return; 938 at = ap->ap_ata[target]; 939 940 /* 941 * If the device needs an init or hard reset also make sure the 942 * PHY is turned on. 943 */ 944 if (at->at_probe <= ATA_PROBE_NEED_HARD_RESET) { 945 /*kprintf("%s DOHARD\n", ATANAME(ap, at));*/ 946 ahci_pm_hardreset(ap, target, 1); 947 } 948 949 /* 950 * Read the detect status 951 */ 952 if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) { 953 kprintf("%s: Unable to access PM SSTS register target %d\n", 954 PORTNAME(ap), target); 955 return; 956 } 957 if ((data & AHCI_PREG_SSTS_DET) != AHCI_PREG_SSTS_DET_DEV) { 958 /*kprintf("%s: DETECT %08x\n", ATANAME(ap, at), data);*/ 959 if (at->at_probe != ATA_PROBE_FAILED) { 960 at->at_probe = ATA_PROBE_FAILED; 961 at->at_type = ATA_PORT_T_NONE; 962 at->at_features |= ATA_PORT_F_RESCAN; 963 kprintf("%s: HOTPLUG (PM) - Device removed\n", 964 ATANAME(ap, at)); 965 } 966 } else { 967 if (at->at_probe == ATA_PROBE_FAILED) { 968 at->at_probe = ATA_PROBE_NEED_HARD_RESET; 969 at->at_features |= ATA_PORT_F_RESCAN; 970 kprintf("%s: HOTPLUG (PM) - Device inserted\n", 971 ATANAME(ap, at)); 972 } 973 } 974 } 975 976 /* 977 * Read a PM register 978 */ 979 int 980 ahci_pm_read(struct ahci_port *ap, int target, int which, u_int32_t *datap) 981 { 982 struct ata_xfer *xa; 983 int error; 984 985 xa = ahci_ata_get_xfer(ap, ap->ap_ata[15]); 986 987 xa->fis->type = ATA_FIS_TYPE_H2D; 988 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15; 989 xa->fis->command = ATA_C_READ_PM; 990 xa->fis->features = which; 991 xa->fis->device = target | ATA_H2D_DEVICE_LBA; 992 xa->fis->control = ATA_FIS_CONTROL_4BIT; 993 994 xa->complete = ahci_pm_dummy_done; 995 xa->datalen = 0; 996 xa->flags = ATA_F_POLL | ATA_F_AUTOSENSE; 997 xa->timeout = 1000; 998 999 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) { 1000 *datap = xa->rfis.sector_count | (xa->rfis.lba_low << 8) | 1001 (xa->rfis.lba_mid << 16) | (xa->rfis.lba_high << 24); 1002 error = 0; 1003 } else { 1004 kprintf("%s.%d pm_read SCA[%d] failed\n", 1005 PORTNAME(ap), target, which); 1006 *datap = 0; 1007 error = EIO; 1008 } 1009 ahci_ata_put_xfer(xa); 1010 return (error); 1011 } 1012 1013 /* 1014 * Write a PM register 1015 */ 1016 int 1017 ahci_pm_write(struct ahci_port *ap, int target, int which, u_int32_t data) 1018 { 1019 struct ata_xfer *xa; 1020 int error; 1021 1022 xa = ahci_ata_get_xfer(ap, ap->ap_ata[15]); 1023 1024 xa->fis->type = ATA_FIS_TYPE_H2D; 1025 xa->fis->flags = ATA_H2D_FLAGS_CMD | 15; 1026 xa->fis->command = ATA_C_WRITE_PM; 1027 xa->fis->features = which; 1028 xa->fis->device = target | ATA_H2D_DEVICE_LBA; 1029 xa->fis->sector_count = (u_int8_t)data; 1030 xa->fis->lba_low = (u_int8_t)(data >> 8); 1031 xa->fis->lba_mid = (u_int8_t)(data >> 16); 1032 xa->fis->lba_high = (u_int8_t)(data >> 24); 1033 xa->fis->control = ATA_FIS_CONTROL_4BIT; 1034 1035 xa->complete = ahci_pm_dummy_done; 1036 xa->datalen = 0; 1037 xa->flags = ATA_F_POLL; 1038 xa->timeout = 1000; 1039 1040 if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) 1041 error = 0; 1042 else 1043 error = EIO; 1044 ahci_ata_put_xfer(xa); 1045 return(error); 1046 } 1047 1048 /* 1049 * Dummy done callback for xa. 1050 */ 1051 static void 1052 ahci_pm_dummy_done(struct ata_xfer *xa) 1053 { 1054 } 1055 1056