xref: /dragonfly/sys/dev/disk/ahci/ahci_pm.c (revision c6b7f0da)
1 /*
2  * (MPSAFE)
3  *
4  * Copyright (c) 2009 The DragonFly Project.  All rights reserved.
5  *
6  * This code is derived from software contributed to The DragonFly Project
7  * by Matthew Dillon <dillon@backplane.com>
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  *
13  * 1. Redistributions of source code must retain the above copyright
14  *    notice, this list of conditions and the following disclaimer.
15  * 2. Redistributions in binary form must reproduce the above copyright
16  *    notice, this list of conditions and the following disclaimer in
17  *    the documentation and/or other materials provided with the
18  *    distribution.
19  * 3. Neither the name of The DragonFly Project nor the names of its
20  *    contributors may be used to endorse or promote products derived
21  *    from this software without specific, prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
24  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
25  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
26  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
27  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
29  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
30  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
31  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
32  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
33  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34  * SUCH DAMAGE.
35  */
36 
37 #include "ahci.h"
38 
39 static void ahci_pm_dummy_done(struct ata_xfer *xa);
40 
41 int
42 ahci_pm_port_init(struct ahci_port *ap, struct ata_port *at)
43 {
44         at->at_probe = ATA_PROBE_NEED_HARD_RESET;
45 	return (0);
46 }
47 
48 /*
49  * AHCI port multiplier probe.  This routine is run by the hardreset code
50  * if it gets past the device detect, whether or not BSY is found to be
51  * stuck.
52  *
53  * We MUST use CLO to properly probe whether the port multiplier exists
54  * or not.
55  *
56  * Return 0 on success, non-zero on failure.
57  */
58 int
59 ahci_pm_port_probe(struct ahci_port *ap, int orig_error)
60 {
61 	struct ahci_cmd_hdr *cmd_slot;
62 	struct ata_port	*at;
63 	struct ahci_ccb	*ccb = NULL;
64 	u_int8_t	*fis = NULL;
65 	int		error;
66 	u_int32_t	cmd;
67 	u_int32_t	fbs;
68 	int		count;
69 	int		rstcount;
70 	int		i;
71 	int		fbsmode;
72 	int		sig;
73 
74 	count = 2;
75 	rstcount = 2;
76 retry:
77 	fbsmode = 0;
78 
79 	/*
80 	 * This code is only called from hardreset, which does not
81 	 * high level command processing.  The port should be stopped.
82 	 *
83 	 * Set PMA mode while the port is stopped.
84 	 *
85 	 * NOTE: On retry the port might be running, stopped, or failed.
86 	 */
87 	ahci_port_stop(ap, 0);
88 	ap->ap_state = AP_S_NORMAL;
89 	cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
90 #if 1
91 	if ((cmd & AHCI_PREG_CMD_PMA) == 0) {
92 		cmd |= AHCI_PREG_CMD_PMA;
93 		ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
94 	}
95 #endif
96 
97 	/*
98 	 * Check to see if FBS is supported by checking the cap and the
99 	 * support bit in the port CMD register.  If it looks good, try
100 	 * to write to the FBS register.
101 	 */
102 	if (ap->ap_sc->sc_cap & AHCI_REG_CAP_FBSS) {
103 		const char *str1 = "";
104 		const char *str2 = "";
105 		const char *str3 = "";
106 
107 		if (cmd & AHCI_PREG_CMD_FBSCP) {
108 			str1 = "HW indicates support";
109 		} else if (ap->ap_sc->sc_flags & AHCI_F_FORCE_FBSS) {
110 			cmd |= AHCI_PREG_CMD_FBSCP;	/* Force on */
111 			str1 = "HW indicates no-support, force";
112 		} else {
113 			str1 = "HW indicates no-support";
114 		}
115 		if (cmd & AHCI_PREG_CMD_FBSCP) {
116 			fbs = ahci_pread(ap, AHCI_PREG_FBS);
117 			ahci_pwrite(ap, AHCI_PREG_FBS, fbs | AHCI_PREG_FBS_EN);
118 			fbs = ahci_pread(ap, AHCI_PREG_FBS);
119 			if (fbs & AHCI_PREG_FBS_EN) {
120 				str2 = ", enable succeeded";
121 				fbsmode = 1;
122 			} else {
123 				str2 = ", enable failed";
124 			}
125 
126 			/*
127 			 * Must be off during the PM probe, we will enable
128 			 * it at the end.
129 			 */
130 			ahci_pwrite(ap, AHCI_PREG_FBS, fbs & ~AHCI_PREG_FBS_EN);
131 		}
132 		kprintf("%s: FBS Cap detected: %s%s%s\n",
133 			PORTNAME(ap), str1, str2, str3);
134 	}
135 
136 	/*
137 	 * If the probe fails, cleanup any previous state.
138 	 */
139 	if (fbsmode == 0 && (ap->ap_flags & AP_F_FBSS_ENABLED)) {
140 		ap->ap_flags &= ~AP_F_FBSS_ENABLED;
141 		ahci_pwrite(ap, AHCI_PREG_FBS, 0);
142 	}
143 
144 	/*
145 	 * Flush any errors and request CLO unconditionally, then start
146 	 * the port.
147 	 */
148 	ahci_flush_tfd(ap);
149 	ahci_port_clo(ap);
150 	if (ahci_port_start(ap)) {
151 		kprintf("%s: PMPROBE cannot start port\n",
152 		        PORTNAME(ap));
153 		error = EIO;
154 		goto err;
155 	}
156 
157 	/*
158 	 * When a PM is present and the cable or driver cycles, the PM may
159 	 * hang in BSY and require another COMRESET sequence to clean it up.
160 	 * The CLO above didn't work (for example, if there is no CLO
161 	 * support), so do another hard COMRESET to try to clear the busy
162 	 * condition.
163 	 */
164 	if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
165 			       AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
166 		if (--rstcount) {
167 			int pmdetect;
168 
169 			kprintf("%s: PMPROBE BUSY, comreset and retry\n",
170 				PORTNAME(ap));
171 			ahci_comreset(ap, &pmdetect);
172 			if (pmdetect)
173 				goto retry;
174 		}
175 		kprintf("%s: PMPROBE BUSY, giving up\n",
176 			PORTNAME(ap));
177 		error = EBUSY;
178 		goto err;
179 	}
180 
181 	/*
182 	 * Use the error CCB for all commands
183 	 *
184 	 * NOTE!  This CCB is used for both the first and second commands.
185 	 *	  The second command must use CCB slot 1 to properly load
186 	 *	  the signature.
187 	 */
188 	ccb = ahci_get_err_ccb(ap);
189 	ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_SILENT;
190 	ccb->ccb_xa.complete = ahci_pm_dummy_done;
191 	ccb->ccb_xa.at = ap->ap_ata[15];
192 	cmd_slot = ccb->ccb_cmd_hdr;
193 	KKASSERT(ccb->ccb_slot == 1);
194 
195 	/*
196 	 * Prep the first H2D command with SRST feature & clear busy/reset
197 	 * flags.
198 	 */
199 	fis = ccb->ccb_cmd_table->cfis;
200 	bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
201 	fis[0] = ATA_FIS_TYPE_H2D;
202 	fis[1] = 0x0F;			/* Target 15 */
203 	fis[15] = ATA_FIS_CONTROL_SRST | ATA_FIS_CONTROL_4BIT;
204 
205 	cmd_slot->prdtl = 0;
206 	cmd_slot->flags = htole16(5);	/* FIS length: 5 DWORDS */
207 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
208 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
209 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
210 
211 	ccb->ccb_xa.state = ATA_S_PENDING;
212 
213 	if (bootverbose) {
214 		kprintf("%s: PMPROBE PreStatus 0x%pb%i\n", PORTNAME(ap),
215 			AHCI_PFMT_TFD_STS, ahci_pread(ap, AHCI_PREG_TFD));
216 	}
217 
218 	/*
219 	 * The only way one can determine if a port multiplier is on the
220 	 * port is to probe target 15, and of course this will fail if
221 	 * there is no port multiplier.
222 	 *
223 	 * The probing has to be done whether or not a device is probed on
224 	 * target 0, because when a PM is attached target 0 represents
225 	 * slot #0 behind the PM.
226 	 *
227 	 * Port multipliers are expected to answer more quickly than normal
228 	 * devices, use a shorter timeout than normal.
229 	 *
230 	 * If there is no PM here this command can still succeed due to
231 	 * the _C_
232 	 */
233 	if (ahci_poll(ccb, 1000, ahci_quick_timeout) != ATA_S_COMPLETE) {
234 		kprintf("%s: PMPROBE(1) No Port Multiplier was found.\n",
235 			PORTNAME(ap));
236 		if (--count) {
237 			rstcount = 2;
238 			ahci_put_err_ccb(ccb);
239 			goto retry;
240 		}
241 		error = EBUSY;
242 		goto err;
243 	}
244 
245 	if (bootverbose) {
246 		kprintf("%s: PMPROBE PosStatus 0x%pb%i\n", PORTNAME(ap),
247 			AHCI_PFMT_TFD_STS, ahci_pread(ap, AHCI_PREG_TFD));
248 	}
249 #if 0
250 	/*
251 	 * REMOVED - Ignore a BSY condition between the first and second
252 	 *	     FIS in the PM probe.  Seems to work better.
253 	 */
254 	if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
255 			       AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
256 		kprintf("%s: PMPROBE Busy after first FIS\n", PORTNAME(ap));
257 	} else if (bootverbose) {
258 		kprintf("%s: PMPROBE Clean after first FIS\n", PORTNAME(ap));
259 	}
260 #endif
261 
262 	/*
263 	 * The device may have muffed up the PHY when it reset.
264 	 */
265 	ahci_flush_tfd(ap);
266 	ahci_pwrite(ap, AHCI_PREG_SERR, -1);
267 	/* ahci_pm_phy_status(ap, 15, &cmd); */
268 
269 	/*
270 	 * Prep second D2H command to read status and complete reset sequence
271 	 * AHCI 10.4.1 and "Serial ATA Revision 2.6".  I can't find the ATA
272 	 * Rev 2.6 and it is unclear how the second FIS should be set up
273 	 * from the AHCI document.
274 	 *
275 	 * Give the device 3ms before sending the second FIS.
276 	 *
277 	 * It is unclear which other fields in the FIS are used.  Just zero
278 	 * everything.
279 	 */
280 	ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_SILENT;
281 
282 	bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
283 	fis[0] = ATA_FIS_TYPE_H2D;
284 	fis[1] = 0x0F;
285 	fis[15] = ATA_FIS_CONTROL_4BIT;
286 
287 	cmd_slot->prdtl = 0;
288 	cmd_slot->flags = htole16(5);	/* FIS length: 5 DWORDS */
289 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_PMP); /* port 0xF */
290 
291 	ccb->ccb_xa.state = ATA_S_PENDING;
292 
293 	/*
294 	 * The only way one can determine if a port multiplier is on the
295 	 * port is to probe target 15, and of course this will fail if
296 	 * there is no port multiplier.
297 	 *
298 	 * The probing has to be done whether or not a device is probed on
299 	 * target 0, because when a PM is attached target 0 represents
300 	 * slot #0 behind the PM.
301 	 */
302 	if (ahci_poll(ccb, 5000, ahci_quick_timeout) != ATA_S_COMPLETE) {
303 		kprintf("%s: PMPROBE(2) No Port Multiplier was found.\n",
304 			PORTNAME(ap));
305 		if (--count) {
306 			rstcount = 2;
307 			ahci_put_err_ccb(ccb);
308 			goto retry;
309 		}
310 		error = EBUSY;
311 		goto err;
312 	}
313 
314 	/*
315 	 * Some controllers return completion for the second FIS before
316 	 * updating the signature register.  Sleep a bit to allow for it.
317 	 */
318 	ahci_os_sleep(500);
319 
320 	/*
321 	 * What? We succeeded?  Yup, but for some reason the signature
322 	 * is still latched from the original detect (that saw target 0
323 	 * behind the PM), and I don't know how to clear the condition
324 	 * other then by retrying the whole reset sequence.
325 	 */
326 	sig = ahci_port_signature_detect(ap, NULL);
327 	if (sig == ATA_PORT_T_PM) {
328 		kprintf("%s: PMPROBE PM Signature detected\n",
329 			PORTNAME(ap));
330 		ap->ap_ata[15]->at_probe = ATA_PROBE_GOOD;
331 		error = 0;
332 	} else if (--count == 0) {
333 		kprintf("%s: PMPROBE PM Signature not detected\n",
334 			PORTNAME(ap));
335 		error = EBUSY;
336 	} else {
337 		rstcount = 2;
338 		fis[15] = 0;
339 		ahci_put_err_ccb(ccb);
340 		if (bootverbose) {
341 			kprintf("%s: PMPROBE retry on count\n",
342 				PORTNAME(ap));
343 		}
344 		goto retry;
345 	}
346 
347 	/*
348 	 * Fall through / clean up the CCB and perform error processing.
349 	 */
350 err:
351 	if (ccb != NULL)
352 		ahci_put_err_ccb(ccb);
353 
354 	if (error == 0 && ahci_pm_identify(ap)) {
355 		ahci_os_sleep(500);
356 		if (ahci_pm_identify(ap)) {
357 			kprintf("%s: PM - cannot identify port multiplier\n",
358 				PORTNAME(ap));
359 			error = EBUSY;
360 		} else {
361 			kprintf("%s: PM - Had to identify twice\n",
362 				PORTNAME(ap));
363 		}
364 	}
365 
366 	/*
367 	 * Turn on FBS mode, clear any stale error.  Enforce a 1/10 second
368 	 * delay primarily for the IGN_CR quirk.
369 	 */
370 	if (error == 0 && fbsmode) {
371 		ahci_port_stop(ap, 0);
372 		ap->ap_flags |= AP_F_FBSS_ENABLED;
373 		fbs = ahci_pread(ap, AHCI_PREG_FBS);
374 		fbs &= ~AHCI_PREG_FBS_DEV;
375 		fbs |= AHCI_PREG_FBS_DEC;
376 		ahci_pwrite(ap, AHCI_PREG_FBS, fbs | AHCI_PREG_FBS_EN);
377 		ahci_os_sleep(100);
378 		if (ahci_port_start(ap)) {
379 			kprintf("%s: PMPROBE failed to restart port "
380 				"after FBS enable\n",
381 				PORTNAME(ap));
382 			ahci_pwrite(ap, AHCI_PREG_FBS, fbs & ~AHCI_PREG_FBS_EN);
383 			ap->ap_flags &= ~AP_F_FBSS_ENABLED;
384 		}
385 	}
386 
387 
388 	/*
389 	 * If we probed the PM reset the state for the targets behind
390 	 * it so they get probed by the state machine.
391 	 */
392 	if (error == 0) {
393 		for (i = 0; i < AHCI_MAX_PMPORTS; ++i) {
394 			at = ap->ap_ata[i];
395 			at->at_probe = ATA_PROBE_NEED_INIT;
396 			at->at_features |= ATA_PORT_F_RESCAN;
397 		}
398 		ap->ap_type = ATA_PORT_T_PM;
399 		return (0);
400 	}
401 
402 	/*
403 	 * If we failed turn off PMA, otherwise identify the port multiplier.
404 	 * CAM will iterate the devices.
405 	 */
406 	ahci_port_stop(ap, 0);
407 	ahci_port_clo(ap);
408 #if 1
409 	cmd = ahci_pread(ap, AHCI_PREG_CMD) & ~AHCI_PREG_CMD_ICC;
410 	cmd &= ~AHCI_PREG_CMD_PMA;
411 	ahci_pwrite(ap, AHCI_PREG_CMD, cmd);
412 #endif
413 	if (orig_error == 0) {
414 		if (ahci_pwait_clr(ap, AHCI_PREG_TFD,
415 			    AHCI_PREG_TFD_STS_BSY | AHCI_PREG_TFD_STS_DRQ)) {
416 			kprintf("%s: PM probe: port will not come ready\n",
417 				PORTNAME(ap));
418 			orig_error = EBUSY;
419 			ahci_port_init(ap);
420 		}
421 	}
422 	return(orig_error);
423 }
424 
425 /*
426  * Identify the port multiplier
427  */
428 int
429 ahci_pm_identify(struct ahci_port *ap)
430 {
431 	u_int32_t chipid;
432 	u_int32_t rev;
433 	u_int32_t nports;
434 	u_int32_t data1;
435 	u_int32_t data2;
436 	int	  has_dummy_port;
437 
438 	ap->ap_probe = ATA_PROBE_FAILED;
439 	if (ahci_pm_read(ap, 15, 0, &chipid))
440 		goto err;
441 	if (ahci_pm_read(ap, 15, 1, &rev))
442 		goto err;
443 	if (ahci_pm_read(ap, 15, 2, &nports))
444 		goto err;
445 	nports &= 0x0000000F;	/* only the low 4 bits */
446 	ap->ap_probe = ATA_PROBE_GOOD;
447 
448 	if ((rev & SATA_PMREV_MASK) == 0) {
449 		if (bootverbose)
450 			kprintf("%s: PM identify register empty!\n",
451 				PORTNAME(ap));
452 		return EIO;
453 	}
454 
455 	/*
456 	 * Ignore fake port on PMs which have it.  We can probe it but the
457 	 * softreset will probably fail.
458 	 */
459 	switch(chipid) {
460 	case 0x37261095:
461 		has_dummy_port = 1;
462 		break;
463 	default:
464 		has_dummy_port = 0;
465 		break;
466 	}
467 	if (has_dummy_port) {
468 		if (nports > 1)
469 			--nports;
470 	}
471 
472 	kprintf("%s: Port multiplier: chip=%08x rev=0x%pb%i nports=%d\n",
473 		PORTNAME(ap), chipid, SATA_PFMT_PM_REV, rev, nports);
474 	if (has_dummy_port) {
475 		kprintf("%s: Port multiplier: Ignoring dummy port #%d\n",
476 		PORTNAME(ap), nports);
477 	}
478 	ap->ap_pmcount = nports;
479 
480 	if (ahci_pm_read(ap, 15, SATA_PMREG_FEA, &data1)) {
481 		kprintf("%s: Port multiplier: Warning, "
482 			"cannot read feature register\n", PORTNAME(ap));
483 	} else {
484 		kprintf("%s: Port multiplier features: 0x%pb%i\n",
485 			PORTNAME(ap), SATA_PFMT_PM_FEA, data1);
486 	}
487 	if (ahci_pm_read(ap, 15, SATA_PMREG_FEAEN, &data2) == 0) {
488 		kprintf("%s: Port multiplier defaults: 0x%pb%i\n",
489 			PORTNAME(ap), SATA_PFMT_PM_FEA, data2);
490 	}
491 
492 	/*
493 	 * Turn on async notification if we support and the PM supports it.
494 	 * This allows the PM to forward async notification events to us and
495 	 * it will also generate an event for target 15 for hot-plug events
496 	 * (or is supposed to anyway).
497 	 */
498 	if ((ap->ap_sc->sc_cap & AHCI_REG_CAP_SSNTF) &&
499 	    (data1 & SATA_PMFEA_ASYNCNOTIFY)) {
500 		u_int32_t serr_bits = AHCI_PREG_SERR_DIAG_N |
501 				      AHCI_PREG_SERR_DIAG_X;
502 		data2 |= SATA_PMFEA_ASYNCNOTIFY;
503 		if (ahci_pm_write(ap, 15, SATA_PMREG_FEAEN, data2)) {
504 			kprintf("%s: Port multiplier: AsyncNotify cannot be "
505 				"enabled\n", PORTNAME(ap));
506 		} else if (ahci_pm_write(ap, 15, SATA_PMREG_EEENA, serr_bits)) {
507 			kprintf("%s: Port mulltiplier: AsyncNotify unable "
508 				"to enable error info bits\n", PORTNAME(ap));
509 		} else {
510 			kprintf("%s: Port multiplier: AsyncNotify enabled\n",
511 				PORTNAME(ap));
512 		}
513 	}
514 
515 	return (0);
516 err:
517 	kprintf("%s: Port multiplier cannot be identified\n", PORTNAME(ap));
518 	return (EIO);
519 }
520 
521 /*
522  * Do a COMRESET sequence on the target behind a port multiplier.
523  *
524  * If hard is 2 we also cycle the phy on the target.
525  *
526  * This must be done prior to any softreset or probe attempts on
527  * targets behind the port multiplier.
528  *
529  * Returns 0 on success or an error.
530  */
531 int
532 ahci_pm_hardreset(struct ahci_port *ap, int target, int hard)
533 {
534 	struct ata_port *at;
535 	u_int32_t data;
536 	int loop;
537 	int error = EIO;
538 
539 	at = ap->ap_ata[target];
540 
541 	/*
542 	 * Turn off power management and kill the phy on the target
543 	 * if requested.  Hold state for 10ms.
544 	 */
545 	data = ap->ap_sc->sc_ipm_disable;
546 	if (hard == 2)
547 		data |= AHCI_PREG_SCTL_DET_DISABLE;
548 	if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1))
549 		goto err;
550 	if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data))
551 		goto err;
552 	ahci_os_sleep(10);
553 
554 	/*
555 	 * Start transmitting COMRESET.  COMRESET must be sent for at
556 	 * least 1ms.
557 	 */
558 	at->at_probe = ATA_PROBE_FAILED;
559 	at->at_type = ATA_PORT_T_NONE;
560 	data = ap->ap_sc->sc_ipm_disable | AHCI_PREG_SCTL_DET_INIT;
561 	switch(AhciForceGen) {
562 	case 0:
563 		data |= AHCI_PREG_SCTL_SPD_ANY;
564 		break;
565 	case 1:
566 		data |= AHCI_PREG_SCTL_SPD_GEN1;
567 		break;
568 	case 2:
569 		data |= AHCI_PREG_SCTL_SPD_GEN2;
570 		break;
571 	case 3:
572 		data |= AHCI_PREG_SCTL_SPD_GEN3;
573 		break;
574 	default:
575 		data |= AHCI_PREG_SCTL_SPD_GEN3;
576 		break;
577 	}
578 	if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data))
579 		goto err;
580 
581 	/*
582 	 * It takes about 100ms for the DET logic to settle down,
583 	 * from trial and error testing.  If this is too short
584 	 * the softreset code will fail.
585 	 */
586 	ahci_os_sleep(100);
587 
588 	if (ahci_pm_phy_status(ap, target, &data)) {
589 		kprintf("%s: (A)Cannot clear phy status\n",
590 			ATANAME(ap ,at));
591 	}
592 
593 	/*
594 	 * Flush any status, then clear DET to initiate negotiation.
595 	 */
596 	ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
597 	data = ap->ap_sc->sc_ipm_disable | AHCI_PREG_SCTL_DET_NONE;
598 	if (ahci_pm_write(ap, target, SATA_PMREG_SCTL, data))
599 		goto err;
600 
601 	/*
602 	 * Try to determine if there is a device on the port.  This
603 	 * operation usually runs sequentially on the PM, use a short
604 	 * 3/10 second timeout.  The disks should already be sufficiently
605 	 * powered.
606 	 *
607 	 * If we fail clear any pending status since we may have
608 	 * cycled the phy and probably caused another PRCS interrupt.
609 	 */
610 	for (loop = 3; loop; --loop) {
611 		if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data))
612 			goto err;
613 		if (data & AHCI_PREG_SSTS_DET)
614 			break;
615 		ahci_os_sleep(100);
616 	}
617 	if (loop == 0) {
618 		kprintf("%s.%d: Port appears to be unplugged\n",
619 			PORTNAME(ap), target);
620 		error = ENODEV;
621 		goto err;
622 	}
623 
624 	/*
625 	 * There is something on the port.  Give the device 3 seconds
626 	 * to fully negotiate.
627 	 */
628 	for (loop = 30; loop; --loop) {
629 		if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data))
630 			goto err;
631 		if ((data & AHCI_PREG_SSTS_DET) == AHCI_PREG_SSTS_DET_DEV)
632 			break;
633 		ahci_os_sleep(100);
634 	}
635 
636 	/*
637 	 * Device not detected
638 	 */
639 	if (loop == 0) {
640 		kprintf("%s: Device may be powered down\n",
641 			PORTNAME(ap));
642 		error = ENODEV;
643 		goto err;
644 	}
645 
646 	/*
647 	 * Device detected
648 	 */
649 	kprintf("%s.%d: Device detected data=%08x\n",
650 		PORTNAME(ap), target, data);
651 	/*
652 	 * Clear SERR on the target so we get a new NOTIFY event if a hot-plug
653 	 * or hot-unplug occurs.  Clear any spurious IFS that may have
654 	 * occured during the probe.
655 	 *
656 	 * WARNING!  100ms seems to work in most cases but
657 	 */
658 	ahci_os_sleep(100);
659 	ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
660 	ahci_pwrite(ap, AHCI_PREG_SERR, -1);
661 	ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
662 
663 	error = 0;
664 err:
665 	at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_SOFT_RESET;
666 	return (error);
667 }
668 
669 /*
670  * AHCI soft reset through port multiplier.
671  *
672  * This function keeps port communications intact and attempts to generate
673  * a reset to the connected device using device commands.  Unlike
674  * hard-port operations we can't do fancy stop/starts or stuff like
675  * that without messing up other commands that might be running or
676  * queued.
677  */
678 int
679 ahci_pm_softreset(struct ahci_port *ap, int target)
680 {
681 	struct ata_port		*at;
682 	struct ahci_ccb		*ccb;
683 	struct ahci_cmd_hdr	*cmd_slot;
684 	u_int8_t		*fis;
685 	int			count;
686 	int			error;
687 	u_int32_t		data;
688 
689 	error = EIO;
690 	at = ap->ap_ata[target];
691 
692 	DPRINTF(AHCI_D_VERBOSE, "%s: soft reset\n", PORTNAME(ap));
693 
694 	count = 2;
695 retry:
696 	/*
697 	 * Try to clear the phy so we get a good signature, otherwise
698 	 * the PM may not latch a new signature.
699 	 *
700 	 * NOTE: This cannot be safely done between the first and second
701 	 *	 softreset FISs.  It's now or never.
702 	 */
703 	if (ahci_pm_phy_status(ap, target, &data)) {
704 		kprintf("%s: (B)Cannot clear phy status\n",
705 			ATANAME(ap ,at));
706 	}
707 	ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
708 
709 	/*
710 	 * Prep first D2H command with SRST feature & clear busy/reset flags
711 	 *
712 	 * It is unclear which other fields in the FIS are used.  Just zero
713 	 * everything.
714 	 *
715 	 * When soft-resetting a port behind a multiplier at will be
716 	 * non-NULL, assigning it to the ccb prevents the port interrupt
717 	 * from hard-resetting the port if a problem crops up.
718 	 */
719 	ccb = ahci_get_err_ccb(ap);
720 	ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE;
721 	ccb->ccb_xa.complete = ahci_pm_dummy_done;
722 	ccb->ccb_xa.at = at;
723 
724 	fis = ccb->ccb_cmd_table->cfis;
725 	bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
726 	fis[0] = ATA_FIS_TYPE_H2D;
727 	fis[1] = at->at_target;
728 	fis[15] = ATA_FIS_CONTROL_SRST|ATA_FIS_CONTROL_4BIT;
729 
730 	cmd_slot = ccb->ccb_cmd_hdr;
731 	cmd_slot->prdtl = 0;
732 	cmd_slot->flags = htole16(5);	/* FIS length: 5 DWORDS */
733 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_C); /* Clear busy on OK */
734 	cmd_slot->flags |= htole16(AHCI_CMD_LIST_FLAG_R); /* Reset */
735 	cmd_slot->flags |= htole16(at->at_target <<
736 				   AHCI_CMD_LIST_FLAG_PMP_SHIFT);
737 
738 	ccb->ccb_xa.state = ATA_S_PENDING;
739 
740 	/*
741 	 * This soft reset of the AP target can cause a stream of IFS
742 	 * errors to occur.  Setting AP_F_IGNORE_IFS prevents the port
743 	 * from being hard reset (because its the target behind the
744 	 * port that isn't happy).
745 	 *
746 	 * The act of sending the soft reset can cause the target to
747 	 * blow the port up and generate IFS errors.
748 	 */
749 	ap->ap_flags |= AP_F_IGNORE_IFS;
750 	ap->ap_flags &= ~AP_F_IFS_IGNORED;
751 
752 	if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) {
753 		kprintf("%s: Soft-reset through PM failed, %s\n",
754 			ATANAME(ap, at),
755 			(count > 1 ? "retrying" : "giving up"));
756 		ahci_put_err_ccb(ccb);
757 		if (--count) {
758 			if (ap->ap_flags & AP_F_IFS_IGNORED)
759 				ahci_os_sleep(5000);
760 			else
761 				ahci_os_sleep(1000);
762 			ahci_pwrite(ap, AHCI_PREG_SERR, -1);
763 			ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
764 			goto retry;
765 		}
766 		goto err;
767 	}
768 
769 	/*
770 	 * WARNING!  SENSITIVE TIME PERIOD!  WARNING!
771 	 *
772 	 * The first and second FISes are supposed to be back-to-back,
773 	 * I think the idea is to get the second sent and then after
774 	 * the device resets it will send a signature.  Do not delay
775 	 * here and most definitely do not issue any commands to other
776 	 * targets!
777 	 */
778 
779 	/*
780 	 * Prep second D2H command to read status and complete reset sequence
781 	 * AHCI 10.4.1 and "Serial ATA Revision 2.6".  I can't find the ATA
782 	 * Rev 2.6 and it is unclear how the second FIS should be set up
783 	 * from the AHCI document.
784 	 *
785 	 * Give the device 3ms before sending the second FIS.
786 	 *
787 	 * It is unclear which other fields in the FIS are used.  Just zero
788 	 * everything.
789 	 */
790 	bzero(fis, sizeof(ccb->ccb_cmd_table->cfis));
791 	fis[0] = ATA_FIS_TYPE_H2D;
792 	fis[1] = at->at_target;
793 	fis[15] = ATA_FIS_CONTROL_4BIT;
794 
795 	cmd_slot->prdtl = 0;
796 	cmd_slot->flags = htole16(5);	/* FIS length: 5 DWORDS */
797 	cmd_slot->flags |= htole16(at->at_target <<
798 				   AHCI_CMD_LIST_FLAG_PMP_SHIFT);
799 
800 	ccb->ccb_xa.state = ATA_S_PENDING;
801 	ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE;
802 
803 	ap->ap_flags &= ~AP_F_IFS_IGNORED;
804 
805 	if (ahci_poll(ccb, 1000, ahci_ata_cmd_timeout) != ATA_S_COMPLETE) {
806 		kprintf("%s: Soft-reset(2) through PM failed, %s\n",
807 			ATANAME(ap, at),
808 			(count > 1 ? "retrying" : "giving up"));
809 		if (--count) {
810 			ahci_os_sleep(1000);
811 			ahci_put_err_ccb(ccb);
812 			ahci_pwrite(ap, AHCI_PREG_SERR, -1);
813 			ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
814 			goto retry;
815 		}
816 		goto err;
817 	}
818 
819 	ahci_put_err_ccb(ccb);
820 	ahci_os_sleep(100);
821 	ahci_pwrite(ap, AHCI_PREG_SERR, -1);
822 	ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
823 
824 	ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
825 	if (ahci_pm_phy_status(ap, target, &data)) {
826 		kprintf("%s: (C)Cannot clear phy status\n",
827 			ATANAME(ap ,at));
828 	}
829 	ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
830 
831 	/*
832 	 * Do it again, even if we think we got a good result
833 	 */
834 	if (--count) {
835 		fis[15] = 0;
836 		goto retry;
837 	}
838 
839 	/*
840 	 * If the softreset is trying to clear a BSY condition after a
841 	 * normal portreset we assign the port type.
842 	 *
843 	 * If the softreset is being run first as part of the ccb error
844 	 * processing code then report if the device signature changed
845 	 * unexpectedly.
846 	 */
847 	if (at->at_type == ATA_PORT_T_NONE) {
848 		at->at_type = ahci_port_signature_detect(ap, at);
849 	} else {
850 		if (ahci_port_signature_detect(ap, at) != at->at_type) {
851 			kprintf("%s: device signature unexpectedly "
852 				"changed\n", ATANAME(ap, at));
853 			error = EBUSY; /* XXX */
854 		}
855 	}
856 	error = 0;
857 
858 	/*
859 	 * Who knows what kind of mess occured.  We have exclusive access
860 	 * to the port so try to clean up potential problems.
861 	 */
862 err:
863 	ahci_os_sleep(100);
864 
865 	/*
866 	 * Clear error status so we can detect removal.
867 	 */
868 	if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) {
869 		kprintf("%s: ahci_pm_softreset unable to clear SERR\n",
870 			ATANAME(ap, at));
871 	}
872 	ahci_pwrite(ap, AHCI_PREG_SERR, -1);
873 	ahci_pwrite(ap, AHCI_PREG_IS, AHCI_PREG_IS_IFS);
874 	ap->ap_flags &= ~(AP_F_IGNORE_IFS | AP_F_IFS_IGNORED);
875 
876 	at->at_probe = error ? ATA_PROBE_FAILED : ATA_PROBE_NEED_IDENT;
877 	return (error);
878 }
879 
880 
881 /*
882  * Return the phy status for a target behind a port multiplier and
883  * reset SATA_PMREG_SERR.
884  *
885  * Returned bits follow AHCI_PREG_SSTS bits.  The AHCI_PREG_SSTS_SPD
886  * bits can be used to determine the link speed and will be 0 if there
887  * is no link.
888  *
889  * 0 is returned if any communications error occurs.
890  */
891 int
892 ahci_pm_phy_status(struct ahci_port *ap, int target, u_int32_t *datap)
893 {
894 	int error;
895 
896 	error = ahci_pm_read(ap, target, SATA_PMREG_SSTS, datap);
897 	if (error == 0)
898 		error = ahci_pm_write(ap, target, SATA_PMREG_SERR, -1);
899 	if (error)
900 		*datap = 0;
901 	return(error);
902 }
903 
904 /*
905  * Check that a target is still good.
906  */
907 void
908 ahci_pm_check_good(struct ahci_port *ap, int target)
909 {
910 	struct ata_port *at;
911 	u_int32_t data;
912 
913 	/*
914 	 * It looks like we might have to read the EINFO register
915 	 * to allow the PM to generate a new event.
916 	 */
917 	if (ahci_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) {
918 		kprintf("%s: Port multiplier EINFO could not be read\n",
919 			PORTNAME(ap));
920 	}
921 
922 	if (ahci_pm_write(ap, target, SATA_PMREG_SERR, -1)) {
923 		kprintf("%s: Port multiplier: SERR could not be cleared\n",
924 			PORTNAME(ap));
925 	}
926 
927 	if (target == CAM_TARGET_WILDCARD || target >= ap->ap_pmcount)
928 		return;
929 	at = ap->ap_ata[target];
930 
931 	/*
932 	 * If the device needs an init or hard reset also make sure the
933 	 * PHY is turned on.
934 	 */
935 	if (at->at_probe <= ATA_PROBE_NEED_HARD_RESET) {
936 		/*kprintf("%s DOHARD\n", ATANAME(ap, at));*/
937 		ahci_pm_hardreset(ap, target, 1);
938 	}
939 
940 	/*
941 	 * Read the detect status
942 	 */
943 	if (ahci_pm_read(ap, target, SATA_PMREG_SSTS, &data)) {
944 		kprintf("%s: Unable to access PM SSTS register target %d\n",
945 			PORTNAME(ap), target);
946 		return;
947 	}
948 	if ((data & AHCI_PREG_SSTS_DET) != AHCI_PREG_SSTS_DET_DEV) {
949 		/*kprintf("%s: DETECT %08x\n", ATANAME(ap, at), data);*/
950 		if (at->at_probe != ATA_PROBE_FAILED) {
951 			at->at_probe = ATA_PROBE_FAILED;
952 			at->at_type = ATA_PORT_T_NONE;
953 			at->at_features |= ATA_PORT_F_RESCAN;
954 			kprintf("%s: HOTPLUG (PM) - Device removed\n",
955 				ATANAME(ap, at));
956 		}
957 	} else {
958 		if (at->at_probe == ATA_PROBE_FAILED) {
959 			at->at_probe = ATA_PROBE_NEED_HARD_RESET;
960 			at->at_features |= ATA_PORT_F_RESCAN;
961 			kprintf("%s: HOTPLUG (PM) - Device inserted\n",
962 				ATANAME(ap, at));
963 		}
964 	}
965 }
966 
967 /*
968  * Read a PM register
969  */
970 int
971 ahci_pm_read(struct ahci_port *ap, int target, int which, u_int32_t *datap)
972 {
973 	struct ata_xfer	*xa;
974 	int error;
975 
976 	xa = ahci_ata_get_xfer(ap, ap->ap_ata[15]);
977 
978 	xa->fis->type = ATA_FIS_TYPE_H2D;
979 	xa->fis->flags = ATA_H2D_FLAGS_CMD | 15;
980 	xa->fis->command = ATA_C_READ_PM;
981 	xa->fis->features = which;
982 	xa->fis->device = target | ATA_H2D_DEVICE_LBA;
983 	xa->fis->control = ATA_FIS_CONTROL_4BIT;
984 
985 	xa->complete = ahci_pm_dummy_done;
986 	xa->datalen = 0;
987 	xa->flags = ATA_F_POLL | ATA_F_AUTOSENSE;
988 	xa->timeout = 1000;
989 
990 	if (ahci_ata_cmd(xa) == ATA_S_COMPLETE) {
991 		*datap = xa->rfis.sector_count | (xa->rfis.lba_low << 8) |
992 		       (xa->rfis.lba_mid << 16) | (xa->rfis.lba_high << 24);
993 		error = 0;
994 	} else {
995 		kprintf("%s.%d pm_read SCA[%d] failed\n",
996 			PORTNAME(ap), target, which);
997 		*datap = 0;
998 		error = EIO;
999 	}
1000 	ahci_ata_put_xfer(xa);
1001 	return (error);
1002 }
1003 
1004 /*
1005  * Write a PM register
1006  */
1007 int
1008 ahci_pm_write(struct ahci_port *ap, int target, int which, u_int32_t data)
1009 {
1010 	struct ata_xfer	*xa;
1011 	int error;
1012 
1013 	xa = ahci_ata_get_xfer(ap, ap->ap_ata[15]);
1014 
1015 	xa->fis->type = ATA_FIS_TYPE_H2D;
1016 	xa->fis->flags = ATA_H2D_FLAGS_CMD | 15;
1017 	xa->fis->command = ATA_C_WRITE_PM;
1018 	xa->fis->features = which;
1019 	xa->fis->device = target | ATA_H2D_DEVICE_LBA;
1020 	xa->fis->sector_count = (u_int8_t)data;
1021 	xa->fis->lba_low = (u_int8_t)(data >> 8);
1022 	xa->fis->lba_mid = (u_int8_t)(data >> 16);
1023 	xa->fis->lba_high = (u_int8_t)(data >> 24);
1024 	xa->fis->control = ATA_FIS_CONTROL_4BIT;
1025 
1026 	xa->complete = ahci_pm_dummy_done;
1027 	xa->datalen = 0;
1028 	xa->flags = ATA_F_POLL;
1029 	xa->timeout = 1000;
1030 
1031 	if (ahci_ata_cmd(xa) == ATA_S_COMPLETE)
1032 		error = 0;
1033 	else
1034 		error = EIO;
1035 	ahci_ata_put_xfer(xa);
1036 	return(error);
1037 }
1038 
1039 /*
1040  * Dummy done callback for xa.
1041  */
1042 static void
1043 ahci_pm_dummy_done(struct ata_xfer *xa)
1044 {
1045 }
1046 
1047