xref: /dragonfly/sys/dev/disk/mpt/mpt_pci.c (revision 52f9f0d9)
1 /*-
2  * PCI specific probe and attach routines for LSI Fusion Adapters
3  * FreeBSD Version.
4  *
5  * Copyright (c) 2000, 2001 by Greg Ansley
6  * Partially derived from Matt Jacob's ISP driver.
7  * Copyright (c) 1997, 1998, 1999, 2000, 2001, 2002 by Matthew Jacob
8  * Feral Software
9  * All rights reserved.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice immediately at the beginning of the file, without modification,
16  *    this list of conditions, and the following disclaimer.
17  * 2. The name of the author may not be used to endorse or promote products
18  *    derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
24  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30  * SUCH DAMAGE.
31  */
32 /*-
33  * Copyright (c) 2002, 2006 by Matthew Jacob
34  * All rights reserved.
35  *
36  * Redistribution and use in source and binary forms, with or without
37  * modification, are permitted provided that the following conditions are
38  * met:
39  * 1. Redistributions of source code must retain the above copyright
40  *    notice, this list of conditions and the following disclaimer.
41  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
42  *    substantially similar to the "NO WARRANTY" disclaimer below
43  *    ("Disclaimer") and any redistribution must be conditioned upon including
44  *    a substantially similar Disclaimer requirement for further binary
45  *    redistribution.
46  * 3. Neither the names of the above listed copyright holders nor the names
47  *    of any contributors may be used to endorse or promote products derived
48  *    from this software without specific prior written permission.
49  *
50  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
51  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
52  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
53  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
54  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
55  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
56  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
57  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
58  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
59  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
60  * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
61  *
62  * Support from Chris Ellsworth in order to make SAS adapters work
63  * is gratefully acknowledged.
64  *
65  * Support from LSI-Logic has also gone a great deal toward making this a
66  * workable subsystem and is gratefully acknowledged.
67  */
68 /*
69  * Copyright (c) 2004, Avid Technology, Inc. and its contributors.
70  * Copyright (c) 2005, WHEEL Sp. z o.o.
71  * Copyright (c) 2004, 2005 Justin T. Gibbs
72  * All rights reserved.
73  *
74  * Redistribution and use in source and binary forms, with or without
75  * modification, are permitted provided that the following conditions are
76  * met:
77  * 1. Redistributions of source code must retain the above copyright
78  *    notice, this list of conditions and the following disclaimer.
79  * 2. Redistributions in binary form must reproduce at minimum a disclaimer
80  *    substantially similar to the "NO WARRANTY" disclaimer below
81  *    ("Disclaimer") and any redistribution must be conditioned upon including
82  *    a substantially similar Disclaimer requirement for further binary
83  *    redistribution.
84  * 3. Neither the names of the above listed copyright holders nor the names
85  *    of any contributors may be used to endorse or promote products derived
86  *    from this software without specific prior written permission.
87  *
88  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
89  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
90  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
91  * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
92  * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
93  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
94  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
95  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
96  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
97  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF THE COPYRIGHT
98  * OWNER OR CONTRIBUTOR IS ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
99  *
100  * $FreeBSD: src/sys/dev/mpt/mpt_pci.c,v 1.70 2012/04/04 20:42:45 marius Exp $
101  */
102 
103 #include <dev/disk/mpt/mpt.h>
104 #include <dev/disk/mpt/mpt_cam.h>
105 #include <dev/disk/mpt/mpt_raid.h>
106 
107 /*
108  * XXX it seems no other MPT driver knows about the following chips.
109  */
110 
111 #ifndef	MPI_MANUFACTPAGE_DEVICEID_FC909_FB
112 #define	MPI_MANUFACTPAGE_DEVICEID_FC909_FB	0x0620
113 #endif
114 
115 #ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB
116 #define	MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB	0x0625
117 #endif
118 
119 #ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB
120 #define	MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB	0x0623
121 #endif
122 
123 #ifndef	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB
124 #define	MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB	0x0627
125 #endif
126 
127 #ifndef	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB
128 #define	MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB	0x0629
129 #endif
130 
131 #ifndef MPI_MANUFACTPAGE_DEVID_SAS1068A_FB
132 #define MPI_MANUFACTPAGE_DEVID_SAS1068A_FB	0x0055
133 #endif
134 
135 #ifndef	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB
136 #define	MPI_MANUFACTPAGE_DEVID_SAS1068E_FB	0x0059
137 #endif
138 
139 #ifndef	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB
140 #define	MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB	0x007C
141 #endif
142 
143 #ifndef	PCIM_CMD_SERRESPEN
144 #define	PCIM_CMD_SERRESPEN	0x0100
145 #endif
146 
147 static int mpt_pci_probe(device_t);
148 static int mpt_pci_attach(device_t);
149 static void mpt_free_bus_resources(struct mpt_softc *mpt);
150 static int mpt_pci_detach(device_t);
151 static int mpt_pci_shutdown(device_t);
152 static int mpt_dma_mem_alloc(struct mpt_softc *mpt);
153 static void mpt_dma_mem_free(struct mpt_softc *mpt);
154 #if 0
155 static void mpt_read_config_regs(struct mpt_softc *mpt);
156 static void mpt_set_config_regs(struct mpt_softc *mpt);
157 #endif
158 static void mpt_pci_intr(void *);
159 
160 static device_method_t mpt_methods[] = {
161 	/* Device interface */
162 	DEVMETHOD(device_probe,		mpt_pci_probe),
163 	DEVMETHOD(device_attach,	mpt_pci_attach),
164 	DEVMETHOD(device_detach,	mpt_pci_detach),
165 	DEVMETHOD(device_shutdown,	mpt_pci_shutdown),
166 	{ 0, 0 }
167 };
168 
169 static driver_t mpt_driver = {
170 	"mpt", mpt_methods, sizeof(struct mpt_softc)
171 };
172 static devclass_t mpt_devclass;
173 DRIVER_MODULE(mpt, pci, mpt_driver, mpt_devclass, NULL, NULL);
174 MODULE_DEPEND(mpt, pci, 1, 1, 1);
175 MODULE_VERSION(mpt, 1);
176 
177 static int
178 mpt_pci_probe(device_t dev)
179 {
180 	const char *desc;
181 	int rval;
182 
183 	if (pci_get_vendor(dev) != MPI_MANUFACTPAGE_VENDORID_LSILOGIC)
184 		return (ENXIO);
185 
186 	rval = BUS_PROBE_DEFAULT;
187 	switch (pci_get_device(dev)) {
188 	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
189 		desc = "LSILogic FC909 FC Adapter";
190 		break;
191 	case MPI_MANUFACTPAGE_DEVICEID_FC909:
192 		desc = "LSILogic FC909A FC Adapter";
193 		break;
194 	case MPI_MANUFACTPAGE_DEVICEID_FC919:
195 		desc = "LSILogic FC919 FC Adapter";
196 		break;
197 	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
198 		desc = "LSILogic FC919 LAN Adapter";
199 		break;
200 	case MPI_MANUFACTPAGE_DEVICEID_FC929:
201 		desc = "Dual LSILogic FC929 FC Adapter";
202 		break;
203 	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
204 		desc = "Dual LSILogic FC929 LAN Adapter";
205 		break;
206 	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
207 		desc = "LSILogic FC919 FC PCI-X Adapter";
208 		break;
209 	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
210 		desc = "LSILogic FC919 LAN PCI-X Adapter";
211 		break;
212 	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
213 		desc = "Dual LSILogic FC929X 2Gb/s FC PCI-X Adapter";
214 		break;
215 	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
216 		desc = "Dual LSILogic FC929X LAN PCI-X Adapter";
217 		break;
218 	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
219 		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-Express Adapter";
220 		break;
221 	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
222 		desc = "Dual LSILogic FC7X04X 4Gb/s FC PCI-X Adapter";
223 		break;
224 	case MPI_MANUFACTPAGE_DEVID_53C1030:
225 	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
226 		desc = "LSILogic 1030 Ultra4 Adapter";
227 		break;
228 	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
229 		/*
230 		 * Allow mfi(4) to claim this device in case it's in MegaRAID
231 		 * mode.
232 		 */
233 		rval = BUS_PROBE_LOW_PRIORITY;
234 		/* FALLTHROUGH */
235 	case MPI_MANUFACTPAGE_DEVID_SAS1064:
236 	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
237 	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
238 	case MPI_MANUFACTPAGE_DEVID_SAS1066:
239 	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
240 	case MPI_MANUFACTPAGE_DEVID_SAS1068:
241 	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
242 	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
243 	case MPI_MANUFACTPAGE_DEVID_SAS1078:
244 	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
245 		desc = "LSILogic SAS/SATA Adapter";
246 		break;
247 	default:
248 		return (ENXIO);
249 	}
250 
251 	device_set_desc(dev, desc);
252 	return (rval);
253 }
254 
255 static void
256 mpt_set_options(struct mpt_softc *mpt)
257 {
258 	int bitmap;
259 
260 	bitmap = 0;
261 	if (kgetenv_int("mpt_disable", &bitmap)) {
262 		if (bitmap & (1 << mpt->unit)) {
263 			mpt->disabled = 1;
264 		}
265 	}
266 	bitmap = 0;
267 	if (kgetenv_int("mpt_debug", &bitmap)) {
268 		if (bitmap & (1 << mpt->unit)) {
269 			mpt->verbose = MPT_PRT_DEBUG;
270 		}
271 	}
272 	bitmap = 0;
273 	if (kgetenv_int("mpt_debug1", &bitmap)) {
274 		if (bitmap & (1 << mpt->unit)) {
275 			mpt->verbose = MPT_PRT_DEBUG1;
276 		}
277 	}
278 	bitmap = 0;
279 	if (kgetenv_int("mpt_debug2", &bitmap)) {
280 		if (bitmap & (1 << mpt->unit)) {
281 			mpt->verbose = MPT_PRT_DEBUG2;
282 		}
283 	}
284 	bitmap = 0;
285 	if (kgetenv_int("mpt_debug3", &bitmap)) {
286 		if (bitmap & (1 << mpt->unit)) {
287 			mpt->verbose = MPT_PRT_DEBUG3;
288 		}
289 	}
290 
291 	mpt->cfg_role = MPT_ROLE_DEFAULT;
292 	bitmap = 0;
293 	if (kgetenv_int("mpt_nil_role", &bitmap)) {
294 		if (bitmap & (1 << mpt->unit)) {
295 			mpt->cfg_role = 0;
296 		}
297 		mpt->do_cfg_role = 1;
298 	}
299 	bitmap = 0;
300 	if (kgetenv_int("mpt_tgt_role", &bitmap)) {
301 		if (bitmap & (1 << mpt->unit)) {
302 			mpt->cfg_role |= MPT_ROLE_TARGET;
303 		}
304 		mpt->do_cfg_role = 1;
305 	}
306 	bitmap = 0;
307 	if (kgetenv_int("mpt_ini_role", &bitmap)) {
308 		if (bitmap & (1 << mpt->unit)) {
309 			mpt->cfg_role |= MPT_ROLE_INITIATOR;
310 		}
311 		mpt->do_cfg_role = 1;
312 	}
313 	mpt->msi_enable = 0;
314 }
315 
316 static void
317 mpt_link_peer(struct mpt_softc *mpt)
318 {
319 	struct mpt_softc *mpt2;
320 
321 	if (mpt->unit == 0) {
322 		return;
323 	}
324 	/*
325 	 * XXX: depends on probe order
326 	 */
327 	mpt2 = (struct mpt_softc *)devclass_get_softc(mpt_devclass,mpt->unit-1);
328 
329 	if (mpt2 == NULL) {
330 		return;
331 	}
332 	if (pci_get_vendor(mpt2->dev) != pci_get_vendor(mpt->dev)) {
333 		return;
334 	}
335 	if (pci_get_device(mpt2->dev) != pci_get_device(mpt->dev)) {
336 		return;
337 	}
338 	mpt->mpt2 = mpt2;
339 	mpt2->mpt2 = mpt;
340 	if (mpt->verbose >= MPT_PRT_DEBUG) {
341 		mpt_prt(mpt, "linking with peer (mpt%d)\n",
342 		    device_get_unit(mpt2->dev));
343 	}
344 }
345 
346 static void
347 mpt_unlink_peer(struct mpt_softc *mpt)
348 {
349 
350 	if (mpt->mpt2) {
351 		mpt->mpt2->mpt2 = NULL;
352 	}
353 }
354 
355 static int
356 mpt_pci_attach(device_t dev)
357 {
358 	struct mpt_softc *mpt;
359 	int		  iqd;
360 	uint32_t	  data, cmd;
361 	int		  mpt_io_bar, mpt_mem_bar;
362 
363 	mpt  = (struct mpt_softc*)device_get_softc(dev);
364 
365 	switch (pci_get_device(dev)) {
366 	case MPI_MANUFACTPAGE_DEVICEID_FC909_FB:
367 	case MPI_MANUFACTPAGE_DEVICEID_FC909:
368 	case MPI_MANUFACTPAGE_DEVICEID_FC919:
369 	case MPI_MANUFACTPAGE_DEVICEID_FC919_LAN_FB:
370 	case MPI_MANUFACTPAGE_DEVICEID_FC929:
371 	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
372 	case MPI_MANUFACTPAGE_DEVICEID_FC929X:
373 	case MPI_MANUFACTPAGE_DEVICEID_FC929X_LAN_FB:
374 	case MPI_MANUFACTPAGE_DEVICEID_FC919X:
375 	case MPI_MANUFACTPAGE_DEVICEID_FC919X_LAN_FB:
376 	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
377 	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
378 		mpt->is_fc = 1;
379 		break;
380 	case MPI_MANUFACTPAGE_DEVID_SAS1078:
381 	case MPI_MANUFACTPAGE_DEVID_SAS1078DE_FB:
382 		mpt->is_1078 = 1;
383 		/* FALLTHROUGH */
384 	case MPI_MANUFACTPAGE_DEVID_SAS1064:
385 	case MPI_MANUFACTPAGE_DEVID_SAS1064A:
386 	case MPI_MANUFACTPAGE_DEVID_SAS1064E:
387 	case MPI_MANUFACTPAGE_DEVID_SAS1066:
388 	case MPI_MANUFACTPAGE_DEVID_SAS1066E:
389 	case MPI_MANUFACTPAGE_DEVID_SAS1068:
390 	case MPI_MANUFACTPAGE_DEVID_SAS1068A_FB:
391 	case MPI_MANUFACTPAGE_DEVID_SAS1068E:
392 	case MPI_MANUFACTPAGE_DEVID_SAS1068E_FB:
393 		mpt->is_sas = 1;
394 		break;
395 	default:
396 		mpt->is_spi = 1;
397 		break;
398 	}
399 	mpt->dev = dev;
400 	mpt->unit = device_get_unit(dev);
401 	mpt->raid_resync_rate = MPT_RAID_RESYNC_RATE_DEFAULT;
402 	mpt->raid_mwce_setting = MPT_RAID_MWCE_DEFAULT;
403 	mpt->raid_queue_depth = MPT_RAID_QUEUE_DEPTH_DEFAULT;
404 	mpt->verbose = MPT_PRT_NONE;
405 	mpt->role = MPT_ROLE_NONE;
406 	mpt->mpt_ini_id = MPT_INI_ID_NONE;
407 	mpt_set_options(mpt);
408 	if (mpt->verbose == MPT_PRT_NONE) {
409 		mpt->verbose = MPT_PRT_WARN;
410 		/* Print INFO level (if any) if bootverbose is set */
411 		mpt->verbose += (bootverbose != 0)? 1 : 0;
412 	}
413 	/* Make sure memory access decoders are enabled */
414 	cmd = pci_read_config(dev, PCIR_COMMAND, 2);
415 	if ((cmd & PCIM_CMD_MEMEN) == 0) {
416 		device_printf(dev, "Memory accesses disabled");
417 		return (ENXIO);
418 	}
419 
420 	/*
421 	 * Make sure that SERR, PERR, WRITE INVALIDATE and BUSMASTER are set.
422 	 */
423 	cmd |=
424 	    PCIM_CMD_SERRESPEN | PCIM_CMD_PERRESPEN |
425 	    PCIM_CMD_BUSMASTEREN | PCIM_CMD_MWRICEN;
426 	pci_write_config(dev, PCIR_COMMAND, cmd, 2);
427 
428 	/*
429 	 * Make sure we've disabled the ROM.
430 	 */
431 	data = pci_read_config(dev, PCIR_BIOS, 4);
432 	data &= ~PCIM_BIOS_ENABLE;
433 	pci_write_config(dev, PCIR_BIOS, data, 4);
434 
435 	/*
436 	 * Is this part a dual?
437 	 * If so, link with our partner (around yet)
438 	 */
439 	switch (pci_get_device(dev)) {
440 	case MPI_MANUFACTPAGE_DEVICEID_FC929:
441 	case MPI_MANUFACTPAGE_DEVICEID_FC929_LAN_FB:
442 	case MPI_MANUFACTPAGE_DEVICEID_FC949E:
443 	case MPI_MANUFACTPAGE_DEVICEID_FC949X:
444 	case MPI_MANUFACTPAGE_DEVID_53C1030:
445 	case MPI_MANUFACTPAGE_DEVID_53C1030ZC:
446 		mpt_link_peer(mpt);
447 		break;
448 	default:
449 		break;
450 	}
451 
452 	/*
453 	 * Figure out which are the I/O and MEM Bars
454 	 */
455 	data = pci_read_config(dev, PCIR_BAR(0), 4);
456 	if (PCI_BAR_IO(data)) {
457 		/* BAR0 is IO, BAR1 is memory */
458 		mpt_io_bar = 0;
459 		mpt_mem_bar = 1;
460 	} else {
461 		/* BAR0 is memory, BAR1 is IO */
462 		mpt_mem_bar = 0;
463 		mpt_io_bar = 1;
464 	}
465 
466 	/*
467 	 * Set up register access.  PIO mode is required for
468 	 * certain reset operations (but must be disabled for
469 	 * some cards otherwise).
470 	 */
471 	mpt_io_bar = PCIR_BAR(mpt_io_bar);
472 	mpt->pci_pio_reg = bus_alloc_resource_any(dev, SYS_RES_IOPORT,
473 	    &mpt_io_bar, RF_ACTIVE);
474 	if (mpt->pci_pio_reg == NULL) {
475 		if (bootverbose) {
476 			device_printf(dev,
477 			    "unable to map registers in PIO mode\n");
478 		}
479 	} else {
480 		mpt->pci_pio_st = rman_get_bustag(mpt->pci_pio_reg);
481 		mpt->pci_pio_sh = rman_get_bushandle(mpt->pci_pio_reg);
482 	}
483 
484 	mpt_mem_bar = PCIR_BAR(mpt_mem_bar);
485 	mpt->pci_reg = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
486 	    &mpt_mem_bar, RF_ACTIVE);
487 	if (mpt->pci_reg == NULL) {
488 		if (bootverbose || mpt->is_sas || mpt->pci_pio_reg == NULL) {
489 			device_printf(dev,
490 			    "Unable to memory map registers.\n");
491 		}
492 		if (mpt->is_sas || mpt->pci_pio_reg == NULL) {
493 			device_printf(dev, "Giving Up.\n");
494 			goto bad;
495 		}
496 		if (bootverbose) {
497 			device_printf(dev, "Falling back to PIO mode.\n");
498 		}
499 		mpt->pci_st = mpt->pci_pio_st;
500 		mpt->pci_sh = mpt->pci_pio_sh;
501 	} else {
502 		mpt->pci_st = rman_get_bustag(mpt->pci_reg);
503 		mpt->pci_sh = rman_get_bushandle(mpt->pci_reg);
504 	}
505 
506 	/* Get a handle to the interrupt */
507 	iqd = 0;
508 #ifdef OLD_MSI
509 	if (mpt->msi_enable) {
510 		/*
511 		 * First try to alloc an MSI-X message.  If that
512 		 * fails, then try to alloc an MSI message instead.
513 		 */
514 		if (pci_msix_count(dev) == 1) {
515 			mpt->pci_msi_count = 1;
516 			if (pci_alloc_msix(dev, &mpt->pci_msi_count) == 0) {
517 				iqd = 1;
518 			} else {
519 				mpt->pci_msi_count = 0;
520 			}
521 		}
522 		if (iqd == 0 && pci_msi_count(dev) == 1) {
523 			mpt->pci_msi_count = 1;
524 			if (pci_alloc_msi(dev, &mpt->pci_msi_count) == 0) {
525 				iqd = 1;
526 			} else {
527 				mpt->pci_msi_count = 0;
528 			}
529 		}
530 	}
531 #endif
532 	mpt->pci_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &iqd,
533 	    RF_ACTIVE | (mpt->pci_msi_count ? 0 : RF_SHAREABLE));
534 	if (mpt->pci_irq == NULL) {
535 		device_printf(dev, "could not allocate interrupt\n");
536 		goto bad;
537 	}
538 
539 	MPT_LOCK_SETUP(mpt);
540 
541 	/* Disable interrupts at the part */
542 	mpt_disable_ints(mpt);
543 
544 	/* Register the interrupt handler */
545 	if (mpt_setup_intr(dev, mpt->pci_irq, MPT_IFLAGS, NULL, mpt_pci_intr,
546 	    mpt, &mpt->ih)) {
547 		device_printf(dev, "could not setup interrupt\n");
548 		goto bad;
549 	}
550 
551 	/* Allocate dma memory */
552 	if (mpt_dma_mem_alloc(mpt)) {
553 		mpt_prt(mpt, "Could not allocate DMA memory\n");
554 		goto bad;
555 	}
556 
557 #if 0
558 	/*
559 	 * Save the PCI config register values
560  	 *
561 	 * Hard resets are known to screw up the BAR for diagnostic
562 	 * memory accesses (Mem1).
563 	 *
564 	 * Using Mem1 is known to make the chip stop responding to
565 	 * configuration space transfers, so we need to save it now
566 	 */
567 
568 	mpt_read_config_regs(mpt);
569 #endif
570 
571 	/*
572 	 * Disable PIO until we need it
573 	 */
574 	if (mpt->is_sas) {
575 		pci_disable_io(dev, SYS_RES_IOPORT);
576 	}
577 
578 	/* Initialize the hardware */
579 	if (mpt->disabled == 0) {
580 		if (mpt_attach(mpt) != 0) {
581 			goto bad;
582 		}
583 	} else {
584 		mpt_prt(mpt, "device disabled at user request\n");
585 		goto bad;
586 	}
587 
588 	mpt->eh = EVENTHANDLER_REGISTER(shutdown_post_sync, mpt_pci_shutdown,
589 	    dev, SHUTDOWN_PRI_DEFAULT);
590 
591 	if (mpt->eh == NULL) {
592 		mpt_prt(mpt, "shutdown event registration failed\n");
593 		(void) mpt_detach(mpt);
594 		goto bad;
595 	}
596 	return (0);
597 
598 bad:
599 	mpt_dma_mem_free(mpt);
600 	mpt_free_bus_resources(mpt);
601 	mpt_unlink_peer(mpt);
602 
603 	MPT_LOCK_DESTROY(mpt);
604 
605 	/*
606 	 * but return zero to preserve unit numbering
607 	 */
608 	return (0);
609 }
610 
611 /*
612  * Free bus resources
613  */
614 static void
615 mpt_free_bus_resources(struct mpt_softc *mpt)
616 {
617 
618 	if (mpt->ih) {
619 		bus_teardown_intr(mpt->dev, mpt->pci_irq, mpt->ih);
620 		mpt->ih = NULL;
621 	}
622 
623 	if (mpt->pci_irq) {
624 		bus_release_resource(mpt->dev, SYS_RES_IRQ,
625 		    rman_get_rid(mpt->pci_irq), mpt->pci_irq);
626 		mpt->pci_irq = NULL;
627 	}
628 
629 	if (mpt->pci_msi_count) {
630 		pci_release_msi(mpt->dev);
631 		mpt->pci_msi_count = 0;
632 	}
633 
634 	if (mpt->pci_pio_reg) {
635 		bus_release_resource(mpt->dev, SYS_RES_IOPORT,
636 		    rman_get_rid(mpt->pci_pio_reg), mpt->pci_pio_reg);
637 		mpt->pci_pio_reg = NULL;
638 	}
639 	if (mpt->pci_reg) {
640 		bus_release_resource(mpt->dev, SYS_RES_MEMORY,
641 		    rman_get_rid(mpt->pci_reg), mpt->pci_reg);
642 		mpt->pci_reg = NULL;
643 	}
644 	MPT_LOCK_DESTROY(mpt);
645 }
646 
647 /*
648  * Disconnect ourselves from the system.
649  */
650 static int
651 mpt_pci_detach(device_t dev)
652 {
653 	struct mpt_softc *mpt;
654 
655 	mpt  = (struct mpt_softc*)device_get_softc(dev);
656 
657 	if (mpt) {
658 		mpt_disable_ints(mpt);
659 		mpt_detach(mpt);
660 		mpt_reset(mpt, /*reinit*/FALSE);
661 		mpt_dma_mem_free(mpt);
662 		mpt_free_bus_resources(mpt);
663 		mpt_raid_free_mem(mpt);
664 		if (mpt->eh != NULL) {
665                         EVENTHANDLER_DEREGISTER(shutdown_post_sync, mpt->eh);
666 		}
667 	}
668 	return(0);
669 }
670 
671 /*
672  * Disable the hardware
673  */
674 static int
675 mpt_pci_shutdown(device_t dev)
676 {
677 	struct mpt_softc *mpt;
678 
679 	mpt = (struct mpt_softc *)device_get_softc(dev);
680 	if (mpt) {
681 		int r;
682 		r = mpt_shutdown(mpt);
683 		return (r);
684 	}
685 	return(0);
686 }
687 
688 static int
689 mpt_dma_mem_alloc(struct mpt_softc *mpt)
690 {
691 	size_t len;
692 	struct mpt_map_info mi;
693 
694 	/* Check if we alreay have allocated the reply memory */
695 	if (mpt->reply_phys != 0) {
696 		return 0;
697 	}
698 
699 	len = sizeof (request_t) * MPT_MAX_REQUESTS(mpt);
700 	mpt->request_pool = (request_t *)kmalloc(len, M_DEVBUF, M_WAITOK|M_ZERO);
701 	if (mpt->request_pool == NULL) {
702 		mpt_prt(mpt, "cannot allocate request pool\n");
703 		return (1);
704 	}
705 
706 	/*
707 	 * Create a parent dma tag for this device.
708 	 *
709 	 * Align at byte boundaries,
710 	 * Limit to 32-bit addressing for request/reply queues.
711 	 */
712 	if (mpt_dma_tag_create(mpt, /*parent*/NULL,
713 	    /*alignment*/1, /*boundary*/0, /*lowaddr*/BUS_SPACE_MAXADDR,
714 	    /*highaddr*/BUS_SPACE_MAXADDR, /*filter*/NULL, /*filterarg*/NULL,
715 	    /*maxsize*/BUS_SPACE_MAXSIZE_32BIT,
716 	    /*nsegments*/BUS_SPACE_UNRESTRICTED,
717 	    /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
718 	    &mpt->parent_dmat) != 0) {
719 		mpt_prt(mpt, "cannot create parent dma tag\n");
720 		return (1);
721 	}
722 
723 	/* Create a child tag for reply buffers */
724 	if (mpt_dma_tag_create(mpt, mpt->parent_dmat, PAGE_SIZE, 0,
725 	    BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
726 	    NULL, NULL, 2 * PAGE_SIZE, 1, BUS_SPACE_MAXSIZE_32BIT, 0,
727 	    &mpt->reply_dmat) != 0) {
728 		mpt_prt(mpt, "cannot create a dma tag for replies\n");
729 		return (1);
730 	}
731 
732 	/* Allocate some DMA accessible memory for replies */
733 	if (bus_dmamem_alloc(mpt->reply_dmat, (void **)&mpt->reply,
734 	    BUS_DMA_NOWAIT, &mpt->reply_dmap) != 0) {
735 		mpt_prt(mpt, "cannot allocate %lu bytes of reply memory\n",
736 		    (u_long) (2 * PAGE_SIZE));
737 		return (1);
738 	}
739 
740 	mi.mpt = mpt;
741 	mi.error = 0;
742 
743 	/* Load and lock it into "bus space" */
744 	bus_dmamap_load(mpt->reply_dmat, mpt->reply_dmap, mpt->reply,
745 	    2 * PAGE_SIZE, mpt_map_rquest, &mi, 0);
746 
747 	if (mi.error) {
748 		mpt_prt(mpt, "error %d loading dma map for DMA reply queue\n",
749 		    mi.error);
750 		return (1);
751 	}
752 	mpt->reply_phys = mi.phys;
753 
754 	return (0);
755 }
756 
757 /* Deallocate memory that was allocated by mpt_dma_mem_alloc
758  */
759 static void
760 mpt_dma_mem_free(struct mpt_softc *mpt)
761 {
762 
763         /* Make sure we aren't double destroying */
764         if (mpt->reply_dmat == 0) {
765 		mpt_lprt(mpt, MPT_PRT_DEBUG, "already released dma memory\n");
766 		return;
767         }
768 
769 	bus_dmamap_unload(mpt->reply_dmat, mpt->reply_dmap);
770 	bus_dmamem_free(mpt->reply_dmat, mpt->reply, mpt->reply_dmap);
771 	bus_dma_tag_destroy(mpt->reply_dmat);
772 	bus_dma_tag_destroy(mpt->parent_dmat);
773 	mpt->reply_dmat = NULL;
774 	kfree(mpt->request_pool, M_DEVBUF);
775 	mpt->request_pool = NULL;
776 }
777 
778 #if 0
779 /* Reads modifiable (via PCI transactions) config registers */
780 static void
781 mpt_read_config_regs(struct mpt_softc *mpt)
782 {
783 
784 	mpt->pci_cfg.Command = pci_read_config(mpt->dev, PCIR_COMMAND, 2);
785 	mpt->pci_cfg.LatencyTimer_LineSize =
786 	    pci_read_config(mpt->dev, PCIR_CACHELNSZ, 2);
787 	mpt->pci_cfg.IO_BAR = pci_read_config(mpt->dev, PCIR_BAR(0), 4);
788 	mpt->pci_cfg.Mem0_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(1), 4);
789 	mpt->pci_cfg.Mem0_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(2), 4);
790 	mpt->pci_cfg.Mem1_BAR[0] = pci_read_config(mpt->dev, PCIR_BAR(3), 4);
791 	mpt->pci_cfg.Mem1_BAR[1] = pci_read_config(mpt->dev, PCIR_BAR(4), 4);
792 	mpt->pci_cfg.ROM_BAR = pci_read_config(mpt->dev, PCIR_BIOS, 4);
793 	mpt->pci_cfg.IntLine = pci_read_config(mpt->dev, PCIR_INTLINE, 1);
794 	mpt->pci_cfg.PMCSR = pci_read_config(mpt->dev, 0x44, 4);
795 }
796 
797 /* Sets modifiable config registers */
798 static void
799 mpt_set_config_regs(struct mpt_softc *mpt)
800 {
801 	uint32_t val;
802 
803 #define MPT_CHECK(reg, offset, size)					\
804 	val = pci_read_config(mpt->dev, offset, size);			\
805 	if (mpt->pci_cfg.reg != val) {					\
806 		mpt_prt(mpt,						\
807 		    "Restoring " #reg " to 0x%X from 0x%X\n",		\
808 		    mpt->pci_cfg.reg, val);				\
809 	}
810 
811 	if (mpt->verbose >= MPT_PRT_DEBUG) {
812 		MPT_CHECK(Command, PCIR_COMMAND, 2);
813 		MPT_CHECK(LatencyTimer_LineSize, PCIR_CACHELNSZ, 2);
814 		MPT_CHECK(IO_BAR, PCIR_BAR(0), 4);
815 		MPT_CHECK(Mem0_BAR[0], PCIR_BAR(1), 4);
816 		MPT_CHECK(Mem0_BAR[1], PCIR_BAR(2), 4);
817 		MPT_CHECK(Mem1_BAR[0], PCIR_BAR(3), 4);
818 		MPT_CHECK(Mem1_BAR[1], PCIR_BAR(4), 4);
819 		MPT_CHECK(ROM_BAR, PCIR_BIOS, 4);
820 		MPT_CHECK(IntLine, PCIR_INTLINE, 1);
821 		MPT_CHECK(PMCSR, 0x44, 4);
822 	}
823 #undef MPT_CHECK
824 
825 	pci_write_config(mpt->dev, PCIR_COMMAND, mpt->pci_cfg.Command, 2);
826 	pci_write_config(mpt->dev, PCIR_CACHELNSZ,
827 	    mpt->pci_cfg.LatencyTimer_LineSize, 2);
828 	pci_write_config(mpt->dev, PCIR_BAR(0), mpt->pci_cfg.IO_BAR, 4);
829 	pci_write_config(mpt->dev, PCIR_BAR(1), mpt->pci_cfg.Mem0_BAR[0], 4);
830 	pci_write_config(mpt->dev, PCIR_BAR(2), mpt->pci_cfg.Mem0_BAR[1], 4);
831 	pci_write_config(mpt->dev, PCIR_BAR(3), mpt->pci_cfg.Mem1_BAR[0], 4);
832 	pci_write_config(mpt->dev, PCIR_BAR(4), mpt->pci_cfg.Mem1_BAR[1], 4);
833 	pci_write_config(mpt->dev, PCIR_BIOS, mpt->pci_cfg.ROM_BAR, 4);
834 	pci_write_config(mpt->dev, PCIR_INTLINE, mpt->pci_cfg.IntLine, 1);
835 	pci_write_config(mpt->dev, 0x44, mpt->pci_cfg.PMCSR, 4);
836 }
837 #endif
838 
839 static void
840 mpt_pci_intr(void *arg)
841 {
842 	struct mpt_softc *mpt;
843 
844 	mpt = (struct mpt_softc *)arg;
845 	MPT_LOCK(mpt);
846 	mpt_intr(mpt);
847 	MPT_UNLOCK(mpt);
848 }
849