1 /*- 2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ata/ata-dma.c,v 1.147 2007/04/08 21:53:52 sos Exp $ 27 */ 28 29 #include "opt_ata.h" 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/bus_dma.h> 34 #include <sys/endian.h> 35 #include <sys/malloc.h> 36 #include <sys/nata.h> 37 #include <sys/resourcevar.h> 38 39 #include <machine/bus_dma.h> 40 41 #include "ata-all.h" 42 #include "ata_if.h" 43 44 /* prototypes */ 45 static void ata_dmaalloc(device_t); 46 static void ata_dmafree(device_t); 47 static void ata_dmasetprd(void *, bus_dma_segment_t *, int, int); 48 static int ata_dmaload(device_t, caddr_t, int32_t, int, void *, int *); 49 static int ata_dmaunload(device_t); 50 51 /* local vars */ 52 static MALLOC_DEFINE(M_ATADMA, "ata_dma", "ATA driver DMA"); 53 54 /* misc defines */ 55 #define MAXTABSZ PAGE_SIZE 56 #define MAXWSPCSZ PAGE_SIZE*2 57 58 struct ata_dc_cb_args { 59 bus_addr_t maddr; 60 int error; 61 }; 62 63 void 64 ata_dmainit(device_t dev) 65 { 66 struct ata_channel *ch = device_get_softc(dev); 67 68 ch->dma = kmalloc(sizeof(struct ata_dma), M_ATADMA, M_INTWAIT|M_ZERO); 69 ch->dma->alloc = ata_dmaalloc; 70 ch->dma->free = ata_dmafree; 71 ch->dma->setprd = ata_dmasetprd; 72 ch->dma->load = ata_dmaload; 73 ch->dma->unload = ata_dmaunload; 74 ch->dma->alignment = 2; 75 ch->dma->boundary = 256 * 256; 76 ch->dma->segsize = 256 * 256; 77 ch->dma->max_iosize = 128 * DEV_BSIZE; 78 ch->dma->max_address = BUS_SPACE_MAXADDR_32BIT; 79 } 80 81 static void 82 ata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 83 { 84 struct ata_dc_cb_args *cba = (struct ata_dc_cb_args *)xsc; 85 86 if (!(cba->error = error)) 87 cba->maddr = segs[0].ds_addr; 88 } 89 90 static void 91 ata_dmaalloc(device_t dev) 92 { 93 struct ata_channel *ch = device_get_softc(dev); 94 struct ata_dc_cb_args ccba; 95 96 if (bus_dma_tag_create(NULL, ch->dma->alignment, 0, 97 ch->dma->max_address, BUS_SPACE_MAXADDR, 98 ch->dma->max_iosize, 99 ATA_DMA_ENTRIES, ch->dma->segsize, 100 0, &ch->dma->dmatag)) 101 goto error; 102 103 if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, PAGE_SIZE, 104 ch->dma->max_address, BUS_SPACE_MAXADDR, 105 MAXTABSZ, 1, MAXTABSZ, 106 0, &ch->dma->sg_tag)) 107 goto error; 108 109 if (bus_dma_tag_create(ch->dma->dmatag,ch->dma->alignment,ch->dma->boundary, 110 ch->dma->max_address, BUS_SPACE_MAXADDR, 111 ch->dma->max_iosize, 112 ATA_DMA_ENTRIES, ch->dma->segsize, 113 0, &ch->dma->data_tag)) 114 goto error; 115 116 if (bus_dmamem_alloc(ch->dma->sg_tag, (void **)&ch->dma->sg, 0, 117 &ch->dma->sg_map)) 118 goto error; 119 120 if (bus_dmamap_load(ch->dma->sg_tag, ch->dma->sg_map, ch->dma->sg, 121 MAXTABSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) { 122 bus_dmamem_free(ch->dma->sg_tag, ch->dma->sg, ch->dma->sg_map); 123 goto error; 124 } 125 ch->dma->sg_bus = ccba.maddr; 126 127 if (bus_dmamap_create(ch->dma->data_tag, 0, &ch->dma->data_map)) 128 goto error; 129 130 if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, 64 * 1024, 131 ch->dma->max_address, BUS_SPACE_MAXADDR, 132 MAXWSPCSZ, 1, MAXWSPCSZ, 133 0, &ch->dma->work_tag)) 134 goto error; 135 136 if (bus_dmamem_alloc(ch->dma->work_tag, (void *)&ch->dma->work, 0, 137 (void *)&ch->dma->work_map)) 138 goto error; 139 140 if (bus_dmamap_load(ch->dma->work_tag, ch->dma->work_map,ch->dma->work, 141 MAXWSPCSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) { 142 bus_dmamem_free(ch->dma->work_tag,ch->dma->work, ch->dma->work_map); 143 goto error; 144 } 145 ch->dma->work_bus = ccba.maddr; 146 147 return; 148 149 error: 150 device_printf(dev, "WARNING - DMA allocation failed, disabling DMA\n"); 151 ata_dmafree(dev); 152 kfree(ch->dma, M_ATADMA); 153 ch->dma = NULL; 154 } 155 156 static void 157 ata_dmafree(device_t dev) 158 { 159 struct ata_channel *ch = device_get_softc(dev); 160 161 if (ch->dma->work_bus) { 162 bus_dmamap_unload(ch->dma->work_tag, ch->dma->work_map); 163 bus_dmamem_free(ch->dma->work_tag, ch->dma->work, ch->dma->work_map); 164 ch->dma->work_bus = 0; 165 ch->dma->work_map = NULL; 166 ch->dma->work = NULL; 167 } 168 if (ch->dma->work_tag) { 169 bus_dma_tag_destroy(ch->dma->work_tag); 170 ch->dma->work_tag = NULL; 171 } 172 if (ch->dma->sg_bus) { 173 bus_dmamap_unload(ch->dma->sg_tag, ch->dma->sg_map); 174 bus_dmamem_free(ch->dma->sg_tag, ch->dma->sg, ch->dma->sg_map); 175 ch->dma->sg_bus = 0; 176 ch->dma->sg_map = NULL; 177 ch->dma->sg = NULL; 178 } 179 if (ch->dma->data_map) { 180 bus_dmamap_destroy(ch->dma->data_tag, ch->dma->data_map); 181 ch->dma->data_map = NULL; 182 } 183 if (ch->dma->sg_tag) { 184 bus_dma_tag_destroy(ch->dma->sg_tag); 185 ch->dma->sg_tag = NULL; 186 } 187 if (ch->dma->data_tag) { 188 bus_dma_tag_destroy(ch->dma->data_tag); 189 ch->dma->data_tag = NULL; 190 } 191 if (ch->dma->dmatag) { 192 bus_dma_tag_destroy(ch->dma->dmatag); 193 ch->dma->dmatag = NULL; 194 } 195 if (ch->dma) 196 kfree(ch->dma, M_ATADMA); 197 } 198 199 static void 200 ata_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error) 201 { 202 struct ata_dmasetprd_args *args = xsc; 203 struct ata_dma_prdentry *prd = args->dmatab; 204 int i; 205 206 if ((args->error = error)) 207 return; 208 209 for (i = 0; i < nsegs; i++) { 210 prd[i].addr = htole32(segs[i].ds_addr); 211 prd[i].count = htole32(segs[i].ds_len); 212 } 213 prd[i - 1].count |= htole32(ATA_DMA_EOT); 214 KASSERT(nsegs <= ATA_DMA_ENTRIES, ("too many DMA segment entries\n")); 215 args->nsegs = nsegs; 216 } 217 218 static int 219 ata_dmaload(device_t dev, caddr_t data, int32_t count, int dir, 220 void *addr, int *entries) 221 { 222 struct ata_channel *ch = device_get_softc(dev); 223 struct ata_dmasetprd_args cba; 224 static struct krate krate_nata_ovdma = { .freq = 1 }; 225 int error; 226 227 if (ch->dma->flags & ATA_DMA_LOADED) { 228 device_printf(dev, "FAILURE - already active DMA on this device\n"); 229 return EIO; 230 } 231 if (!count) { 232 device_printf(dev, "FAILURE - zero length DMA transfer attempted\n"); 233 panic("zero length DMA transfer"); 234 return EIO; 235 } 236 if (((uintptr_t)data & (ch->dma->alignment - 1)) || 237 (count & (ch->dma->alignment - 1))) { 238 device_printf(dev, "FAILURE - non aligned DMA transfer attempted\n"); 239 return EIO; 240 } 241 if (count > ch->dma->max_iosize) { 242 krateprintf(&krate_nata_ovdma, 243 "%s: FAILURE - oversized DMA transfer " 244 "attempt %d > %d\n", 245 device_get_nameunit(dev), count, ch->dma->max_iosize); 246 return EIO; 247 } 248 249 cba.dmatab = addr; 250 251 if ((error = bus_dmamap_load(ch->dma->data_tag, ch->dma->data_map, 252 data, count, ch->dma->setprd, &cba, 253 BUS_DMA_NOWAIT)) || (error = cba.error)) 254 return error; 255 256 *entries = cba.nsegs; 257 258 bus_dmamap_sync(ch->dma->sg_tag, ch->dma->sg_map, BUS_DMASYNC_PREWRITE); 259 260 bus_dmamap_sync(ch->dma->data_tag, ch->dma->data_map, 261 dir ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 262 263 ch->dma->cur_iosize = count; 264 ch->dma->flags = dir ? (ATA_DMA_LOADED | ATA_DMA_READ) : ATA_DMA_LOADED; 265 return 0; 266 } 267 268 static int 269 ata_dmaunload(device_t dev) 270 { 271 struct ata_channel *ch = device_get_softc(dev); 272 273 if (ch->dma->flags & ATA_DMA_LOADED) { 274 bus_dmamap_sync(ch->dma->sg_tag, ch->dma->sg_map, 275 BUS_DMASYNC_POSTWRITE); 276 277 bus_dmamap_sync(ch->dma->data_tag, ch->dma->data_map, 278 (ch->dma->flags & ATA_DMA_READ) ? 279 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 280 bus_dmamap_unload(ch->dma->data_tag, ch->dma->data_map); 281 282 ch->dma->cur_iosize = 0; 283 ch->dma->flags &= ~ATA_DMA_LOADED; 284 } 285 return 0; 286 } 287