xref: /dragonfly/sys/dev/disk/nata/ata-dma.c (revision 23265324)
1 /*-
2  * Copyright (c) 1998 - 2006 S�ren Schmidt <sos@FreeBSD.org>
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer,
10  *    without modification, immediately at the beginning of the file.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25  *
26  * $FreeBSD: src/sys/dev/ata/ata-dma.c,v 1.141 2006/01/05 21:27:19 sos Exp $
27  * $DragonFly: src/sys/dev/disk/nata/ata-dma.c,v 1.1 2006/12/04 14:40:37 tgen Exp $
28  */
29 
30 #include "opt_ata.h"
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/bus_dma.h>
35 #include <sys/endian.h>
36 #include <sys/malloc.h>
37 #include <sys/nata.h>
38 
39 #include <machine/bus_dma.h>
40 
41 #include "ata-all.h"
42 #include "ata-pci.h"
43 #include "ata_if.h"
44 
45 /* prototypes */
46 static void ata_dmaalloc(device_t);
47 static void ata_dmafree(device_t);
48 static void ata_dmasetprd(void *, bus_dma_segment_t *, int, int);
49 static int ata_dmaload(device_t, caddr_t, int32_t, int, void *, int *);
50 static int ata_dmaunload(device_t);
51 
52 /* local vars */
53 static MALLOC_DEFINE(M_ATADMA, "ata_dma", "ATA driver DMA");
54 
55 /* misc defines */
56 #define MAXTABSZ        PAGE_SIZE
57 #define MAXWSPCSZ       PAGE_SIZE*2
58 
59 struct ata_dc_cb_args {
60     bus_addr_t maddr;
61     int error;
62 };
63 
64 void
65 ata_dmainit(device_t dev)
66 {
67     struct ata_channel *ch = device_get_softc(dev);
68 
69     if ((ch->dma = kmalloc(sizeof(struct ata_dma), M_ATADMA, M_NOWAIT|M_ZERO))) {
70 	ch->dma->alloc = ata_dmaalloc;
71 	ch->dma->free = ata_dmafree;
72 	ch->dma->setprd = ata_dmasetprd;
73 	ch->dma->load = ata_dmaload;
74 	ch->dma->unload = ata_dmaunload;
75 	ch->dma->alignment = 2;
76 	ch->dma->boundary = 128 * DEV_BSIZE;
77 	ch->dma->segsize = 128 * DEV_BSIZE;
78 	ch->dma->max_iosize = 128 * DEV_BSIZE;
79     }
80 }
81 
82 void
83 ata_dmauninit(device_t dev)
84 {
85     struct ata_channel *ch = device_get_softc(dev);
86 
87     if (ch->dma) {
88 	kfree(ch->dma, M_ATADMA);
89 	ch->dma = NULL;
90     }
91 }
92 
93 static void
94 ata_dmasetupc_cb(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
95 {
96     struct ata_dc_cb_args *cba = (struct ata_dc_cb_args *)xsc;
97 
98     if (!(cba->error = error))
99 	cba->maddr = segs[0].ds_addr;
100 }
101 
102 static void
103 ata_dmaalloc(device_t dev)
104 {
105     struct ata_channel *ch = device_get_softc(dev);
106     struct ata_dc_cb_args ccba;
107 
108     if (bus_dma_tag_create(NULL, ch->dma->alignment, 0,
109 			   BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
110 			   NULL, NULL, ch->dma->max_iosize,
111 			   ATA_DMA_ENTRIES, ch->dma->segsize,
112 			   0, &ch->dma->dmatag))
113 	goto error;
114 
115     if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, PAGE_SIZE,
116 			   BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
117 			   NULL, NULL, MAXTABSZ, 1, MAXTABSZ,
118 			   0, &ch->dma->sg_tag))
119 	goto error;
120 
121     if (bus_dma_tag_create(ch->dma->dmatag,ch->dma->alignment,ch->dma->boundary,
122 			   BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
123 			   NULL, NULL, ch->dma->max_iosize,
124 			   ATA_DMA_ENTRIES, ch->dma->segsize,
125 			   0, &ch->dma->data_tag))
126 	goto error;
127 
128     if (bus_dmamem_alloc(ch->dma->sg_tag, (void **)&ch->dma->sg, 0,
129 			 &ch->dma->sg_map))
130 	goto error;
131 
132     if (bus_dmamap_load(ch->dma->sg_tag, ch->dma->sg_map, ch->dma->sg,
133 			MAXTABSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) {
134 	bus_dmamem_free(ch->dma->sg_tag, ch->dma->sg, ch->dma->sg_map);
135 	goto error;
136     }
137     ch->dma->sg_bus = ccba.maddr;
138 
139     if (bus_dmamap_create(ch->dma->data_tag, 0, &ch->dma->data_map))
140 	goto error;
141 
142     if (bus_dma_tag_create(ch->dma->dmatag, PAGE_SIZE, 64 * 1024,
143 			   BUS_SPACE_MAXADDR_32BIT, BUS_SPACE_MAXADDR,
144 			   NULL, NULL, MAXWSPCSZ, 1, MAXWSPCSZ,
145 			   0, &ch->dma->work_tag))
146 	goto error;
147 
148     if (bus_dmamem_alloc(ch->dma->work_tag, (void **)&ch->dma->work, 0,
149 			 &ch->dma->work_map))
150 	goto error;
151 
152     if (bus_dmamap_load(ch->dma->work_tag, ch->dma->work_map,ch->dma->work,
153 			MAXWSPCSZ, ata_dmasetupc_cb, &ccba, 0) || ccba.error) {
154 	bus_dmamem_free(ch->dma->work_tag,ch->dma->work, ch->dma->work_map);
155 	goto error;
156     }
157     ch->dma->work_bus = ccba.maddr;
158 
159     return;
160 
161 error:
162     device_printf(dev, "WARNING - DMA allocation failed, disabling DMA\n");
163     ata_dmafree(dev);
164     kfree(ch->dma, M_ATADMA);
165     ch->dma = NULL;
166 }
167 
168 static void
169 ata_dmafree(device_t dev)
170 {
171     struct ata_channel *ch = device_get_softc(dev);
172 
173     if (ch->dma->work_bus) {
174 	bus_dmamap_unload(ch->dma->work_tag, ch->dma->work_map);
175 	bus_dmamem_free(ch->dma->work_tag, ch->dma->work, ch->dma->work_map);
176 	ch->dma->work_bus = 0;
177 	ch->dma->work_map = NULL;
178 	ch->dma->work = NULL;
179     }
180     if (ch->dma->work_tag) {
181 	bus_dma_tag_destroy(ch->dma->work_tag);
182 	ch->dma->work_tag = NULL;
183     }
184     if (ch->dma->sg_bus) {
185 	bus_dmamap_unload(ch->dma->sg_tag, ch->dma->sg_map);
186 	bus_dmamem_free(ch->dma->sg_tag, ch->dma->sg, ch->dma->sg_map);
187 	ch->dma->sg_bus = 0;
188 	ch->dma->sg_map = NULL;
189 	ch->dma->sg = NULL;
190     }
191     if (ch->dma->data_map) {
192 	bus_dmamap_destroy(ch->dma->data_tag, ch->dma->data_map);
193 	ch->dma->data_map = NULL;
194     }
195     if (ch->dma->sg_tag) {
196 	bus_dma_tag_destroy(ch->dma->sg_tag);
197 	ch->dma->sg_tag = NULL;
198     }
199     if (ch->dma->data_tag) {
200 	bus_dma_tag_destroy(ch->dma->data_tag);
201 	ch->dma->data_tag = NULL;
202     }
203     if (ch->dma->dmatag) {
204 	bus_dma_tag_destroy(ch->dma->dmatag);
205 	ch->dma->dmatag = NULL;
206     }
207 }
208 
209 static void
210 ata_dmasetprd(void *xsc, bus_dma_segment_t *segs, int nsegs, int error)
211 {
212     struct ata_dmasetprd_args *args = xsc;
213     struct ata_dma_prdentry *prd = args->dmatab;
214     int i;
215 
216     if ((args->error = error))
217 	return;
218 
219     for (i = 0; i < nsegs; i++) {
220 	prd[i].addr = htole32(segs[i].ds_addr);
221 	prd[i].count = htole32(segs[i].ds_len);
222     }
223     prd[i - 1].count |= htole32(ATA_DMA_EOT);
224     args->nsegs = nsegs;
225 }
226 
227 static int
228 ata_dmaload(device_t dev, caddr_t data, int32_t count, int dir,
229 	    void *addr, int *entries)
230 {
231     struct ata_channel *ch = device_get_softc(dev);
232     struct ata_dmasetprd_args cba;
233     int error;
234 
235     if (ch->dma->flags & ATA_DMA_LOADED) {
236 	device_printf(dev, "FAILURE - already active DMA on this device\n");
237 	return EIO;
238     }
239     if (!count) {
240 	device_printf(dev, "FAILURE - zero length DMA transfer attempted\n");
241 	return EIO;
242     }
243     if (((uintptr_t)data & (ch->dma->alignment - 1)) ||
244 	(count & (ch->dma->alignment - 1))) {
245 	device_printf(dev, "FAILURE - non aligned DMA transfer attempted\n");
246 	return EIO;
247     }
248     if (count > ch->dma->max_iosize) {
249 	device_printf(dev, "FAILURE - oversized DMA transfer attempt %d > %d\n",
250 		      count, ch->dma->max_iosize);
251 	return EIO;
252     }
253 
254     cba.dmatab = addr;
255 
256     if ((error = bus_dmamap_load(ch->dma->data_tag, ch->dma->data_map,
257 				 data, count, ch->dma->setprd, &cba,
258 				 BUS_DMA_NOWAIT)) || (error = cba.error))
259 	return error;
260 
261     *entries = cba.nsegs;
262 
263     bus_dmamap_sync(ch->dma->sg_tag, ch->dma->sg_map, BUS_DMASYNC_PREWRITE);
264 
265     bus_dmamap_sync(ch->dma->data_tag, ch->dma->data_map,
266 		    dir ? BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE);
267 
268     ch->dma->cur_iosize = count;
269     ch->dma->flags = dir ? (ATA_DMA_LOADED | ATA_DMA_READ) : ATA_DMA_LOADED;
270     return 0;
271 }
272 
273 int
274 ata_dmaunload(device_t dev)
275 {
276     struct ata_channel *ch = device_get_softc(dev);
277 
278     if (ch->dma->flags & ATA_DMA_LOADED) {
279 	bus_dmamap_sync(ch->dma->sg_tag, ch->dma->sg_map,
280 			BUS_DMASYNC_POSTWRITE);
281 
282 	bus_dmamap_sync(ch->dma->data_tag, ch->dma->data_map,
283 			(ch->dma->flags & ATA_DMA_READ) != 0 ?
284 			BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE);
285 	bus_dmamap_unload(ch->dma->data_tag, ch->dma->data_map);
286 
287 	ch->dma->cur_iosize = 0;
288 	ch->dma->flags &= ~ATA_DMA_LOADED;
289     }
290     return 0;
291 }
292