1 /*- 2 * Copyright (c) 1998 - 2006 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 * 26 * $FreeBSD: src/sys/dev/ata/ata-pci.c,v 1.121 2007/02/23 12:18:33 piso Exp $ 27 */ 28 29 #include "opt_ata.h" 30 31 #include <sys/param.h> 32 #include <sys/bus.h> 33 #include <sys/bus_resource.h> 34 #include <sys/module.h> 35 #include <sys/nata.h> 36 #include <sys/rman.h> 37 #include <sys/systm.h> 38 #include <sys/machintr.h> 39 40 #include <bus/pci/pcireg.h> 41 #include <bus/pci/pcivar.h> 42 43 #include "ata-all.h" 44 #include "ata-pci.h" 45 #include "ata_if.h" 46 47 /* misc defines */ 48 #define IOMASK 0xfffffffc 49 #define ATA_PROBE_OK -10 50 51 static const struct none_atapci { 52 uint16_t vendor; 53 uint16_t device; 54 uint16_t subvendor; 55 uint16_t subdevice; 56 } none_atapci_table[] = { 57 /* Appears on Intel PRO/1000 PM */ 58 { ATA_INTEL_ID, 0x108d, ATA_INTEL_ID, 0x0000 }, 59 { 0xffff, 0, 0, 0 } 60 }; 61 62 /* 63 * generic PCI ATA device probe 64 */ 65 int 66 ata_pci_probe(device_t dev) 67 { 68 if (resource_disabled("atapci", device_get_unit(dev))) 69 return (ENXIO); 70 71 if (pci_get_class(dev) != PCIC_STORAGE) 72 return ENXIO; 73 74 /* if this is an AHCI chipset grab it */ 75 if (pci_get_subclass(dev) == PCIS_STORAGE_SATA) { 76 if (!ata_ahci_ident(dev)) 77 return ATA_PROBE_OK; 78 } 79 80 /* run through the vendor specific drivers */ 81 switch (pci_get_vendor(dev)) { 82 case ATA_ACARD_ID: 83 if (!ata_acard_ident(dev)) 84 return ATA_PROBE_OK; 85 break; 86 case ATA_ACER_LABS_ID: 87 if (!ata_ali_ident(dev)) 88 return ATA_PROBE_OK; 89 break; 90 case ATA_ADAPTEC_ID: 91 if (!ata_adaptec_ident(dev)) 92 return ATA_PROBE_OK; 93 break; 94 case ATA_AMD_ID: 95 if (!ata_amd_ident(dev)) 96 return ATA_PROBE_OK; 97 break; 98 case ATA_ATI_ID: 99 if (!ata_ati_ident(dev)) 100 return ATA_PROBE_OK; 101 break; 102 case ATA_CYRIX_ID: 103 if (!ata_cyrix_ident(dev)) 104 return ATA_PROBE_OK; 105 break; 106 case ATA_CYPRESS_ID: 107 if (!ata_cypress_ident(dev)) 108 return ATA_PROBE_OK; 109 break; 110 case ATA_HIGHPOINT_ID: 111 if (!ata_highpoint_ident(dev)) 112 return ATA_PROBE_OK; 113 break; 114 case ATA_INTEL_ID: 115 if (!ata_intel_ident(dev)) 116 return ATA_PROBE_OK; 117 break; 118 case ATA_ITE_ID: 119 if (!ata_ite_ident(dev)) 120 return ATA_PROBE_OK; 121 break; 122 case ATA_JMICRON_ID: 123 if (!ata_jmicron_ident(dev)) 124 return ATA_PROBE_OK; 125 break; 126 case ATA_MARVELL_ID: 127 if (!ata_marvell_ident(dev)) 128 return ATA_PROBE_OK; 129 break; 130 case ATA_NATIONAL_ID: 131 if (!ata_national_ident(dev)) 132 return ATA_PROBE_OK; 133 break; 134 case ATA_NETCELL_ID: 135 if (!ata_netcell_ident(dev)) 136 return ATA_PROBE_OK; 137 break; 138 case ATA_NVIDIA_ID: 139 if (!ata_nvidia_ident(dev)) 140 return ATA_PROBE_OK; 141 break; 142 case ATA_PROMISE_ID: 143 if (!ata_promise_ident(dev)) 144 return ATA_PROBE_OK; 145 break; 146 case ATA_SERVERWORKS_ID: 147 if (!ata_serverworks_ident(dev)) 148 return ATA_PROBE_OK; 149 break; 150 case ATA_SILICON_IMAGE_ID: 151 if (!ata_sii_ident(dev)) 152 return ATA_PROBE_OK; 153 break; 154 case ATA_SIS_ID: 155 if (!ata_sis_ident(dev)) 156 return ATA_PROBE_OK; 157 break; 158 case ATA_VIA_ID: 159 if (!ata_via_ident(dev)) 160 return ATA_PROBE_OK; 161 break; 162 case ATA_CENATEK_ID: 163 if (!ata_cenatek_ident(dev)) 164 return ATA_PROBE_OK; 165 break; 166 case ATA_MICRON_ID: 167 if (!ata_micron_ident(dev)) 168 return ATA_PROBE_OK; 169 break; 170 } 171 172 /* unknown chipset, try generic AHCI or DMA if it seems possible */ 173 if (pci_get_subclass(dev) == PCIS_STORAGE_IDE) { 174 uint16_t vendor, device, subvendor, subdevice; 175 const struct none_atapci *e; 176 177 vendor = pci_get_vendor(dev); 178 device = pci_get_device(dev); 179 subvendor = pci_get_subvendor(dev); 180 subdevice = pci_get_subdevice(dev); 181 for (e = none_atapci_table; e->vendor != 0xffff; ++e) { 182 if (e->vendor == vendor && e->device == device && 183 e->subvendor == subvendor && e->subdevice == subdevice) 184 return ENXIO; 185 } 186 187 if (!ata_generic_ident(dev)) 188 return ATA_PROBE_OK; 189 } 190 return ENXIO; 191 } 192 193 int 194 ata_pci_attach(device_t dev) 195 { 196 struct ata_pci_controller *ctlr = device_get_softc(dev); 197 u_int32_t cmd; 198 int unit; 199 200 /* do chipset specific setups only needed once */ 201 ctlr->legacy = ata_legacy(dev); 202 if (ctlr->legacy || pci_read_config(dev, PCIR_BAR(2), 4) & IOMASK) 203 ctlr->channels = 2; 204 else 205 ctlr->channels = 1; 206 ctlr->allocate = ata_pci_allocate; 207 ctlr->dev = dev; 208 209 /* if needed try to enable busmastering */ 210 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 211 if (!(cmd & PCIM_CMD_BUSMASTEREN)) { 212 pci_write_config(dev, PCIR_COMMAND, cmd | PCIM_CMD_BUSMASTEREN, 2); 213 cmd = pci_read_config(dev, PCIR_COMMAND, 2); 214 } 215 216 /* if busmastering mode "stuck" use it */ 217 if ((cmd & PCIM_CMD_BUSMASTEREN) == PCIM_CMD_BUSMASTEREN) { 218 ctlr->r_type1 = SYS_RES_IOPORT; 219 ctlr->r_rid1 = ATA_BMADDR_RID; 220 ctlr->r_res1 = bus_alloc_resource_any(dev, ctlr->r_type1, &ctlr->r_rid1, 221 RF_ACTIVE); 222 /* Only set a dma init function if the device actually supports it. */ 223 ctlr->dmainit = ata_pci_dmainit; 224 } 225 226 if (ctlr->chipinit(dev)) 227 return ENXIO; 228 229 /* attach all channels on this controller */ 230 for (unit = 0; unit < ctlr->channels; unit++) { 231 int freeunit = 2; 232 if ((unit == 0 || unit == 1) && ctlr->legacy) { 233 device_add_child(dev, "ata", unit); 234 continue; 235 } 236 /* XXX TGEN devclass_find_free_unit() implementation */ 237 if (ata_devclass) { 238 while (freeunit < devclass_get_maxunit(ata_devclass) && 239 devclass_get_device(ata_devclass, freeunit) != NULL) 240 freeunit++; 241 } 242 device_add_child(dev, "ata", freeunit); 243 } 244 bus_generic_attach(dev); 245 return 0; 246 } 247 248 int 249 ata_pci_detach(device_t dev) 250 { 251 struct ata_pci_controller *ctlr = device_get_softc(dev); 252 device_t *children; 253 int nchildren, i; 254 255 /* detach & delete all children */ 256 if (!device_get_children(dev, &children, &nchildren)) { 257 for (i = 0; i < nchildren; i++) 258 device_delete_child(dev, children[i]); 259 kfree(children, M_TEMP); 260 } 261 262 if (ctlr->r_irq) { 263 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 264 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq); 265 ctlr->r_irq = NULL; 266 } 267 if (ctlr->r_res2) { 268 bus_release_resource(dev, ctlr->r_type2, ctlr->r_rid2, ctlr->r_res2); 269 ctlr->r_res2 = NULL; 270 } 271 if (ctlr->r_res1) { 272 bus_release_resource(dev, ctlr->r_type1, ctlr->r_rid1, ctlr->r_res1); 273 ctlr->r_res1 = NULL; 274 } 275 276 return 0; 277 } 278 279 struct resource * 280 ata_pci_alloc_resource(device_t dev, device_t child, int type, int *rid, 281 u_long start, u_long end, u_long count, u_int flags, int cpuid) 282 { 283 struct ata_pci_controller *controller = device_get_softc(dev); 284 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 285 struct resource *res = NULL; 286 int myrid; 287 288 if (type == SYS_RES_IOPORT) { 289 switch (*rid) { 290 case ATA_IOADDR_RID: 291 if (controller->legacy) { 292 start = (unit ? ATA_SECONDARY : ATA_PRIMARY); 293 count = ATA_IOSIZE; 294 end = start + count - 1; 295 } 296 myrid = PCIR_BAR(0) + (unit << 3); 297 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 298 SYS_RES_IOPORT, &myrid, 299 start, end, count, flags, cpuid); 300 break; 301 302 case ATA_CTLADDR_RID: 303 if (controller->legacy) { 304 start = (unit ? ATA_SECONDARY : ATA_PRIMARY) + ATA_CTLOFFSET; 305 count = ATA_CTLIOSIZE; 306 end = start + count - 1; 307 } 308 myrid = PCIR_BAR(1) + (unit << 3); 309 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), dev, 310 SYS_RES_IOPORT, &myrid, 311 start, end, count, flags, cpuid); 312 break; 313 } 314 } 315 if (type == SYS_RES_IRQ && *rid == ATA_IRQ_RID) { 316 if (controller->legacy) { 317 int irq = (unit == 0 ? 14 : 15); 318 319 cpuid = machintr_legacy_intr_cpuid(irq); 320 res = BUS_ALLOC_RESOURCE(device_get_parent(dev), child, 321 SYS_RES_IRQ, rid, irq, irq, 1, flags, 322 cpuid); 323 } 324 else 325 res = controller->r_irq; 326 } 327 return res; 328 } 329 330 int 331 ata_pci_release_resource(device_t dev, device_t child, int type, int rid, 332 struct resource *r) 333 { 334 struct ata_pci_controller *controller = device_get_softc(dev); 335 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 336 337 if (type == SYS_RES_IOPORT) { 338 switch (rid) { 339 case ATA_IOADDR_RID: 340 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 341 SYS_RES_IOPORT, 342 PCIR_BAR(0) + (unit << 3), r); 343 break; 344 345 case ATA_CTLADDR_RID: 346 return BUS_RELEASE_RESOURCE(device_get_parent(dev), dev, 347 SYS_RES_IOPORT, 348 PCIR_BAR(1) + (unit << 3), r); 349 break; 350 default: 351 return ENOENT; 352 } 353 } 354 if (type == SYS_RES_IRQ) { 355 if (rid != ATA_IRQ_RID) 356 return ENOENT; 357 358 if (controller->legacy) { 359 return BUS_RELEASE_RESOURCE(device_get_parent(dev), child, 360 SYS_RES_IRQ, rid, r); 361 } 362 else 363 return 0; 364 } 365 return EINVAL; 366 } 367 368 int 369 ata_pci_setup_intr(device_t dev, device_t child, struct resource *irq, 370 int flags, driver_intr_t *function, void *argument, 371 void **cookiep) 372 { 373 struct ata_pci_controller *controller = device_get_softc(dev); 374 375 if (controller->legacy) { 376 return BUS_SETUP_INTR(device_get_parent(dev), child, irq, 377 flags, function, argument, cookiep, NULL, NULL); 378 } 379 else { 380 struct ata_pci_controller *controller = device_get_softc(dev); 381 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 382 383 controller->interrupt[unit].function = function; 384 controller->interrupt[unit].argument = argument; 385 *cookiep = controller; 386 return 0; 387 } 388 } 389 390 int 391 ata_pci_teardown_intr(device_t dev, device_t child, struct resource *irq, 392 void *cookie) 393 { 394 struct ata_pci_controller *controller = device_get_softc(dev); 395 396 if (controller->legacy) { 397 return BUS_TEARDOWN_INTR(device_get_parent(dev), child, irq, cookie); 398 } 399 else { 400 struct ata_pci_controller *controller = device_get_softc(dev); 401 int unit = ((struct ata_channel *)device_get_softc(child))->unit; 402 403 controller->interrupt[unit].function = NULL; 404 controller->interrupt[unit].argument = NULL; 405 return 0; 406 } 407 } 408 409 int 410 ata_pci_allocate(device_t dev) 411 { 412 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 413 struct ata_channel *ch = device_get_softc(dev); 414 struct resource *io = NULL, *ctlio = NULL; 415 int i, rid; 416 417 rid = ATA_IOADDR_RID; 418 if (!(io = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid, RF_ACTIVE))) 419 return ENXIO; 420 421 rid = ATA_CTLADDR_RID; 422 if (!(ctlio = bus_alloc_resource_any(dev, SYS_RES_IOPORT, &rid,RF_ACTIVE))){ 423 bus_release_resource(dev, SYS_RES_IOPORT, ATA_IOADDR_RID, io); 424 return ENXIO; 425 } 426 427 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 428 ch->r_io[i].res = io; 429 ch->r_io[i].offset = i; 430 } 431 ch->r_io[ATA_CONTROL].res = ctlio; 432 ch->r_io[ATA_CONTROL].offset = ctlr->legacy ? 0 : 2; 433 ch->r_io[ATA_IDX_ADDR].res = io; 434 ata_default_registers(dev); 435 if (ctlr->r_res1) { 436 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 437 ch->r_io[i].res = ctlr->r_res1; 438 ch->r_io[i].offset = (i - ATA_BMCMD_PORT) + (ch->unit*ATA_BMIOSIZE); 439 } 440 } 441 442 ata_pci_hw(dev); 443 return 0; 444 } 445 446 int 447 ata_pci_status(device_t dev) 448 { 449 struct ata_pci_controller *controller = 450 device_get_softc(device_get_parent(dev)); 451 struct ata_channel *ch = device_get_softc(dev); 452 453 if ((dumping || !controller->legacy) && 454 ch->dma && ((ch->flags & ATA_ALWAYS_DMASTAT) || 455 (ch->dma->flags & ATA_DMA_ACTIVE))) { 456 int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 457 458 /* 459 * Strictly speaking the DMA engine should already be stopped 460 * once we receive the interrupt. 461 * However at least ICH controllers seem to have the habbit 462 * of not clearing the active bit even though the interrupt 463 * is valid. 464 * To make sure we wait a little bit (to make sure that other 465 * buggy systems actually have a chance of finishing their 466 * DMA transaction) and then ignore the active bit. 467 */ 468 if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) == 469 (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) { 470 DELAY(100); 471 bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 472 } 473 if ((bmstat & ATA_BMSTAT_INTERRUPT) == 0) 474 return 0; 475 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR); 476 DELAY(1); 477 } 478 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) { 479 DELAY(100); 480 if (ATA_IDX_INB(ch, ATA_ALTSTAT) & ATA_S_BUSY) 481 return 0; 482 } 483 return 1; 484 } 485 486 void 487 ata_pci_hw(device_t dev) 488 { 489 struct ata_channel *ch = device_get_softc(dev); 490 491 ata_generic_hw(dev); 492 ch->hw.status = ata_pci_status; 493 } 494 495 static int 496 ata_pci_dmastart(device_t dev) 497 { 498 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 499 u_int8_t val; 500 501 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) | 502 (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); 503 ATA_IDX_OUTL(ch, ATA_BMDTP_PORT, ch->dma->sg_bus); 504 ch->dma->flags |= ATA_DMA_ACTIVE; 505 val = ATA_IDX_INB(ch, ATA_BMCMD_PORT); 506 if (ch->dma->flags & ATA_DMA_READ) 507 val |= ATA_BMCMD_WRITE_READ; 508 else 509 val &= ~ATA_BMCMD_WRITE_READ; 510 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val); 511 512 /* 513 * Issue the start command separately from configuration setup, 514 * in case the hardware latches portions of the configuration. 515 */ 516 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, val | ATA_BMCMD_START_STOP); 517 518 return 0; 519 } 520 521 static int 522 ata_pci_dmastop(device_t dev) 523 { 524 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 525 int error; 526 527 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 528 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 529 ch->dma->flags &= ~ATA_DMA_ACTIVE; 530 error = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; 531 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 532 return error; 533 } 534 535 static void 536 ata_pci_dmareset(device_t dev) 537 { 538 struct ata_channel *ch = device_get_softc(dev); 539 540 ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, 541 ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); 542 ch->dma->flags &= ~ATA_DMA_ACTIVE; 543 ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); 544 ch->dma->unload(dev); 545 } 546 547 void 548 ata_pci_dmainit(device_t dev) 549 { 550 struct ata_channel *ch = device_get_softc(dev); 551 552 ata_dmainit(dev); 553 if (ch->dma) { 554 ch->dma->start = ata_pci_dmastart; 555 ch->dma->stop = ata_pci_dmastop; 556 ch->dma->reset = ata_pci_dmareset; 557 } 558 } 559 560 /* 561 * misc support fucntions 562 */ 563 int 564 ata_legacy(device_t dev) 565 { 566 return (((pci_read_config(dev, PCIR_PROGIF, 1)&PCIP_STORAGE_IDE_MASTERDEV)&& 567 ((pci_read_config(dev, PCIR_PROGIF, 1) & 568 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC)) != 569 (PCIP_STORAGE_IDE_MODEPRIM | PCIP_STORAGE_IDE_MODESEC))) || 570 (!pci_read_config(dev, PCIR_BAR(0), 4) && 571 !pci_read_config(dev, PCIR_BAR(1), 4) && 572 !pci_read_config(dev, PCIR_BAR(2), 4) && 573 !pci_read_config(dev, PCIR_BAR(3), 4) && 574 !pci_read_config(dev, PCIR_BAR(5), 4))); 575 } 576 577 void 578 ata_generic_intr(void *data) 579 { 580 struct ata_pci_controller *ctlr = data; 581 struct ata_channel *ch; 582 int unit; 583 584 for (unit = 0; unit < ctlr->channels; unit++) { 585 if ((ch = ctlr->interrupt[unit].argument)) 586 ctlr->interrupt[unit].function(ch); 587 } 588 } 589 590 int 591 ata_setup_interrupt(device_t dev, void *intr_func) 592 { 593 struct ata_pci_controller *ctlr = device_get_softc(dev); 594 int rid = ATA_IRQ_RID; 595 596 if (!ctlr->legacy) { 597 if (!(ctlr->r_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, 598 RF_SHAREABLE | RF_ACTIVE))) { 599 device_printf(dev, "unable to map interrupt\n"); 600 return ENXIO; 601 } 602 if ((bus_setup_intr(dev, ctlr->r_irq, ATA_INTR_FLAGS, 603 intr_func, ctlr, &ctlr->handle, NULL))) { 604 device_printf(dev, "unable to setup interrupt\n"); 605 bus_release_resource(dev, SYS_RES_IRQ, rid, ctlr->r_irq); 606 ctlr->r_irq = 0; 607 return ENXIO; 608 } 609 } 610 return 0; 611 } 612 613 void 614 ata_teardown_interrupt(device_t dev) 615 { 616 struct ata_pci_controller *ctlr = device_get_softc(dev); 617 618 if (!ctlr->legacy) { 619 if (ctlr->r_irq) { 620 bus_teardown_intr(dev, ctlr->r_irq, ctlr->handle); 621 bus_release_resource(dev, SYS_RES_IRQ, ATA_IRQ_RID, ctlr->r_irq); 622 ctlr->r_irq = 0; 623 } 624 } 625 } 626 627 void 628 ata_set_desc(device_t dev) 629 { 630 struct ata_pci_controller *ctlr = device_get_softc(dev); 631 char buffer[64]; 632 633 ksprintf(buffer, "%s %s %s controller", 634 ata_pcivendor2str(dev), ctlr->chip->text, 635 ata_mode2str(ctlr->chip->max_dma)); 636 device_set_desc_copy(dev, buffer); 637 } 638 639 const struct ata_chip_id * 640 ata_match_chip(device_t dev, const struct ata_chip_id *index) 641 { 642 while (index->chipid != 0) { 643 if (pci_get_devid(dev) == index->chipid && 644 pci_get_revid(dev) >= index->chiprev) 645 return index; 646 index++; 647 } 648 return NULL; 649 } 650 651 const struct ata_chip_id * 652 ata_find_chip(device_t dev, const struct ata_chip_id *index, int slot) 653 { 654 device_t *children; 655 int nchildren, i; 656 657 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 658 return NULL; 659 660 while (index->chipid != 0) { 661 for (i = 0; i < nchildren; i++) { 662 if (((slot >= 0 && pci_get_slot(children[i]) == slot) || 663 (slot < 0 && pci_get_slot(children[i]) <= -slot)) && 664 pci_get_devid(children[i]) == index->chipid && 665 pci_get_revid(children[i]) >= index->chiprev) { 666 kfree(children, M_TEMP); 667 return index; 668 } 669 } 670 index++; 671 } 672 kfree(children, M_TEMP); 673 return NULL; 674 } 675 676 int 677 ata_check_80pin(device_t dev, int mode) 678 { 679 struct ata_device *atadev = device_get_softc(dev); 680 681 if (mode > ATA_UDMA2 && !(atadev->param.hwres & ATA_CABLE_ID)) { 682 ata_print_cable(dev, "device"); 683 mode = ATA_UDMA2; 684 } 685 return mode; 686 } 687 688 const char * 689 ata_pcivendor2str(device_t dev) 690 { 691 switch (pci_get_vendor(dev)) { 692 case ATA_ACARD_ID: return "Acard"; 693 case ATA_ACER_LABS_ID: return "AcerLabs"; 694 case ATA_AMD_ID: return "AMD"; 695 case ATA_ADAPTEC_ID: return "Adaptec"; 696 case ATA_ATI_ID: return "ATI"; 697 case ATA_CYRIX_ID: return "Cyrix"; 698 case ATA_CYPRESS_ID: return "Cypress"; 699 case ATA_HIGHPOINT_ID: return "HighPoint"; 700 case ATA_INTEL_ID: return "Intel"; 701 case ATA_ITE_ID: return "ITE"; 702 case ATA_JMICRON_ID: return "JMicron"; 703 case ATA_MARVELL_ID: return "Marvell"; 704 case ATA_NATIONAL_ID: return "National"; 705 case ATA_NETCELL_ID: return "Netcell"; 706 case ATA_NVIDIA_ID: return "nVidia"; 707 case ATA_PROMISE_ID: return "Promise"; 708 case ATA_SERVERWORKS_ID: return "ServerWorks"; 709 case ATA_SILICON_IMAGE_ID: return "SiI"; 710 case ATA_SIS_ID: return "SiS"; 711 case ATA_VIA_ID: return "VIA"; 712 case ATA_CENATEK_ID: return "Cenatek"; 713 case ATA_MICRON_ID: return "Micron"; 714 default: return "Generic"; 715 } 716 } 717 718 int 719 ata_mode2idx(int mode) 720 { 721 if ((mode & ATA_DMA_MASK) == ATA_UDMA0) 722 return (mode & ATA_MODE_MASK) + 8; 723 if ((mode & ATA_DMA_MASK) == ATA_WDMA0) 724 return (mode & ATA_MODE_MASK) + 5; 725 return (mode & ATA_MODE_MASK) - ATA_PIO0; 726 } 727 728 729 static device_method_t ata_pci_methods[] = { 730 /* device interface */ 731 DEVMETHOD(device_probe, ata_pci_probe), 732 DEVMETHOD(device_attach, ata_pci_attach), 733 DEVMETHOD(device_detach, ata_pci_detach), 734 DEVMETHOD(device_shutdown, bus_generic_shutdown), 735 DEVMETHOD(device_suspend, bus_generic_suspend), 736 DEVMETHOD(device_resume, bus_generic_resume), 737 738 /* bus methods */ 739 DEVMETHOD(bus_alloc_resource, ata_pci_alloc_resource), 740 DEVMETHOD(bus_release_resource, ata_pci_release_resource), 741 DEVMETHOD(bus_activate_resource, bus_generic_activate_resource), 742 DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource), 743 DEVMETHOD(bus_setup_intr, ata_pci_setup_intr), 744 DEVMETHOD(bus_teardown_intr, ata_pci_teardown_intr), 745 746 DEVMETHOD_END 747 }; 748 749 devclass_t atapci_devclass; 750 751 static driver_t ata_pci_driver = { 752 "atapci", 753 ata_pci_methods, 754 sizeof(struct ata_pci_controller), 755 }; 756 757 DRIVER_MODULE(atapci, pci, ata_pci_driver, atapci_devclass, NULL, NULL); 758 MODULE_VERSION(atapci, 1); 759 MODULE_DEPEND(atapci, ata, 1, 1, 1); 760 761 static int 762 ata_pcichannel_probe(device_t dev) 763 { 764 struct ata_channel *ch = device_get_softc(dev); 765 device_t *children; 766 int count, i; 767 char buffer[32]; 768 769 /* take care of green memory */ 770 bzero(ch, sizeof(struct ata_channel)); 771 772 /* find channel number on this controller */ 773 device_get_children(device_get_parent(dev), &children, &count); 774 for (i = 0; i < count; i++) { 775 if (children[i] == dev) 776 ch->unit = i; 777 } 778 kfree(children, M_TEMP); 779 780 ksprintf(buffer, "ATA channel %d", ch->unit); 781 device_set_desc_copy(dev, buffer); 782 783 return ata_probe(dev); 784 } 785 786 static int 787 ata_pcichannel_attach(device_t dev) 788 { 789 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 790 struct ata_channel *ch = device_get_softc(dev); 791 int error; 792 793 if (ctlr->dmainit) 794 ctlr->dmainit(dev); 795 if (ch->dma) 796 ch->dma->alloc(dev); 797 798 if ((error = ctlr->allocate(dev))) { 799 if (ch->dma) 800 ch->dma->free(dev); 801 return error; 802 } 803 804 return ata_attach(dev); 805 } 806 807 static int 808 ata_pcichannel_detach(device_t dev) 809 { 810 struct ata_channel *ch = device_get_softc(dev); 811 int error; 812 813 if ((error = ata_detach(dev))) 814 return error; 815 816 if (ch->dma) 817 ch->dma->free(dev); 818 819 /* XXX SOS free resources for io and ctlio ?? */ 820 821 return 0; 822 } 823 824 static int 825 ata_pcichannel_locking(device_t dev, int mode) 826 { 827 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 828 struct ata_channel *ch = device_get_softc(dev); 829 830 if (ctlr->locking) 831 return ctlr->locking(dev, mode); 832 else 833 return ch->unit; 834 } 835 836 static void 837 ata_pcichannel_reset(device_t dev) 838 { 839 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 840 struct ata_channel *ch = device_get_softc(dev); 841 842 /* if DMA engine present reset it */ 843 if (ch->dma) { 844 if (ch->dma->reset) 845 ch->dma->reset(dev); 846 ch->dma->unload(dev); 847 } 848 849 /* reset the controller HW */ 850 if (ctlr->reset) 851 ctlr->reset(dev); 852 else 853 ata_generic_reset(dev); 854 } 855 856 static void 857 ata_pcichannel_setmode(device_t parent, device_t dev) 858 { 859 struct ata_pci_controller *ctlr = device_get_softc(GRANDPARENT(dev)); 860 struct ata_device *atadev = device_get_softc(dev); 861 int mode = atadev->mode; 862 863 ctlr->setmode(dev, ATA_PIO_MAX); 864 if (mode >= ATA_DMA) 865 ctlr->setmode(dev, mode); 866 } 867 868 static device_method_t ata_pcichannel_methods[] = { 869 /* device interface */ 870 DEVMETHOD(device_probe, ata_pcichannel_probe), 871 DEVMETHOD(device_attach, ata_pcichannel_attach), 872 DEVMETHOD(device_detach, ata_pcichannel_detach), 873 DEVMETHOD(device_shutdown, bus_generic_shutdown), 874 DEVMETHOD(device_suspend, ata_suspend), 875 DEVMETHOD(device_resume, ata_resume), 876 877 /* ATA methods */ 878 DEVMETHOD(ata_setmode, ata_pcichannel_setmode), 879 DEVMETHOD(ata_locking, ata_pcichannel_locking), 880 DEVMETHOD(ata_reset, ata_pcichannel_reset), 881 882 DEVMETHOD_END 883 }; 884 885 driver_t ata_pcichannel_driver = { 886 "ata", 887 ata_pcichannel_methods, 888 sizeof(struct ata_channel), 889 }; 890 891 DRIVER_MODULE(ata, atapci, ata_pcichannel_driver, ata_devclass, NULL, NULL); 892