1 /*- 2 * Copyright (c) 1998 - 2008 Søren Schmidt <sos@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer, 10 * without modification, immediately at the beginning of the file. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* local prototypes */ 28 static int ata_via_chipinit(device_t dev); 29 static int ata_via_allocate(device_t dev); 30 static void ata_via_reset(device_t dev); 31 static void ata_via_old_setmode(device_t dev, int mode); 32 static void ata_via_southbridge_fixup(device_t dev); 33 static void ata_via_new_setmode(device_t dev, int mode); 34 35 /* misc defines */ 36 #define VIA33 0 37 #define VIA66 1 38 #define VIA100 2 39 #define VIA133 3 40 41 #define VIACLK 0x01 42 #define VIABUG 0x02 43 #define VIABAR 0x04 44 #define VIAAHCI 0x08 45 46 /* 47 * VIA Technologies Inc. chipset support functions 48 */ 49 int 50 ata_via_ident(device_t dev) 51 { 52 struct ata_pci_controller *ctlr = device_get_softc(dev); 53 static const struct ata_chip_id ids[] = 54 {{ ATA_VIA82C586, 0x02, VIA33, 0x00, ATA_UDMA2, "82C586B" }, 55 { ATA_VIA82C586, 0x00, VIA33, 0x00, ATA_WDMA2, "82C586" }, 56 { ATA_VIA82C596, 0x12, VIA66, VIACLK, ATA_UDMA4, "82C596B" }, 57 { ATA_VIA82C596, 0x00, VIA33, 0x00, ATA_UDMA2, "82C596" }, 58 { ATA_VIA82C686, 0x40, VIA100, VIABUG, ATA_UDMA5, "82C686B"}, 59 { ATA_VIA82C686, 0x10, VIA66, VIACLK, ATA_UDMA4, "82C686A" }, 60 { ATA_VIA82C686, 0x00, VIA33, 0x00, ATA_UDMA2, "82C686" }, 61 { ATA_VIA8231, 0x00, VIA100, VIABUG, ATA_UDMA5, "8231" }, 62 { ATA_VIA8233, 0x00, VIA100, 0x00, ATA_UDMA5, "8233" }, 63 { ATA_VIA8233C, 0x00, VIA100, 0x00, ATA_UDMA5, "8233C" }, 64 { ATA_VIA8233A, 0x00, VIA133, 0x00, ATA_UDMA6, "8233A" }, 65 { ATA_VIA8235, 0x00, VIA133, 0x00, ATA_UDMA6, "8235" }, 66 { ATA_VIA8237, 0x00, VIA133, 0x00, ATA_UDMA6, "8237" }, 67 { ATA_VIA8237A, 0x00, VIA133, 0x00, ATA_UDMA6, "8237A" }, 68 { ATA_VIA8237S, 0x00, VIA133, 0x00, ATA_UDMA6, "8237S" }, 69 { ATA_VIA8237_5372, 0x00, VIA133, 0x00, ATA_UDMA6, "8237" }, 70 { ATA_VIA8237_7372, 0x00, VIA133, 0x00, ATA_UDMA6, "8237" }, 71 { ATA_VIA8251, 0x00, VIA133, 0x00, ATA_UDMA6, "8251" }, 72 { 0, 0, 0, 0, 0, 0 }}; 73 static const struct ata_chip_id new_ids[] = 74 {{ ATA_VIA6410, 0x00, 0, 0x00, ATA_UDMA6, "6410" }, 75 { ATA_VIA6420, 0x00, 7, 0x00, ATA_SA150, "6420" }, 76 { ATA_VIA6421, 0x00, 6, VIABAR, ATA_SA150, "6421" }, 77 { ATA_VIA8237A, 0x00, 7, 0x00, ATA_SA150, "8237A" }, 78 { ATA_VIA8237S, 0x00, 7, 0x00, ATA_SA150, "8237S" }, 79 { ATA_VIA8251, 0x00, 0, VIAAHCI, ATA_SA300, "8251" }, 80 { 0, 0, 0, 0, 0, 0 }}; 81 82 if (pci_get_vendor(dev) != ATA_VIA_ID) 83 return ENXIO; 84 85 if (pci_get_devid(dev) == ATA_VIA82C571) { 86 if (!(ctlr->chip = ata_find_chip(dev, ids, -99))) 87 return ENXIO; 88 } 89 else { 90 if (!(ctlr->chip = ata_match_chip(dev, new_ids))) 91 return ENXIO; 92 } 93 94 ata_set_desc(dev); 95 ctlr->chipinit = ata_via_chipinit; 96 return 0; 97 } 98 99 static int 100 ata_via_chipinit(device_t dev) 101 { 102 struct ata_pci_controller *ctlr = device_get_softc(dev); 103 104 if (ata_setup_interrupt(dev, ata_generic_intr)) 105 return ENXIO; 106 107 if (ctlr->chip->max_dma >= ATA_SA150) { 108 /* do we have AHCI capability ? */ 109 if ((ctlr->chip->cfg2 == VIAAHCI) && ata_ahci_chipinit(dev) != ENXIO) 110 return 0; 111 112 ctlr->r_type2 = SYS_RES_IOPORT; 113 ctlr->r_rid2 = PCIR_BAR(5); 114 if ((ctlr->r_res2 = bus_alloc_resource_any(dev, ctlr->r_type2, 115 &ctlr->r_rid2, RF_ACTIVE))) { 116 ctlr->allocate = ata_via_allocate; 117 ctlr->reset = ata_via_reset; 118 119 /* enable PCI interrupt */ 120 pci_write_config(dev, PCIR_COMMAND, 121 pci_read_config(dev, PCIR_COMMAND, 2) & ~0x0400,2); 122 } 123 124 if (ctlr->chip->cfg2 & VIABAR) { 125 ctlr->channels = 3; 126 ctlr->setmode = ata_via_new_setmode; 127 } 128 else 129 ctlr->setmode = ata_sata_setmode; 130 return 0; 131 } 132 133 /* prepare for ATA-66 on the 82C686a and 82C596b */ 134 if (ctlr->chip->cfg2 & VIACLK) 135 pci_write_config(dev, 0x50, 0x030b030b, 4); 136 137 /* the southbridge might need the data corruption fix */ 138 if (ctlr->chip->cfg2 & VIABUG) 139 ata_via_southbridge_fixup(dev); 140 141 /* set fifo configuration half'n'half */ 142 pci_write_config(dev, 0x43, 143 (pci_read_config(dev, 0x43, 1) & 0x90) | 0x2a, 1); 144 145 /* set status register read retry */ 146 pci_write_config(dev, 0x44, pci_read_config(dev, 0x44, 1) | 0x08, 1); 147 148 /* set DMA read & end-of-sector fifo flush */ 149 pci_write_config(dev, 0x46, 150 (pci_read_config(dev, 0x46, 1) & 0x0c) | 0xf0, 1); 151 152 /* set sector size */ 153 pci_write_config(dev, 0x60, DEV_BSIZE, 2); 154 pci_write_config(dev, 0x68, DEV_BSIZE, 2); 155 156 ctlr->setmode = ata_via_old_setmode; 157 return 0; 158 } 159 160 static int 161 ata_via_allocate(device_t dev) 162 { 163 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 164 struct ata_channel *ch = device_get_softc(dev); 165 166 /* newer SATA chips has resources in one BAR for each channel */ 167 if (ctlr->chip->cfg2 & VIABAR) { 168 struct resource *r_io; 169 int i, rid; 170 171 rid = PCIR_BAR(ch->unit); 172 if (!(r_io = bus_alloc_resource_any(device_get_parent(dev), 173 SYS_RES_IOPORT, 174 &rid, RF_ACTIVE))) 175 return ENXIO; 176 177 for (i = ATA_DATA; i <= ATA_COMMAND; i ++) { 178 ch->r_io[i].res = r_io; 179 ch->r_io[i].offset = i; 180 } 181 ch->r_io[ATA_CONTROL].res = r_io; 182 ch->r_io[ATA_CONTROL].offset = 2 + ATA_IOSIZE; 183 ch->r_io[ATA_IDX_ADDR].res = r_io; 184 ata_default_registers(dev); 185 for (i = ATA_BMCMD_PORT; i <= ATA_BMDTP_PORT; i++) { 186 ch->r_io[i].res = ctlr->r_res1; 187 ch->r_io[i].offset = (i - ATA_BMCMD_PORT)+(ch->unit * ATA_BMIOSIZE); 188 } 189 ata_pci_hw(dev); 190 if (ch->unit >= 2) 191 return 0; 192 } 193 else { 194 /* setup the usual register normal pci style */ 195 if (ata_pci_allocate(dev)) 196 return ENXIO; 197 } 198 199 ch->r_io[ATA_SSTATUS].res = ctlr->r_res2; 200 ch->r_io[ATA_SSTATUS].offset = (ch->unit << ctlr->chip->cfg1); 201 ch->r_io[ATA_SERROR].res = ctlr->r_res2; 202 ch->r_io[ATA_SERROR].offset = 0x04 + (ch->unit << ctlr->chip->cfg1); 203 ch->r_io[ATA_SCONTROL].res = ctlr->r_res2; 204 ch->r_io[ATA_SCONTROL].offset = 0x08 + (ch->unit << ctlr->chip->cfg1); 205 ch->flags |= ATA_NO_SLAVE; 206 207 /* XXX SOS PHY hotplug handling missing in VIA chip ?? */ 208 /* XXX SOS unknown how to enable PHY state change interrupt */ 209 return 0; 210 } 211 212 static void 213 ata_via_reset(device_t dev) 214 { 215 struct ata_pci_controller *ctlr = device_get_softc(device_get_parent(dev)); 216 struct ata_channel *ch = device_get_softc(dev); 217 218 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) 219 ata_generic_reset(dev); 220 else 221 if (ata_sata_phy_reset(dev)) 222 ata_generic_reset(dev); 223 } 224 225 static void 226 ata_via_new_setmode(device_t dev, int mode) 227 { 228 device_t gparent = GRANDPARENT(dev); 229 struct ata_pci_controller *ctlr = device_get_softc(gparent); 230 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 231 struct ata_device *atadev = device_get_softc(dev); 232 int error; 233 234 if ((ctlr->chip->cfg2 & VIABAR) && (ch->unit > 1)) { 235 static const uint8_t pio_timings[] = { 0xa8, 0x65, 0x65, 0x32, 0x20, 236 0x65, 0x32, 0x20, 237 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; 238 static const uint8_t dma_timings[] = { 0xee, 0xe8, 0xe6, 0xe4, 0xe2, 0xe1, 0xe0 }; 239 240 mode = ata_check_80pin(dev, ata_limit_mode(dev, mode, ATA_UDMA6)); 241 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); 242 if (bootverbose) 243 device_printf(dev, "%ssetting %s on %s chip\n", 244 (error) ? "FAILURE " : "", ata_mode2str(mode), 245 ctlr->chip->text); 246 if (!error) { 247 pci_write_config(gparent, 0xab, pio_timings[ata_mode2idx(mode)], 1); 248 if (mode >= ATA_UDMA0) 249 pci_write_config(gparent, 0xb3, 250 dma_timings[mode & ATA_MODE_MASK], 1); 251 atadev->mode = mode; 252 } 253 } 254 else 255 ata_sata_setmode(dev, mode); 256 } 257 258 static void 259 ata_via_old_setmode(device_t dev, int mode) 260 { 261 device_t gparent = GRANDPARENT(dev); 262 struct ata_pci_controller *ctlr = device_get_softc(gparent); 263 struct ata_channel *ch = device_get_softc(device_get_parent(dev)); 264 struct ata_device *atadev = device_get_softc(dev); 265 int devno = (ch->unit << 1) + atadev->unit; 266 int reg = 0x53 - devno; 267 int error; 268 static const uint8_t timings[] = 269 { 0xa8, 0x65, 0x42, 0x22, 0x20, 0x42, 0x22, 0x20, 270 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20, 0x20 }; 271 static const uint8_t modes[][7] = { 272 { 0xc2, 0xc1, 0xc0, 0x00, 0x00, 0x00, 0x00 }, /* VIA ATA33 */ 273 { 0xee, 0xec, 0xea, 0xe9, 0xe8, 0x00, 0x00 }, /* VIA ATA66 */ 274 { 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0, 0x00 }, /* VIA ATA100 */ 275 { 0xf7, 0xf7, 0xf6, 0xf4, 0xf2, 0xf1, 0xf0 } }; /* VIA ATA133 */ 276 277 mode = ata_limit_mode(dev, mode, ctlr->chip->max_dma); 278 mode = ata_check_80pin(dev, mode); 279 280 error = ata_controlcmd(dev, ATA_SETFEATURES, ATA_SF_SETXFER, 0, mode); 281 if (bootverbose) 282 device_printf(dev, "%ssetting %s on %s chip\n", 283 (error) ? "FAILURE " : "", ata_mode2str(mode), 284 ctlr->chip->text); 285 if (!error) { 286 if (ctlr->chip->cfg1 != VIA133) 287 pci_write_config(gparent, reg - 0x08,timings[ata_mode2idx(mode)],1); 288 if (mode >= ATA_UDMA0) 289 pci_write_config(gparent, reg, 290 modes[ctlr->chip->cfg1][mode & ATA_MODE_MASK], 1); 291 else 292 pci_write_config(gparent, reg, 0x8b, 1); 293 atadev->mode = mode; 294 } 295 } 296 297 static void 298 ata_via_southbridge_fixup(device_t dev) 299 { 300 device_t *children; 301 int nchildren, i; 302 303 if (device_get_children(device_get_parent(dev), &children, &nchildren)) 304 return; 305 306 for (i = 0; i < nchildren; i++) { 307 if (pci_get_devid(children[i]) == ATA_VIA8363 || 308 pci_get_devid(children[i]) == ATA_VIA8371 || 309 pci_get_devid(children[i]) == ATA_VIA8662 || 310 pci_get_devid(children[i]) == ATA_VIA8361) { 311 u_int8_t reg76 = pci_read_config(children[i], 0x76, 1); 312 313 if ((reg76 & 0xf0) != 0xd0) { 314 device_printf(dev, 315 "Correcting VIA config for southbridge data corruption bug\n"); 316 pci_write_config(children[i], 0x75, 0x80, 1); 317 pci_write_config(children[i], 0x76, (reg76 & 0x0f) | 0xd0, 1); 318 } 319 break; 320 } 321 } 322 kfree(children, M_TEMP); 323 } 324