1 /************************************************************************** 2 ** 3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $ 4 ** $DragonFly: src/sys/dev/disk/ncr/ncr.c,v 1.22 2008/05/18 20:30:22 pavalos Exp $ 5 ** 6 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family. 7 ** 8 **------------------------------------------------------------------------- 9 ** 10 ** Written for 386bsd and FreeBSD by 11 ** Wolfgang Stanglmeier <wolf@cologne.de> 12 ** Stefan Esser <se@mi.Uni-Koeln.de> 13 ** 14 **------------------------------------------------------------------------- 15 ** 16 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 17 ** 18 ** Redistribution and use in source and binary forms, with or without 19 ** modification, are permitted provided that the following conditions 20 ** are met: 21 ** 1. Redistributions of source code must retain the above copyright 22 ** notice, this list of conditions and the following disclaimer. 23 ** 2. Redistributions in binary form must reproduce the above copyright 24 ** notice, this list of conditions and the following disclaimer in the 25 ** documentation and/or other materials provided with the distribution. 26 ** 3. The name of the author may not be used to endorse or promote products 27 ** derived from this software without specific prior written permission. 28 ** 29 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 30 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 33 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 34 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 38 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 ** 40 *************************************************************************** 41 */ 42 43 #define NCR_DATE "pl30 98/1/1" 44 45 #define NCR_VERSION (2) 46 #define MAX_UNITS (16) 47 48 #define NCR_GETCC_WITHMSG 49 50 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL) 51 #include "opt_ncr.h" 52 #endif 53 54 /*========================================================== 55 ** 56 ** Configuration and Debugging 57 ** 58 ** May be overwritten in <arch/conf/xxxx> 59 ** 60 **========================================================== 61 */ 62 63 /* 64 ** SCSI address of this device. 65 ** The boot routines should have set it. 66 ** If not, use this. 67 */ 68 69 #ifndef SCSI_NCR_MYADDR 70 #define SCSI_NCR_MYADDR (7) 71 #endif /* SCSI_NCR_MYADDR */ 72 73 /* 74 ** The default synchronous period factor 75 ** (0=asynchronous) 76 ** If maximum synchronous frequency is defined, use it instead. 77 */ 78 79 #ifndef SCSI_NCR_MAX_SYNC 80 81 #ifndef SCSI_NCR_DFLT_SYNC 82 #define SCSI_NCR_DFLT_SYNC (12) 83 #endif /* SCSI_NCR_DFLT_SYNC */ 84 85 #else 86 87 #if SCSI_NCR_MAX_SYNC == 0 88 #define SCSI_NCR_DFLT_SYNC 0 89 #else 90 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC) 91 #endif 92 93 #endif 94 95 /* 96 ** The minimal asynchronous pre-scaler period (ns) 97 ** Shall be 40. 98 */ 99 100 #ifndef SCSI_NCR_MIN_ASYNC 101 #define SCSI_NCR_MIN_ASYNC (40) 102 #endif /* SCSI_NCR_MIN_ASYNC */ 103 104 /* 105 ** The maximal bus with (in log2 byte) 106 ** (0=8 bit, 1=16 bit) 107 */ 108 109 #ifndef SCSI_NCR_MAX_WIDE 110 #define SCSI_NCR_MAX_WIDE (1) 111 #endif /* SCSI_NCR_MAX_WIDE */ 112 113 /*========================================================== 114 ** 115 ** Configuration and Debugging 116 ** 117 **========================================================== 118 */ 119 120 /* 121 ** Number of targets supported by the driver. 122 ** n permits target numbers 0..n-1. 123 ** Default is 7, meaning targets #0..#6. 124 ** #7 .. is myself. 125 */ 126 127 #define MAX_TARGET (16) 128 129 /* 130 ** Number of logic units supported by the driver. 131 ** n enables logic unit numbers 0..n-1. 132 ** The common SCSI devices require only 133 ** one lun, so take 1 as the default. 134 */ 135 136 #ifndef MAX_LUN 137 #define MAX_LUN (8) 138 #endif /* MAX_LUN */ 139 140 /* 141 ** The maximum number of jobs scheduled for starting. 142 ** There should be one slot per target, and one slot 143 ** for each tag of each target in use. 144 */ 145 146 #define MAX_START (256) 147 148 /* 149 ** The maximum number of segments a transfer is split into. 150 */ 151 152 #define MAX_SCATTER (33) 153 154 /* 155 ** The maximum transfer length (should be >= 64k). 156 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE. 157 */ 158 159 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE) 160 161 /* 162 ** other 163 */ 164 165 #define NCR_SNOOP_TIMEOUT (1000000) 166 167 /*========================================================== 168 ** 169 ** Include files 170 ** 171 **========================================================== 172 */ 173 174 #include <sys/param.h> 175 #include <sys/time.h> 176 177 #ifdef _KERNEL 178 #include <sys/systm.h> 179 #include <sys/malloc.h> 180 #include <sys/buf.h> 181 #include <sys/kernel.h> 182 #include <sys/sysctl.h> 183 #include <sys/bus.h> 184 #include <sys/thread2.h> 185 #include <machine/clock.h> 186 #include <machine/md_var.h> 187 #include <sys/rman.h> 188 #include <vm/vm.h> 189 #include <vm/pmap.h> 190 #include <vm/vm_extern.h> 191 #endif 192 193 #include <bus/pci/pcivar.h> 194 #include <bus/pci/pcireg.h> 195 #include "ncrreg.h" 196 197 #include <bus/cam/cam.h> 198 #include <bus/cam/cam_ccb.h> 199 #include <bus/cam/cam_sim.h> 200 #include <bus/cam/cam_xpt_sim.h> 201 #include <bus/cam/cam_debug.h> 202 203 #include <bus/cam/scsi/scsi_all.h> 204 #include <bus/cam/scsi/scsi_message.h> 205 206 /*========================================================== 207 ** 208 ** Debugging tags 209 ** 210 **========================================================== 211 */ 212 213 #define DEBUG_ALLOC (0x0001) 214 #define DEBUG_PHASE (0x0002) 215 #define DEBUG_POLL (0x0004) 216 #define DEBUG_QUEUE (0x0008) 217 #define DEBUG_RESULT (0x0010) 218 #define DEBUG_SCATTER (0x0020) 219 #define DEBUG_SCRIPT (0x0040) 220 #define DEBUG_TINY (0x0080) 221 #define DEBUG_TIMING (0x0100) 222 #define DEBUG_NEGO (0x0200) 223 #define DEBUG_TAGS (0x0400) 224 #define DEBUG_FREEZE (0x0800) 225 #define DEBUG_RESTART (0x1000) 226 227 /* 228 ** Enable/Disable debug messages. 229 ** Can be changed at runtime too. 230 */ 231 #ifdef SCSI_NCR_DEBUG 232 #define DEBUG_FLAGS ncr_debug 233 #else /* SCSI_NCR_DEBUG */ 234 #define SCSI_NCR_DEBUG 0 235 #define DEBUG_FLAGS 0 236 #endif /* SCSI_NCR_DEBUG */ 237 238 239 240 /*========================================================== 241 ** 242 ** assert () 243 ** 244 **========================================================== 245 ** 246 ** modified copy from 386bsd:/usr/include/sys/assert.h 247 ** 248 **---------------------------------------------------------- 249 */ 250 251 #ifdef DIAGNOSTIC 252 #define assert(expression) { \ 253 if (!(expression)) { \ 254 (void)kprintf("assertion \"%s\" failed: " \ 255 "file \"%s\", line %d\n", \ 256 #expression, __FILE__, __LINE__); \ 257 Debugger(""); \ 258 } \ 259 } 260 #else 261 #define assert(expression) { \ 262 if (!(expression)) { \ 263 (void)kprintf("assertion \"%s\" failed: " \ 264 "file \"%s\", line %d\n", \ 265 #expression, __FILE__, __LINE__); \ 266 } \ 267 } 268 #endif 269 270 /*========================================================== 271 ** 272 ** Access to the controller chip. 273 ** 274 **========================================================== 275 */ 276 277 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 278 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 279 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 280 281 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \ 282 offsetof(struct ncr_reg, r), val) 283 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \ 284 offsetof(struct ncr_reg, r), val) 285 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \ 286 offsetof(struct ncr_reg, r), val) 287 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val) 288 289 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o) 290 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o) 291 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o) 292 293 #define READSCRIPT_OFF(base, off) \ 294 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \ 295 bus_space_read_4(np->bst2, np->bsh2, off)) 296 297 #define WRITESCRIPT_OFF(base, off, val) \ 298 do { \ 299 if (base) \ 300 *((volatile u_int32_t *) \ 301 ((volatile char *)base + (off))) = (val); \ 302 else \ 303 bus_space_write_4(np->bst2, np->bsh2, off, val); \ 304 } while (0) 305 306 #define READSCRIPT(r) \ 307 READSCRIPT_OFF(np->script, offsetof(struct script, r)) 308 309 #define WRITESCRIPT(r, val) \ 310 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val) 311 312 /* 313 ** Set bit field ON, OFF 314 */ 315 316 #define OUTONB(r, m) OUTB(r, INB(r) | (m)) 317 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m)) 318 #define OUTONW(r, m) OUTW(r, INW(r) | (m)) 319 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m)) 320 #define OUTONL(r, m) OUTL(r, INL(r) | (m)) 321 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m)) 322 323 /*========================================================== 324 ** 325 ** Command control block states. 326 ** 327 **========================================================== 328 */ 329 330 #define HS_IDLE (0) 331 #define HS_BUSY (1) 332 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 333 #define HS_DISCONNECT (3) /* Disconnected by target */ 334 335 #define HS_COMPLETE (4) 336 #define HS_SEL_TIMEOUT (5) /* Selection timeout */ 337 #define HS_RESET (6) /* SCSI reset */ 338 #define HS_ABORTED (7) /* Transfer aborted */ 339 #define HS_TIMEOUT (8) /* Software timeout */ 340 #define HS_FAIL (9) /* SCSI or PCI bus errors */ 341 #define HS_UNEXPECTED (10) /* Unexpected disconnect */ 342 #define HS_STALL (11) /* QUEUE FULL or BUSY */ 343 344 #define HS_DONEMASK (0xfc) 345 346 /*========================================================== 347 ** 348 ** Software Interrupt Codes 349 ** 350 **========================================================== 351 */ 352 353 #define SIR_SENSE_RESTART (1) 354 #define SIR_SENSE_FAILED (2) 355 #define SIR_STALL_RESTART (3) 356 #define SIR_STALL_QUEUE (4) 357 #define SIR_NEGO_SYNC (5) 358 #define SIR_NEGO_WIDE (6) 359 #define SIR_NEGO_FAILED (7) 360 #define SIR_NEGO_PROTO (8) 361 #define SIR_REJECT_RECEIVED (9) 362 #define SIR_REJECT_SENT (10) 363 #define SIR_IGN_RESIDUE (11) 364 #define SIR_MISSING_SAVE (12) 365 #define SIR_MAX (12) 366 367 /*========================================================== 368 ** 369 ** Extended error codes. 370 ** xerr_status field of struct nccb. 371 ** 372 **========================================================== 373 */ 374 375 #define XE_OK (0) 376 #define XE_EXTRA_DATA (1) /* unexpected data phase */ 377 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 378 379 /*========================================================== 380 ** 381 ** Negotiation status. 382 ** nego_status field of struct nccb. 383 ** 384 **========================================================== 385 */ 386 387 #define NS_SYNC (1) 388 #define NS_WIDE (2) 389 390 /*========================================================== 391 ** 392 ** XXX These are no longer used. Remove once the 393 ** script is updated. 394 ** "Special features" of targets. 395 ** quirks field of struct tcb. 396 ** actualquirks field of struct nccb. 397 ** 398 **========================================================== 399 */ 400 401 #define QUIRK_AUTOSAVE (0x01) 402 #define QUIRK_NOMSG (0x02) 403 #define QUIRK_NOSYNC (0x10) 404 #define QUIRK_NOWIDE16 (0x20) 405 #define QUIRK_NOTAGS (0x40) 406 #define QUIRK_UPDATE (0x80) 407 408 /*========================================================== 409 ** 410 ** Misc. 411 ** 412 **========================================================== 413 */ 414 415 #define CCB_MAGIC (0xf2691ad2) 416 #define MAX_TAGS (32) /* hard limit */ 417 418 /*========================================================== 419 ** 420 ** OS dependencies. 421 ** 422 **========================================================== 423 */ 424 425 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path) 426 427 /*========================================================== 428 ** 429 ** Declaration of structs. 430 ** 431 **========================================================== 432 */ 433 434 struct tcb; 435 struct lcb; 436 struct nccb; 437 struct ncb; 438 struct script; 439 440 typedef struct ncb * ncb_p; 441 typedef struct tcb * tcb_p; 442 typedef struct lcb * lcb_p; 443 typedef struct nccb * nccb_p; 444 445 struct link { 446 ncrcmd l_cmd; 447 ncrcmd l_paddr; 448 }; 449 450 struct usrcmd { 451 u_long target; 452 u_long lun; 453 u_long data; 454 u_long cmd; 455 }; 456 457 #define UC_SETSYNC 10 458 #define UC_SETTAGS 11 459 #define UC_SETDEBUG 12 460 #define UC_SETORDER 13 461 #define UC_SETWIDE 14 462 #define UC_SETFLAG 15 463 464 #define UF_TRACE (0x01) 465 466 /*--------------------------------------- 467 ** 468 ** Timestamps for profiling 469 ** 470 **--------------------------------------- 471 */ 472 473 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */ 474 typedef int ticks_t; 475 476 struct tstamp { 477 ticks_t start; 478 ticks_t end; 479 ticks_t select; 480 ticks_t command; 481 ticks_t data; 482 ticks_t status; 483 ticks_t disconnect; 484 }; 485 486 /* 487 ** profiling data (per device) 488 */ 489 490 struct profile { 491 u_long num_trans; 492 u_long num_bytes; 493 u_long num_disc; 494 u_long num_break; 495 u_long num_int; 496 u_long num_fly; 497 u_long ms_setup; 498 u_long ms_data; 499 u_long ms_disc; 500 u_long ms_post; 501 }; 502 503 /*========================================================== 504 ** 505 ** Declaration of structs: target control block 506 ** 507 **========================================================== 508 */ 509 510 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */ 511 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */ 512 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */ 513 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */ 514 515 struct ncr_transinfo { 516 u_int8_t width; 517 u_int8_t period; 518 u_int8_t offset; 519 }; 520 521 struct ncr_target_tinfo { 522 /* Hardware version of our sync settings */ 523 u_int8_t disc_tag; 524 #define NCR_CUR_DISCENB 0x01 525 #define NCR_CUR_TAGENB 0x02 526 #define NCR_USR_DISCENB 0x04 527 #define NCR_USR_TAGENB 0x08 528 u_int8_t sval; 529 struct ncr_transinfo current; 530 struct ncr_transinfo goal; 531 struct ncr_transinfo user; 532 /* Hardware version of our wide settings */ 533 u_int8_t wval; 534 }; 535 536 struct tcb { 537 /* 538 ** during reselection the ncr jumps to this point 539 ** with SFBR set to the encoded target number 540 ** with bit 7 set. 541 ** if it's not this target, jump to the next. 542 ** 543 ** JUMP IF (SFBR != #target#) 544 ** @(next tcb) 545 */ 546 547 struct link jump_tcb; 548 549 /* 550 ** load the actual values for the sxfer and the scntl3 551 ** register (sync/wide mode). 552 ** 553 ** SCR_COPY (1); 554 ** @(sval field of this tcb) 555 ** @(sxfer register) 556 ** SCR_COPY (1); 557 ** @(wval field of this tcb) 558 ** @(scntl3 register) 559 */ 560 561 ncrcmd getscr[6]; 562 563 /* 564 ** if next message is "identify" 565 ** then load the message to SFBR, 566 ** else load 0 to SFBR. 567 ** 568 ** CALL 569 ** <RESEL_LUN> 570 */ 571 572 struct link call_lun; 573 574 /* 575 ** now look for the right lun. 576 ** 577 ** JUMP 578 ** @(first nccb of this lun) 579 */ 580 581 struct link jump_lcb; 582 583 /* 584 ** pointer to interrupted getcc nccb 585 */ 586 587 nccb_p hold_cp; 588 589 /* 590 ** pointer to nccb used for negotiating. 591 ** Avoid to start a nego for all queued commands 592 ** when tagged command queuing is enabled. 593 */ 594 595 nccb_p nego_cp; 596 597 /* 598 ** statistical data 599 */ 600 601 u_long transfers; 602 u_long bytes; 603 604 /* 605 ** user settable limits for sync transfer 606 ** and tagged commands. 607 */ 608 609 struct ncr_target_tinfo tinfo; 610 611 /* 612 ** the lcb's of this tcb 613 */ 614 615 lcb_p lp[MAX_LUN]; 616 }; 617 618 /*========================================================== 619 ** 620 ** Declaration of structs: lun control block 621 ** 622 **========================================================== 623 */ 624 625 struct lcb { 626 /* 627 ** during reselection the ncr jumps to this point 628 ** with SFBR set to the "Identify" message. 629 ** if it's not this lun, jump to the next. 630 ** 631 ** JUMP IF (SFBR != #lun#) 632 ** @(next lcb of this target) 633 */ 634 635 struct link jump_lcb; 636 637 /* 638 ** if next message is "simple tag", 639 ** then load the tag to SFBR, 640 ** else load 0 to SFBR. 641 ** 642 ** CALL 643 ** <RESEL_TAG> 644 */ 645 646 struct link call_tag; 647 648 /* 649 ** now look for the right nccb. 650 ** 651 ** JUMP 652 ** @(first nccb of this lun) 653 */ 654 655 struct link jump_nccb; 656 657 /* 658 ** start of the nccb chain 659 */ 660 661 nccb_p next_nccb; 662 663 /* 664 ** Control of tagged queueing 665 */ 666 667 u_char reqnccbs; 668 u_char reqlink; 669 u_char actlink; 670 u_char usetags; 671 u_char lasttag; 672 }; 673 674 /*========================================================== 675 ** 676 ** Declaration of structs: COMMAND control block 677 ** 678 **========================================================== 679 ** 680 ** This substructure is copied from the nccb to a 681 ** global address after selection (or reselection) 682 ** and copied back before disconnect. 683 ** 684 ** These fields are accessible to the script processor. 685 ** 686 **---------------------------------------------------------- 687 */ 688 689 struct head { 690 /* 691 ** Execution of a nccb starts at this point. 692 ** It's a jump to the "SELECT" label 693 ** of the script. 694 ** 695 ** After successful selection the script 696 ** processor overwrites it with a jump to 697 ** the IDLE label of the script. 698 */ 699 700 struct link launch; 701 702 /* 703 ** Saved data pointer. 704 ** Points to the position in the script 705 ** responsible for the actual transfer 706 ** of data. 707 ** It's written after reception of a 708 ** "SAVE_DATA_POINTER" message. 709 ** The goalpointer points after 710 ** the last transfer command. 711 */ 712 713 u_int32_t savep; 714 u_int32_t lastp; 715 u_int32_t goalp; 716 717 /* 718 ** The virtual address of the nccb 719 ** containing this header. 720 */ 721 722 nccb_p cp; 723 724 /* 725 ** space for some timestamps to gather 726 ** profiling data about devices and this driver. 727 */ 728 729 struct tstamp stamp; 730 731 /* 732 ** status fields. 733 */ 734 735 u_char status[8]; 736 }; 737 738 /* 739 ** The status bytes are used by the host and the script processor. 740 ** 741 ** The first four byte are copied to the scratchb register 742 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 743 ** and copied back just after disconnecting. 744 ** Inside the script the XX_REG are used. 745 ** 746 ** The last four bytes are used inside the script by "COPY" commands. 747 ** Because source and destination must have the same alignment 748 ** in a longword, the fields HAVE to be at the choosen offsets. 749 ** xerr_st (4) 0 (0x34) scratcha 750 ** sync_st (5) 1 (0x05) sxfer 751 ** wide_st (7) 3 (0x03) scntl3 752 */ 753 754 /* 755 ** First four bytes (script) 756 */ 757 #define QU_REG scr0 758 #define HS_REG scr1 759 #define HS_PRT nc_scr1 760 #define SS_REG scr2 761 #define PS_REG scr3 762 763 /* 764 ** First four bytes (host) 765 */ 766 #define actualquirks phys.header.status[0] 767 #define host_status phys.header.status[1] 768 #define s_status phys.header.status[2] 769 #define parity_status phys.header.status[3] 770 771 /* 772 ** Last four bytes (script) 773 */ 774 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */ 775 #define sync_st header.status[5] /* MUST be ==1 mod 4 */ 776 #define nego_st header.status[6] 777 #define wide_st header.status[7] /* MUST be ==3 mod 4 */ 778 779 /* 780 ** Last four bytes (host) 781 */ 782 #define xerr_status phys.xerr_st 783 #define sync_status phys.sync_st 784 #define nego_status phys.nego_st 785 #define wide_status phys.wide_st 786 787 /*========================================================== 788 ** 789 ** Declaration of structs: Data structure block 790 ** 791 **========================================================== 792 ** 793 ** During execution of a nccb by the script processor, 794 ** the DSA (data structure address) register points 795 ** to this substructure of the nccb. 796 ** This substructure contains the header with 797 ** the script-processor-changable data and 798 ** data blocks for the indirect move commands. 799 ** 800 **---------------------------------------------------------- 801 */ 802 803 struct dsb { 804 805 /* 806 ** Header. 807 ** Has to be the first entry, 808 ** because it's jumped to by the 809 ** script processor 810 */ 811 812 struct head header; 813 814 /* 815 ** Table data for Script 816 */ 817 818 struct scr_tblsel select; 819 struct scr_tblmove smsg ; 820 struct scr_tblmove smsg2 ; 821 struct scr_tblmove cmd ; 822 struct scr_tblmove scmd ; 823 struct scr_tblmove sense ; 824 struct scr_tblmove data [MAX_SCATTER]; 825 }; 826 827 /*========================================================== 828 ** 829 ** Declaration of structs: Command control block. 830 ** 831 **========================================================== 832 ** 833 ** During execution of a nccb by the script processor, 834 ** the DSA (data structure address) register points 835 ** to this substructure of the nccb. 836 ** This substructure contains the header with 837 ** the script-processor-changable data and then 838 ** data blocks for the indirect move commands. 839 ** 840 **---------------------------------------------------------- 841 */ 842 843 844 struct nccb { 845 /* 846 ** This filler ensures that the global header is 847 ** cache line size aligned. 848 */ 849 ncrcmd filler[4]; 850 851 /* 852 ** during reselection the ncr jumps to this point. 853 ** If a "SIMPLE_TAG" message was received, 854 ** then SFBR is set to the tag. 855 ** else SFBR is set to 0 856 ** If looking for another tag, jump to the next nccb. 857 ** 858 ** JUMP IF (SFBR != #TAG#) 859 ** @(next nccb of this lun) 860 */ 861 862 struct link jump_nccb; 863 864 /* 865 ** After execution of this call, the return address 866 ** (in the TEMP register) points to the following 867 ** data structure block. 868 ** So copy it to the DSA register, and start 869 ** processing of this data structure. 870 ** 871 ** CALL 872 ** <RESEL_TMP> 873 */ 874 875 struct link call_tmp; 876 877 /* 878 ** This is the data structure which is 879 ** to be executed by the script processor. 880 */ 881 882 struct dsb phys; 883 884 /* 885 ** If a data transfer phase is terminated too early 886 ** (after reception of a message (i.e. DISCONNECT)), 887 ** we have to prepare a mini script to transfer 888 ** the rest of the data. 889 */ 890 891 ncrcmd patch[8]; 892 893 /* 894 ** The general SCSI driver provides a 895 ** pointer to a control block. 896 */ 897 898 union ccb *ccb; 899 900 /* 901 ** We prepare a message to be sent after selection, 902 ** and a second one to be sent after getcc selection. 903 ** Contents are IDENTIFY and SIMPLE_TAG. 904 ** While negotiating sync or wide transfer, 905 ** a SDTM or WDTM message is appended. 906 */ 907 908 u_char scsi_smsg [8]; 909 u_char scsi_smsg2[8]; 910 911 /* 912 ** Lock this nccb. 913 ** Flag is used while looking for a free nccb. 914 */ 915 916 u_long magic; 917 918 /* 919 ** Physical address of this instance of nccb 920 */ 921 922 u_long p_nccb; 923 924 /* 925 ** Completion time out for this job. 926 ** It's set to time of start + allowed number of seconds. 927 */ 928 929 time_t tlimit; 930 931 /* 932 ** All nccbs of one hostadapter are chained. 933 */ 934 935 nccb_p link_nccb; 936 937 /* 938 ** All nccbs of one target/lun are chained. 939 */ 940 941 nccb_p next_nccb; 942 943 /* 944 ** Sense command 945 */ 946 947 u_char sensecmd[6]; 948 949 /* 950 ** Tag for this transfer. 951 ** It's patched into jump_nccb. 952 ** If it's not zero, a SIMPLE_TAG 953 ** message is included in smsg. 954 */ 955 956 u_char tag; 957 }; 958 959 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl)) 960 961 /*========================================================== 962 ** 963 ** Declaration of structs: NCR device descriptor 964 ** 965 **========================================================== 966 */ 967 968 struct ncb { 969 /* 970 ** The global header. 971 ** Accessible to both the host and the 972 ** script-processor. 973 ** We assume it is cache line size aligned. 974 */ 975 struct head header; 976 977 int unit; 978 979 /*----------------------------------------------- 980 ** Scripts .. 981 **----------------------------------------------- 982 ** 983 ** During reselection the ncr jumps to this point. 984 ** The SFBR register is loaded with the encoded target id. 985 ** 986 ** Jump to the first target. 987 ** 988 ** JUMP 989 ** @(next tcb) 990 */ 991 struct link jump_tcb; 992 993 /*----------------------------------------------- 994 ** Configuration .. 995 **----------------------------------------------- 996 ** 997 ** virtual and physical addresses 998 ** of the 53c810 chip. 999 */ 1000 int reg_rid; 1001 struct resource *reg_res; 1002 bus_space_tag_t bst; 1003 bus_space_handle_t bsh; 1004 1005 int sram_rid; 1006 struct resource *sram_res; 1007 bus_space_tag_t bst2; 1008 bus_space_handle_t bsh2; 1009 1010 struct resource *irq_res; 1011 void *irq_handle; 1012 1013 /* 1014 ** Scripts instance virtual address. 1015 */ 1016 struct script *script; 1017 struct scripth *scripth; 1018 1019 /* 1020 ** Scripts instance physical address. 1021 */ 1022 u_long p_script; 1023 u_long p_scripth; 1024 1025 /* 1026 ** The SCSI address of the host adapter. 1027 */ 1028 u_char myaddr; 1029 1030 /* 1031 ** timing parameters 1032 */ 1033 u_char minsync; /* Minimum sync period factor */ 1034 u_char maxsync; /* Maximum sync period factor */ 1035 u_char maxoffs; /* Max scsi offset */ 1036 u_char clock_divn; /* Number of clock divisors */ 1037 u_long clock_khz; /* SCSI clock frequency in KHz */ 1038 u_long features; /* Chip features map */ 1039 u_char multiplier; /* Clock multiplier (1,2,4) */ 1040 1041 u_char maxburst; /* log base 2 of dwords burst */ 1042 1043 /* 1044 ** BIOS supplied PCI bus options 1045 */ 1046 u_char rv_scntl3; 1047 u_char rv_dcntl; 1048 u_char rv_dmode; 1049 u_char rv_ctest3; 1050 u_char rv_ctest4; 1051 u_char rv_ctest5; 1052 u_char rv_gpcntl; 1053 u_char rv_stest2; 1054 1055 /*----------------------------------------------- 1056 ** CAM SIM information for this instance 1057 **----------------------------------------------- 1058 */ 1059 1060 struct cam_sim *sim; 1061 struct cam_path *path; 1062 1063 /*----------------------------------------------- 1064 ** Job control 1065 **----------------------------------------------- 1066 ** 1067 ** Commands from user 1068 */ 1069 struct usrcmd user; 1070 1071 /* 1072 ** Target data 1073 */ 1074 struct tcb target[MAX_TARGET]; 1075 1076 /* 1077 ** Start queue. 1078 */ 1079 u_int32_t squeue [MAX_START]; 1080 u_short squeueput; 1081 1082 /* 1083 ** Timeout handler 1084 */ 1085 time_t heartbeat; 1086 u_short ticks; 1087 u_short latetime; 1088 time_t lasttime; 1089 struct callout timeout_ch; 1090 1091 /*----------------------------------------------- 1092 ** Debug and profiling 1093 **----------------------------------------------- 1094 ** 1095 ** register dump 1096 */ 1097 struct ncr_reg regdump; 1098 time_t regtime; 1099 1100 /* 1101 ** Profiling data 1102 */ 1103 struct profile profile; 1104 u_long disc_phys; 1105 u_long disc_ref; 1106 1107 /* 1108 ** Head of list of all nccbs for this controller. 1109 */ 1110 nccb_p link_nccb; 1111 1112 /* 1113 ** message buffers. 1114 ** Should be longword aligned, 1115 ** because they're written with a 1116 ** COPY script command. 1117 */ 1118 u_char msgout[8]; 1119 u_char msgin [8]; 1120 u_int32_t lastmsg; 1121 1122 /* 1123 ** Buffer for STATUS_IN phase. 1124 */ 1125 u_char scratch; 1126 1127 /* 1128 ** controller chip dependent maximal transfer width. 1129 */ 1130 u_char maxwide; 1131 1132 #ifdef NCR_IOMAPPED 1133 /* 1134 ** address of the ncr control registers in io space 1135 */ 1136 pci_port_t port; 1137 #endif 1138 }; 1139 1140 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1141 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1142 1143 /*========================================================== 1144 ** 1145 ** 1146 ** Script for NCR-Processor. 1147 ** 1148 ** Use ncr_script_fill() to create the variable parts. 1149 ** Use ncr_script_copy_and_bind() to make a copy and 1150 ** bind to physical addresses. 1151 ** 1152 ** 1153 **========================================================== 1154 ** 1155 ** We have to know the offsets of all labels before 1156 ** we reach them (for forward jumps). 1157 ** Therefore we declare a struct here. 1158 ** If you make changes inside the script, 1159 ** DONT FORGET TO CHANGE THE LENGTHS HERE! 1160 ** 1161 **---------------------------------------------------------- 1162 */ 1163 1164 /* 1165 ** Script fragments which are loaded into the on-board RAM 1166 ** of 825A, 875 and 895 chips. 1167 */ 1168 struct script { 1169 ncrcmd start [ 7]; 1170 ncrcmd start0 [ 2]; 1171 ncrcmd start1 [ 3]; 1172 ncrcmd startpos [ 1]; 1173 ncrcmd trysel [ 8]; 1174 ncrcmd skip [ 8]; 1175 ncrcmd skip2 [ 3]; 1176 ncrcmd idle [ 2]; 1177 ncrcmd select [ 18]; 1178 ncrcmd prepare [ 4]; 1179 ncrcmd loadpos [ 14]; 1180 ncrcmd prepare2 [ 24]; 1181 ncrcmd setmsg [ 5]; 1182 ncrcmd clrack [ 2]; 1183 ncrcmd dispatch [ 33]; 1184 ncrcmd no_data [ 17]; 1185 ncrcmd checkatn [ 10]; 1186 ncrcmd command [ 15]; 1187 ncrcmd status [ 27]; 1188 ncrcmd msg_in [ 26]; 1189 ncrcmd msg_bad [ 6]; 1190 ncrcmd complete [ 13]; 1191 ncrcmd cleanup [ 12]; 1192 ncrcmd cleanup0 [ 9]; 1193 ncrcmd signal [ 12]; 1194 ncrcmd save_dp [ 5]; 1195 ncrcmd restore_dp [ 5]; 1196 ncrcmd disconnect [ 12]; 1197 ncrcmd disconnect0 [ 5]; 1198 ncrcmd disconnect1 [ 23]; 1199 ncrcmd msg_out [ 9]; 1200 ncrcmd msg_out_done [ 7]; 1201 ncrcmd badgetcc [ 6]; 1202 ncrcmd reselect [ 8]; 1203 ncrcmd reselect1 [ 8]; 1204 ncrcmd reselect2 [ 8]; 1205 ncrcmd resel_tmp [ 5]; 1206 ncrcmd resel_lun [ 18]; 1207 ncrcmd resel_tag [ 24]; 1208 ncrcmd data_in [MAX_SCATTER * 4 + 7]; 1209 ncrcmd data_out [MAX_SCATTER * 4 + 7]; 1210 }; 1211 1212 /* 1213 ** Script fragments which stay in main memory for all chips. 1214 */ 1215 struct scripth { 1216 ncrcmd tryloop [MAX_START*5+2]; 1217 ncrcmd msg_parity [ 6]; 1218 ncrcmd msg_reject [ 8]; 1219 ncrcmd msg_ign_residue [ 32]; 1220 ncrcmd msg_extended [ 18]; 1221 ncrcmd msg_ext_2 [ 18]; 1222 ncrcmd msg_wdtr [ 27]; 1223 ncrcmd msg_ext_3 [ 18]; 1224 ncrcmd msg_sdtr [ 27]; 1225 ncrcmd msg_out_abort [ 10]; 1226 ncrcmd getcc [ 4]; 1227 ncrcmd getcc1 [ 5]; 1228 #ifdef NCR_GETCC_WITHMSG 1229 ncrcmd getcc2 [ 29]; 1230 #else 1231 ncrcmd getcc2 [ 14]; 1232 #endif 1233 ncrcmd getcc3 [ 6]; 1234 ncrcmd aborttag [ 4]; 1235 ncrcmd abort [ 22]; 1236 ncrcmd snooptest [ 9]; 1237 ncrcmd snoopend [ 2]; 1238 }; 1239 1240 /*========================================================== 1241 ** 1242 ** 1243 ** Function headers. 1244 ** 1245 ** 1246 **========================================================== 1247 */ 1248 1249 #ifdef _KERNEL 1250 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun); 1251 static void ncr_complete (ncb_p np, nccb_p cp); 1252 static int ncr_delta (int * from, int * to); 1253 static void ncr_exception (ncb_p np); 1254 static void ncr_free_nccb (ncb_p np, nccb_p cp); 1255 static void ncr_freeze_devq (ncb_p np, struct cam_path *path); 1256 static void ncr_selectclock (ncb_p np, u_char scntl3); 1257 static void ncr_getclock (ncb_p np, u_char multiplier); 1258 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l); 1259 #if 0 1260 static u_int32_t ncr_info (int unit); 1261 #endif 1262 static void ncr_init (ncb_p np, char * msg, u_long code); 1263 static void ncr_intr (void *vnp); 1264 static void ncr_int_ma (ncb_p np, u_char dstat); 1265 static void ncr_int_sir (ncb_p np); 1266 static void ncr_int_sto (ncb_p np); 1267 #if 0 1268 static void ncr_min_phys (struct buf *bp); 1269 #endif 1270 static void ncr_poll (struct cam_sim *sim); 1271 static void ncb_profile (ncb_p np, nccb_p cp); 1272 static void ncr_script_copy_and_bind 1273 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len); 1274 static void ncr_script_fill (struct script * scr, struct scripth *scrh); 1275 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr, 1276 vm_size_t datalen); 1277 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, 1278 u_char *scntl3p); 1279 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer, 1280 u_char period); 1281 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack); 1282 static int ncr_show_msg (u_char * msg); 1283 static int ncr_snooptest (ncb_p np); 1284 static void ncr_action (struct cam_sim *sim, union ccb *ccb); 1285 static void ncr_timeout (void *arg); 1286 static void ncr_wakeup (ncb_p np, u_long code); 1287 1288 static int ncr_probe (device_t dev); 1289 static int ncr_attach (device_t dev); 1290 1291 #endif /* _KERNEL */ 1292 1293 /*========================================================== 1294 ** 1295 ** 1296 ** Global static data. 1297 ** 1298 ** 1299 **========================================================== 1300 */ 1301 1302 1303 /* 1304 * $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $ 1305 */ 1306 static const u_long ncr_version = NCR_VERSION * 11 1307 + (u_long) sizeof (struct ncb) * 7 1308 + (u_long) sizeof (struct nccb) * 5 1309 + (u_long) sizeof (struct lcb) * 3 1310 + (u_long) sizeof (struct tcb) * 2; 1311 1312 #ifdef _KERNEL 1313 1314 static int ncr_debug = SCSI_NCR_DEBUG; 1315 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, 1316 "Driver debug flags"); 1317 1318 static int ncr_cache; /* to be aligned _NOT_ static */ 1319 1320 /*========================================================== 1321 ** 1322 ** 1323 ** Global static data: auto configure 1324 ** 1325 ** 1326 **========================================================== 1327 */ 1328 1329 #define NCR_810_ID (0x00011000ul) 1330 #define NCR_815_ID (0x00041000ul) 1331 #define NCR_820_ID (0x00021000ul) 1332 #define NCR_825_ID (0x00031000ul) 1333 #define NCR_860_ID (0x00061000ul) 1334 #define NCR_875_ID (0x000f1000ul) 1335 #define NCR_875_ID2 (0x008f1000ul) 1336 #define NCR_885_ID (0x000d1000ul) 1337 #define NCR_895_ID (0x000c1000ul) 1338 #define NCR_896_ID (0x000b1000ul) 1339 #define NCR_895A_ID (0x00121000ul) 1340 #define NCR_1510D_ID (0x000a1000ul) 1341 1342 1343 static char *ncr_name (ncb_p np) 1344 { 1345 static char name[10]; 1346 ksnprintf(name, sizeof(name), "ncr%d", np->unit); 1347 return (name); 1348 } 1349 1350 /*========================================================== 1351 ** 1352 ** 1353 ** Scripts for NCR-Processor. 1354 ** 1355 ** Use ncr_script_bind for binding to physical addresses. 1356 ** 1357 ** 1358 **========================================================== 1359 ** 1360 ** NADDR generates a reference to a field of the controller data. 1361 ** PADDR generates a reference to another part of the script. 1362 ** RADDR generates a reference to a script processor register. 1363 ** FADDR generates a reference to a script processor register 1364 ** with offset. 1365 ** 1366 **---------------------------------------------------------- 1367 */ 1368 1369 #define RELOC_SOFTC 0x40000000 1370 #define RELOC_LABEL 0x50000000 1371 #define RELOC_REGISTER 0x60000000 1372 #define RELOC_KVAR 0x70000000 1373 #define RELOC_LABELH 0x80000000 1374 #define RELOC_MASK 0xf0000000 1375 1376 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 1377 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 1378 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 1379 #define RADDR(label) (RELOC_REGISTER | REG(label)) 1380 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 1381 #define KVAR(which) (RELOC_KVAR | (which)) 1382 1383 #define KVAR_SECOND (0) 1384 #define KVAR_TICKS (1) 1385 #define KVAR_NCR_CACHE (2) 1386 1387 #define SCRIPT_KVAR_FIRST (0) 1388 #define SCRIPT_KVAR_LAST (3) 1389 1390 /* 1391 * Kernel variables referenced in the scripts. 1392 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY. 1393 */ 1394 static void *script_kvars[] = 1395 { &time_second, &ticks, &ncr_cache }; 1396 1397 static struct script script0 = { 1398 /*--------------------------< START >-----------------------*/ { 1399 /* 1400 ** Claim to be still alive ... 1401 */ 1402 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)), 1403 KVAR (KVAR_SECOND), 1404 NADDR (heartbeat), 1405 /* 1406 ** Make data structure address invalid. 1407 ** clear SIGP. 1408 */ 1409 SCR_LOAD_REG (dsa, 0xff), 1410 0, 1411 SCR_FROM_REG (ctest2), 1412 0, 1413 }/*-------------------------< START0 >----------------------*/,{ 1414 /* 1415 ** Hook for interrupted GetConditionCode. 1416 ** Will be patched to ... IFTRUE by 1417 ** the interrupt handler. 1418 */ 1419 SCR_INT ^ IFFALSE (0), 1420 SIR_SENSE_RESTART, 1421 1422 }/*-------------------------< START1 >----------------------*/,{ 1423 /* 1424 ** Hook for stalled start queue. 1425 ** Will be patched to IFTRUE by the interrupt handler. 1426 */ 1427 SCR_INT ^ IFFALSE (0), 1428 SIR_STALL_RESTART, 1429 /* 1430 ** Then jump to a certain point in tryloop. 1431 ** Due to the lack of indirect addressing the code 1432 ** is self modifying here. 1433 */ 1434 SCR_JUMP, 1435 }/*-------------------------< STARTPOS >--------------------*/,{ 1436 PADDRH(tryloop), 1437 1438 }/*-------------------------< TRYSEL >----------------------*/,{ 1439 /* 1440 ** Now: 1441 ** DSA: Address of a Data Structure 1442 ** or Address of the IDLE-Label. 1443 ** 1444 ** TEMP: Address of a script, which tries to 1445 ** start the NEXT entry. 1446 ** 1447 ** Save the TEMP register into the SCRATCHA register. 1448 ** Then copy the DSA to TEMP and RETURN. 1449 ** This is kind of an indirect jump. 1450 ** (The script processor has NO stack, so the 1451 ** CALL is actually a jump and link, and the 1452 ** RETURN is an indirect jump.) 1453 ** 1454 ** If the slot was empty, DSA contains the address 1455 ** of the IDLE part of this script. The processor 1456 ** jumps to IDLE and waits for a reselect. 1457 ** It will wake up and try the same slot again 1458 ** after the SIGP bit becomes set by the host. 1459 ** 1460 ** If the slot was not empty, DSA contains 1461 ** the address of the phys-part of a nccb. 1462 ** The processor jumps to this address. 1463 ** phys starts with head, 1464 ** head starts with launch, 1465 ** so actually the processor jumps to 1466 ** the lauch part. 1467 ** If the entry is scheduled for execution, 1468 ** then launch contains a jump to SELECT. 1469 ** If it's not scheduled, it contains a jump to IDLE. 1470 */ 1471 SCR_COPY (4), 1472 RADDR (temp), 1473 RADDR (scratcha), 1474 SCR_COPY (4), 1475 RADDR (dsa), 1476 RADDR (temp), 1477 SCR_RETURN, 1478 0 1479 1480 }/*-------------------------< SKIP >------------------------*/,{ 1481 /* 1482 ** This entry has been canceled. 1483 ** Next time use the next slot. 1484 */ 1485 SCR_COPY (4), 1486 RADDR (scratcha), 1487 PADDR (startpos), 1488 /* 1489 ** patch the launch field. 1490 ** should look like an idle process. 1491 */ 1492 SCR_COPY_F (4), 1493 RADDR (dsa), 1494 PADDR (skip2), 1495 SCR_COPY (8), 1496 PADDR (idle), 1497 }/*-------------------------< SKIP2 >-----------------------*/,{ 1498 0, 1499 SCR_JUMP, 1500 PADDR(start), 1501 }/*-------------------------< IDLE >------------------------*/,{ 1502 /* 1503 ** Nothing to do? 1504 ** Wait for reselect. 1505 */ 1506 SCR_JUMP, 1507 PADDR(reselect), 1508 1509 }/*-------------------------< SELECT >----------------------*/,{ 1510 /* 1511 ** DSA contains the address of a scheduled 1512 ** data structure. 1513 ** 1514 ** SCRATCHA contains the address of the script, 1515 ** which starts the next entry. 1516 ** 1517 ** Set Initiator mode. 1518 ** 1519 ** (Target mode is left as an exercise for the reader) 1520 */ 1521 1522 SCR_CLR (SCR_TRG), 1523 0, 1524 SCR_LOAD_REG (HS_REG, 0xff), 1525 0, 1526 1527 /* 1528 ** And try to select this target. 1529 */ 1530 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 1531 PADDR (reselect), 1532 1533 /* 1534 ** Now there are 4 possibilities: 1535 ** 1536 ** (1) The ncr looses arbitration. 1537 ** This is ok, because it will try again, 1538 ** when the bus becomes idle. 1539 ** (But beware of the timeout function!) 1540 ** 1541 ** (2) The ncr is reselected. 1542 ** Then the script processor takes the jump 1543 ** to the RESELECT label. 1544 ** 1545 ** (3) The ncr completes the selection. 1546 ** Then it will execute the next statement. 1547 ** 1548 ** (4) There is a selection timeout. 1549 ** Then the ncr should interrupt the host and stop. 1550 ** Unfortunately, it seems to continue execution 1551 ** of the script. But it will fail with an 1552 ** IID-interrupt on the next WHEN. 1553 */ 1554 1555 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 1556 0, 1557 1558 /* 1559 ** Send the IDENTIFY and SIMPLE_TAG messages 1560 ** (and the MSG_EXT_SDTR message) 1561 */ 1562 SCR_MOVE_TBL ^ SCR_MSG_OUT, 1563 offsetof (struct dsb, smsg), 1564 #ifdef undef /* XXX better fail than try to deal with this ... */ 1565 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)), 1566 -16, 1567 #endif 1568 SCR_CLR (SCR_ATN), 1569 0, 1570 SCR_COPY (1), 1571 RADDR (sfbr), 1572 NADDR (lastmsg), 1573 /* 1574 ** Selection complete. 1575 ** Next time use the next slot. 1576 */ 1577 SCR_COPY (4), 1578 RADDR (scratcha), 1579 PADDR (startpos), 1580 }/*-------------------------< PREPARE >----------------------*/,{ 1581 /* 1582 ** The ncr doesn't have an indirect load 1583 ** or store command. So we have to 1584 ** copy part of the control block to a 1585 ** fixed place, where we can access it. 1586 ** 1587 ** We patch the address part of a 1588 ** COPY command with the DSA-register. 1589 */ 1590 SCR_COPY_F (4), 1591 RADDR (dsa), 1592 PADDR (loadpos), 1593 /* 1594 ** then we do the actual copy. 1595 */ 1596 SCR_COPY (sizeof (struct head)), 1597 /* 1598 ** continued after the next label ... 1599 */ 1600 1601 }/*-------------------------< LOADPOS >---------------------*/,{ 1602 0, 1603 NADDR (header), 1604 /* 1605 ** Mark this nccb as not scheduled. 1606 */ 1607 SCR_COPY (8), 1608 PADDR (idle), 1609 NADDR (header.launch), 1610 /* 1611 ** Set a time stamp for this selection 1612 */ 1613 SCR_COPY (sizeof (ticks)), 1614 KVAR (KVAR_TICKS), 1615 NADDR (header.stamp.select), 1616 /* 1617 ** load the savep (saved pointer) into 1618 ** the TEMP register (actual pointer) 1619 */ 1620 SCR_COPY (4), 1621 NADDR (header.savep), 1622 RADDR (temp), 1623 /* 1624 ** Initialize the status registers 1625 */ 1626 SCR_COPY (4), 1627 NADDR (header.status), 1628 RADDR (scr0), 1629 1630 }/*-------------------------< PREPARE2 >---------------------*/,{ 1631 /* 1632 ** Load the synchronous mode register 1633 */ 1634 SCR_COPY (1), 1635 NADDR (sync_st), 1636 RADDR (sxfer), 1637 /* 1638 ** Load the wide mode and timing register 1639 */ 1640 SCR_COPY (1), 1641 NADDR (wide_st), 1642 RADDR (scntl3), 1643 /* 1644 ** Initialize the msgout buffer with a NOOP message. 1645 */ 1646 SCR_LOAD_REG (scratcha, MSG_NOOP), 1647 0, 1648 SCR_COPY (1), 1649 RADDR (scratcha), 1650 NADDR (msgout), 1651 SCR_COPY (1), 1652 RADDR (scratcha), 1653 NADDR (msgin), 1654 /* 1655 ** Message in phase ? 1656 */ 1657 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 1658 PADDR (dispatch), 1659 /* 1660 ** Extended or reject message ? 1661 */ 1662 SCR_FROM_REG (sbdl), 1663 0, 1664 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)), 1665 PADDR (msg_in), 1666 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)), 1667 PADDRH (msg_reject), 1668 /* 1669 ** normal processing 1670 */ 1671 SCR_JUMP, 1672 PADDR (dispatch), 1673 }/*-------------------------< SETMSG >----------------------*/,{ 1674 SCR_COPY (1), 1675 RADDR (scratcha), 1676 NADDR (msgout), 1677 SCR_SET (SCR_ATN), 1678 0, 1679 }/*-------------------------< CLRACK >----------------------*/,{ 1680 /* 1681 ** Terminate possible pending message phase. 1682 */ 1683 SCR_CLR (SCR_ACK), 1684 0, 1685 1686 }/*-----------------------< DISPATCH >----------------------*/,{ 1687 SCR_FROM_REG (HS_REG), 1688 0, 1689 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 1690 SIR_NEGO_FAILED, 1691 /* 1692 ** remove bogus output signals 1693 */ 1694 SCR_REG_REG (socl, SCR_AND, CACK|CATN), 1695 0, 1696 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)), 1697 0, 1698 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)), 1699 0, 1700 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 1701 PADDR (msg_out), 1702 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)), 1703 PADDR (msg_in), 1704 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 1705 PADDR (command), 1706 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 1707 PADDR (status), 1708 /* 1709 ** Discard one illegal phase byte, if required. 1710 */ 1711 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 1712 0, 1713 SCR_COPY (1), 1714 RADDR (scratcha), 1715 NADDR (xerr_st), 1716 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 1717 8, 1718 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 1719 NADDR (scratch), 1720 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 1721 8, 1722 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 1723 NADDR (scratch), 1724 SCR_JUMP, 1725 PADDR (dispatch), 1726 1727 }/*-------------------------< NO_DATA >--------------------*/,{ 1728 /* 1729 ** The target wants to tranfer too much data 1730 ** or in the wrong direction. 1731 ** Remember that in extended error. 1732 */ 1733 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 1734 0, 1735 SCR_COPY (1), 1736 RADDR (scratcha), 1737 NADDR (xerr_st), 1738 /* 1739 ** Discard one data byte, if required. 1740 */ 1741 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 1742 8, 1743 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 1744 NADDR (scratch), 1745 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 1746 8, 1747 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 1748 NADDR (scratch), 1749 /* 1750 ** .. and repeat as required. 1751 */ 1752 SCR_CALL, 1753 PADDR (dispatch), 1754 SCR_JUMP, 1755 PADDR (no_data), 1756 }/*-------------------------< CHECKATN >--------------------*/,{ 1757 /* 1758 ** If AAP (bit 1 of scntl0 register) is set 1759 ** and a parity error is detected, 1760 ** the script processor asserts ATN. 1761 ** 1762 ** The target should switch to a MSG_OUT phase 1763 ** to get the message. 1764 */ 1765 SCR_FROM_REG (socl), 1766 0, 1767 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)), 1768 PADDR (dispatch), 1769 /* 1770 ** count it 1771 */ 1772 SCR_REG_REG (PS_REG, SCR_ADD, 1), 1773 0, 1774 /* 1775 ** Prepare a MSG_INITIATOR_DET_ERR message 1776 ** (initiator detected error). 1777 ** The target should retry the transfer. 1778 */ 1779 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR), 1780 0, 1781 SCR_JUMP, 1782 PADDR (setmsg), 1783 1784 }/*-------------------------< COMMAND >--------------------*/,{ 1785 /* 1786 ** If this is not a GETCC transfer ... 1787 */ 1788 SCR_FROM_REG (SS_REG), 1789 0, 1790 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1791 28, 1792 /* 1793 ** ... set a timestamp ... 1794 */ 1795 SCR_COPY (sizeof (ticks)), 1796 KVAR (KVAR_TICKS), 1797 NADDR (header.stamp.command), 1798 /* 1799 ** ... and send the command 1800 */ 1801 SCR_MOVE_TBL ^ SCR_COMMAND, 1802 offsetof (struct dsb, cmd), 1803 SCR_JUMP, 1804 PADDR (dispatch), 1805 /* 1806 ** Send the GETCC command 1807 */ 1808 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND, 1809 offsetof (struct dsb, scmd), 1810 SCR_JUMP, 1811 PADDR (dispatch), 1812 1813 }/*-------------------------< STATUS >--------------------*/,{ 1814 /* 1815 ** set the timestamp. 1816 */ 1817 SCR_COPY (sizeof (ticks)), 1818 KVAR (KVAR_TICKS), 1819 NADDR (header.stamp.status), 1820 /* 1821 ** If this is a GETCC transfer, 1822 */ 1823 SCR_FROM_REG (SS_REG), 1824 0, 1825 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)), 1826 40, 1827 /* 1828 ** get the status 1829 */ 1830 SCR_MOVE_ABS (1) ^ SCR_STATUS, 1831 NADDR (scratch), 1832 /* 1833 ** Save status to scsi_status. 1834 ** Mark as complete. 1835 ** And wait for disconnect. 1836 */ 1837 SCR_TO_REG (SS_REG), 1838 0, 1839 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE), 1840 0, 1841 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1842 0, 1843 SCR_JUMP, 1844 PADDR (checkatn), 1845 /* 1846 ** If it was no GETCC transfer, 1847 ** save the status to scsi_status. 1848 */ 1849 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS, 1850 NADDR (scratch), 1851 SCR_TO_REG (SS_REG), 1852 0, 1853 /* 1854 ** if it was no check condition ... 1855 */ 1856 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1857 PADDR (checkatn), 1858 /* 1859 ** ... mark as complete. 1860 */ 1861 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1862 0, 1863 SCR_JUMP, 1864 PADDR (checkatn), 1865 1866 }/*-------------------------< MSG_IN >--------------------*/,{ 1867 /* 1868 ** Get the first byte of the message 1869 ** and save it to SCRATCHA. 1870 ** 1871 ** The script processor doesn't negate the 1872 ** ACK signal after this transfer. 1873 */ 1874 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 1875 NADDR (msgin[0]), 1876 /* 1877 ** Check for message parity error. 1878 */ 1879 SCR_TO_REG (scratcha), 1880 0, 1881 SCR_FROM_REG (socl), 1882 0, 1883 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 1884 PADDRH (msg_parity), 1885 SCR_FROM_REG (scratcha), 1886 0, 1887 /* 1888 ** Parity was ok, handle this message. 1889 */ 1890 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)), 1891 PADDR (complete), 1892 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)), 1893 PADDR (save_dp), 1894 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)), 1895 PADDR (restore_dp), 1896 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)), 1897 PADDR (disconnect), 1898 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)), 1899 PADDRH (msg_extended), 1900 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)), 1901 PADDR (clrack), 1902 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)), 1903 PADDRH (msg_reject), 1904 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)), 1905 PADDRH (msg_ign_residue), 1906 /* 1907 ** Rest of the messages left as 1908 ** an exercise ... 1909 ** 1910 ** Unimplemented messages: 1911 ** fall through to MSG_BAD. 1912 */ 1913 }/*-------------------------< MSG_BAD >------------------*/,{ 1914 /* 1915 ** unimplemented message - reject it. 1916 */ 1917 SCR_INT, 1918 SIR_REJECT_SENT, 1919 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT), 1920 0, 1921 SCR_JUMP, 1922 PADDR (setmsg), 1923 1924 }/*-------------------------< COMPLETE >-----------------*/,{ 1925 /* 1926 ** Complete message. 1927 ** 1928 ** If it's not the get condition code, 1929 ** copy TEMP register to LASTP in header. 1930 */ 1931 SCR_FROM_REG (SS_REG), 1932 0, 1933 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)), 1934 12, 1935 SCR_COPY (4), 1936 RADDR (temp), 1937 NADDR (header.lastp), 1938 /*>>>*/ /* 1939 ** When we terminate the cycle by clearing ACK, 1940 ** the target may disconnect immediately. 1941 ** 1942 ** We don't want to be told of an 1943 ** "unexpected disconnect", 1944 ** so we disable this feature. 1945 */ 1946 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 1947 0, 1948 /* 1949 ** Terminate cycle ... 1950 */ 1951 SCR_CLR (SCR_ACK|SCR_ATN), 1952 0, 1953 /* 1954 ** ... and wait for the disconnect. 1955 */ 1956 SCR_WAIT_DISC, 1957 0, 1958 }/*-------------------------< CLEANUP >-------------------*/,{ 1959 /* 1960 ** dsa: Pointer to nccb 1961 ** or xxxxxxFF (no nccb) 1962 ** 1963 ** HS_REG: Host-Status (<>0!) 1964 */ 1965 SCR_FROM_REG (dsa), 1966 0, 1967 SCR_JUMP ^ IFTRUE (DATA (0xff)), 1968 PADDR (signal), 1969 /* 1970 ** dsa is valid. 1971 ** save the status registers 1972 */ 1973 SCR_COPY (4), 1974 RADDR (scr0), 1975 NADDR (header.status), 1976 /* 1977 ** and copy back the header to the nccb. 1978 */ 1979 SCR_COPY_F (4), 1980 RADDR (dsa), 1981 PADDR (cleanup0), 1982 SCR_COPY (sizeof (struct head)), 1983 NADDR (header), 1984 }/*-------------------------< CLEANUP0 >--------------------*/,{ 1985 0, 1986 1987 /* 1988 ** If command resulted in "check condition" 1989 ** status and is not yet completed, 1990 ** try to get the condition code. 1991 */ 1992 SCR_FROM_REG (HS_REG), 1993 0, 1994 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 1995 16, 1996 SCR_FROM_REG (SS_REG), 1997 0, 1998 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1999 PADDRH(getcc2), 2000 }/*-------------------------< SIGNAL >----------------------*/,{ 2001 /* 2002 ** if status = queue full, 2003 ** reinsert in startqueue and stall queue. 2004 */ 2005 /*>>>*/ SCR_FROM_REG (SS_REG), 2006 0, 2007 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)), 2008 SIR_STALL_QUEUE, 2009 /* 2010 ** And make the DSA register invalid. 2011 */ 2012 SCR_LOAD_REG (dsa, 0xff), /* invalid */ 2013 0, 2014 /* 2015 ** if job completed ... 2016 */ 2017 SCR_FROM_REG (HS_REG), 2018 0, 2019 /* 2020 ** ... signal completion to the host 2021 */ 2022 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)), 2023 0, 2024 /* 2025 ** Auf zu neuen Schandtaten! 2026 */ 2027 SCR_JUMP, 2028 PADDR(start), 2029 2030 }/*-------------------------< SAVE_DP >------------------*/,{ 2031 /* 2032 ** SAVE_DP message: 2033 ** Copy TEMP register to SAVEP in header. 2034 */ 2035 SCR_COPY (4), 2036 RADDR (temp), 2037 NADDR (header.savep), 2038 SCR_JUMP, 2039 PADDR (clrack), 2040 }/*-------------------------< RESTORE_DP >---------------*/,{ 2041 /* 2042 ** RESTORE_DP message: 2043 ** Copy SAVEP in header to TEMP register. 2044 */ 2045 SCR_COPY (4), 2046 NADDR (header.savep), 2047 RADDR (temp), 2048 SCR_JUMP, 2049 PADDR (clrack), 2050 2051 }/*-------------------------< DISCONNECT >---------------*/,{ 2052 /* 2053 ** If QUIRK_AUTOSAVE is set, 2054 ** do an "save pointer" operation. 2055 */ 2056 SCR_FROM_REG (QU_REG), 2057 0, 2058 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)), 2059 12, 2060 /* 2061 ** like SAVE_DP message: 2062 ** Copy TEMP register to SAVEP in header. 2063 */ 2064 SCR_COPY (4), 2065 RADDR (temp), 2066 NADDR (header.savep), 2067 /*>>>*/ /* 2068 ** Check if temp==savep or temp==goalp: 2069 ** if not, log a missing save pointer message. 2070 ** In fact, it's a comparison mod 256. 2071 ** 2072 ** Hmmm, I hadn't thought that I would be urged to 2073 ** write this kind of ugly self modifying code. 2074 ** 2075 ** It's unbelievable, but the ncr53c8xx isn't able 2076 ** to subtract one register from another. 2077 */ 2078 SCR_FROM_REG (temp), 2079 0, 2080 /* 2081 ** You are not expected to understand this .. 2082 ** 2083 ** CAUTION: only little endian architectures supported! XXX 2084 */ 2085 SCR_COPY_F (1), 2086 NADDR (header.savep), 2087 PADDR (disconnect0), 2088 }/*-------------------------< DISCONNECT0 >--------------*/,{ 2089 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)), 2090 20, 2091 /* 2092 ** neither this 2093 */ 2094 SCR_COPY_F (1), 2095 NADDR (header.goalp), 2096 PADDR (disconnect1), 2097 }/*-------------------------< DISCONNECT1 >--------------*/,{ 2098 SCR_INT ^ IFFALSE (DATA (1)), 2099 SIR_MISSING_SAVE, 2100 /*>>>*/ 2101 2102 /* 2103 ** DISCONNECTing ... 2104 ** 2105 ** disable the "unexpected disconnect" feature, 2106 ** and remove the ACK signal. 2107 */ 2108 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2109 0, 2110 SCR_CLR (SCR_ACK|SCR_ATN), 2111 0, 2112 /* 2113 ** Wait for the disconnect. 2114 */ 2115 SCR_WAIT_DISC, 2116 0, 2117 /* 2118 ** Profiling: 2119 ** Set a time stamp, 2120 ** and count the disconnects. 2121 */ 2122 SCR_COPY (sizeof (ticks)), 2123 KVAR (KVAR_TICKS), 2124 NADDR (header.stamp.disconnect), 2125 SCR_COPY (4), 2126 NADDR (disc_phys), 2127 RADDR (temp), 2128 SCR_REG_REG (temp, SCR_ADD, 0x01), 2129 0, 2130 SCR_COPY (4), 2131 RADDR (temp), 2132 NADDR (disc_phys), 2133 /* 2134 ** Status is: DISCONNECTED. 2135 */ 2136 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2137 0, 2138 SCR_JUMP, 2139 PADDR (cleanup), 2140 2141 }/*-------------------------< MSG_OUT >-------------------*/,{ 2142 /* 2143 ** The target requests a message. 2144 */ 2145 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2146 NADDR (msgout), 2147 SCR_COPY (1), 2148 RADDR (sfbr), 2149 NADDR (lastmsg), 2150 /* 2151 ** If it was no ABORT message ... 2152 */ 2153 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)), 2154 PADDRH (msg_out_abort), 2155 /* 2156 ** ... wait for the next phase 2157 ** if it's a message out, send it again, ... 2158 */ 2159 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2160 PADDR (msg_out), 2161 }/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2162 /* 2163 ** ... else clear the message ... 2164 */ 2165 SCR_LOAD_REG (scratcha, MSG_NOOP), 2166 0, 2167 SCR_COPY (4), 2168 RADDR (scratcha), 2169 NADDR (msgout), 2170 /* 2171 ** ... and process the next phase 2172 */ 2173 SCR_JUMP, 2174 PADDR (dispatch), 2175 2176 }/*------------------------< BADGETCC >---------------------*/,{ 2177 /* 2178 ** If SIGP was set, clear it and try again. 2179 */ 2180 SCR_FROM_REG (ctest2), 2181 0, 2182 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2183 PADDRH (getcc2), 2184 SCR_INT, 2185 SIR_SENSE_FAILED, 2186 }/*-------------------------< RESELECT >--------------------*/,{ 2187 /* 2188 ** This NOP will be patched with LED OFF 2189 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2190 */ 2191 SCR_NO_OP, 2192 0, 2193 2194 /* 2195 ** make the DSA invalid. 2196 */ 2197 SCR_LOAD_REG (dsa, 0xff), 2198 0, 2199 SCR_CLR (SCR_TRG), 2200 0, 2201 /* 2202 ** Sleep waiting for a reselection. 2203 ** If SIGP is set, special treatment. 2204 ** 2205 ** Zu allem bereit .. 2206 */ 2207 SCR_WAIT_RESEL, 2208 PADDR(reselect2), 2209 }/*-------------------------< RESELECT1 >--------------------*/,{ 2210 /* 2211 ** This NOP will be patched with LED ON 2212 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2213 */ 2214 SCR_NO_OP, 2215 0, 2216 /* 2217 ** ... zu nichts zu gebrauchen ? 2218 ** 2219 ** load the target id into the SFBR 2220 ** and jump to the control block. 2221 ** 2222 ** Look at the declarations of 2223 ** - struct ncb 2224 ** - struct tcb 2225 ** - struct lcb 2226 ** - struct nccb 2227 ** to understand what's going on. 2228 */ 2229 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2230 0, 2231 SCR_TO_REG (sdid), 2232 0, 2233 SCR_JUMP, 2234 NADDR (jump_tcb), 2235 }/*-------------------------< RESELECT2 >-------------------*/,{ 2236 /* 2237 ** This NOP will be patched with LED ON 2238 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2239 */ 2240 SCR_NO_OP, 2241 0, 2242 /* 2243 ** If it's not connected :( 2244 ** -> interrupted by SIGP bit. 2245 ** Jump to start. 2246 */ 2247 SCR_FROM_REG (ctest2), 2248 0, 2249 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2250 PADDR (start), 2251 SCR_JUMP, 2252 PADDR (reselect), 2253 2254 }/*-------------------------< RESEL_TMP >-------------------*/,{ 2255 /* 2256 ** The return address in TEMP 2257 ** is in fact the data structure address, 2258 ** so copy it to the DSA register. 2259 */ 2260 SCR_COPY (4), 2261 RADDR (temp), 2262 RADDR (dsa), 2263 SCR_JUMP, 2264 PADDR (prepare), 2265 2266 }/*-------------------------< RESEL_LUN >-------------------*/,{ 2267 /* 2268 ** come back to this point 2269 ** to get an IDENTIFY message 2270 ** Wait for a msg_in phase. 2271 */ 2272 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2273 48, 2274 /* 2275 ** message phase 2276 ** It's not a sony, it's a trick: 2277 ** read the data without acknowledging it. 2278 */ 2279 SCR_FROM_REG (sbdl), 2280 0, 2281 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)), 2282 32, 2283 /* 2284 ** It WAS an Identify message. 2285 ** get it and ack it! 2286 */ 2287 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2288 NADDR (msgin), 2289 SCR_CLR (SCR_ACK), 2290 0, 2291 /* 2292 ** Mask out the lun. 2293 */ 2294 SCR_REG_REG (sfbr, SCR_AND, 0x07), 2295 0, 2296 SCR_RETURN, 2297 0, 2298 /* 2299 ** No message phase or no IDENTIFY message: 2300 ** return 0. 2301 */ 2302 /*>>>*/ SCR_LOAD_SFBR (0), 2303 0, 2304 SCR_RETURN, 2305 0, 2306 2307 }/*-------------------------< RESEL_TAG >-------------------*/,{ 2308 /* 2309 ** come back to this point 2310 ** to get a SIMPLE_TAG message 2311 ** Wait for a MSG_IN phase. 2312 */ 2313 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2314 64, 2315 /* 2316 ** message phase 2317 ** It's a trick - read the data 2318 ** without acknowledging it. 2319 */ 2320 SCR_FROM_REG (sbdl), 2321 0, 2322 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)), 2323 48, 2324 /* 2325 ** It WAS a SIMPLE_TAG message. 2326 ** get it and ack it! 2327 */ 2328 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2329 NADDR (msgin), 2330 SCR_CLR (SCR_ACK), 2331 0, 2332 /* 2333 ** Wait for the second byte (the tag) 2334 */ 2335 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2336 24, 2337 /* 2338 ** Get it and ack it! 2339 */ 2340 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2341 NADDR (msgin), 2342 SCR_CLR (SCR_ACK|SCR_CARRY), 2343 0, 2344 SCR_RETURN, 2345 0, 2346 /* 2347 ** No message phase or no SIMPLE_TAG message 2348 ** or no second byte: return 0. 2349 */ 2350 /*>>>*/ SCR_LOAD_SFBR (0), 2351 0, 2352 SCR_SET (SCR_CARRY), 2353 0, 2354 SCR_RETURN, 2355 0, 2356 2357 }/*-------------------------< DATA_IN >--------------------*/,{ 2358 /* 2359 ** Because the size depends on the 2360 ** #define MAX_SCATTER parameter, 2361 ** it is filled in at runtime. 2362 ** 2363 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2364 ** PADDR (no_data), 2365 ** SCR_COPY (sizeof (ticks)), 2366 ** KVAR (KVAR_TICKS), 2367 ** NADDR (header.stamp.data), 2368 ** SCR_MOVE_TBL ^ SCR_DATA_IN, 2369 ** offsetof (struct dsb, data[ 0]), 2370 ** 2371 ** ##===========< i=1; i<MAX_SCATTER >========= 2372 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2373 ** || PADDR (checkatn), 2374 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2375 ** || offsetof (struct dsb, data[ i]), 2376 ** ##========================================== 2377 ** 2378 ** SCR_CALL, 2379 ** PADDR (checkatn), 2380 ** SCR_JUMP, 2381 ** PADDR (no_data), 2382 */ 2383 0 2384 }/*-------------------------< DATA_OUT >-------------------*/,{ 2385 /* 2386 ** Because the size depends on the 2387 ** #define MAX_SCATTER parameter, 2388 ** it is filled in at runtime. 2389 ** 2390 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2391 ** PADDR (no_data), 2392 ** SCR_COPY (sizeof (ticks)), 2393 ** KVAR (KVAR_TICKS), 2394 ** NADDR (header.stamp.data), 2395 ** SCR_MOVE_TBL ^ SCR_DATA_OUT, 2396 ** offsetof (struct dsb, data[ 0]), 2397 ** 2398 ** ##===========< i=1; i<MAX_SCATTER >========= 2399 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2400 ** || PADDR (dispatch), 2401 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2402 ** || offsetof (struct dsb, data[ i]), 2403 ** ##========================================== 2404 ** 2405 ** SCR_CALL, 2406 ** PADDR (dispatch), 2407 ** SCR_JUMP, 2408 ** PADDR (no_data), 2409 ** 2410 **--------------------------------------------------------- 2411 */ 2412 (u_long)0 2413 2414 }/*--------------------------------------------------------*/ 2415 }; 2416 2417 2418 static struct scripth scripth0 = { 2419 /*-------------------------< TRYLOOP >---------------------*/{ 2420 /* 2421 ** Load an entry of the start queue into dsa 2422 ** and try to start it by jumping to TRYSEL. 2423 ** 2424 ** Because the size depends on the 2425 ** #define MAX_START parameter, it is filled 2426 ** in at runtime. 2427 ** 2428 **----------------------------------------------------------- 2429 ** 2430 ** ##===========< I=0; i<MAX_START >=========== 2431 ** || SCR_COPY (4), 2432 ** || NADDR (squeue[i]), 2433 ** || RADDR (dsa), 2434 ** || SCR_CALL, 2435 ** || PADDR (trysel), 2436 ** ##========================================== 2437 ** 2438 ** SCR_JUMP, 2439 ** PADDRH(tryloop), 2440 ** 2441 **----------------------------------------------------------- 2442 */ 2443 0 2444 }/*-------------------------< MSG_PARITY >---------------*/,{ 2445 /* 2446 ** count it 2447 */ 2448 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2449 0, 2450 /* 2451 ** send a "message parity error" message. 2452 */ 2453 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR), 2454 0, 2455 SCR_JUMP, 2456 PADDR (setmsg), 2457 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{ 2458 /* 2459 ** If a negotiation was in progress, 2460 ** negotiation failed. 2461 */ 2462 SCR_FROM_REG (HS_REG), 2463 0, 2464 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2465 SIR_NEGO_FAILED, 2466 /* 2467 ** else make host log this message 2468 */ 2469 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2470 SIR_REJECT_RECEIVED, 2471 SCR_JUMP, 2472 PADDR (clrack), 2473 2474 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2475 /* 2476 ** Terminate cycle 2477 */ 2478 SCR_CLR (SCR_ACK), 2479 0, 2480 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2481 PADDR (dispatch), 2482 /* 2483 ** get residue size. 2484 */ 2485 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2486 NADDR (msgin[1]), 2487 /* 2488 ** Check for message parity error. 2489 */ 2490 SCR_TO_REG (scratcha), 2491 0, 2492 SCR_FROM_REG (socl), 2493 0, 2494 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2495 PADDRH (msg_parity), 2496 SCR_FROM_REG (scratcha), 2497 0, 2498 /* 2499 ** Size is 0 .. ignore message. 2500 */ 2501 SCR_JUMP ^ IFTRUE (DATA (0)), 2502 PADDR (clrack), 2503 /* 2504 ** Size is not 1 .. have to interrupt. 2505 */ 2506 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)), 2507 40, 2508 /* 2509 ** Check for residue byte in swide register 2510 */ 2511 SCR_FROM_REG (scntl2), 2512 0, 2513 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2514 16, 2515 /* 2516 ** There IS data in the swide register. 2517 ** Discard it. 2518 */ 2519 SCR_REG_REG (scntl2, SCR_OR, WSR), 2520 0, 2521 SCR_JUMP, 2522 PADDR (clrack), 2523 /* 2524 ** Load again the size to the sfbr register. 2525 */ 2526 /*>>>*/ SCR_FROM_REG (scratcha), 2527 0, 2528 /*>>>*/ SCR_INT, 2529 SIR_IGN_RESIDUE, 2530 SCR_JUMP, 2531 PADDR (clrack), 2532 2533 }/*-------------------------< MSG_EXTENDED >-------------*/,{ 2534 /* 2535 ** Terminate cycle 2536 */ 2537 SCR_CLR (SCR_ACK), 2538 0, 2539 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2540 PADDR (dispatch), 2541 /* 2542 ** get length. 2543 */ 2544 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2545 NADDR (msgin[1]), 2546 /* 2547 ** Check for message parity error. 2548 */ 2549 SCR_TO_REG (scratcha), 2550 0, 2551 SCR_FROM_REG (socl), 2552 0, 2553 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2554 PADDRH (msg_parity), 2555 SCR_FROM_REG (scratcha), 2556 0, 2557 /* 2558 */ 2559 SCR_JUMP ^ IFTRUE (DATA (3)), 2560 PADDRH (msg_ext_3), 2561 SCR_JUMP ^ IFFALSE (DATA (2)), 2562 PADDR (msg_bad), 2563 }/*-------------------------< MSG_EXT_2 >----------------*/,{ 2564 SCR_CLR (SCR_ACK), 2565 0, 2566 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2567 PADDR (dispatch), 2568 /* 2569 ** get extended message code. 2570 */ 2571 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2572 NADDR (msgin[2]), 2573 /* 2574 ** Check for message parity error. 2575 */ 2576 SCR_TO_REG (scratcha), 2577 0, 2578 SCR_FROM_REG (socl), 2579 0, 2580 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2581 PADDRH (msg_parity), 2582 SCR_FROM_REG (scratcha), 2583 0, 2584 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)), 2585 PADDRH (msg_wdtr), 2586 /* 2587 ** unknown extended message 2588 */ 2589 SCR_JUMP, 2590 PADDR (msg_bad) 2591 }/*-------------------------< MSG_WDTR >-----------------*/,{ 2592 SCR_CLR (SCR_ACK), 2593 0, 2594 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2595 PADDR (dispatch), 2596 /* 2597 ** get data bus width 2598 */ 2599 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2600 NADDR (msgin[3]), 2601 SCR_FROM_REG (socl), 2602 0, 2603 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2604 PADDRH (msg_parity), 2605 /* 2606 ** let the host do the real work. 2607 */ 2608 SCR_INT, 2609 SIR_NEGO_WIDE, 2610 /* 2611 ** let the target fetch our answer. 2612 */ 2613 SCR_SET (SCR_ATN), 2614 0, 2615 SCR_CLR (SCR_ACK), 2616 0, 2617 2618 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2619 SIR_NEGO_PROTO, 2620 /* 2621 ** Send the MSG_EXT_WDTR 2622 */ 2623 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 2624 NADDR (msgout), 2625 SCR_CLR (SCR_ATN), 2626 0, 2627 SCR_COPY (1), 2628 RADDR (sfbr), 2629 NADDR (lastmsg), 2630 SCR_JUMP, 2631 PADDR (msg_out_done), 2632 2633 }/*-------------------------< MSG_EXT_3 >----------------*/,{ 2634 SCR_CLR (SCR_ACK), 2635 0, 2636 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2637 PADDR (dispatch), 2638 /* 2639 ** get extended message code. 2640 */ 2641 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2642 NADDR (msgin[2]), 2643 /* 2644 ** Check for message parity error. 2645 */ 2646 SCR_TO_REG (scratcha), 2647 0, 2648 SCR_FROM_REG (socl), 2649 0, 2650 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2651 PADDRH (msg_parity), 2652 SCR_FROM_REG (scratcha), 2653 0, 2654 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)), 2655 PADDRH (msg_sdtr), 2656 /* 2657 ** unknown extended message 2658 */ 2659 SCR_JUMP, 2660 PADDR (msg_bad) 2661 2662 }/*-------------------------< MSG_SDTR >-----------------*/,{ 2663 SCR_CLR (SCR_ACK), 2664 0, 2665 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2666 PADDR (dispatch), 2667 /* 2668 ** get period and offset 2669 */ 2670 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 2671 NADDR (msgin[3]), 2672 SCR_FROM_REG (socl), 2673 0, 2674 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2675 PADDRH (msg_parity), 2676 /* 2677 ** let the host do the real work. 2678 */ 2679 SCR_INT, 2680 SIR_NEGO_SYNC, 2681 /* 2682 ** let the target fetch our answer. 2683 */ 2684 SCR_SET (SCR_ATN), 2685 0, 2686 SCR_CLR (SCR_ACK), 2687 0, 2688 2689 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2690 SIR_NEGO_PROTO, 2691 /* 2692 ** Send the MSG_EXT_SDTR 2693 */ 2694 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 2695 NADDR (msgout), 2696 SCR_CLR (SCR_ATN), 2697 0, 2698 SCR_COPY (1), 2699 RADDR (sfbr), 2700 NADDR (lastmsg), 2701 SCR_JUMP, 2702 PADDR (msg_out_done), 2703 2704 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 2705 /* 2706 ** After ABORT message, 2707 ** 2708 ** expect an immediate disconnect, ... 2709 */ 2710 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2711 0, 2712 SCR_CLR (SCR_ACK|SCR_ATN), 2713 0, 2714 SCR_WAIT_DISC, 2715 0, 2716 /* 2717 ** ... and set the status to "ABORTED" 2718 */ 2719 SCR_LOAD_REG (HS_REG, HS_ABORTED), 2720 0, 2721 SCR_JUMP, 2722 PADDR (cleanup), 2723 2724 }/*-------------------------< GETCC >-----------------------*/,{ 2725 /* 2726 ** The ncr doesn't have an indirect load 2727 ** or store command. So we have to 2728 ** copy part of the control block to a 2729 ** fixed place, where we can modify it. 2730 ** 2731 ** We patch the address part of a COPY command 2732 ** with the address of the dsa register ... 2733 */ 2734 SCR_COPY_F (4), 2735 RADDR (dsa), 2736 PADDRH (getcc1), 2737 /* 2738 ** ... then we do the actual copy. 2739 */ 2740 SCR_COPY (sizeof (struct head)), 2741 }/*-------------------------< GETCC1 >----------------------*/,{ 2742 0, 2743 NADDR (header), 2744 /* 2745 ** Initialize the status registers 2746 */ 2747 SCR_COPY (4), 2748 NADDR (header.status), 2749 RADDR (scr0), 2750 }/*-------------------------< GETCC2 >----------------------*/,{ 2751 /* 2752 ** Get the condition code from a target. 2753 ** 2754 ** DSA points to a data structure. 2755 ** Set TEMP to the script location 2756 ** that receives the condition code. 2757 ** 2758 ** Because there is no script command 2759 ** to load a longword into a register, 2760 ** we use a CALL command. 2761 */ 2762 /*<<<*/ SCR_CALLR, 2763 24, 2764 /* 2765 ** Get the condition code. 2766 */ 2767 SCR_MOVE_TBL ^ SCR_DATA_IN, 2768 offsetof (struct dsb, sense), 2769 /* 2770 ** No data phase may follow! 2771 */ 2772 SCR_CALL, 2773 PADDR (checkatn), 2774 SCR_JUMP, 2775 PADDR (no_data), 2776 /*>>>*/ 2777 2778 /* 2779 ** The CALL jumps to this point. 2780 ** Prepare for a RESTORE_POINTER message. 2781 ** Save the TEMP register into the saved pointer. 2782 */ 2783 SCR_COPY (4), 2784 RADDR (temp), 2785 NADDR (header.savep), 2786 /* 2787 ** Load scratcha, because in case of a selection timeout, 2788 ** the host will expect a new value for startpos in 2789 ** the scratcha register. 2790 */ 2791 SCR_COPY (4), 2792 PADDR (startpos), 2793 RADDR (scratcha), 2794 #ifdef NCR_GETCC_WITHMSG 2795 /* 2796 ** If QUIRK_NOMSG is set, select without ATN. 2797 ** and don't send a message. 2798 */ 2799 SCR_FROM_REG (QU_REG), 2800 0, 2801 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)), 2802 PADDRH(getcc3), 2803 /* 2804 ** Then try to connect to the target. 2805 ** If we are reselected, special treatment 2806 ** of the current job is required before 2807 ** accepting the reselection. 2808 */ 2809 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2810 PADDR(badgetcc), 2811 /* 2812 ** Send the IDENTIFY message. 2813 ** In case of short transfer, remove ATN. 2814 */ 2815 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2816 offsetof (struct dsb, smsg2), 2817 SCR_CLR (SCR_ATN), 2818 0, 2819 /* 2820 ** save the first byte of the message. 2821 */ 2822 SCR_COPY (1), 2823 RADDR (sfbr), 2824 NADDR (lastmsg), 2825 SCR_JUMP, 2826 PADDR (prepare2), 2827 2828 #endif 2829 }/*-------------------------< GETCC3 >----------------------*/,{ 2830 /* 2831 ** Try to connect to the target. 2832 ** If we are reselected, special treatment 2833 ** of the current job is required before 2834 ** accepting the reselection. 2835 ** 2836 ** Silly target won't accept a message. 2837 ** Select without ATN. 2838 */ 2839 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2840 PADDR(badgetcc), 2841 /* 2842 ** Force error if selection timeout 2843 */ 2844 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 2845 0, 2846 /* 2847 ** don't negotiate. 2848 */ 2849 SCR_JUMP, 2850 PADDR (prepare2), 2851 }/*-------------------------< ABORTTAG >-------------------*/,{ 2852 /* 2853 ** Abort a bad reselection. 2854 ** Set the message to ABORT vs. ABORT_TAG 2855 */ 2856 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG), 2857 0, 2858 SCR_JUMPR ^ IFFALSE (CARRYSET), 2859 8, 2860 }/*-------------------------< ABORT >----------------------*/,{ 2861 SCR_LOAD_REG (scratcha, MSG_ABORT), 2862 0, 2863 SCR_COPY (1), 2864 RADDR (scratcha), 2865 NADDR (msgout), 2866 SCR_SET (SCR_ATN), 2867 0, 2868 SCR_CLR (SCR_ACK), 2869 0, 2870 /* 2871 ** and send it. 2872 ** we expect an immediate disconnect 2873 */ 2874 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2875 0, 2876 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2877 NADDR (msgout), 2878 SCR_COPY (1), 2879 RADDR (sfbr), 2880 NADDR (lastmsg), 2881 SCR_CLR (SCR_ACK|SCR_ATN), 2882 0, 2883 SCR_WAIT_DISC, 2884 0, 2885 SCR_JUMP, 2886 PADDR (start), 2887 }/*-------------------------< SNOOPTEST >-------------------*/,{ 2888 /* 2889 ** Read the variable. 2890 */ 2891 SCR_COPY (4), 2892 KVAR (KVAR_NCR_CACHE), 2893 RADDR (scratcha), 2894 /* 2895 ** Write the variable. 2896 */ 2897 SCR_COPY (4), 2898 RADDR (temp), 2899 KVAR (KVAR_NCR_CACHE), 2900 /* 2901 ** Read back the variable. 2902 */ 2903 SCR_COPY (4), 2904 KVAR (KVAR_NCR_CACHE), 2905 RADDR (temp), 2906 }/*-------------------------< SNOOPEND >-------------------*/,{ 2907 /* 2908 ** And stop. 2909 */ 2910 SCR_INT, 2911 99, 2912 }/*--------------------------------------------------------*/ 2913 }; 2914 2915 2916 /*========================================================== 2917 ** 2918 ** 2919 ** Fill in #define dependent parts of the script 2920 ** 2921 ** 2922 **========================================================== 2923 */ 2924 2925 void ncr_script_fill (struct script * scr, struct scripth * scrh) 2926 { 2927 int i; 2928 ncrcmd *p; 2929 2930 p = scrh->tryloop; 2931 for (i=0; i<MAX_START; i++) { 2932 *p++ =SCR_COPY (4); 2933 *p++ =NADDR (squeue[i]); 2934 *p++ =RADDR (dsa); 2935 *p++ =SCR_CALL; 2936 *p++ =PADDR (trysel); 2937 }; 2938 *p++ =SCR_JUMP; 2939 *p++ =PADDRH(tryloop); 2940 2941 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop)); 2942 2943 p = scr->data_in; 2944 2945 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)); 2946 *p++ =PADDR (no_data); 2947 *p++ =SCR_COPY (sizeof (ticks)); 2948 *p++ =(ncrcmd) KVAR (KVAR_TICKS); 2949 *p++ =NADDR (header.stamp.data); 2950 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 2951 *p++ =offsetof (struct dsb, data[ 0]); 2952 2953 for (i=1; i<MAX_SCATTER; i++) { 2954 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 2955 *p++ =PADDR (checkatn); 2956 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 2957 *p++ =offsetof (struct dsb, data[i]); 2958 }; 2959 2960 *p++ =SCR_CALL; 2961 *p++ =PADDR (checkatn); 2962 *p++ =SCR_JUMP; 2963 *p++ =PADDR (no_data); 2964 2965 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in)); 2966 2967 p = scr->data_out; 2968 2969 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)); 2970 *p++ =PADDR (no_data); 2971 *p++ =SCR_COPY (sizeof (ticks)); 2972 *p++ =(ncrcmd) KVAR (KVAR_TICKS); 2973 *p++ =NADDR (header.stamp.data); 2974 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 2975 *p++ =offsetof (struct dsb, data[ 0]); 2976 2977 for (i=1; i<MAX_SCATTER; i++) { 2978 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 2979 *p++ =PADDR (dispatch); 2980 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 2981 *p++ =offsetof (struct dsb, data[i]); 2982 }; 2983 2984 *p++ =SCR_CALL; 2985 *p++ =PADDR (dispatch); 2986 *p++ =SCR_JUMP; 2987 *p++ =PADDR (no_data); 2988 2989 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out)); 2990 } 2991 2992 /*========================================================== 2993 ** 2994 ** 2995 ** Copy and rebind a script. 2996 ** 2997 ** 2998 **========================================================== 2999 */ 3000 3001 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len) 3002 { 3003 ncrcmd opcode, new, old, tmp1, tmp2; 3004 ncrcmd *start, *end; 3005 int relocs, offset; 3006 3007 start = src; 3008 end = src + len/4; 3009 offset = 0; 3010 3011 while (src < end) { 3012 3013 opcode = *src++; 3014 WRITESCRIPT_OFF(dst, offset, opcode); 3015 offset += 4; 3016 3017 /* 3018 ** If we forget to change the length 3019 ** in struct script, a field will be 3020 ** padded with 0. This is an illegal 3021 ** command. 3022 */ 3023 3024 if (opcode == 0) { 3025 kprintf ("%s: ERROR0 IN SCRIPT at %d.\n", 3026 ncr_name(np), (int) (src-start-1)); 3027 DELAY (1000000); 3028 }; 3029 3030 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3031 kprintf ("%p: <%x>\n", 3032 (src-1), (unsigned)opcode); 3033 3034 /* 3035 ** We don't have to decode ALL commands 3036 */ 3037 switch (opcode >> 28) { 3038 3039 case 0xc: 3040 /* 3041 ** COPY has TWO arguments. 3042 */ 3043 relocs = 2; 3044 tmp1 = src[0]; 3045 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3046 tmp1 = 0; 3047 tmp2 = src[1]; 3048 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3049 tmp2 = 0; 3050 if ((tmp1 ^ tmp2) & 3) { 3051 kprintf ("%s: ERROR1 IN SCRIPT at %d.\n", 3052 ncr_name(np), (int) (src-start-1)); 3053 DELAY (1000000); 3054 } 3055 /* 3056 ** If PREFETCH feature not enabled, remove 3057 ** the NO FLUSH bit if present. 3058 */ 3059 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN)) 3060 WRITESCRIPT_OFF(dst, offset - 4, 3061 (opcode & ~SCR_NO_FLUSH)); 3062 break; 3063 3064 case 0x0: 3065 /* 3066 ** MOVE (absolute address) 3067 */ 3068 relocs = 1; 3069 break; 3070 3071 case 0x8: 3072 /* 3073 ** JUMP / CALL 3074 ** dont't relocate if relative :-) 3075 */ 3076 if (opcode & 0x00800000) 3077 relocs = 0; 3078 else 3079 relocs = 1; 3080 break; 3081 3082 case 0x4: 3083 case 0x5: 3084 case 0x6: 3085 case 0x7: 3086 relocs = 1; 3087 break; 3088 3089 default: 3090 relocs = 0; 3091 break; 3092 }; 3093 3094 if (relocs) { 3095 while (relocs--) { 3096 old = *src++; 3097 3098 switch (old & RELOC_MASK) { 3099 case RELOC_REGISTER: 3100 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res); 3101 break; 3102 case RELOC_LABEL: 3103 new = (old & ~RELOC_MASK) + np->p_script; 3104 break; 3105 case RELOC_LABELH: 3106 new = (old & ~RELOC_MASK) + np->p_scripth; 3107 break; 3108 case RELOC_SOFTC: 3109 new = (old & ~RELOC_MASK) + vtophys(np); 3110 break; 3111 case RELOC_KVAR: 3112 if (((old & ~RELOC_MASK) < 3113 SCRIPT_KVAR_FIRST) || 3114 ((old & ~RELOC_MASK) > 3115 SCRIPT_KVAR_LAST)) 3116 panic("ncr KVAR out of range"); 3117 new = vtophys(script_kvars[old & 3118 ~RELOC_MASK]); 3119 break; 3120 case 0: 3121 /* Don't relocate a 0 address. */ 3122 if (old == 0) { 3123 new = old; 3124 break; 3125 } 3126 /* fall through */ 3127 default: 3128 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start)); 3129 break; 3130 } 3131 3132 WRITESCRIPT_OFF(dst, offset, new); 3133 offset += 4; 3134 } 3135 } else { 3136 WRITESCRIPT_OFF(dst, offset, *src++); 3137 offset += 4; 3138 } 3139 3140 }; 3141 } 3142 3143 /*========================================================== 3144 ** 3145 ** 3146 ** Auto configuration. 3147 ** 3148 ** 3149 **========================================================== 3150 */ 3151 3152 #if 0 3153 /*---------------------------------------------------------- 3154 ** 3155 ** Reduce the transfer length to the max value 3156 ** we can transfer safely. 3157 ** 3158 ** Reading a block greater then MAX_SIZE from the 3159 ** raw (character) device exercises a memory leak 3160 ** in the vm subsystem. This is common to ALL devices. 3161 ** We have submitted a description of this bug to 3162 ** <FreeBSD-bugs@freefall.cdrom.com>. 3163 ** It should be fixed in the current release. 3164 ** 3165 **---------------------------------------------------------- 3166 */ 3167 3168 void ncr_min_phys (struct buf *bp) 3169 { 3170 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE; 3171 } 3172 3173 #endif 3174 3175 #if 0 3176 /*---------------------------------------------------------- 3177 ** 3178 ** Maximal number of outstanding requests per target. 3179 ** 3180 **---------------------------------------------------------- 3181 */ 3182 3183 u_int32_t ncr_info (int unit) 3184 { 3185 return (1); /* may be changed later */ 3186 } 3187 3188 #endif 3189 3190 /*---------------------------------------------------------- 3191 ** 3192 ** NCR chip devices table and chip look up function. 3193 ** Features bit are defined in ncrreg.h. Is it the 3194 ** right place? 3195 ** 3196 **---------------------------------------------------------- 3197 */ 3198 typedef struct { 3199 unsigned long device_id; 3200 unsigned short minrevid; 3201 char *name; 3202 unsigned char maxburst; 3203 unsigned char maxoffs; 3204 unsigned char clock_divn; 3205 unsigned int features; 3206 } ncr_chip; 3207 3208 static ncr_chip ncr_chip_table[] = { 3209 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4, 3210 FE_ERL} 3211 , 3212 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4, 3213 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF} 3214 , 3215 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4, 3216 FE_ERL|FE_BOF} 3217 , 3218 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4, 3219 FE_WIDE|FE_ERL} 3220 , 3221 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4, 3222 FE_WIDE|FE_ERL|FE_BOF} 3223 , 3224 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4, 3225 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3226 , 3227 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5, 3228 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN} 3229 , 3230 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3231 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3232 , 3233 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3234 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3235 , 3236 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5, 3237 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3238 , 3239 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5, 3240 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3241 , 3242 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7, 3243 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3244 , 3245 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7, 3246 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3247 , 3248 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7, 3249 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3250 , 3251 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7, 3252 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3253 }; 3254 3255 static int ncr_chip_lookup(u_long device_id, u_char revision_id) 3256 { 3257 int i, found; 3258 3259 found = -1; 3260 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) { 3261 if (device_id == ncr_chip_table[i].device_id && 3262 ncr_chip_table[i].minrevid <= revision_id) { 3263 if (found < 0 || 3264 ncr_chip_table[found].minrevid 3265 < ncr_chip_table[i].minrevid) { 3266 found = i; 3267 } 3268 } 3269 } 3270 return found; 3271 } 3272 3273 /*---------------------------------------------------------- 3274 ** 3275 ** Probe the hostadapter. 3276 ** 3277 **---------------------------------------------------------- 3278 */ 3279 3280 3281 3282 static int ncr_probe (device_t dev) 3283 { 3284 int i; 3285 3286 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev)); 3287 if (i >= 0) { 3288 device_set_desc(dev, ncr_chip_table[i].name); 3289 return (-1000); /* Allows to use both ncr and sym */ 3290 } 3291 3292 return (ENXIO); 3293 } 3294 3295 3296 3297 /*========================================================== 3298 ** 3299 ** NCR chip clock divisor table. 3300 ** Divisors are multiplied by 10,000,000 in order to make 3301 ** calculations more simple. 3302 ** 3303 **========================================================== 3304 */ 3305 3306 #define _5M 5000000 3307 static u_long div_10M[] = 3308 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3309 3310 /*=============================================================== 3311 ** 3312 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3313 ** transfers. 32,64,128 are only supported by 875 and 895 chips. 3314 ** We use log base 2 (burst length) as internal code, with 3315 ** value 0 meaning "burst disabled". 3316 ** 3317 **=============================================================== 3318 */ 3319 3320 /* 3321 * Burst length from burst code. 3322 */ 3323 #define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3324 3325 /* 3326 * Burst code from io register bits. 3327 */ 3328 #define burst_code(dmode, ctest4, ctest5) \ 3329 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1 3330 3331 /* 3332 * Set initial io register bits from burst code. 3333 */ 3334 static void 3335 ncr_init_burst(ncb_p np, u_char bc) 3336 { 3337 np->rv_ctest4 &= ~0x80; 3338 np->rv_dmode &= ~(0x3 << 6); 3339 np->rv_ctest5 &= ~0x4; 3340 3341 if (!bc) { 3342 np->rv_ctest4 |= 0x80; 3343 } 3344 else { 3345 --bc; 3346 np->rv_dmode |= ((bc & 0x3) << 6); 3347 np->rv_ctest5 |= (bc & 0x4); 3348 } 3349 } 3350 3351 /*========================================================== 3352 ** 3353 ** 3354 ** Auto configuration: attach and init a host adapter. 3355 ** 3356 ** 3357 **========================================================== 3358 */ 3359 3360 3361 static int 3362 ncr_attach (device_t dev) 3363 { 3364 ncb_p np = (struct ncb*) device_get_softc(dev); 3365 u_char rev = 0; 3366 u_long period; 3367 int i, rid; 3368 u_int8_t usrsync; 3369 u_int8_t usrwide; 3370 struct cam_devq *devq; 3371 3372 /* 3373 ** allocate and initialize structures. 3374 */ 3375 3376 np->unit = device_get_unit(dev); 3377 3378 /* 3379 ** Try to map the controller chip to 3380 ** virtual and physical memory. 3381 */ 3382 3383 np->reg_rid = 0x14; 3384 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid, 3385 0, ~0, 1, RF_ACTIVE); 3386 if (!np->reg_res) { 3387 device_printf(dev, "could not map memory\n"); 3388 return ENXIO; 3389 } 3390 3391 /* 3392 ** Make the controller's registers available. 3393 ** Now the INB INW INL OUTB OUTW OUTL macros 3394 ** can be used safely. 3395 */ 3396 3397 np->bst = rman_get_bustag(np->reg_res); 3398 np->bsh = rman_get_bushandle(np->reg_res); 3399 3400 3401 #ifdef NCR_IOMAPPED 3402 /* 3403 ** Try to map the controller chip into iospace. 3404 */ 3405 3406 if (!pci_map_port (config_id, 0x10, &np->port)) 3407 return; 3408 #endif 3409 3410 3411 /* 3412 ** Save some controller register default values 3413 */ 3414 3415 np->rv_scntl3 = INB(nc_scntl3) & 0x77; 3416 np->rv_dmode = INB(nc_dmode) & 0xce; 3417 np->rv_dcntl = INB(nc_dcntl) & 0xa9; 3418 np->rv_ctest3 = INB(nc_ctest3) & 0x01; 3419 np->rv_ctest4 = INB(nc_ctest4) & 0x88; 3420 np->rv_ctest5 = INB(nc_ctest5) & 0x24; 3421 np->rv_gpcntl = INB(nc_gpcntl); 3422 np->rv_stest2 = INB(nc_stest2) & 0x20; 3423 3424 if (bootverbose >= 2) { 3425 kprintf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 3426 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 3427 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 3428 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3429 } 3430 3431 np->rv_dcntl |= NOCOM; 3432 3433 /* 3434 ** Do chip dependent initialization. 3435 */ 3436 3437 rev = pci_get_revid(dev); 3438 3439 /* 3440 ** Get chip features from chips table. 3441 */ 3442 i = ncr_chip_lookup(pci_get_devid(dev), rev); 3443 3444 if (i >= 0) { 3445 np->maxburst = ncr_chip_table[i].maxburst; 3446 np->maxoffs = ncr_chip_table[i].maxoffs; 3447 np->clock_divn = ncr_chip_table[i].clock_divn; 3448 np->features = ncr_chip_table[i].features; 3449 } else { /* Should'nt happen if probe() is ok */ 3450 np->maxburst = 4; 3451 np->maxoffs = 8; 3452 np->clock_divn = 4; 3453 np->features = FE_ERL; 3454 } 3455 3456 np->maxwide = np->features & FE_WIDE ? 1 : 0; 3457 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000; 3458 if (np->features & FE_QUAD) np->multiplier = 4; 3459 else if (np->features & FE_DBLR) np->multiplier = 2; 3460 else np->multiplier = 1; 3461 3462 /* 3463 ** Get the frequency of the chip's clock. 3464 ** Find the right value for scntl3. 3465 */ 3466 if (np->features & (FE_ULTRA|FE_ULTRA2)) 3467 ncr_getclock(np, np->multiplier); 3468 3469 #ifdef NCR_TEKRAM_EEPROM 3470 if (bootverbose) { 3471 kprintf ("%s: Tekram EEPROM read %s\n", 3472 ncr_name(np), 3473 read_tekram_eeprom (np, NULL) ? 3474 "succeeded" : "failed"); 3475 } 3476 #endif /* NCR_TEKRAM_EEPROM */ 3477 3478 /* 3479 * If scntl3 != 0, we assume BIOS is present. 3480 */ 3481 if (np->rv_scntl3) 3482 np->features |= FE_BIOS; 3483 3484 /* 3485 * Divisor to be used for async (timer pre-scaler). 3486 */ 3487 i = np->clock_divn - 1; 3488 while (i >= 0) { 3489 --i; 3490 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3491 ++i; 3492 break; 3493 } 3494 } 3495 np->rv_scntl3 = i+1; 3496 3497 /* 3498 * Minimum synchronous period factor supported by the chip. 3499 * Btw, 'period' is in tenths of nanoseconds. 3500 */ 3501 3502 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3503 if (period <= 250) np->minsync = 10; 3504 else if (period <= 303) np->minsync = 11; 3505 else if (period <= 500) np->minsync = 12; 3506 else np->minsync = (period + 40 - 1) / 40; 3507 3508 /* 3509 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3510 */ 3511 3512 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2))) 3513 np->minsync = 25; 3514 else if (np->minsync < 12 && !(np->features & FE_ULTRA2)) 3515 np->minsync = 12; 3516 3517 /* 3518 * Maximum synchronous period factor supported by the chip. 3519 */ 3520 3521 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3522 np->maxsync = period > 2540 ? 254 : period / 10; 3523 3524 /* 3525 * Now, some features available with Symbios compatible boards. 3526 * LED support through GPIO0 and DIFF support. 3527 */ 3528 3529 #ifdef SCSI_NCR_SYMBIOS_COMPAT 3530 if (!(np->rv_gpcntl & 0x01)) 3531 np->features |= FE_LED0; 3532 #if 0 /* Not safe enough without NVRAM support or user settable option */ 3533 if (!(INB(nc_gpreg) & 0x08)) 3534 np->features |= FE_DIFF; 3535 #endif 3536 #endif /* SCSI_NCR_SYMBIOS_COMPAT */ 3537 3538 /* 3539 * Prepare initial IO registers settings. 3540 * Trust BIOS only if we believe we have one and if we want to. 3541 */ 3542 #ifdef SCSI_NCR_TRUST_BIOS 3543 if (!(np->features & FE_BIOS)) { 3544 #else 3545 if (1) { 3546 #endif 3547 np->rv_dmode = 0; 3548 np->rv_dcntl = NOCOM; 3549 np->rv_ctest3 = 0; 3550 np->rv_ctest4 = MPEE; 3551 np->rv_ctest5 = 0; 3552 np->rv_stest2 = 0; 3553 3554 if (np->features & FE_ERL) 3555 np->rv_dmode |= ERL; /* Enable Read Line */ 3556 if (np->features & FE_BOF) 3557 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3558 if (np->features & FE_ERMP) 3559 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3560 if (np->features & FE_CLSE) 3561 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3562 if (np->features & FE_WRIE) 3563 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3564 if (np->features & FE_PFEN) 3565 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3566 if (np->features & FE_DFS) 3567 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3568 if (np->features & FE_DIFF) 3569 np->rv_stest2 |= 0x20; /* Differential mode */ 3570 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */ 3571 } else { 3572 np->maxburst = 3573 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5); 3574 } 3575 3576 /* 3577 ** Get on-chip SRAM address, if supported 3578 */ 3579 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) { 3580 np->sram_rid = 0x18; 3581 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 3582 &np->sram_rid, 3583 0, ~0, 1, RF_ACTIVE); 3584 } 3585 3586 /* 3587 ** Allocate structure for script relocation. 3588 */ 3589 if (np->sram_res != NULL) { 3590 np->script = NULL; 3591 np->p_script = rman_get_start(np->sram_res); 3592 np->bst2 = rman_get_bustag(np->sram_res); 3593 np->bsh2 = rman_get_bushandle(np->sram_res); 3594 } else if (sizeof (struct script) > PAGE_SIZE) { 3595 np->script = (struct script*) vm_page_alloc_contig 3596 (round_page(sizeof (struct script)), 3597 0, 0xffffffff, PAGE_SIZE); 3598 } else { 3599 np->script = (struct script *) 3600 kmalloc (sizeof (struct script), M_DEVBUF, M_WAITOK); 3601 } 3602 3603 /* XXX JGibbs - Use contigmalloc */ 3604 if (sizeof (struct scripth) > PAGE_SIZE) { 3605 np->scripth = (struct scripth*) vm_page_alloc_contig 3606 (round_page(sizeof (struct scripth)), 3607 0, 0xffffffff, PAGE_SIZE); 3608 } else 3609 { 3610 np->scripth = (struct scripth *) 3611 kmalloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK); 3612 } 3613 3614 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP 3615 /* 3616 ** If cache line size is enabled, check PCI config space and 3617 ** try to fix it up if necessary. 3618 */ 3619 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */ 3620 { 3621 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 3622 u_short command = pci_read_config(dev, PCIR_COMMAND, 2); 3623 3624 if (!cachelnsz) { 3625 cachelnsz = 8; 3626 kprintf("%s: setting PCI cache line size register to %d.\n", 3627 ncr_name(np), (int)cachelnsz); 3628 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1); 3629 } 3630 3631 if (!(command & (1<<4))) { 3632 command |= (1<<4); 3633 kprintf("%s: setting PCI command write and invalidate.\n", 3634 ncr_name(np)); 3635 pci_write_config(dev, PCIR_COMMAND, command, 2); 3636 } 3637 } 3638 #endif /* PCIR_CACHELNSZ */ 3639 3640 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */ 3641 3642 /* Initialize per-target user settings */ 3643 usrsync = 0; 3644 if (SCSI_NCR_DFLT_SYNC) { 3645 usrsync = SCSI_NCR_DFLT_SYNC; 3646 if (usrsync > np->maxsync) 3647 usrsync = np->maxsync; 3648 if (usrsync < np->minsync) 3649 usrsync = np->minsync; 3650 }; 3651 3652 usrwide = (SCSI_NCR_MAX_WIDE); 3653 if (usrwide > np->maxwide) usrwide=np->maxwide; 3654 3655 for (i=0;i<MAX_TARGET;i++) { 3656 tcb_p tp = &np->target[i]; 3657 3658 tp->tinfo.user.period = usrsync; 3659 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0; 3660 tp->tinfo.user.width = usrwide; 3661 tp->tinfo.disc_tag = NCR_CUR_DISCENB 3662 | NCR_CUR_TAGENB 3663 | NCR_USR_DISCENB 3664 | NCR_USR_TAGENB; 3665 } 3666 3667 /* 3668 ** Bells and whistles ;-) 3669 */ 3670 if (bootverbose) 3671 kprintf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n", 3672 ncr_name(np), np->minsync, np->maxsync, np->maxoffs, 3673 burst_length(np->maxburst), 3674 (np->rv_ctest5 & DFS) ? "large" : "normal"); 3675 3676 /* 3677 ** Print some complementary information that can be helpfull. 3678 */ 3679 if (bootverbose) 3680 kprintf("%s: %s, %s IRQ driver%s\n", 3681 ncr_name(np), 3682 np->rv_stest2 & 0x20 ? "differential" : "single-ended", 3683 np->rv_dcntl & IRQM ? "totem pole" : "open drain", 3684 np->sram_res ? ", using on-chip SRAM" : ""); 3685 3686 /* 3687 ** Patch scripts to physical addresses 3688 */ 3689 ncr_script_fill (&script0, &scripth0); 3690 3691 if (np->script) 3692 np->p_script = vtophys(np->script); 3693 np->p_scripth = vtophys(np->scripth); 3694 3695 ncr_script_copy_and_bind (np, (ncrcmd *) &script0, 3696 (ncrcmd *) np->script, sizeof(struct script)); 3697 3698 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, 3699 (ncrcmd *) np->scripth, sizeof(struct scripth)); 3700 3701 /* 3702 ** Patch the script for LED support. 3703 */ 3704 3705 if (np->features & FE_LED0) { 3706 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01)); 3707 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 3708 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 3709 } 3710 3711 /* 3712 ** init data structure 3713 */ 3714 3715 np->jump_tcb.l_cmd = SCR_JUMP; 3716 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort); 3717 3718 /* 3719 ** Get SCSI addr of host adapter (set by bios?). 3720 */ 3721 3722 np->myaddr = INB(nc_scid) & 0x07; 3723 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR; 3724 3725 #ifdef NCR_DUMP_REG 3726 /* 3727 ** Log the initial register contents 3728 */ 3729 { 3730 int reg; 3731 for (reg=0; reg<256; reg+=4) { 3732 if (reg%16==0) kprintf ("reg[%2x]", reg); 3733 kprintf (" %08x", (int)pci_conf_read (config_id, reg)); 3734 if (reg%16==12) kprintf ("\n"); 3735 } 3736 } 3737 #endif /* NCR_DUMP_REG */ 3738 3739 /* 3740 ** Reset chip. 3741 */ 3742 3743 OUTB (nc_istat, SRST); 3744 DELAY (1000); 3745 OUTB (nc_istat, 0 ); 3746 3747 3748 /* 3749 ** Now check the cache handling of the pci chipset. 3750 */ 3751 3752 if (ncr_snooptest (np)) { 3753 kprintf ("CACHE INCORRECTLY CONFIGURED.\n"); 3754 return EINVAL; 3755 }; 3756 3757 /* 3758 ** Install the interrupt handler. 3759 */ 3760 3761 rid = 0; 3762 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 3763 RF_SHAREABLE | RF_ACTIVE); 3764 if (np->irq_res == NULL) { 3765 device_printf(dev, 3766 "interruptless mode: reduced performance.\n"); 3767 } else { 3768 bus_setup_intr(dev, np->irq_res, 0, 3769 ncr_intr, np, &np->irq_handle, NULL); 3770 } 3771 3772 /* 3773 ** Create the device queue. We only allow MAX_START-1 concurrent 3774 ** transactions so we can be sure to have one element free in our 3775 ** start queue to reset to the idle loop. 3776 */ 3777 devq = cam_simq_alloc(MAX_START - 1); 3778 if (devq == NULL) 3779 return ENOMEM; 3780 3781 /* 3782 ** Now tell the generic SCSI layer 3783 ** about our bus. 3784 */ 3785 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit, 3786 &sim_mplock, 1, MAX_TAGS, devq); 3787 cam_simq_release(devq); 3788 if (np->sim == NULL) 3789 return ENOMEM; 3790 3791 3792 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) { 3793 cam_sim_free(np->sim); 3794 return ENOMEM; 3795 } 3796 3797 if (xpt_create_path(&np->path, /*periph*/NULL, 3798 cam_sim_path(np->sim), CAM_TARGET_WILDCARD, 3799 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 3800 xpt_bus_deregister(cam_sim_path(np->sim)); 3801 cam_sim_free(np->sim); 3802 return ENOMEM; 3803 } 3804 3805 /* 3806 ** start the timeout daemon 3807 */ 3808 callout_init(&np->timeout_ch); 3809 ncr_timeout (np); 3810 np->lasttime=0; 3811 3812 return 0; 3813 } 3814 3815 /*========================================================== 3816 ** 3817 ** 3818 ** Process pending device interrupts. 3819 ** 3820 ** 3821 **========================================================== 3822 */ 3823 3824 static void 3825 ncr_intr(void *vnp) 3826 { 3827 ncb_p np = vnp; 3828 crit_enter(); 3829 3830 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("["); 3831 3832 if (INB(nc_istat) & (INTF|SIP|DIP)) { 3833 /* 3834 ** Repeat until no outstanding ints 3835 */ 3836 do { 3837 ncr_exception (np); 3838 } while (INB(nc_istat) & (INTF|SIP|DIP)); 3839 3840 np->ticks = 100; 3841 }; 3842 3843 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("]\n"); 3844 3845 crit_exit(); 3846 } 3847 3848 /*========================================================== 3849 ** 3850 ** 3851 ** Start execution of a SCSI command. 3852 ** This is called from the generic SCSI driver. 3853 ** 3854 ** 3855 **========================================================== 3856 */ 3857 3858 static void 3859 ncr_action (struct cam_sim *sim, union ccb *ccb) 3860 { 3861 ncb_p np; 3862 3863 np = (ncb_p) cam_sim_softc(sim); 3864 3865 switch (ccb->ccb_h.func_code) { 3866 /* Common cases first */ 3867 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 3868 { 3869 nccb_p cp; 3870 lcb_p lp; 3871 tcb_p tp; 3872 struct ccb_scsiio *csio; 3873 u_int8_t *msgptr; 3874 u_int msglen; 3875 u_int msglen2; 3876 int segments; 3877 u_int8_t nego; 3878 u_int8_t idmsg; 3879 int qidx; 3880 3881 tp = &np->target[ccb->ccb_h.target_id]; 3882 csio = &ccb->csio; 3883 3884 crit_enter(); 3885 3886 /* 3887 * Last time we need to check if this CCB needs to 3888 * be aborted. 3889 */ 3890 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) { 3891 xpt_done(ccb); 3892 crit_exit(); 3893 return; 3894 } 3895 ccb->ccb_h.status |= CAM_SIM_QUEUED; 3896 3897 /*--------------------------------------------------- 3898 ** 3899 ** Assign an nccb / bind ccb 3900 ** 3901 **---------------------------------------------------- 3902 */ 3903 cp = ncr_get_nccb (np, ccb->ccb_h.target_id, 3904 ccb->ccb_h.target_lun); 3905 if (cp == NULL) { 3906 /* XXX JGibbs - Freeze SIMQ */ 3907 ccb->ccb_h.status = CAM_RESRC_UNAVAIL; 3908 xpt_done(ccb); 3909 return; 3910 }; 3911 3912 cp->ccb = ccb; 3913 3914 /*--------------------------------------------------- 3915 ** 3916 ** timestamp 3917 ** 3918 **---------------------------------------------------- 3919 */ 3920 /* 3921 ** XXX JGibbs - Isn't this expensive 3922 ** enough to be conditionalized?? 3923 */ 3924 3925 bzero (&cp->phys.header.stamp, sizeof (struct tstamp)); 3926 cp->phys.header.stamp.start = ticks; 3927 3928 nego = 0; 3929 if (tp->nego_cp == NULL) { 3930 3931 if (tp->tinfo.current.width 3932 != tp->tinfo.goal.width) { 3933 tp->nego_cp = cp; 3934 nego = NS_WIDE; 3935 } else if ((tp->tinfo.current.period 3936 != tp->tinfo.goal.period) 3937 || (tp->tinfo.current.offset 3938 != tp->tinfo.goal.offset)) { 3939 tp->nego_cp = cp; 3940 nego = NS_SYNC; 3941 }; 3942 }; 3943 3944 /*--------------------------------------------------- 3945 ** 3946 ** choose a new tag ... 3947 ** 3948 **---------------------------------------------------- 3949 */ 3950 lp = tp->lp[ccb->ccb_h.target_lun]; 3951 3952 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0 3953 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE) 3954 && (nego == 0)) { 3955 /* 3956 ** assign a tag to this nccb 3957 */ 3958 while (!cp->tag) { 3959 nccb_p cp2 = lp->next_nccb; 3960 lp->lasttag = lp->lasttag % 255 + 1; 3961 while (cp2 && cp2->tag != lp->lasttag) 3962 cp2 = cp2->next_nccb; 3963 if (cp2) continue; 3964 cp->tag=lp->lasttag; 3965 if (DEBUG_FLAGS & DEBUG_TAGS) { 3966 PRINT_ADDR(ccb); 3967 kprintf ("using tag #%d.\n", cp->tag); 3968 }; 3969 }; 3970 } else { 3971 cp->tag=0; 3972 }; 3973 3974 /*---------------------------------------------------- 3975 ** 3976 ** Build the identify / tag / sdtr message 3977 ** 3978 **---------------------------------------------------- 3979 */ 3980 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun; 3981 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB) 3982 idmsg |= MSG_IDENTIFY_DISCFLAG; 3983 3984 msgptr = cp->scsi_smsg; 3985 msglen = 0; 3986 msgptr[msglen++] = idmsg; 3987 3988 if (cp->tag) { 3989 msgptr[msglen++] = ccb->csio.tag_action; 3990 msgptr[msglen++] = cp->tag; 3991 } 3992 3993 switch (nego) { 3994 case NS_SYNC: 3995 msgptr[msglen++] = MSG_EXTENDED; 3996 msgptr[msglen++] = MSG_EXT_SDTR_LEN; 3997 msgptr[msglen++] = MSG_EXT_SDTR; 3998 msgptr[msglen++] = tp->tinfo.goal.period; 3999 msgptr[msglen++] = tp->tinfo.goal.offset; 4000 if (DEBUG_FLAGS & DEBUG_NEGO) { 4001 PRINT_ADDR(ccb); 4002 kprintf ("sync msgout: "); 4003 ncr_show_msg (&cp->scsi_smsg [msglen-5]); 4004 kprintf (".\n"); 4005 }; 4006 break; 4007 case NS_WIDE: 4008 msgptr[msglen++] = MSG_EXTENDED; 4009 msgptr[msglen++] = MSG_EXT_WDTR_LEN; 4010 msgptr[msglen++] = MSG_EXT_WDTR; 4011 msgptr[msglen++] = tp->tinfo.goal.width; 4012 if (DEBUG_FLAGS & DEBUG_NEGO) { 4013 PRINT_ADDR(ccb); 4014 kprintf ("wide msgout: "); 4015 ncr_show_msg (&cp->scsi_smsg [msglen-4]); 4016 kprintf (".\n"); 4017 }; 4018 break; 4019 }; 4020 4021 /*---------------------------------------------------- 4022 ** 4023 ** Build the identify message for getcc. 4024 ** 4025 **---------------------------------------------------- 4026 */ 4027 4028 cp->scsi_smsg2 [0] = idmsg; 4029 msglen2 = 1; 4030 4031 /*---------------------------------------------------- 4032 ** 4033 ** Build the data descriptors 4034 ** 4035 **---------------------------------------------------- 4036 */ 4037 4038 /* XXX JGibbs - Handle other types of I/O */ 4039 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 4040 segments = ncr_scatter(&cp->phys, 4041 (vm_offset_t)csio->data_ptr, 4042 (vm_size_t)csio->dxfer_len); 4043 4044 if (segments < 0) { 4045 ccb->ccb_h.status = CAM_REQ_TOO_BIG; 4046 ncr_free_nccb(np, cp); 4047 crit_exit(); 4048 xpt_done(ccb); 4049 return; 4050 } 4051 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 4052 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in); 4053 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4054 } else { /* CAM_DIR_OUT */ 4055 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out); 4056 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4057 } 4058 } else { 4059 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data); 4060 cp->phys.header.goalp = cp->phys.header.savep; 4061 } 4062 4063 cp->phys.header.lastp = cp->phys.header.savep; 4064 4065 4066 /*---------------------------------------------------- 4067 ** 4068 ** fill in nccb 4069 ** 4070 **---------------------------------------------------- 4071 ** 4072 ** 4073 ** physical -> virtual backlink 4074 ** Generic SCSI command 4075 */ 4076 cp->phys.header.cp = cp; 4077 /* 4078 ** Startqueue 4079 */ 4080 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select); 4081 cp->phys.header.launch.l_cmd = SCR_JUMP; 4082 /* 4083 ** select 4084 */ 4085 cp->phys.select.sel_id = ccb->ccb_h.target_id; 4086 cp->phys.select.sel_scntl3 = tp->tinfo.wval; 4087 cp->phys.select.sel_sxfer = tp->tinfo.sval; 4088 /* 4089 ** message 4090 */ 4091 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg); 4092 cp->phys.smsg.size = msglen; 4093 4094 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2); 4095 cp->phys.smsg2.size = msglen2; 4096 /* 4097 ** command 4098 */ 4099 /* XXX JGibbs - Support other command types */ 4100 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes); 4101 cp->phys.cmd.size = csio->cdb_len; 4102 /* 4103 ** sense command 4104 */ 4105 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd); 4106 cp->phys.scmd.size = 6; 4107 /* 4108 ** patch requested size into sense command 4109 */ 4110 cp->sensecmd[0] = 0x03; 4111 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5; 4112 cp->sensecmd[4] = sizeof(struct scsi_sense_data); 4113 cp->sensecmd[4] = csio->sense_len; 4114 /* 4115 ** sense data 4116 */ 4117 cp->phys.sense.addr = vtophys (&csio->sense_data); 4118 cp->phys.sense.size = csio->sense_len; 4119 /* 4120 ** status 4121 */ 4122 cp->actualquirks = QUIRK_NOMSG; 4123 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY; 4124 cp->s_status = SCSI_STATUS_ILLEGAL; 4125 cp->parity_status = 0; 4126 4127 cp->xerr_status = XE_OK; 4128 cp->sync_status = tp->tinfo.sval; 4129 cp->nego_status = nego; 4130 cp->wide_status = tp->tinfo.wval; 4131 4132 /*---------------------------------------------------- 4133 ** 4134 ** Critical region: start this job. 4135 ** 4136 **---------------------------------------------------- 4137 */ 4138 4139 /* 4140 ** reselect pattern and activate this job. 4141 */ 4142 4143 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag))); 4144 cp->tlimit = time_second 4145 + ccb->ccb_h.timeout / 1000 + 2; 4146 cp->magic = CCB_MAGIC; 4147 4148 /* 4149 ** insert into start queue. 4150 */ 4151 4152 qidx = np->squeueput + 1; 4153 if (qidx >= MAX_START) 4154 qidx = 0; 4155 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle); 4156 np->squeue [np->squeueput] = CCB_PHYS (cp, phys); 4157 np->squeueput = qidx; 4158 4159 if(DEBUG_FLAGS & DEBUG_QUEUE) 4160 kprintf("%s: queuepos=%d tryoffset=%d.\n", 4161 ncr_name (np), np->squeueput, 4162 (unsigned)(READSCRIPT(startpos[0]) - 4163 (NCB_SCRIPTH_PHYS (np, tryloop)))); 4164 4165 /* 4166 ** Script processor may be waiting for reselect. 4167 ** Wake it up. 4168 */ 4169 OUTB (nc_istat, SIGP); 4170 4171 /* 4172 ** and reenable interrupts 4173 */ 4174 crit_exit(); 4175 break; 4176 } 4177 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 4178 case XPT_EN_LUN: /* Enable LUN as a target */ 4179 case XPT_TARGET_IO: /* Execute target I/O request */ 4180 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 4181 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 4182 case XPT_ABORT: /* Abort the specified CCB */ 4183 /* XXX Implement */ 4184 ccb->ccb_h.status = CAM_REQ_INVALID; 4185 xpt_done(ccb); 4186 break; 4187 case XPT_SET_TRAN_SETTINGS: 4188 { 4189 struct ccb_trans_settings *cts = &ccb->cts; 4190 tcb_p tp; 4191 u_int update_type; 4192 struct ccb_trans_settings_scsi *scsi = 4193 &cts->proto_specific.scsi; 4194 struct ccb_trans_settings_spi *spi = 4195 &cts->xport_specific.spi; 4196 4197 update_type = 0; 4198 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 4199 update_type |= NCR_TRANS_GOAL; 4200 if (cts->type == CTS_TYPE_USER_SETTINGS) 4201 update_type |= NCR_TRANS_USER; 4202 4203 crit_enter(); 4204 tp = &np->target[ccb->ccb_h.target_id]; 4205 /* Tag and disc enables */ 4206 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) { 4207 if (update_type & NCR_TRANS_GOAL) { 4208 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0) 4209 tp->tinfo.disc_tag |= NCR_CUR_DISCENB; 4210 else 4211 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB; 4212 } 4213 4214 if (update_type & NCR_TRANS_USER) { 4215 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0) 4216 tp->tinfo.disc_tag |= NCR_USR_DISCENB; 4217 else 4218 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB; 4219 } 4220 4221 } 4222 4223 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) { 4224 if (update_type & NCR_TRANS_GOAL) { 4225 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0) 4226 tp->tinfo.disc_tag |= NCR_CUR_TAGENB; 4227 else 4228 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB; 4229 } 4230 4231 if (update_type & NCR_TRANS_USER) { 4232 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0) 4233 tp->tinfo.disc_tag |= NCR_USR_TAGENB; 4234 else 4235 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB; 4236 } 4237 } 4238 4239 /* Filter bus width and sync negotiation settings */ 4240 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) { 4241 if (spi->bus_width > np->maxwide) 4242 spi->bus_width = np->maxwide; 4243 } 4244 4245 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4246 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) { 4247 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) { 4248 if (spi->sync_period != 0 4249 && (spi->sync_period < np->minsync)) 4250 spi->sync_period = np->minsync; 4251 } 4252 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) { 4253 if (spi->sync_offset == 0) 4254 spi->sync_period = 0; 4255 if (spi->sync_offset > np->maxoffs) 4256 spi->sync_offset = np->maxoffs; 4257 } 4258 } 4259 if ((update_type & NCR_TRANS_USER) != 0) { 4260 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4261 tp->tinfo.user.period = spi->sync_period; 4262 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) 4263 tp->tinfo.user.offset = spi->sync_offset; 4264 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) 4265 tp->tinfo.user.width = spi->bus_width; 4266 } 4267 if ((update_type & NCR_TRANS_GOAL) != 0) { 4268 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4269 tp->tinfo.goal.period = spi->sync_period; 4270 4271 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) 4272 tp->tinfo.goal.offset = spi->sync_offset; 4273 4274 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) 4275 tp->tinfo.goal.width = spi->bus_width; 4276 } 4277 crit_exit(); 4278 ccb->ccb_h.status = CAM_REQ_CMP; 4279 xpt_done(ccb); 4280 break; 4281 } 4282 case XPT_GET_TRAN_SETTINGS: 4283 /* Get default/user set transfer settings for the target */ 4284 { 4285 struct ccb_trans_settings *cts = &ccb->cts; 4286 struct ncr_transinfo *tinfo; 4287 tcb_p tp = &np->target[ccb->ccb_h.target_id]; 4288 struct ccb_trans_settings_scsi *scsi = 4289 &cts->proto_specific.scsi; 4290 struct ccb_trans_settings_spi *spi = 4291 &cts->xport_specific.spi; 4292 4293 cts->protocol = PROTO_SCSI; 4294 cts->protocol_version = SCSI_REV_2; 4295 cts->transport = XPORT_SPI; 4296 cts->transport_version = 2; 4297 4298 crit_enter(); 4299 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 4300 tinfo = &tp->tinfo.current; 4301 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB) 4302 spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 4303 else 4304 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB; 4305 4306 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB) 4307 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 4308 else 4309 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB; 4310 } else { 4311 tinfo = &tp->tinfo.user; 4312 if (tp->tinfo.disc_tag & NCR_USR_DISCENB) 4313 spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 4314 else 4315 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB; 4316 4317 if (tp->tinfo.disc_tag & NCR_USR_TAGENB) 4318 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 4319 else 4320 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB; 4321 } 4322 4323 spi->sync_period = tinfo->period; 4324 spi->sync_offset = tinfo->offset; 4325 spi->bus_width = tinfo->width; 4326 4327 crit_exit(); 4328 spi->valid = CTS_SPI_VALID_SYNC_RATE 4329 | CTS_SPI_VALID_SYNC_OFFSET 4330 | CTS_SPI_VALID_BUS_WIDTH 4331 | CTS_SPI_VALID_DISC; 4332 scsi->valid = CTS_SCSI_VALID_TQ; 4333 4334 ccb->ccb_h.status = CAM_REQ_CMP; 4335 xpt_done(ccb); 4336 break; 4337 } 4338 case XPT_CALC_GEOMETRY: 4339 { 4340 struct ccb_calc_geometry *ccg; 4341 u_int32_t size_mb; 4342 u_int32_t secs_per_cylinder; 4343 int extended; 4344 4345 /* XXX JGibbs - I'm sure the NCR uses a different strategy, 4346 * but it should be able to deal with Adaptec 4347 * geometry too. 4348 */ 4349 extended = 1; 4350 ccg = &ccb->ccg; 4351 size_mb = ccg->volume_size 4352 / ((1024L * 1024L) / ccg->block_size); 4353 4354 if (size_mb > 1024 && extended) { 4355 ccg->heads = 255; 4356 ccg->secs_per_track = 63; 4357 } else { 4358 ccg->heads = 64; 4359 ccg->secs_per_track = 32; 4360 } 4361 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 4362 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 4363 ccb->ccb_h.status = CAM_REQ_CMP; 4364 xpt_done(ccb); 4365 break; 4366 } 4367 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 4368 { 4369 OUTB (nc_scntl1, CRST); 4370 ccb->ccb_h.status = CAM_REQ_CMP; 4371 DELAY(10000); /* Wait until our interrupt handler sees it */ 4372 xpt_done(ccb); 4373 break; 4374 } 4375 case XPT_TERM_IO: /* Terminate the I/O process */ 4376 /* XXX Implement */ 4377 ccb->ccb_h.status = CAM_REQ_INVALID; 4378 xpt_done(ccb); 4379 break; 4380 case XPT_PATH_INQ: /* Path routing inquiry */ 4381 { 4382 struct ccb_pathinq *cpi = &ccb->cpi; 4383 4384 cpi->version_num = 1; /* XXX??? */ 4385 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 4386 if ((np->features & FE_WIDE) != 0) 4387 cpi->hba_inquiry |= PI_WIDE_16; 4388 cpi->target_sprt = 0; 4389 cpi->hba_misc = 0; 4390 cpi->hba_eng_cnt = 0; 4391 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7; 4392 cpi->max_lun = MAX_LUN - 1; 4393 cpi->initiator_id = np->myaddr; 4394 cpi->bus_id = cam_sim_bus(sim); 4395 cpi->base_transfer_speed = 3300; 4396 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 4397 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN); 4398 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 4399 cpi->unit_number = cam_sim_unit(sim); 4400 cpi->transport = XPORT_SPI; 4401 cpi->transport_version = 2; 4402 cpi->protocol = PROTO_SCSI; 4403 cpi->protocol_version = SCSI_REV_2; 4404 cpi->ccb_h.status = CAM_REQ_CMP; 4405 xpt_done(ccb); 4406 break; 4407 } 4408 default: 4409 ccb->ccb_h.status = CAM_REQ_INVALID; 4410 xpt_done(ccb); 4411 break; 4412 } 4413 } 4414 4415 /*========================================================== 4416 ** 4417 ** 4418 ** Complete execution of a SCSI command. 4419 ** Signal completion to the generic SCSI driver. 4420 ** 4421 ** 4422 **========================================================== 4423 */ 4424 4425 void 4426 ncr_complete (ncb_p np, nccb_p cp) 4427 { 4428 union ccb *ccb; 4429 tcb_p tp; 4430 lcb_p lp; 4431 4432 /* 4433 ** Sanity check 4434 */ 4435 4436 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return; 4437 cp->magic = 1; 4438 cp->tlimit= 0; 4439 4440 /* 4441 ** No Reselect anymore. 4442 */ 4443 cp->jump_nccb.l_cmd = (SCR_JUMP); 4444 4445 /* 4446 ** No starting. 4447 */ 4448 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle); 4449 4450 /* 4451 ** timestamp 4452 */ 4453 ncb_profile (np, cp); 4454 4455 if (DEBUG_FLAGS & DEBUG_TINY) 4456 kprintf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff, 4457 cp->host_status,cp->s_status); 4458 4459 ccb = cp->ccb; 4460 cp->ccb = NULL; 4461 tp = &np->target[ccb->ccb_h.target_id]; 4462 lp = tp->lp[ccb->ccb_h.target_lun]; 4463 4464 /* 4465 ** We do not queue more than 1 nccb per target 4466 ** with negotiation at any time. If this nccb was 4467 ** used for negotiation, clear this info in the tcb. 4468 */ 4469 4470 if (cp == tp->nego_cp) 4471 tp->nego_cp = NULL; 4472 4473 /* 4474 ** Check for parity errors. 4475 */ 4476 /* XXX JGibbs - What about reporting them??? */ 4477 4478 if (cp->parity_status) { 4479 PRINT_ADDR(ccb); 4480 kprintf ("%d parity error(s), fallback.\n", cp->parity_status); 4481 /* 4482 ** fallback to asynch transfer. 4483 */ 4484 tp->tinfo.goal.period = 0; 4485 tp->tinfo.goal.offset = 0; 4486 }; 4487 4488 /* 4489 ** Check for extended errors. 4490 */ 4491 4492 if (cp->xerr_status != XE_OK) { 4493 PRINT_ADDR(ccb); 4494 switch (cp->xerr_status) { 4495 case XE_EXTRA_DATA: 4496 kprintf ("extraneous data discarded.\n"); 4497 break; 4498 case XE_BAD_PHASE: 4499 kprintf ("illegal scsi phase (4/5).\n"); 4500 break; 4501 default: 4502 kprintf ("extended error %d.\n", cp->xerr_status); 4503 break; 4504 }; 4505 if (cp->host_status==HS_COMPLETE) 4506 cp->host_status = HS_FAIL; 4507 }; 4508 4509 /* 4510 ** Check the status. 4511 */ 4512 if (cp->host_status == HS_COMPLETE) { 4513 4514 if (cp->s_status == SCSI_STATUS_OK) { 4515 4516 /* 4517 ** All went well. 4518 */ 4519 /* XXX JGibbs - Properly calculate residual */ 4520 4521 tp->bytes += ccb->csio.dxfer_len; 4522 tp->transfers ++; 4523 4524 ccb->ccb_h.status = CAM_REQ_CMP; 4525 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) { 4526 4527 /* 4528 * XXX Could be TERMIO too. Should record 4529 * original status. 4530 */ 4531 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 4532 cp->s_status &= ~SCSI_STATUS_SENSE; 4533 if (cp->s_status == SCSI_STATUS_OK) { 4534 ccb->ccb_h.status = 4535 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR; 4536 } else { 4537 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; 4538 } 4539 } else { 4540 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 4541 ccb->csio.scsi_status = cp->s_status; 4542 } 4543 4544 4545 } else if (cp->host_status == HS_SEL_TIMEOUT) { 4546 4547 /* 4548 ** Device failed selection 4549 */ 4550 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 4551 4552 } else if (cp->host_status == HS_TIMEOUT) { 4553 4554 /* 4555 ** No response 4556 */ 4557 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 4558 } else if (cp->host_status == HS_STALL) { 4559 ccb->ccb_h.status = CAM_REQUEUE_REQ; 4560 } else { 4561 4562 /* 4563 ** Other protocol messes 4564 */ 4565 PRINT_ADDR(ccb); 4566 kprintf ("COMMAND FAILED (%x %x) @%p.\n", 4567 cp->host_status, cp->s_status, cp); 4568 4569 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 4570 } 4571 4572 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 4573 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 4574 ccb->ccb_h.status |= CAM_DEV_QFRZN; 4575 } 4576 4577 /* 4578 ** Free this nccb 4579 */ 4580 ncr_free_nccb (np, cp); 4581 4582 /* 4583 ** signal completion to generic driver. 4584 */ 4585 xpt_done (ccb); 4586 } 4587 4588 /*========================================================== 4589 ** 4590 ** 4591 ** Signal all (or one) control block done. 4592 ** 4593 ** 4594 **========================================================== 4595 */ 4596 4597 void 4598 ncr_wakeup (ncb_p np, u_long code) 4599 { 4600 /* 4601 ** Starting at the default nccb and following 4602 ** the links, complete all jobs with a 4603 ** host_status greater than "disconnect". 4604 ** 4605 ** If the "code" parameter is not zero, 4606 ** complete all jobs that are not IDLE. 4607 */ 4608 4609 nccb_p cp = np->link_nccb; 4610 while (cp) { 4611 switch (cp->host_status) { 4612 4613 case HS_IDLE: 4614 break; 4615 4616 case HS_DISCONNECT: 4617 if(DEBUG_FLAGS & DEBUG_TINY) kprintf ("D"); 4618 /* fall through */ 4619 4620 case HS_BUSY: 4621 case HS_NEGOTIATE: 4622 if (!code) break; 4623 cp->host_status = code; 4624 4625 /* fall through */ 4626 4627 default: 4628 ncr_complete (np, cp); 4629 break; 4630 }; 4631 cp = cp -> link_nccb; 4632 }; 4633 } 4634 4635 static void 4636 ncr_freeze_devq (ncb_p np, struct cam_path *path) 4637 { 4638 nccb_p cp; 4639 int i; 4640 int count; 4641 int firstskip; 4642 /* 4643 ** Starting at the first nccb and following 4644 ** the links, complete all jobs that match 4645 ** the passed in path and are in the start queue. 4646 */ 4647 4648 cp = np->link_nccb; 4649 count = 0; 4650 firstskip = 0; 4651 while (cp) { 4652 switch (cp->host_status) { 4653 4654 case HS_BUSY: 4655 case HS_NEGOTIATE: 4656 if ((cp->phys.header.launch.l_paddr 4657 == NCB_SCRIPT_PHYS (np, select)) 4658 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) { 4659 4660 /* Mark for removal from the start queue */ 4661 for (i = 1; i < MAX_START; i++) { 4662 int idx; 4663 4664 idx = np->squeueput - i; 4665 4666 if (idx < 0) 4667 idx = MAX_START + idx; 4668 if (np->squeue[idx] 4669 == CCB_PHYS(cp, phys)) { 4670 np->squeue[idx] = 4671 NCB_SCRIPT_PHYS (np, skip); 4672 if (i > firstskip) 4673 firstskip = i; 4674 break; 4675 } 4676 } 4677 cp->host_status=HS_STALL; 4678 ncr_complete (np, cp); 4679 count++; 4680 } 4681 break; 4682 default: 4683 break; 4684 } 4685 cp = cp->link_nccb; 4686 } 4687 4688 if (count > 0) { 4689 int j; 4690 int bidx; 4691 4692 /* Compress the start queue */ 4693 j = 0; 4694 bidx = np->squeueput; 4695 i = np->squeueput - firstskip; 4696 if (i < 0) 4697 i = MAX_START + i; 4698 for (;;) { 4699 4700 bidx = i - j; 4701 if (bidx < 0) 4702 bidx = MAX_START + bidx; 4703 4704 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) { 4705 j++; 4706 } else if (j != 0) { 4707 np->squeue[bidx] = np->squeue[i]; 4708 if (np->squeue[bidx] 4709 == NCB_SCRIPT_PHYS(np, idle)) 4710 break; 4711 } 4712 i = (i + 1) % MAX_START; 4713 } 4714 np->squeueput = bidx; 4715 } 4716 } 4717 4718 /*========================================================== 4719 ** 4720 ** 4721 ** Start NCR chip. 4722 ** 4723 ** 4724 **========================================================== 4725 */ 4726 4727 void 4728 ncr_init(ncb_p np, char * msg, u_long code) 4729 { 4730 int i; 4731 4732 /* 4733 ** Reset chip. 4734 */ 4735 4736 OUTB (nc_istat, SRST); 4737 DELAY (1000); 4738 OUTB (nc_istat, 0); 4739 4740 /* 4741 ** Message. 4742 */ 4743 4744 if (msg) kprintf ("%s: restart (%s).\n", ncr_name (np), msg); 4745 4746 /* 4747 ** Clear Start Queue 4748 */ 4749 4750 for (i=0;i<MAX_START;i++) 4751 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle); 4752 4753 /* 4754 ** Start at first entry. 4755 */ 4756 4757 np->squeueput = 0; 4758 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop)); 4759 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0)); 4760 4761 /* 4762 ** Wakeup all pending jobs. 4763 */ 4764 4765 ncr_wakeup (np, code); 4766 4767 /* 4768 ** Init chip. 4769 */ 4770 4771 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */ 4772 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */ 4773 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */ 4774 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 4775 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */ 4776 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */ 4777 OUTB (nc_istat , SIGP ); /* Signal Process */ 4778 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */ 4779 OUTB (nc_dcntl , np->rv_dcntl); 4780 OUTB (nc_ctest3, np->rv_ctest3); 4781 OUTB (nc_ctest5, np->rv_ctest5); 4782 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */ 4783 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */ 4784 OUTB (nc_stest3, TE ); /* TolerANT enable */ 4785 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */ 4786 4787 if (bootverbose >= 2) { 4788 kprintf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 4789 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 4790 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 4791 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 4792 } 4793 4794 /* 4795 ** Enable GPIO0 pin for writing if LED support. 4796 */ 4797 4798 if (np->features & FE_LED0) { 4799 OUTOFFB (nc_gpcntl, 0x01); 4800 } 4801 4802 /* 4803 ** Fill in target structure. 4804 */ 4805 for (i=0;i<MAX_TARGET;i++) { 4806 tcb_p tp = &np->target[i]; 4807 4808 tp->tinfo.sval = 0; 4809 tp->tinfo.wval = np->rv_scntl3; 4810 4811 tp->tinfo.current.period = 0; 4812 tp->tinfo.current.offset = 0; 4813 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT; 4814 } 4815 4816 /* 4817 ** enable ints 4818 */ 4819 4820 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST); 4821 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 4822 4823 /* 4824 ** Start script processor. 4825 */ 4826 4827 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 4828 4829 /* 4830 * Notify the XPT of the event 4831 */ 4832 if (code == HS_RESET) 4833 xpt_async(AC_BUS_RESET, np->path, NULL); 4834 } 4835 4836 static void 4837 ncr_poll(struct cam_sim *sim) 4838 { 4839 ncr_intr(cam_sim_softc(sim)); 4840 } 4841 4842 4843 /*========================================================== 4844 ** 4845 ** Get clock factor and sync divisor for a given 4846 ** synchronous factor period. 4847 ** Returns the clock factor (in sxfer) and scntl3 4848 ** synchronous divisor field. 4849 ** 4850 **========================================================== 4851 */ 4852 4853 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p) 4854 { 4855 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 4856 int div = np->clock_divn; /* Number of divisors supported */ 4857 u_long fak; /* Sync factor in sxfer */ 4858 u_long per; /* Period in tenths of ns */ 4859 u_long kpc; /* (per * clk) */ 4860 4861 /* 4862 ** Compute the synchronous period in tenths of nano-seconds 4863 */ 4864 if (sfac <= 10) per = 250; 4865 else if (sfac == 11) per = 303; 4866 else if (sfac == 12) per = 500; 4867 else per = 40 * sfac; 4868 4869 /* 4870 ** Look for the greatest clock divisor that allows an 4871 ** input speed faster than the period. 4872 */ 4873 kpc = per * clk; 4874 while (--div >= 0) 4875 if (kpc >= (div_10M[div] * 4)) break; 4876 4877 /* 4878 ** Calculate the lowest clock factor that allows an output 4879 ** speed not faster than the period. 4880 */ 4881 fak = (kpc - 1) / div_10M[div] + 1; 4882 4883 #if 0 /* You can #if 1 if you think this optimization is useful */ 4884 4885 per = (fak * div_10M[div]) / clk; 4886 4887 /* 4888 ** Why not to try the immediate lower divisor and to choose 4889 ** the one that allows the fastest output speed ? 4890 ** We dont want input speed too much greater than output speed. 4891 */ 4892 if (div >= 1 && fak < 6) { 4893 u_long fak2, per2; 4894 fak2 = (kpc - 1) / div_10M[div-1] + 1; 4895 per2 = (fak2 * div_10M[div-1]) / clk; 4896 if (per2 < per && fak2 <= 6) { 4897 fak = fak2; 4898 per = per2; 4899 --div; 4900 } 4901 } 4902 #endif 4903 4904 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 4905 4906 /* 4907 ** Compute and return sync parameters for the ncr 4908 */ 4909 *fakp = fak - 4; 4910 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 4911 } 4912 4913 /*========================================================== 4914 ** 4915 ** Switch sync mode for current job and its target 4916 ** 4917 **========================================================== 4918 */ 4919 4920 static void 4921 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period) 4922 { 4923 union ccb *ccb; 4924 struct ccb_trans_settings neg; 4925 tcb_p tp; 4926 int div; 4927 u_int target = INB (nc_sdid) & 0x0f; 4928 u_int period_10ns; 4929 4930 assert (cp); 4931 if (!cp) return; 4932 4933 ccb = cp->ccb; 4934 assert (ccb); 4935 if (!ccb) return; 4936 assert (target == ccb->ccb_h.target_id); 4937 4938 tp = &np->target[target]; 4939 4940 if (!scntl3 || !(sxfer & 0x1f)) 4941 scntl3 = np->rv_scntl3; 4942 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS) 4943 | (np->rv_scntl3 & 0x07); 4944 4945 /* 4946 ** Deduce the value of controller sync period from scntl3. 4947 ** period is in tenths of nano-seconds. 4948 */ 4949 4950 div = ((scntl3 >> 4) & 0x7); 4951 if ((sxfer & 0x1f) && div) 4952 period_10ns = 4953 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz; 4954 else 4955 period_10ns = 0; 4956 4957 tp->tinfo.goal.period = period; 4958 tp->tinfo.goal.offset = sxfer & 0x1f; 4959 tp->tinfo.current.period = period; 4960 tp->tinfo.current.offset = sxfer & 0x1f; 4961 4962 /* 4963 ** Stop there if sync parameters are unchanged 4964 */ 4965 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return; 4966 tp->tinfo.sval = sxfer; 4967 tp->tinfo.wval = scntl3; 4968 4969 if (sxfer & 0x1f) { 4970 /* 4971 ** Disable extended Sreq/Sack filtering 4972 */ 4973 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT); 4974 } 4975 4976 /* 4977 ** Tell the SCSI layer about the 4978 ** new transfer parameters. 4979 */ 4980 memset(&neg, 0, sizeof (neg)); 4981 neg.protocol = PROTO_SCSI; 4982 neg.protocol_version = SCSI_REV_2; 4983 neg.transport = XPORT_SPI; 4984 neg.transport_version = 2; 4985 neg.xport_specific.spi.sync_period = period; 4986 neg.xport_specific.spi.sync_offset = sxfer & 0x1f; 4987 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE 4988 | CTS_SPI_VALID_SYNC_OFFSET; 4989 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, 4990 /*priority*/1); 4991 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg); 4992 4993 /* 4994 ** set actual value and sync_status 4995 */ 4996 OUTB (nc_sxfer, sxfer); 4997 np->sync_st = sxfer; 4998 OUTB (nc_scntl3, scntl3); 4999 np->wide_st = scntl3; 5000 5001 /* 5002 ** patch ALL nccbs of this target. 5003 */ 5004 for (cp = np->link_nccb; cp; cp = cp->link_nccb) { 5005 if (!cp->ccb) continue; 5006 if (cp->ccb->ccb_h.target_id != target) continue; 5007 cp->sync_status = sxfer; 5008 cp->wide_status = scntl3; 5009 }; 5010 } 5011 5012 /*========================================================== 5013 ** 5014 ** Switch wide mode for current job and its target 5015 ** SCSI specs say: a SCSI device that accepts a WDTR 5016 ** message shall reset the synchronous agreement to 5017 ** asynchronous mode. 5018 ** 5019 **========================================================== 5020 */ 5021 5022 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack) 5023 { 5024 union ccb *ccb; 5025 struct ccb_trans_settings neg; 5026 u_int target = INB (nc_sdid) & 0x0f; 5027 tcb_p tp; 5028 u_char scntl3; 5029 u_char sxfer; 5030 5031 assert (cp); 5032 if (!cp) return; 5033 5034 ccb = cp->ccb; 5035 assert (ccb); 5036 if (!ccb) return; 5037 assert (target == ccb->ccb_h.target_id); 5038 5039 tp = &np->target[target]; 5040 tp->tinfo.current.width = wide; 5041 tp->tinfo.goal.width = wide; 5042 tp->tinfo.current.period = 0; 5043 tp->tinfo.current.offset = 0; 5044 5045 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0); 5046 5047 sxfer = ack ? 0 : tp->tinfo.sval; 5048 5049 /* 5050 ** Stop there if sync/wide parameters are unchanged 5051 */ 5052 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return; 5053 tp->tinfo.sval = sxfer; 5054 tp->tinfo.wval = scntl3; 5055 5056 /* Tell the SCSI layer about the new transfer params */ 5057 memset(&neg, 0, sizeof (neg)); 5058 neg.protocol = PROTO_SCSI; 5059 neg.protocol_version = SCSI_REV_2; 5060 neg.transport = XPORT_SPI; 5061 neg.transport_version = 2; 5062 neg.xport_specific.spi.bus_width = (scntl3 & EWS) ? 5063 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT; 5064 neg.xport_specific.spi.sync_period = 0; 5065 neg.xport_specific.spi.sync_offset = 0; 5066 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE 5067 | CTS_SPI_VALID_SYNC_OFFSET 5068 | CTS_SPI_VALID_BUS_WIDTH; 5069 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, /*priority*/1); 5070 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg); 5071 5072 /* 5073 ** set actual value and sync_status 5074 */ 5075 OUTB (nc_sxfer, sxfer); 5076 np->sync_st = sxfer; 5077 OUTB (nc_scntl3, scntl3); 5078 np->wide_st = scntl3; 5079 5080 /* 5081 ** patch ALL nccbs of this target. 5082 */ 5083 for (cp = np->link_nccb; cp; cp = cp->link_nccb) { 5084 if (!cp->ccb) continue; 5085 if (cp->ccb->ccb_h.target_id != target) continue; 5086 cp->sync_status = sxfer; 5087 cp->wide_status = scntl3; 5088 }; 5089 } 5090 5091 /*========================================================== 5092 ** 5093 ** 5094 ** ncr timeout handler. 5095 ** 5096 ** 5097 **========================================================== 5098 ** 5099 ** Misused to keep the driver running when 5100 ** interrupts are not configured correctly. 5101 ** 5102 **---------------------------------------------------------- 5103 */ 5104 5105 static void 5106 ncr_timeout (void *arg) 5107 { 5108 ncb_p np = arg; 5109 time_t thistime = time_second; 5110 ticks_t step = np->ticks; 5111 u_long count = 0; 5112 long signed t; 5113 nccb_p cp; 5114 5115 if (np->lasttime != thistime) { 5116 /* 5117 ** block ncr interrupts 5118 */ 5119 crit_enter(); 5120 np->lasttime = thistime; 5121 5122 /*---------------------------------------------------- 5123 ** 5124 ** handle ncr chip timeouts 5125 ** 5126 ** Assumption: 5127 ** We have a chance to arbitrate for the 5128 ** SCSI bus at least every 10 seconds. 5129 ** 5130 **---------------------------------------------------- 5131 */ 5132 5133 t = thistime - np->heartbeat; 5134 5135 if (t<2) np->latetime=0; else np->latetime++; 5136 5137 if (np->latetime>2) { 5138 /* 5139 ** If there are no requests, the script 5140 ** processor will sleep on SEL_WAIT_RESEL. 5141 ** But we have to check whether it died. 5142 ** Let's try to wake it up. 5143 */ 5144 OUTB (nc_istat, SIGP); 5145 }; 5146 5147 /*---------------------------------------------------- 5148 ** 5149 ** handle nccb timeouts 5150 ** 5151 **---------------------------------------------------- 5152 */ 5153 5154 for (cp=np->link_nccb; cp; cp=cp->link_nccb) { 5155 /* 5156 ** look for timed out nccbs. 5157 */ 5158 if (!cp->host_status) continue; 5159 count++; 5160 if (cp->tlimit > thistime) continue; 5161 5162 /* 5163 ** Disable reselect. 5164 ** Remove it from startqueue. 5165 */ 5166 cp->jump_nccb.l_cmd = (SCR_JUMP); 5167 if (cp->phys.header.launch.l_paddr == 5168 NCB_SCRIPT_PHYS (np, select)) { 5169 kprintf ("%s: timeout nccb=%p (skip)\n", 5170 ncr_name (np), cp); 5171 cp->phys.header.launch.l_paddr 5172 = NCB_SCRIPT_PHYS (np, skip); 5173 }; 5174 5175 switch (cp->host_status) { 5176 5177 case HS_BUSY: 5178 case HS_NEGOTIATE: 5179 /* fall through */ 5180 case HS_DISCONNECT: 5181 cp->host_status=HS_TIMEOUT; 5182 }; 5183 cp->tag = 0; 5184 5185 /* 5186 ** wakeup this nccb. 5187 */ 5188 ncr_complete (np, cp); 5189 }; 5190 crit_exit(); 5191 } 5192 5193 callout_reset(&np->timeout_ch, step ? step : 1, ncr_timeout, np); 5194 5195 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5196 5197 /* 5198 ** Process pending interrupts. 5199 */ 5200 5201 crit_enter(); 5202 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("{"); 5203 ncr_exception (np); 5204 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("}"); 5205 crit_exit(); 5206 }; 5207 } 5208 5209 /*========================================================== 5210 ** 5211 ** log message for real hard errors 5212 ** 5213 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5214 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5215 ** 5216 ** exception register: 5217 ** ds: dstat 5218 ** si: sist 5219 ** 5220 ** SCSI bus lines: 5221 ** so: control lines as driver by NCR. 5222 ** si: control lines as seen by NCR. 5223 ** sd: scsi data lines as seen by NCR. 5224 ** 5225 ** wide/fastmode: 5226 ** sxfer: (see the manual) 5227 ** scntl3: (see the manual) 5228 ** 5229 ** current script command: 5230 ** dsp: script adress (relative to start of script). 5231 ** dbc: first word of script command. 5232 ** 5233 ** First 16 register of the chip: 5234 ** r0..rf 5235 ** 5236 **========================================================== 5237 */ 5238 5239 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat) 5240 { 5241 u_int32_t dsp; 5242 int script_ofs; 5243 int script_size; 5244 char *script_name; 5245 u_char *script_base; 5246 int i; 5247 5248 dsp = INL (nc_dsp); 5249 5250 if (np->p_script < dsp && 5251 dsp <= np->p_script + sizeof(struct script)) { 5252 script_ofs = dsp - np->p_script; 5253 script_size = sizeof(struct script); 5254 script_base = (u_char *) np->script; 5255 script_name = "script"; 5256 } 5257 else if (np->p_scripth < dsp && 5258 dsp <= np->p_scripth + sizeof(struct scripth)) { 5259 script_ofs = dsp - np->p_scripth; 5260 script_size = sizeof(struct scripth); 5261 script_base = (u_char *) np->scripth; 5262 script_name = "scripth"; 5263 } else { 5264 script_ofs = dsp; 5265 script_size = 0; 5266 script_base = 0; 5267 script_name = "mem"; 5268 } 5269 5270 kprintf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5271 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5272 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5273 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5274 (unsigned)INL (nc_dbc)); 5275 5276 if (((script_ofs & 3) == 0) && 5277 (unsigned)script_ofs < script_size) { 5278 kprintf ("%s: script cmd = %08x\n", ncr_name(np), 5279 (int)READSCRIPT_OFF(script_base, script_ofs)); 5280 } 5281 5282 kprintf ("%s: regdump:", ncr_name(np)); 5283 for (i=0; i<16;i++) 5284 kprintf (" %02x", (unsigned)INB_OFF(i)); 5285 kprintf (".\n"); 5286 } 5287 5288 /*========================================================== 5289 ** 5290 ** 5291 ** ncr chip exception handler. 5292 ** 5293 ** 5294 **========================================================== 5295 */ 5296 5297 void ncr_exception (ncb_p np) 5298 { 5299 u_char istat, dstat; 5300 u_short sist; 5301 5302 /* 5303 ** interrupt on the fly ? 5304 */ 5305 while ((istat = INB (nc_istat)) & INTF) { 5306 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("F "); 5307 OUTB (nc_istat, INTF); 5308 np->profile.num_fly++; 5309 ncr_wakeup (np, 0); 5310 }; 5311 if (!(istat & (SIP|DIP))) { 5312 return; 5313 } 5314 5315 /* 5316 ** Steinbach's Guideline for Systems Programming: 5317 ** Never test for an error condition you don't know how to handle. 5318 */ 5319 5320 sist = (istat & SIP) ? INW (nc_sist) : 0; 5321 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5322 np->profile.num_int++; 5323 5324 if (DEBUG_FLAGS & DEBUG_TINY) 5325 kprintf ("<%d|%x:%x|%x:%x>", 5326 INB(nc_scr0), 5327 dstat,sist, 5328 (unsigned)INL(nc_dsp), 5329 (unsigned)INL(nc_dbc)); 5330 if ((dstat==DFE) && (sist==PAR)) return; 5331 5332 /*========================================================== 5333 ** 5334 ** First the normal cases. 5335 ** 5336 **========================================================== 5337 */ 5338 /*------------------------------------------- 5339 ** SCSI reset 5340 **------------------------------------------- 5341 */ 5342 5343 if (sist & RST) { 5344 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET); 5345 return; 5346 }; 5347 5348 /*------------------------------------------- 5349 ** selection timeout 5350 ** 5351 ** IID excluded from dstat mask! 5352 ** (chip bug) 5353 **------------------------------------------- 5354 */ 5355 5356 if ((sist & STO) && 5357 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5358 !(dstat & (MDPE|BF|ABRT|SIR))) { 5359 ncr_int_sto (np); 5360 return; 5361 }; 5362 5363 /*------------------------------------------- 5364 ** Phase mismatch. 5365 **------------------------------------------- 5366 */ 5367 5368 if ((sist & MA) && 5369 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) && 5370 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5371 ncr_int_ma (np, dstat); 5372 return; 5373 }; 5374 5375 /*---------------------------------------- 5376 ** move command with length 0 5377 **---------------------------------------- 5378 */ 5379 5380 if ((dstat & IID) && 5381 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5382 !(dstat & (MDPE|BF|ABRT|SIR)) && 5383 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) { 5384 /* 5385 ** Target wants more data than available. 5386 ** The "no_data" script will do it. 5387 */ 5388 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data)); 5389 return; 5390 }; 5391 5392 /*------------------------------------------- 5393 ** Programmed interrupt 5394 **------------------------------------------- 5395 */ 5396 5397 if ((dstat & SIR) && 5398 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5399 !(dstat & (MDPE|BF|ABRT|IID)) && 5400 (INB(nc_dsps) <= SIR_MAX)) { 5401 ncr_int_sir (np); 5402 return; 5403 }; 5404 5405 /*======================================== 5406 ** log message for real hard errors 5407 **======================================== 5408 */ 5409 5410 ncr_log_hard_error(np, sist, dstat); 5411 5412 /*======================================== 5413 ** do the register dump 5414 **======================================== 5415 */ 5416 5417 if (time_second - np->regtime > 10) { 5418 int i; 5419 np->regtime = time_second; 5420 for (i=0; i<sizeof(np->regdump); i++) 5421 ((volatile char*)&np->regdump)[i] = INB_OFF(i); 5422 np->regdump.nc_dstat = dstat; 5423 np->regdump.nc_sist = sist; 5424 }; 5425 5426 5427 /*---------------------------------------- 5428 ** clean up the dma fifo 5429 **---------------------------------------- 5430 */ 5431 5432 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) || 5433 (INB(nc_sstat1) & (FF3210) ) || 5434 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */ 5435 !(dstat & DFE)) { 5436 kprintf ("%s: have to clear fifos.\n", ncr_name (np)); 5437 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5438 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5439 /* clear dma fifo */ 5440 } 5441 5442 /*---------------------------------------- 5443 ** handshake timeout 5444 **---------------------------------------- 5445 */ 5446 5447 if (sist & HTH) { 5448 kprintf ("%s: handshake timeout\n", ncr_name(np)); 5449 OUTB (nc_scntl1, CRST); 5450 DELAY (1000); 5451 OUTB (nc_scntl1, 0x00); 5452 OUTB (nc_scr0, HS_FAIL); 5453 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5454 return; 5455 } 5456 5457 /*---------------------------------------- 5458 ** unexpected disconnect 5459 **---------------------------------------- 5460 */ 5461 5462 if ((sist & UDC) && 5463 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) && 5464 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5465 OUTB (nc_scr0, HS_UNEXPECTED); 5466 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5467 return; 5468 }; 5469 5470 /*---------------------------------------- 5471 ** cannot disconnect 5472 **---------------------------------------- 5473 */ 5474 5475 if ((dstat & IID) && 5476 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5477 !(dstat & (MDPE|BF|ABRT|SIR)) && 5478 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) { 5479 /* 5480 ** Unexpected data cycle while waiting for disconnect. 5481 */ 5482 if (INB(nc_sstat2) & LDSC) { 5483 /* 5484 ** It's an early reconnect. 5485 ** Let's continue ... 5486 */ 5487 OUTB (nc_dcntl, np->rv_dcntl | STD); 5488 /* 5489 ** info message 5490 */ 5491 kprintf ("%s: INFO: LDSC while IID.\n", 5492 ncr_name (np)); 5493 return; 5494 }; 5495 kprintf ("%s: target %d doesn't release the bus.\n", 5496 ncr_name (np), INB (nc_sdid)&0x0f); 5497 /* 5498 ** return without restarting the NCR. 5499 ** timeout will do the real work. 5500 */ 5501 return; 5502 }; 5503 5504 /*---------------------------------------- 5505 ** single step 5506 **---------------------------------------- 5507 */ 5508 5509 if ((dstat & SSI) && 5510 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5511 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5512 OUTB (nc_dcntl, np->rv_dcntl | STD); 5513 return; 5514 }; 5515 5516 /* 5517 ** @RECOVER@ HTH, SGE, ABRT. 5518 ** 5519 ** We should try to recover from these interrupts. 5520 ** They may occur if there are problems with synch transfers, or 5521 ** if targets are switched on or off while the driver is running. 5522 */ 5523 5524 if (sist & SGE) { 5525 /* clear scsi offsets */ 5526 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5527 } 5528 5529 /* 5530 ** Freeze controller to be able to read the messages. 5531 */ 5532 5533 if (DEBUG_FLAGS & DEBUG_FREEZE) { 5534 int i; 5535 unsigned char val; 5536 for (i=0; i<0x60; i++) { 5537 switch (i%16) { 5538 5539 case 0: 5540 kprintf ("%s: reg[%d0]: ", 5541 ncr_name(np),i/16); 5542 break; 5543 case 4: 5544 case 8: 5545 case 12: 5546 kprintf (" "); 5547 break; 5548 }; 5549 val = bus_space_read_1(np->bst, np->bsh, i); 5550 kprintf (" %x%x", val/16, val%16); 5551 if (i%16==15) kprintf (".\n"); 5552 }; 5553 5554 callout_stop(&np->timeout_ch); 5555 5556 kprintf ("%s: halted!\n", ncr_name(np)); 5557 /* 5558 ** don't restart controller ... 5559 */ 5560 OUTB (nc_istat, SRST); 5561 return; 5562 }; 5563 5564 #ifdef NCR_FREEZE 5565 /* 5566 ** Freeze system to be able to read the messages. 5567 */ 5568 kprintf ("ncr: fatal error: system halted - press reset to reboot ..."); 5569 crit_enter(); 5570 for (;;); 5571 #endif 5572 5573 /* 5574 ** sorry, have to kill ALL jobs ... 5575 */ 5576 5577 ncr_init (np, "fatal error", HS_FAIL); 5578 } 5579 5580 /*========================================================== 5581 ** 5582 ** ncr chip exception handler for selection timeout 5583 ** 5584 **========================================================== 5585 ** 5586 ** There seems to be a bug in the 53c810. 5587 ** Although a STO-Interrupt is pending, 5588 ** it continues executing script commands. 5589 ** But it will fail and interrupt (IID) on 5590 ** the next instruction where it's looking 5591 ** for a valid phase. 5592 ** 5593 **---------------------------------------------------------- 5594 */ 5595 5596 void ncr_int_sto (ncb_p np) 5597 { 5598 u_long dsa, scratcha, diff; 5599 nccb_p cp; 5600 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("T"); 5601 5602 /* 5603 ** look for nccb and set the status. 5604 */ 5605 5606 dsa = INL (nc_dsa); 5607 cp = np->link_nccb; 5608 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5609 cp = cp->link_nccb; 5610 5611 if (cp) { 5612 cp-> host_status = HS_SEL_TIMEOUT; 5613 ncr_complete (np, cp); 5614 }; 5615 5616 /* 5617 ** repair start queue 5618 */ 5619 5620 scratcha = INL (nc_scratcha); 5621 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop); 5622 5623 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/ 5624 5625 if ((diff <= MAX_START * 20) && !(diff % 20)) { 5626 WRITESCRIPT(startpos[0], scratcha); 5627 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 5628 return; 5629 }; 5630 ncr_init (np, "selection timeout", HS_FAIL); 5631 } 5632 5633 /*========================================================== 5634 ** 5635 ** 5636 ** ncr chip exception handler for phase errors. 5637 ** 5638 ** 5639 **========================================================== 5640 ** 5641 ** We have to construct a new transfer descriptor, 5642 ** to transfer the rest of the current block. 5643 ** 5644 **---------------------------------------------------------- 5645 */ 5646 5647 static void ncr_int_ma (ncb_p np, u_char dstat) 5648 { 5649 u_int32_t dbc; 5650 u_int32_t rest; 5651 u_int32_t dsa; 5652 u_int32_t dsp; 5653 u_int32_t nxtdsp; 5654 volatile void *vdsp_base; 5655 size_t vdsp_off; 5656 u_int32_t oadr, olen; 5657 u_int32_t *tblp, *newcmd; 5658 u_char cmd, sbcl, ss0, ss2, ctest5; 5659 u_short delta; 5660 nccb_p cp; 5661 5662 dsp = INL (nc_dsp); 5663 dsa = INL (nc_dsa); 5664 dbc = INL (nc_dbc); 5665 ss0 = INB (nc_sstat0); 5666 ss2 = INB (nc_sstat2); 5667 sbcl= INB (nc_sbcl); 5668 5669 cmd = dbc >> 24; 5670 rest= dbc & 0xffffff; 5671 5672 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 5673 if (ctest5 & DFS) 5674 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 5675 else 5676 delta=(INB (nc_dfifo) - rest) & 0x7f; 5677 5678 5679 /* 5680 ** The data in the dma fifo has not been transfered to 5681 ** the target -> add the amount to the rest 5682 ** and clear the data. 5683 ** Check the sstat2 register in case of wide transfer. 5684 */ 5685 5686 if (!(dstat & DFE)) rest += delta; 5687 if (ss0 & OLF) rest++; 5688 if (ss0 & ORF) rest++; 5689 if (INB(nc_scntl3) & EWS) { 5690 if (ss2 & OLF1) rest++; 5691 if (ss2 & ORF1) rest++; 5692 }; 5693 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ 5694 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5695 5696 /* 5697 ** locate matching cp 5698 */ 5699 cp = np->link_nccb; 5700 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5701 cp = cp->link_nccb; 5702 5703 if (!cp) { 5704 kprintf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n", 5705 ncr_name (np), (void *) np->header.cp); 5706 return; 5707 } 5708 if (cp != np->header.cp) { 5709 kprintf ("%s: SCSI phase error fixup: CCB address mismatch " 5710 "(%p != %p) np->nccb = %p\n", 5711 ncr_name (np), (void *)cp, (void *)np->header.cp, 5712 (void *)np->link_nccb); 5713 /* return;*/ 5714 } 5715 5716 /* 5717 ** find the interrupted script command, 5718 ** and the address at which to continue. 5719 */ 5720 5721 if (dsp == vtophys (&cp->patch[2])) { 5722 vdsp_base = cp; 5723 vdsp_off = offsetof(struct nccb, patch[0]); 5724 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4); 5725 } else if (dsp == vtophys (&cp->patch[6])) { 5726 vdsp_base = cp; 5727 vdsp_off = offsetof(struct nccb, patch[4]); 5728 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4); 5729 } else if (dsp > np->p_script && 5730 dsp <= np->p_script + sizeof(struct script)) { 5731 vdsp_base = np->script; 5732 vdsp_off = dsp - np->p_script - 8; 5733 nxtdsp = dsp; 5734 } else { 5735 vdsp_base = np->scripth; 5736 vdsp_off = dsp - np->p_scripth - 8; 5737 nxtdsp = dsp; 5738 }; 5739 5740 /* 5741 ** log the information 5742 */ 5743 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) { 5744 kprintf ("P%x%x ",cmd&7, sbcl&7); 5745 kprintf ("RL=%d D=%d SS0=%x ", 5746 (unsigned) rest, (unsigned) delta, ss0); 5747 }; 5748 if (DEBUG_FLAGS & DEBUG_PHASE) { 5749 kprintf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 5750 cp, np->header.cp, 5751 dsp, 5752 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd); 5753 }; 5754 5755 /* 5756 ** get old startaddress and old length. 5757 */ 5758 5759 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4); 5760 5761 if (cmd & 0x10) { /* Table indirect */ 5762 tblp = (u_int32_t *) ((char*) &cp->phys + oadr); 5763 olen = tblp[0]; 5764 oadr = tblp[1]; 5765 } else { 5766 tblp = NULL; 5767 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff; 5768 }; 5769 5770 if (DEBUG_FLAGS & DEBUG_PHASE) { 5771 kprintf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n", 5772 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24), 5773 (void *) tblp, 5774 (u_long) olen, 5775 (u_long) oadr); 5776 }; 5777 5778 /* 5779 ** if old phase not dataphase, leave here. 5780 */ 5781 5782 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) { 5783 PRINT_ADDR(cp->ccb); 5784 kprintf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n", 5785 (unsigned)cmd, 5786 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24); 5787 5788 return; 5789 } 5790 if (cmd & 0x06) { 5791 PRINT_ADDR(cp->ccb); 5792 kprintf ("phase change %x-%x %d@%08x resid=%d.\n", 5793 cmd&7, sbcl&7, (unsigned)olen, 5794 (unsigned)oadr, (unsigned)rest); 5795 5796 OUTB (nc_dcntl, np->rv_dcntl | STD); 5797 return; 5798 }; 5799 5800 /* 5801 ** choose the correct patch area. 5802 ** if savep points to one, choose the other. 5803 */ 5804 5805 newcmd = cp->patch; 5806 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4; 5807 5808 /* 5809 ** fillin the commands 5810 */ 5811 5812 newcmd[0] = ((cmd & 0x0f) << 24) | rest; 5813 newcmd[1] = oadr + olen - rest; 5814 newcmd[2] = SCR_JUMP; 5815 newcmd[3] = nxtdsp; 5816 5817 if (DEBUG_FLAGS & DEBUG_PHASE) { 5818 PRINT_ADDR(cp->ccb); 5819 kprintf ("newcmd[%d] %x %x %x %x.\n", 5820 (int)(newcmd - cp->patch), 5821 (unsigned)newcmd[0], 5822 (unsigned)newcmd[1], 5823 (unsigned)newcmd[2], 5824 (unsigned)newcmd[3]); 5825 } 5826 /* 5827 ** fake the return address (to the patch). 5828 ** and restart script processor at dispatcher. 5829 */ 5830 np->profile.num_break++; 5831 OUTL (nc_temp, vtophys (newcmd)); 5832 if ((cmd & 7) == 0) 5833 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 5834 else 5835 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn)); 5836 } 5837 5838 /*========================================================== 5839 ** 5840 ** 5841 ** ncr chip exception handler for programmed interrupts. 5842 ** 5843 ** 5844 **========================================================== 5845 */ 5846 5847 static int ncr_show_msg (u_char * msg) 5848 { 5849 u_char i; 5850 kprintf ("%x",*msg); 5851 if (*msg==MSG_EXTENDED) { 5852 for (i=1;i<8;i++) { 5853 if (i-1>msg[1]) break; 5854 kprintf ("-%x",msg[i]); 5855 }; 5856 return (i+1); 5857 } else if ((*msg & 0xf0) == 0x20) { 5858 kprintf ("-%x",msg[1]); 5859 return (2); 5860 }; 5861 return (1); 5862 } 5863 5864 void ncr_int_sir (ncb_p np) 5865 { 5866 u_char scntl3; 5867 u_char chg, ofs, per, fak, wide; 5868 u_char num = INB (nc_dsps); 5869 nccb_p cp=0; 5870 u_long dsa; 5871 u_int target = INB (nc_sdid) & 0x0f; 5872 tcb_p tp = &np->target[target]; 5873 int i; 5874 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("I#%d", num); 5875 5876 switch (num) { 5877 case SIR_SENSE_RESTART: 5878 case SIR_STALL_RESTART: 5879 break; 5880 5881 default: 5882 /* 5883 ** lookup the nccb 5884 */ 5885 dsa = INL (nc_dsa); 5886 cp = np->link_nccb; 5887 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5888 cp = cp->link_nccb; 5889 5890 assert (cp); 5891 if (!cp) 5892 goto out; 5893 assert (cp == np->header.cp); 5894 if (cp != np->header.cp) 5895 goto out; 5896 } 5897 5898 switch (num) { 5899 5900 /*-------------------------------------------------------------------- 5901 ** 5902 ** Processing of interrupted getcc selects 5903 ** 5904 **-------------------------------------------------------------------- 5905 */ 5906 5907 case SIR_SENSE_RESTART: 5908 /*------------------------------------------ 5909 ** Script processor is idle. 5910 ** Look for interrupted "check cond" 5911 **------------------------------------------ 5912 */ 5913 5914 if (DEBUG_FLAGS & DEBUG_RESTART) 5915 kprintf ("%s: int#%d",ncr_name (np),num); 5916 cp = (nccb_p) 0; 5917 for (i=0; i<MAX_TARGET; i++) { 5918 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" t%d", i); 5919 tp = &np->target[i]; 5920 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+"); 5921 cp = tp->hold_cp; 5922 if (!cp) continue; 5923 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+"); 5924 if ((cp->host_status==HS_BUSY) && 5925 (cp->s_status==SCSI_STATUS_CHECK_COND)) 5926 break; 5927 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("- (remove)"); 5928 tp->hold_cp = cp = (nccb_p) 0; 5929 }; 5930 5931 if (cp) { 5932 if (DEBUG_FLAGS & DEBUG_RESTART) 5933 kprintf ("+ restart job ..\n"); 5934 OUTL (nc_dsa, CCB_PHYS (cp, phys)); 5935 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc)); 5936 return; 5937 }; 5938 5939 /* 5940 ** no job, resume normal processing 5941 */ 5942 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" -- remove trap\n"); 5943 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0)); 5944 break; 5945 5946 case SIR_SENSE_FAILED: 5947 /*------------------------------------------- 5948 ** While trying to select for 5949 ** getting the condition code, 5950 ** a target reselected us. 5951 **------------------------------------------- 5952 */ 5953 if (DEBUG_FLAGS & DEBUG_RESTART) { 5954 PRINT_ADDR(cp->ccb); 5955 kprintf ("in getcc reselect by t%d.\n", 5956 INB(nc_ssid) & 0x0f); 5957 } 5958 5959 /* 5960 ** Mark this job 5961 */ 5962 cp->host_status = HS_BUSY; 5963 cp->s_status = SCSI_STATUS_CHECK_COND; 5964 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp; 5965 5966 /* 5967 ** And patch code to restart it. 5968 */ 5969 WRITESCRIPT(start0[0], SCR_INT); 5970 break; 5971 5972 /*----------------------------------------------------------------------------- 5973 ** 5974 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 5975 ** 5976 ** We try to negotiate sync and wide transfer only after 5977 ** a successfull inquire command. We look at byte 7 of the 5978 ** inquire data to determine the capabilities if the target. 5979 ** 5980 ** When we try to negotiate, we append the negotiation message 5981 ** to the identify and (maybe) simple tag message. 5982 ** The host status field is set to HS_NEGOTIATE to mark this 5983 ** situation. 5984 ** 5985 ** If the target doesn't answer this message immidiately 5986 ** (as required by the standard), the SIR_NEGO_FAIL interrupt 5987 ** will be raised eventually. 5988 ** The handler removes the HS_NEGOTIATE status, and sets the 5989 ** negotiated value to the default (async / nowide). 5990 ** 5991 ** If we receive a matching answer immediately, we check it 5992 ** for validity, and set the values. 5993 ** 5994 ** If we receive a Reject message immediately, we assume the 5995 ** negotiation has failed, and fall back to standard values. 5996 ** 5997 ** If we receive a negotiation message while not in HS_NEGOTIATE 5998 ** state, it's a target initiated negotiation. We prepare a 5999 ** (hopefully) valid answer, set our parameters, and send back 6000 ** this answer to the target. 6001 ** 6002 ** If the target doesn't fetch the answer (no message out phase), 6003 ** we assume the negotiation has failed, and fall back to default 6004 ** settings. 6005 ** 6006 ** When we set the values, we adjust them in all nccbs belonging 6007 ** to this target, in the controller's register, and in the "phys" 6008 ** field of the controller's struct ncb. 6009 ** 6010 ** Possible cases: hs sir msg_in value send goto 6011 ** We try try to negotiate: 6012 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch 6013 ** -> target rejected our msg NEG FAIL reject defa. - dispatch 6014 ** -> target answered (ok) NEG SYNC sdtr set - clrack 6015 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6016 ** -> target answered (ok) NEG WIDE wdtr set - clrack 6017 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6018 ** -> any other msgin NEG FAIL noop defa. - dispatch 6019 ** 6020 ** Target tries to negotiate: 6021 ** -> incoming message --- SYNC sdtr set SDTR - 6022 ** -> incoming message --- WIDE wdtr set WDTR - 6023 ** We sent our answer: 6024 ** -> target doesn't msgout --- PROTO ? defa. - dispatch 6025 ** 6026 **----------------------------------------------------------------------------- 6027 */ 6028 6029 case SIR_NEGO_FAILED: 6030 /*------------------------------------------------------- 6031 ** 6032 ** Negotiation failed. 6033 ** Target doesn't send an answer message, 6034 ** or target rejected our message. 6035 ** 6036 ** Remove negotiation request. 6037 ** 6038 **------------------------------------------------------- 6039 */ 6040 OUTB (HS_PRT, HS_BUSY); 6041 6042 /* fall through */ 6043 6044 case SIR_NEGO_PROTO: 6045 /*------------------------------------------------------- 6046 ** 6047 ** Negotiation failed. 6048 ** Target doesn't fetch the answer message. 6049 ** 6050 **------------------------------------------------------- 6051 */ 6052 6053 if (DEBUG_FLAGS & DEBUG_NEGO) { 6054 PRINT_ADDR(cp->ccb); 6055 kprintf ("negotiation failed sir=%x status=%x.\n", 6056 num, cp->nego_status); 6057 }; 6058 6059 /* 6060 ** any error in negotiation: 6061 ** fall back to default mode. 6062 */ 6063 switch (cp->nego_status) { 6064 6065 case NS_SYNC: 6066 ncr_setsync (np, cp, 0, 0xe0, 0); 6067 break; 6068 6069 case NS_WIDE: 6070 ncr_setwide (np, cp, 0, 0); 6071 break; 6072 6073 }; 6074 np->msgin [0] = MSG_NOOP; 6075 np->msgout[0] = MSG_NOOP; 6076 cp->nego_status = 0; 6077 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 6078 break; 6079 6080 case SIR_NEGO_SYNC: 6081 /* 6082 ** Synchronous request message received. 6083 */ 6084 6085 if (DEBUG_FLAGS & DEBUG_NEGO) { 6086 PRINT_ADDR(cp->ccb); 6087 kprintf ("sync msgin: "); 6088 (void) ncr_show_msg (np->msgin); 6089 kprintf (".\n"); 6090 }; 6091 6092 /* 6093 ** get requested values. 6094 */ 6095 6096 chg = 0; 6097 per = np->msgin[3]; 6098 ofs = np->msgin[4]; 6099 if (ofs==0) per=255; 6100 6101 /* 6102 ** check values against driver limits. 6103 */ 6104 if (per < np->minsync) 6105 {chg = 1; per = np->minsync;} 6106 if (per < tp->tinfo.user.period) 6107 {chg = 1; per = tp->tinfo.user.period;} 6108 if (ofs > tp->tinfo.user.offset) 6109 {chg = 1; ofs = tp->tinfo.user.offset;} 6110 6111 /* 6112 ** Check against controller limits. 6113 */ 6114 6115 fak = 7; 6116 scntl3 = 0; 6117 if (ofs != 0) { 6118 ncr_getsync(np, per, &fak, &scntl3); 6119 if (fak > 7) { 6120 chg = 1; 6121 ofs = 0; 6122 } 6123 } 6124 if (ofs == 0) { 6125 fak = 7; 6126 per = 0; 6127 scntl3 = 0; 6128 } 6129 6130 if (DEBUG_FLAGS & DEBUG_NEGO) { 6131 PRINT_ADDR(cp->ccb); 6132 kprintf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n", 6133 per, scntl3, ofs, fak, chg); 6134 } 6135 6136 if (INB (HS_PRT) == HS_NEGOTIATE) { 6137 OUTB (HS_PRT, HS_BUSY); 6138 switch (cp->nego_status) { 6139 6140 case NS_SYNC: 6141 /* 6142 ** This was an answer message 6143 */ 6144 if (chg) { 6145 /* 6146 ** Answer wasn't acceptable. 6147 */ 6148 ncr_setsync (np, cp, 0, 0xe0, 0); 6149 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6150 } else { 6151 /* 6152 ** Answer is ok. 6153 */ 6154 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per); 6155 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6156 }; 6157 return; 6158 6159 case NS_WIDE: 6160 ncr_setwide (np, cp, 0, 0); 6161 break; 6162 }; 6163 }; 6164 6165 /* 6166 ** It was a request. Set value and 6167 ** prepare an answer message 6168 */ 6169 6170 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per); 6171 6172 np->msgout[0] = MSG_EXTENDED; 6173 np->msgout[1] = 3; 6174 np->msgout[2] = MSG_EXT_SDTR; 6175 np->msgout[3] = per; 6176 np->msgout[4] = ofs; 6177 6178 cp->nego_status = NS_SYNC; 6179 6180 if (DEBUG_FLAGS & DEBUG_NEGO) { 6181 PRINT_ADDR(cp->ccb); 6182 kprintf ("sync msgout: "); 6183 (void) ncr_show_msg (np->msgout); 6184 kprintf (".\n"); 6185 } 6186 6187 if (!ofs) { 6188 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6189 return; 6190 } 6191 np->msgin [0] = MSG_NOOP; 6192 6193 break; 6194 6195 case SIR_NEGO_WIDE: 6196 /* 6197 ** Wide request message received. 6198 */ 6199 if (DEBUG_FLAGS & DEBUG_NEGO) { 6200 PRINT_ADDR(cp->ccb); 6201 kprintf ("wide msgin: "); 6202 (void) ncr_show_msg (np->msgin); 6203 kprintf (".\n"); 6204 }; 6205 6206 /* 6207 ** get requested values. 6208 */ 6209 6210 chg = 0; 6211 wide = np->msgin[3]; 6212 6213 /* 6214 ** check values against driver limits. 6215 */ 6216 6217 if (wide > tp->tinfo.user.width) 6218 {chg = 1; wide = tp->tinfo.user.width;} 6219 6220 if (DEBUG_FLAGS & DEBUG_NEGO) { 6221 PRINT_ADDR(cp->ccb); 6222 kprintf ("wide: wide=%d chg=%d.\n", wide, chg); 6223 } 6224 6225 if (INB (HS_PRT) == HS_NEGOTIATE) { 6226 OUTB (HS_PRT, HS_BUSY); 6227 switch (cp->nego_status) { 6228 6229 case NS_WIDE: 6230 /* 6231 ** This was an answer message 6232 */ 6233 if (chg) { 6234 /* 6235 ** Answer wasn't acceptable. 6236 */ 6237 ncr_setwide (np, cp, 0, 1); 6238 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6239 } else { 6240 /* 6241 ** Answer is ok. 6242 */ 6243 ncr_setwide (np, cp, wide, 1); 6244 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6245 }; 6246 return; 6247 6248 case NS_SYNC: 6249 ncr_setsync (np, cp, 0, 0xe0, 0); 6250 break; 6251 }; 6252 }; 6253 6254 /* 6255 ** It was a request, set value and 6256 ** prepare an answer message 6257 */ 6258 6259 ncr_setwide (np, cp, wide, 1); 6260 6261 np->msgout[0] = MSG_EXTENDED; 6262 np->msgout[1] = 2; 6263 np->msgout[2] = MSG_EXT_WDTR; 6264 np->msgout[3] = wide; 6265 6266 np->msgin [0] = MSG_NOOP; 6267 6268 cp->nego_status = NS_WIDE; 6269 6270 if (DEBUG_FLAGS & DEBUG_NEGO) { 6271 PRINT_ADDR(cp->ccb); 6272 kprintf ("wide msgout: "); 6273 (void) ncr_show_msg (np->msgout); 6274 kprintf (".\n"); 6275 } 6276 break; 6277 6278 /*-------------------------------------------------------------------- 6279 ** 6280 ** Processing of special messages 6281 ** 6282 **-------------------------------------------------------------------- 6283 */ 6284 6285 case SIR_REJECT_RECEIVED: 6286 /*----------------------------------------------- 6287 ** 6288 ** We received a MSG_MESSAGE_REJECT message. 6289 ** 6290 **----------------------------------------------- 6291 */ 6292 6293 PRINT_ADDR(cp->ccb); 6294 kprintf ("MSG_MESSAGE_REJECT received (%x:%x).\n", 6295 (unsigned)np->lastmsg, np->msgout[0]); 6296 break; 6297 6298 case SIR_REJECT_SENT: 6299 /*----------------------------------------------- 6300 ** 6301 ** We received an unknown message 6302 ** 6303 **----------------------------------------------- 6304 */ 6305 6306 PRINT_ADDR(cp->ccb); 6307 kprintf ("MSG_MESSAGE_REJECT sent for "); 6308 (void) ncr_show_msg (np->msgin); 6309 kprintf (".\n"); 6310 break; 6311 6312 /*-------------------------------------------------------------------- 6313 ** 6314 ** Processing of special messages 6315 ** 6316 **-------------------------------------------------------------------- 6317 */ 6318 6319 case SIR_IGN_RESIDUE: 6320 /*----------------------------------------------- 6321 ** 6322 ** We received an IGNORE RESIDUE message, 6323 ** which couldn't be handled by the script. 6324 ** 6325 **----------------------------------------------- 6326 */ 6327 6328 PRINT_ADDR(cp->ccb); 6329 kprintf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n"); 6330 break; 6331 6332 case SIR_MISSING_SAVE: 6333 /*----------------------------------------------- 6334 ** 6335 ** We received an DISCONNECT message, 6336 ** but the datapointer wasn't saved before. 6337 ** 6338 **----------------------------------------------- 6339 */ 6340 6341 PRINT_ADDR(cp->ccb); 6342 kprintf ("MSG_DISCONNECT received, but datapointer not saved:\n" 6343 "\tdata=%x save=%x goal=%x.\n", 6344 (unsigned) INL (nc_temp), 6345 (unsigned) np->header.savep, 6346 (unsigned) np->header.goalp); 6347 break; 6348 6349 /*-------------------------------------------------------------------- 6350 ** 6351 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status. 6352 ** 6353 ** XXX JGibbs - We should do the same thing for BUSY status. 6354 ** 6355 ** The current command has been rejected, 6356 ** because there are too many in the command queue. 6357 ** We have started too many commands for that target. 6358 ** 6359 **-------------------------------------------------------------------- 6360 */ 6361 case SIR_STALL_QUEUE: 6362 cp->xerr_status = XE_OK; 6363 cp->host_status = HS_COMPLETE; 6364 cp->s_status = SCSI_STATUS_QUEUE_FULL; 6365 ncr_freeze_devq(np, cp->ccb->ccb_h.path); 6366 ncr_complete(np, cp); 6367 6368 /* FALL THROUGH */ 6369 6370 case SIR_STALL_RESTART: 6371 /*----------------------------------------------- 6372 ** 6373 ** Enable selecting again, 6374 ** if NO disconnected jobs. 6375 ** 6376 **----------------------------------------------- 6377 */ 6378 /* 6379 ** Look for a disconnected job. 6380 */ 6381 cp = np->link_nccb; 6382 while (cp && cp->host_status != HS_DISCONNECT) 6383 cp = cp->link_nccb; 6384 6385 /* 6386 ** if there is one, ... 6387 */ 6388 if (cp) { 6389 /* 6390 ** wait for reselection 6391 */ 6392 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect)); 6393 return; 6394 }; 6395 6396 /* 6397 ** else remove the interrupt. 6398 */ 6399 6400 kprintf ("%s: queue empty.\n", ncr_name (np)); 6401 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0)); 6402 break; 6403 }; 6404 6405 out: 6406 OUTB (nc_dcntl, np->rv_dcntl | STD); 6407 } 6408 6409 /*========================================================== 6410 ** 6411 ** 6412 ** Acquire a control block 6413 ** 6414 ** 6415 **========================================================== 6416 */ 6417 6418 static nccb_p ncr_get_nccb 6419 (ncb_p np, u_long target, u_long lun) 6420 { 6421 lcb_p lp; 6422 nccb_p cp = NULL; 6423 6424 /* Keep our timeout handler out */ 6425 crit_enter(); 6426 6427 /* 6428 ** Lun structure available ? 6429 */ 6430 6431 lp = np->target[target].lp[lun]; 6432 if (lp) { 6433 cp = lp->next_nccb; 6434 6435 /* 6436 ** Look for free CCB 6437 */ 6438 6439 while (cp && cp->magic) { 6440 cp = cp->next_nccb; 6441 } 6442 } 6443 6444 /* 6445 ** if nothing available, create one. 6446 */ 6447 6448 if (cp == NULL) 6449 cp = ncr_alloc_nccb(np, target, lun); 6450 6451 if (cp != NULL) { 6452 if (cp->magic) { 6453 kprintf("%s: Bogus free cp found\n", ncr_name(np)); 6454 crit_exit(); 6455 return (NULL); 6456 } 6457 cp->magic = 1; 6458 } 6459 crit_exit(); 6460 return (cp); 6461 } 6462 6463 /*========================================================== 6464 ** 6465 ** 6466 ** Release one control block 6467 ** 6468 ** 6469 **========================================================== 6470 */ 6471 6472 void ncr_free_nccb (ncb_p np, nccb_p cp) 6473 { 6474 /* 6475 ** sanity 6476 */ 6477 6478 assert (cp != NULL); 6479 6480 cp -> host_status = HS_IDLE; 6481 cp -> magic = 0; 6482 } 6483 6484 /*========================================================== 6485 ** 6486 ** 6487 ** Allocation of resources for Targets/Luns/Tags. 6488 ** 6489 ** 6490 **========================================================== 6491 */ 6492 6493 static nccb_p 6494 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun) 6495 { 6496 tcb_p tp; 6497 lcb_p lp; 6498 nccb_p cp; 6499 6500 assert (np != NULL); 6501 6502 if (target>=MAX_TARGET) return(NULL); 6503 if (lun >=MAX_LUN ) return(NULL); 6504 6505 tp=&np->target[target]; 6506 6507 if (!tp->jump_tcb.l_cmd) { 6508 6509 /* 6510 ** initialize it. 6511 */ 6512 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target))); 6513 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr; 6514 6515 tp->getscr[0] = 6516 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6517 tp->getscr[1] = vtophys (&tp->tinfo.sval); 6518 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer); 6519 tp->getscr[3] = 6520 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6521 tp->getscr[4] = vtophys (&tp->tinfo.wval); 6522 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3); 6523 6524 assert (((offsetof(struct ncr_reg, nc_sxfer) ^ 6525 (offsetof(struct tcb ,tinfo) 6526 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0); 6527 assert (((offsetof(struct ncr_reg, nc_scntl3) ^ 6528 (offsetof(struct tcb, tinfo) 6529 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0); 6530 6531 tp->call_lun.l_cmd = (SCR_CALL); 6532 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun); 6533 6534 tp->jump_lcb.l_cmd = (SCR_JUMP); 6535 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort); 6536 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb); 6537 } 6538 6539 /* 6540 ** Logic unit control block 6541 */ 6542 lp = tp->lp[lun]; 6543 if (!lp) { 6544 /* 6545 ** Allocate a lcb 6546 */ 6547 lp = kmalloc (sizeof (struct lcb), M_DEVBUF, M_WAITOK | M_ZERO); 6548 6549 /* 6550 ** Initialize it 6551 */ 6552 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun))); 6553 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr; 6554 6555 lp->call_tag.l_cmd = (SCR_CALL); 6556 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag); 6557 6558 lp->jump_nccb.l_cmd = (SCR_JUMP); 6559 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag); 6560 6561 lp->actlink = 1; 6562 6563 /* 6564 ** Chain into LUN list 6565 */ 6566 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb); 6567 tp->lp[lun] = lp; 6568 6569 } 6570 6571 /* 6572 ** Allocate a nccb 6573 */ 6574 cp = kmalloc (sizeof (struct nccb), M_DEVBUF, M_WAITOK | M_ZERO); 6575 6576 if (DEBUG_FLAGS & DEBUG_ALLOC) { 6577 kprintf ("new nccb @%p.\n", cp); 6578 } 6579 6580 /* 6581 ** Fill in physical addresses 6582 */ 6583 6584 cp->p_nccb = vtophys (cp); 6585 6586 /* 6587 ** Chain into reselect list 6588 */ 6589 cp->jump_nccb.l_cmd = SCR_JUMP; 6590 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr; 6591 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb); 6592 cp->call_tmp.l_cmd = SCR_CALL; 6593 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp); 6594 6595 /* 6596 ** Chain into wakeup list 6597 */ 6598 cp->link_nccb = np->link_nccb; 6599 np->link_nccb = cp; 6600 6601 /* 6602 ** Chain into CCB list 6603 */ 6604 cp->next_nccb = lp->next_nccb; 6605 lp->next_nccb = cp; 6606 6607 return (cp); 6608 } 6609 6610 /*========================================================== 6611 ** 6612 ** 6613 ** Build Scatter Gather Block 6614 ** 6615 ** 6616 **========================================================== 6617 ** 6618 ** The transfer area may be scattered among 6619 ** several non adjacent physical pages. 6620 ** 6621 ** We may use MAX_SCATTER blocks. 6622 ** 6623 **---------------------------------------------------------- 6624 */ 6625 6626 static int ncr_scatter 6627 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen) 6628 { 6629 u_long paddr, pnext; 6630 6631 u_short segment = 0; 6632 u_long segsize, segaddr; 6633 u_long size, csize = 0; 6634 u_long chunk = MAX_SIZE; 6635 int free; 6636 6637 bzero (&phys->data, sizeof (phys->data)); 6638 if (!datalen) return (0); 6639 6640 paddr = vtophys (vaddr); 6641 6642 /* 6643 ** insert extra break points at a distance of chunk. 6644 ** We try to reduce the number of interrupts caused 6645 ** by unexpected phase changes due to disconnects. 6646 ** A typical harddisk may disconnect before ANY block. 6647 ** If we wanted to avoid unexpected phase changes at all 6648 ** we had to use a break point every 512 bytes. 6649 ** Of course the number of scatter/gather blocks is 6650 ** limited. 6651 */ 6652 6653 free = MAX_SCATTER - 1; 6654 6655 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE; 6656 6657 if (free>1) 6658 while ((chunk * free >= 2 * datalen) && (chunk>=1024)) 6659 chunk /= 2; 6660 6661 if(DEBUG_FLAGS & DEBUG_SCATTER) 6662 kprintf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n", 6663 (void *) vaddr, (unsigned) datalen, (unsigned) chunk); 6664 6665 /* 6666 ** Build data descriptors. 6667 */ 6668 while (datalen && (segment < MAX_SCATTER)) { 6669 6670 /* 6671 ** this segment is empty 6672 */ 6673 segsize = 0; 6674 segaddr = paddr; 6675 pnext = paddr; 6676 6677 if (!csize) csize = chunk; 6678 6679 while ((datalen) && (paddr == pnext) && (csize)) { 6680 6681 /* 6682 ** continue this segment 6683 */ 6684 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE; 6685 6686 /* 6687 ** Compute max size 6688 */ 6689 6690 size = pnext - paddr; /* page size */ 6691 if (size > datalen) size = datalen; /* data size */ 6692 if (size > csize ) size = csize ; /* chunksize */ 6693 6694 segsize += size; 6695 vaddr += size; 6696 csize -= size; 6697 datalen -= size; 6698 paddr = vtophys (vaddr); 6699 }; 6700 6701 if(DEBUG_FLAGS & DEBUG_SCATTER) 6702 kprintf ("\tseg #%d addr=%x size=%d (rest=%d).\n", 6703 segment, 6704 (unsigned) segaddr, 6705 (unsigned) segsize, 6706 (unsigned) datalen); 6707 6708 phys->data[segment].addr = segaddr; 6709 phys->data[segment].size = segsize; 6710 segment++; 6711 } 6712 6713 if (datalen) { 6714 kprintf("ncr?: scatter/gather failed (residue=%d).\n", 6715 (unsigned) datalen); 6716 return (-1); 6717 }; 6718 6719 return (segment); 6720 } 6721 6722 /*========================================================== 6723 ** 6724 ** 6725 ** Test the pci bus snoop logic :-( 6726 ** 6727 ** Has to be called with interrupts disabled. 6728 ** 6729 ** 6730 **========================================================== 6731 */ 6732 6733 #ifndef NCR_IOMAPPED 6734 static int ncr_regtest (struct ncb* np) 6735 { 6736 volatile u_int32_t data; 6737 /* 6738 ** ncr registers may NOT be cached. 6739 ** write 0xffffffff to a read only register area, 6740 ** and try to read it back. 6741 */ 6742 data = 0xffffffff; 6743 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 6744 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 6745 #if 1 6746 if (data == 0xffffffff) { 6747 #else 6748 if ((data & 0xe2f0fffd) != 0x02000080) { 6749 #endif 6750 kprintf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 6751 (unsigned) data); 6752 return (0x10); 6753 }; 6754 return (0); 6755 } 6756 #endif 6757 6758 static int ncr_snooptest (struct ncb* np) 6759 { 6760 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 6761 int i, err=0; 6762 #ifndef NCR_IOMAPPED 6763 err |= ncr_regtest (np); 6764 if (err) return (err); 6765 #endif 6766 /* 6767 ** init 6768 */ 6769 pc = NCB_SCRIPTH_PHYS (np, snooptest); 6770 host_wr = 1; 6771 ncr_wr = 2; 6772 /* 6773 ** Set memory and register. 6774 */ 6775 ncr_cache = host_wr; 6776 OUTL (nc_temp, ncr_wr); 6777 /* 6778 ** Start script (exchange values) 6779 */ 6780 OUTL (nc_dsp, pc); 6781 /* 6782 ** Wait 'til done (with timeout) 6783 */ 6784 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 6785 if (INB(nc_istat) & (INTF|SIP|DIP)) 6786 break; 6787 /* 6788 ** Save termination position. 6789 */ 6790 pc = INL (nc_dsp); 6791 /* 6792 ** Read memory and register. 6793 */ 6794 host_rd = ncr_cache; 6795 ncr_rd = INL (nc_scratcha); 6796 ncr_bk = INL (nc_temp); 6797 /* 6798 ** Reset ncr chip 6799 */ 6800 OUTB (nc_istat, SRST); 6801 DELAY (1000); 6802 OUTB (nc_istat, 0 ); 6803 /* 6804 ** check for timeout 6805 */ 6806 if (i>=NCR_SNOOP_TIMEOUT) { 6807 kprintf ("CACHE TEST FAILED: timeout.\n"); 6808 return (0x20); 6809 }; 6810 /* 6811 ** Check termination position. 6812 */ 6813 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 6814 kprintf ("CACHE TEST FAILED: script execution failed.\n"); 6815 kprintf ("start=%08lx, pc=%08lx, end=%08lx\n", 6816 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 6817 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 6818 return (0x40); 6819 }; 6820 /* 6821 ** Show results. 6822 */ 6823 if (host_wr != ncr_rd) { 6824 kprintf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 6825 (int) host_wr, (int) ncr_rd); 6826 err |= 1; 6827 }; 6828 if (host_rd != ncr_wr) { 6829 kprintf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 6830 (int) ncr_wr, (int) host_rd); 6831 err |= 2; 6832 }; 6833 if (ncr_bk != ncr_wr) { 6834 kprintf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 6835 (int) ncr_wr, (int) ncr_bk); 6836 err |= 4; 6837 }; 6838 return (err); 6839 } 6840 6841 /*========================================================== 6842 ** 6843 ** 6844 ** Profiling the drivers and targets performance. 6845 ** 6846 ** 6847 **========================================================== 6848 */ 6849 6850 /* 6851 ** Compute the difference in milliseconds. 6852 **/ 6853 6854 static int ncr_delta (int *from, int *to) 6855 { 6856 if (!from) return (-1); 6857 if (!to) return (-2); 6858 return ((to - from) * 1000 / hz); 6859 } 6860 6861 #define PROFILE cp->phys.header.stamp 6862 static void ncb_profile (ncb_p np, nccb_p cp) 6863 { 6864 int co, da, st, en, di, se, post,work,disc; 6865 u_long diff; 6866 6867 PROFILE.end = ticks; 6868 6869 st = ncr_delta (&PROFILE.start,&PROFILE.status); 6870 if (st<0) return; /* status not reached */ 6871 6872 da = ncr_delta (&PROFILE.start,&PROFILE.data); 6873 if (da<0) return; /* No data transfer phase */ 6874 6875 co = ncr_delta (&PROFILE.start,&PROFILE.command); 6876 if (co<0) return; /* command not executed */ 6877 6878 en = ncr_delta (&PROFILE.start,&PROFILE.end), 6879 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect), 6880 se = ncr_delta (&PROFILE.start,&PROFILE.select); 6881 post = en - st; 6882 6883 /* 6884 ** @PROFILE@ Disconnect time invalid if multiple disconnects 6885 */ 6886 6887 if (di>=0) disc = se-di; else disc = 0; 6888 6889 work = (st - co) - disc; 6890 6891 diff = (np->disc_phys - np->disc_ref) & 0xff; 6892 np->disc_ref += diff; 6893 6894 np->profile.num_trans += 1; 6895 if (cp->ccb) 6896 np->profile.num_bytes += cp->ccb->csio.dxfer_len; 6897 np->profile.num_disc += diff; 6898 np->profile.ms_setup += co; 6899 np->profile.ms_data += work; 6900 np->profile.ms_disc += disc; 6901 np->profile.ms_post += post; 6902 } 6903 #undef PROFILE 6904 6905 /*========================================================== 6906 ** 6907 ** Determine the ncr's clock frequency. 6908 ** This is essential for the negotiation 6909 ** of the synchronous transfer rate. 6910 ** 6911 **========================================================== 6912 ** 6913 ** Note: we have to return the correct value. 6914 ** THERE IS NO SAVE DEFAULT VALUE. 6915 ** 6916 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 6917 ** 53C860 and 53C875 rev. 1 support fast20 transfers but 6918 ** do not have a clock doubler and so are provided with a 6919 ** 80 MHz clock. All other fast20 boards incorporate a doubler 6920 ** and so should be delivered with a 40 MHz clock. 6921 ** The future fast40 chips (895/895) use a 40 Mhz base clock 6922 ** and provide a clock quadrupler (160 Mhz). The code below 6923 ** tries to deal as cleverly as possible with all this stuff. 6924 ** 6925 **---------------------------------------------------------- 6926 */ 6927 6928 /* 6929 * Select NCR SCSI clock frequency 6930 */ 6931 static void ncr_selectclock(ncb_p np, u_char scntl3) 6932 { 6933 if (np->multiplier < 2) { 6934 OUTB(nc_scntl3, scntl3); 6935 return; 6936 } 6937 6938 if (bootverbose >= 2) 6939 kprintf ("%s: enabling clock multiplier\n", ncr_name(np)); 6940 6941 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 6942 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 6943 int i = 20; 6944 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 6945 DELAY(20); 6946 if (!i) 6947 kprintf("%s: the chip cannot lock the frequency\n", ncr_name(np)); 6948 } else /* Wait 20 micro-seconds for doubler */ 6949 DELAY(20); 6950 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 6951 OUTB(nc_scntl3, scntl3); 6952 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 6953 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 6954 } 6955 6956 /* 6957 * calculate NCR SCSI clock frequency (in KHz) 6958 */ 6959 static unsigned 6960 ncrgetfreq (ncb_p np, int gen) 6961 { 6962 int ms = 0; 6963 /* 6964 * Measure GEN timer delay in order 6965 * to calculate SCSI clock frequency 6966 * 6967 * This code will never execute too 6968 * many loop iterations (if DELAY is 6969 * reasonably correct). It could get 6970 * too low a delay (too high a freq.) 6971 * if the CPU is slow executing the 6972 * loop for some reason (an NMI, for 6973 * example). For this reason we will 6974 * if multiple measurements are to be 6975 * performed trust the higher delay 6976 * (lower frequency returned). 6977 */ 6978 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 6979 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 6980 (void) INW (nc_sist); /* clear pending scsi interrupt */ 6981 OUTB (nc_dien , 0); /* mask all dma interrupts */ 6982 (void) INW (nc_sist); /* another one, just to be sure :) */ 6983 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 6984 OUTB (nc_stime1, 0); /* disable general purpose timer */ 6985 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */ 6986 while (!(INW(nc_sist) & GEN) && ms++ < 1000) 6987 DELAY(1000); /* count ms */ 6988 OUTB (nc_stime1, 0); /* disable general purpose timer */ 6989 OUTB (nc_scntl3, 0); 6990 /* 6991 * Set prescaler to divide by whatever "0" means. 6992 * "0" ought to choose divide by 2, but appears 6993 * to set divide by 3.5 mode in my 53c810 ... 6994 */ 6995 OUTB (nc_scntl3, 0); 6996 6997 if (bootverbose >= 2) 6998 kprintf ("\tDelay (GEN=%d): %u msec\n", gen, ms); 6999 /* 7000 * adjust for prescaler, and convert into KHz 7001 */ 7002 return ms ? ((1 << gen) * 4440) / ms : 0; 7003 } 7004 7005 static void ncr_getclock (ncb_p np, u_char multiplier) 7006 { 7007 unsigned char scntl3; 7008 unsigned char stest1; 7009 scntl3 = INB(nc_scntl3); 7010 stest1 = INB(nc_stest1); 7011 7012 np->multiplier = 1; 7013 7014 if (multiplier > 1) { 7015 np->multiplier = multiplier; 7016 np->clock_khz = 40000 * multiplier; 7017 } else { 7018 if ((scntl3 & 7) == 0) { 7019 unsigned f1, f2; 7020 /* throw away first result */ 7021 (void) ncrgetfreq (np, 11); 7022 f1 = ncrgetfreq (np, 11); 7023 f2 = ncrgetfreq (np, 11); 7024 7025 if (bootverbose >= 2) 7026 kprintf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2); 7027 if (f1 > f2) f1 = f2; /* trust lower result */ 7028 if (f1 > 45000) { 7029 scntl3 = 5; /* >45Mhz: assume 80MHz */ 7030 } else { 7031 scntl3 = 3; /* <45Mhz: assume 40MHz */ 7032 } 7033 } 7034 else if ((scntl3 & 7) == 5) 7035 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */ 7036 } 7037 } 7038 7039 /*=========================================================================*/ 7040 7041 #ifdef NCR_TEKRAM_EEPROM 7042 7043 struct tekram_eeprom_dev { 7044 u_char devmode; 7045 #define TKR_PARCHK 0x01 7046 #define TKR_TRYSYNC 0x02 7047 #define TKR_ENDISC 0x04 7048 #define TKR_STARTUNIT 0x08 7049 #define TKR_USETAGS 0x10 7050 #define TKR_TRYWIDE 0x20 7051 u_char syncparam; /* max. sync transfer rate (table ?) */ 7052 u_char filler1; 7053 u_char filler2; 7054 }; 7055 7056 7057 struct tekram_eeprom { 7058 struct tekram_eeprom_dev 7059 dev[16]; 7060 u_char adaptid; 7061 u_char adaptmode; 7062 #define TKR_ADPT_GT2DRV 0x01 7063 #define TKR_ADPT_GT1GB 0x02 7064 #define TKR_ADPT_RSTBUS 0x04 7065 #define TKR_ADPT_ACTNEG 0x08 7066 #define TKR_ADPT_NOSEEK 0x10 7067 #define TKR_ADPT_MORLUN 0x20 7068 u_char delay; /* unit ? ( table ??? ) */ 7069 u_char tags; /* use 4 times as many ... */ 7070 u_char filler[60]; 7071 }; 7072 7073 static void 7074 tekram_write_bit (ncb_p np, int bit) 7075 { 7076 u_char val = 0x10 + ((bit & 1) << 1); 7077 7078 DELAY(10); 7079 OUTB (nc_gpreg, val); 7080 DELAY(10); 7081 OUTB (nc_gpreg, val | 0x04); 7082 DELAY(10); 7083 OUTB (nc_gpreg, val); 7084 DELAY(10); 7085 } 7086 7087 static int 7088 tekram_read_bit (ncb_p np) 7089 { 7090 OUTB (nc_gpreg, 0x10); 7091 DELAY(10); 7092 OUTB (nc_gpreg, 0x14); 7093 DELAY(10); 7094 return INB (nc_gpreg) & 1; 7095 } 7096 7097 static u_short 7098 read_tekram_eeprom_reg (ncb_p np, int reg) 7099 { 7100 int bit; 7101 u_short result = 0; 7102 int cmd = 0x80 | reg; 7103 7104 OUTB (nc_gpreg, 0x10); 7105 7106 tekram_write_bit (np, 1); 7107 for (bit = 7; bit >= 0; bit--) 7108 { 7109 tekram_write_bit (np, cmd >> bit); 7110 } 7111 7112 for (bit = 0; bit < 16; bit++) 7113 { 7114 result <<= 1; 7115 result |= tekram_read_bit (np); 7116 } 7117 7118 OUTB (nc_gpreg, 0x00); 7119 return result; 7120 } 7121 7122 static int 7123 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer) 7124 { 7125 u_short *p = (u_short *) buffer; 7126 u_short sum = 0; 7127 int i; 7128 7129 if (INB (nc_gpcntl) != 0x09) 7130 { 7131 return 0; 7132 } 7133 for (i = 0; i < 64; i++) 7134 { 7135 u_short val; 7136 if((i&0x0f) == 0) kprintf ("%02x:", i*2); 7137 val = read_tekram_eeprom_reg (np, i); 7138 if (p) 7139 *p++ = val; 7140 sum += val; 7141 if((i&0x01) == 0x00) kprintf (" "); 7142 kprintf ("%02x%02x", val & 0xff, (val >> 8) & 0xff); 7143 if((i&0x0f) == 0x0f) kprintf ("\n"); 7144 } 7145 kprintf ("Sum = %04x\n", sum); 7146 return sum == 0x1234; 7147 } 7148 #endif /* NCR_TEKRAM_EEPROM */ 7149 7150 static device_method_t ncr_methods[] = { 7151 /* Device interface */ 7152 DEVMETHOD(device_probe, ncr_probe), 7153 DEVMETHOD(device_attach, ncr_attach), 7154 7155 { 0, 0 } 7156 }; 7157 7158 static driver_t ncr_driver = { 7159 "ncr", 7160 ncr_methods, 7161 sizeof(struct ncb), 7162 }; 7163 7164 static devclass_t ncr_devclass; 7165 7166 DRIVER_MODULE(if_ncr, pci, ncr_driver, ncr_devclass, 0, 0); 7167 7168 /*=========================================================================*/ 7169 #endif /* _KERNEL */ 7170