1 /************************************************************************** 2 ** 3 ** $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $ 4 ** $DragonFly: src/sys/dev/disk/ncr/ncr.c,v 1.22 2008/05/18 20:30:22 pavalos Exp $ 5 ** 6 ** Device driver for the NCR 53C8XX PCI-SCSI-Controller Family. 7 ** 8 **------------------------------------------------------------------------- 9 ** 10 ** Written for 386bsd and FreeBSD by 11 ** Wolfgang Stanglmeier <wolf@cologne.de> 12 ** Stefan Esser <se@mi.Uni-Koeln.de> 13 ** 14 **------------------------------------------------------------------------- 15 ** 16 ** Copyright (c) 1994 Wolfgang Stanglmeier. All rights reserved. 17 ** 18 ** Redistribution and use in source and binary forms, with or without 19 ** modification, are permitted provided that the following conditions 20 ** are met: 21 ** 1. Redistributions of source code must retain the above copyright 22 ** notice, this list of conditions and the following disclaimer. 23 ** 2. Redistributions in binary form must reproduce the above copyright 24 ** notice, this list of conditions and the following disclaimer in the 25 ** documentation and/or other materials provided with the distribution. 26 ** 3. The name of the author may not be used to endorse or promote products 27 ** derived from this software without specific prior written permission. 28 ** 29 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 30 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 31 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 32 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 33 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 34 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 35 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 36 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 37 ** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 38 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 39 ** 40 *************************************************************************** 41 */ 42 43 #define NCR_DATE "pl30 98/1/1" 44 45 #define NCR_VERSION (2) 46 #define MAX_UNITS (16) 47 48 #define NCR_GETCC_WITHMSG 49 50 #if (defined(__DragonFly__) || defined (__FreeBSD__)) && defined(_KERNEL) 51 #include "opt_ncr.h" 52 #endif 53 54 /*========================================================== 55 ** 56 ** Configuration and Debugging 57 ** 58 ** May be overwritten in <arch/conf/xxxx> 59 ** 60 **========================================================== 61 */ 62 63 /* 64 ** SCSI address of this device. 65 ** The boot routines should have set it. 66 ** If not, use this. 67 */ 68 69 #ifndef SCSI_NCR_MYADDR 70 #define SCSI_NCR_MYADDR (7) 71 #endif /* SCSI_NCR_MYADDR */ 72 73 /* 74 ** The default synchronous period factor 75 ** (0=asynchronous) 76 ** If maximum synchronous frequency is defined, use it instead. 77 */ 78 79 #ifndef SCSI_NCR_MAX_SYNC 80 81 #ifndef SCSI_NCR_DFLT_SYNC 82 #define SCSI_NCR_DFLT_SYNC (12) 83 #endif /* SCSI_NCR_DFLT_SYNC */ 84 85 #else 86 87 #if SCSI_NCR_MAX_SYNC == 0 88 #define SCSI_NCR_DFLT_SYNC 0 89 #else 90 #define SCSI_NCR_DFLT_SYNC (250000 / SCSI_NCR_MAX_SYNC) 91 #endif 92 93 #endif 94 95 /* 96 ** The minimal asynchronous pre-scaler period (ns) 97 ** Shall be 40. 98 */ 99 100 #ifndef SCSI_NCR_MIN_ASYNC 101 #define SCSI_NCR_MIN_ASYNC (40) 102 #endif /* SCSI_NCR_MIN_ASYNC */ 103 104 /* 105 ** The maximal bus with (in log2 byte) 106 ** (0=8 bit, 1=16 bit) 107 */ 108 109 #ifndef SCSI_NCR_MAX_WIDE 110 #define SCSI_NCR_MAX_WIDE (1) 111 #endif /* SCSI_NCR_MAX_WIDE */ 112 113 /*========================================================== 114 ** 115 ** Configuration and Debugging 116 ** 117 **========================================================== 118 */ 119 120 /* 121 ** Number of targets supported by the driver. 122 ** n permits target numbers 0..n-1. 123 ** Default is 7, meaning targets #0..#6. 124 ** #7 .. is myself. 125 */ 126 127 #define MAX_TARGET (16) 128 129 /* 130 ** Number of logic units supported by the driver. 131 ** n enables logic unit numbers 0..n-1. 132 ** The common SCSI devices require only 133 ** one lun, so take 1 as the default. 134 */ 135 136 #ifndef MAX_LUN 137 #define MAX_LUN (8) 138 #endif /* MAX_LUN */ 139 140 /* 141 ** The maximum number of jobs scheduled for starting. 142 ** There should be one slot per target, and one slot 143 ** for each tag of each target in use. 144 */ 145 146 #define MAX_START (256) 147 148 /* 149 ** The maximum number of segments a transfer is split into. 150 */ 151 152 #define MAX_SCATTER (33) 153 154 /* 155 ** The maximum transfer length (should be >= 64k). 156 ** MUST NOT be greater than (MAX_SCATTER-1) * PAGE_SIZE. 157 */ 158 159 #define MAX_SIZE ((MAX_SCATTER-1) * (long) PAGE_SIZE) 160 161 /* 162 ** other 163 */ 164 165 #define NCR_SNOOP_TIMEOUT (1000000) 166 167 /*========================================================== 168 ** 169 ** Include files 170 ** 171 **========================================================== 172 */ 173 174 #include <sys/param.h> 175 #include <sys/time.h> 176 177 #ifdef _KERNEL 178 #include <sys/systm.h> 179 #include <sys/malloc.h> 180 #include <sys/buf.h> 181 #include <sys/kernel.h> 182 #include <sys/sysctl.h> 183 #include <sys/bus.h> 184 #include <sys/thread2.h> 185 #include <machine/clock.h> 186 #include <machine/md_var.h> 187 #include <sys/rman.h> 188 #include <vm/vm.h> 189 #include <vm/pmap.h> 190 #include <vm/vm_extern.h> 191 #endif 192 193 #include <bus/pci/pcivar.h> 194 #include <bus/pci/pcireg.h> 195 #include "ncrreg.h" 196 197 #include <bus/cam/cam.h> 198 #include <bus/cam/cam_ccb.h> 199 #include <bus/cam/cam_sim.h> 200 #include <bus/cam/cam_xpt_sim.h> 201 #include <bus/cam/cam_debug.h> 202 203 #include <bus/cam/scsi/scsi_all.h> 204 #include <bus/cam/scsi/scsi_message.h> 205 206 /*========================================================== 207 ** 208 ** Debugging tags 209 ** 210 **========================================================== 211 */ 212 213 #define DEBUG_ALLOC (0x0001) 214 #define DEBUG_PHASE (0x0002) 215 #define DEBUG_POLL (0x0004) 216 #define DEBUG_QUEUE (0x0008) 217 #define DEBUG_RESULT (0x0010) 218 #define DEBUG_SCATTER (0x0020) 219 #define DEBUG_SCRIPT (0x0040) 220 #define DEBUG_TINY (0x0080) 221 #define DEBUG_TIMING (0x0100) 222 #define DEBUG_NEGO (0x0200) 223 #define DEBUG_TAGS (0x0400) 224 #define DEBUG_FREEZE (0x0800) 225 #define DEBUG_RESTART (0x1000) 226 227 /* 228 ** Enable/Disable debug messages. 229 ** Can be changed at runtime too. 230 */ 231 #ifdef SCSI_NCR_DEBUG 232 #define DEBUG_FLAGS ncr_debug 233 #else /* SCSI_NCR_DEBUG */ 234 #define SCSI_NCR_DEBUG 0 235 #define DEBUG_FLAGS 0 236 #endif /* SCSI_NCR_DEBUG */ 237 238 239 240 /*========================================================== 241 ** 242 ** assert () 243 ** 244 **========================================================== 245 ** 246 ** modified copy from 386bsd:/usr/include/sys/assert.h 247 ** 248 **---------------------------------------------------------- 249 */ 250 251 #ifdef DIAGNOSTIC 252 #define assert(expression) { \ 253 if (!(expression)) { \ 254 (void)kprintf("assertion \"%s\" failed: " \ 255 "file \"%s\", line %d\n", \ 256 #expression, __FILE__, __LINE__); \ 257 Debugger(""); \ 258 } \ 259 } 260 #else 261 #define assert(expression) { \ 262 if (!(expression)) { \ 263 (void)kprintf("assertion \"%s\" failed: " \ 264 "file \"%s\", line %d\n", \ 265 #expression, __FILE__, __LINE__); \ 266 } \ 267 } 268 #endif 269 270 /*========================================================== 271 ** 272 ** Access to the controller chip. 273 ** 274 **========================================================== 275 */ 276 277 #define INB(r) bus_space_read_1(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 278 #define INW(r) bus_space_read_2(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 279 #define INL(r) bus_space_read_4(np->bst, np->bsh, offsetof(struct ncr_reg, r)) 280 281 #define OUTB(r, val) bus_space_write_1(np->bst, np->bsh, \ 282 offsetof(struct ncr_reg, r), val) 283 #define OUTW(r, val) bus_space_write_2(np->bst, np->bsh, \ 284 offsetof(struct ncr_reg, r), val) 285 #define OUTL(r, val) bus_space_write_4(np->bst, np->bsh, \ 286 offsetof(struct ncr_reg, r), val) 287 #define OUTL_OFF(o, val) bus_space_write_4(np->bst, np->bsh, o, val) 288 289 #define INB_OFF(o) bus_space_read_1(np->bst, np->bsh, o) 290 #define INW_OFF(o) bus_space_read_2(np->bst, np->bsh, o) 291 #define INL_OFF(o) bus_space_read_4(np->bst, np->bsh, o) 292 293 #define READSCRIPT_OFF(base, off) \ 294 (base ? *((volatile u_int32_t *)((volatile char *)base + (off))) : \ 295 bus_space_read_4(np->bst2, np->bsh2, off)) 296 297 #define WRITESCRIPT_OFF(base, off, val) \ 298 do { \ 299 if (base) \ 300 *((volatile u_int32_t *) \ 301 ((volatile char *)base + (off))) = (val); \ 302 else \ 303 bus_space_write_4(np->bst2, np->bsh2, off, val); \ 304 } while (0) 305 306 #define READSCRIPT(r) \ 307 READSCRIPT_OFF(np->script, offsetof(struct script, r)) 308 309 #define WRITESCRIPT(r, val) \ 310 WRITESCRIPT_OFF(np->script, offsetof(struct script, r), val) 311 312 /* 313 ** Set bit field ON, OFF 314 */ 315 316 #define OUTONB(r, m) OUTB(r, INB(r) | (m)) 317 #define OUTOFFB(r, m) OUTB(r, INB(r) & ~(m)) 318 #define OUTONW(r, m) OUTW(r, INW(r) | (m)) 319 #define OUTOFFW(r, m) OUTW(r, INW(r) & ~(m)) 320 #define OUTONL(r, m) OUTL(r, INL(r) | (m)) 321 #define OUTOFFL(r, m) OUTL(r, INL(r) & ~(m)) 322 323 /*========================================================== 324 ** 325 ** Command control block states. 326 ** 327 **========================================================== 328 */ 329 330 #define HS_IDLE (0) 331 #define HS_BUSY (1) 332 #define HS_NEGOTIATE (2) /* sync/wide data transfer*/ 333 #define HS_DISCONNECT (3) /* Disconnected by target */ 334 335 #define HS_COMPLETE (4) 336 #define HS_SEL_TIMEOUT (5) /* Selection timeout */ 337 #define HS_RESET (6) /* SCSI reset */ 338 #define HS_ABORTED (7) /* Transfer aborted */ 339 #define HS_TIMEOUT (8) /* Software timeout */ 340 #define HS_FAIL (9) /* SCSI or PCI bus errors */ 341 #define HS_UNEXPECTED (10) /* Unexpected disconnect */ 342 #define HS_STALL (11) /* QUEUE FULL or BUSY */ 343 344 #define HS_DONEMASK (0xfc) 345 346 /*========================================================== 347 ** 348 ** Software Interrupt Codes 349 ** 350 **========================================================== 351 */ 352 353 #define SIR_SENSE_RESTART (1) 354 #define SIR_SENSE_FAILED (2) 355 #define SIR_STALL_RESTART (3) 356 #define SIR_STALL_QUEUE (4) 357 #define SIR_NEGO_SYNC (5) 358 #define SIR_NEGO_WIDE (6) 359 #define SIR_NEGO_FAILED (7) 360 #define SIR_NEGO_PROTO (8) 361 #define SIR_REJECT_RECEIVED (9) 362 #define SIR_REJECT_SENT (10) 363 #define SIR_IGN_RESIDUE (11) 364 #define SIR_MISSING_SAVE (12) 365 #define SIR_MAX (12) 366 367 /*========================================================== 368 ** 369 ** Extended error codes. 370 ** xerr_status field of struct nccb. 371 ** 372 **========================================================== 373 */ 374 375 #define XE_OK (0) 376 #define XE_EXTRA_DATA (1) /* unexpected data phase */ 377 #define XE_BAD_PHASE (2) /* illegal phase (4/5) */ 378 379 /*========================================================== 380 ** 381 ** Negotiation status. 382 ** nego_status field of struct nccb. 383 ** 384 **========================================================== 385 */ 386 387 #define NS_SYNC (1) 388 #define NS_WIDE (2) 389 390 /*========================================================== 391 ** 392 ** XXX These are no longer used. Remove once the 393 ** script is updated. 394 ** "Special features" of targets. 395 ** quirks field of struct tcb. 396 ** actualquirks field of struct nccb. 397 ** 398 **========================================================== 399 */ 400 401 #define QUIRK_AUTOSAVE (0x01) 402 #define QUIRK_NOMSG (0x02) 403 #define QUIRK_NOSYNC (0x10) 404 #define QUIRK_NOWIDE16 (0x20) 405 #define QUIRK_NOTAGS (0x40) 406 #define QUIRK_UPDATE (0x80) 407 408 /*========================================================== 409 ** 410 ** Misc. 411 ** 412 **========================================================== 413 */ 414 415 #define CCB_MAGIC (0xf2691ad2) 416 #define MAX_TAGS (32) /* hard limit */ 417 418 /*========================================================== 419 ** 420 ** OS dependencies. 421 ** 422 **========================================================== 423 */ 424 425 #define PRINT_ADDR(ccb) xpt_print_path((ccb)->ccb_h.path) 426 427 /*========================================================== 428 ** 429 ** Declaration of structs. 430 ** 431 **========================================================== 432 */ 433 434 struct tcb; 435 struct lcb; 436 struct nccb; 437 struct ncb; 438 struct script; 439 440 typedef struct ncb * ncb_p; 441 typedef struct tcb * tcb_p; 442 typedef struct lcb * lcb_p; 443 typedef struct nccb * nccb_p; 444 445 struct link { 446 ncrcmd l_cmd; 447 ncrcmd l_paddr; 448 }; 449 450 struct usrcmd { 451 u_long target; 452 u_long lun; 453 u_long data; 454 u_long cmd; 455 }; 456 457 #define UC_SETSYNC 10 458 #define UC_SETTAGS 11 459 #define UC_SETDEBUG 12 460 #define UC_SETORDER 13 461 #define UC_SETWIDE 14 462 #define UC_SETFLAG 15 463 464 #define UF_TRACE (0x01) 465 466 /*--------------------------------------- 467 ** 468 ** Timestamps for profiling 469 ** 470 **--------------------------------------- 471 */ 472 473 /* Type of the kernel variable `ticks'. XXX should be declared with the var. */ 474 typedef int ticks_t; 475 476 struct tstamp { 477 ticks_t start; 478 ticks_t end; 479 ticks_t select; 480 ticks_t command; 481 ticks_t data; 482 ticks_t status; 483 ticks_t disconnect; 484 }; 485 486 /* 487 ** profiling data (per device) 488 */ 489 490 struct profile { 491 u_long num_trans; 492 u_long num_bytes; 493 u_long num_disc; 494 u_long num_break; 495 u_long num_int; 496 u_long num_fly; 497 u_long ms_setup; 498 u_long ms_data; 499 u_long ms_disc; 500 u_long ms_post; 501 }; 502 503 /*========================================================== 504 ** 505 ** Declaration of structs: target control block 506 ** 507 **========================================================== 508 */ 509 510 #define NCR_TRANS_CUR 0x01 /* Modify current neogtiation status */ 511 #define NCR_TRANS_ACTIVE 0x03 /* Assume this is the active target */ 512 #define NCR_TRANS_GOAL 0x04 /* Modify negotiation goal */ 513 #define NCR_TRANS_USER 0x08 /* Modify user negotiation settings */ 514 515 struct ncr_transinfo { 516 u_int8_t width; 517 u_int8_t period; 518 u_int8_t offset; 519 }; 520 521 struct ncr_target_tinfo { 522 /* Hardware version of our sync settings */ 523 u_int8_t disc_tag; 524 #define NCR_CUR_DISCENB 0x01 525 #define NCR_CUR_TAGENB 0x02 526 #define NCR_USR_DISCENB 0x04 527 #define NCR_USR_TAGENB 0x08 528 u_int8_t sval; 529 struct ncr_transinfo current; 530 struct ncr_transinfo goal; 531 struct ncr_transinfo user; 532 /* Hardware version of our wide settings */ 533 u_int8_t wval; 534 }; 535 536 struct tcb { 537 /* 538 ** during reselection the ncr jumps to this point 539 ** with SFBR set to the encoded target number 540 ** with bit 7 set. 541 ** if it's not this target, jump to the next. 542 ** 543 ** JUMP IF (SFBR != #target#) 544 ** @(next tcb) 545 */ 546 547 struct link jump_tcb; 548 549 /* 550 ** load the actual values for the sxfer and the scntl3 551 ** register (sync/wide mode). 552 ** 553 ** SCR_COPY (1); 554 ** @(sval field of this tcb) 555 ** @(sxfer register) 556 ** SCR_COPY (1); 557 ** @(wval field of this tcb) 558 ** @(scntl3 register) 559 */ 560 561 ncrcmd getscr[6]; 562 563 /* 564 ** if next message is "identify" 565 ** then load the message to SFBR, 566 ** else load 0 to SFBR. 567 ** 568 ** CALL 569 ** <RESEL_LUN> 570 */ 571 572 struct link call_lun; 573 574 /* 575 ** now look for the right lun. 576 ** 577 ** JUMP 578 ** @(first nccb of this lun) 579 */ 580 581 struct link jump_lcb; 582 583 /* 584 ** pointer to interrupted getcc nccb 585 */ 586 587 nccb_p hold_cp; 588 589 /* 590 ** pointer to nccb used for negotiating. 591 ** Avoid to start a nego for all queued commands 592 ** when tagged command queuing is enabled. 593 */ 594 595 nccb_p nego_cp; 596 597 /* 598 ** statistical data 599 */ 600 601 u_long transfers; 602 u_long bytes; 603 604 /* 605 ** user settable limits for sync transfer 606 ** and tagged commands. 607 */ 608 609 struct ncr_target_tinfo tinfo; 610 611 /* 612 ** the lcb's of this tcb 613 */ 614 615 lcb_p lp[MAX_LUN]; 616 }; 617 618 /*========================================================== 619 ** 620 ** Declaration of structs: lun control block 621 ** 622 **========================================================== 623 */ 624 625 struct lcb { 626 /* 627 ** during reselection the ncr jumps to this point 628 ** with SFBR set to the "Identify" message. 629 ** if it's not this lun, jump to the next. 630 ** 631 ** JUMP IF (SFBR != #lun#) 632 ** @(next lcb of this target) 633 */ 634 635 struct link jump_lcb; 636 637 /* 638 ** if next message is "simple tag", 639 ** then load the tag to SFBR, 640 ** else load 0 to SFBR. 641 ** 642 ** CALL 643 ** <RESEL_TAG> 644 */ 645 646 struct link call_tag; 647 648 /* 649 ** now look for the right nccb. 650 ** 651 ** JUMP 652 ** @(first nccb of this lun) 653 */ 654 655 struct link jump_nccb; 656 657 /* 658 ** start of the nccb chain 659 */ 660 661 nccb_p next_nccb; 662 663 /* 664 ** Control of tagged queueing 665 */ 666 667 u_char reqnccbs; 668 u_char reqlink; 669 u_char actlink; 670 u_char usetags; 671 u_char lasttag; 672 }; 673 674 /*========================================================== 675 ** 676 ** Declaration of structs: COMMAND control block 677 ** 678 **========================================================== 679 ** 680 ** This substructure is copied from the nccb to a 681 ** global address after selection (or reselection) 682 ** and copied back before disconnect. 683 ** 684 ** These fields are accessible to the script processor. 685 ** 686 **---------------------------------------------------------- 687 */ 688 689 struct head { 690 /* 691 ** Execution of a nccb starts at this point. 692 ** It's a jump to the "SELECT" label 693 ** of the script. 694 ** 695 ** After successful selection the script 696 ** processor overwrites it with a jump to 697 ** the IDLE label of the script. 698 */ 699 700 struct link launch; 701 702 /* 703 ** Saved data pointer. 704 ** Points to the position in the script 705 ** responsible for the actual transfer 706 ** of data. 707 ** It's written after reception of a 708 ** "SAVE_DATA_POINTER" message. 709 ** The goalpointer points after 710 ** the last transfer command. 711 */ 712 713 u_int32_t savep; 714 u_int32_t lastp; 715 u_int32_t goalp; 716 717 /* 718 ** The virtual address of the nccb 719 ** containing this header. 720 */ 721 722 nccb_p cp; 723 724 /* 725 ** space for some timestamps to gather 726 ** profiling data about devices and this driver. 727 */ 728 729 struct tstamp stamp; 730 731 /* 732 ** status fields. 733 */ 734 735 u_char status[8]; 736 }; 737 738 /* 739 ** The status bytes are used by the host and the script processor. 740 ** 741 ** The first four byte are copied to the scratchb register 742 ** (declared as scr0..scr3 in ncr_reg.h) just after the select/reselect, 743 ** and copied back just after disconnecting. 744 ** Inside the script the XX_REG are used. 745 ** 746 ** The last four bytes are used inside the script by "COPY" commands. 747 ** Because source and destination must have the same alignment 748 ** in a longword, the fields HAVE to be at the choosen offsets. 749 ** xerr_st (4) 0 (0x34) scratcha 750 ** sync_st (5) 1 (0x05) sxfer 751 ** wide_st (7) 3 (0x03) scntl3 752 */ 753 754 /* 755 ** First four bytes (script) 756 */ 757 #define QU_REG scr0 758 #define HS_REG scr1 759 #define HS_PRT nc_scr1 760 #define SS_REG scr2 761 #define PS_REG scr3 762 763 /* 764 ** First four bytes (host) 765 */ 766 #define actualquirks phys.header.status[0] 767 #define host_status phys.header.status[1] 768 #define s_status phys.header.status[2] 769 #define parity_status phys.header.status[3] 770 771 /* 772 ** Last four bytes (script) 773 */ 774 #define xerr_st header.status[4] /* MUST be ==0 mod 4 */ 775 #define sync_st header.status[5] /* MUST be ==1 mod 4 */ 776 #define nego_st header.status[6] 777 #define wide_st header.status[7] /* MUST be ==3 mod 4 */ 778 779 /* 780 ** Last four bytes (host) 781 */ 782 #define xerr_status phys.xerr_st 783 #define sync_status phys.sync_st 784 #define nego_status phys.nego_st 785 #define wide_status phys.wide_st 786 787 /*========================================================== 788 ** 789 ** Declaration of structs: Data structure block 790 ** 791 **========================================================== 792 ** 793 ** During execution of a nccb by the script processor, 794 ** the DSA (data structure address) register points 795 ** to this substructure of the nccb. 796 ** This substructure contains the header with 797 ** the script-processor-changable data and 798 ** data blocks for the indirect move commands. 799 ** 800 **---------------------------------------------------------- 801 */ 802 803 struct dsb { 804 805 /* 806 ** Header. 807 ** Has to be the first entry, 808 ** because it's jumped to by the 809 ** script processor 810 */ 811 812 struct head header; 813 814 /* 815 ** Table data for Script 816 */ 817 818 struct scr_tblsel select; 819 struct scr_tblmove smsg ; 820 struct scr_tblmove smsg2 ; 821 struct scr_tblmove cmd ; 822 struct scr_tblmove scmd ; 823 struct scr_tblmove sense ; 824 struct scr_tblmove data [MAX_SCATTER]; 825 }; 826 827 /*========================================================== 828 ** 829 ** Declaration of structs: Command control block. 830 ** 831 **========================================================== 832 ** 833 ** During execution of a nccb by the script processor, 834 ** the DSA (data structure address) register points 835 ** to this substructure of the nccb. 836 ** This substructure contains the header with 837 ** the script-processor-changable data and then 838 ** data blocks for the indirect move commands. 839 ** 840 **---------------------------------------------------------- 841 */ 842 843 844 struct nccb { 845 /* 846 ** This filler ensures that the global header is 847 ** cache line size aligned. 848 */ 849 ncrcmd filler[4]; 850 851 /* 852 ** during reselection the ncr jumps to this point. 853 ** If a "SIMPLE_TAG" message was received, 854 ** then SFBR is set to the tag. 855 ** else SFBR is set to 0 856 ** If looking for another tag, jump to the next nccb. 857 ** 858 ** JUMP IF (SFBR != #TAG#) 859 ** @(next nccb of this lun) 860 */ 861 862 struct link jump_nccb; 863 864 /* 865 ** After execution of this call, the return address 866 ** (in the TEMP register) points to the following 867 ** data structure block. 868 ** So copy it to the DSA register, and start 869 ** processing of this data structure. 870 ** 871 ** CALL 872 ** <RESEL_TMP> 873 */ 874 875 struct link call_tmp; 876 877 /* 878 ** This is the data structure which is 879 ** to be executed by the script processor. 880 */ 881 882 struct dsb phys; 883 884 /* 885 ** If a data transfer phase is terminated too early 886 ** (after reception of a message (i.e. DISCONNECT)), 887 ** we have to prepare a mini script to transfer 888 ** the rest of the data. 889 */ 890 891 ncrcmd patch[8]; 892 893 /* 894 ** The general SCSI driver provides a 895 ** pointer to a control block. 896 */ 897 898 union ccb *ccb; 899 900 /* 901 ** We prepare a message to be sent after selection, 902 ** and a second one to be sent after getcc selection. 903 ** Contents are IDENTIFY and SIMPLE_TAG. 904 ** While negotiating sync or wide transfer, 905 ** a SDTM or WDTM message is appended. 906 */ 907 908 u_char scsi_smsg [8]; 909 u_char scsi_smsg2[8]; 910 911 /* 912 ** Lock this nccb. 913 ** Flag is used while looking for a free nccb. 914 */ 915 916 u_long magic; 917 918 /* 919 ** Physical address of this instance of nccb 920 */ 921 922 u_long p_nccb; 923 924 /* 925 ** Completion time out for this job. 926 ** It's set to time of start + allowed number of seconds. 927 */ 928 929 time_t tlimit; 930 931 /* 932 ** All nccbs of one hostadapter are chained. 933 */ 934 935 nccb_p link_nccb; 936 937 /* 938 ** All nccbs of one target/lun are chained. 939 */ 940 941 nccb_p next_nccb; 942 943 /* 944 ** Sense command 945 */ 946 947 u_char sensecmd[6]; 948 949 /* 950 ** Tag for this transfer. 951 ** It's patched into jump_nccb. 952 ** If it's not zero, a SIMPLE_TAG 953 ** message is included in smsg. 954 */ 955 956 u_char tag; 957 }; 958 959 #define CCB_PHYS(cp,lbl) (cp->p_nccb + offsetof(struct nccb, lbl)) 960 961 /*========================================================== 962 ** 963 ** Declaration of structs: NCR device descriptor 964 ** 965 **========================================================== 966 */ 967 968 struct ncb { 969 /* 970 ** The global header. 971 ** Accessible to both the host and the 972 ** script-processor. 973 ** We assume it is cache line size aligned. 974 */ 975 struct head header; 976 977 int unit; 978 979 /*----------------------------------------------- 980 ** Scripts .. 981 **----------------------------------------------- 982 ** 983 ** During reselection the ncr jumps to this point. 984 ** The SFBR register is loaded with the encoded target id. 985 ** 986 ** Jump to the first target. 987 ** 988 ** JUMP 989 ** @(next tcb) 990 */ 991 struct link jump_tcb; 992 993 /*----------------------------------------------- 994 ** Configuration .. 995 **----------------------------------------------- 996 ** 997 ** virtual and physical addresses 998 ** of the 53c810 chip. 999 */ 1000 int reg_rid; 1001 struct resource *reg_res; 1002 bus_space_tag_t bst; 1003 bus_space_handle_t bsh; 1004 1005 int sram_rid; 1006 struct resource *sram_res; 1007 bus_space_tag_t bst2; 1008 bus_space_handle_t bsh2; 1009 1010 struct resource *irq_res; 1011 void *irq_handle; 1012 1013 /* 1014 ** Scripts instance virtual address. 1015 */ 1016 struct script *script; 1017 struct scripth *scripth; 1018 1019 /* 1020 ** Scripts instance physical address. 1021 */ 1022 u_long p_script; 1023 u_long p_scripth; 1024 1025 /* 1026 ** The SCSI address of the host adapter. 1027 */ 1028 u_char myaddr; 1029 1030 /* 1031 ** timing parameters 1032 */ 1033 u_char minsync; /* Minimum sync period factor */ 1034 u_char maxsync; /* Maximum sync period factor */ 1035 u_char maxoffs; /* Max scsi offset */ 1036 u_char clock_divn; /* Number of clock divisors */ 1037 u_long clock_khz; /* SCSI clock frequency in KHz */ 1038 u_long features; /* Chip features map */ 1039 u_char multiplier; /* Clock multiplier (1,2,4) */ 1040 1041 u_char maxburst; /* log base 2 of dwords burst */ 1042 1043 /* 1044 ** BIOS supplied PCI bus options 1045 */ 1046 u_char rv_scntl3; 1047 u_char rv_dcntl; 1048 u_char rv_dmode; 1049 u_char rv_ctest3; 1050 u_char rv_ctest4; 1051 u_char rv_ctest5; 1052 u_char rv_gpcntl; 1053 u_char rv_stest2; 1054 1055 /*----------------------------------------------- 1056 ** CAM SIM information for this instance 1057 **----------------------------------------------- 1058 */ 1059 1060 struct cam_sim *sim; 1061 struct cam_path *path; 1062 1063 /*----------------------------------------------- 1064 ** Job control 1065 **----------------------------------------------- 1066 ** 1067 ** Commands from user 1068 */ 1069 struct usrcmd user; 1070 1071 /* 1072 ** Target data 1073 */ 1074 struct tcb target[MAX_TARGET]; 1075 1076 /* 1077 ** Start queue. 1078 */ 1079 u_int32_t squeue [MAX_START]; 1080 u_short squeueput; 1081 1082 /* 1083 ** Timeout handler 1084 */ 1085 time_t heartbeat; 1086 u_short ticks; 1087 u_short latetime; 1088 time_t lasttime; 1089 struct callout timeout_ch; 1090 1091 /*----------------------------------------------- 1092 ** Debug and profiling 1093 **----------------------------------------------- 1094 ** 1095 ** register dump 1096 */ 1097 struct ncr_reg regdump; 1098 time_t regtime; 1099 1100 /* 1101 ** Profiling data 1102 */ 1103 struct profile profile; 1104 u_long disc_phys; 1105 u_long disc_ref; 1106 1107 /* 1108 ** Head of list of all nccbs for this controller. 1109 */ 1110 nccb_p link_nccb; 1111 1112 /* 1113 ** message buffers. 1114 ** Should be longword aligned, 1115 ** because they're written with a 1116 ** COPY script command. 1117 */ 1118 u_char msgout[8]; 1119 u_char msgin [8]; 1120 u_int32_t lastmsg; 1121 1122 /* 1123 ** Buffer for STATUS_IN phase. 1124 */ 1125 u_char scratch; 1126 1127 /* 1128 ** controller chip dependent maximal transfer width. 1129 */ 1130 u_char maxwide; 1131 1132 #ifdef NCR_IOMAPPED 1133 /* 1134 ** address of the ncr control registers in io space 1135 */ 1136 pci_port_t port; 1137 #endif 1138 }; 1139 1140 #define NCB_SCRIPT_PHYS(np,lbl) (np->p_script + offsetof (struct script, lbl)) 1141 #define NCB_SCRIPTH_PHYS(np,lbl) (np->p_scripth + offsetof (struct scripth,lbl)) 1142 1143 /*========================================================== 1144 ** 1145 ** 1146 ** Script for NCR-Processor. 1147 ** 1148 ** Use ncr_script_fill() to create the variable parts. 1149 ** Use ncr_script_copy_and_bind() to make a copy and 1150 ** bind to physical addresses. 1151 ** 1152 ** 1153 **========================================================== 1154 ** 1155 ** We have to know the offsets of all labels before 1156 ** we reach them (for forward jumps). 1157 ** Therefore we declare a struct here. 1158 ** If you make changes inside the script, 1159 ** DONT FORGET TO CHANGE THE LENGTHS HERE! 1160 ** 1161 **---------------------------------------------------------- 1162 */ 1163 1164 /* 1165 ** Script fragments which are loaded into the on-board RAM 1166 ** of 825A, 875 and 895 chips. 1167 */ 1168 struct script { 1169 ncrcmd start [ 7]; 1170 ncrcmd start0 [ 2]; 1171 ncrcmd start1 [ 3]; 1172 ncrcmd startpos [ 1]; 1173 ncrcmd trysel [ 8]; 1174 ncrcmd skip [ 8]; 1175 ncrcmd skip2 [ 3]; 1176 ncrcmd idle [ 2]; 1177 ncrcmd select [ 18]; 1178 ncrcmd prepare [ 4]; 1179 ncrcmd loadpos [ 14]; 1180 ncrcmd prepare2 [ 24]; 1181 ncrcmd setmsg [ 5]; 1182 ncrcmd clrack [ 2]; 1183 ncrcmd dispatch [ 33]; 1184 ncrcmd no_data [ 17]; 1185 ncrcmd checkatn [ 10]; 1186 ncrcmd command [ 15]; 1187 ncrcmd status [ 27]; 1188 ncrcmd msg_in [ 26]; 1189 ncrcmd msg_bad [ 6]; 1190 ncrcmd complete [ 13]; 1191 ncrcmd cleanup [ 12]; 1192 ncrcmd cleanup0 [ 9]; 1193 ncrcmd signal [ 12]; 1194 ncrcmd save_dp [ 5]; 1195 ncrcmd restore_dp [ 5]; 1196 ncrcmd disconnect [ 12]; 1197 ncrcmd disconnect0 [ 5]; 1198 ncrcmd disconnect1 [ 23]; 1199 ncrcmd msg_out [ 9]; 1200 ncrcmd msg_out_done [ 7]; 1201 ncrcmd badgetcc [ 6]; 1202 ncrcmd reselect [ 8]; 1203 ncrcmd reselect1 [ 8]; 1204 ncrcmd reselect2 [ 8]; 1205 ncrcmd resel_tmp [ 5]; 1206 ncrcmd resel_lun [ 18]; 1207 ncrcmd resel_tag [ 24]; 1208 ncrcmd data_in [MAX_SCATTER * 4 + 7]; 1209 ncrcmd data_out [MAX_SCATTER * 4 + 7]; 1210 }; 1211 1212 /* 1213 ** Script fragments which stay in main memory for all chips. 1214 */ 1215 struct scripth { 1216 ncrcmd tryloop [MAX_START*5+2]; 1217 ncrcmd msg_parity [ 6]; 1218 ncrcmd msg_reject [ 8]; 1219 ncrcmd msg_ign_residue [ 32]; 1220 ncrcmd msg_extended [ 18]; 1221 ncrcmd msg_ext_2 [ 18]; 1222 ncrcmd msg_wdtr [ 27]; 1223 ncrcmd msg_ext_3 [ 18]; 1224 ncrcmd msg_sdtr [ 27]; 1225 ncrcmd msg_out_abort [ 10]; 1226 ncrcmd getcc [ 4]; 1227 ncrcmd getcc1 [ 5]; 1228 #ifdef NCR_GETCC_WITHMSG 1229 ncrcmd getcc2 [ 29]; 1230 #else 1231 ncrcmd getcc2 [ 14]; 1232 #endif 1233 ncrcmd getcc3 [ 6]; 1234 ncrcmd aborttag [ 4]; 1235 ncrcmd abort [ 22]; 1236 ncrcmd snooptest [ 9]; 1237 ncrcmd snoopend [ 2]; 1238 }; 1239 1240 /*========================================================== 1241 ** 1242 ** 1243 ** Function headers. 1244 ** 1245 ** 1246 **========================================================== 1247 */ 1248 1249 #ifdef _KERNEL 1250 static nccb_p ncr_alloc_nccb (ncb_p np, u_long target, u_long lun); 1251 static void ncr_complete (ncb_p np, nccb_p cp); 1252 static int ncr_delta (int * from, int * to); 1253 static void ncr_exception (ncb_p np); 1254 static void ncr_free_nccb (ncb_p np, nccb_p cp); 1255 static void ncr_freeze_devq (ncb_p np, struct cam_path *path); 1256 static void ncr_selectclock (ncb_p np, u_char scntl3); 1257 static void ncr_getclock (ncb_p np, u_char multiplier); 1258 static nccb_p ncr_get_nccb (ncb_p np, u_long t,u_long l); 1259 #if 0 1260 static u_int32_t ncr_info (int unit); 1261 #endif 1262 static void ncr_init (ncb_p np, char * msg, u_long code); 1263 static void ncr_intr (void *vnp); 1264 static void ncr_int_ma (ncb_p np, u_char dstat); 1265 static void ncr_int_sir (ncb_p np); 1266 static void ncr_int_sto (ncb_p np); 1267 #if 0 1268 static void ncr_min_phys (struct buf *bp); 1269 #endif 1270 static void ncr_poll (struct cam_sim *sim); 1271 static void ncb_profile (ncb_p np, nccb_p cp); 1272 static void ncr_script_copy_and_bind 1273 (ncb_p np, ncrcmd *src, ncrcmd *dst, int len); 1274 static void ncr_script_fill (struct script * scr, struct scripth *scrh); 1275 static int ncr_scatter (struct dsb* phys, vm_offset_t vaddr, 1276 vm_size_t datalen); 1277 static void ncr_getsync (ncb_p np, u_char sfac, u_char *fakp, 1278 u_char *scntl3p); 1279 static void ncr_setsync (ncb_p np, nccb_p cp,u_char scntl3,u_char sxfer, 1280 u_char period); 1281 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack); 1282 static int ncr_show_msg (u_char * msg); 1283 static int ncr_snooptest (ncb_p np); 1284 static void ncr_action (struct cam_sim *sim, union ccb *ccb); 1285 static void ncr_timeout (void *arg); 1286 static void ncr_wakeup (ncb_p np, u_long code); 1287 1288 static int ncr_probe (device_t dev); 1289 static int ncr_attach (device_t dev); 1290 1291 #endif /* _KERNEL */ 1292 1293 /*========================================================== 1294 ** 1295 ** 1296 ** Global static data. 1297 ** 1298 ** 1299 **========================================================== 1300 */ 1301 1302 1303 /* 1304 * $FreeBSD: src/sys/pci/ncr.c,v 1.155.2.3 2001/03/05 13:09:10 obrien Exp $ 1305 */ 1306 static const u_long ncr_version = NCR_VERSION * 11 1307 + (u_long) sizeof (struct ncb) * 7 1308 + (u_long) sizeof (struct nccb) * 5 1309 + (u_long) sizeof (struct lcb) * 3 1310 + (u_long) sizeof (struct tcb) * 2; 1311 1312 #ifdef _KERNEL 1313 1314 static int ncr_debug = SCSI_NCR_DEBUG; 1315 SYSCTL_INT(_debug, OID_AUTO, ncr_debug, CTLFLAG_RW, &ncr_debug, 0, ""); 1316 1317 static int ncr_cache; /* to be aligned _NOT_ static */ 1318 1319 /*========================================================== 1320 ** 1321 ** 1322 ** Global static data: auto configure 1323 ** 1324 ** 1325 **========================================================== 1326 */ 1327 1328 #define NCR_810_ID (0x00011000ul) 1329 #define NCR_815_ID (0x00041000ul) 1330 #define NCR_820_ID (0x00021000ul) 1331 #define NCR_825_ID (0x00031000ul) 1332 #define NCR_860_ID (0x00061000ul) 1333 #define NCR_875_ID (0x000f1000ul) 1334 #define NCR_875_ID2 (0x008f1000ul) 1335 #define NCR_885_ID (0x000d1000ul) 1336 #define NCR_895_ID (0x000c1000ul) 1337 #define NCR_896_ID (0x000b1000ul) 1338 #define NCR_895A_ID (0x00121000ul) 1339 #define NCR_1510D_ID (0x000a1000ul) 1340 1341 1342 static char *ncr_name (ncb_p np) 1343 { 1344 static char name[10]; 1345 ksnprintf(name, sizeof(name), "ncr%d", np->unit); 1346 return (name); 1347 } 1348 1349 /*========================================================== 1350 ** 1351 ** 1352 ** Scripts for NCR-Processor. 1353 ** 1354 ** Use ncr_script_bind for binding to physical addresses. 1355 ** 1356 ** 1357 **========================================================== 1358 ** 1359 ** NADDR generates a reference to a field of the controller data. 1360 ** PADDR generates a reference to another part of the script. 1361 ** RADDR generates a reference to a script processor register. 1362 ** FADDR generates a reference to a script processor register 1363 ** with offset. 1364 ** 1365 **---------------------------------------------------------- 1366 */ 1367 1368 #define RELOC_SOFTC 0x40000000 1369 #define RELOC_LABEL 0x50000000 1370 #define RELOC_REGISTER 0x60000000 1371 #define RELOC_KVAR 0x70000000 1372 #define RELOC_LABELH 0x80000000 1373 #define RELOC_MASK 0xf0000000 1374 1375 #define NADDR(label) (RELOC_SOFTC | offsetof(struct ncb, label)) 1376 #define PADDR(label) (RELOC_LABEL | offsetof(struct script, label)) 1377 #define PADDRH(label) (RELOC_LABELH | offsetof(struct scripth, label)) 1378 #define RADDR(label) (RELOC_REGISTER | REG(label)) 1379 #define FADDR(label,ofs)(RELOC_REGISTER | ((REG(label))+(ofs))) 1380 #define KVAR(which) (RELOC_KVAR | (which)) 1381 1382 #define KVAR_SECOND (0) 1383 #define KVAR_TICKS (1) 1384 #define KVAR_NCR_CACHE (2) 1385 1386 #define SCRIPT_KVAR_FIRST (0) 1387 #define SCRIPT_KVAR_LAST (3) 1388 1389 /* 1390 * Kernel variables referenced in the scripts. 1391 * THESE MUST ALL BE ALIGNED TO A 4-BYTE BOUNDARY. 1392 */ 1393 static void *script_kvars[] = 1394 { &time_second, &ticks, &ncr_cache }; 1395 1396 static struct script script0 = { 1397 /*--------------------------< START >-----------------------*/ { 1398 /* 1399 ** Claim to be still alive ... 1400 */ 1401 SCR_COPY (sizeof (((struct ncb *)0)->heartbeat)), 1402 KVAR (KVAR_SECOND), 1403 NADDR (heartbeat), 1404 /* 1405 ** Make data structure address invalid. 1406 ** clear SIGP. 1407 */ 1408 SCR_LOAD_REG (dsa, 0xff), 1409 0, 1410 SCR_FROM_REG (ctest2), 1411 0, 1412 }/*-------------------------< START0 >----------------------*/,{ 1413 /* 1414 ** Hook for interrupted GetConditionCode. 1415 ** Will be patched to ... IFTRUE by 1416 ** the interrupt handler. 1417 */ 1418 SCR_INT ^ IFFALSE (0), 1419 SIR_SENSE_RESTART, 1420 1421 }/*-------------------------< START1 >----------------------*/,{ 1422 /* 1423 ** Hook for stalled start queue. 1424 ** Will be patched to IFTRUE by the interrupt handler. 1425 */ 1426 SCR_INT ^ IFFALSE (0), 1427 SIR_STALL_RESTART, 1428 /* 1429 ** Then jump to a certain point in tryloop. 1430 ** Due to the lack of indirect addressing the code 1431 ** is self modifying here. 1432 */ 1433 SCR_JUMP, 1434 }/*-------------------------< STARTPOS >--------------------*/,{ 1435 PADDRH(tryloop), 1436 1437 }/*-------------------------< TRYSEL >----------------------*/,{ 1438 /* 1439 ** Now: 1440 ** DSA: Address of a Data Structure 1441 ** or Address of the IDLE-Label. 1442 ** 1443 ** TEMP: Address of a script, which tries to 1444 ** start the NEXT entry. 1445 ** 1446 ** Save the TEMP register into the SCRATCHA register. 1447 ** Then copy the DSA to TEMP and RETURN. 1448 ** This is kind of an indirect jump. 1449 ** (The script processor has NO stack, so the 1450 ** CALL is actually a jump and link, and the 1451 ** RETURN is an indirect jump.) 1452 ** 1453 ** If the slot was empty, DSA contains the address 1454 ** of the IDLE part of this script. The processor 1455 ** jumps to IDLE and waits for a reselect. 1456 ** It will wake up and try the same slot again 1457 ** after the SIGP bit becomes set by the host. 1458 ** 1459 ** If the slot was not empty, DSA contains 1460 ** the address of the phys-part of a nccb. 1461 ** The processor jumps to this address. 1462 ** phys starts with head, 1463 ** head starts with launch, 1464 ** so actually the processor jumps to 1465 ** the lauch part. 1466 ** If the entry is scheduled for execution, 1467 ** then launch contains a jump to SELECT. 1468 ** If it's not scheduled, it contains a jump to IDLE. 1469 */ 1470 SCR_COPY (4), 1471 RADDR (temp), 1472 RADDR (scratcha), 1473 SCR_COPY (4), 1474 RADDR (dsa), 1475 RADDR (temp), 1476 SCR_RETURN, 1477 0 1478 1479 }/*-------------------------< SKIP >------------------------*/,{ 1480 /* 1481 ** This entry has been canceled. 1482 ** Next time use the next slot. 1483 */ 1484 SCR_COPY (4), 1485 RADDR (scratcha), 1486 PADDR (startpos), 1487 /* 1488 ** patch the launch field. 1489 ** should look like an idle process. 1490 */ 1491 SCR_COPY_F (4), 1492 RADDR (dsa), 1493 PADDR (skip2), 1494 SCR_COPY (8), 1495 PADDR (idle), 1496 }/*-------------------------< SKIP2 >-----------------------*/,{ 1497 0, 1498 SCR_JUMP, 1499 PADDR(start), 1500 }/*-------------------------< IDLE >------------------------*/,{ 1501 /* 1502 ** Nothing to do? 1503 ** Wait for reselect. 1504 */ 1505 SCR_JUMP, 1506 PADDR(reselect), 1507 1508 }/*-------------------------< SELECT >----------------------*/,{ 1509 /* 1510 ** DSA contains the address of a scheduled 1511 ** data structure. 1512 ** 1513 ** SCRATCHA contains the address of the script, 1514 ** which starts the next entry. 1515 ** 1516 ** Set Initiator mode. 1517 ** 1518 ** (Target mode is left as an exercise for the reader) 1519 */ 1520 1521 SCR_CLR (SCR_TRG), 1522 0, 1523 SCR_LOAD_REG (HS_REG, 0xff), 1524 0, 1525 1526 /* 1527 ** And try to select this target. 1528 */ 1529 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 1530 PADDR (reselect), 1531 1532 /* 1533 ** Now there are 4 possibilities: 1534 ** 1535 ** (1) The ncr looses arbitration. 1536 ** This is ok, because it will try again, 1537 ** when the bus becomes idle. 1538 ** (But beware of the timeout function!) 1539 ** 1540 ** (2) The ncr is reselected. 1541 ** Then the script processor takes the jump 1542 ** to the RESELECT label. 1543 ** 1544 ** (3) The ncr completes the selection. 1545 ** Then it will execute the next statement. 1546 ** 1547 ** (4) There is a selection timeout. 1548 ** Then the ncr should interrupt the host and stop. 1549 ** Unfortunately, it seems to continue execution 1550 ** of the script. But it will fail with an 1551 ** IID-interrupt on the next WHEN. 1552 */ 1553 1554 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 1555 0, 1556 1557 /* 1558 ** Send the IDENTIFY and SIMPLE_TAG messages 1559 ** (and the MSG_EXT_SDTR message) 1560 */ 1561 SCR_MOVE_TBL ^ SCR_MSG_OUT, 1562 offsetof (struct dsb, smsg), 1563 #ifdef undef /* XXX better fail than try to deal with this ... */ 1564 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_OUT)), 1565 -16, 1566 #endif 1567 SCR_CLR (SCR_ATN), 1568 0, 1569 SCR_COPY (1), 1570 RADDR (sfbr), 1571 NADDR (lastmsg), 1572 /* 1573 ** Selection complete. 1574 ** Next time use the next slot. 1575 */ 1576 SCR_COPY (4), 1577 RADDR (scratcha), 1578 PADDR (startpos), 1579 }/*-------------------------< PREPARE >----------------------*/,{ 1580 /* 1581 ** The ncr doesn't have an indirect load 1582 ** or store command. So we have to 1583 ** copy part of the control block to a 1584 ** fixed place, where we can access it. 1585 ** 1586 ** We patch the address part of a 1587 ** COPY command with the DSA-register. 1588 */ 1589 SCR_COPY_F (4), 1590 RADDR (dsa), 1591 PADDR (loadpos), 1592 /* 1593 ** then we do the actual copy. 1594 */ 1595 SCR_COPY (sizeof (struct head)), 1596 /* 1597 ** continued after the next label ... 1598 */ 1599 1600 }/*-------------------------< LOADPOS >---------------------*/,{ 1601 0, 1602 NADDR (header), 1603 /* 1604 ** Mark this nccb as not scheduled. 1605 */ 1606 SCR_COPY (8), 1607 PADDR (idle), 1608 NADDR (header.launch), 1609 /* 1610 ** Set a time stamp for this selection 1611 */ 1612 SCR_COPY (sizeof (ticks)), 1613 KVAR (KVAR_TICKS), 1614 NADDR (header.stamp.select), 1615 /* 1616 ** load the savep (saved pointer) into 1617 ** the TEMP register (actual pointer) 1618 */ 1619 SCR_COPY (4), 1620 NADDR (header.savep), 1621 RADDR (temp), 1622 /* 1623 ** Initialize the status registers 1624 */ 1625 SCR_COPY (4), 1626 NADDR (header.status), 1627 RADDR (scr0), 1628 1629 }/*-------------------------< PREPARE2 >---------------------*/,{ 1630 /* 1631 ** Load the synchronous mode register 1632 */ 1633 SCR_COPY (1), 1634 NADDR (sync_st), 1635 RADDR (sxfer), 1636 /* 1637 ** Load the wide mode and timing register 1638 */ 1639 SCR_COPY (1), 1640 NADDR (wide_st), 1641 RADDR (scntl3), 1642 /* 1643 ** Initialize the msgout buffer with a NOOP message. 1644 */ 1645 SCR_LOAD_REG (scratcha, MSG_NOOP), 1646 0, 1647 SCR_COPY (1), 1648 RADDR (scratcha), 1649 NADDR (msgout), 1650 SCR_COPY (1), 1651 RADDR (scratcha), 1652 NADDR (msgin), 1653 /* 1654 ** Message in phase ? 1655 */ 1656 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 1657 PADDR (dispatch), 1658 /* 1659 ** Extended or reject message ? 1660 */ 1661 SCR_FROM_REG (sbdl), 1662 0, 1663 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)), 1664 PADDR (msg_in), 1665 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)), 1666 PADDRH (msg_reject), 1667 /* 1668 ** normal processing 1669 */ 1670 SCR_JUMP, 1671 PADDR (dispatch), 1672 }/*-------------------------< SETMSG >----------------------*/,{ 1673 SCR_COPY (1), 1674 RADDR (scratcha), 1675 NADDR (msgout), 1676 SCR_SET (SCR_ATN), 1677 0, 1678 }/*-------------------------< CLRACK >----------------------*/,{ 1679 /* 1680 ** Terminate possible pending message phase. 1681 */ 1682 SCR_CLR (SCR_ACK), 1683 0, 1684 1685 }/*-----------------------< DISPATCH >----------------------*/,{ 1686 SCR_FROM_REG (HS_REG), 1687 0, 1688 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 1689 SIR_NEGO_FAILED, 1690 /* 1691 ** remove bogus output signals 1692 */ 1693 SCR_REG_REG (socl, SCR_AND, CACK|CATN), 1694 0, 1695 SCR_RETURN ^ IFTRUE (WHEN (SCR_DATA_OUT)), 1696 0, 1697 SCR_RETURN ^ IFTRUE (IF (SCR_DATA_IN)), 1698 0, 1699 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_OUT)), 1700 PADDR (msg_out), 1701 SCR_JUMP ^ IFTRUE (IF (SCR_MSG_IN)), 1702 PADDR (msg_in), 1703 SCR_JUMP ^ IFTRUE (IF (SCR_COMMAND)), 1704 PADDR (command), 1705 SCR_JUMP ^ IFTRUE (IF (SCR_STATUS)), 1706 PADDR (status), 1707 /* 1708 ** Discard one illegal phase byte, if required. 1709 */ 1710 SCR_LOAD_REG (scratcha, XE_BAD_PHASE), 1711 0, 1712 SCR_COPY (1), 1713 RADDR (scratcha), 1714 NADDR (xerr_st), 1715 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_OUT)), 1716 8, 1717 SCR_MOVE_ABS (1) ^ SCR_ILG_OUT, 1718 NADDR (scratch), 1719 SCR_JUMPR ^ IFFALSE (IF (SCR_ILG_IN)), 1720 8, 1721 SCR_MOVE_ABS (1) ^ SCR_ILG_IN, 1722 NADDR (scratch), 1723 SCR_JUMP, 1724 PADDR (dispatch), 1725 1726 }/*-------------------------< NO_DATA >--------------------*/,{ 1727 /* 1728 ** The target wants to tranfer too much data 1729 ** or in the wrong direction. 1730 ** Remember that in extended error. 1731 */ 1732 SCR_LOAD_REG (scratcha, XE_EXTRA_DATA), 1733 0, 1734 SCR_COPY (1), 1735 RADDR (scratcha), 1736 NADDR (xerr_st), 1737 /* 1738 ** Discard one data byte, if required. 1739 */ 1740 SCR_JUMPR ^ IFFALSE (WHEN (SCR_DATA_OUT)), 1741 8, 1742 SCR_MOVE_ABS (1) ^ SCR_DATA_OUT, 1743 NADDR (scratch), 1744 SCR_JUMPR ^ IFFALSE (IF (SCR_DATA_IN)), 1745 8, 1746 SCR_MOVE_ABS (1) ^ SCR_DATA_IN, 1747 NADDR (scratch), 1748 /* 1749 ** .. and repeat as required. 1750 */ 1751 SCR_CALL, 1752 PADDR (dispatch), 1753 SCR_JUMP, 1754 PADDR (no_data), 1755 }/*-------------------------< CHECKATN >--------------------*/,{ 1756 /* 1757 ** If AAP (bit 1 of scntl0 register) is set 1758 ** and a parity error is detected, 1759 ** the script processor asserts ATN. 1760 ** 1761 ** The target should switch to a MSG_OUT phase 1762 ** to get the message. 1763 */ 1764 SCR_FROM_REG (socl), 1765 0, 1766 SCR_JUMP ^ IFFALSE (MASK (CATN, CATN)), 1767 PADDR (dispatch), 1768 /* 1769 ** count it 1770 */ 1771 SCR_REG_REG (PS_REG, SCR_ADD, 1), 1772 0, 1773 /* 1774 ** Prepare a MSG_INITIATOR_DET_ERR message 1775 ** (initiator detected error). 1776 ** The target should retry the transfer. 1777 */ 1778 SCR_LOAD_REG (scratcha, MSG_INITIATOR_DET_ERR), 1779 0, 1780 SCR_JUMP, 1781 PADDR (setmsg), 1782 1783 }/*-------------------------< COMMAND >--------------------*/,{ 1784 /* 1785 ** If this is not a GETCC transfer ... 1786 */ 1787 SCR_FROM_REG (SS_REG), 1788 0, 1789 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1790 28, 1791 /* 1792 ** ... set a timestamp ... 1793 */ 1794 SCR_COPY (sizeof (ticks)), 1795 KVAR (KVAR_TICKS), 1796 NADDR (header.stamp.command), 1797 /* 1798 ** ... and send the command 1799 */ 1800 SCR_MOVE_TBL ^ SCR_COMMAND, 1801 offsetof (struct dsb, cmd), 1802 SCR_JUMP, 1803 PADDR (dispatch), 1804 /* 1805 ** Send the GETCC command 1806 */ 1807 /*>>>*/ SCR_MOVE_TBL ^ SCR_COMMAND, 1808 offsetof (struct dsb, scmd), 1809 SCR_JUMP, 1810 PADDR (dispatch), 1811 1812 }/*-------------------------< STATUS >--------------------*/,{ 1813 /* 1814 ** set the timestamp. 1815 */ 1816 SCR_COPY (sizeof (ticks)), 1817 KVAR (KVAR_TICKS), 1818 NADDR (header.stamp.status), 1819 /* 1820 ** If this is a GETCC transfer, 1821 */ 1822 SCR_FROM_REG (SS_REG), 1823 0, 1824 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (SCSI_STATUS_CHECK_COND)), 1825 40, 1826 /* 1827 ** get the status 1828 */ 1829 SCR_MOVE_ABS (1) ^ SCR_STATUS, 1830 NADDR (scratch), 1831 /* 1832 ** Save status to scsi_status. 1833 ** Mark as complete. 1834 ** And wait for disconnect. 1835 */ 1836 SCR_TO_REG (SS_REG), 1837 0, 1838 SCR_REG_REG (SS_REG, SCR_OR, SCSI_STATUS_SENSE), 1839 0, 1840 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1841 0, 1842 SCR_JUMP, 1843 PADDR (checkatn), 1844 /* 1845 ** If it was no GETCC transfer, 1846 ** save the status to scsi_status. 1847 */ 1848 /*>>>*/ SCR_MOVE_ABS (1) ^ SCR_STATUS, 1849 NADDR (scratch), 1850 SCR_TO_REG (SS_REG), 1851 0, 1852 /* 1853 ** if it was no check condition ... 1854 */ 1855 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1856 PADDR (checkatn), 1857 /* 1858 ** ... mark as complete. 1859 */ 1860 SCR_LOAD_REG (HS_REG, HS_COMPLETE), 1861 0, 1862 SCR_JUMP, 1863 PADDR (checkatn), 1864 1865 }/*-------------------------< MSG_IN >--------------------*/,{ 1866 /* 1867 ** Get the first byte of the message 1868 ** and save it to SCRATCHA. 1869 ** 1870 ** The script processor doesn't negate the 1871 ** ACK signal after this transfer. 1872 */ 1873 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 1874 NADDR (msgin[0]), 1875 /* 1876 ** Check for message parity error. 1877 */ 1878 SCR_TO_REG (scratcha), 1879 0, 1880 SCR_FROM_REG (socl), 1881 0, 1882 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 1883 PADDRH (msg_parity), 1884 SCR_FROM_REG (scratcha), 1885 0, 1886 /* 1887 ** Parity was ok, handle this message. 1888 */ 1889 SCR_JUMP ^ IFTRUE (DATA (MSG_CMDCOMPLETE)), 1890 PADDR (complete), 1891 SCR_JUMP ^ IFTRUE (DATA (MSG_SAVEDATAPOINTER)), 1892 PADDR (save_dp), 1893 SCR_JUMP ^ IFTRUE (DATA (MSG_RESTOREPOINTERS)), 1894 PADDR (restore_dp), 1895 SCR_JUMP ^ IFTRUE (DATA (MSG_DISCONNECT)), 1896 PADDR (disconnect), 1897 SCR_JUMP ^ IFTRUE (DATA (MSG_EXTENDED)), 1898 PADDRH (msg_extended), 1899 SCR_JUMP ^ IFTRUE (DATA (MSG_NOOP)), 1900 PADDR (clrack), 1901 SCR_JUMP ^ IFTRUE (DATA (MSG_MESSAGE_REJECT)), 1902 PADDRH (msg_reject), 1903 SCR_JUMP ^ IFTRUE (DATA (MSG_IGN_WIDE_RESIDUE)), 1904 PADDRH (msg_ign_residue), 1905 /* 1906 ** Rest of the messages left as 1907 ** an exercise ... 1908 ** 1909 ** Unimplemented messages: 1910 ** fall through to MSG_BAD. 1911 */ 1912 }/*-------------------------< MSG_BAD >------------------*/,{ 1913 /* 1914 ** unimplemented message - reject it. 1915 */ 1916 SCR_INT, 1917 SIR_REJECT_SENT, 1918 SCR_LOAD_REG (scratcha, MSG_MESSAGE_REJECT), 1919 0, 1920 SCR_JUMP, 1921 PADDR (setmsg), 1922 1923 }/*-------------------------< COMPLETE >-----------------*/,{ 1924 /* 1925 ** Complete message. 1926 ** 1927 ** If it's not the get condition code, 1928 ** copy TEMP register to LASTP in header. 1929 */ 1930 SCR_FROM_REG (SS_REG), 1931 0, 1932 /*<<<*/ SCR_JUMPR ^ IFTRUE (MASK (SCSI_STATUS_SENSE, SCSI_STATUS_SENSE)), 1933 12, 1934 SCR_COPY (4), 1935 RADDR (temp), 1936 NADDR (header.lastp), 1937 /*>>>*/ /* 1938 ** When we terminate the cycle by clearing ACK, 1939 ** the target may disconnect immediately. 1940 ** 1941 ** We don't want to be told of an 1942 ** "unexpected disconnect", 1943 ** so we disable this feature. 1944 */ 1945 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 1946 0, 1947 /* 1948 ** Terminate cycle ... 1949 */ 1950 SCR_CLR (SCR_ACK|SCR_ATN), 1951 0, 1952 /* 1953 ** ... and wait for the disconnect. 1954 */ 1955 SCR_WAIT_DISC, 1956 0, 1957 }/*-------------------------< CLEANUP >-------------------*/,{ 1958 /* 1959 ** dsa: Pointer to nccb 1960 ** or xxxxxxFF (no nccb) 1961 ** 1962 ** HS_REG: Host-Status (<>0!) 1963 */ 1964 SCR_FROM_REG (dsa), 1965 0, 1966 SCR_JUMP ^ IFTRUE (DATA (0xff)), 1967 PADDR (signal), 1968 /* 1969 ** dsa is valid. 1970 ** save the status registers 1971 */ 1972 SCR_COPY (4), 1973 RADDR (scr0), 1974 NADDR (header.status), 1975 /* 1976 ** and copy back the header to the nccb. 1977 */ 1978 SCR_COPY_F (4), 1979 RADDR (dsa), 1980 PADDR (cleanup0), 1981 SCR_COPY (sizeof (struct head)), 1982 NADDR (header), 1983 }/*-------------------------< CLEANUP0 >--------------------*/,{ 1984 0, 1985 1986 /* 1987 ** If command resulted in "check condition" 1988 ** status and is not yet completed, 1989 ** try to get the condition code. 1990 */ 1991 SCR_FROM_REG (HS_REG), 1992 0, 1993 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (0, HS_DONEMASK)), 1994 16, 1995 SCR_FROM_REG (SS_REG), 1996 0, 1997 SCR_JUMP ^ IFTRUE (DATA (SCSI_STATUS_CHECK_COND)), 1998 PADDRH(getcc2), 1999 }/*-------------------------< SIGNAL >----------------------*/,{ 2000 /* 2001 ** if status = queue full, 2002 ** reinsert in startqueue and stall queue. 2003 */ 2004 /*>>>*/ SCR_FROM_REG (SS_REG), 2005 0, 2006 SCR_INT ^ IFTRUE (DATA (SCSI_STATUS_QUEUE_FULL)), 2007 SIR_STALL_QUEUE, 2008 /* 2009 ** And make the DSA register invalid. 2010 */ 2011 SCR_LOAD_REG (dsa, 0xff), /* invalid */ 2012 0, 2013 /* 2014 ** if job completed ... 2015 */ 2016 SCR_FROM_REG (HS_REG), 2017 0, 2018 /* 2019 ** ... signal completion to the host 2020 */ 2021 SCR_INT_FLY ^ IFFALSE (MASK (0, HS_DONEMASK)), 2022 0, 2023 /* 2024 ** Auf zu neuen Schandtaten! 2025 */ 2026 SCR_JUMP, 2027 PADDR(start), 2028 2029 }/*-------------------------< SAVE_DP >------------------*/,{ 2030 /* 2031 ** SAVE_DP message: 2032 ** Copy TEMP register to SAVEP in header. 2033 */ 2034 SCR_COPY (4), 2035 RADDR (temp), 2036 NADDR (header.savep), 2037 SCR_JUMP, 2038 PADDR (clrack), 2039 }/*-------------------------< RESTORE_DP >---------------*/,{ 2040 /* 2041 ** RESTORE_DP message: 2042 ** Copy SAVEP in header to TEMP register. 2043 */ 2044 SCR_COPY (4), 2045 NADDR (header.savep), 2046 RADDR (temp), 2047 SCR_JUMP, 2048 PADDR (clrack), 2049 2050 }/*-------------------------< DISCONNECT >---------------*/,{ 2051 /* 2052 ** If QUIRK_AUTOSAVE is set, 2053 ** do an "save pointer" operation. 2054 */ 2055 SCR_FROM_REG (QU_REG), 2056 0, 2057 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (QUIRK_AUTOSAVE, QUIRK_AUTOSAVE)), 2058 12, 2059 /* 2060 ** like SAVE_DP message: 2061 ** Copy TEMP register to SAVEP in header. 2062 */ 2063 SCR_COPY (4), 2064 RADDR (temp), 2065 NADDR (header.savep), 2066 /*>>>*/ /* 2067 ** Check if temp==savep or temp==goalp: 2068 ** if not, log a missing save pointer message. 2069 ** In fact, it's a comparison mod 256. 2070 ** 2071 ** Hmmm, I hadn't thought that I would be urged to 2072 ** write this kind of ugly self modifying code. 2073 ** 2074 ** It's unbelievable, but the ncr53c8xx isn't able 2075 ** to subtract one register from another. 2076 */ 2077 SCR_FROM_REG (temp), 2078 0, 2079 /* 2080 ** You are not expected to understand this .. 2081 ** 2082 ** CAUTION: only little endian architectures supported! XXX 2083 */ 2084 SCR_COPY_F (1), 2085 NADDR (header.savep), 2086 PADDR (disconnect0), 2087 }/*-------------------------< DISCONNECT0 >--------------*/,{ 2088 /*<<<*/ SCR_JUMPR ^ IFTRUE (DATA (1)), 2089 20, 2090 /* 2091 ** neither this 2092 */ 2093 SCR_COPY_F (1), 2094 NADDR (header.goalp), 2095 PADDR (disconnect1), 2096 }/*-------------------------< DISCONNECT1 >--------------*/,{ 2097 SCR_INT ^ IFFALSE (DATA (1)), 2098 SIR_MISSING_SAVE, 2099 /*>>>*/ 2100 2101 /* 2102 ** DISCONNECTing ... 2103 ** 2104 ** disable the "unexpected disconnect" feature, 2105 ** and remove the ACK signal. 2106 */ 2107 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2108 0, 2109 SCR_CLR (SCR_ACK|SCR_ATN), 2110 0, 2111 /* 2112 ** Wait for the disconnect. 2113 */ 2114 SCR_WAIT_DISC, 2115 0, 2116 /* 2117 ** Profiling: 2118 ** Set a time stamp, 2119 ** and count the disconnects. 2120 */ 2121 SCR_COPY (sizeof (ticks)), 2122 KVAR (KVAR_TICKS), 2123 NADDR (header.stamp.disconnect), 2124 SCR_COPY (4), 2125 NADDR (disc_phys), 2126 RADDR (temp), 2127 SCR_REG_REG (temp, SCR_ADD, 0x01), 2128 0, 2129 SCR_COPY (4), 2130 RADDR (temp), 2131 NADDR (disc_phys), 2132 /* 2133 ** Status is: DISCONNECTED. 2134 */ 2135 SCR_LOAD_REG (HS_REG, HS_DISCONNECT), 2136 0, 2137 SCR_JUMP, 2138 PADDR (cleanup), 2139 2140 }/*-------------------------< MSG_OUT >-------------------*/,{ 2141 /* 2142 ** The target requests a message. 2143 */ 2144 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2145 NADDR (msgout), 2146 SCR_COPY (1), 2147 RADDR (sfbr), 2148 NADDR (lastmsg), 2149 /* 2150 ** If it was no ABORT message ... 2151 */ 2152 SCR_JUMP ^ IFTRUE (DATA (MSG_ABORT)), 2153 PADDRH (msg_out_abort), 2154 /* 2155 ** ... wait for the next phase 2156 ** if it's a message out, send it again, ... 2157 */ 2158 SCR_JUMP ^ IFTRUE (WHEN (SCR_MSG_OUT)), 2159 PADDR (msg_out), 2160 }/*-------------------------< MSG_OUT_DONE >--------------*/,{ 2161 /* 2162 ** ... else clear the message ... 2163 */ 2164 SCR_LOAD_REG (scratcha, MSG_NOOP), 2165 0, 2166 SCR_COPY (4), 2167 RADDR (scratcha), 2168 NADDR (msgout), 2169 /* 2170 ** ... and process the next phase 2171 */ 2172 SCR_JUMP, 2173 PADDR (dispatch), 2174 2175 }/*------------------------< BADGETCC >---------------------*/,{ 2176 /* 2177 ** If SIGP was set, clear it and try again. 2178 */ 2179 SCR_FROM_REG (ctest2), 2180 0, 2181 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2182 PADDRH (getcc2), 2183 SCR_INT, 2184 SIR_SENSE_FAILED, 2185 }/*-------------------------< RESELECT >--------------------*/,{ 2186 /* 2187 ** This NOP will be patched with LED OFF 2188 ** SCR_REG_REG (gpreg, SCR_OR, 0x01) 2189 */ 2190 SCR_NO_OP, 2191 0, 2192 2193 /* 2194 ** make the DSA invalid. 2195 */ 2196 SCR_LOAD_REG (dsa, 0xff), 2197 0, 2198 SCR_CLR (SCR_TRG), 2199 0, 2200 /* 2201 ** Sleep waiting for a reselection. 2202 ** If SIGP is set, special treatment. 2203 ** 2204 ** Zu allem bereit .. 2205 */ 2206 SCR_WAIT_RESEL, 2207 PADDR(reselect2), 2208 }/*-------------------------< RESELECT1 >--------------------*/,{ 2209 /* 2210 ** This NOP will be patched with LED ON 2211 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2212 */ 2213 SCR_NO_OP, 2214 0, 2215 /* 2216 ** ... zu nichts zu gebrauchen ? 2217 ** 2218 ** load the target id into the SFBR 2219 ** and jump to the control block. 2220 ** 2221 ** Look at the declarations of 2222 ** - struct ncb 2223 ** - struct tcb 2224 ** - struct lcb 2225 ** - struct nccb 2226 ** to understand what's going on. 2227 */ 2228 SCR_REG_SFBR (ssid, SCR_AND, 0x8F), 2229 0, 2230 SCR_TO_REG (sdid), 2231 0, 2232 SCR_JUMP, 2233 NADDR (jump_tcb), 2234 }/*-------------------------< RESELECT2 >-------------------*/,{ 2235 /* 2236 ** This NOP will be patched with LED ON 2237 ** SCR_REG_REG (gpreg, SCR_AND, 0xfe) 2238 */ 2239 SCR_NO_OP, 2240 0, 2241 /* 2242 ** If it's not connected :( 2243 ** -> interrupted by SIGP bit. 2244 ** Jump to start. 2245 */ 2246 SCR_FROM_REG (ctest2), 2247 0, 2248 SCR_JUMP ^ IFTRUE (MASK (CSIGP,CSIGP)), 2249 PADDR (start), 2250 SCR_JUMP, 2251 PADDR (reselect), 2252 2253 }/*-------------------------< RESEL_TMP >-------------------*/,{ 2254 /* 2255 ** The return address in TEMP 2256 ** is in fact the data structure address, 2257 ** so copy it to the DSA register. 2258 */ 2259 SCR_COPY (4), 2260 RADDR (temp), 2261 RADDR (dsa), 2262 SCR_JUMP, 2263 PADDR (prepare), 2264 2265 }/*-------------------------< RESEL_LUN >-------------------*/,{ 2266 /* 2267 ** come back to this point 2268 ** to get an IDENTIFY message 2269 ** Wait for a msg_in phase. 2270 */ 2271 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2272 48, 2273 /* 2274 ** message phase 2275 ** It's not a sony, it's a trick: 2276 ** read the data without acknowledging it. 2277 */ 2278 SCR_FROM_REG (sbdl), 2279 0, 2280 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (MSG_IDENTIFYFLAG, 0x98)), 2281 32, 2282 /* 2283 ** It WAS an Identify message. 2284 ** get it and ack it! 2285 */ 2286 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2287 NADDR (msgin), 2288 SCR_CLR (SCR_ACK), 2289 0, 2290 /* 2291 ** Mask out the lun. 2292 */ 2293 SCR_REG_REG (sfbr, SCR_AND, 0x07), 2294 0, 2295 SCR_RETURN, 2296 0, 2297 /* 2298 ** No message phase or no IDENTIFY message: 2299 ** return 0. 2300 */ 2301 /*>>>*/ SCR_LOAD_SFBR (0), 2302 0, 2303 SCR_RETURN, 2304 0, 2305 2306 }/*-------------------------< RESEL_TAG >-------------------*/,{ 2307 /* 2308 ** come back to this point 2309 ** to get a SIMPLE_TAG message 2310 ** Wait for a MSG_IN phase. 2311 */ 2312 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2313 64, 2314 /* 2315 ** message phase 2316 ** It's a trick - read the data 2317 ** without acknowledging it. 2318 */ 2319 SCR_FROM_REG (sbdl), 2320 0, 2321 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (MSG_SIMPLE_Q_TAG)), 2322 48, 2323 /* 2324 ** It WAS a SIMPLE_TAG message. 2325 ** get it and ack it! 2326 */ 2327 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2328 NADDR (msgin), 2329 SCR_CLR (SCR_ACK), 2330 0, 2331 /* 2332 ** Wait for the second byte (the tag) 2333 */ 2334 /*<<<*/ SCR_JUMPR ^ IFFALSE (WHEN (SCR_MSG_IN)), 2335 24, 2336 /* 2337 ** Get it and ack it! 2338 */ 2339 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2340 NADDR (msgin), 2341 SCR_CLR (SCR_ACK|SCR_CARRY), 2342 0, 2343 SCR_RETURN, 2344 0, 2345 /* 2346 ** No message phase or no SIMPLE_TAG message 2347 ** or no second byte: return 0. 2348 */ 2349 /*>>>*/ SCR_LOAD_SFBR (0), 2350 0, 2351 SCR_SET (SCR_CARRY), 2352 0, 2353 SCR_RETURN, 2354 0, 2355 2356 }/*-------------------------< DATA_IN >--------------------*/,{ 2357 /* 2358 ** Because the size depends on the 2359 ** #define MAX_SCATTER parameter, 2360 ** it is filled in at runtime. 2361 ** 2362 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)), 2363 ** PADDR (no_data), 2364 ** SCR_COPY (sizeof (ticks)), 2365 ** KVAR (KVAR_TICKS), 2366 ** NADDR (header.stamp.data), 2367 ** SCR_MOVE_TBL ^ SCR_DATA_IN, 2368 ** offsetof (struct dsb, data[ 0]), 2369 ** 2370 ** ##===========< i=1; i<MAX_SCATTER >========= 2371 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)), 2372 ** || PADDR (checkatn), 2373 ** || SCR_MOVE_TBL ^ SCR_DATA_IN, 2374 ** || offsetof (struct dsb, data[ i]), 2375 ** ##========================================== 2376 ** 2377 ** SCR_CALL, 2378 ** PADDR (checkatn), 2379 ** SCR_JUMP, 2380 ** PADDR (no_data), 2381 */ 2382 0 2383 }/*-------------------------< DATA_OUT >-------------------*/,{ 2384 /* 2385 ** Because the size depends on the 2386 ** #define MAX_SCATTER parameter, 2387 ** it is filled in at runtime. 2388 ** 2389 ** SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2390 ** PADDR (no_data), 2391 ** SCR_COPY (sizeof (ticks)), 2392 ** KVAR (KVAR_TICKS), 2393 ** NADDR (header.stamp.data), 2394 ** SCR_MOVE_TBL ^ SCR_DATA_OUT, 2395 ** offsetof (struct dsb, data[ 0]), 2396 ** 2397 ** ##===========< i=1; i<MAX_SCATTER >========= 2398 ** || SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)), 2399 ** || PADDR (dispatch), 2400 ** || SCR_MOVE_TBL ^ SCR_DATA_OUT, 2401 ** || offsetof (struct dsb, data[ i]), 2402 ** ##========================================== 2403 ** 2404 ** SCR_CALL, 2405 ** PADDR (dispatch), 2406 ** SCR_JUMP, 2407 ** PADDR (no_data), 2408 ** 2409 **--------------------------------------------------------- 2410 */ 2411 (u_long)0 2412 2413 }/*--------------------------------------------------------*/ 2414 }; 2415 2416 2417 static struct scripth scripth0 = { 2418 /*-------------------------< TRYLOOP >---------------------*/{ 2419 /* 2420 ** Load an entry of the start queue into dsa 2421 ** and try to start it by jumping to TRYSEL. 2422 ** 2423 ** Because the size depends on the 2424 ** #define MAX_START parameter, it is filled 2425 ** in at runtime. 2426 ** 2427 **----------------------------------------------------------- 2428 ** 2429 ** ##===========< I=0; i<MAX_START >=========== 2430 ** || SCR_COPY (4), 2431 ** || NADDR (squeue[i]), 2432 ** || RADDR (dsa), 2433 ** || SCR_CALL, 2434 ** || PADDR (trysel), 2435 ** ##========================================== 2436 ** 2437 ** SCR_JUMP, 2438 ** PADDRH(tryloop), 2439 ** 2440 **----------------------------------------------------------- 2441 */ 2442 0 2443 }/*-------------------------< MSG_PARITY >---------------*/,{ 2444 /* 2445 ** count it 2446 */ 2447 SCR_REG_REG (PS_REG, SCR_ADD, 0x01), 2448 0, 2449 /* 2450 ** send a "message parity error" message. 2451 */ 2452 SCR_LOAD_REG (scratcha, MSG_PARITY_ERROR), 2453 0, 2454 SCR_JUMP, 2455 PADDR (setmsg), 2456 }/*-------------------------< MSG_MESSAGE_REJECT >---------------*/,{ 2457 /* 2458 ** If a negotiation was in progress, 2459 ** negotiation failed. 2460 */ 2461 SCR_FROM_REG (HS_REG), 2462 0, 2463 SCR_INT ^ IFTRUE (DATA (HS_NEGOTIATE)), 2464 SIR_NEGO_FAILED, 2465 /* 2466 ** else make host log this message 2467 */ 2468 SCR_INT ^ IFFALSE (DATA (HS_NEGOTIATE)), 2469 SIR_REJECT_RECEIVED, 2470 SCR_JUMP, 2471 PADDR (clrack), 2472 2473 }/*-------------------------< MSG_IGN_RESIDUE >----------*/,{ 2474 /* 2475 ** Terminate cycle 2476 */ 2477 SCR_CLR (SCR_ACK), 2478 0, 2479 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2480 PADDR (dispatch), 2481 /* 2482 ** get residue size. 2483 */ 2484 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2485 NADDR (msgin[1]), 2486 /* 2487 ** Check for message parity error. 2488 */ 2489 SCR_TO_REG (scratcha), 2490 0, 2491 SCR_FROM_REG (socl), 2492 0, 2493 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2494 PADDRH (msg_parity), 2495 SCR_FROM_REG (scratcha), 2496 0, 2497 /* 2498 ** Size is 0 .. ignore message. 2499 */ 2500 SCR_JUMP ^ IFTRUE (DATA (0)), 2501 PADDR (clrack), 2502 /* 2503 ** Size is not 1 .. have to interrupt. 2504 */ 2505 /*<<<*/ SCR_JUMPR ^ IFFALSE (DATA (1)), 2506 40, 2507 /* 2508 ** Check for residue byte in swide register 2509 */ 2510 SCR_FROM_REG (scntl2), 2511 0, 2512 /*<<<*/ SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)), 2513 16, 2514 /* 2515 ** There IS data in the swide register. 2516 ** Discard it. 2517 */ 2518 SCR_REG_REG (scntl2, SCR_OR, WSR), 2519 0, 2520 SCR_JUMP, 2521 PADDR (clrack), 2522 /* 2523 ** Load again the size to the sfbr register. 2524 */ 2525 /*>>>*/ SCR_FROM_REG (scratcha), 2526 0, 2527 /*>>>*/ SCR_INT, 2528 SIR_IGN_RESIDUE, 2529 SCR_JUMP, 2530 PADDR (clrack), 2531 2532 }/*-------------------------< MSG_EXTENDED >-------------*/,{ 2533 /* 2534 ** Terminate cycle 2535 */ 2536 SCR_CLR (SCR_ACK), 2537 0, 2538 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2539 PADDR (dispatch), 2540 /* 2541 ** get length. 2542 */ 2543 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2544 NADDR (msgin[1]), 2545 /* 2546 ** Check for message parity error. 2547 */ 2548 SCR_TO_REG (scratcha), 2549 0, 2550 SCR_FROM_REG (socl), 2551 0, 2552 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2553 PADDRH (msg_parity), 2554 SCR_FROM_REG (scratcha), 2555 0, 2556 /* 2557 */ 2558 SCR_JUMP ^ IFTRUE (DATA (3)), 2559 PADDRH (msg_ext_3), 2560 SCR_JUMP ^ IFFALSE (DATA (2)), 2561 PADDR (msg_bad), 2562 }/*-------------------------< MSG_EXT_2 >----------------*/,{ 2563 SCR_CLR (SCR_ACK), 2564 0, 2565 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2566 PADDR (dispatch), 2567 /* 2568 ** get extended message code. 2569 */ 2570 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2571 NADDR (msgin[2]), 2572 /* 2573 ** Check for message parity error. 2574 */ 2575 SCR_TO_REG (scratcha), 2576 0, 2577 SCR_FROM_REG (socl), 2578 0, 2579 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2580 PADDRH (msg_parity), 2581 SCR_FROM_REG (scratcha), 2582 0, 2583 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_WDTR)), 2584 PADDRH (msg_wdtr), 2585 /* 2586 ** unknown extended message 2587 */ 2588 SCR_JUMP, 2589 PADDR (msg_bad) 2590 }/*-------------------------< MSG_WDTR >-----------------*/,{ 2591 SCR_CLR (SCR_ACK), 2592 0, 2593 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2594 PADDR (dispatch), 2595 /* 2596 ** get data bus width 2597 */ 2598 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2599 NADDR (msgin[3]), 2600 SCR_FROM_REG (socl), 2601 0, 2602 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2603 PADDRH (msg_parity), 2604 /* 2605 ** let the host do the real work. 2606 */ 2607 SCR_INT, 2608 SIR_NEGO_WIDE, 2609 /* 2610 ** let the target fetch our answer. 2611 */ 2612 SCR_SET (SCR_ATN), 2613 0, 2614 SCR_CLR (SCR_ACK), 2615 0, 2616 2617 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2618 SIR_NEGO_PROTO, 2619 /* 2620 ** Send the MSG_EXT_WDTR 2621 */ 2622 SCR_MOVE_ABS (4) ^ SCR_MSG_OUT, 2623 NADDR (msgout), 2624 SCR_CLR (SCR_ATN), 2625 0, 2626 SCR_COPY (1), 2627 RADDR (sfbr), 2628 NADDR (lastmsg), 2629 SCR_JUMP, 2630 PADDR (msg_out_done), 2631 2632 }/*-------------------------< MSG_EXT_3 >----------------*/,{ 2633 SCR_CLR (SCR_ACK), 2634 0, 2635 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2636 PADDR (dispatch), 2637 /* 2638 ** get extended message code. 2639 */ 2640 SCR_MOVE_ABS (1) ^ SCR_MSG_IN, 2641 NADDR (msgin[2]), 2642 /* 2643 ** Check for message parity error. 2644 */ 2645 SCR_TO_REG (scratcha), 2646 0, 2647 SCR_FROM_REG (socl), 2648 0, 2649 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2650 PADDRH (msg_parity), 2651 SCR_FROM_REG (scratcha), 2652 0, 2653 SCR_JUMP ^ IFTRUE (DATA (MSG_EXT_SDTR)), 2654 PADDRH (msg_sdtr), 2655 /* 2656 ** unknown extended message 2657 */ 2658 SCR_JUMP, 2659 PADDR (msg_bad) 2660 2661 }/*-------------------------< MSG_SDTR >-----------------*/,{ 2662 SCR_CLR (SCR_ACK), 2663 0, 2664 SCR_JUMP ^ IFFALSE (WHEN (SCR_MSG_IN)), 2665 PADDR (dispatch), 2666 /* 2667 ** get period and offset 2668 */ 2669 SCR_MOVE_ABS (2) ^ SCR_MSG_IN, 2670 NADDR (msgin[3]), 2671 SCR_FROM_REG (socl), 2672 0, 2673 SCR_JUMP ^ IFTRUE (MASK (CATN, CATN)), 2674 PADDRH (msg_parity), 2675 /* 2676 ** let the host do the real work. 2677 */ 2678 SCR_INT, 2679 SIR_NEGO_SYNC, 2680 /* 2681 ** let the target fetch our answer. 2682 */ 2683 SCR_SET (SCR_ATN), 2684 0, 2685 SCR_CLR (SCR_ACK), 2686 0, 2687 2688 SCR_INT ^ IFFALSE (WHEN (SCR_MSG_OUT)), 2689 SIR_NEGO_PROTO, 2690 /* 2691 ** Send the MSG_EXT_SDTR 2692 */ 2693 SCR_MOVE_ABS (5) ^ SCR_MSG_OUT, 2694 NADDR (msgout), 2695 SCR_CLR (SCR_ATN), 2696 0, 2697 SCR_COPY (1), 2698 RADDR (sfbr), 2699 NADDR (lastmsg), 2700 SCR_JUMP, 2701 PADDR (msg_out_done), 2702 2703 }/*-------------------------< MSG_OUT_ABORT >-------------*/,{ 2704 /* 2705 ** After ABORT message, 2706 ** 2707 ** expect an immediate disconnect, ... 2708 */ 2709 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2710 0, 2711 SCR_CLR (SCR_ACK|SCR_ATN), 2712 0, 2713 SCR_WAIT_DISC, 2714 0, 2715 /* 2716 ** ... and set the status to "ABORTED" 2717 */ 2718 SCR_LOAD_REG (HS_REG, HS_ABORTED), 2719 0, 2720 SCR_JUMP, 2721 PADDR (cleanup), 2722 2723 }/*-------------------------< GETCC >-----------------------*/,{ 2724 /* 2725 ** The ncr doesn't have an indirect load 2726 ** or store command. So we have to 2727 ** copy part of the control block to a 2728 ** fixed place, where we can modify it. 2729 ** 2730 ** We patch the address part of a COPY command 2731 ** with the address of the dsa register ... 2732 */ 2733 SCR_COPY_F (4), 2734 RADDR (dsa), 2735 PADDRH (getcc1), 2736 /* 2737 ** ... then we do the actual copy. 2738 */ 2739 SCR_COPY (sizeof (struct head)), 2740 }/*-------------------------< GETCC1 >----------------------*/,{ 2741 0, 2742 NADDR (header), 2743 /* 2744 ** Initialize the status registers 2745 */ 2746 SCR_COPY (4), 2747 NADDR (header.status), 2748 RADDR (scr0), 2749 }/*-------------------------< GETCC2 >----------------------*/,{ 2750 /* 2751 ** Get the condition code from a target. 2752 ** 2753 ** DSA points to a data structure. 2754 ** Set TEMP to the script location 2755 ** that receives the condition code. 2756 ** 2757 ** Because there is no script command 2758 ** to load a longword into a register, 2759 ** we use a CALL command. 2760 */ 2761 /*<<<*/ SCR_CALLR, 2762 24, 2763 /* 2764 ** Get the condition code. 2765 */ 2766 SCR_MOVE_TBL ^ SCR_DATA_IN, 2767 offsetof (struct dsb, sense), 2768 /* 2769 ** No data phase may follow! 2770 */ 2771 SCR_CALL, 2772 PADDR (checkatn), 2773 SCR_JUMP, 2774 PADDR (no_data), 2775 /*>>>*/ 2776 2777 /* 2778 ** The CALL jumps to this point. 2779 ** Prepare for a RESTORE_POINTER message. 2780 ** Save the TEMP register into the saved pointer. 2781 */ 2782 SCR_COPY (4), 2783 RADDR (temp), 2784 NADDR (header.savep), 2785 /* 2786 ** Load scratcha, because in case of a selection timeout, 2787 ** the host will expect a new value for startpos in 2788 ** the scratcha register. 2789 */ 2790 SCR_COPY (4), 2791 PADDR (startpos), 2792 RADDR (scratcha), 2793 #ifdef NCR_GETCC_WITHMSG 2794 /* 2795 ** If QUIRK_NOMSG is set, select without ATN. 2796 ** and don't send a message. 2797 */ 2798 SCR_FROM_REG (QU_REG), 2799 0, 2800 SCR_JUMP ^ IFTRUE (MASK (QUIRK_NOMSG, QUIRK_NOMSG)), 2801 PADDRH(getcc3), 2802 /* 2803 ** Then try to connect to the target. 2804 ** If we are reselected, special treatment 2805 ** of the current job is required before 2806 ** accepting the reselection. 2807 */ 2808 SCR_SEL_TBL_ATN ^ offsetof (struct dsb, select), 2809 PADDR(badgetcc), 2810 /* 2811 ** Send the IDENTIFY message. 2812 ** In case of short transfer, remove ATN. 2813 */ 2814 SCR_MOVE_TBL ^ SCR_MSG_OUT, 2815 offsetof (struct dsb, smsg2), 2816 SCR_CLR (SCR_ATN), 2817 0, 2818 /* 2819 ** save the first byte of the message. 2820 */ 2821 SCR_COPY (1), 2822 RADDR (sfbr), 2823 NADDR (lastmsg), 2824 SCR_JUMP, 2825 PADDR (prepare2), 2826 2827 #endif 2828 }/*-------------------------< GETCC3 >----------------------*/,{ 2829 /* 2830 ** Try to connect to the target. 2831 ** If we are reselected, special treatment 2832 ** of the current job is required before 2833 ** accepting the reselection. 2834 ** 2835 ** Silly target won't accept a message. 2836 ** Select without ATN. 2837 */ 2838 SCR_SEL_TBL ^ offsetof (struct dsb, select), 2839 PADDR(badgetcc), 2840 /* 2841 ** Force error if selection timeout 2842 */ 2843 SCR_JUMPR ^ IFTRUE (WHEN (SCR_MSG_IN)), 2844 0, 2845 /* 2846 ** don't negotiate. 2847 */ 2848 SCR_JUMP, 2849 PADDR (prepare2), 2850 }/*-------------------------< ABORTTAG >-------------------*/,{ 2851 /* 2852 ** Abort a bad reselection. 2853 ** Set the message to ABORT vs. ABORT_TAG 2854 */ 2855 SCR_LOAD_REG (scratcha, MSG_ABORT_TAG), 2856 0, 2857 SCR_JUMPR ^ IFFALSE (CARRYSET), 2858 8, 2859 }/*-------------------------< ABORT >----------------------*/,{ 2860 SCR_LOAD_REG (scratcha, MSG_ABORT), 2861 0, 2862 SCR_COPY (1), 2863 RADDR (scratcha), 2864 NADDR (msgout), 2865 SCR_SET (SCR_ATN), 2866 0, 2867 SCR_CLR (SCR_ACK), 2868 0, 2869 /* 2870 ** and send it. 2871 ** we expect an immediate disconnect 2872 */ 2873 SCR_REG_REG (scntl2, SCR_AND, 0x7f), 2874 0, 2875 SCR_MOVE_ABS (1) ^ SCR_MSG_OUT, 2876 NADDR (msgout), 2877 SCR_COPY (1), 2878 RADDR (sfbr), 2879 NADDR (lastmsg), 2880 SCR_CLR (SCR_ACK|SCR_ATN), 2881 0, 2882 SCR_WAIT_DISC, 2883 0, 2884 SCR_JUMP, 2885 PADDR (start), 2886 }/*-------------------------< SNOOPTEST >-------------------*/,{ 2887 /* 2888 ** Read the variable. 2889 */ 2890 SCR_COPY (4), 2891 KVAR (KVAR_NCR_CACHE), 2892 RADDR (scratcha), 2893 /* 2894 ** Write the variable. 2895 */ 2896 SCR_COPY (4), 2897 RADDR (temp), 2898 KVAR (KVAR_NCR_CACHE), 2899 /* 2900 ** Read back the variable. 2901 */ 2902 SCR_COPY (4), 2903 KVAR (KVAR_NCR_CACHE), 2904 RADDR (temp), 2905 }/*-------------------------< SNOOPEND >-------------------*/,{ 2906 /* 2907 ** And stop. 2908 */ 2909 SCR_INT, 2910 99, 2911 }/*--------------------------------------------------------*/ 2912 }; 2913 2914 2915 /*========================================================== 2916 ** 2917 ** 2918 ** Fill in #define dependent parts of the script 2919 ** 2920 ** 2921 **========================================================== 2922 */ 2923 2924 void ncr_script_fill (struct script * scr, struct scripth * scrh) 2925 { 2926 int i; 2927 ncrcmd *p; 2928 2929 p = scrh->tryloop; 2930 for (i=0; i<MAX_START; i++) { 2931 *p++ =SCR_COPY (4); 2932 *p++ =NADDR (squeue[i]); 2933 *p++ =RADDR (dsa); 2934 *p++ =SCR_CALL; 2935 *p++ =PADDR (trysel); 2936 }; 2937 *p++ =SCR_JUMP; 2938 *p++ =PADDRH(tryloop); 2939 2940 assert ((char *)p == (char *)&scrh->tryloop + sizeof (scrh->tryloop)); 2941 2942 p = scr->data_in; 2943 2944 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_IN)); 2945 *p++ =PADDR (no_data); 2946 *p++ =SCR_COPY (sizeof (ticks)); 2947 *p++ =(ncrcmd) KVAR (KVAR_TICKS); 2948 *p++ =NADDR (header.stamp.data); 2949 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 2950 *p++ =offsetof (struct dsb, data[ 0]); 2951 2952 for (i=1; i<MAX_SCATTER; i++) { 2953 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_IN)); 2954 *p++ =PADDR (checkatn); 2955 *p++ =SCR_MOVE_TBL ^ SCR_DATA_IN; 2956 *p++ =offsetof (struct dsb, data[i]); 2957 }; 2958 2959 *p++ =SCR_CALL; 2960 *p++ =PADDR (checkatn); 2961 *p++ =SCR_JUMP; 2962 *p++ =PADDR (no_data); 2963 2964 assert ((char *)p == (char *)&scr->data_in + sizeof (scr->data_in)); 2965 2966 p = scr->data_out; 2967 2968 *p++ =SCR_JUMP ^ IFFALSE (WHEN (SCR_DATA_OUT)); 2969 *p++ =PADDR (no_data); 2970 *p++ =SCR_COPY (sizeof (ticks)); 2971 *p++ =(ncrcmd) KVAR (KVAR_TICKS); 2972 *p++ =NADDR (header.stamp.data); 2973 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 2974 *p++ =offsetof (struct dsb, data[ 0]); 2975 2976 for (i=1; i<MAX_SCATTER; i++) { 2977 *p++ =SCR_CALL ^ IFFALSE (WHEN (SCR_DATA_OUT)); 2978 *p++ =PADDR (dispatch); 2979 *p++ =SCR_MOVE_TBL ^ SCR_DATA_OUT; 2980 *p++ =offsetof (struct dsb, data[i]); 2981 }; 2982 2983 *p++ =SCR_CALL; 2984 *p++ =PADDR (dispatch); 2985 *p++ =SCR_JUMP; 2986 *p++ =PADDR (no_data); 2987 2988 assert ((char *)p == (char *)&scr->data_out + sizeof (scr->data_out)); 2989 } 2990 2991 /*========================================================== 2992 ** 2993 ** 2994 ** Copy and rebind a script. 2995 ** 2996 ** 2997 **========================================================== 2998 */ 2999 3000 static void ncr_script_copy_and_bind (ncb_p np, ncrcmd *src, ncrcmd *dst, int len) 3001 { 3002 ncrcmd opcode, new, old, tmp1, tmp2; 3003 ncrcmd *start, *end; 3004 int relocs, offset; 3005 3006 start = src; 3007 end = src + len/4; 3008 offset = 0; 3009 3010 while (src < end) { 3011 3012 opcode = *src++; 3013 WRITESCRIPT_OFF(dst, offset, opcode); 3014 offset += 4; 3015 3016 /* 3017 ** If we forget to change the length 3018 ** in struct script, a field will be 3019 ** padded with 0. This is an illegal 3020 ** command. 3021 */ 3022 3023 if (opcode == 0) { 3024 kprintf ("%s: ERROR0 IN SCRIPT at %d.\n", 3025 ncr_name(np), (int) (src-start-1)); 3026 DELAY (1000000); 3027 }; 3028 3029 if (DEBUG_FLAGS & DEBUG_SCRIPT) 3030 kprintf ("%p: <%x>\n", 3031 (src-1), (unsigned)opcode); 3032 3033 /* 3034 ** We don't have to decode ALL commands 3035 */ 3036 switch (opcode >> 28) { 3037 3038 case 0xc: 3039 /* 3040 ** COPY has TWO arguments. 3041 */ 3042 relocs = 2; 3043 tmp1 = src[0]; 3044 if ((tmp1 & RELOC_MASK) == RELOC_KVAR) 3045 tmp1 = 0; 3046 tmp2 = src[1]; 3047 if ((tmp2 & RELOC_MASK) == RELOC_KVAR) 3048 tmp2 = 0; 3049 if ((tmp1 ^ tmp2) & 3) { 3050 kprintf ("%s: ERROR1 IN SCRIPT at %d.\n", 3051 ncr_name(np), (int) (src-start-1)); 3052 DELAY (1000000); 3053 } 3054 /* 3055 ** If PREFETCH feature not enabled, remove 3056 ** the NO FLUSH bit if present. 3057 */ 3058 if ((opcode & SCR_NO_FLUSH) && !(np->features&FE_PFEN)) 3059 WRITESCRIPT_OFF(dst, offset - 4, 3060 (opcode & ~SCR_NO_FLUSH)); 3061 break; 3062 3063 case 0x0: 3064 /* 3065 ** MOVE (absolute address) 3066 */ 3067 relocs = 1; 3068 break; 3069 3070 case 0x8: 3071 /* 3072 ** JUMP / CALL 3073 ** dont't relocate if relative :-) 3074 */ 3075 if (opcode & 0x00800000) 3076 relocs = 0; 3077 else 3078 relocs = 1; 3079 break; 3080 3081 case 0x4: 3082 case 0x5: 3083 case 0x6: 3084 case 0x7: 3085 relocs = 1; 3086 break; 3087 3088 default: 3089 relocs = 0; 3090 break; 3091 }; 3092 3093 if (relocs) { 3094 while (relocs--) { 3095 old = *src++; 3096 3097 switch (old & RELOC_MASK) { 3098 case RELOC_REGISTER: 3099 new = (old & ~RELOC_MASK) + rman_get_start(np->reg_res); 3100 break; 3101 case RELOC_LABEL: 3102 new = (old & ~RELOC_MASK) + np->p_script; 3103 break; 3104 case RELOC_LABELH: 3105 new = (old & ~RELOC_MASK) + np->p_scripth; 3106 break; 3107 case RELOC_SOFTC: 3108 new = (old & ~RELOC_MASK) + vtophys(np); 3109 break; 3110 case RELOC_KVAR: 3111 if (((old & ~RELOC_MASK) < 3112 SCRIPT_KVAR_FIRST) || 3113 ((old & ~RELOC_MASK) > 3114 SCRIPT_KVAR_LAST)) 3115 panic("ncr KVAR out of range"); 3116 new = vtophys(script_kvars[old & 3117 ~RELOC_MASK]); 3118 break; 3119 case 0: 3120 /* Don't relocate a 0 address. */ 3121 if (old == 0) { 3122 new = old; 3123 break; 3124 } 3125 /* fall through */ 3126 default: 3127 panic("ncr_script_copy_and_bind: weird relocation %x @ %d\n", old, (int)(src - start)); 3128 break; 3129 } 3130 3131 WRITESCRIPT_OFF(dst, offset, new); 3132 offset += 4; 3133 } 3134 } else { 3135 WRITESCRIPT_OFF(dst, offset, *src++); 3136 offset += 4; 3137 } 3138 3139 }; 3140 } 3141 3142 /*========================================================== 3143 ** 3144 ** 3145 ** Auto configuration. 3146 ** 3147 ** 3148 **========================================================== 3149 */ 3150 3151 #if 0 3152 /*---------------------------------------------------------- 3153 ** 3154 ** Reduce the transfer length to the max value 3155 ** we can transfer safely. 3156 ** 3157 ** Reading a block greater then MAX_SIZE from the 3158 ** raw (character) device exercises a memory leak 3159 ** in the vm subsystem. This is common to ALL devices. 3160 ** We have submitted a description of this bug to 3161 ** <FreeBSD-bugs@freefall.cdrom.com>. 3162 ** It should be fixed in the current release. 3163 ** 3164 **---------------------------------------------------------- 3165 */ 3166 3167 void ncr_min_phys (struct buf *bp) 3168 { 3169 if ((unsigned long)bp->b_bcount > MAX_SIZE) bp->b_bcount = MAX_SIZE; 3170 } 3171 3172 #endif 3173 3174 #if 0 3175 /*---------------------------------------------------------- 3176 ** 3177 ** Maximal number of outstanding requests per target. 3178 ** 3179 **---------------------------------------------------------- 3180 */ 3181 3182 u_int32_t ncr_info (int unit) 3183 { 3184 return (1); /* may be changed later */ 3185 } 3186 3187 #endif 3188 3189 /*---------------------------------------------------------- 3190 ** 3191 ** NCR chip devices table and chip look up function. 3192 ** Features bit are defined in ncrreg.h. Is it the 3193 ** right place? 3194 ** 3195 **---------------------------------------------------------- 3196 */ 3197 typedef struct { 3198 unsigned long device_id; 3199 unsigned short minrevid; 3200 char *name; 3201 unsigned char maxburst; 3202 unsigned char maxoffs; 3203 unsigned char clock_divn; 3204 unsigned int features; 3205 } ncr_chip; 3206 3207 static ncr_chip ncr_chip_table[] = { 3208 {NCR_810_ID, 0x00, "ncr 53c810 fast10 scsi", 4, 8, 4, 3209 FE_ERL} 3210 , 3211 {NCR_810_ID, 0x10, "ncr 53c810a fast10 scsi", 4, 8, 4, 3212 FE_ERL|FE_LDSTR|FE_PFEN|FE_BOF} 3213 , 3214 {NCR_815_ID, 0x00, "ncr 53c815 fast10 scsi", 4, 8, 4, 3215 FE_ERL|FE_BOF} 3216 , 3217 {NCR_820_ID, 0x00, "ncr 53c820 fast10 wide scsi", 4, 8, 4, 3218 FE_WIDE|FE_ERL} 3219 , 3220 {NCR_825_ID, 0x00, "ncr 53c825 fast10 wide scsi", 4, 8, 4, 3221 FE_WIDE|FE_ERL|FE_BOF} 3222 , 3223 {NCR_825_ID, 0x10, "ncr 53c825a fast10 wide scsi", 7, 8, 4, 3224 FE_WIDE|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3225 , 3226 {NCR_860_ID, 0x00, "ncr 53c860 fast20 scsi", 4, 8, 5, 3227 FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_LDSTR|FE_PFEN} 3228 , 3229 {NCR_875_ID, 0x00, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3230 FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3231 , 3232 {NCR_875_ID, 0x02, "ncr 53c875 fast20 wide scsi", 7, 16, 5, 3233 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3234 , 3235 {NCR_875_ID2, 0x00, "ncr 53c875j fast20 wide scsi", 7, 16, 5, 3236 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3237 , 3238 {NCR_885_ID, 0x00, "ncr 53c885 fast20 wide scsi", 7, 16, 5, 3239 FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3240 , 3241 {NCR_895_ID, 0x00, "ncr 53c895 fast40 wide scsi", 7, 31, 7, 3242 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3243 , 3244 {NCR_896_ID, 0x00, "ncr 53c896 fast40 wide scsi", 7, 31, 7, 3245 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3246 , 3247 {NCR_895A_ID, 0x00, "ncr 53c895a fast40 wide scsi", 7, 31, 7, 3248 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3249 , 3250 {NCR_1510D_ID, 0x00, "ncr 53c1510d fast40 wide scsi", 7, 31, 7, 3251 FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM} 3252 }; 3253 3254 static int ncr_chip_lookup(u_long device_id, u_char revision_id) 3255 { 3256 int i, found; 3257 3258 found = -1; 3259 for (i = 0; i < sizeof(ncr_chip_table)/sizeof(ncr_chip_table[0]); i++) { 3260 if (device_id == ncr_chip_table[i].device_id && 3261 ncr_chip_table[i].minrevid <= revision_id) { 3262 if (found < 0 || 3263 ncr_chip_table[found].minrevid 3264 < ncr_chip_table[i].minrevid) { 3265 found = i; 3266 } 3267 } 3268 } 3269 return found; 3270 } 3271 3272 /*---------------------------------------------------------- 3273 ** 3274 ** Probe the hostadapter. 3275 ** 3276 **---------------------------------------------------------- 3277 */ 3278 3279 3280 3281 static int ncr_probe (device_t dev) 3282 { 3283 int i; 3284 3285 i = ncr_chip_lookup(pci_get_devid(dev), pci_get_revid(dev)); 3286 if (i >= 0) { 3287 device_set_desc(dev, ncr_chip_table[i].name); 3288 return (-1000); /* Allows to use both ncr and sym */ 3289 } 3290 3291 return (ENXIO); 3292 } 3293 3294 3295 3296 /*========================================================== 3297 ** 3298 ** NCR chip clock divisor table. 3299 ** Divisors are multiplied by 10,000,000 in order to make 3300 ** calculations more simple. 3301 ** 3302 **========================================================== 3303 */ 3304 3305 #define _5M 5000000 3306 static u_long div_10M[] = 3307 {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M}; 3308 3309 /*=============================================================== 3310 ** 3311 ** NCR chips allow burst lengths of 2, 4, 8, 16, 32, 64, 128 3312 ** transfers. 32,64,128 are only supported by 875 and 895 chips. 3313 ** We use log base 2 (burst length) as internal code, with 3314 ** value 0 meaning "burst disabled". 3315 ** 3316 **=============================================================== 3317 */ 3318 3319 /* 3320 * Burst length from burst code. 3321 */ 3322 #define burst_length(bc) (!(bc))? 0 : 1 << (bc) 3323 3324 /* 3325 * Burst code from io register bits. 3326 */ 3327 #define burst_code(dmode, ctest4, ctest5) \ 3328 (ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1 3329 3330 /* 3331 * Set initial io register bits from burst code. 3332 */ 3333 static void 3334 ncr_init_burst(ncb_p np, u_char bc) 3335 { 3336 np->rv_ctest4 &= ~0x80; 3337 np->rv_dmode &= ~(0x3 << 6); 3338 np->rv_ctest5 &= ~0x4; 3339 3340 if (!bc) { 3341 np->rv_ctest4 |= 0x80; 3342 } 3343 else { 3344 --bc; 3345 np->rv_dmode |= ((bc & 0x3) << 6); 3346 np->rv_ctest5 |= (bc & 0x4); 3347 } 3348 } 3349 3350 /*========================================================== 3351 ** 3352 ** 3353 ** Auto configuration: attach and init a host adapter. 3354 ** 3355 ** 3356 **========================================================== 3357 */ 3358 3359 3360 static int 3361 ncr_attach (device_t dev) 3362 { 3363 ncb_p np = (struct ncb*) device_get_softc(dev); 3364 u_char rev = 0; 3365 u_long period; 3366 int i, rid; 3367 u_int8_t usrsync; 3368 u_int8_t usrwide; 3369 struct cam_devq *devq; 3370 3371 /* 3372 ** allocate and initialize structures. 3373 */ 3374 3375 np->unit = device_get_unit(dev); 3376 3377 /* 3378 ** Try to map the controller chip to 3379 ** virtual and physical memory. 3380 */ 3381 3382 np->reg_rid = 0x14; 3383 np->reg_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &np->reg_rid, 3384 0, ~0, 1, RF_ACTIVE); 3385 if (!np->reg_res) { 3386 device_printf(dev, "could not map memory\n"); 3387 return ENXIO; 3388 } 3389 3390 /* 3391 ** Make the controller's registers available. 3392 ** Now the INB INW INL OUTB OUTW OUTL macros 3393 ** can be used safely. 3394 */ 3395 3396 np->bst = rman_get_bustag(np->reg_res); 3397 np->bsh = rman_get_bushandle(np->reg_res); 3398 3399 3400 #ifdef NCR_IOMAPPED 3401 /* 3402 ** Try to map the controller chip into iospace. 3403 */ 3404 3405 if (!pci_map_port (config_id, 0x10, &np->port)) 3406 return; 3407 #endif 3408 3409 3410 /* 3411 ** Save some controller register default values 3412 */ 3413 3414 np->rv_scntl3 = INB(nc_scntl3) & 0x77; 3415 np->rv_dmode = INB(nc_dmode) & 0xce; 3416 np->rv_dcntl = INB(nc_dcntl) & 0xa9; 3417 np->rv_ctest3 = INB(nc_ctest3) & 0x01; 3418 np->rv_ctest4 = INB(nc_ctest4) & 0x88; 3419 np->rv_ctest5 = INB(nc_ctest5) & 0x24; 3420 np->rv_gpcntl = INB(nc_gpcntl); 3421 np->rv_stest2 = INB(nc_stest2) & 0x20; 3422 3423 if (bootverbose >= 2) { 3424 kprintf ("\tBIOS values: SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 3425 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 3426 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 3427 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 3428 } 3429 3430 np->rv_dcntl |= NOCOM; 3431 3432 /* 3433 ** Do chip dependent initialization. 3434 */ 3435 3436 rev = pci_get_revid(dev); 3437 3438 /* 3439 ** Get chip features from chips table. 3440 */ 3441 i = ncr_chip_lookup(pci_get_devid(dev), rev); 3442 3443 if (i >= 0) { 3444 np->maxburst = ncr_chip_table[i].maxburst; 3445 np->maxoffs = ncr_chip_table[i].maxoffs; 3446 np->clock_divn = ncr_chip_table[i].clock_divn; 3447 np->features = ncr_chip_table[i].features; 3448 } else { /* Should'nt happen if probe() is ok */ 3449 np->maxburst = 4; 3450 np->maxoffs = 8; 3451 np->clock_divn = 4; 3452 np->features = FE_ERL; 3453 } 3454 3455 np->maxwide = np->features & FE_WIDE ? 1 : 0; 3456 np->clock_khz = np->features & FE_CLK80 ? 80000 : 40000; 3457 if (np->features & FE_QUAD) np->multiplier = 4; 3458 else if (np->features & FE_DBLR) np->multiplier = 2; 3459 else np->multiplier = 1; 3460 3461 /* 3462 ** Get the frequency of the chip's clock. 3463 ** Find the right value for scntl3. 3464 */ 3465 if (np->features & (FE_ULTRA|FE_ULTRA2)) 3466 ncr_getclock(np, np->multiplier); 3467 3468 #ifdef NCR_TEKRAM_EEPROM 3469 if (bootverbose) { 3470 kprintf ("%s: Tekram EEPROM read %s\n", 3471 ncr_name(np), 3472 read_tekram_eeprom (np, NULL) ? 3473 "succeeded" : "failed"); 3474 } 3475 #endif /* NCR_TEKRAM_EEPROM */ 3476 3477 /* 3478 * If scntl3 != 0, we assume BIOS is present. 3479 */ 3480 if (np->rv_scntl3) 3481 np->features |= FE_BIOS; 3482 3483 /* 3484 * Divisor to be used for async (timer pre-scaler). 3485 */ 3486 i = np->clock_divn - 1; 3487 while (i >= 0) { 3488 --i; 3489 if (10ul * SCSI_NCR_MIN_ASYNC * np->clock_khz > div_10M[i]) { 3490 ++i; 3491 break; 3492 } 3493 } 3494 np->rv_scntl3 = i+1; 3495 3496 /* 3497 * Minimum synchronous period factor supported by the chip. 3498 * Btw, 'period' is in tenths of nanoseconds. 3499 */ 3500 3501 period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz; 3502 if (period <= 250) np->minsync = 10; 3503 else if (period <= 303) np->minsync = 11; 3504 else if (period <= 500) np->minsync = 12; 3505 else np->minsync = (period + 40 - 1) / 40; 3506 3507 /* 3508 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2). 3509 */ 3510 3511 if (np->minsync < 25 && !(np->features & (FE_ULTRA|FE_ULTRA2))) 3512 np->minsync = 25; 3513 else if (np->minsync < 12 && !(np->features & FE_ULTRA2)) 3514 np->minsync = 12; 3515 3516 /* 3517 * Maximum synchronous period factor supported by the chip. 3518 */ 3519 3520 period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz); 3521 np->maxsync = period > 2540 ? 254 : period / 10; 3522 3523 /* 3524 * Now, some features available with Symbios compatible boards. 3525 * LED support through GPIO0 and DIFF support. 3526 */ 3527 3528 #ifdef SCSI_NCR_SYMBIOS_COMPAT 3529 if (!(np->rv_gpcntl & 0x01)) 3530 np->features |= FE_LED0; 3531 #if 0 /* Not safe enough without NVRAM support or user settable option */ 3532 if (!(INB(nc_gpreg) & 0x08)) 3533 np->features |= FE_DIFF; 3534 #endif 3535 #endif /* SCSI_NCR_SYMBIOS_COMPAT */ 3536 3537 /* 3538 * Prepare initial IO registers settings. 3539 * Trust BIOS only if we believe we have one and if we want to. 3540 */ 3541 #ifdef SCSI_NCR_TRUST_BIOS 3542 if (!(np->features & FE_BIOS)) { 3543 #else 3544 if (1) { 3545 #endif 3546 np->rv_dmode = 0; 3547 np->rv_dcntl = NOCOM; 3548 np->rv_ctest3 = 0; 3549 np->rv_ctest4 = MPEE; 3550 np->rv_ctest5 = 0; 3551 np->rv_stest2 = 0; 3552 3553 if (np->features & FE_ERL) 3554 np->rv_dmode |= ERL; /* Enable Read Line */ 3555 if (np->features & FE_BOF) 3556 np->rv_dmode |= BOF; /* Burst Opcode Fetch */ 3557 if (np->features & FE_ERMP) 3558 np->rv_dmode |= ERMP; /* Enable Read Multiple */ 3559 if (np->features & FE_CLSE) 3560 np->rv_dcntl |= CLSE; /* Cache Line Size Enable */ 3561 if (np->features & FE_WRIE) 3562 np->rv_ctest3 |= WRIE; /* Write and Invalidate */ 3563 if (np->features & FE_PFEN) 3564 np->rv_dcntl |= PFEN; /* Prefetch Enable */ 3565 if (np->features & FE_DFS) 3566 np->rv_ctest5 |= DFS; /* Dma Fifo Size */ 3567 if (np->features & FE_DIFF) 3568 np->rv_stest2 |= 0x20; /* Differential mode */ 3569 ncr_init_burst(np, np->maxburst); /* Max dwords burst length */ 3570 } else { 3571 np->maxburst = 3572 burst_code(np->rv_dmode, np->rv_ctest4, np->rv_ctest5); 3573 } 3574 3575 /* 3576 ** Get on-chip SRAM address, if supported 3577 */ 3578 if ((np->features & FE_RAM) && sizeof(struct script) <= 4096) { 3579 np->sram_rid = 0x18; 3580 np->sram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, 3581 &np->sram_rid, 3582 0, ~0, 1, RF_ACTIVE); 3583 } 3584 3585 /* 3586 ** Allocate structure for script relocation. 3587 */ 3588 if (np->sram_res != NULL) { 3589 np->script = NULL; 3590 np->p_script = rman_get_start(np->sram_res); 3591 np->bst2 = rman_get_bustag(np->sram_res); 3592 np->bsh2 = rman_get_bushandle(np->sram_res); 3593 } else if (sizeof (struct script) > PAGE_SIZE) { 3594 np->script = (struct script*) vm_page_alloc_contig 3595 (round_page(sizeof (struct script)), 3596 0, 0xffffffff, PAGE_SIZE); 3597 } else { 3598 np->script = (struct script *) 3599 kmalloc (sizeof (struct script), M_DEVBUF, M_WAITOK); 3600 } 3601 3602 /* XXX JGibbs - Use contigmalloc */ 3603 if (sizeof (struct scripth) > PAGE_SIZE) { 3604 np->scripth = (struct scripth*) vm_page_alloc_contig 3605 (round_page(sizeof (struct scripth)), 3606 0, 0xffffffff, PAGE_SIZE); 3607 } else 3608 { 3609 np->scripth = (struct scripth *) 3610 kmalloc (sizeof (struct scripth), M_DEVBUF, M_WAITOK); 3611 } 3612 3613 #ifdef SCSI_NCR_PCI_CONFIG_FIXUP 3614 /* 3615 ** If cache line size is enabled, check PCI config space and 3616 ** try to fix it up if necessary. 3617 */ 3618 #ifdef PCIR_CACHELNSZ /* To be sure that new PCI stuff is present */ 3619 { 3620 u_char cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1); 3621 u_short command = pci_read_config(dev, PCIR_COMMAND, 2); 3622 3623 if (!cachelnsz) { 3624 cachelnsz = 8; 3625 kprintf("%s: setting PCI cache line size register to %d.\n", 3626 ncr_name(np), (int)cachelnsz); 3627 pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1); 3628 } 3629 3630 if (!(command & (1<<4))) { 3631 command |= (1<<4); 3632 kprintf("%s: setting PCI command write and invalidate.\n", 3633 ncr_name(np)); 3634 pci_write_config(dev, PCIR_COMMAND, command, 2); 3635 } 3636 } 3637 #endif /* PCIR_CACHELNSZ */ 3638 3639 #endif /* SCSI_NCR_PCI_CONFIG_FIXUP */ 3640 3641 /* Initialize per-target user settings */ 3642 usrsync = 0; 3643 if (SCSI_NCR_DFLT_SYNC) { 3644 usrsync = SCSI_NCR_DFLT_SYNC; 3645 if (usrsync > np->maxsync) 3646 usrsync = np->maxsync; 3647 if (usrsync < np->minsync) 3648 usrsync = np->minsync; 3649 }; 3650 3651 usrwide = (SCSI_NCR_MAX_WIDE); 3652 if (usrwide > np->maxwide) usrwide=np->maxwide; 3653 3654 for (i=0;i<MAX_TARGET;i++) { 3655 tcb_p tp = &np->target[i]; 3656 3657 tp->tinfo.user.period = usrsync; 3658 tp->tinfo.user.offset = usrsync != 0 ? np->maxoffs : 0; 3659 tp->tinfo.user.width = usrwide; 3660 tp->tinfo.disc_tag = NCR_CUR_DISCENB 3661 | NCR_CUR_TAGENB 3662 | NCR_USR_DISCENB 3663 | NCR_USR_TAGENB; 3664 } 3665 3666 /* 3667 ** Bells and whistles ;-) 3668 */ 3669 if (bootverbose) 3670 kprintf("%s: minsync=%d, maxsync=%d, maxoffs=%d, %d dwords burst, %s dma fifo\n", 3671 ncr_name(np), np->minsync, np->maxsync, np->maxoffs, 3672 burst_length(np->maxburst), 3673 (np->rv_ctest5 & DFS) ? "large" : "normal"); 3674 3675 /* 3676 ** Print some complementary information that can be helpfull. 3677 */ 3678 if (bootverbose) 3679 kprintf("%s: %s, %s IRQ driver%s\n", 3680 ncr_name(np), 3681 np->rv_stest2 & 0x20 ? "differential" : "single-ended", 3682 np->rv_dcntl & IRQM ? "totem pole" : "open drain", 3683 np->sram_res ? ", using on-chip SRAM" : ""); 3684 3685 /* 3686 ** Patch scripts to physical addresses 3687 */ 3688 ncr_script_fill (&script0, &scripth0); 3689 3690 if (np->script) 3691 np->p_script = vtophys(np->script); 3692 np->p_scripth = vtophys(np->scripth); 3693 3694 ncr_script_copy_and_bind (np, (ncrcmd *) &script0, 3695 (ncrcmd *) np->script, sizeof(struct script)); 3696 3697 ncr_script_copy_and_bind (np, (ncrcmd *) &scripth0, 3698 (ncrcmd *) np->scripth, sizeof(struct scripth)); 3699 3700 /* 3701 ** Patch the script for LED support. 3702 */ 3703 3704 if (np->features & FE_LED0) { 3705 WRITESCRIPT(reselect[0], SCR_REG_REG(gpreg, SCR_OR, 0x01)); 3706 WRITESCRIPT(reselect1[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 3707 WRITESCRIPT(reselect2[0], SCR_REG_REG(gpreg, SCR_AND, 0xfe)); 3708 } 3709 3710 /* 3711 ** init data structure 3712 */ 3713 3714 np->jump_tcb.l_cmd = SCR_JUMP; 3715 np->jump_tcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort); 3716 3717 /* 3718 ** Get SCSI addr of host adapter (set by bios?). 3719 */ 3720 3721 np->myaddr = INB(nc_scid) & 0x07; 3722 if (!np->myaddr) np->myaddr = SCSI_NCR_MYADDR; 3723 3724 #ifdef NCR_DUMP_REG 3725 /* 3726 ** Log the initial register contents 3727 */ 3728 { 3729 int reg; 3730 for (reg=0; reg<256; reg+=4) { 3731 if (reg%16==0) kprintf ("reg[%2x]", reg); 3732 kprintf (" %08x", (int)pci_conf_read (config_id, reg)); 3733 if (reg%16==12) kprintf ("\n"); 3734 } 3735 } 3736 #endif /* NCR_DUMP_REG */ 3737 3738 /* 3739 ** Reset chip. 3740 */ 3741 3742 OUTB (nc_istat, SRST); 3743 DELAY (1000); 3744 OUTB (nc_istat, 0 ); 3745 3746 3747 /* 3748 ** Now check the cache handling of the pci chipset. 3749 */ 3750 3751 if (ncr_snooptest (np)) { 3752 kprintf ("CACHE INCORRECTLY CONFIGURED.\n"); 3753 return EINVAL; 3754 }; 3755 3756 /* 3757 ** Install the interrupt handler. 3758 */ 3759 3760 rid = 0; 3761 np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &rid, 0, ~0, 1, 3762 RF_SHAREABLE | RF_ACTIVE); 3763 if (np->irq_res == NULL) { 3764 device_printf(dev, 3765 "interruptless mode: reduced performance.\n"); 3766 } else { 3767 bus_setup_intr(dev, np->irq_res, 0, 3768 ncr_intr, np, &np->irq_handle, NULL); 3769 } 3770 3771 /* 3772 ** Create the device queue. We only allow MAX_START-1 concurrent 3773 ** transactions so we can be sure to have one element free in our 3774 ** start queue to reset to the idle loop. 3775 */ 3776 devq = cam_simq_alloc(MAX_START - 1); 3777 if (devq == NULL) 3778 return ENOMEM; 3779 3780 /* 3781 ** Now tell the generic SCSI layer 3782 ** about our bus. 3783 */ 3784 np->sim = cam_sim_alloc(ncr_action, ncr_poll, "ncr", np, np->unit, 3785 &sim_mplock, 1, MAX_TAGS, devq); 3786 cam_simq_release(devq); 3787 if (np->sim == NULL) 3788 return ENOMEM; 3789 3790 3791 if (xpt_bus_register(np->sim, 0) != CAM_SUCCESS) { 3792 cam_sim_free(np->sim); 3793 return ENOMEM; 3794 } 3795 3796 if (xpt_create_path(&np->path, /*periph*/NULL, 3797 cam_sim_path(np->sim), CAM_TARGET_WILDCARD, 3798 CAM_LUN_WILDCARD) != CAM_REQ_CMP) { 3799 xpt_bus_deregister(cam_sim_path(np->sim)); 3800 cam_sim_free(np->sim); 3801 return ENOMEM; 3802 } 3803 3804 /* 3805 ** start the timeout daemon 3806 */ 3807 callout_init(&np->timeout_ch); 3808 ncr_timeout (np); 3809 np->lasttime=0; 3810 3811 return 0; 3812 } 3813 3814 /*========================================================== 3815 ** 3816 ** 3817 ** Process pending device interrupts. 3818 ** 3819 ** 3820 **========================================================== 3821 */ 3822 3823 static void 3824 ncr_intr(void *vnp) 3825 { 3826 ncb_p np = vnp; 3827 crit_enter(); 3828 3829 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("["); 3830 3831 if (INB(nc_istat) & (INTF|SIP|DIP)) { 3832 /* 3833 ** Repeat until no outstanding ints 3834 */ 3835 do { 3836 ncr_exception (np); 3837 } while (INB(nc_istat) & (INTF|SIP|DIP)); 3838 3839 np->ticks = 100; 3840 }; 3841 3842 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("]\n"); 3843 3844 crit_exit(); 3845 } 3846 3847 /*========================================================== 3848 ** 3849 ** 3850 ** Start execution of a SCSI command. 3851 ** This is called from the generic SCSI driver. 3852 ** 3853 ** 3854 **========================================================== 3855 */ 3856 3857 static void 3858 ncr_action (struct cam_sim *sim, union ccb *ccb) 3859 { 3860 ncb_p np; 3861 3862 np = (ncb_p) cam_sim_softc(sim); 3863 3864 switch (ccb->ccb_h.func_code) { 3865 /* Common cases first */ 3866 case XPT_SCSI_IO: /* Execute the requested I/O operation */ 3867 { 3868 nccb_p cp; 3869 lcb_p lp; 3870 tcb_p tp; 3871 struct ccb_scsiio *csio; 3872 u_int8_t *msgptr; 3873 u_int msglen; 3874 u_int msglen2; 3875 int segments; 3876 u_int8_t nego; 3877 u_int8_t idmsg; 3878 int qidx; 3879 3880 tp = &np->target[ccb->ccb_h.target_id]; 3881 csio = &ccb->csio; 3882 3883 crit_enter(); 3884 3885 /* 3886 * Last time we need to check if this CCB needs to 3887 * be aborted. 3888 */ 3889 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_INPROG) { 3890 xpt_done(ccb); 3891 crit_exit(); 3892 return; 3893 } 3894 ccb->ccb_h.status |= CAM_SIM_QUEUED; 3895 3896 /*--------------------------------------------------- 3897 ** 3898 ** Assign an nccb / bind ccb 3899 ** 3900 **---------------------------------------------------- 3901 */ 3902 cp = ncr_get_nccb (np, ccb->ccb_h.target_id, 3903 ccb->ccb_h.target_lun); 3904 if (cp == NULL) { 3905 /* XXX JGibbs - Freeze SIMQ */ 3906 ccb->ccb_h.status = CAM_RESRC_UNAVAIL; 3907 xpt_done(ccb); 3908 return; 3909 }; 3910 3911 cp->ccb = ccb; 3912 3913 /*--------------------------------------------------- 3914 ** 3915 ** timestamp 3916 ** 3917 **---------------------------------------------------- 3918 */ 3919 /* 3920 ** XXX JGibbs - Isn't this expensive 3921 ** enough to be conditionalized?? 3922 */ 3923 3924 bzero (&cp->phys.header.stamp, sizeof (struct tstamp)); 3925 cp->phys.header.stamp.start = ticks; 3926 3927 nego = 0; 3928 if (tp->nego_cp == NULL) { 3929 3930 if (tp->tinfo.current.width 3931 != tp->tinfo.goal.width) { 3932 tp->nego_cp = cp; 3933 nego = NS_WIDE; 3934 } else if ((tp->tinfo.current.period 3935 != tp->tinfo.goal.period) 3936 || (tp->tinfo.current.offset 3937 != tp->tinfo.goal.offset)) { 3938 tp->nego_cp = cp; 3939 nego = NS_SYNC; 3940 }; 3941 }; 3942 3943 /*--------------------------------------------------- 3944 ** 3945 ** choose a new tag ... 3946 ** 3947 **---------------------------------------------------- 3948 */ 3949 lp = tp->lp[ccb->ccb_h.target_lun]; 3950 3951 if ((ccb->ccb_h.flags & CAM_TAG_ACTION_VALID) != 0 3952 && (ccb->csio.tag_action != CAM_TAG_ACTION_NONE) 3953 && (nego == 0)) { 3954 /* 3955 ** assign a tag to this nccb 3956 */ 3957 while (!cp->tag) { 3958 nccb_p cp2 = lp->next_nccb; 3959 lp->lasttag = lp->lasttag % 255 + 1; 3960 while (cp2 && cp2->tag != lp->lasttag) 3961 cp2 = cp2->next_nccb; 3962 if (cp2) continue; 3963 cp->tag=lp->lasttag; 3964 if (DEBUG_FLAGS & DEBUG_TAGS) { 3965 PRINT_ADDR(ccb); 3966 kprintf ("using tag #%d.\n", cp->tag); 3967 }; 3968 }; 3969 } else { 3970 cp->tag=0; 3971 }; 3972 3973 /*---------------------------------------------------- 3974 ** 3975 ** Build the identify / tag / sdtr message 3976 ** 3977 **---------------------------------------------------- 3978 */ 3979 idmsg = MSG_IDENTIFYFLAG | ccb->ccb_h.target_lun; 3980 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB) 3981 idmsg |= MSG_IDENTIFY_DISCFLAG; 3982 3983 msgptr = cp->scsi_smsg; 3984 msglen = 0; 3985 msgptr[msglen++] = idmsg; 3986 3987 if (cp->tag) { 3988 msgptr[msglen++] = ccb->csio.tag_action; 3989 msgptr[msglen++] = cp->tag; 3990 } 3991 3992 switch (nego) { 3993 case NS_SYNC: 3994 msgptr[msglen++] = MSG_EXTENDED; 3995 msgptr[msglen++] = MSG_EXT_SDTR_LEN; 3996 msgptr[msglen++] = MSG_EXT_SDTR; 3997 msgptr[msglen++] = tp->tinfo.goal.period; 3998 msgptr[msglen++] = tp->tinfo.goal.offset; 3999 if (DEBUG_FLAGS & DEBUG_NEGO) { 4000 PRINT_ADDR(ccb); 4001 kprintf ("sync msgout: "); 4002 ncr_show_msg (&cp->scsi_smsg [msglen-5]); 4003 kprintf (".\n"); 4004 }; 4005 break; 4006 case NS_WIDE: 4007 msgptr[msglen++] = MSG_EXTENDED; 4008 msgptr[msglen++] = MSG_EXT_WDTR_LEN; 4009 msgptr[msglen++] = MSG_EXT_WDTR; 4010 msgptr[msglen++] = tp->tinfo.goal.width; 4011 if (DEBUG_FLAGS & DEBUG_NEGO) { 4012 PRINT_ADDR(ccb); 4013 kprintf ("wide msgout: "); 4014 ncr_show_msg (&cp->scsi_smsg [msglen-4]); 4015 kprintf (".\n"); 4016 }; 4017 break; 4018 }; 4019 4020 /*---------------------------------------------------- 4021 ** 4022 ** Build the identify message for getcc. 4023 ** 4024 **---------------------------------------------------- 4025 */ 4026 4027 cp->scsi_smsg2 [0] = idmsg; 4028 msglen2 = 1; 4029 4030 /*---------------------------------------------------- 4031 ** 4032 ** Build the data descriptors 4033 ** 4034 **---------------------------------------------------- 4035 */ 4036 4037 /* XXX JGibbs - Handle other types of I/O */ 4038 if ((ccb->ccb_h.flags & CAM_DIR_MASK) != CAM_DIR_NONE) { 4039 segments = ncr_scatter(&cp->phys, 4040 (vm_offset_t)csio->data_ptr, 4041 (vm_size_t)csio->dxfer_len); 4042 4043 if (segments < 0) { 4044 ccb->ccb_h.status = CAM_REQ_TOO_BIG; 4045 ncr_free_nccb(np, cp); 4046 crit_exit(); 4047 xpt_done(ccb); 4048 return; 4049 } 4050 if ((ccb->ccb_h.flags & CAM_DIR_MASK) == CAM_DIR_IN) { 4051 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_in); 4052 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4053 } else { /* CAM_DIR_OUT */ 4054 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, data_out); 4055 cp->phys.header.goalp = cp->phys.header.savep +20 +segments*16; 4056 } 4057 } else { 4058 cp->phys.header.savep = NCB_SCRIPT_PHYS (np, no_data); 4059 cp->phys.header.goalp = cp->phys.header.savep; 4060 } 4061 4062 cp->phys.header.lastp = cp->phys.header.savep; 4063 4064 4065 /*---------------------------------------------------- 4066 ** 4067 ** fill in nccb 4068 ** 4069 **---------------------------------------------------- 4070 ** 4071 ** 4072 ** physical -> virtual backlink 4073 ** Generic SCSI command 4074 */ 4075 cp->phys.header.cp = cp; 4076 /* 4077 ** Startqueue 4078 */ 4079 cp->phys.header.launch.l_paddr = NCB_SCRIPT_PHYS (np, select); 4080 cp->phys.header.launch.l_cmd = SCR_JUMP; 4081 /* 4082 ** select 4083 */ 4084 cp->phys.select.sel_id = ccb->ccb_h.target_id; 4085 cp->phys.select.sel_scntl3 = tp->tinfo.wval; 4086 cp->phys.select.sel_sxfer = tp->tinfo.sval; 4087 /* 4088 ** message 4089 */ 4090 cp->phys.smsg.addr = CCB_PHYS (cp, scsi_smsg); 4091 cp->phys.smsg.size = msglen; 4092 4093 cp->phys.smsg2.addr = CCB_PHYS (cp, scsi_smsg2); 4094 cp->phys.smsg2.size = msglen2; 4095 /* 4096 ** command 4097 */ 4098 /* XXX JGibbs - Support other command types */ 4099 cp->phys.cmd.addr = vtophys (csio->cdb_io.cdb_bytes); 4100 cp->phys.cmd.size = csio->cdb_len; 4101 /* 4102 ** sense command 4103 */ 4104 cp->phys.scmd.addr = CCB_PHYS (cp, sensecmd); 4105 cp->phys.scmd.size = 6; 4106 /* 4107 ** patch requested size into sense command 4108 */ 4109 cp->sensecmd[0] = 0x03; 4110 cp->sensecmd[1] = ccb->ccb_h.target_lun << 5; 4111 cp->sensecmd[4] = sizeof(struct scsi_sense_data); 4112 cp->sensecmd[4] = csio->sense_len; 4113 /* 4114 ** sense data 4115 */ 4116 cp->phys.sense.addr = vtophys (&csio->sense_data); 4117 cp->phys.sense.size = csio->sense_len; 4118 /* 4119 ** status 4120 */ 4121 cp->actualquirks = QUIRK_NOMSG; 4122 cp->host_status = nego ? HS_NEGOTIATE : HS_BUSY; 4123 cp->s_status = SCSI_STATUS_ILLEGAL; 4124 cp->parity_status = 0; 4125 4126 cp->xerr_status = XE_OK; 4127 cp->sync_status = tp->tinfo.sval; 4128 cp->nego_status = nego; 4129 cp->wide_status = tp->tinfo.wval; 4130 4131 /*---------------------------------------------------- 4132 ** 4133 ** Critical region: start this job. 4134 ** 4135 **---------------------------------------------------- 4136 */ 4137 4138 /* 4139 ** reselect pattern and activate this job. 4140 */ 4141 4142 cp->jump_nccb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (cp->tag))); 4143 cp->tlimit = time_second 4144 + ccb->ccb_h.timeout / 1000 + 2; 4145 cp->magic = CCB_MAGIC; 4146 4147 /* 4148 ** insert into start queue. 4149 */ 4150 4151 qidx = np->squeueput + 1; 4152 if (qidx >= MAX_START) 4153 qidx = 0; 4154 np->squeue [qidx ] = NCB_SCRIPT_PHYS (np, idle); 4155 np->squeue [np->squeueput] = CCB_PHYS (cp, phys); 4156 np->squeueput = qidx; 4157 4158 if(DEBUG_FLAGS & DEBUG_QUEUE) 4159 kprintf("%s: queuepos=%d tryoffset=%d.\n", 4160 ncr_name (np), np->squeueput, 4161 (unsigned)(READSCRIPT(startpos[0]) - 4162 (NCB_SCRIPTH_PHYS (np, tryloop)))); 4163 4164 /* 4165 ** Script processor may be waiting for reselect. 4166 ** Wake it up. 4167 */ 4168 OUTB (nc_istat, SIGP); 4169 4170 /* 4171 ** and reenable interrupts 4172 */ 4173 crit_exit(); 4174 break; 4175 } 4176 case XPT_RESET_DEV: /* Bus Device Reset the specified SCSI device */ 4177 case XPT_EN_LUN: /* Enable LUN as a target */ 4178 case XPT_TARGET_IO: /* Execute target I/O request */ 4179 case XPT_ACCEPT_TARGET_IO: /* Accept Host Target Mode CDB */ 4180 case XPT_CONT_TARGET_IO: /* Continue Host Target I/O Connection*/ 4181 case XPT_ABORT: /* Abort the specified CCB */ 4182 /* XXX Implement */ 4183 ccb->ccb_h.status = CAM_REQ_INVALID; 4184 xpt_done(ccb); 4185 break; 4186 case XPT_SET_TRAN_SETTINGS: 4187 { 4188 struct ccb_trans_settings *cts = &ccb->cts; 4189 tcb_p tp; 4190 u_int update_type; 4191 struct ccb_trans_settings_scsi *scsi = 4192 &cts->proto_specific.scsi; 4193 struct ccb_trans_settings_spi *spi = 4194 &cts->xport_specific.spi; 4195 4196 update_type = 0; 4197 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) 4198 update_type |= NCR_TRANS_GOAL; 4199 if (cts->type == CTS_TYPE_USER_SETTINGS) 4200 update_type |= NCR_TRANS_USER; 4201 4202 crit_enter(); 4203 tp = &np->target[ccb->ccb_h.target_id]; 4204 /* Tag and disc enables */ 4205 if ((spi->valid & CTS_SPI_VALID_DISC) != 0) { 4206 if (update_type & NCR_TRANS_GOAL) { 4207 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0) 4208 tp->tinfo.disc_tag |= NCR_CUR_DISCENB; 4209 else 4210 tp->tinfo.disc_tag &= ~NCR_CUR_DISCENB; 4211 } 4212 4213 if (update_type & NCR_TRANS_USER) { 4214 if ((spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0) 4215 tp->tinfo.disc_tag |= NCR_USR_DISCENB; 4216 else 4217 tp->tinfo.disc_tag &= ~NCR_USR_DISCENB; 4218 } 4219 4220 } 4221 4222 if ((scsi->valid & CTS_SCSI_VALID_TQ) != 0) { 4223 if (update_type & NCR_TRANS_GOAL) { 4224 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0) 4225 tp->tinfo.disc_tag |= NCR_CUR_TAGENB; 4226 else 4227 tp->tinfo.disc_tag &= ~NCR_CUR_TAGENB; 4228 } 4229 4230 if (update_type & NCR_TRANS_USER) { 4231 if ((scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0) 4232 tp->tinfo.disc_tag |= NCR_USR_TAGENB; 4233 else 4234 tp->tinfo.disc_tag &= ~NCR_USR_TAGENB; 4235 } 4236 } 4237 4238 /* Filter bus width and sync negotiation settings */ 4239 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) { 4240 if (spi->bus_width > np->maxwide) 4241 spi->bus_width = np->maxwide; 4242 } 4243 4244 if (((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4245 || ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)) { 4246 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) { 4247 if (spi->sync_period != 0 4248 && (spi->sync_period < np->minsync)) 4249 spi->sync_period = np->minsync; 4250 } 4251 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) { 4252 if (spi->sync_offset == 0) 4253 spi->sync_period = 0; 4254 if (spi->sync_offset > np->maxoffs) 4255 spi->sync_offset = np->maxoffs; 4256 } 4257 } 4258 if ((update_type & NCR_TRANS_USER) != 0) { 4259 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4260 tp->tinfo.user.period = spi->sync_period; 4261 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) 4262 tp->tinfo.user.offset = spi->sync_offset; 4263 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) 4264 tp->tinfo.user.width = spi->bus_width; 4265 } 4266 if ((update_type & NCR_TRANS_GOAL) != 0) { 4267 if ((spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0) 4268 tp->tinfo.goal.period = spi->sync_period; 4269 4270 if ((spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0) 4271 tp->tinfo.goal.offset = spi->sync_offset; 4272 4273 if ((spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0) 4274 tp->tinfo.goal.width = spi->bus_width; 4275 } 4276 crit_exit(); 4277 ccb->ccb_h.status = CAM_REQ_CMP; 4278 xpt_done(ccb); 4279 break; 4280 } 4281 case XPT_GET_TRAN_SETTINGS: 4282 /* Get default/user set transfer settings for the target */ 4283 { 4284 struct ccb_trans_settings *cts = &ccb->cts; 4285 struct ncr_transinfo *tinfo; 4286 tcb_p tp = &np->target[ccb->ccb_h.target_id]; 4287 struct ccb_trans_settings_scsi *scsi = 4288 &cts->proto_specific.scsi; 4289 struct ccb_trans_settings_spi *spi = 4290 &cts->xport_specific.spi; 4291 4292 cts->protocol = PROTO_SCSI; 4293 cts->protocol_version = SCSI_REV_2; 4294 cts->transport = XPORT_SPI; 4295 cts->transport_version = 2; 4296 4297 crit_enter(); 4298 if (cts->type == CTS_TYPE_CURRENT_SETTINGS) { 4299 tinfo = &tp->tinfo.current; 4300 if (tp->tinfo.disc_tag & NCR_CUR_DISCENB) 4301 spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 4302 else 4303 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB; 4304 4305 if (tp->tinfo.disc_tag & NCR_CUR_TAGENB) 4306 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 4307 else 4308 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB; 4309 } else { 4310 tinfo = &tp->tinfo.user; 4311 if (tp->tinfo.disc_tag & NCR_USR_DISCENB) 4312 spi->flags |= CTS_SPI_FLAGS_DISC_ENB; 4313 else 4314 spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB; 4315 4316 if (tp->tinfo.disc_tag & NCR_USR_TAGENB) 4317 scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB; 4318 else 4319 scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB; 4320 } 4321 4322 spi->sync_period = tinfo->period; 4323 spi->sync_offset = tinfo->offset; 4324 spi->bus_width = tinfo->width; 4325 4326 crit_exit(); 4327 spi->valid = CTS_SPI_VALID_SYNC_RATE 4328 | CTS_SPI_VALID_SYNC_OFFSET 4329 | CTS_SPI_VALID_BUS_WIDTH 4330 | CTS_SPI_VALID_DISC; 4331 scsi->valid = CTS_SCSI_VALID_TQ; 4332 4333 ccb->ccb_h.status = CAM_REQ_CMP; 4334 xpt_done(ccb); 4335 break; 4336 } 4337 case XPT_CALC_GEOMETRY: 4338 { 4339 struct ccb_calc_geometry *ccg; 4340 u_int32_t size_mb; 4341 u_int32_t secs_per_cylinder; 4342 int extended; 4343 4344 /* XXX JGibbs - I'm sure the NCR uses a different strategy, 4345 * but it should be able to deal with Adaptec 4346 * geometry too. 4347 */ 4348 extended = 1; 4349 ccg = &ccb->ccg; 4350 size_mb = ccg->volume_size 4351 / ((1024L * 1024L) / ccg->block_size); 4352 4353 if (size_mb > 1024 && extended) { 4354 ccg->heads = 255; 4355 ccg->secs_per_track = 63; 4356 } else { 4357 ccg->heads = 64; 4358 ccg->secs_per_track = 32; 4359 } 4360 secs_per_cylinder = ccg->heads * ccg->secs_per_track; 4361 ccg->cylinders = ccg->volume_size / secs_per_cylinder; 4362 ccb->ccb_h.status = CAM_REQ_CMP; 4363 xpt_done(ccb); 4364 break; 4365 } 4366 case XPT_RESET_BUS: /* Reset the specified SCSI bus */ 4367 { 4368 OUTB (nc_scntl1, CRST); 4369 ccb->ccb_h.status = CAM_REQ_CMP; 4370 DELAY(10000); /* Wait until our interrupt handler sees it */ 4371 xpt_done(ccb); 4372 break; 4373 } 4374 case XPT_TERM_IO: /* Terminate the I/O process */ 4375 /* XXX Implement */ 4376 ccb->ccb_h.status = CAM_REQ_INVALID; 4377 xpt_done(ccb); 4378 break; 4379 case XPT_PATH_INQ: /* Path routing inquiry */ 4380 { 4381 struct ccb_pathinq *cpi = &ccb->cpi; 4382 4383 cpi->version_num = 1; /* XXX??? */ 4384 cpi->hba_inquiry = PI_SDTR_ABLE|PI_TAG_ABLE; 4385 if ((np->features & FE_WIDE) != 0) 4386 cpi->hba_inquiry |= PI_WIDE_16; 4387 cpi->target_sprt = 0; 4388 cpi->hba_misc = 0; 4389 cpi->hba_eng_cnt = 0; 4390 cpi->max_target = (np->features & FE_WIDE) ? 15 : 7; 4391 cpi->max_lun = MAX_LUN - 1; 4392 cpi->initiator_id = np->myaddr; 4393 cpi->bus_id = cam_sim_bus(sim); 4394 cpi->base_transfer_speed = 3300; 4395 strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN); 4396 strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN); 4397 strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN); 4398 cpi->unit_number = cam_sim_unit(sim); 4399 cpi->transport = XPORT_SPI; 4400 cpi->transport_version = 2; 4401 cpi->protocol = PROTO_SCSI; 4402 cpi->protocol_version = SCSI_REV_2; 4403 cpi->ccb_h.status = CAM_REQ_CMP; 4404 xpt_done(ccb); 4405 break; 4406 } 4407 default: 4408 ccb->ccb_h.status = CAM_REQ_INVALID; 4409 xpt_done(ccb); 4410 break; 4411 } 4412 } 4413 4414 /*========================================================== 4415 ** 4416 ** 4417 ** Complete execution of a SCSI command. 4418 ** Signal completion to the generic SCSI driver. 4419 ** 4420 ** 4421 **========================================================== 4422 */ 4423 4424 void 4425 ncr_complete (ncb_p np, nccb_p cp) 4426 { 4427 union ccb *ccb; 4428 tcb_p tp; 4429 lcb_p lp; 4430 4431 /* 4432 ** Sanity check 4433 */ 4434 4435 if (!cp || (cp->magic!=CCB_MAGIC) || !cp->ccb) return; 4436 cp->magic = 1; 4437 cp->tlimit= 0; 4438 4439 /* 4440 ** No Reselect anymore. 4441 */ 4442 cp->jump_nccb.l_cmd = (SCR_JUMP); 4443 4444 /* 4445 ** No starting. 4446 */ 4447 cp->phys.header.launch.l_paddr= NCB_SCRIPT_PHYS (np, idle); 4448 4449 /* 4450 ** timestamp 4451 */ 4452 ncb_profile (np, cp); 4453 4454 if (DEBUG_FLAGS & DEBUG_TINY) 4455 kprintf ("CCB=%x STAT=%x/%x\n", (int)(intptr_t)cp & 0xfff, 4456 cp->host_status,cp->s_status); 4457 4458 ccb = cp->ccb; 4459 cp->ccb = NULL; 4460 tp = &np->target[ccb->ccb_h.target_id]; 4461 lp = tp->lp[ccb->ccb_h.target_lun]; 4462 4463 /* 4464 ** We do not queue more than 1 nccb per target 4465 ** with negotiation at any time. If this nccb was 4466 ** used for negotiation, clear this info in the tcb. 4467 */ 4468 4469 if (cp == tp->nego_cp) 4470 tp->nego_cp = NULL; 4471 4472 /* 4473 ** Check for parity errors. 4474 */ 4475 /* XXX JGibbs - What about reporting them??? */ 4476 4477 if (cp->parity_status) { 4478 PRINT_ADDR(ccb); 4479 kprintf ("%d parity error(s), fallback.\n", cp->parity_status); 4480 /* 4481 ** fallback to asynch transfer. 4482 */ 4483 tp->tinfo.goal.period = 0; 4484 tp->tinfo.goal.offset = 0; 4485 }; 4486 4487 /* 4488 ** Check for extended errors. 4489 */ 4490 4491 if (cp->xerr_status != XE_OK) { 4492 PRINT_ADDR(ccb); 4493 switch (cp->xerr_status) { 4494 case XE_EXTRA_DATA: 4495 kprintf ("extraneous data discarded.\n"); 4496 break; 4497 case XE_BAD_PHASE: 4498 kprintf ("illegal scsi phase (4/5).\n"); 4499 break; 4500 default: 4501 kprintf ("extended error %d.\n", cp->xerr_status); 4502 break; 4503 }; 4504 if (cp->host_status==HS_COMPLETE) 4505 cp->host_status = HS_FAIL; 4506 }; 4507 4508 /* 4509 ** Check the status. 4510 */ 4511 if (cp->host_status == HS_COMPLETE) { 4512 4513 if (cp->s_status == SCSI_STATUS_OK) { 4514 4515 /* 4516 ** All went well. 4517 */ 4518 /* XXX JGibbs - Properly calculate residual */ 4519 4520 tp->bytes += ccb->csio.dxfer_len; 4521 tp->transfers ++; 4522 4523 ccb->ccb_h.status = CAM_REQ_CMP; 4524 } else if ((cp->s_status & SCSI_STATUS_SENSE) != 0) { 4525 4526 /* 4527 * XXX Could be TERMIO too. Should record 4528 * original status. 4529 */ 4530 ccb->csio.scsi_status = SCSI_STATUS_CHECK_COND; 4531 cp->s_status &= ~SCSI_STATUS_SENSE; 4532 if (cp->s_status == SCSI_STATUS_OK) { 4533 ccb->ccb_h.status = 4534 CAM_AUTOSNS_VALID|CAM_SCSI_STATUS_ERROR; 4535 } else { 4536 ccb->ccb_h.status = CAM_AUTOSENSE_FAIL; 4537 } 4538 } else { 4539 ccb->ccb_h.status = CAM_SCSI_STATUS_ERROR; 4540 ccb->csio.scsi_status = cp->s_status; 4541 } 4542 4543 4544 } else if (cp->host_status == HS_SEL_TIMEOUT) { 4545 4546 /* 4547 ** Device failed selection 4548 */ 4549 ccb->ccb_h.status = CAM_SEL_TIMEOUT; 4550 4551 } else if (cp->host_status == HS_TIMEOUT) { 4552 4553 /* 4554 ** No response 4555 */ 4556 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 4557 } else if (cp->host_status == HS_STALL) { 4558 ccb->ccb_h.status = CAM_REQUEUE_REQ; 4559 } else { 4560 4561 /* 4562 ** Other protocol messes 4563 */ 4564 PRINT_ADDR(ccb); 4565 kprintf ("COMMAND FAILED (%x %x) @%p.\n", 4566 cp->host_status, cp->s_status, cp); 4567 4568 ccb->ccb_h.status = CAM_CMD_TIMEOUT; 4569 } 4570 4571 if ((ccb->ccb_h.status & CAM_STATUS_MASK) != CAM_REQ_CMP) { 4572 xpt_freeze_devq(ccb->ccb_h.path, /*count*/1); 4573 ccb->ccb_h.status |= CAM_DEV_QFRZN; 4574 } 4575 4576 /* 4577 ** Free this nccb 4578 */ 4579 ncr_free_nccb (np, cp); 4580 4581 /* 4582 ** signal completion to generic driver. 4583 */ 4584 xpt_done (ccb); 4585 } 4586 4587 /*========================================================== 4588 ** 4589 ** 4590 ** Signal all (or one) control block done. 4591 ** 4592 ** 4593 **========================================================== 4594 */ 4595 4596 void 4597 ncr_wakeup (ncb_p np, u_long code) 4598 { 4599 /* 4600 ** Starting at the default nccb and following 4601 ** the links, complete all jobs with a 4602 ** host_status greater than "disconnect". 4603 ** 4604 ** If the "code" parameter is not zero, 4605 ** complete all jobs that are not IDLE. 4606 */ 4607 4608 nccb_p cp = np->link_nccb; 4609 while (cp) { 4610 switch (cp->host_status) { 4611 4612 case HS_IDLE: 4613 break; 4614 4615 case HS_DISCONNECT: 4616 if(DEBUG_FLAGS & DEBUG_TINY) kprintf ("D"); 4617 /* fall through */ 4618 4619 case HS_BUSY: 4620 case HS_NEGOTIATE: 4621 if (!code) break; 4622 cp->host_status = code; 4623 4624 /* fall through */ 4625 4626 default: 4627 ncr_complete (np, cp); 4628 break; 4629 }; 4630 cp = cp -> link_nccb; 4631 }; 4632 } 4633 4634 static void 4635 ncr_freeze_devq (ncb_p np, struct cam_path *path) 4636 { 4637 nccb_p cp; 4638 int i; 4639 int count; 4640 int firstskip; 4641 /* 4642 ** Starting at the first nccb and following 4643 ** the links, complete all jobs that match 4644 ** the passed in path and are in the start queue. 4645 */ 4646 4647 cp = np->link_nccb; 4648 count = 0; 4649 firstskip = 0; 4650 while (cp) { 4651 switch (cp->host_status) { 4652 4653 case HS_BUSY: 4654 case HS_NEGOTIATE: 4655 if ((cp->phys.header.launch.l_paddr 4656 == NCB_SCRIPT_PHYS (np, select)) 4657 && (xpt_path_comp(path, cp->ccb->ccb_h.path) >= 0)) { 4658 4659 /* Mark for removal from the start queue */ 4660 for (i = 1; i < MAX_START; i++) { 4661 int idx; 4662 4663 idx = np->squeueput - i; 4664 4665 if (idx < 0) 4666 idx = MAX_START + idx; 4667 if (np->squeue[idx] 4668 == CCB_PHYS(cp, phys)) { 4669 np->squeue[idx] = 4670 NCB_SCRIPT_PHYS (np, skip); 4671 if (i > firstskip) 4672 firstskip = i; 4673 break; 4674 } 4675 } 4676 cp->host_status=HS_STALL; 4677 ncr_complete (np, cp); 4678 count++; 4679 } 4680 break; 4681 default: 4682 break; 4683 } 4684 cp = cp->link_nccb; 4685 } 4686 4687 if (count > 0) { 4688 int j; 4689 int bidx; 4690 4691 /* Compress the start queue */ 4692 j = 0; 4693 bidx = np->squeueput; 4694 i = np->squeueput - firstskip; 4695 if (i < 0) 4696 i = MAX_START + i; 4697 for (;;) { 4698 4699 bidx = i - j; 4700 if (bidx < 0) 4701 bidx = MAX_START + bidx; 4702 4703 if (np->squeue[i] == NCB_SCRIPT_PHYS (np, skip)) { 4704 j++; 4705 } else if (j != 0) { 4706 np->squeue[bidx] = np->squeue[i]; 4707 if (np->squeue[bidx] 4708 == NCB_SCRIPT_PHYS(np, idle)) 4709 break; 4710 } 4711 i = (i + 1) % MAX_START; 4712 } 4713 np->squeueput = bidx; 4714 } 4715 } 4716 4717 /*========================================================== 4718 ** 4719 ** 4720 ** Start NCR chip. 4721 ** 4722 ** 4723 **========================================================== 4724 */ 4725 4726 void 4727 ncr_init(ncb_p np, char * msg, u_long code) 4728 { 4729 int i; 4730 4731 /* 4732 ** Reset chip. 4733 */ 4734 4735 OUTB (nc_istat, SRST); 4736 DELAY (1000); 4737 OUTB (nc_istat, 0); 4738 4739 /* 4740 ** Message. 4741 */ 4742 4743 if (msg) kprintf ("%s: restart (%s).\n", ncr_name (np), msg); 4744 4745 /* 4746 ** Clear Start Queue 4747 */ 4748 4749 for (i=0;i<MAX_START;i++) 4750 np -> squeue [i] = NCB_SCRIPT_PHYS (np, idle); 4751 4752 /* 4753 ** Start at first entry. 4754 */ 4755 4756 np->squeueput = 0; 4757 WRITESCRIPT(startpos[0], NCB_SCRIPTH_PHYS (np, tryloop)); 4758 WRITESCRIPT(start0 [0], SCR_INT ^ IFFALSE (0)); 4759 4760 /* 4761 ** Wakeup all pending jobs. 4762 */ 4763 4764 ncr_wakeup (np, code); 4765 4766 /* 4767 ** Init chip. 4768 */ 4769 4770 OUTB (nc_istat, 0x00 ); /* Remove Reset, abort ... */ 4771 OUTB (nc_scntl0, 0xca ); /* full arb., ena parity, par->ATN */ 4772 OUTB (nc_scntl1, 0x00 ); /* odd parity, and remove CRST!! */ 4773 ncr_selectclock(np, np->rv_scntl3); /* Select SCSI clock */ 4774 OUTB (nc_scid , RRE|np->myaddr);/* host adapter SCSI address */ 4775 OUTW (nc_respid, 1ul<<np->myaddr);/* id to respond to */ 4776 OUTB (nc_istat , SIGP ); /* Signal Process */ 4777 OUTB (nc_dmode , np->rv_dmode); /* XXX modify burstlen ??? */ 4778 OUTB (nc_dcntl , np->rv_dcntl); 4779 OUTB (nc_ctest3, np->rv_ctest3); 4780 OUTB (nc_ctest5, np->rv_ctest5); 4781 OUTB (nc_ctest4, np->rv_ctest4);/* enable master parity checking */ 4782 OUTB (nc_stest2, np->rv_stest2|EXT); /* Extended Sreq/Sack filtering */ 4783 OUTB (nc_stest3, TE ); /* TolerANT enable */ 4784 OUTB (nc_stime0, 0x0b ); /* HTH = disabled, STO = 0.1 sec. */ 4785 4786 if (bootverbose >= 2) { 4787 kprintf ("\tACTUAL values:SCNTL3:%02x DMODE:%02x DCNTL:%02x\n", 4788 np->rv_scntl3, np->rv_dmode, np->rv_dcntl); 4789 kprintf ("\t CTEST3:%02x CTEST4:%02x CTEST5:%02x\n", 4790 np->rv_ctest3, np->rv_ctest4, np->rv_ctest5); 4791 } 4792 4793 /* 4794 ** Enable GPIO0 pin for writing if LED support. 4795 */ 4796 4797 if (np->features & FE_LED0) { 4798 OUTOFFB (nc_gpcntl, 0x01); 4799 } 4800 4801 /* 4802 ** Fill in target structure. 4803 */ 4804 for (i=0;i<MAX_TARGET;i++) { 4805 tcb_p tp = &np->target[i]; 4806 4807 tp->tinfo.sval = 0; 4808 tp->tinfo.wval = np->rv_scntl3; 4809 4810 tp->tinfo.current.period = 0; 4811 tp->tinfo.current.offset = 0; 4812 tp->tinfo.current.width = MSG_EXT_WDTR_BUS_8_BIT; 4813 } 4814 4815 /* 4816 ** enable ints 4817 */ 4818 4819 OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST); 4820 OUTB (nc_dien , MDPE|BF|ABRT|SSI|SIR|IID); 4821 4822 /* 4823 ** Start script processor. 4824 */ 4825 4826 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 4827 4828 /* 4829 * Notify the XPT of the event 4830 */ 4831 if (code == HS_RESET) 4832 xpt_async(AC_BUS_RESET, np->path, NULL); 4833 } 4834 4835 static void 4836 ncr_poll(struct cam_sim *sim) 4837 { 4838 ncr_intr(cam_sim_softc(sim)); 4839 } 4840 4841 4842 /*========================================================== 4843 ** 4844 ** Get clock factor and sync divisor for a given 4845 ** synchronous factor period. 4846 ** Returns the clock factor (in sxfer) and scntl3 4847 ** synchronous divisor field. 4848 ** 4849 **========================================================== 4850 */ 4851 4852 static void ncr_getsync(ncb_p np, u_char sfac, u_char *fakp, u_char *scntl3p) 4853 { 4854 u_long clk = np->clock_khz; /* SCSI clock frequency in kHz */ 4855 int div = np->clock_divn; /* Number of divisors supported */ 4856 u_long fak; /* Sync factor in sxfer */ 4857 u_long per; /* Period in tenths of ns */ 4858 u_long kpc; /* (per * clk) */ 4859 4860 /* 4861 ** Compute the synchronous period in tenths of nano-seconds 4862 */ 4863 if (sfac <= 10) per = 250; 4864 else if (sfac == 11) per = 303; 4865 else if (sfac == 12) per = 500; 4866 else per = 40 * sfac; 4867 4868 /* 4869 ** Look for the greatest clock divisor that allows an 4870 ** input speed faster than the period. 4871 */ 4872 kpc = per * clk; 4873 while (--div >= 0) 4874 if (kpc >= (div_10M[div] * 4)) break; 4875 4876 /* 4877 ** Calculate the lowest clock factor that allows an output 4878 ** speed not faster than the period. 4879 */ 4880 fak = (kpc - 1) / div_10M[div] + 1; 4881 4882 #if 0 /* You can #if 1 if you think this optimization is useful */ 4883 4884 per = (fak * div_10M[div]) / clk; 4885 4886 /* 4887 ** Why not to try the immediate lower divisor and to choose 4888 ** the one that allows the fastest output speed ? 4889 ** We dont want input speed too much greater than output speed. 4890 */ 4891 if (div >= 1 && fak < 6) { 4892 u_long fak2, per2; 4893 fak2 = (kpc - 1) / div_10M[div-1] + 1; 4894 per2 = (fak2 * div_10M[div-1]) / clk; 4895 if (per2 < per && fak2 <= 6) { 4896 fak = fak2; 4897 per = per2; 4898 --div; 4899 } 4900 } 4901 #endif 4902 4903 if (fak < 4) fak = 4; /* Should never happen, too bad ... */ 4904 4905 /* 4906 ** Compute and return sync parameters for the ncr 4907 */ 4908 *fakp = fak - 4; 4909 *scntl3p = ((div+1) << 4) + (sfac < 25 ? 0x80 : 0); 4910 } 4911 4912 /*========================================================== 4913 ** 4914 ** Switch sync mode for current job and its target 4915 ** 4916 **========================================================== 4917 */ 4918 4919 static void 4920 ncr_setsync(ncb_p np, nccb_p cp, u_char scntl3, u_char sxfer, u_char period) 4921 { 4922 union ccb *ccb; 4923 struct ccb_trans_settings neg; 4924 tcb_p tp; 4925 int div; 4926 u_int target = INB (nc_sdid) & 0x0f; 4927 u_int period_10ns; 4928 4929 assert (cp); 4930 if (!cp) return; 4931 4932 ccb = cp->ccb; 4933 assert (ccb); 4934 if (!ccb) return; 4935 assert (target == ccb->ccb_h.target_id); 4936 4937 tp = &np->target[target]; 4938 4939 if (!scntl3 || !(sxfer & 0x1f)) 4940 scntl3 = np->rv_scntl3; 4941 scntl3 = (scntl3 & 0xf0) | (tp->tinfo.wval & EWS) 4942 | (np->rv_scntl3 & 0x07); 4943 4944 /* 4945 ** Deduce the value of controller sync period from scntl3. 4946 ** period is in tenths of nano-seconds. 4947 */ 4948 4949 div = ((scntl3 >> 4) & 0x7); 4950 if ((sxfer & 0x1f) && div) 4951 period_10ns = 4952 (((sxfer>>5)+4)*div_10M[div-1])/np->clock_khz; 4953 else 4954 period_10ns = 0; 4955 4956 tp->tinfo.goal.period = period; 4957 tp->tinfo.goal.offset = sxfer & 0x1f; 4958 tp->tinfo.current.period = period; 4959 tp->tinfo.current.offset = sxfer & 0x1f; 4960 4961 /* 4962 ** Stop there if sync parameters are unchanged 4963 */ 4964 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return; 4965 tp->tinfo.sval = sxfer; 4966 tp->tinfo.wval = scntl3; 4967 4968 if (sxfer & 0x1f) { 4969 /* 4970 ** Disable extended Sreq/Sack filtering 4971 */ 4972 if (period_10ns <= 2000) OUTOFFB (nc_stest2, EXT); 4973 } 4974 4975 /* 4976 ** Tell the SCSI layer about the 4977 ** new transfer parameters. 4978 */ 4979 memset(&neg, 0, sizeof (neg)); 4980 neg.protocol = PROTO_SCSI; 4981 neg.protocol_version = SCSI_REV_2; 4982 neg.transport = XPORT_SPI; 4983 neg.transport_version = 2; 4984 neg.xport_specific.spi.sync_period = period; 4985 neg.xport_specific.spi.sync_offset = sxfer & 0x1f; 4986 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE 4987 | CTS_SPI_VALID_SYNC_OFFSET; 4988 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, 4989 /*priority*/1); 4990 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg); 4991 4992 /* 4993 ** set actual value and sync_status 4994 */ 4995 OUTB (nc_sxfer, sxfer); 4996 np->sync_st = sxfer; 4997 OUTB (nc_scntl3, scntl3); 4998 np->wide_st = scntl3; 4999 5000 /* 5001 ** patch ALL nccbs of this target. 5002 */ 5003 for (cp = np->link_nccb; cp; cp = cp->link_nccb) { 5004 if (!cp->ccb) continue; 5005 if (cp->ccb->ccb_h.target_id != target) continue; 5006 cp->sync_status = sxfer; 5007 cp->wide_status = scntl3; 5008 }; 5009 } 5010 5011 /*========================================================== 5012 ** 5013 ** Switch wide mode for current job and its target 5014 ** SCSI specs say: a SCSI device that accepts a WDTR 5015 ** message shall reset the synchronous agreement to 5016 ** asynchronous mode. 5017 ** 5018 **========================================================== 5019 */ 5020 5021 static void ncr_setwide (ncb_p np, nccb_p cp, u_char wide, u_char ack) 5022 { 5023 union ccb *ccb; 5024 struct ccb_trans_settings neg; 5025 u_int target = INB (nc_sdid) & 0x0f; 5026 tcb_p tp; 5027 u_char scntl3; 5028 u_char sxfer; 5029 5030 assert (cp); 5031 if (!cp) return; 5032 5033 ccb = cp->ccb; 5034 assert (ccb); 5035 if (!ccb) return; 5036 assert (target == ccb->ccb_h.target_id); 5037 5038 tp = &np->target[target]; 5039 tp->tinfo.current.width = wide; 5040 tp->tinfo.goal.width = wide; 5041 tp->tinfo.current.period = 0; 5042 tp->tinfo.current.offset = 0; 5043 5044 scntl3 = (tp->tinfo.wval & (~EWS)) | (wide ? EWS : 0); 5045 5046 sxfer = ack ? 0 : tp->tinfo.sval; 5047 5048 /* 5049 ** Stop there if sync/wide parameters are unchanged 5050 */ 5051 if (tp->tinfo.sval == sxfer && tp->tinfo.wval == scntl3) return; 5052 tp->tinfo.sval = sxfer; 5053 tp->tinfo.wval = scntl3; 5054 5055 /* Tell the SCSI layer about the new transfer params */ 5056 memset(&neg, 0, sizeof (neg)); 5057 neg.protocol = PROTO_SCSI; 5058 neg.protocol_version = SCSI_REV_2; 5059 neg.transport = XPORT_SPI; 5060 neg.transport_version = 2; 5061 neg.xport_specific.spi.bus_width = (scntl3 & EWS) ? 5062 MSG_EXT_WDTR_BUS_16_BIT : MSG_EXT_WDTR_BUS_8_BIT; 5063 neg.xport_specific.spi.sync_period = 0; 5064 neg.xport_specific.spi.sync_offset = 0; 5065 neg.xport_specific.spi.valid = CTS_SPI_VALID_SYNC_RATE 5066 | CTS_SPI_VALID_SYNC_OFFSET 5067 | CTS_SPI_VALID_BUS_WIDTH; 5068 xpt_setup_ccb(&neg.ccb_h, ccb->ccb_h.path, /*priority*/1); 5069 xpt_async(AC_TRANSFER_NEG, ccb->ccb_h.path, &neg); 5070 5071 /* 5072 ** set actual value and sync_status 5073 */ 5074 OUTB (nc_sxfer, sxfer); 5075 np->sync_st = sxfer; 5076 OUTB (nc_scntl3, scntl3); 5077 np->wide_st = scntl3; 5078 5079 /* 5080 ** patch ALL nccbs of this target. 5081 */ 5082 for (cp = np->link_nccb; cp; cp = cp->link_nccb) { 5083 if (!cp->ccb) continue; 5084 if (cp->ccb->ccb_h.target_id != target) continue; 5085 cp->sync_status = sxfer; 5086 cp->wide_status = scntl3; 5087 }; 5088 } 5089 5090 /*========================================================== 5091 ** 5092 ** 5093 ** ncr timeout handler. 5094 ** 5095 ** 5096 **========================================================== 5097 ** 5098 ** Misused to keep the driver running when 5099 ** interrupts are not configured correctly. 5100 ** 5101 **---------------------------------------------------------- 5102 */ 5103 5104 static void 5105 ncr_timeout (void *arg) 5106 { 5107 ncb_p np = arg; 5108 time_t thistime = time_second; 5109 ticks_t step = np->ticks; 5110 u_long count = 0; 5111 long signed t; 5112 nccb_p cp; 5113 5114 if (np->lasttime != thistime) { 5115 /* 5116 ** block ncr interrupts 5117 */ 5118 crit_enter(); 5119 np->lasttime = thistime; 5120 5121 /*---------------------------------------------------- 5122 ** 5123 ** handle ncr chip timeouts 5124 ** 5125 ** Assumption: 5126 ** We have a chance to arbitrate for the 5127 ** SCSI bus at least every 10 seconds. 5128 ** 5129 **---------------------------------------------------- 5130 */ 5131 5132 t = thistime - np->heartbeat; 5133 5134 if (t<2) np->latetime=0; else np->latetime++; 5135 5136 if (np->latetime>2) { 5137 /* 5138 ** If there are no requests, the script 5139 ** processor will sleep on SEL_WAIT_RESEL. 5140 ** But we have to check whether it died. 5141 ** Let's try to wake it up. 5142 */ 5143 OUTB (nc_istat, SIGP); 5144 }; 5145 5146 /*---------------------------------------------------- 5147 ** 5148 ** handle nccb timeouts 5149 ** 5150 **---------------------------------------------------- 5151 */ 5152 5153 for (cp=np->link_nccb; cp; cp=cp->link_nccb) { 5154 /* 5155 ** look for timed out nccbs. 5156 */ 5157 if (!cp->host_status) continue; 5158 count++; 5159 if (cp->tlimit > thistime) continue; 5160 5161 /* 5162 ** Disable reselect. 5163 ** Remove it from startqueue. 5164 */ 5165 cp->jump_nccb.l_cmd = (SCR_JUMP); 5166 if (cp->phys.header.launch.l_paddr == 5167 NCB_SCRIPT_PHYS (np, select)) { 5168 kprintf ("%s: timeout nccb=%p (skip)\n", 5169 ncr_name (np), cp); 5170 cp->phys.header.launch.l_paddr 5171 = NCB_SCRIPT_PHYS (np, skip); 5172 }; 5173 5174 switch (cp->host_status) { 5175 5176 case HS_BUSY: 5177 case HS_NEGOTIATE: 5178 /* fall through */ 5179 case HS_DISCONNECT: 5180 cp->host_status=HS_TIMEOUT; 5181 }; 5182 cp->tag = 0; 5183 5184 /* 5185 ** wakeup this nccb. 5186 */ 5187 ncr_complete (np, cp); 5188 }; 5189 crit_exit(); 5190 } 5191 5192 callout_reset(&np->timeout_ch, step ? step : 1, ncr_timeout, np); 5193 5194 if (INB(nc_istat) & (INTF|SIP|DIP)) { 5195 5196 /* 5197 ** Process pending interrupts. 5198 */ 5199 5200 crit_enter(); 5201 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("{"); 5202 ncr_exception (np); 5203 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("}"); 5204 crit_exit(); 5205 }; 5206 } 5207 5208 /*========================================================== 5209 ** 5210 ** log message for real hard errors 5211 ** 5212 ** "ncr0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc)." 5213 ** " reg: r0 r1 r2 r3 r4 r5 r6 ..... rf." 5214 ** 5215 ** exception register: 5216 ** ds: dstat 5217 ** si: sist 5218 ** 5219 ** SCSI bus lines: 5220 ** so: control lines as driver by NCR. 5221 ** si: control lines as seen by NCR. 5222 ** sd: scsi data lines as seen by NCR. 5223 ** 5224 ** wide/fastmode: 5225 ** sxfer: (see the manual) 5226 ** scntl3: (see the manual) 5227 ** 5228 ** current script command: 5229 ** dsp: script adress (relative to start of script). 5230 ** dbc: first word of script command. 5231 ** 5232 ** First 16 register of the chip: 5233 ** r0..rf 5234 ** 5235 **========================================================== 5236 */ 5237 5238 static void ncr_log_hard_error(ncb_p np, u_short sist, u_char dstat) 5239 { 5240 u_int32_t dsp; 5241 int script_ofs; 5242 int script_size; 5243 char *script_name; 5244 u_char *script_base; 5245 int i; 5246 5247 dsp = INL (nc_dsp); 5248 5249 if (np->p_script < dsp && 5250 dsp <= np->p_script + sizeof(struct script)) { 5251 script_ofs = dsp - np->p_script; 5252 script_size = sizeof(struct script); 5253 script_base = (u_char *) np->script; 5254 script_name = "script"; 5255 } 5256 else if (np->p_scripth < dsp && 5257 dsp <= np->p_scripth + sizeof(struct scripth)) { 5258 script_ofs = dsp - np->p_scripth; 5259 script_size = sizeof(struct scripth); 5260 script_base = (u_char *) np->scripth; 5261 script_name = "scripth"; 5262 } else { 5263 script_ofs = dsp; 5264 script_size = 0; 5265 script_base = 0; 5266 script_name = "mem"; 5267 } 5268 5269 kprintf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n", 5270 ncr_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist, 5271 (unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl), (unsigned)INB (nc_sbdl), 5272 (unsigned)INB (nc_sxfer),(unsigned)INB (nc_scntl3), script_name, script_ofs, 5273 (unsigned)INL (nc_dbc)); 5274 5275 if (((script_ofs & 3) == 0) && 5276 (unsigned)script_ofs < script_size) { 5277 kprintf ("%s: script cmd = %08x\n", ncr_name(np), 5278 (int)READSCRIPT_OFF(script_base, script_ofs)); 5279 } 5280 5281 kprintf ("%s: regdump:", ncr_name(np)); 5282 for (i=0; i<16;i++) 5283 kprintf (" %02x", (unsigned)INB_OFF(i)); 5284 kprintf (".\n"); 5285 } 5286 5287 /*========================================================== 5288 ** 5289 ** 5290 ** ncr chip exception handler. 5291 ** 5292 ** 5293 **========================================================== 5294 */ 5295 5296 void ncr_exception (ncb_p np) 5297 { 5298 u_char istat, dstat; 5299 u_short sist; 5300 5301 /* 5302 ** interrupt on the fly ? 5303 */ 5304 while ((istat = INB (nc_istat)) & INTF) { 5305 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("F "); 5306 OUTB (nc_istat, INTF); 5307 np->profile.num_fly++; 5308 ncr_wakeup (np, 0); 5309 }; 5310 if (!(istat & (SIP|DIP))) { 5311 return; 5312 } 5313 5314 /* 5315 ** Steinbach's Guideline for Systems Programming: 5316 ** Never test for an error condition you don't know how to handle. 5317 */ 5318 5319 sist = (istat & SIP) ? INW (nc_sist) : 0; 5320 dstat = (istat & DIP) ? INB (nc_dstat) : 0; 5321 np->profile.num_int++; 5322 5323 if (DEBUG_FLAGS & DEBUG_TINY) 5324 kprintf ("<%d|%x:%x|%x:%x>", 5325 INB(nc_scr0), 5326 dstat,sist, 5327 (unsigned)INL(nc_dsp), 5328 (unsigned)INL(nc_dbc)); 5329 if ((dstat==DFE) && (sist==PAR)) return; 5330 5331 /*========================================================== 5332 ** 5333 ** First the normal cases. 5334 ** 5335 **========================================================== 5336 */ 5337 /*------------------------------------------- 5338 ** SCSI reset 5339 **------------------------------------------- 5340 */ 5341 5342 if (sist & RST) { 5343 ncr_init (np, bootverbose ? "scsi reset" : NULL, HS_RESET); 5344 return; 5345 }; 5346 5347 /*------------------------------------------- 5348 ** selection timeout 5349 ** 5350 ** IID excluded from dstat mask! 5351 ** (chip bug) 5352 **------------------------------------------- 5353 */ 5354 5355 if ((sist & STO) && 5356 !(sist & (GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5357 !(dstat & (MDPE|BF|ABRT|SIR))) { 5358 ncr_int_sto (np); 5359 return; 5360 }; 5361 5362 /*------------------------------------------- 5363 ** Phase mismatch. 5364 **------------------------------------------- 5365 */ 5366 5367 if ((sist & MA) && 5368 !(sist & (STO|GEN|HTH|SGE|UDC|RST|PAR)) && 5369 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5370 ncr_int_ma (np, dstat); 5371 return; 5372 }; 5373 5374 /*---------------------------------------- 5375 ** move command with length 0 5376 **---------------------------------------- 5377 */ 5378 5379 if ((dstat & IID) && 5380 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5381 !(dstat & (MDPE|BF|ABRT|SIR)) && 5382 ((INL(nc_dbc) & 0xf8000000) == SCR_MOVE_TBL)) { 5383 /* 5384 ** Target wants more data than available. 5385 ** The "no_data" script will do it. 5386 */ 5387 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, no_data)); 5388 return; 5389 }; 5390 5391 /*------------------------------------------- 5392 ** Programmed interrupt 5393 **------------------------------------------- 5394 */ 5395 5396 if ((dstat & SIR) && 5397 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5398 !(dstat & (MDPE|BF|ABRT|IID)) && 5399 (INB(nc_dsps) <= SIR_MAX)) { 5400 ncr_int_sir (np); 5401 return; 5402 }; 5403 5404 /*======================================== 5405 ** log message for real hard errors 5406 **======================================== 5407 */ 5408 5409 ncr_log_hard_error(np, sist, dstat); 5410 5411 /*======================================== 5412 ** do the register dump 5413 **======================================== 5414 */ 5415 5416 if (time_second - np->regtime > 10) { 5417 int i; 5418 np->regtime = time_second; 5419 for (i=0; i<sizeof(np->regdump); i++) 5420 ((volatile char*)&np->regdump)[i] = INB_OFF(i); 5421 np->regdump.nc_dstat = dstat; 5422 np->regdump.nc_sist = sist; 5423 }; 5424 5425 5426 /*---------------------------------------- 5427 ** clean up the dma fifo 5428 **---------------------------------------- 5429 */ 5430 5431 if ( (INB(nc_sstat0) & (ILF|ORF|OLF) ) || 5432 (INB(nc_sstat1) & (FF3210) ) || 5433 (INB(nc_sstat2) & (ILF1|ORF1|OLF1)) || /* wide .. */ 5434 !(dstat & DFE)) { 5435 kprintf ("%s: have to clear fifos.\n", ncr_name (np)); 5436 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5437 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5438 /* clear dma fifo */ 5439 } 5440 5441 /*---------------------------------------- 5442 ** handshake timeout 5443 **---------------------------------------- 5444 */ 5445 5446 if (sist & HTH) { 5447 kprintf ("%s: handshake timeout\n", ncr_name(np)); 5448 OUTB (nc_scntl1, CRST); 5449 DELAY (1000); 5450 OUTB (nc_scntl1, 0x00); 5451 OUTB (nc_scr0, HS_FAIL); 5452 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5453 return; 5454 } 5455 5456 /*---------------------------------------- 5457 ** unexpected disconnect 5458 **---------------------------------------- 5459 */ 5460 5461 if ((sist & UDC) && 5462 !(sist & (STO|GEN|HTH|MA|SGE|RST|PAR)) && 5463 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5464 OUTB (nc_scr0, HS_UNEXPECTED); 5465 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, cleanup)); 5466 return; 5467 }; 5468 5469 /*---------------------------------------- 5470 ** cannot disconnect 5471 **---------------------------------------- 5472 */ 5473 5474 if ((dstat & IID) && 5475 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5476 !(dstat & (MDPE|BF|ABRT|SIR)) && 5477 ((INL(nc_dbc) & 0xf8000000) == SCR_WAIT_DISC)) { 5478 /* 5479 ** Unexpected data cycle while waiting for disconnect. 5480 */ 5481 if (INB(nc_sstat2) & LDSC) { 5482 /* 5483 ** It's an early reconnect. 5484 ** Let's continue ... 5485 */ 5486 OUTB (nc_dcntl, np->rv_dcntl | STD); 5487 /* 5488 ** info message 5489 */ 5490 kprintf ("%s: INFO: LDSC while IID.\n", 5491 ncr_name (np)); 5492 return; 5493 }; 5494 kprintf ("%s: target %d doesn't release the bus.\n", 5495 ncr_name (np), INB (nc_sdid)&0x0f); 5496 /* 5497 ** return without restarting the NCR. 5498 ** timeout will do the real work. 5499 */ 5500 return; 5501 }; 5502 5503 /*---------------------------------------- 5504 ** single step 5505 **---------------------------------------- 5506 */ 5507 5508 if ((dstat & SSI) && 5509 !(sist & (STO|GEN|HTH|MA|SGE|UDC|RST|PAR)) && 5510 !(dstat & (MDPE|BF|ABRT|SIR|IID))) { 5511 OUTB (nc_dcntl, np->rv_dcntl | STD); 5512 return; 5513 }; 5514 5515 /* 5516 ** @RECOVER@ HTH, SGE, ABRT. 5517 ** 5518 ** We should try to recover from these interrupts. 5519 ** They may occur if there are problems with synch transfers, or 5520 ** if targets are switched on or off while the driver is running. 5521 */ 5522 5523 if (sist & SGE) { 5524 /* clear scsi offsets */ 5525 OUTB (nc_ctest3, np->rv_ctest3 | CLF); 5526 } 5527 5528 /* 5529 ** Freeze controller to be able to read the messages. 5530 */ 5531 5532 if (DEBUG_FLAGS & DEBUG_FREEZE) { 5533 int i; 5534 unsigned char val; 5535 for (i=0; i<0x60; i++) { 5536 switch (i%16) { 5537 5538 case 0: 5539 kprintf ("%s: reg[%d0]: ", 5540 ncr_name(np),i/16); 5541 break; 5542 case 4: 5543 case 8: 5544 case 12: 5545 kprintf (" "); 5546 break; 5547 }; 5548 val = bus_space_read_1(np->bst, np->bsh, i); 5549 kprintf (" %x%x", val/16, val%16); 5550 if (i%16==15) kprintf (".\n"); 5551 }; 5552 5553 callout_stop(&np->timeout_ch); 5554 5555 kprintf ("%s: halted!\n", ncr_name(np)); 5556 /* 5557 ** don't restart controller ... 5558 */ 5559 OUTB (nc_istat, SRST); 5560 return; 5561 }; 5562 5563 #ifdef NCR_FREEZE 5564 /* 5565 ** Freeze system to be able to read the messages. 5566 */ 5567 kprintf ("ncr: fatal error: system halted - press reset to reboot ..."); 5568 crit_enter(); 5569 for (;;); 5570 #endif 5571 5572 /* 5573 ** sorry, have to kill ALL jobs ... 5574 */ 5575 5576 ncr_init (np, "fatal error", HS_FAIL); 5577 } 5578 5579 /*========================================================== 5580 ** 5581 ** ncr chip exception handler for selection timeout 5582 ** 5583 **========================================================== 5584 ** 5585 ** There seems to be a bug in the 53c810. 5586 ** Although a STO-Interrupt is pending, 5587 ** it continues executing script commands. 5588 ** But it will fail and interrupt (IID) on 5589 ** the next instruction where it's looking 5590 ** for a valid phase. 5591 ** 5592 **---------------------------------------------------------- 5593 */ 5594 5595 void ncr_int_sto (ncb_p np) 5596 { 5597 u_long dsa, scratcha, diff; 5598 nccb_p cp; 5599 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("T"); 5600 5601 /* 5602 ** look for nccb and set the status. 5603 */ 5604 5605 dsa = INL (nc_dsa); 5606 cp = np->link_nccb; 5607 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5608 cp = cp->link_nccb; 5609 5610 if (cp) { 5611 cp-> host_status = HS_SEL_TIMEOUT; 5612 ncr_complete (np, cp); 5613 }; 5614 5615 /* 5616 ** repair start queue 5617 */ 5618 5619 scratcha = INL (nc_scratcha); 5620 diff = scratcha - NCB_SCRIPTH_PHYS (np, tryloop); 5621 5622 /* assert ((diff <= MAX_START * 20) && !(diff % 20));*/ 5623 5624 if ((diff <= MAX_START * 20) && !(diff % 20)) { 5625 WRITESCRIPT(startpos[0], scratcha); 5626 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, start)); 5627 return; 5628 }; 5629 ncr_init (np, "selection timeout", HS_FAIL); 5630 } 5631 5632 /*========================================================== 5633 ** 5634 ** 5635 ** ncr chip exception handler for phase errors. 5636 ** 5637 ** 5638 **========================================================== 5639 ** 5640 ** We have to construct a new transfer descriptor, 5641 ** to transfer the rest of the current block. 5642 ** 5643 **---------------------------------------------------------- 5644 */ 5645 5646 static void ncr_int_ma (ncb_p np, u_char dstat) 5647 { 5648 u_int32_t dbc; 5649 u_int32_t rest; 5650 u_int32_t dsa; 5651 u_int32_t dsp; 5652 u_int32_t nxtdsp; 5653 volatile void *vdsp_base; 5654 size_t vdsp_off; 5655 u_int32_t oadr, olen; 5656 u_int32_t *tblp, *newcmd; 5657 u_char cmd, sbcl, ss0, ss2, ctest5; 5658 u_short delta; 5659 nccb_p cp; 5660 5661 dsp = INL (nc_dsp); 5662 dsa = INL (nc_dsa); 5663 dbc = INL (nc_dbc); 5664 ss0 = INB (nc_sstat0); 5665 ss2 = INB (nc_sstat2); 5666 sbcl= INB (nc_sbcl); 5667 5668 cmd = dbc >> 24; 5669 rest= dbc & 0xffffff; 5670 5671 ctest5 = (np->rv_ctest5 & DFS) ? INB (nc_ctest5) : 0; 5672 if (ctest5 & DFS) 5673 delta=(((ctest5<<8) | (INB (nc_dfifo) & 0xff)) - rest) & 0x3ff; 5674 else 5675 delta=(INB (nc_dfifo) - rest) & 0x7f; 5676 5677 5678 /* 5679 ** The data in the dma fifo has not been transfered to 5680 ** the target -> add the amount to the rest 5681 ** and clear the data. 5682 ** Check the sstat2 register in case of wide transfer. 5683 */ 5684 5685 if (!(dstat & DFE)) rest += delta; 5686 if (ss0 & OLF) rest++; 5687 if (ss0 & ORF) rest++; 5688 if (INB(nc_scntl3) & EWS) { 5689 if (ss2 & OLF1) rest++; 5690 if (ss2 & ORF1) rest++; 5691 }; 5692 OUTB (nc_ctest3, np->rv_ctest3 | CLF); /* clear dma fifo */ 5693 OUTB (nc_stest3, TE|CSF); /* clear scsi fifo */ 5694 5695 /* 5696 ** locate matching cp 5697 */ 5698 cp = np->link_nccb; 5699 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5700 cp = cp->link_nccb; 5701 5702 if (!cp) { 5703 kprintf ("%s: SCSI phase error fixup: CCB already dequeued (%p)\n", 5704 ncr_name (np), (void *) np->header.cp); 5705 return; 5706 } 5707 if (cp != np->header.cp) { 5708 kprintf ("%s: SCSI phase error fixup: CCB address mismatch " 5709 "(%p != %p) np->nccb = %p\n", 5710 ncr_name (np), (void *)cp, (void *)np->header.cp, 5711 (void *)np->link_nccb); 5712 /* return;*/ 5713 } 5714 5715 /* 5716 ** find the interrupted script command, 5717 ** and the address at which to continue. 5718 */ 5719 5720 if (dsp == vtophys (&cp->patch[2])) { 5721 vdsp_base = cp; 5722 vdsp_off = offsetof(struct nccb, patch[0]); 5723 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4); 5724 } else if (dsp == vtophys (&cp->patch[6])) { 5725 vdsp_base = cp; 5726 vdsp_off = offsetof(struct nccb, patch[4]); 5727 nxtdsp = READSCRIPT_OFF(vdsp_base, vdsp_off + 3*4); 5728 } else if (dsp > np->p_script && 5729 dsp <= np->p_script + sizeof(struct script)) { 5730 vdsp_base = np->script; 5731 vdsp_off = dsp - np->p_script - 8; 5732 nxtdsp = dsp; 5733 } else { 5734 vdsp_base = np->scripth; 5735 vdsp_off = dsp - np->p_scripth - 8; 5736 nxtdsp = dsp; 5737 }; 5738 5739 /* 5740 ** log the information 5741 */ 5742 if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE)) { 5743 kprintf ("P%x%x ",cmd&7, sbcl&7); 5744 kprintf ("RL=%d D=%d SS0=%x ", 5745 (unsigned) rest, (unsigned) delta, ss0); 5746 }; 5747 if (DEBUG_FLAGS & DEBUG_PHASE) { 5748 kprintf ("\nCP=%p CP2=%p DSP=%x NXT=%x VDSP=%p CMD=%x ", 5749 cp, np->header.cp, 5750 dsp, 5751 nxtdsp, (volatile char*)vdsp_base+vdsp_off, cmd); 5752 }; 5753 5754 /* 5755 ** get old startaddress and old length. 5756 */ 5757 5758 oadr = READSCRIPT_OFF(vdsp_base, vdsp_off + 1*4); 5759 5760 if (cmd & 0x10) { /* Table indirect */ 5761 tblp = (u_int32_t *) ((char*) &cp->phys + oadr); 5762 olen = tblp[0]; 5763 oadr = tblp[1]; 5764 } else { 5765 tblp = NULL; 5766 olen = READSCRIPT_OFF(vdsp_base, vdsp_off) & 0xffffff; 5767 }; 5768 5769 if (DEBUG_FLAGS & DEBUG_PHASE) { 5770 kprintf ("OCMD=%x\nTBLP=%p OLEN=%lx OADR=%lx\n", 5771 (unsigned) (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24), 5772 (void *) tblp, 5773 (u_long) olen, 5774 (u_long) oadr); 5775 }; 5776 5777 /* 5778 ** if old phase not dataphase, leave here. 5779 */ 5780 5781 if (cmd != (READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24)) { 5782 PRINT_ADDR(cp->ccb); 5783 kprintf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n", 5784 (unsigned)cmd, 5785 (unsigned)READSCRIPT_OFF(vdsp_base, vdsp_off) >> 24); 5786 5787 return; 5788 } 5789 if (cmd & 0x06) { 5790 PRINT_ADDR(cp->ccb); 5791 kprintf ("phase change %x-%x %d@%08x resid=%d.\n", 5792 cmd&7, sbcl&7, (unsigned)olen, 5793 (unsigned)oadr, (unsigned)rest); 5794 5795 OUTB (nc_dcntl, np->rv_dcntl | STD); 5796 return; 5797 }; 5798 5799 /* 5800 ** choose the correct patch area. 5801 ** if savep points to one, choose the other. 5802 */ 5803 5804 newcmd = cp->patch; 5805 if (cp->phys.header.savep == vtophys (newcmd)) newcmd+=4; 5806 5807 /* 5808 ** fillin the commands 5809 */ 5810 5811 newcmd[0] = ((cmd & 0x0f) << 24) | rest; 5812 newcmd[1] = oadr + olen - rest; 5813 newcmd[2] = SCR_JUMP; 5814 newcmd[3] = nxtdsp; 5815 5816 if (DEBUG_FLAGS & DEBUG_PHASE) { 5817 PRINT_ADDR(cp->ccb); 5818 kprintf ("newcmd[%d] %x %x %x %x.\n", 5819 (int)(newcmd - cp->patch), 5820 (unsigned)newcmd[0], 5821 (unsigned)newcmd[1], 5822 (unsigned)newcmd[2], 5823 (unsigned)newcmd[3]); 5824 } 5825 /* 5826 ** fake the return address (to the patch). 5827 ** and restart script processor at dispatcher. 5828 */ 5829 np->profile.num_break++; 5830 OUTL (nc_temp, vtophys (newcmd)); 5831 if ((cmd & 7) == 0) 5832 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 5833 else 5834 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, checkatn)); 5835 } 5836 5837 /*========================================================== 5838 ** 5839 ** 5840 ** ncr chip exception handler for programmed interrupts. 5841 ** 5842 ** 5843 **========================================================== 5844 */ 5845 5846 static int ncr_show_msg (u_char * msg) 5847 { 5848 u_char i; 5849 kprintf ("%x",*msg); 5850 if (*msg==MSG_EXTENDED) { 5851 for (i=1;i<8;i++) { 5852 if (i-1>msg[1]) break; 5853 kprintf ("-%x",msg[i]); 5854 }; 5855 return (i+1); 5856 } else if ((*msg & 0xf0) == 0x20) { 5857 kprintf ("-%x",msg[1]); 5858 return (2); 5859 }; 5860 return (1); 5861 } 5862 5863 void ncr_int_sir (ncb_p np) 5864 { 5865 u_char scntl3; 5866 u_char chg, ofs, per, fak, wide; 5867 u_char num = INB (nc_dsps); 5868 nccb_p cp=0; 5869 u_long dsa; 5870 u_int target = INB (nc_sdid) & 0x0f; 5871 tcb_p tp = &np->target[target]; 5872 int i; 5873 if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("I#%d", num); 5874 5875 switch (num) { 5876 case SIR_SENSE_RESTART: 5877 case SIR_STALL_RESTART: 5878 break; 5879 5880 default: 5881 /* 5882 ** lookup the nccb 5883 */ 5884 dsa = INL (nc_dsa); 5885 cp = np->link_nccb; 5886 while (cp && (CCB_PHYS (cp, phys) != dsa)) 5887 cp = cp->link_nccb; 5888 5889 assert (cp); 5890 if (!cp) 5891 goto out; 5892 assert (cp == np->header.cp); 5893 if (cp != np->header.cp) 5894 goto out; 5895 } 5896 5897 switch (num) { 5898 5899 /*-------------------------------------------------------------------- 5900 ** 5901 ** Processing of interrupted getcc selects 5902 ** 5903 **-------------------------------------------------------------------- 5904 */ 5905 5906 case SIR_SENSE_RESTART: 5907 /*------------------------------------------ 5908 ** Script processor is idle. 5909 ** Look for interrupted "check cond" 5910 **------------------------------------------ 5911 */ 5912 5913 if (DEBUG_FLAGS & DEBUG_RESTART) 5914 kprintf ("%s: int#%d",ncr_name (np),num); 5915 cp = (nccb_p) 0; 5916 for (i=0; i<MAX_TARGET; i++) { 5917 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" t%d", i); 5918 tp = &np->target[i]; 5919 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+"); 5920 cp = tp->hold_cp; 5921 if (!cp) continue; 5922 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("+"); 5923 if ((cp->host_status==HS_BUSY) && 5924 (cp->s_status==SCSI_STATUS_CHECK_COND)) 5925 break; 5926 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf ("- (remove)"); 5927 tp->hold_cp = cp = (nccb_p) 0; 5928 }; 5929 5930 if (cp) { 5931 if (DEBUG_FLAGS & DEBUG_RESTART) 5932 kprintf ("+ restart job ..\n"); 5933 OUTL (nc_dsa, CCB_PHYS (cp, phys)); 5934 OUTL (nc_dsp, NCB_SCRIPTH_PHYS (np, getcc)); 5935 return; 5936 }; 5937 5938 /* 5939 ** no job, resume normal processing 5940 */ 5941 if (DEBUG_FLAGS & DEBUG_RESTART) kprintf (" -- remove trap\n"); 5942 WRITESCRIPT(start0[0], SCR_INT ^ IFFALSE (0)); 5943 break; 5944 5945 case SIR_SENSE_FAILED: 5946 /*------------------------------------------- 5947 ** While trying to select for 5948 ** getting the condition code, 5949 ** a target reselected us. 5950 **------------------------------------------- 5951 */ 5952 if (DEBUG_FLAGS & DEBUG_RESTART) { 5953 PRINT_ADDR(cp->ccb); 5954 kprintf ("in getcc reselect by t%d.\n", 5955 INB(nc_ssid) & 0x0f); 5956 } 5957 5958 /* 5959 ** Mark this job 5960 */ 5961 cp->host_status = HS_BUSY; 5962 cp->s_status = SCSI_STATUS_CHECK_COND; 5963 np->target[cp->ccb->ccb_h.target_id].hold_cp = cp; 5964 5965 /* 5966 ** And patch code to restart it. 5967 */ 5968 WRITESCRIPT(start0[0], SCR_INT); 5969 break; 5970 5971 /*----------------------------------------------------------------------------- 5972 ** 5973 ** Was Sie schon immer ueber transfermode negotiation wissen wollten ... 5974 ** 5975 ** We try to negotiate sync and wide transfer only after 5976 ** a successfull inquire command. We look at byte 7 of the 5977 ** inquire data to determine the capabilities if the target. 5978 ** 5979 ** When we try to negotiate, we append the negotiation message 5980 ** to the identify and (maybe) simple tag message. 5981 ** The host status field is set to HS_NEGOTIATE to mark this 5982 ** situation. 5983 ** 5984 ** If the target doesn't answer this message immidiately 5985 ** (as required by the standard), the SIR_NEGO_FAIL interrupt 5986 ** will be raised eventually. 5987 ** The handler removes the HS_NEGOTIATE status, and sets the 5988 ** negotiated value to the default (async / nowide). 5989 ** 5990 ** If we receive a matching answer immediately, we check it 5991 ** for validity, and set the values. 5992 ** 5993 ** If we receive a Reject message immediately, we assume the 5994 ** negotiation has failed, and fall back to standard values. 5995 ** 5996 ** If we receive a negotiation message while not in HS_NEGOTIATE 5997 ** state, it's a target initiated negotiation. We prepare a 5998 ** (hopefully) valid answer, set our parameters, and send back 5999 ** this answer to the target. 6000 ** 6001 ** If the target doesn't fetch the answer (no message out phase), 6002 ** we assume the negotiation has failed, and fall back to default 6003 ** settings. 6004 ** 6005 ** When we set the values, we adjust them in all nccbs belonging 6006 ** to this target, in the controller's register, and in the "phys" 6007 ** field of the controller's struct ncb. 6008 ** 6009 ** Possible cases: hs sir msg_in value send goto 6010 ** We try try to negotiate: 6011 ** -> target doesnt't msgin NEG FAIL noop defa. - dispatch 6012 ** -> target rejected our msg NEG FAIL reject defa. - dispatch 6013 ** -> target answered (ok) NEG SYNC sdtr set - clrack 6014 ** -> target answered (!ok) NEG SYNC sdtr defa. REJ--->msg_bad 6015 ** -> target answered (ok) NEG WIDE wdtr set - clrack 6016 ** -> target answered (!ok) NEG WIDE wdtr defa. REJ--->msg_bad 6017 ** -> any other msgin NEG FAIL noop defa. - dispatch 6018 ** 6019 ** Target tries to negotiate: 6020 ** -> incoming message --- SYNC sdtr set SDTR - 6021 ** -> incoming message --- WIDE wdtr set WDTR - 6022 ** We sent our answer: 6023 ** -> target doesn't msgout --- PROTO ? defa. - dispatch 6024 ** 6025 **----------------------------------------------------------------------------- 6026 */ 6027 6028 case SIR_NEGO_FAILED: 6029 /*------------------------------------------------------- 6030 ** 6031 ** Negotiation failed. 6032 ** Target doesn't send an answer message, 6033 ** or target rejected our message. 6034 ** 6035 ** Remove negotiation request. 6036 ** 6037 **------------------------------------------------------- 6038 */ 6039 OUTB (HS_PRT, HS_BUSY); 6040 6041 /* fall through */ 6042 6043 case SIR_NEGO_PROTO: 6044 /*------------------------------------------------------- 6045 ** 6046 ** Negotiation failed. 6047 ** Target doesn't fetch the answer message. 6048 ** 6049 **------------------------------------------------------- 6050 */ 6051 6052 if (DEBUG_FLAGS & DEBUG_NEGO) { 6053 PRINT_ADDR(cp->ccb); 6054 kprintf ("negotiation failed sir=%x status=%x.\n", 6055 num, cp->nego_status); 6056 }; 6057 6058 /* 6059 ** any error in negotiation: 6060 ** fall back to default mode. 6061 */ 6062 switch (cp->nego_status) { 6063 6064 case NS_SYNC: 6065 ncr_setsync (np, cp, 0, 0xe0, 0); 6066 break; 6067 6068 case NS_WIDE: 6069 ncr_setwide (np, cp, 0, 0); 6070 break; 6071 6072 }; 6073 np->msgin [0] = MSG_NOOP; 6074 np->msgout[0] = MSG_NOOP; 6075 cp->nego_status = 0; 6076 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, dispatch)); 6077 break; 6078 6079 case SIR_NEGO_SYNC: 6080 /* 6081 ** Synchronous request message received. 6082 */ 6083 6084 if (DEBUG_FLAGS & DEBUG_NEGO) { 6085 PRINT_ADDR(cp->ccb); 6086 kprintf ("sync msgin: "); 6087 (void) ncr_show_msg (np->msgin); 6088 kprintf (".\n"); 6089 }; 6090 6091 /* 6092 ** get requested values. 6093 */ 6094 6095 chg = 0; 6096 per = np->msgin[3]; 6097 ofs = np->msgin[4]; 6098 if (ofs==0) per=255; 6099 6100 /* 6101 ** check values against driver limits. 6102 */ 6103 if (per < np->minsync) 6104 {chg = 1; per = np->minsync;} 6105 if (per < tp->tinfo.user.period) 6106 {chg = 1; per = tp->tinfo.user.period;} 6107 if (ofs > tp->tinfo.user.offset) 6108 {chg = 1; ofs = tp->tinfo.user.offset;} 6109 6110 /* 6111 ** Check against controller limits. 6112 */ 6113 6114 fak = 7; 6115 scntl3 = 0; 6116 if (ofs != 0) { 6117 ncr_getsync(np, per, &fak, &scntl3); 6118 if (fak > 7) { 6119 chg = 1; 6120 ofs = 0; 6121 } 6122 } 6123 if (ofs == 0) { 6124 fak = 7; 6125 per = 0; 6126 scntl3 = 0; 6127 } 6128 6129 if (DEBUG_FLAGS & DEBUG_NEGO) { 6130 PRINT_ADDR(cp->ccb); 6131 kprintf ("sync: per=%d scntl3=0x%x ofs=%d fak=%d chg=%d.\n", 6132 per, scntl3, ofs, fak, chg); 6133 } 6134 6135 if (INB (HS_PRT) == HS_NEGOTIATE) { 6136 OUTB (HS_PRT, HS_BUSY); 6137 switch (cp->nego_status) { 6138 6139 case NS_SYNC: 6140 /* 6141 ** This was an answer message 6142 */ 6143 if (chg) { 6144 /* 6145 ** Answer wasn't acceptable. 6146 */ 6147 ncr_setsync (np, cp, 0, 0xe0, 0); 6148 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6149 } else { 6150 /* 6151 ** Answer is ok. 6152 */ 6153 ncr_setsync (np,cp,scntl3,(fak<<5)|ofs, per); 6154 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6155 }; 6156 return; 6157 6158 case NS_WIDE: 6159 ncr_setwide (np, cp, 0, 0); 6160 break; 6161 }; 6162 }; 6163 6164 /* 6165 ** It was a request. Set value and 6166 ** prepare an answer message 6167 */ 6168 6169 ncr_setsync (np, cp, scntl3, (fak<<5)|ofs, per); 6170 6171 np->msgout[0] = MSG_EXTENDED; 6172 np->msgout[1] = 3; 6173 np->msgout[2] = MSG_EXT_SDTR; 6174 np->msgout[3] = per; 6175 np->msgout[4] = ofs; 6176 6177 cp->nego_status = NS_SYNC; 6178 6179 if (DEBUG_FLAGS & DEBUG_NEGO) { 6180 PRINT_ADDR(cp->ccb); 6181 kprintf ("sync msgout: "); 6182 (void) ncr_show_msg (np->msgout); 6183 kprintf (".\n"); 6184 } 6185 6186 if (!ofs) { 6187 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6188 return; 6189 } 6190 np->msgin [0] = MSG_NOOP; 6191 6192 break; 6193 6194 case SIR_NEGO_WIDE: 6195 /* 6196 ** Wide request message received. 6197 */ 6198 if (DEBUG_FLAGS & DEBUG_NEGO) { 6199 PRINT_ADDR(cp->ccb); 6200 kprintf ("wide msgin: "); 6201 (void) ncr_show_msg (np->msgin); 6202 kprintf (".\n"); 6203 }; 6204 6205 /* 6206 ** get requested values. 6207 */ 6208 6209 chg = 0; 6210 wide = np->msgin[3]; 6211 6212 /* 6213 ** check values against driver limits. 6214 */ 6215 6216 if (wide > tp->tinfo.user.width) 6217 {chg = 1; wide = tp->tinfo.user.width;} 6218 6219 if (DEBUG_FLAGS & DEBUG_NEGO) { 6220 PRINT_ADDR(cp->ccb); 6221 kprintf ("wide: wide=%d chg=%d.\n", wide, chg); 6222 } 6223 6224 if (INB (HS_PRT) == HS_NEGOTIATE) { 6225 OUTB (HS_PRT, HS_BUSY); 6226 switch (cp->nego_status) { 6227 6228 case NS_WIDE: 6229 /* 6230 ** This was an answer message 6231 */ 6232 if (chg) { 6233 /* 6234 ** Answer wasn't acceptable. 6235 */ 6236 ncr_setwide (np, cp, 0, 1); 6237 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, msg_bad)); 6238 } else { 6239 /* 6240 ** Answer is ok. 6241 */ 6242 ncr_setwide (np, cp, wide, 1); 6243 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, clrack)); 6244 }; 6245 return; 6246 6247 case NS_SYNC: 6248 ncr_setsync (np, cp, 0, 0xe0, 0); 6249 break; 6250 }; 6251 }; 6252 6253 /* 6254 ** It was a request, set value and 6255 ** prepare an answer message 6256 */ 6257 6258 ncr_setwide (np, cp, wide, 1); 6259 6260 np->msgout[0] = MSG_EXTENDED; 6261 np->msgout[1] = 2; 6262 np->msgout[2] = MSG_EXT_WDTR; 6263 np->msgout[3] = wide; 6264 6265 np->msgin [0] = MSG_NOOP; 6266 6267 cp->nego_status = NS_WIDE; 6268 6269 if (DEBUG_FLAGS & DEBUG_NEGO) { 6270 PRINT_ADDR(cp->ccb); 6271 kprintf ("wide msgout: "); 6272 (void) ncr_show_msg (np->msgout); 6273 kprintf (".\n"); 6274 } 6275 break; 6276 6277 /*-------------------------------------------------------------------- 6278 ** 6279 ** Processing of special messages 6280 ** 6281 **-------------------------------------------------------------------- 6282 */ 6283 6284 case SIR_REJECT_RECEIVED: 6285 /*----------------------------------------------- 6286 ** 6287 ** We received a MSG_MESSAGE_REJECT message. 6288 ** 6289 **----------------------------------------------- 6290 */ 6291 6292 PRINT_ADDR(cp->ccb); 6293 kprintf ("MSG_MESSAGE_REJECT received (%x:%x).\n", 6294 (unsigned)np->lastmsg, np->msgout[0]); 6295 break; 6296 6297 case SIR_REJECT_SENT: 6298 /*----------------------------------------------- 6299 ** 6300 ** We received an unknown message 6301 ** 6302 **----------------------------------------------- 6303 */ 6304 6305 PRINT_ADDR(cp->ccb); 6306 kprintf ("MSG_MESSAGE_REJECT sent for "); 6307 (void) ncr_show_msg (np->msgin); 6308 kprintf (".\n"); 6309 break; 6310 6311 /*-------------------------------------------------------------------- 6312 ** 6313 ** Processing of special messages 6314 ** 6315 **-------------------------------------------------------------------- 6316 */ 6317 6318 case SIR_IGN_RESIDUE: 6319 /*----------------------------------------------- 6320 ** 6321 ** We received an IGNORE RESIDUE message, 6322 ** which couldn't be handled by the script. 6323 ** 6324 **----------------------------------------------- 6325 */ 6326 6327 PRINT_ADDR(cp->ccb); 6328 kprintf ("MSG_IGN_WIDE_RESIDUE received, but not yet implemented.\n"); 6329 break; 6330 6331 case SIR_MISSING_SAVE: 6332 /*----------------------------------------------- 6333 ** 6334 ** We received an DISCONNECT message, 6335 ** but the datapointer wasn't saved before. 6336 ** 6337 **----------------------------------------------- 6338 */ 6339 6340 PRINT_ADDR(cp->ccb); 6341 kprintf ("MSG_DISCONNECT received, but datapointer not saved:\n" 6342 "\tdata=%x save=%x goal=%x.\n", 6343 (unsigned) INL (nc_temp), 6344 (unsigned) np->header.savep, 6345 (unsigned) np->header.goalp); 6346 break; 6347 6348 /*-------------------------------------------------------------------- 6349 ** 6350 ** Processing of a "SCSI_STATUS_QUEUE_FULL" status. 6351 ** 6352 ** XXX JGibbs - We should do the same thing for BUSY status. 6353 ** 6354 ** The current command has been rejected, 6355 ** because there are too many in the command queue. 6356 ** We have started too many commands for that target. 6357 ** 6358 **-------------------------------------------------------------------- 6359 */ 6360 case SIR_STALL_QUEUE: 6361 cp->xerr_status = XE_OK; 6362 cp->host_status = HS_COMPLETE; 6363 cp->s_status = SCSI_STATUS_QUEUE_FULL; 6364 ncr_freeze_devq(np, cp->ccb->ccb_h.path); 6365 ncr_complete(np, cp); 6366 6367 /* FALL THROUGH */ 6368 6369 case SIR_STALL_RESTART: 6370 /*----------------------------------------------- 6371 ** 6372 ** Enable selecting again, 6373 ** if NO disconnected jobs. 6374 ** 6375 **----------------------------------------------- 6376 */ 6377 /* 6378 ** Look for a disconnected job. 6379 */ 6380 cp = np->link_nccb; 6381 while (cp && cp->host_status != HS_DISCONNECT) 6382 cp = cp->link_nccb; 6383 6384 /* 6385 ** if there is one, ... 6386 */ 6387 if (cp) { 6388 /* 6389 ** wait for reselection 6390 */ 6391 OUTL (nc_dsp, NCB_SCRIPT_PHYS (np, reselect)); 6392 return; 6393 }; 6394 6395 /* 6396 ** else remove the interrupt. 6397 */ 6398 6399 kprintf ("%s: queue empty.\n", ncr_name (np)); 6400 WRITESCRIPT(start1[0], SCR_INT ^ IFFALSE (0)); 6401 break; 6402 }; 6403 6404 out: 6405 OUTB (nc_dcntl, np->rv_dcntl | STD); 6406 } 6407 6408 /*========================================================== 6409 ** 6410 ** 6411 ** Acquire a control block 6412 ** 6413 ** 6414 **========================================================== 6415 */ 6416 6417 static nccb_p ncr_get_nccb 6418 (ncb_p np, u_long target, u_long lun) 6419 { 6420 lcb_p lp; 6421 nccb_p cp = NULL; 6422 6423 /* Keep our timeout handler out */ 6424 crit_enter(); 6425 6426 /* 6427 ** Lun structure available ? 6428 */ 6429 6430 lp = np->target[target].lp[lun]; 6431 if (lp) { 6432 cp = lp->next_nccb; 6433 6434 /* 6435 ** Look for free CCB 6436 */ 6437 6438 while (cp && cp->magic) { 6439 cp = cp->next_nccb; 6440 } 6441 } 6442 6443 /* 6444 ** if nothing available, create one. 6445 */ 6446 6447 if (cp == NULL) 6448 cp = ncr_alloc_nccb(np, target, lun); 6449 6450 if (cp != NULL) { 6451 if (cp->magic) { 6452 kprintf("%s: Bogus free cp found\n", ncr_name(np)); 6453 crit_exit(); 6454 return (NULL); 6455 } 6456 cp->magic = 1; 6457 } 6458 crit_exit(); 6459 return (cp); 6460 } 6461 6462 /*========================================================== 6463 ** 6464 ** 6465 ** Release one control block 6466 ** 6467 ** 6468 **========================================================== 6469 */ 6470 6471 void ncr_free_nccb (ncb_p np, nccb_p cp) 6472 { 6473 /* 6474 ** sanity 6475 */ 6476 6477 assert (cp != NULL); 6478 6479 cp -> host_status = HS_IDLE; 6480 cp -> magic = 0; 6481 } 6482 6483 /*========================================================== 6484 ** 6485 ** 6486 ** Allocation of resources for Targets/Luns/Tags. 6487 ** 6488 ** 6489 **========================================================== 6490 */ 6491 6492 static nccb_p 6493 ncr_alloc_nccb (ncb_p np, u_long target, u_long lun) 6494 { 6495 tcb_p tp; 6496 lcb_p lp; 6497 nccb_p cp; 6498 6499 assert (np != NULL); 6500 6501 if (target>=MAX_TARGET) return(NULL); 6502 if (lun >=MAX_LUN ) return(NULL); 6503 6504 tp=&np->target[target]; 6505 6506 if (!tp->jump_tcb.l_cmd) { 6507 6508 /* 6509 ** initialize it. 6510 */ 6511 tp->jump_tcb.l_cmd = (SCR_JUMP^IFFALSE (DATA (0x80 + target))); 6512 tp->jump_tcb.l_paddr = np->jump_tcb.l_paddr; 6513 6514 tp->getscr[0] = 6515 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6516 tp->getscr[1] = vtophys (&tp->tinfo.sval); 6517 tp->getscr[2] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_sxfer); 6518 tp->getscr[3] = 6519 (np->features & FE_PFEN)? SCR_COPY(1) : SCR_COPY_F(1); 6520 tp->getscr[4] = vtophys (&tp->tinfo.wval); 6521 tp->getscr[5] = rman_get_start(np->reg_res) + offsetof (struct ncr_reg, nc_scntl3); 6522 6523 assert (((offsetof(struct ncr_reg, nc_sxfer) ^ 6524 (offsetof(struct tcb ,tinfo) 6525 + offsetof(struct ncr_target_tinfo, sval))) & 3) == 0); 6526 assert (((offsetof(struct ncr_reg, nc_scntl3) ^ 6527 (offsetof(struct tcb, tinfo) 6528 + offsetof(struct ncr_target_tinfo, wval))) &3) == 0); 6529 6530 tp->call_lun.l_cmd = (SCR_CALL); 6531 tp->call_lun.l_paddr = NCB_SCRIPT_PHYS (np, resel_lun); 6532 6533 tp->jump_lcb.l_cmd = (SCR_JUMP); 6534 tp->jump_lcb.l_paddr = NCB_SCRIPTH_PHYS (np, abort); 6535 np->jump_tcb.l_paddr = vtophys (&tp->jump_tcb); 6536 } 6537 6538 /* 6539 ** Logic unit control block 6540 */ 6541 lp = tp->lp[lun]; 6542 if (!lp) { 6543 /* 6544 ** Allocate a lcb 6545 */ 6546 lp = kmalloc (sizeof (struct lcb), M_DEVBUF, M_WAITOK | M_ZERO); 6547 6548 /* 6549 ** Initialize it 6550 */ 6551 lp->jump_lcb.l_cmd = (SCR_JUMP ^ IFFALSE (DATA (lun))); 6552 lp->jump_lcb.l_paddr = tp->jump_lcb.l_paddr; 6553 6554 lp->call_tag.l_cmd = (SCR_CALL); 6555 lp->call_tag.l_paddr = NCB_SCRIPT_PHYS (np, resel_tag); 6556 6557 lp->jump_nccb.l_cmd = (SCR_JUMP); 6558 lp->jump_nccb.l_paddr = NCB_SCRIPTH_PHYS (np, aborttag); 6559 6560 lp->actlink = 1; 6561 6562 /* 6563 ** Chain into LUN list 6564 */ 6565 tp->jump_lcb.l_paddr = vtophys (&lp->jump_lcb); 6566 tp->lp[lun] = lp; 6567 6568 } 6569 6570 /* 6571 ** Allocate a nccb 6572 */ 6573 cp = kmalloc (sizeof (struct nccb), M_DEVBUF, M_WAITOK | M_ZERO); 6574 6575 if (DEBUG_FLAGS & DEBUG_ALLOC) { 6576 kprintf ("new nccb @%p.\n", cp); 6577 } 6578 6579 /* 6580 ** Fill in physical addresses 6581 */ 6582 6583 cp->p_nccb = vtophys (cp); 6584 6585 /* 6586 ** Chain into reselect list 6587 */ 6588 cp->jump_nccb.l_cmd = SCR_JUMP; 6589 cp->jump_nccb.l_paddr = lp->jump_nccb.l_paddr; 6590 lp->jump_nccb.l_paddr = CCB_PHYS (cp, jump_nccb); 6591 cp->call_tmp.l_cmd = SCR_CALL; 6592 cp->call_tmp.l_paddr = NCB_SCRIPT_PHYS (np, resel_tmp); 6593 6594 /* 6595 ** Chain into wakeup list 6596 */ 6597 cp->link_nccb = np->link_nccb; 6598 np->link_nccb = cp; 6599 6600 /* 6601 ** Chain into CCB list 6602 */ 6603 cp->next_nccb = lp->next_nccb; 6604 lp->next_nccb = cp; 6605 6606 return (cp); 6607 } 6608 6609 /*========================================================== 6610 ** 6611 ** 6612 ** Build Scatter Gather Block 6613 ** 6614 ** 6615 **========================================================== 6616 ** 6617 ** The transfer area may be scattered among 6618 ** several non adjacent physical pages. 6619 ** 6620 ** We may use MAX_SCATTER blocks. 6621 ** 6622 **---------------------------------------------------------- 6623 */ 6624 6625 static int ncr_scatter 6626 (struct dsb* phys, vm_offset_t vaddr, vm_size_t datalen) 6627 { 6628 u_long paddr, pnext; 6629 6630 u_short segment = 0; 6631 u_long segsize, segaddr; 6632 u_long size, csize = 0; 6633 u_long chunk = MAX_SIZE; 6634 int free; 6635 6636 bzero (&phys->data, sizeof (phys->data)); 6637 if (!datalen) return (0); 6638 6639 paddr = vtophys (vaddr); 6640 6641 /* 6642 ** insert extra break points at a distance of chunk. 6643 ** We try to reduce the number of interrupts caused 6644 ** by unexpected phase changes due to disconnects. 6645 ** A typical harddisk may disconnect before ANY block. 6646 ** If we wanted to avoid unexpected phase changes at all 6647 ** we had to use a break point every 512 bytes. 6648 ** Of course the number of scatter/gather blocks is 6649 ** limited. 6650 */ 6651 6652 free = MAX_SCATTER - 1; 6653 6654 if (vaddr & PAGE_MASK) free -= datalen / PAGE_SIZE; 6655 6656 if (free>1) 6657 while ((chunk * free >= 2 * datalen) && (chunk>=1024)) 6658 chunk /= 2; 6659 6660 if(DEBUG_FLAGS & DEBUG_SCATTER) 6661 kprintf("ncr?:\tscattering virtual=%p size=%d chunk=%d.\n", 6662 (void *) vaddr, (unsigned) datalen, (unsigned) chunk); 6663 6664 /* 6665 ** Build data descriptors. 6666 */ 6667 while (datalen && (segment < MAX_SCATTER)) { 6668 6669 /* 6670 ** this segment is empty 6671 */ 6672 segsize = 0; 6673 segaddr = paddr; 6674 pnext = paddr; 6675 6676 if (!csize) csize = chunk; 6677 6678 while ((datalen) && (paddr == pnext) && (csize)) { 6679 6680 /* 6681 ** continue this segment 6682 */ 6683 pnext = (paddr & (~PAGE_MASK)) + PAGE_SIZE; 6684 6685 /* 6686 ** Compute max size 6687 */ 6688 6689 size = pnext - paddr; /* page size */ 6690 if (size > datalen) size = datalen; /* data size */ 6691 if (size > csize ) size = csize ; /* chunksize */ 6692 6693 segsize += size; 6694 vaddr += size; 6695 csize -= size; 6696 datalen -= size; 6697 paddr = vtophys (vaddr); 6698 }; 6699 6700 if(DEBUG_FLAGS & DEBUG_SCATTER) 6701 kprintf ("\tseg #%d addr=%x size=%d (rest=%d).\n", 6702 segment, 6703 (unsigned) segaddr, 6704 (unsigned) segsize, 6705 (unsigned) datalen); 6706 6707 phys->data[segment].addr = segaddr; 6708 phys->data[segment].size = segsize; 6709 segment++; 6710 } 6711 6712 if (datalen) { 6713 kprintf("ncr?: scatter/gather failed (residue=%d).\n", 6714 (unsigned) datalen); 6715 return (-1); 6716 }; 6717 6718 return (segment); 6719 } 6720 6721 /*========================================================== 6722 ** 6723 ** 6724 ** Test the pci bus snoop logic :-( 6725 ** 6726 ** Has to be called with interrupts disabled. 6727 ** 6728 ** 6729 **========================================================== 6730 */ 6731 6732 #ifndef NCR_IOMAPPED 6733 static int ncr_regtest (struct ncb* np) 6734 { 6735 volatile u_int32_t data; 6736 /* 6737 ** ncr registers may NOT be cached. 6738 ** write 0xffffffff to a read only register area, 6739 ** and try to read it back. 6740 */ 6741 data = 0xffffffff; 6742 OUTL_OFF(offsetof(struct ncr_reg, nc_dstat), data); 6743 data = INL_OFF(offsetof(struct ncr_reg, nc_dstat)); 6744 #if 1 6745 if (data == 0xffffffff) { 6746 #else 6747 if ((data & 0xe2f0fffd) != 0x02000080) { 6748 #endif 6749 kprintf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n", 6750 (unsigned) data); 6751 return (0x10); 6752 }; 6753 return (0); 6754 } 6755 #endif 6756 6757 static int ncr_snooptest (struct ncb* np) 6758 { 6759 u_int32_t ncr_rd, ncr_wr, ncr_bk, host_rd, host_wr, pc; 6760 int i, err=0; 6761 #ifndef NCR_IOMAPPED 6762 err |= ncr_regtest (np); 6763 if (err) return (err); 6764 #endif 6765 /* 6766 ** init 6767 */ 6768 pc = NCB_SCRIPTH_PHYS (np, snooptest); 6769 host_wr = 1; 6770 ncr_wr = 2; 6771 /* 6772 ** Set memory and register. 6773 */ 6774 ncr_cache = host_wr; 6775 OUTL (nc_temp, ncr_wr); 6776 /* 6777 ** Start script (exchange values) 6778 */ 6779 OUTL (nc_dsp, pc); 6780 /* 6781 ** Wait 'til done (with timeout) 6782 */ 6783 for (i=0; i<NCR_SNOOP_TIMEOUT; i++) 6784 if (INB(nc_istat) & (INTF|SIP|DIP)) 6785 break; 6786 /* 6787 ** Save termination position. 6788 */ 6789 pc = INL (nc_dsp); 6790 /* 6791 ** Read memory and register. 6792 */ 6793 host_rd = ncr_cache; 6794 ncr_rd = INL (nc_scratcha); 6795 ncr_bk = INL (nc_temp); 6796 /* 6797 ** Reset ncr chip 6798 */ 6799 OUTB (nc_istat, SRST); 6800 DELAY (1000); 6801 OUTB (nc_istat, 0 ); 6802 /* 6803 ** check for timeout 6804 */ 6805 if (i>=NCR_SNOOP_TIMEOUT) { 6806 kprintf ("CACHE TEST FAILED: timeout.\n"); 6807 return (0x20); 6808 }; 6809 /* 6810 ** Check termination position. 6811 */ 6812 if (pc != NCB_SCRIPTH_PHYS (np, snoopend)+8) { 6813 kprintf ("CACHE TEST FAILED: script execution failed.\n"); 6814 kprintf ("start=%08lx, pc=%08lx, end=%08lx\n", 6815 (u_long) NCB_SCRIPTH_PHYS (np, snooptest), (u_long) pc, 6816 (u_long) NCB_SCRIPTH_PHYS (np, snoopend) +8); 6817 return (0x40); 6818 }; 6819 /* 6820 ** Show results. 6821 */ 6822 if (host_wr != ncr_rd) { 6823 kprintf ("CACHE TEST FAILED: host wrote %d, ncr read %d.\n", 6824 (int) host_wr, (int) ncr_rd); 6825 err |= 1; 6826 }; 6827 if (host_rd != ncr_wr) { 6828 kprintf ("CACHE TEST FAILED: ncr wrote %d, host read %d.\n", 6829 (int) ncr_wr, (int) host_rd); 6830 err |= 2; 6831 }; 6832 if (ncr_bk != ncr_wr) { 6833 kprintf ("CACHE TEST FAILED: ncr wrote %d, read back %d.\n", 6834 (int) ncr_wr, (int) ncr_bk); 6835 err |= 4; 6836 }; 6837 return (err); 6838 } 6839 6840 /*========================================================== 6841 ** 6842 ** 6843 ** Profiling the drivers and targets performance. 6844 ** 6845 ** 6846 **========================================================== 6847 */ 6848 6849 /* 6850 ** Compute the difference in milliseconds. 6851 **/ 6852 6853 static int ncr_delta (int *from, int *to) 6854 { 6855 if (!from) return (-1); 6856 if (!to) return (-2); 6857 return ((to - from) * 1000 / hz); 6858 } 6859 6860 #define PROFILE cp->phys.header.stamp 6861 static void ncb_profile (ncb_p np, nccb_p cp) 6862 { 6863 int co, da, st, en, di, se, post,work,disc; 6864 u_long diff; 6865 6866 PROFILE.end = ticks; 6867 6868 st = ncr_delta (&PROFILE.start,&PROFILE.status); 6869 if (st<0) return; /* status not reached */ 6870 6871 da = ncr_delta (&PROFILE.start,&PROFILE.data); 6872 if (da<0) return; /* No data transfer phase */ 6873 6874 co = ncr_delta (&PROFILE.start,&PROFILE.command); 6875 if (co<0) return; /* command not executed */ 6876 6877 en = ncr_delta (&PROFILE.start,&PROFILE.end), 6878 di = ncr_delta (&PROFILE.start,&PROFILE.disconnect), 6879 se = ncr_delta (&PROFILE.start,&PROFILE.select); 6880 post = en - st; 6881 6882 /* 6883 ** @PROFILE@ Disconnect time invalid if multiple disconnects 6884 */ 6885 6886 if (di>=0) disc = se-di; else disc = 0; 6887 6888 work = (st - co) - disc; 6889 6890 diff = (np->disc_phys - np->disc_ref) & 0xff; 6891 np->disc_ref += diff; 6892 6893 np->profile.num_trans += 1; 6894 if (cp->ccb) 6895 np->profile.num_bytes += cp->ccb->csio.dxfer_len; 6896 np->profile.num_disc += diff; 6897 np->profile.ms_setup += co; 6898 np->profile.ms_data += work; 6899 np->profile.ms_disc += disc; 6900 np->profile.ms_post += post; 6901 } 6902 #undef PROFILE 6903 6904 /*========================================================== 6905 ** 6906 ** Determine the ncr's clock frequency. 6907 ** This is essential for the negotiation 6908 ** of the synchronous transfer rate. 6909 ** 6910 **========================================================== 6911 ** 6912 ** Note: we have to return the correct value. 6913 ** THERE IS NO SAVE DEFAULT VALUE. 6914 ** 6915 ** Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock. 6916 ** 53C860 and 53C875 rev. 1 support fast20 transfers but 6917 ** do not have a clock doubler and so are provided with a 6918 ** 80 MHz clock. All other fast20 boards incorporate a doubler 6919 ** and so should be delivered with a 40 MHz clock. 6920 ** The future fast40 chips (895/895) use a 40 Mhz base clock 6921 ** and provide a clock quadrupler (160 Mhz). The code below 6922 ** tries to deal as cleverly as possible with all this stuff. 6923 ** 6924 **---------------------------------------------------------- 6925 */ 6926 6927 /* 6928 * Select NCR SCSI clock frequency 6929 */ 6930 static void ncr_selectclock(ncb_p np, u_char scntl3) 6931 { 6932 if (np->multiplier < 2) { 6933 OUTB(nc_scntl3, scntl3); 6934 return; 6935 } 6936 6937 if (bootverbose >= 2) 6938 kprintf ("%s: enabling clock multiplier\n", ncr_name(np)); 6939 6940 OUTB(nc_stest1, DBLEN); /* Enable clock multiplier */ 6941 if (np->multiplier > 2) { /* Poll bit 5 of stest4 for quadrupler */ 6942 int i = 20; 6943 while (!(INB(nc_stest4) & LCKFRQ) && --i > 0) 6944 DELAY(20); 6945 if (!i) 6946 kprintf("%s: the chip cannot lock the frequency\n", ncr_name(np)); 6947 } else /* Wait 20 micro-seconds for doubler */ 6948 DELAY(20); 6949 OUTB(nc_stest3, HSC); /* Halt the scsi clock */ 6950 OUTB(nc_scntl3, scntl3); 6951 OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier */ 6952 OUTB(nc_stest3, 0x00); /* Restart scsi clock */ 6953 } 6954 6955 /* 6956 * calculate NCR SCSI clock frequency (in KHz) 6957 */ 6958 static unsigned 6959 ncrgetfreq (ncb_p np, int gen) 6960 { 6961 int ms = 0; 6962 /* 6963 * Measure GEN timer delay in order 6964 * to calculate SCSI clock frequency 6965 * 6966 * This code will never execute too 6967 * many loop iterations (if DELAY is 6968 * reasonably correct). It could get 6969 * too low a delay (too high a freq.) 6970 * if the CPU is slow executing the 6971 * loop for some reason (an NMI, for 6972 * example). For this reason we will 6973 * if multiple measurements are to be 6974 * performed trust the higher delay 6975 * (lower frequency returned). 6976 */ 6977 OUTB (nc_stest1, 0); /* make sure clock doubler is OFF */ 6978 OUTW (nc_sien , 0); /* mask all scsi interrupts */ 6979 (void) INW (nc_sist); /* clear pending scsi interrupt */ 6980 OUTB (nc_dien , 0); /* mask all dma interrupts */ 6981 (void) INW (nc_sist); /* another one, just to be sure :) */ 6982 OUTB (nc_scntl3, 4); /* set pre-scaler to divide by 3 */ 6983 OUTB (nc_stime1, 0); /* disable general purpose timer */ 6984 OUTB (nc_stime1, gen); /* set to nominal delay of (1<<gen) * 125us */ 6985 while (!(INW(nc_sist) & GEN) && ms++ < 1000) 6986 DELAY(1000); /* count ms */ 6987 OUTB (nc_stime1, 0); /* disable general purpose timer */ 6988 OUTB (nc_scntl3, 0); 6989 /* 6990 * Set prescaler to divide by whatever "0" means. 6991 * "0" ought to choose divide by 2, but appears 6992 * to set divide by 3.5 mode in my 53c810 ... 6993 */ 6994 OUTB (nc_scntl3, 0); 6995 6996 if (bootverbose >= 2) 6997 kprintf ("\tDelay (GEN=%d): %u msec\n", gen, ms); 6998 /* 6999 * adjust for prescaler, and convert into KHz 7000 */ 7001 return ms ? ((1 << gen) * 4440) / ms : 0; 7002 } 7003 7004 static void ncr_getclock (ncb_p np, u_char multiplier) 7005 { 7006 unsigned char scntl3; 7007 unsigned char stest1; 7008 scntl3 = INB(nc_scntl3); 7009 stest1 = INB(nc_stest1); 7010 7011 np->multiplier = 1; 7012 7013 if (multiplier > 1) { 7014 np->multiplier = multiplier; 7015 np->clock_khz = 40000 * multiplier; 7016 } else { 7017 if ((scntl3 & 7) == 0) { 7018 unsigned f1, f2; 7019 /* throw away first result */ 7020 (void) ncrgetfreq (np, 11); 7021 f1 = ncrgetfreq (np, 11); 7022 f2 = ncrgetfreq (np, 11); 7023 7024 if (bootverbose >= 2) 7025 kprintf ("\tNCR clock is %uKHz, %uKHz\n", f1, f2); 7026 if (f1 > f2) f1 = f2; /* trust lower result */ 7027 if (f1 > 45000) { 7028 scntl3 = 5; /* >45Mhz: assume 80MHz */ 7029 } else { 7030 scntl3 = 3; /* <45Mhz: assume 40MHz */ 7031 } 7032 } 7033 else if ((scntl3 & 7) == 5) 7034 np->clock_khz = 80000; /* Probably a 875 rev. 1 ? */ 7035 } 7036 } 7037 7038 /*=========================================================================*/ 7039 7040 #ifdef NCR_TEKRAM_EEPROM 7041 7042 struct tekram_eeprom_dev { 7043 u_char devmode; 7044 #define TKR_PARCHK 0x01 7045 #define TKR_TRYSYNC 0x02 7046 #define TKR_ENDISC 0x04 7047 #define TKR_STARTUNIT 0x08 7048 #define TKR_USETAGS 0x10 7049 #define TKR_TRYWIDE 0x20 7050 u_char syncparam; /* max. sync transfer rate (table ?) */ 7051 u_char filler1; 7052 u_char filler2; 7053 }; 7054 7055 7056 struct tekram_eeprom { 7057 struct tekram_eeprom_dev 7058 dev[16]; 7059 u_char adaptid; 7060 u_char adaptmode; 7061 #define TKR_ADPT_GT2DRV 0x01 7062 #define TKR_ADPT_GT1GB 0x02 7063 #define TKR_ADPT_RSTBUS 0x04 7064 #define TKR_ADPT_ACTNEG 0x08 7065 #define TKR_ADPT_NOSEEK 0x10 7066 #define TKR_ADPT_MORLUN 0x20 7067 u_char delay; /* unit ? ( table ??? ) */ 7068 u_char tags; /* use 4 times as many ... */ 7069 u_char filler[60]; 7070 }; 7071 7072 static void 7073 tekram_write_bit (ncb_p np, int bit) 7074 { 7075 u_char val = 0x10 + ((bit & 1) << 1); 7076 7077 DELAY(10); 7078 OUTB (nc_gpreg, val); 7079 DELAY(10); 7080 OUTB (nc_gpreg, val | 0x04); 7081 DELAY(10); 7082 OUTB (nc_gpreg, val); 7083 DELAY(10); 7084 } 7085 7086 static int 7087 tekram_read_bit (ncb_p np) 7088 { 7089 OUTB (nc_gpreg, 0x10); 7090 DELAY(10); 7091 OUTB (nc_gpreg, 0x14); 7092 DELAY(10); 7093 return INB (nc_gpreg) & 1; 7094 } 7095 7096 static u_short 7097 read_tekram_eeprom_reg (ncb_p np, int reg) 7098 { 7099 int bit; 7100 u_short result = 0; 7101 int cmd = 0x80 | reg; 7102 7103 OUTB (nc_gpreg, 0x10); 7104 7105 tekram_write_bit (np, 1); 7106 for (bit = 7; bit >= 0; bit--) 7107 { 7108 tekram_write_bit (np, cmd >> bit); 7109 } 7110 7111 for (bit = 0; bit < 16; bit++) 7112 { 7113 result <<= 1; 7114 result |= tekram_read_bit (np); 7115 } 7116 7117 OUTB (nc_gpreg, 0x00); 7118 return result; 7119 } 7120 7121 static int 7122 read_tekram_eeprom(ncb_p np, struct tekram_eeprom *buffer) 7123 { 7124 u_short *p = (u_short *) buffer; 7125 u_short sum = 0; 7126 int i; 7127 7128 if (INB (nc_gpcntl) != 0x09) 7129 { 7130 return 0; 7131 } 7132 for (i = 0; i < 64; i++) 7133 { 7134 u_short val; 7135 if((i&0x0f) == 0) kprintf ("%02x:", i*2); 7136 val = read_tekram_eeprom_reg (np, i); 7137 if (p) 7138 *p++ = val; 7139 sum += val; 7140 if((i&0x01) == 0x00) kprintf (" "); 7141 kprintf ("%02x%02x", val & 0xff, (val >> 8) & 0xff); 7142 if((i&0x0f) == 0x0f) kprintf ("\n"); 7143 } 7144 kprintf ("Sum = %04x\n", sum); 7145 return sum == 0x1234; 7146 } 7147 #endif /* NCR_TEKRAM_EEPROM */ 7148 7149 static device_method_t ncr_methods[] = { 7150 /* Device interface */ 7151 DEVMETHOD(device_probe, ncr_probe), 7152 DEVMETHOD(device_attach, ncr_attach), 7153 7154 { 0, 0 } 7155 }; 7156 7157 static driver_t ncr_driver = { 7158 "ncr", 7159 ncr_methods, 7160 sizeof(struct ncb), 7161 }; 7162 7163 static devclass_t ncr_devclass; 7164 7165 DRIVER_MODULE(if_ncr, pci, ncr_driver, ncr_devclass, 0, 0); 7166 7167 /*=========================================================================*/ 7168 #endif /* _KERNEL */ 7169