xref: /dragonfly/sys/dev/disk/nvme/nvme_log.h (revision 70394f3f)
1*97a077a0SMatthew Dillon /*
2*97a077a0SMatthew Dillon  * Copyright (c) 2016 The DragonFly Project.  All rights reserved.
3*97a077a0SMatthew Dillon  *
4*97a077a0SMatthew Dillon  * This code is derived from software contributed to The DragonFly Project
5*97a077a0SMatthew Dillon  * by Matthew Dillon <dillon@backplane.com>
6*97a077a0SMatthew Dillon  *
7*97a077a0SMatthew Dillon  * Redistribution and use in source and binary forms, with or without
8*97a077a0SMatthew Dillon  * modification, are permitted provided that the following conditions
9*97a077a0SMatthew Dillon  * are met:
10*97a077a0SMatthew Dillon  *
11*97a077a0SMatthew Dillon  * 1. Redistributions of source code must retain the above copyright
12*97a077a0SMatthew Dillon  *    notice, this list of conditions and the following disclaimer.
13*97a077a0SMatthew Dillon  * 2. Redistributions in binary form must reproduce the above copyright
14*97a077a0SMatthew Dillon  *    notice, this list of conditions and the following disclaimer in
15*97a077a0SMatthew Dillon  *    the documentation and/or other materials provided with the
16*97a077a0SMatthew Dillon  *    distribution.
17*97a077a0SMatthew Dillon  * 3. Neither the name of The DragonFly Project nor the names of its
18*97a077a0SMatthew Dillon  *    contributors may be used to endorse or promote products derived
19*97a077a0SMatthew Dillon  *    from this software without specific, prior written permission.
20*97a077a0SMatthew Dillon  *
21*97a077a0SMatthew Dillon  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
22*97a077a0SMatthew Dillon  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
23*97a077a0SMatthew Dillon  * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
24*97a077a0SMatthew Dillon  * FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE
25*97a077a0SMatthew Dillon  * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
26*97a077a0SMatthew Dillon  * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
27*97a077a0SMatthew Dillon  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
28*97a077a0SMatthew Dillon  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
29*97a077a0SMatthew Dillon  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30*97a077a0SMatthew Dillon  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
31*97a077a0SMatthew Dillon  * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32*97a077a0SMatthew Dillon  * SUCH DAMAGE.
33*97a077a0SMatthew Dillon  */
34*97a077a0SMatthew Dillon 
35*97a077a0SMatthew Dillon /*
36*97a077a0SMatthew Dillon  * Get Log Page - Error Information (Log ID 01) (64 bytes)
37*97a077a0SMatthew Dillon  */
38*97a077a0SMatthew Dillon typedef struct {
39*97a077a0SMatthew Dillon 	uint64_t	error_count;
40*97a077a0SMatthew Dillon 	uint16_t	subq_id;
41*97a077a0SMatthew Dillon 	uint16_t	cmd_id;
42*97a077a0SMatthew Dillon 	uint16_t	status;
43*97a077a0SMatthew Dillon 	uint16_t	param;
44*97a077a0SMatthew Dillon 	uint64_t	lba;
45*97a077a0SMatthew Dillon 	uint32_t	nsid;
46*97a077a0SMatthew Dillon 	uint8_t		vendor;
47*97a077a0SMatthew Dillon 	uint8_t		reserved29;
48*97a077a0SMatthew Dillon 	uint8_t		reserved30;
49*97a077a0SMatthew Dillon 	uint8_t		reserved31;
50*97a077a0SMatthew Dillon 	uint64_t	csi;		/* command specific information */
51*97a077a0SMatthew Dillon 	uint8_t		reserved40[24];
52*97a077a0SMatthew Dillon } __packed nvme_log_error_data_t;
53*97a077a0SMatthew Dillon 
54*97a077a0SMatthew Dillon /*
55*97a077a0SMatthew Dillon  * Get Log Page - Smart/ Health Information (Log ID 02) (512 bytes)
56*97a077a0SMatthew Dillon  */
57*97a077a0SMatthew Dillon typedef struct {
58*97a077a0SMatthew Dillon 	uint8_t		crit_flags;
59*97a077a0SMatthew Dillon 	uint8_t		comp_temp1;
60*97a077a0SMatthew Dillon 	uint8_t		comp_temp2;
61*97a077a0SMatthew Dillon 	uint8_t		spare_cap;	/* normalized spare capacity 0-100 */
62*97a077a0SMatthew Dillon 	uint8_t		spare_thresh;	/* event when cap falls below value */
63*97a077a0SMatthew Dillon 	uint8_t		rated_life;	/* 0-100, may exceed capped at 255 */
64*97a077a0SMatthew Dillon 	uint8_t		reserved6[26];
65*97a077a0SMatthew Dillon 
66*97a077a0SMatthew Dillon 					/* 16-byte fields lo, hi */
67*97a077a0SMatthew Dillon 	uint64_t	read_count[2];	/* in 512000 byte units */
68*97a077a0SMatthew Dillon 	uint64_t	write_count[2];	/* in 512000 byte units */
69*97a077a0SMatthew Dillon 	uint64_t	read_cmds[2];
70*97a077a0SMatthew Dillon 	uint64_t	write_cmds[2];
71*97a077a0SMatthew Dillon 	uint64_t	busy_time[2];	/* in minutes */
72*97a077a0SMatthew Dillon 	uint64_t	power_cycles[2];
73*97a077a0SMatthew Dillon 	uint64_t	powon_hours[2];
74*97a077a0SMatthew Dillon 	uint64_t	unsafe_shutdowns[2];
75*97a077a0SMatthew Dillon 	uint64_t	unrecoverable_errors[2];
76*97a077a0SMatthew Dillon 	uint64_t	error_log_entries[2];
77*97a077a0SMatthew Dillon 
78*97a077a0SMatthew Dillon 	uint32_t	warn_comp_temp_time; /* minutes temp > warn level */
79*97a077a0SMatthew Dillon 	uint32_t	crit_comp_temp_time; /* minutes temp > crit level */
80*97a077a0SMatthew Dillon 
81*97a077a0SMatthew Dillon 	uint16_t	temp_sensors[8]; /* sensors 1-8 in kelvin 0=unimp */
82*97a077a0SMatthew Dillon 
83*97a077a0SMatthew Dillon 	uint8_t		reserved216[296];
84*97a077a0SMatthew Dillon } __packed nvme_log_smart_data_t;
85*97a077a0SMatthew Dillon 
86*97a077a0SMatthew Dillon #define NVME_SMART_CRF_BELOW_THRESH	0x01
87*97a077a0SMatthew Dillon #define NVME_SMART_CRF_ABOVE_THRESH	0x02	/* or below under-temp thresh*/
88*97a077a0SMatthew Dillon #define NVME_SMART_CRF_UNRELIABLE	0x04
89*97a077a0SMatthew Dillon #define NVME_SMART_CRF_MEDIA_RO		0x08
90*97a077a0SMatthew Dillon #define NVME_SMART_CRF_VOLTL_BKUP_FAIL	0x10
91*97a077a0SMatthew Dillon #define NVME_SMART_CRF_RES20		0x20
92*97a077a0SMatthew Dillon #define NVME_SMART_CRF_RES40		0x40
93*97a077a0SMatthew Dillon #define NVME_SMART_CRF_RES80		0x80
94*97a077a0SMatthew Dillon 
95*97a077a0SMatthew Dillon /*
96*97a077a0SMatthew Dillon  * Firmware Slot Information (Log ID 03) (512 bytes)
97*97a077a0SMatthew Dillon  */
98*97a077a0SMatthew Dillon typedef struct {
99*97a077a0SMatthew Dillon 	uint8_t		flags;
100*97a077a0SMatthew Dillon 	uint8_t		reserved1[7];
101*97a077a0SMatthew Dillon 	uint64_t	revision[7];	/* revision slot 1-7 */
102*97a077a0SMatthew Dillon 	uint8_t		reserved64[448];
103*97a077a0SMatthew Dillon } __packed nvme_fw_slot_data_t;
104*97a077a0SMatthew Dillon 
105*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_RESERVED_80	0x80
106*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_FWNEXT_MASK	0x70
107*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_RESERVED_08	0x08
108*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_FWCURR_MASK	0x07
109*97a077a0SMatthew Dillon 
110*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_FWNEXT_GET(data)	\
111*97a077a0SMatthew Dillon 		(((data) & NVME_FWSLOT_CRF_FWNEXT_MASK) >> 4)
112*97a077a0SMatthew Dillon #define NVME_FWSLOT_CRF_FWCURR_GET(data)	\
113*97a077a0SMatthew Dillon 		((data) & NVME_FWSLOT_CRF_FWCURR_MASK)
114*97a077a0SMatthew Dillon 
115*97a077a0SMatthew Dillon /*
116*97a077a0SMatthew Dillon  * Command Supported and Effects (Log ID 05) (4096 bytes)
117*97a077a0SMatthew Dillon  *
118*97a077a0SMatthew Dillon  * Iterates available admin and I/O commands, one command-effects data
119*97a077a0SMatthew Dillon  * structure for each command, indexed by command id.
120*97a077a0SMatthew Dillon  *
121*97a077a0SMatthew Dillon  * CSE - Indicates whether command must be serialized (i.e. no other
122*97a077a0SMatthew Dillon  *	 commands may be pending in the namespace or globally).
123*97a077a0SMatthew Dillon  *
124*97a077a0SMatthew Dillon  * CSUPP - Indicates that the command is supported by the controller
125*97a077a0SMatthew Dillon  *	   (use for iteration skip).
126*97a077a0SMatthew Dillon  */
127*97a077a0SMatthew Dillon typedef struct {
128*97a077a0SMatthew Dillon 	uint32_t	admin_cmds[256];
129*97a077a0SMatthew Dillon 	uint32_t	io_cmds[256];
130*97a077a0SMatthew Dillon } __packed nvme_cmdeff_data_t;
131*97a077a0SMatthew Dillon 
132*97a077a0SMatthew Dillon #define NVME_CMDEFF_RESERVED19		0xFFF80000U
133*97a077a0SMatthew Dillon #define NVME_CMDEFF_CSE_MASK		0x00007000U
134*97a077a0SMatthew Dillon #define NVME_CMDEFF_RESERVED05		0x00000FE0U
135*97a077a0SMatthew Dillon #define NVME_CMDEFF_CCC			0x00000010U
136*97a077a0SMatthew Dillon #define NVME_CMDEFF_NIC			0x00000008U
137*97a077a0SMatthew Dillon #define NVME_CMDEFF_NCC			0x00000004U
138*97a077a0SMatthew Dillon #define NVME_CMDEFF_LBCC		0x00000002U
139*97a077a0SMatthew Dillon #define NVME_CMDEFF_CSUPP		0x00000001U
140*97a077a0SMatthew Dillon 
141*97a077a0SMatthew Dillon #define NVME_CMDEFF_CSE_NORM		0x00000000U
142*97a077a0SMatthew Dillon #define NVME_CMDEFF_CSE_NS_SERIALIZE	0x00001000U
143*97a077a0SMatthew Dillon #define NVME_CMDEFF_CSE_GLOB_SERIALIZE	0x00002000U
144*97a077a0SMatthew Dillon 
145*97a077a0SMatthew Dillon /*
146*97a077a0SMatthew Dillon  * Reservation Notification (Log ID 0x80) (64 bytes)
147*97a077a0SMatthew Dillon  */
148*97a077a0SMatthew Dillon typedef struct {
149*97a077a0SMatthew Dillon 	uint64_t	logpg_count;
150*97a077a0SMatthew Dillon 	uint8_t		type;
151*97a077a0SMatthew Dillon 	uint8_t		logpg_avail;
152*97a077a0SMatthew Dillon 	uint8_t		reserved10[2];
153*97a077a0SMatthew Dillon 	uint32_t	nsid;
154*97a077a0SMatthew Dillon 	uint8_t		reserved16[48];
155*97a077a0SMatthew Dillon } __packed nvme_resnotify_data_t;
156*97a077a0SMatthew Dillon 
157*97a077a0SMatthew Dillon #define NVME_RESNOTIFY_EMPTY		0x00
158*97a077a0SMatthew Dillon #define NVME_RESNOTIFY_REG_PREEMPTED	0x01
159*97a077a0SMatthew Dillon #define NVME_RESNOTIFY_RES_RELEASED	0x02
160*97a077a0SMatthew Dillon #define NVME_RESNOTIFY_RES_PREEMPTED	0x03
161*97a077a0SMatthew Dillon 					/* 04-FF reserved */
162*97a077a0SMatthew Dillon 
163*97a077a0SMatthew Dillon /* TYPE_CSS status */
164*97a077a0SMatthew Dillon #define NVME_RESNOTIFY_INVALID		0x09
165