1e355a444SMarkus Pfeiffer#- 2e355a444SMarkus Pfeiffer# Copyright (c) 2006 M. Warner Losh 3e355a444SMarkus Pfeiffer# All rights reserved. 4e355a444SMarkus Pfeiffer# 5e355a444SMarkus Pfeiffer# Redistribution and use in source and binary forms, with or without 6e355a444SMarkus Pfeiffer# modification, are permitted provided that the following conditions 7e355a444SMarkus Pfeiffer# are met: 8e355a444SMarkus Pfeiffer# 1. Redistributions of source code must retain the above copyright 9e355a444SMarkus Pfeiffer# notice, this list of conditions and the following disclaimer. 10e355a444SMarkus Pfeiffer# 2. Redistributions in binary form must reproduce the above copyright 11e355a444SMarkus Pfeiffer# notice, this list of conditions and the following disclaimer in the 12e355a444SMarkus Pfeiffer# documentation and/or other materials provided with the distribution. 13e355a444SMarkus Pfeiffer# 14e355a444SMarkus Pfeiffer# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15e355a444SMarkus Pfeiffer# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16e355a444SMarkus Pfeiffer# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17e355a444SMarkus Pfeiffer# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18e355a444SMarkus Pfeiffer# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19e355a444SMarkus Pfeiffer# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20e355a444SMarkus Pfeiffer# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21e355a444SMarkus Pfeiffer# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22e355a444SMarkus Pfeiffer# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23e355a444SMarkus Pfeiffer# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24e355a444SMarkus Pfeiffer# SUCH DAMAGE. 25e355a444SMarkus Pfeiffer# 26e355a444SMarkus Pfeiffer# Portions of this software may have been developed with reference to 27e355a444SMarkus Pfeiffer# the SD Simplified Specification. The following disclaimer may apply: 28e355a444SMarkus Pfeiffer# 29e355a444SMarkus Pfeiffer# The following conditions apply to the release of the simplified 30e355a444SMarkus Pfeiffer# specification ("Simplified Specification") by the SD Card Association and 31e355a444SMarkus Pfeiffer# the SD Group. The Simplified Specification is a subset of the complete SD 32e355a444SMarkus Pfeiffer# Specification which is owned by the SD Card Association and the SD 33e355a444SMarkus Pfeiffer# Group. This Simplified Specification is provided on a non-confidential 34e355a444SMarkus Pfeiffer# basis subject to the disclaimers below. Any implementation of the 35e355a444SMarkus Pfeiffer# Simplified Specification may require a license from the SD Card 36e355a444SMarkus Pfeiffer# Association, SD Group, SD-3C LLC or other third parties. 37e355a444SMarkus Pfeiffer# 38e355a444SMarkus Pfeiffer# Disclaimers: 39e355a444SMarkus Pfeiffer# 40e355a444SMarkus Pfeiffer# The information contained in the Simplified Specification is presented only 41e355a444SMarkus Pfeiffer# as a standard specification for SD Cards and SD Host/Ancillary products and 42e355a444SMarkus Pfeiffer# is provided "AS-IS" without any representations or warranties of any 43e355a444SMarkus Pfeiffer# kind. No responsibility is assumed by the SD Group, SD-3C LLC or the SD 44e355a444SMarkus Pfeiffer# Card Association for any damages, any infringements of patents or other 45e355a444SMarkus Pfeiffer# right of the SD Group, SD-3C LLC, the SD Card Association or any third 46e355a444SMarkus Pfeiffer# parties, which may result from its use. No license is granted by 47e355a444SMarkus Pfeiffer# implication, estoppel or otherwise under any patent or other rights of the 48e355a444SMarkus Pfeiffer# SD Group, SD-3C LLC, the SD Card Association or any third party. Nothing 49e355a444SMarkus Pfeiffer# herein shall be construed as an obligation by the SD Group, the SD-3C LLC 50e355a444SMarkus Pfeiffer# or the SD Card Association to disclose or distribute any technical 51e355a444SMarkus Pfeiffer# information, know-how or other confidential information to any third party. 52e355a444SMarkus Pfeiffer# 53e355a444SMarkus Pfeiffer# 54e355a444SMarkus Pfeiffer 55e355a444SMarkus Pfeiffer# 56e355a444SMarkus Pfeiffer# This is the set of callbacks that mmc bridges call into the bus, or 57e355a444SMarkus Pfeiffer# that mmc/sd card drivers call to make requests. 58e355a444SMarkus Pfeiffer# 59e355a444SMarkus Pfeiffer 60e355a444SMarkus Pfeiffer#include <sys/types.h> 6170a02aadSImre Vadász#include <sys/bus.h> 62e355a444SMarkus Pfeiffer#include <sys/sysctl.h> 63e355a444SMarkus Pfeiffer#include <sys/taskqueue.h> 64e355a444SMarkus Pfeiffer 65e355a444SMarkus Pfeiffer#include <bus/mmc/bridge.h> 66e355a444SMarkus Pfeiffer#include <dev/disk/sdhci/sdhci.h> 67e355a444SMarkus Pfeiffer 68*7ba10b88SImre VadászCODE { 69*7ba10b88SImre Vadász static void 70*7ba10b88SImre Vadász null_set_uhs_timing(device_t brdev __unused, 71*7ba10b88SImre Vadász struct sdhci_slot *slot __unused) 72*7ba10b88SImre Vadász { 73*7ba10b88SImre Vadász 74*7ba10b88SImre Vadász } 75*7ba10b88SImre Vadász} 76*7ba10b88SImre Vadász 77e355a444SMarkus PfeifferINTERFACE sdhci; 78e355a444SMarkus Pfeiffer 79e355a444SMarkus PfeifferMETHOD uint8_t read_1 { 80e355a444SMarkus Pfeiffer device_t brdev; 81e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 82e355a444SMarkus Pfeiffer bus_size_t off; 83e355a444SMarkus Pfeiffer} 84e355a444SMarkus Pfeiffer 85e355a444SMarkus PfeifferMETHOD uint16_t read_2 { 86e355a444SMarkus Pfeiffer device_t brdev; 87e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 88e355a444SMarkus Pfeiffer bus_size_t off; 89e355a444SMarkus Pfeiffer} 90e355a444SMarkus Pfeiffer 91e355a444SMarkus PfeifferMETHOD uint32_t read_4 { 92e355a444SMarkus Pfeiffer device_t brdev; 93e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 94e355a444SMarkus Pfeiffer bus_size_t off; 95e355a444SMarkus Pfeiffer} 96e355a444SMarkus Pfeiffer 97e355a444SMarkus PfeifferMETHOD void read_multi_4 { 98e355a444SMarkus Pfeiffer device_t brdev; 99e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 100e355a444SMarkus Pfeiffer bus_size_t off; 101e355a444SMarkus Pfeiffer uint32_t *data; 102e355a444SMarkus Pfeiffer bus_size_t count; 103e355a444SMarkus Pfeiffer} 104e355a444SMarkus Pfeiffer 105e355a444SMarkus PfeifferMETHOD void write_1 { 106e355a444SMarkus Pfeiffer device_t brdev; 107e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 108e355a444SMarkus Pfeiffer bus_size_t off; 109e355a444SMarkus Pfeiffer uint8_t val; 110e355a444SMarkus Pfeiffer} 111e355a444SMarkus Pfeiffer 112e355a444SMarkus PfeifferMETHOD void write_2 { 113e355a444SMarkus Pfeiffer device_t brdev; 114e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 115e355a444SMarkus Pfeiffer bus_size_t off; 116e355a444SMarkus Pfeiffer uint16_t val; 117e355a444SMarkus Pfeiffer} 118e355a444SMarkus Pfeiffer 119e355a444SMarkus PfeifferMETHOD void write_4 { 120e355a444SMarkus Pfeiffer device_t brdev; 121e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 122e355a444SMarkus Pfeiffer bus_size_t off; 123e355a444SMarkus Pfeiffer uint32_t val; 124e355a444SMarkus Pfeiffer} 125e355a444SMarkus Pfeiffer 126e355a444SMarkus PfeifferMETHOD void write_multi_4 { 127e355a444SMarkus Pfeiffer device_t brdev; 128e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 129e355a444SMarkus Pfeiffer bus_size_t off; 130e355a444SMarkus Pfeiffer uint32_t *data; 131e355a444SMarkus Pfeiffer bus_size_t count; 132e355a444SMarkus Pfeiffer} 133e355a444SMarkus Pfeiffer 134e355a444SMarkus PfeifferMETHOD int platform_will_handle { 135e355a444SMarkus Pfeiffer device_t brdev; 136e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 137e355a444SMarkus Pfeiffer} 138e355a444SMarkus Pfeiffer 139e355a444SMarkus PfeifferMETHOD void platform_start_transfer { 140e355a444SMarkus Pfeiffer device_t brdev; 141e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 142e355a444SMarkus Pfeiffer uint32_t *intmask; 143e355a444SMarkus Pfeiffer} 144e355a444SMarkus Pfeiffer 145e355a444SMarkus PfeifferMETHOD void platform_finish_transfer { 146e355a444SMarkus Pfeiffer device_t brdev; 147e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 148e355a444SMarkus Pfeiffer} 149e355a444SMarkus Pfeiffer 150e355a444SMarkus PfeifferMETHOD uint32_t min_freq { 151e355a444SMarkus Pfeiffer device_t brdev; 152e355a444SMarkus Pfeiffer struct sdhci_slot *slot; 153e355a444SMarkus Pfeiffer} DEFAULT sdhci_generic_min_freq; 1547f03b76bSImre Vadász 1557f03b76bSImre VadászMETHOD boolean_t get_card_present { 1567f03b76bSImre Vadász device_t brdev; 1577f03b76bSImre Vadász struct sdhci_slot *slot; 1587f03b76bSImre Vadász} DEFAULT sdhci_generic_get_card_present; 159*7ba10b88SImre Vadász 160*7ba10b88SImre VadászMETHOD void set_uhs_timing { 161*7ba10b88SImre Vadász device_t brdev; 162*7ba10b88SImre Vadász struct sdhci_slot *slot; 163*7ba10b88SImre Vadász} DEFAULT null_set_uhs_timing; 164