1 /* 2 * Copyright (c) 2009 The DragonFly Project. All rights reserved. 3 * 4 * This code is derived from software contributed to The DragonFly Project 5 * by Matthew Dillon <dillon@backplane.com> 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in 15 * the documentation and/or other materials provided with the 16 * distribution. 17 * 3. Neither the name of The DragonFly Project nor the names of its 18 * contributors may be used to endorse or promote products derived 19 * from this software without specific, prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 22 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 23 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 24 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 25 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING, 27 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 28 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 29 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 31 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 * 35 * Copyright (c) 2006 David Gwynne <dlg@openbsd.org> 36 * 37 * Permission to use, copy, modify, and distribute this software for any 38 * purpose with or without fee is hereby granted, provided that the above 39 * copyright notice and this permission notice appear in all copies. 40 * 41 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 42 * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 43 * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 44 * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 45 * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 46 * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 47 * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 48 * 49 * 50 * 51 * $OpenBSD: sili.c,v 1.147 2009/02/16 21:19:07 miod Exp $ 52 */ 53 54 #include "sili.h" 55 56 void sili_port_interrupt_enable(struct sili_port *ap); 57 void sili_port_interrupt_redisable(struct sili_port *ap); 58 void sili_port_interrupt_reenable(struct sili_port *ap); 59 60 int sili_load_prb(struct sili_ccb *); 61 void sili_unload_prb(struct sili_ccb *); 62 static void sili_load_prb_callback(void *info, bus_dma_segment_t *segs, 63 int nsegs, int error); 64 void sili_start(struct sili_ccb *); 65 static void sili_port_reinit(struct sili_port *ap); 66 int sili_port_softreset(struct sili_port *ap); 67 int sili_port_hardreset(struct sili_port *ap); 68 void sili_port_hardstop(struct sili_port *ap); 69 void sili_port_listen(struct sili_port *ap); 70 71 static void sili_ata_cmd_timeout_unserialized(void *); 72 static int sili_core_timeout(struct sili_ccb *ccb, int really_error); 73 void sili_check_active_timeouts(struct sili_port *ap); 74 75 void sili_issue_pending_commands(struct sili_port *ap, struct sili_ccb *ccb); 76 77 void sili_port_read_ncq_error(struct sili_port *, int); 78 79 struct sili_dmamem *sili_dmamem_alloc(struct sili_softc *, bus_dma_tag_t tag); 80 void sili_dmamem_free(struct sili_softc *, struct sili_dmamem *); 81 static void sili_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error); 82 83 static void sili_dummy_done(struct ata_xfer *xa); 84 static void sili_empty_done(struct sili_ccb *ccb); 85 static void sili_ata_cmd_done(struct sili_ccb *ccb); 86 87 /* 88 * Initialize the global SILI hardware. This code does not set up any of 89 * its ports. 90 */ 91 int 92 sili_init(struct sili_softc *sc) 93 { 94 DPRINTF(SILI_D_VERBOSE, " GHC 0x%b", 95 sili_read(sc, SILI_REG_GHC), SILI_FMT_GHC); 96 97 /* 98 * Reset the entire chip. This also resets all ports. 99 * 100 * The spec doesn't say anything about how long we have to 101 * wait, so wait 10ms. 102 */ 103 sili_write(sc, SILI_REG_GCTL, SILI_REG_GCTL_GRESET); 104 sili_os_sleep(10); 105 sili_write(sc, SILI_REG_GCTL, 0); 106 sili_os_sleep(10); 107 108 return (0); 109 } 110 111 /* 112 * Allocate and initialize an SILI port. 113 */ 114 int 115 sili_port_alloc(struct sili_softc *sc, u_int port) 116 { 117 struct sili_port *ap; 118 struct ata_port *at; 119 struct sili_prb *prb; 120 struct sili_ccb *ccb; 121 int rc = ENOMEM; 122 int error; 123 int i; 124 125 ap = kmalloc(sizeof(*ap), M_DEVBUF, M_WAITOK | M_ZERO); 126 ap->ap_err_scratch = kmalloc(512, M_DEVBUF, M_WAITOK | M_ZERO); 127 128 ksnprintf(ap->ap_name, sizeof(ap->ap_name), "%s%d.%d", 129 device_get_name(sc->sc_dev), 130 device_get_unit(sc->sc_dev), 131 port); 132 sc->sc_ports[port] = ap; 133 134 /* 135 * Allocate enough so we never have to reallocate, it makes 136 * it easier. 137 * 138 * ap_pmcount will be reduced by the scan if we encounter the 139 * port multiplier port prior to target 15. 140 */ 141 if (ap->ap_ata == NULL) { 142 ap->ap_ata = kmalloc(sizeof(*ap->ap_ata) * SILI_MAX_PMPORTS, 143 M_DEVBUF, M_INTWAIT | M_ZERO); 144 for (i = 0; i < SILI_MAX_PMPORTS; ++i) { 145 at = &ap->ap_ata[i]; 146 at->at_sili_port = ap; 147 at->at_target = i; 148 at->at_probe = ATA_PROBE_NEED_INIT; 149 at->at_features |= ATA_PORT_F_RESCAN; 150 ksnprintf(at->at_name, sizeof(at->at_name), 151 "%s.%d", ap->ap_name, i); 152 } 153 } 154 if (bus_space_subregion(sc->sc_piot, sc->sc_pioh, 155 SILI_PORT_REGION(port), SILI_PORT_SIZE, 156 &ap->ap_ioh) != 0) { 157 device_printf(sc->sc_dev, 158 "unable to create register window for port %d\n", 159 port); 160 goto freeport; 161 } 162 163 ap->ap_sc = sc; 164 ap->ap_num = port; 165 ap->ap_probe = ATA_PROBE_NEED_INIT; 166 TAILQ_INIT(&ap->ap_ccb_free); 167 TAILQ_INIT(&ap->ap_ccb_pending); 168 lockinit(&ap->ap_ccb_lock, "silipo", 0, 0); 169 170 /* Disable port interrupts */ 171 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_MASK); 172 173 /* 174 * Reset the port. This is similar to a Device Reset but far 175 * more invasive. We use Device Reset in our hardreset function. 176 * This function also does the same OOB initialization sequence 177 * that Device Reset does. 178 * 179 * NOTE: SILI_PREG_STATUS_READY will not be asserted unless and until 180 * a device is connected to the port, so we can't use it to 181 * verify that the port exists. 182 */ 183 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET); 184 if (sili_pread(ap, SILI_PREG_STATUS) & SILI_PREG_STATUS_READY) { 185 device_printf(sc->sc_dev, 186 "Port %d will not go into reset\n", port); 187 goto freeport; 188 } 189 sili_os_sleep(10); 190 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESET); 191 192 /* 193 * Allocate the SGE Table 194 */ 195 ap->ap_dmamem_prbs = sili_dmamem_alloc(sc, sc->sc_tag_prbs); 196 if (ap->ap_dmamem_prbs == NULL) { 197 kprintf("%s: NOSGET\n", PORTNAME(ap)); 198 goto freeport; 199 } 200 201 /* 202 * Set up the SGE table base address 203 */ 204 ap->ap_prbs = (struct sili_prb *)SILI_DMA_KVA(ap->ap_dmamem_prbs); 205 206 /* 207 * Allocate a CCB for each command slot 208 */ 209 ap->ap_ccbs = kmalloc(sizeof(struct sili_ccb) * sc->sc_ncmds, M_DEVBUF, 210 M_WAITOK | M_ZERO); 211 if (ap->ap_ccbs == NULL) { 212 device_printf(sc->sc_dev, 213 "unable to allocate command list for port %d\n", 214 port); 215 goto freeport; 216 } 217 218 /* 219 * Most structures are in the port BAR. Assign convenient 220 * pointers in the CCBs 221 */ 222 for (i = 0; i < sc->sc_ncmds; i++) { 223 ccb = &ap->ap_ccbs[i]; 224 225 error = bus_dmamap_create(sc->sc_tag_data, BUS_DMA_ALLOCNOW, 226 &ccb->ccb_dmamap); 227 if (error) { 228 device_printf(sc->sc_dev, 229 "unable to create dmamap for port %d " 230 "ccb %d\n", port, i); 231 goto freeport; 232 } 233 234 /* 235 * WARNING!!! Access to the rfis is only allowed under very 236 * carefully controlled circumstances because it 237 * is located in the LRAM and reading from the 238 * LRAM has hardware issues which can blow the 239 * port up. I kid you not (from Linux, and 240 * verified by testing here). 241 */ 242 callout_init(&ccb->ccb_timeout); 243 ccb->ccb_slot = i; 244 ccb->ccb_port = ap; 245 ccb->ccb_prb = &ap->ap_prbs[i]; 246 ccb->ccb_prb_paddr = SILI_DMA_DVA(ap->ap_dmamem_prbs) + 247 sizeof(*ccb->ccb_prb) * i; 248 ccb->ccb_xa.fis = &ccb->ccb_prb->prb_h2d; 249 prb = bus_space_kva(ap->ap_sc->sc_iot, ap->ap_ioh, 250 SILI_PREG_LRAM_SLOT(i)); 251 ccb->ccb_prb_lram = prb; 252 /* 253 * Point our rfis to host-memory instead of the LRAM PRB. 254 * It will be copied back if ATA_F_AUTOSENSE is set. The 255 * LRAM PRB is buggy. 256 */ 257 /*ccb->ccb_xa.rfis = &prb->prb_d2h;*/ 258 ccb->ccb_xa.rfis = (void *)ccb->ccb_xa.fis; 259 260 ccb->ccb_xa.packetcmd = prb_packet(ccb->ccb_prb); 261 ccb->ccb_xa.tag = i; 262 263 ccb->ccb_xa.state = ATA_S_COMPLETE; 264 265 /* 266 * Reserve CCB[1] as the error CCB. It doesn't matter 267 * which one we use for the Sili controllers. 268 */ 269 if (i == 1) 270 ap->ap_err_ccb = ccb; 271 else 272 sili_put_ccb(ccb); 273 } 274 /* 275 * Do not call sili_port_init() here, the helper thread will 276 * call it for the parallel probe 277 */ 278 sili_os_start_port(ap); 279 return(0); 280 freeport: 281 sili_port_free(sc, port); 282 return (rc); 283 } 284 285 /* 286 * This is called once by the low level attach (from the helper thread) 287 * to get the port state machine rolling, and typically only called again 288 * on a hot-plug insertion event. 289 * 290 * This is called for PM attachments and hot-plug insertion events, and 291 * typically not called again until after an unplug/replug sequence. 292 * 293 * Returns 0 if a device is successfully detected. 294 */ 295 int 296 sili_port_init(struct sili_port *ap) 297 { 298 /* 299 * Do a very hard reset of the port 300 */ 301 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET); 302 sili_os_sleep(10); 303 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESET); 304 305 /* 306 * Register initialization 307 */ 308 sili_pwrite(ap, SILI_PREG_FIFO_CTL, 309 SILI_PREG_FIFO_CTL_ENCODE(1024, 1024)); 310 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_32BITDMA | 311 SILI_PREG_CTL_PMA); 312 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_NOAUTOCC); 313 if (ap->ap_sc->sc_flags & SILI_F_SSNTF) 314 sili_pwrite(ap, SILI_PREG_SNTF, -1); 315 ap->ap_probe = ATA_PROBE_NEED_HARD_RESET; 316 ap->ap_pmcount = 0; 317 sili_port_interrupt_enable(ap); 318 return (0); 319 } 320 321 /* 322 * Handle an errored port. This routine is called when the only 323 * commands left on the queue are expired, meaning we can safely 324 * go through a port init to clear its state. 325 * 326 * We complete the expired CCBs and then restart the queue. 327 */ 328 static 329 void 330 sili_port_reinit(struct sili_port *ap) 331 { 332 struct sili_ccb *ccb; 333 struct ata_port *at; 334 int slot; 335 int target; 336 u_int32_t data; 337 338 if (bootverbose || 1) { 339 kprintf("%s: reiniting port after error reent=%d " 340 "expired=%08x\n", 341 PORTNAME(ap), 342 (ap->ap_flags & AP_F_REINIT_ACTIVE), 343 ap->ap_expired); 344 } 345 346 /* 347 * Clear port resume, clear bits 16:13 in the port device status 348 * register. This is from the data sheet. 349 * 350 * Data sheet does not specify a delay but it seems prudent. 351 */ 352 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME); 353 sili_os_sleep(10); 354 for (target = 0; target < SILI_MAX_PMPORTS; ++target) { 355 data = sili_pread(ap, SILI_PREG_PM_STATUS(target)); 356 data &= ~(SILI_PREG_PM_STATUS_SERVICE | 357 SILI_PREG_PM_STATUS_LEGACY | 358 SILI_PREG_PM_STATUS_NATIVE | 359 SILI_PREG_PM_STATUS_VBSY); 360 sili_pwrite(ap, SILI_PREG_PM_STATUS(target), data); 361 sili_pwrite(ap, SILI_PREG_PM_QACTIVE(target), 0); 362 } 363 364 /* 365 * Issue a Port Initialize and wait for it to clear. This flushes 366 * commands but does not reset the port. Then wait for port ready. 367 */ 368 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_INIT); 369 if (sili_pwait_clr_to(ap, 5000, SILI_PREG_STATUS, SILI_PREG_CTL_INIT)) { 370 kprintf("%s: Unable to reinit, port failed\n", 371 PORTNAME(ap)); 372 } 373 if (sili_pwait_set(ap, SILI_PREG_STATUS, SILI_PREG_STATUS_READY)) { 374 kprintf("%s: Unable to reinit, port will not come ready\n", 375 PORTNAME(ap)); 376 } 377 378 /* 379 * If reentrant, stop here. Otherwise the state for the original 380 * ahci_port_reinit() will get ripped out from under it. 381 */ 382 if (ap->ap_flags & AP_F_REINIT_ACTIVE) 383 return; 384 ap->ap_flags |= AP_F_REINIT_ACTIVE; 385 386 /* 387 * Read the LOG ERROR page for targets that returned a specific 388 * D2H FIS with ERR set. 389 * 390 * Don't bother if we are already using the error CCB. 391 */ 392 if ((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0) { 393 for (target = 0; target < SILI_MAX_PMPORTS; ++target) { 394 at = &ap->ap_ata[target]; 395 if (at->at_features & ATA_PORT_F_READLOG) { 396 at->at_features &= ~ATA_PORT_F_READLOG; 397 sili_port_read_ncq_error(ap, target); 398 } 399 } 400 } 401 402 /* 403 * Finally clean out the expired commands, we've probed the error 404 * status (or hopefully probed the error status). Well, ok, 405 * we probably didn't XXX. 406 */ 407 while (ap->ap_expired) { 408 slot = ffs(ap->ap_expired) - 1; 409 ap->ap_expired &= ~(1 << slot); 410 KKASSERT(ap->ap_active & (1 << slot)); 411 ap->ap_active &= ~(1 << slot); 412 --ap->ap_active_cnt; 413 ccb = &ap->ap_ccbs[slot]; 414 ccb->ccb_xa.state = ATA_S_TIMEOUT; 415 ccb->ccb_done(ccb); 416 ccb->ccb_xa.complete(&ccb->ccb_xa); 417 } 418 ap->ap_flags &= ~AP_F_REINIT_ACTIVE; 419 420 /* 421 * Wow. All done. We can get the port moving again. 422 */ 423 if (ap->ap_probe == ATA_PROBE_FAILED) { 424 kprintf("%s: reinit failed, port is dead\n", PORTNAME(ap)); 425 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) { 426 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry); 427 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED; 428 ccb->ccb_xa.state = ATA_S_TIMEOUT; 429 ccb->ccb_done(ccb); 430 ccb->ccb_xa.complete(&ccb->ccb_xa); 431 } 432 } else { 433 sili_issue_pending_commands(ap, NULL); 434 } 435 } 436 437 /* 438 * Enable or re-enable interrupts on a port. 439 * 440 * This routine is called from the port initialization code or from the 441 * helper thread as the real interrupt may be forced to turn off certain 442 * interrupt sources. 443 */ 444 void 445 sili_port_interrupt_enable(struct sili_port *ap) 446 { 447 u_int32_t data; 448 449 data = SILI_PREG_INT_CCOMPLETE | SILI_PREG_INT_CERROR | 450 SILI_PREG_INT_PHYRDYCHG | SILI_PREG_INT_DEVEXCHG | 451 SILI_PREG_INT_DECODE | SILI_PREG_INT_CRC | 452 SILI_PREG_INT_HANDSHK | SILI_PREG_INT_PMCHANGE; 453 if (ap->ap_sc->sc_flags & SILI_F_SSNTF) 454 data |= SILI_PREG_INT_SDB; 455 sili_pwrite(ap, SILI_PREG_INT_ENABLE, data); 456 } 457 458 void 459 sili_port_interrupt_redisable(struct sili_port *ap) 460 { 461 u_int32_t data; 462 463 data = sili_read(ap->ap_sc, SILI_REG_GCTL); 464 data &= SILI_REG_GINT_PORTMASK; 465 data &= ~(1 << ap->ap_num); 466 sili_write(ap->ap_sc, SILI_REG_GCTL, data); 467 } 468 469 void 470 sili_port_interrupt_reenable(struct sili_port *ap) 471 { 472 u_int32_t data; 473 474 data = sili_read(ap->ap_sc, SILI_REG_GCTL); 475 data &= SILI_REG_GINT_PORTMASK; 476 data |= (1 << ap->ap_num); 477 sili_write(ap->ap_sc, SILI_REG_GCTL, data); 478 } 479 480 /* 481 * Run the port / target state machine from a main context. 482 * 483 * The state machine for the port is always run. 484 * 485 * If atx is non-NULL run the state machine for a particular target. 486 * If atx is NULL run the state machine for all targets. 487 */ 488 void 489 sili_port_state_machine(struct sili_port *ap, int initial) 490 { 491 struct ata_port *at; 492 u_int32_t data; 493 int target; 494 int didsleep; 495 int loop; 496 497 /* 498 * State machine for port. Note that CAM is not yet associated 499 * during the initial parallel probe and the port's probe state 500 * will not get past ATA_PROBE_NEED_IDENT. 501 */ 502 { 503 if (initial == 0 && ap->ap_probe <= ATA_PROBE_NEED_HARD_RESET) { 504 kprintf("%s: Waiting 7 seconds on insertion\n", 505 PORTNAME(ap)); 506 sili_os_sleep(7000); 507 initial = 1; 508 } 509 if (ap->ap_probe == ATA_PROBE_NEED_INIT) 510 sili_port_init(ap); 511 if (ap->ap_probe == ATA_PROBE_NEED_HARD_RESET) 512 sili_port_reset(ap, NULL, 1); 513 if (ap->ap_probe == ATA_PROBE_NEED_SOFT_RESET) 514 sili_port_reset(ap, NULL, 0); 515 if (ap->ap_probe == ATA_PROBE_NEED_IDENT) 516 sili_cam_probe(ap, NULL); 517 } 518 if (ap->ap_type != ATA_PORT_T_PM) { 519 if (ap->ap_probe == ATA_PROBE_FAILED) { 520 sili_cam_changed(ap, NULL, 0); 521 } else if (ap->ap_probe >= ATA_PROBE_NEED_IDENT) { 522 sili_cam_changed(ap, NULL, 1); 523 } 524 return; 525 } 526 527 /* 528 * Port Multiplier state machine. 529 * 530 * Get a mask of changed targets and combine with any runnable 531 * states already present. 532 */ 533 for (loop = 0; ;++loop) { 534 if (sili_pm_read(ap, 15, SATA_PMREG_EINFO, &data)) { 535 kprintf("%s: PM unable to read hot-plug bitmap\n", 536 PORTNAME(ap)); 537 break; 538 } 539 540 /* 541 * Do at least one loop, then stop if no more state changes 542 * have occured. The PM might not generate a new 543 * notification until we clear the entire bitmap. 544 */ 545 if (loop && data == 0) 546 break; 547 548 /* 549 * New devices showing up in the bitmap require some spin-up 550 * time before we start probing them. Reset didsleep. The 551 * first new device we detect will sleep before probing. 552 * 553 * This only applies to devices whos change bit is set in 554 * the data, and does not apply to the initial boot-time 555 * probe. 556 */ 557 didsleep = 0; 558 559 for (target = 0; target < ap->ap_pmcount; ++target) { 560 at = &ap->ap_ata[target]; 561 562 /* 563 * Check the target state for targets behind the PM 564 * which have changed state. This will adjust 565 * at_probe and set ATA_PORT_F_RESCAN 566 * 567 * We want to wait at least 10 seconds before probing 568 * a newly inserted device. If the check status 569 * indicates a device is present and in need of a 570 * hard reset, we make sure we have slept before 571 * continuing. 572 * 573 * We also need to wait at least 1 second for the 574 * PHY state to change after insertion, if we 575 * haven't already waited the 10 seconds. 576 * 577 * NOTE: When pm_check_good finds a good port it 578 * typically starts us in probe state 579 * NEED_HARD_RESET rather than INIT. 580 */ 581 if (data & (1 << target)) { 582 if (initial == 0 && didsleep == 0) 583 sili_os_sleep(1000); 584 sili_pm_check_good(ap, target); 585 if (initial == 0 && didsleep == 0 && 586 at->at_probe <= ATA_PROBE_NEED_HARD_RESET 587 ) { 588 didsleep = 1; 589 kprintf("%s: Waiting 10 seconds on insertion\n", PORTNAME(ap)); 590 sili_os_sleep(10000); 591 } 592 } 593 594 /* 595 * Report hot-plug events before the probe state 596 * really gets hot. Only actual events are reported 597 * here to reduce spew. 598 */ 599 if (data & (1 << target)) { 600 kprintf("%s: HOTPLUG (PM) - ", ATANAME(ap, at)); 601 switch(at->at_probe) { 602 case ATA_PROBE_NEED_INIT: 603 case ATA_PROBE_NEED_HARD_RESET: 604 kprintf("Device inserted\n"); 605 break; 606 case ATA_PROBE_FAILED: 607 kprintf("Device removed\n"); 608 break; 609 default: 610 kprintf("Device probe in progress\n"); 611 break; 612 } 613 } 614 615 /* 616 * Run through the state machine as necessary if 617 * the port is not marked failed. 618 * 619 * The state machine may stop at NEED_IDENT if 620 * CAM is not yet attached. 621 * 622 * Acquire exclusive access to the port while we 623 * are doing this. This prevents command-completion 624 * from queueing commands for non-polled targets 625 * inbetween our probe steps. We need to do this 626 * because the reset probes can generate severe PHY 627 * and protocol errors and soft-brick the port. 628 */ 629 if (at->at_probe != ATA_PROBE_FAILED && 630 at->at_probe != ATA_PROBE_GOOD) { 631 if (at->at_probe == ATA_PROBE_NEED_INIT) 632 sili_pm_port_init(ap, at); 633 if (at->at_probe == ATA_PROBE_NEED_HARD_RESET) 634 sili_port_reset(ap, at, 1); 635 if (at->at_probe == ATA_PROBE_NEED_SOFT_RESET) 636 sili_port_reset(ap, at, 0); 637 if (at->at_probe == ATA_PROBE_NEED_IDENT) 638 sili_cam_probe(ap, at); 639 } 640 641 /* 642 * Add or remove from CAM 643 */ 644 if (at->at_features & ATA_PORT_F_RESCAN) { 645 at->at_features &= ~ATA_PORT_F_RESCAN; 646 if (at->at_probe == ATA_PROBE_FAILED) { 647 sili_cam_changed(ap, at, 0); 648 } else if (at->at_probe >= ATA_PROBE_NEED_IDENT) { 649 sili_cam_changed(ap, at, 1); 650 } 651 } 652 data &= ~(1 << target); 653 } 654 if (data) { 655 kprintf("%s: WARNING (PM): extra bits set in " 656 "EINFO: %08x\n", PORTNAME(ap), data); 657 while (target < SILI_MAX_PMPORTS) { 658 sili_pm_check_good(ap, target); 659 ++target; 660 } 661 } 662 } 663 } 664 665 /* 666 * De-initialize and detach a port. 667 */ 668 void 669 sili_port_free(struct sili_softc *sc, u_int port) 670 { 671 struct sili_port *ap = sc->sc_ports[port]; 672 struct sili_ccb *ccb; 673 674 /* 675 * Ensure port is disabled and its interrupts are all flushed. 676 */ 677 if (ap->ap_sc) { 678 sili_os_stop_port(ap); 679 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_MASK); 680 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET); 681 sili_write(ap->ap_sc, SILI_REG_GCTL, 682 sili_read(ap->ap_sc, SILI_REG_GCTL) & 683 ~SILI_REG_GINT_PORTST(ap->ap_num)); 684 } 685 686 if (ap->ap_ccbs) { 687 while ((ccb = sili_get_ccb(ap)) != NULL) { 688 if (ccb->ccb_dmamap) { 689 bus_dmamap_destroy(sc->sc_tag_data, 690 ccb->ccb_dmamap); 691 ccb->ccb_dmamap = NULL; 692 } 693 } 694 if ((ccb = ap->ap_err_ccb) != NULL) { 695 if (ccb->ccb_dmamap) { 696 bus_dmamap_destroy(sc->sc_tag_data, 697 ccb->ccb_dmamap); 698 ccb->ccb_dmamap = NULL; 699 } 700 ap->ap_err_ccb = NULL; 701 } 702 kfree(ap->ap_ccbs, M_DEVBUF); 703 ap->ap_ccbs = NULL; 704 } 705 706 if (ap->ap_dmamem_prbs) { 707 sili_dmamem_free(sc, ap->ap_dmamem_prbs); 708 ap->ap_dmamem_prbs = NULL; 709 } 710 if (ap->ap_ata) { 711 kfree(ap->ap_ata, M_DEVBUF); 712 ap->ap_ata = NULL; 713 } 714 if (ap->ap_err_scratch) { 715 kfree(ap->ap_err_scratch, M_DEVBUF); 716 ap->ap_err_scratch = NULL; 717 } 718 719 /* bus_space(9) says we dont free the subregions handle */ 720 721 kfree(ap, M_DEVBUF); 722 sc->sc_ports[port] = NULL; 723 } 724 725 /* 726 * Reset a port. 727 * 728 * If hard is 0 perform a softreset of the port. 729 * If hard is 1 perform a hard reset of the port. 730 * If hard is 2 perform a hard reset of the port and cycle the phy. 731 * 732 * If at is non-NULL an indirect port via a port-multiplier is being 733 * reset, otherwise a direct port is being reset. 734 * 735 * NOTE: Indirect ports can only be soft-reset. 736 */ 737 int 738 sili_port_reset(struct sili_port *ap, struct ata_port *at, int hard) 739 { 740 int rc; 741 742 if (hard) { 743 if (at) 744 rc = sili_pm_hardreset(ap, at->at_target, hard); 745 else 746 rc = sili_port_hardreset(ap); 747 } else { 748 if (at) 749 rc = sili_pm_softreset(ap, at->at_target); 750 else 751 rc = sili_port_softreset(ap); 752 } 753 return(rc); 754 } 755 756 /* 757 * SILI soft reset, Section 10.4.1 758 * 759 * (at) will be NULL when soft-resetting a directly-attached device, and 760 * non-NULL when soft-resetting a device through a port multiplier. 761 * 762 * This function keeps port communications intact and attempts to generate 763 * a reset to the connected device using device commands. 764 */ 765 int 766 sili_port_softreset(struct sili_port *ap) 767 { 768 struct sili_ccb *ccb = NULL; 769 struct sili_prb *prb; 770 int error; 771 u_int32_t sig; 772 773 error = EIO; 774 775 if (bootverbose) 776 kprintf("%s: START SOFTRESET\n", PORTNAME(ap)); 777 778 crit_enter(); 779 ap->ap_state = AP_S_NORMAL; 780 781 /* 782 * Prep the special soft-reset SII command. 783 */ 784 ccb = sili_get_err_ccb(ap); 785 ccb->ccb_done = sili_empty_done; 786 ccb->ccb_xa.flags = ATA_F_POLL | ATA_F_AUTOSENSE | ATA_F_EXCLUSIVE; 787 ccb->ccb_xa.complete = sili_dummy_done; 788 ccb->ccb_xa.at = NULL; 789 790 prb = ccb->ccb_prb; 791 bzero(&prb->prb_h2d, sizeof(prb->prb_h2d)); 792 prb->prb_h2d.flags = 0; 793 prb->prb_control = SILI_PRB_CTRL_SOFTRESET; 794 prb->prb_override = 0; 795 prb->prb_xfer_count = 0; 796 797 ccb->ccb_xa.state = ATA_S_PENDING; 798 799 /* 800 * NOTE: Must use sili_quick_timeout() because we hold the err_ccb 801 */ 802 if (sili_poll(ccb, 8000, sili_quick_timeout) != ATA_S_COMPLETE) { 803 kprintf("%s: First FIS failed\n", PORTNAME(ap)); 804 goto err; 805 } 806 807 sig = (prb->prb_d2h.lba_high << 24) | 808 (prb->prb_d2h.lba_mid << 16) | 809 (prb->prb_d2h.lba_low << 8) | 810 (prb->prb_d2h.sector_count); 811 if (bootverbose) 812 kprintf("%s: SOFTRESET SIGNATURE %08x\n", PORTNAME(ap), sig); 813 814 /* 815 * If the softreset is trying to clear a BSY condition after a 816 * normal portreset we assign the port type. 817 * 818 * If the softreset is being run first as part of the ccb error 819 * processing code then report if the device signature changed 820 * unexpectedly. 821 */ 822 if (ap->ap_type == ATA_PORT_T_NONE) { 823 ap->ap_type = sili_port_signature(ap, NULL, sig); 824 } else { 825 if (sili_port_signature(ap, NULL, sig) != ap->ap_type) { 826 kprintf("%s: device signature unexpectedly " 827 "changed\n", PORTNAME(ap)); 828 error = EBUSY; /* XXX */ 829 } 830 } 831 error = 0; 832 err: 833 if (ccb != NULL) { 834 sili_put_err_ccb(ccb); 835 } 836 837 /* 838 * If we failed to softreset make the port quiescent, otherwise 839 * make sure the port's start/stop state matches what it was on 840 * entry. 841 * 842 * Don't kill the port if the softreset is on a port multiplier 843 * target, that would kill all the targets! 844 */ 845 if (bootverbose) { 846 kprintf("%s: END SOFTRESET %d prob=%d state=%d\n", 847 PORTNAME(ap), error, ap->ap_probe, ap->ap_state); 848 } 849 if (error) { 850 sili_port_hardstop(ap); 851 /* ap_probe set to failed */ 852 } else { 853 ap->ap_probe = ATA_PROBE_NEED_IDENT; 854 ap->ap_pmcount = 1; 855 } 856 crit_exit(); 857 858 sili_pwrite(ap, SILI_PREG_SERR, -1); 859 if (bootverbose) 860 kprintf("%s: END SOFTRESET\n", PORTNAME(ap)); 861 862 return (error); 863 } 864 865 /* 866 * This function does a hard reset of the port. Note that the device 867 * connected to the port could still end-up hung. Phy detection is 868 * used to short-cut longer operations. 869 */ 870 int 871 sili_port_hardreset(struct sili_port *ap) 872 { 873 u_int32_t data; 874 int error; 875 int loop; 876 877 if (bootverbose) 878 kprintf("%s: START HARDRESET\n", PORTNAME(ap)); 879 880 ap->ap_state = AP_S_NORMAL; 881 882 /* 883 * Set SCTL up for any speed restrictions before issuing the 884 * device reset. This may also take us out of an INIT state 885 * (if we were previously in a continuous reset state from 886 * sili_port_listen()). 887 */ 888 data = SILI_PREG_SCTL_SPM_NONE | 889 SILI_PREG_SCTL_IPM_NONE | 890 SILI_PREG_SCTL_SPD_NONE | 891 SILI_PREG_SCTL_DET_NONE; 892 if (SiliForceGen1 & (1 << ap->ap_num)) { 893 data &= ~SILI_PREG_SCTL_SPD_NONE; 894 data |= SILI_PREG_SCTL_SPD_GEN1; 895 } 896 sili_pwrite(ap, SILI_PREG_SCTL, data); 897 898 /* 899 * The transition from a continuous COMRESET state from 900 * sili_port_listen() back to device detect can take a 901 * few seconds. It's quite non-deterministic. Most of 902 * the time it takes far less. Use a polling loop to 903 * wait. 904 */ 905 loop = 4000; 906 while (loop > 0) { 907 data = sili_pread(ap, SILI_PREG_SSTS); 908 if (data & SILI_PREG_SSTS_DET) 909 break; 910 loop -= sili_os_softsleep(); 911 } 912 sili_os_sleep(100); 913 914 /* 915 * Issue Device Reset, give the phy a little time to settle down. 916 * 917 * NOTE: Unlike Port Reset, the port ready signal will not 918 * go active unless a device is established to be on 919 * the port. 920 */ 921 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA); 922 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESUME); 923 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET); 924 if (sili_pwait_clr(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_DEVRESET)) { 925 kprintf("%s: hardreset failed to clear\n", PORTNAME(ap)); 926 } 927 sili_os_sleep(20); 928 929 /* 930 * Try to determine if there is a device on the port. 931 * 932 * Give the device 3/10 second to at least be detected. 933 */ 934 loop = 300; 935 while (loop > 0) { 936 data = sili_pread(ap, SILI_PREG_SSTS); 937 if (data & SILI_PREG_SSTS_DET) 938 break; 939 loop -= sili_os_softsleep(); 940 } 941 if (loop <= 0) { 942 if (bootverbose) { 943 kprintf("%s: Port appears to be unplugged\n", 944 PORTNAME(ap)); 945 } 946 error = ENODEV; 947 goto done; 948 } 949 950 /* 951 * There is something on the port. Give the device 3 seconds 952 * to detect. 953 */ 954 if (sili_pwait_eq(ap, 3000, SILI_PREG_SSTS, 955 SILI_PREG_SSTS_DET, SILI_PREG_SSTS_DET_DEV)) { 956 if (bootverbose) { 957 kprintf("%s: Device may be powered down\n", 958 PORTNAME(ap)); 959 } 960 error = ENODEV; 961 goto pmdetect; 962 } 963 964 /* 965 * We got something that definitely looks like a device. Give 966 * the device time to send us its first D2H FIS. 967 * 968 * This effectively waits for BSY to clear. 969 */ 970 if (sili_pwait_set_to(ap, 3000, SILI_PREG_STATUS, 971 SILI_PREG_STATUS_READY)) { 972 error = EBUSY; 973 } else { 974 error = 0; 975 } 976 977 pmdetect: 978 /* 979 * Do the PM port probe regardless of how things turned out above. 980 * 981 * If the PM port probe fails it will return the original error 982 * from above. 983 */ 984 if (ap->ap_sc->sc_flags & SILI_F_SPM) { 985 error = sili_pm_port_probe(ap, error); 986 } 987 988 done: 989 /* 990 * Finish up 991 */ 992 switch(error) { 993 case 0: 994 if (ap->ap_type == ATA_PORT_T_PM) 995 ap->ap_probe = ATA_PROBE_GOOD; 996 else 997 ap->ap_probe = ATA_PROBE_NEED_SOFT_RESET; 998 break; 999 case ENODEV: 1000 /* 1001 * No device detected. 1002 */ 1003 data = sili_pread(ap, SILI_PREG_SSTS); 1004 1005 switch(data & SATA_PM_SSTS_DET) { 1006 case SILI_PREG_SSTS_DET_DEV_NE: 1007 kprintf("%s: Device not communicating\n", 1008 PORTNAME(ap)); 1009 break; 1010 case SILI_PREG_SSTS_DET_OFFLINE: 1011 kprintf("%s: PHY offline\n", 1012 PORTNAME(ap)); 1013 break; 1014 default: 1015 kprintf("%s: No device detected\n", 1016 PORTNAME(ap)); 1017 break; 1018 } 1019 sili_port_hardstop(ap); 1020 break; 1021 default: 1022 /* 1023 * (EBUSY) 1024 */ 1025 kprintf("%s: Device on port is bricked\n", 1026 PORTNAME(ap)); 1027 sili_port_hardstop(ap); 1028 break; 1029 } 1030 sili_pwrite(ap, SILI_PREG_SERR, -1); 1031 1032 if (bootverbose) 1033 kprintf("%s: END HARDRESET %d\n", PORTNAME(ap), error); 1034 return (error); 1035 } 1036 1037 /* 1038 * Hard-stop on hot-swap device removal. See 10.10.1 1039 * 1040 * Place the port in a mode that will allow it to detect hot-swap insertions. 1041 * This is a bit imprecise because just setting-up SCTL to DET_INIT doesn't 1042 * seem to do the job. 1043 */ 1044 void 1045 sili_port_hardstop(struct sili_port *ap) 1046 { 1047 struct sili_ccb *ccb; 1048 struct ata_port *at; 1049 int i; 1050 int slot; 1051 1052 ap->ap_state = AP_S_FATAL_ERROR; 1053 ap->ap_probe = ATA_PROBE_FAILED; 1054 ap->ap_type = ATA_PORT_T_NONE; 1055 1056 /* 1057 * Clean up AT sub-ports on SATA port. 1058 */ 1059 for (i = 0; ap->ap_ata && i < SILI_MAX_PMPORTS; ++i) { 1060 at = &ap->ap_ata[i]; 1061 at->at_type = ATA_PORT_T_NONE; 1062 at->at_probe = ATA_PROBE_FAILED; 1063 at->at_features &= ~ATA_PORT_F_READLOG; 1064 } 1065 1066 /* 1067 * Kill the port. Don't bother waiting for it to transition 1068 * back up. 1069 */ 1070 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESET); 1071 if (sili_pread(ap, SILI_PREG_STATUS) & SILI_PREG_STATUS_READY) { 1072 kprintf("%s: Port will not go into reset\n", 1073 PORTNAME(ap)); 1074 } 1075 sili_os_sleep(10); 1076 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_RESET); 1077 1078 /* 1079 * Turn off port-multiplier control bit 1080 */ 1081 sili_pwrite(ap, SILI_PREG_CTL_CLR, SILI_PREG_CTL_PMA); 1082 1083 /* 1084 * Clean up the command list. 1085 */ 1086 while (ap->ap_active) { 1087 slot = ffs(ap->ap_active) - 1; 1088 ap->ap_active &= ~(1 << slot); 1089 ap->ap_expired &= ~(1 << slot); 1090 --ap->ap_active_cnt; 1091 ccb = &ap->ap_ccbs[slot]; 1092 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_RUNNING) { 1093 callout_stop(&ccb->ccb_timeout); 1094 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING; 1095 } 1096 ccb->ccb_xa.flags &= ~(ATA_F_TIMEOUT_DESIRED | 1097 ATA_F_TIMEOUT_EXPIRED); 1098 ccb->ccb_xa.state = ATA_S_TIMEOUT; 1099 ccb->ccb_done(ccb); 1100 ccb->ccb_xa.complete(&ccb->ccb_xa); 1101 } 1102 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) { 1103 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry); 1104 ccb->ccb_xa.state = ATA_S_TIMEOUT; 1105 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_DESIRED; 1106 ccb->ccb_done(ccb); 1107 ccb->ccb_xa.complete(&ccb->ccb_xa); 1108 } 1109 KKASSERT(ap->ap_active_cnt == 0); 1110 1111 /* 1112 * Put the port into a listen mode, we want to get insertion/removal 1113 * events. 1114 */ 1115 sili_port_listen(ap); 1116 } 1117 1118 /* 1119 * Place port into a listen mode for hotplug events only. The port has 1120 * already been reset and the command processor may not be ready due 1121 * to the lack of a device. 1122 */ 1123 void 1124 sili_port_listen(struct sili_port *ap) 1125 { 1126 u_int32_t data; 1127 1128 #if 1 1129 data = SILI_PREG_SCTL_SPM_NONE | 1130 SILI_PREG_SCTL_IPM_NONE | 1131 SILI_PREG_SCTL_SPD_NONE | 1132 SILI_PREG_SCTL_DET_INIT; 1133 if (SiliForceGen1 & (1 << ap->ap_num)) { 1134 data &= ~SILI_PREG_SCTL_SPD_NONE; 1135 data |= SILI_PREG_SCTL_SPD_GEN1; 1136 } 1137 #endif 1138 sili_os_sleep(20); 1139 sili_pwrite(ap, SILI_PREG_SERR, -1); 1140 sili_pwrite(ap, SILI_PREG_INT_ENABLE, SILI_PREG_INT_PHYRDYCHG | 1141 SILI_PREG_INT_DEVEXCHG); 1142 } 1143 1144 /* 1145 * Figure out what type of device is connected to the port, ATAPI or 1146 * DISK. 1147 */ 1148 int 1149 sili_port_signature(struct sili_port *ap, struct ata_port *at, u_int32_t sig) 1150 { 1151 if (bootverbose) 1152 kprintf("%s: sig %08x\n", ATANAME(ap, at), sig); 1153 if ((sig & 0xffff0000) == (SATA_SIGNATURE_ATAPI & 0xffff0000)) { 1154 return(ATA_PORT_T_ATAPI); 1155 } else if ((sig & 0xffff0000) == 1156 (SATA_SIGNATURE_PORT_MULTIPLIER & 0xffff0000)) { 1157 return(ATA_PORT_T_PM); 1158 } else { 1159 return(ATA_PORT_T_DISK); 1160 } 1161 } 1162 1163 /* 1164 * Load the DMA descriptor table for a CCB's buffer. 1165 * 1166 * NOTE: ATA_F_PIO is auto-selected by sili part. 1167 */ 1168 int 1169 sili_load_prb(struct sili_ccb *ccb) 1170 { 1171 struct sili_port *ap = ccb->ccb_port; 1172 struct sili_softc *sc = ap->ap_sc; 1173 struct ata_xfer *xa = &ccb->ccb_xa; 1174 struct sili_prb *prb = ccb->ccb_prb; 1175 struct sili_sge *sge; 1176 bus_dmamap_t dmap = ccb->ccb_dmamap; 1177 int error; 1178 1179 /* 1180 * Set up the PRB. The PRB contains 2 SGE's (1 if it is an ATAPI 1181 * command). The SGE must be set up to link to the rest of our 1182 * SGE array, in blocks of four SGEs (a SGE table) starting at 1183 */ 1184 prb->prb_xfer_count = 0; 1185 prb->prb_control = 0; 1186 prb->prb_override = 0; 1187 sge = (ccb->ccb_xa.flags & ATA_F_PACKET) ? 1188 &prb->prb_sge_packet : &prb->prb_sge_normal; 1189 if (xa->datalen == 0) { 1190 sge->sge_flags = SILI_SGE_FLAGS_TRM | SILI_SGE_FLAGS_DRD; 1191 sge->sge_count = 0; 1192 return (0); 1193 } 1194 1195 if (ccb->ccb_xa.flags & ATA_F_READ) 1196 prb->prb_control |= SILI_PRB_CTRL_READ; 1197 if (ccb->ccb_xa.flags & ATA_F_WRITE) 1198 prb->prb_control |= SILI_PRB_CTRL_WRITE; 1199 sge->sge_flags = SILI_SGE_FLAGS_LNK; 1200 sge->sge_count = 0; 1201 sge->sge_paddr = ccb->ccb_prb_paddr + 1202 offsetof(struct sili_prb, prb_sge[0]); 1203 1204 /* 1205 * Load our sge array. 1206 */ 1207 error = bus_dmamap_load(sc->sc_tag_data, dmap, 1208 xa->data, xa->datalen, 1209 sili_load_prb_callback, 1210 ccb, 1211 ((xa->flags & ATA_F_NOWAIT) ? 1212 BUS_DMA_NOWAIT : BUS_DMA_WAITOK)); 1213 if (error != 0) { 1214 kprintf("%s: error %d loading dmamap\n", PORTNAME(ap), error); 1215 return (1); 1216 } 1217 1218 bus_dmamap_sync(sc->sc_tag_data, dmap, 1219 (xa->flags & ATA_F_READ) ? 1220 BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE); 1221 1222 return (0); 1223 } 1224 1225 /* 1226 * Callback from BUSDMA system to load the segment list. 1227 * 1228 * The scatter/gather table is loaded by the sili chip in blocks of 1229 * four SGE's. If a continuance is required the last entry in each 1230 * block must point to the next block. 1231 */ 1232 static 1233 void 1234 sili_load_prb_callback(void *info, bus_dma_segment_t *segs, int nsegs, 1235 int error) 1236 { 1237 struct sili_ccb *ccb = info; 1238 struct sili_sge *sge; 1239 int sgi; 1240 1241 KKASSERT(nsegs <= SILI_MAX_SGET); 1242 1243 sgi = 0; 1244 sge = &ccb->ccb_prb->prb_sge[0]; 1245 while (nsegs) { 1246 if ((sgi & 3) == 3) { 1247 sge->sge_paddr = htole64(ccb->ccb_prb_paddr + 1248 offsetof(struct sili_prb, 1249 prb_sge[sgi + 1])); 1250 sge->sge_count = 0; 1251 sge->sge_flags = SILI_SGE_FLAGS_LNK; 1252 } else { 1253 sge->sge_paddr = htole64(segs->ds_addr); 1254 sge->sge_count = htole32(segs->ds_len); 1255 sge->sge_flags = 0; 1256 --nsegs; 1257 ++segs; 1258 } 1259 ++sge; 1260 ++sgi; 1261 } 1262 --sge; 1263 sge->sge_flags |= SILI_SGE_FLAGS_TRM; 1264 } 1265 1266 void 1267 sili_unload_prb(struct sili_ccb *ccb) 1268 { 1269 struct sili_port *ap = ccb->ccb_port; 1270 struct sili_softc *sc = ap->ap_sc; 1271 struct ata_xfer *xa = &ccb->ccb_xa; 1272 bus_dmamap_t dmap = ccb->ccb_dmamap; 1273 1274 if (xa->datalen != 0) { 1275 bus_dmamap_sync(sc->sc_tag_data, dmap, 1276 (xa->flags & ATA_F_READ) ? 1277 BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE); 1278 1279 bus_dmamap_unload(sc->sc_tag_data, dmap); 1280 1281 if (ccb->ccb_xa.flags & ATA_F_NCQ) 1282 xa->resid = 0; 1283 else 1284 xa->resid = xa->datalen - 1285 le32toh(ccb->ccb_prb->prb_xfer_count); 1286 } 1287 } 1288 1289 /* 1290 * Start a command and poll for completion. 1291 * 1292 * timeout is in ms and only counts once the command gets on-chip. 1293 * 1294 * Returns ATA_S_* state, compare against ATA_S_COMPLETE to determine 1295 * that no error occured. 1296 * 1297 * NOTE: If the caller specifies a NULL timeout function the caller is 1298 * responsible for clearing hardware state on failure, but we will 1299 * deal with removing the ccb from any pending queue. 1300 * 1301 * NOTE: NCQ should never be used with this function. 1302 * 1303 * NOTE: If the port is in a failed state and stopped we do not try 1304 * to activate the ccb. 1305 */ 1306 int 1307 sili_poll(struct sili_ccb *ccb, int timeout, 1308 void (*timeout_fn)(struct sili_ccb *)) 1309 { 1310 struct sili_port *ap = ccb->ccb_port; 1311 1312 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) { 1313 ccb->ccb_xa.state = ATA_S_ERROR; 1314 return(ccb->ccb_xa.state); 1315 } 1316 1317 KKASSERT((ap->ap_expired & (1 << ccb->ccb_slot)) == 0); 1318 sili_start(ccb); 1319 1320 do { 1321 sili_port_intr(ap, 1); 1322 switch(ccb->ccb_xa.state) { 1323 case ATA_S_ONCHIP: 1324 timeout -= sili_os_softsleep(); 1325 break; 1326 case ATA_S_PENDING: 1327 /* 1328 * The packet can get stuck on the pending queue 1329 * if the port refuses to come ready. XXX 1330 */ 1331 #if 0 1332 if (xxx AP_F_EXCLUSIVE_ACCESS) 1333 timeout -= sili_os_softsleep(); 1334 else 1335 #endif 1336 sili_os_softsleep(); 1337 sili_check_active_timeouts(ap); 1338 break; 1339 default: 1340 return (ccb->ccb_xa.state); 1341 } 1342 } while (timeout > 0); 1343 1344 /* 1345 * Don't spew if this is a probe during hard reset 1346 */ 1347 if (ap->ap_probe != ATA_PROBE_NEED_HARD_RESET) { 1348 kprintf("%s: Poll timeout slot %d\n", 1349 ATANAME(ap, ccb->ccb_xa.at), 1350 ccb->ccb_slot); 1351 } 1352 1353 timeout_fn(ccb); 1354 1355 return(ccb->ccb_xa.state); 1356 } 1357 1358 /* 1359 * When polling we have to check if the currently active CCB(s) 1360 * have timed out as the callout will be deadlocked while we 1361 * hold the port lock. 1362 */ 1363 void 1364 sili_check_active_timeouts(struct sili_port *ap) 1365 { 1366 struct sili_ccb *ccb; 1367 u_int32_t mask; 1368 int tag; 1369 1370 mask = ap->ap_active; 1371 while (mask) { 1372 tag = ffs(mask) - 1; 1373 mask &= ~(1 << tag); 1374 ccb = &ap->ap_ccbs[tag]; 1375 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_EXPIRED) { 1376 sili_core_timeout(ccb, 0); 1377 } 1378 } 1379 } 1380 1381 static 1382 __inline 1383 void 1384 sili_start_timeout(struct sili_ccb *ccb) 1385 { 1386 if (ccb->ccb_xa.flags & ATA_F_TIMEOUT_DESIRED) { 1387 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_RUNNING; 1388 callout_reset(&ccb->ccb_timeout, 1389 (ccb->ccb_xa.timeout * hz + 999) / 1000, 1390 sili_ata_cmd_timeout_unserialized, ccb); 1391 } 1392 } 1393 1394 void 1395 sili_start(struct sili_ccb *ccb) 1396 { 1397 struct sili_port *ap = ccb->ccb_port; 1398 #if 0 1399 struct sili_softc *sc = ap->ap_sc; 1400 #endif 1401 1402 KKASSERT(ccb->ccb_xa.state == ATA_S_PENDING); 1403 1404 /* 1405 * Sync our SGE table and PRB 1406 */ 1407 bus_dmamap_sync(ap->ap_dmamem_prbs->adm_tag, 1408 ap->ap_dmamem_prbs->adm_map, 1409 BUS_DMASYNC_PREWRITE); 1410 1411 /* 1412 * XXX dmamap for PRB XXX BUS_DMASYNC_PREWRITE 1413 */ 1414 1415 /* 1416 * Controller will update shared memory! 1417 * XXX bus_dmamap_sync ... BUS_DMASYNC_PREREAD ... 1418 */ 1419 /* Prepare RFIS area for write by controller */ 1420 1421 /* 1422 * There's no point trying to optimize this, it only shaves a few 1423 * nanoseconds so just queue the command and call our generic issue. 1424 */ 1425 sili_issue_pending_commands(ap, ccb); 1426 } 1427 1428 /* 1429 * Wait for all commands to complete processing. We hold the lock so no 1430 * new commands will be queued. 1431 */ 1432 void 1433 sili_exclusive_access(struct sili_port *ap) 1434 { 1435 while (ap->ap_active) { 1436 sili_port_intr(ap, 1); 1437 sili_os_softsleep(); 1438 } 1439 } 1440 1441 /* 1442 * If ccb is not NULL enqueue and/or issue it. 1443 * 1444 * If ccb is NULL issue whatever we can from the queue. However, nothing 1445 * new is issued if the exclusive access flag is set or expired ccb's are 1446 * present. 1447 * 1448 * If existing commands are still active (ap_active) we can only 1449 * issue matching new commands. 1450 */ 1451 void 1452 sili_issue_pending_commands(struct sili_port *ap, struct sili_ccb *ccb) 1453 { 1454 /* 1455 * Enqueue the ccb. 1456 * 1457 * If just running the queue and in exclusive access mode we 1458 * just return. Also in this case if there are any expired ccb's 1459 * we want to clear the queue so the port can be safely stopped. 1460 * 1461 * XXX sili chip - expiration needs to be per-target if PM supports 1462 * FBSS? 1463 */ 1464 if (ccb) { 1465 TAILQ_INSERT_TAIL(&ap->ap_ccb_pending, ccb, ccb_entry); 1466 } else if (ap->ap_expired) { 1467 return; 1468 } 1469 1470 /* 1471 * Pull the next ccb off the queue and run it if possible. 1472 * If the port is not ready to accept commands enable the 1473 * ready interrupt instead of starting a new command. 1474 * 1475 * XXX limit ncqdepth for attached devices behind PM 1476 */ 1477 while ((ccb = TAILQ_FIRST(&ap->ap_ccb_pending)) != NULL) { 1478 /* 1479 * Port may be wedged. 1480 */ 1481 if ((sili_pread(ap, SILI_PREG_STATUS) & 1482 SILI_PREG_STATUS_READY) == 0) { 1483 kprintf("%s: slot %d NOT READY\n", 1484 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot); 1485 sili_pwrite(ap, SILI_PREG_INT_ENABLE, 1486 SILI_PREG_INT_READY); 1487 break; 1488 } 1489 1490 /* 1491 * Handle exclusivity requirements. ATA_F_EXCLUSIVE is used 1492 * when we may have to access the rfis which is stored in 1493 * the LRAM PRB. Unfortunately reading the LRAM PRB is 1494 * highly problematic, so requests (like PM requests) which 1495 * need to access the rfis use exclusive mode and then 1496 * access the copy made by the port interrupt code back in 1497 * host memory. 1498 */ 1499 if (ap->ap_active & ~ap->ap_expired) { 1500 /* 1501 * There may be multiple ccb's already running, 1502 * if any are running and ap_run_flags sets 1503 * one of these flags then we know only one is 1504 * running. 1505 * 1506 * XXX Current AUTOSENSE code forces exclusivity 1507 * to simplify the code. 1508 */ 1509 if (ap->ap_run_flags & 1510 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) { 1511 break; 1512 } 1513 1514 /* 1515 * If the ccb we want to run is exclusive and ccb's 1516 * are still active on the port, we can't queue it 1517 * yet. 1518 * 1519 * XXX Current AUTOSENSE code forces exclusivity 1520 * to simplify the code. 1521 */ 1522 if (ccb->ccb_xa.flags & 1523 (ATA_F_EXCLUSIVE | ATA_F_AUTOSENSE)) { 1524 break; 1525 } 1526 } 1527 1528 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry); 1529 ccb->ccb_xa.state = ATA_S_ONCHIP; 1530 ap->ap_active |= 1 << ccb->ccb_slot; 1531 ap->ap_active_cnt++; 1532 ap->ap_run_flags = ccb->ccb_xa.flags; 1533 1534 /* 1535 * We can't use the CMD_FIFO method because it requires us 1536 * building the PRB in the LRAM, and the LRAM is buggy. So 1537 * we use host memory for the PRB. 1538 */ 1539 sili_pwrite(ap, SILI_PREG_CMDACT(ccb->ccb_slot), 1540 (u_int32_t)ccb->ccb_prb_paddr); 1541 sili_pwrite(ap, SILI_PREG_CMDACT(ccb->ccb_slot) + 4, 1542 (u_int32_t)(ccb->ccb_prb_paddr >> 32)); 1543 /* sili_pwrite(ap, SILI_PREG_CMD_FIFO, ccb->ccb_slot); */ 1544 sili_start_timeout(ccb); 1545 } 1546 } 1547 1548 void 1549 sili_intr(void *arg) 1550 { 1551 struct sili_softc *sc = arg; 1552 struct sili_port *ap; 1553 u_int32_t gint; 1554 int port; 1555 1556 /* 1557 * Check if the master enable is up, and whether any interrupts are 1558 * pending. 1559 * 1560 * Clear the ints we got. 1561 */ 1562 if ((sc->sc_flags & SILI_F_INT_GOOD) == 0) 1563 return; 1564 gint = sili_read(sc, SILI_REG_GINT); 1565 if (gint == 0 || gint == 0xffffffff) 1566 return; 1567 sili_write(sc, SILI_REG_GINT, gint); 1568 1569 /* 1570 * Process interrupts for each port in a non-blocking fashion. 1571 */ 1572 while (gint & SILI_REG_GINT_PORTMASK) { 1573 port = ffs(gint) - 1; 1574 ap = sc->sc_ports[port]; 1575 if (ap) { 1576 if (sili_os_lock_port_nb(ap) == 0) { 1577 sili_port_intr(ap, 0); 1578 sili_os_unlock_port(ap); 1579 } else { 1580 sili_port_interrupt_redisable(ap); 1581 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT); 1582 } 1583 } 1584 gint &= ~(1 << port); 1585 } 1586 } 1587 1588 /* 1589 * Core called from helper thread. 1590 */ 1591 void 1592 sili_port_thread_core(struct sili_port *ap, int mask) 1593 { 1594 /* 1595 * Process any expired timedouts. 1596 */ 1597 sili_os_lock_port(ap); 1598 if (mask & AP_SIGF_TIMEOUT) { 1599 sili_check_active_timeouts(ap); 1600 } 1601 1602 /* 1603 * Process port interrupts which require a higher level of 1604 * intervention. 1605 */ 1606 if (mask & AP_SIGF_PORTINT) { 1607 sili_port_intr(ap, 1); 1608 sili_port_interrupt_reenable(ap); 1609 sili_os_unlock_port(ap); 1610 } else { 1611 sili_os_unlock_port(ap); 1612 } 1613 } 1614 1615 /* 1616 * Core per-port interrupt handler. 1617 * 1618 * If blockable is 0 we cannot call sili_os_sleep() at all and we can only 1619 * deal with normal command completions which do not require blocking. 1620 */ 1621 void 1622 sili_port_intr(struct sili_port *ap, int blockable) 1623 { 1624 struct sili_softc *sc = ap->ap_sc; 1625 u_int32_t is; 1626 int slot; 1627 struct sili_ccb *ccb = NULL; 1628 struct ata_port *ccb_at = NULL; 1629 u_int32_t active; 1630 u_int32_t finished; 1631 const u_int32_t blockable_mask = SILI_PREG_IST_PHYRDYCHG | 1632 SILI_PREG_IST_DEVEXCHG | 1633 SILI_PREG_IST_CERROR | 1634 SILI_PREG_IST_DECODE | 1635 SILI_PREG_IST_CRC | 1636 SILI_PREG_IST_HANDSHK; 1637 const u_int32_t fatal_mask = SILI_PREG_IST_PHYRDYCHG | 1638 SILI_PREG_IST_DEVEXCHG | 1639 SILI_PREG_IST_DECODE | 1640 SILI_PREG_IST_CRC | 1641 SILI_PREG_IST_HANDSHK; 1642 1643 enum { NEED_NOTHING, NEED_HOTPLUG_INSERT, 1644 NEED_HOTPLUG_REMOVE } need = NEED_NOTHING; 1645 1646 /* 1647 * NOTE: CCOMPLETE was automatically cleared when we read INT_STATUS. 1648 */ 1649 is = sili_pread(ap, SILI_PREG_INT_STATUS); 1650 is &= SILI_PREG_IST_MASK; 1651 if (is & SILI_PREG_IST_CCOMPLETE) 1652 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_CCOMPLETE); 1653 1654 /* 1655 * If we can't block then we can't handle these here. Disable 1656 * the interrupts in question so we don't live-lock, the helper 1657 * thread will re-enable them. 1658 * 1659 * If the port is in a completely failed state we do not want 1660 * to drop through to failed-command-processing if blockable is 0, 1661 * just let the thread deal with it all. 1662 * 1663 * Otherwise we fall through and still handle DHRS and any commands 1664 * which completed normally. Even if we are errored we haven't 1665 * stopped the port yet so CI/SACT are still good. 1666 */ 1667 if (blockable == 0) { 1668 if (ap->ap_state == AP_S_FATAL_ERROR) { 1669 sili_port_interrupt_redisable(ap); 1670 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT); 1671 /*is &= ~blockable_mask;*/ 1672 return; 1673 } 1674 if (is & blockable_mask) { 1675 sili_port_interrupt_redisable(ap); 1676 sili_os_signal_port_thread(ap, AP_SIGF_PORTINT); 1677 /*is &= ~blockable_mask;*/ 1678 return; 1679 } 1680 } 1681 1682 if (is & SILI_PREG_IST_CERROR) { 1683 /* 1684 * Command failed (blockable). 1685 * 1686 * This stops command processing. We can extract the PM 1687 * target from the PMP field in SILI_PREG_CONTEXT. The 1688 * tag is not necessarily valid so don't use that. 1689 * 1690 * We must then expire all CCB's for that target and resume 1691 * processing if any other targets have active commands. 1692 * Particular error codes can be recovered by reading the LOG 1693 * page. 1694 * 1695 * The expire handling code will do the rest, which is 1696 * basically to reset the port once the only active 1697 * commands remaining are all expired. 1698 */ 1699 u_int32_t error; 1700 int target; 1701 int resume = 1; 1702 1703 target = (sili_pread(ap, SILI_PREG_CONTEXT) >> 1704 SILI_PREG_CONTEXT_PMPORT_SHIFT) & 1705 SILI_PREG_CONTEXT_PMPORT_MASK; 1706 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_CERROR); 1707 active = ap->ap_active & ~ap->ap_expired; 1708 error = sili_pread(ap, SILI_PREG_CERROR); 1709 kprintf("%s.%d target error %d active=%08x hactive=%08x " 1710 "SERR=%b\n", 1711 PORTNAME(ap), target, error, 1712 active, sili_pread(ap, SILI_PREG_SLOTST), 1713 sili_pread(ap, SILI_PREG_SERR), SILI_PFMT_SERR); 1714 1715 while (active) { 1716 slot = ffs(active) - 1; 1717 ccb = &ap->ap_ccbs[slot]; 1718 if ((ccb_at = ccb->ccb_xa.at) == NULL) 1719 ccb_at = &ap->ap_ata[0]; 1720 if (target == ccb_at->at_target) { 1721 if ((ccb->ccb_xa.flags & ATA_F_NCQ) && 1722 (error == SILI_PREG_CERROR_DEVICE || 1723 error == SILI_PREG_CERROR_SDBERROR)) { 1724 ccb_at->at_features |= ATA_PORT_F_READLOG; 1725 } 1726 if (sili_core_timeout(ccb, 1) == 0) 1727 resume = 0; 1728 } 1729 active &= ~(1 << slot); 1730 } 1731 1732 /* 1733 * Resume will be 0 if the timeout reinited and restarted 1734 * the port. Otherwise we resume the port to allow other 1735 * commands to complete. 1736 */ 1737 if (resume) 1738 sili_pwrite(ap, SILI_PREG_CTL_SET, SILI_PREG_CTL_RESUME); 1739 } 1740 1741 /* 1742 * Device notification to us (non-blocking) 1743 * 1744 * This is interrupt status SILIPREG_IST_SDB 1745 * 1746 * NOTE! On some parts notification bits can get set without 1747 * generating an interrupt. It is unclear whether this is 1748 * a bug in the PM (sending a DTOH device setbits with 'N' set 1749 * and 'I' not set), or a bug in the host controller. 1750 * 1751 * It only seems to occur under load. 1752 */ 1753 if (sc->sc_flags & SILI_F_SSNTF) { 1754 u_int32_t data; 1755 const char *xstr; 1756 1757 data = sili_pread(ap, SILI_PREG_SNTF); 1758 if (is & SILI_PREG_IST_SDB) { 1759 sili_pwrite(ap, SILI_PREG_INT_STATUS, 1760 SILI_PREG_IST_SDB); 1761 is &= ~SILI_PREG_IST_SDB; 1762 xstr = " (no SDBS!)"; 1763 } else { 1764 xstr = ""; 1765 } 1766 if (data) { 1767 kprintf("%s: NOTIFY %08x%s\n", 1768 PORTNAME(ap), data, xstr); 1769 sili_pwrite(ap, SILI_PREG_SNTF, data); 1770 sili_cam_changed(ap, NULL, -1); 1771 } 1772 } 1773 1774 /* 1775 * Port change (hot-plug) (blockable). 1776 * 1777 * A PCS interrupt will occur on hot-plug once communication is 1778 * established. 1779 * 1780 * A PRCS interrupt will occur on hot-unplug (and possibly also 1781 * on hot-plug). 1782 * 1783 * XXX We can then check the CPS (Cold Presence State) bit, if 1784 * supported, to determine if a device is plugged in or not and do 1785 * the right thing. 1786 * 1787 * WARNING: A PCS interrupt is cleared by clearing DIAG_X, and 1788 * can also occur if an unsolicited COMINIT is received. 1789 * If this occurs command processing is automatically 1790 * stopped (CR goes inactive) and the port must be stopped 1791 * and restarted. 1792 */ 1793 if (is & (SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG)) { 1794 /* XXX */ 1795 sili_pwrite(ap, SILI_PREG_SERR, 1796 (SILI_PREG_SERR_DIAG_N | SILI_PREG_SERR_DIAG_X)); 1797 sili_pwrite(ap, SILI_PREG_INT_STATUS, 1798 is & (SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG)); 1799 1800 is &= ~(SILI_PREG_IST_PHYRDYCHG | SILI_PREG_IST_DEVEXCHG); 1801 kprintf("%s: Port change\n", PORTNAME(ap)); 1802 1803 switch (sili_pread(ap, SILI_PREG_SSTS) & SILI_PREG_SSTS_DET) { 1804 case SILI_PREG_SSTS_DET_DEV: 1805 if (ap->ap_type == ATA_PORT_T_NONE && 1806 ap->ap_probe == ATA_PROBE_FAILED) { 1807 need = NEED_HOTPLUG_INSERT; 1808 goto fatal; 1809 } 1810 break; 1811 default: 1812 kprintf("%s: Device lost\n", PORTNAME(ap)); 1813 if (ap->ap_type != ATA_PORT_T_NONE) { 1814 need = NEED_HOTPLUG_REMOVE; 1815 goto fatal; 1816 } 1817 break; 1818 } 1819 } 1820 1821 /* 1822 * Check for remaining errors - they are fatal. (blockable) 1823 */ 1824 if (is & fatal_mask) { 1825 u_int32_t serr; 1826 1827 sili_pwrite(ap, SILI_PREG_INT_STATUS, is & fatal_mask); 1828 1829 serr = sili_pread(ap, SILI_PREG_SERR); 1830 kprintf("%s: Unrecoverable errors (IS: %b, SERR: %b), " 1831 "disabling port.\n", 1832 PORTNAME(ap), 1833 is, SILI_PFMT_INT_STATUS, 1834 serr, SILI_PFMT_SERR 1835 ); 1836 is &= ~fatal_mask; 1837 /* XXX try recovery first */ 1838 goto fatal; 1839 } 1840 1841 /* 1842 * Fail all outstanding commands if we know the port won't recover. 1843 * 1844 * We may have a ccb_at if the failed command is known and was 1845 * being sent to a device over a port multiplier (PM). In this 1846 * case if the port itself has not completely failed we fail just 1847 * the commands related to that target. 1848 */ 1849 if (ap->ap_state == AP_S_FATAL_ERROR && 1850 (ap->ap_active & ~ap->ap_expired)) { 1851 kprintf("%s: Fatal port error, expiring %08x\n", 1852 PORTNAME(ap), ap->ap_active & ~ap->ap_expired); 1853 fatal: 1854 ap->ap_state = AP_S_FATAL_ERROR; 1855 1856 /* 1857 * Error all the active slots. If running across a PM 1858 * try to error out just the slots related to the target. 1859 */ 1860 active = ap->ap_active & ~ap->ap_expired; 1861 1862 while (active) { 1863 slot = ffs(active) - 1; 1864 active &= ~(1 << slot); 1865 ccb = &ap->ap_ccbs[slot]; 1866 sili_core_timeout(ccb, 1); 1867 } 1868 } 1869 1870 /* 1871 * CCB completion (non blocking). 1872 * 1873 * CCB completion is detected by noticing the slot bit in 1874 * the port slot status register has cleared while the bit 1875 * is still set in our ap_active variable. 1876 * 1877 * When completing expired events we must remember to reinit 1878 * the port once everything is clear. 1879 * 1880 * Due to a single-level recursion when reading the log page, 1881 * it is possible for the slot to already have been cleared 1882 * for some expired tags, do not include expired tags in 1883 * the list. 1884 */ 1885 active = ap->ap_active & ~sili_pread(ap, SILI_PREG_SLOTST); 1886 active &= ~ap->ap_expired; 1887 1888 finished = active; 1889 while (active) { 1890 slot = ffs(active) - 1; 1891 ccb = &ap->ap_ccbs[slot]; 1892 1893 DPRINTF(SILI_D_INTR, "%s: slot %d is complete%s\n", 1894 PORTNAME(ap), slot, ccb->ccb_xa.state == ATA_S_ERROR ? 1895 " (error)" : ""); 1896 1897 active &= ~(1 << slot); 1898 1899 /* 1900 * XXX sync POSTREAD for return data? 1901 */ 1902 ap->ap_active &= ~(1 << ccb->ccb_slot); 1903 --ap->ap_active_cnt; 1904 1905 /* 1906 * Complete the ccb. If the ccb was marked expired it 1907 * may or may not have been cleared from the port, 1908 * make sure we mark it as having timed out. 1909 * 1910 * In a normal completion if AUTOSENSE is set we copy 1911 * the PRB LRAM rfis back to the rfis in host-memory. 1912 * 1913 * XXX Currently AUTOSENSE also forces exclusivity so we 1914 * can safely work around a hardware bug when reading 1915 * the LRAM. 1916 */ 1917 if (ap->ap_expired & (1 << ccb->ccb_slot)) { 1918 ap->ap_expired &= ~(1 << ccb->ccb_slot); 1919 ccb->ccb_xa.state = ATA_S_TIMEOUT; 1920 ccb->ccb_done(ccb); 1921 ccb->ccb_xa.complete(&ccb->ccb_xa); 1922 } else { 1923 if (ccb->ccb_xa.state == ATA_S_ONCHIP) { 1924 ccb->ccb_xa.state = ATA_S_COMPLETE; 1925 if (ccb->ccb_xa.flags & ATA_F_AUTOSENSE) { 1926 memcpy(ccb->ccb_xa.rfis, 1927 &ccb->ccb_prb_lram->prb_d2h, 1928 sizeof(ccb->ccb_prb_lram->prb_d2h)); 1929 if (ccb->ccb_xa.state == ATA_S_TIMEOUT) 1930 ccb->ccb_xa.state = ATA_S_ERROR; 1931 } 1932 } 1933 ccb->ccb_done(ccb); 1934 } 1935 } 1936 if (is & SILI_PREG_IST_READY) { 1937 is &= ~SILI_PREG_IST_READY; 1938 sili_pwrite(ap, SILI_PREG_INT_DISABLE, SILI_PREG_INT_READY); 1939 sili_pwrite(ap, SILI_PREG_INT_STATUS, SILI_PREG_IST_READY); 1940 } 1941 1942 /* 1943 * If we had expired commands and were waiting for 1944 * remaining commands to complete, and they have now 1945 * completed, we can reinit the port. 1946 * 1947 * This will also clean out the expired commands. 1948 * The timeout code also calls sili_port_reinit() if 1949 * the only commands remaining after a timeout are all 1950 * now expired commands. 1951 * 1952 * Otherwise just reissue. 1953 */ 1954 if (ap->ap_expired && ap->ap_active == ap->ap_expired) { 1955 if (finished) 1956 sili_port_reinit(ap); 1957 } else { 1958 sili_issue_pending_commands(ap, NULL); 1959 } 1960 1961 /* 1962 * Cleanup. Will not be set if non-blocking. 1963 */ 1964 switch(need) { 1965 case NEED_HOTPLUG_INSERT: 1966 /* 1967 * A hot-plug insertion event has occured and all 1968 * outstanding commands have already been revoked. 1969 * 1970 * Don't recurse if this occurs while we are 1971 * resetting the port. 1972 * 1973 * Place the port in a continuous COMRESET state 1974 * until the INIT code gets to it. 1975 */ 1976 kprintf("%s: HOTPLUG - Device inserted\n", 1977 PORTNAME(ap)); 1978 ap->ap_probe = ATA_PROBE_NEED_INIT; 1979 sili_cam_changed(ap, NULL, -1); 1980 break; 1981 case NEED_HOTPLUG_REMOVE: 1982 /* 1983 * A hot-plug removal event has occured and all 1984 * outstanding commands have already been revoked. 1985 * 1986 * Don't recurse if this occurs while we are 1987 * resetting the port. 1988 */ 1989 kprintf("%s: HOTPLUG - Device removed\n", 1990 PORTNAME(ap)); 1991 sili_port_hardstop(ap); 1992 /* ap_probe set to failed */ 1993 sili_cam_changed(ap, NULL, -1); 1994 break; 1995 default: 1996 break; 1997 } 1998 } 1999 2000 struct sili_ccb * 2001 sili_get_ccb(struct sili_port *ap) 2002 { 2003 struct sili_ccb *ccb; 2004 2005 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE); 2006 ccb = TAILQ_FIRST(&ap->ap_ccb_free); 2007 if (ccb != NULL) { 2008 KKASSERT(ccb->ccb_xa.state == ATA_S_PUT); 2009 TAILQ_REMOVE(&ap->ap_ccb_free, ccb, ccb_entry); 2010 ccb->ccb_xa.state = ATA_S_SETUP; 2011 ccb->ccb_xa.at = NULL; 2012 } 2013 lockmgr(&ap->ap_ccb_lock, LK_RELEASE); 2014 2015 return (ccb); 2016 } 2017 2018 void 2019 sili_put_ccb(struct sili_ccb *ccb) 2020 { 2021 struct sili_port *ap = ccb->ccb_port; 2022 2023 ccb->ccb_xa.state = ATA_S_PUT; 2024 lockmgr(&ap->ap_ccb_lock, LK_EXCLUSIVE); 2025 TAILQ_INSERT_TAIL(&ap->ap_ccb_free, ccb, ccb_entry); 2026 lockmgr(&ap->ap_ccb_lock, LK_RELEASE); 2027 } 2028 2029 struct sili_ccb * 2030 sili_get_err_ccb(struct sili_port *ap) 2031 { 2032 struct sili_ccb *err_ccb; 2033 2034 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) == 0); 2035 ap->ap_flags |= AP_F_ERR_CCB_RESERVED; 2036 2037 /* 2038 * Grab a CCB to use for error recovery. This should never fail, as 2039 * we ask atascsi to reserve one for us at init time. 2040 */ 2041 err_ccb = ap->ap_err_ccb; 2042 KKASSERT(err_ccb != NULL); 2043 err_ccb->ccb_xa.flags = 0; 2044 err_ccb->ccb_done = sili_empty_done; 2045 2046 return err_ccb; 2047 } 2048 2049 void 2050 sili_put_err_ccb(struct sili_ccb *ccb) 2051 { 2052 struct sili_port *ap = ccb->ccb_port; 2053 2054 KKASSERT((ap->ap_flags & AP_F_ERR_CCB_RESERVED) != 0); 2055 2056 KKASSERT(ccb == ap->ap_err_ccb); 2057 2058 ap->ap_flags &= ~AP_F_ERR_CCB_RESERVED; 2059 } 2060 2061 /* 2062 * Read log page to get NCQ error. 2063 * 2064 * Return 0 on success 2065 */ 2066 void 2067 sili_port_read_ncq_error(struct sili_port *ap, int target) 2068 { 2069 struct sili_ccb *ccb; 2070 struct ata_fis_h2d *fis; 2071 int status; 2072 2073 DPRINTF(SILI_D_VERBOSE, "%s: read log page\n", PORTNAME(ap)); 2074 2075 /* Prep error CCB for READ LOG EXT, page 10h, 1 sector. */ 2076 ccb = sili_get_err_ccb(ap); 2077 ccb->ccb_done = sili_empty_done; 2078 ccb->ccb_xa.flags = ATA_F_NOWAIT | ATA_F_READ | ATA_F_POLL; 2079 ccb->ccb_xa.data = ap->ap_err_scratch; 2080 ccb->ccb_xa.datalen = 512; 2081 ccb->ccb_xa.complete = sili_dummy_done; 2082 ccb->ccb_xa.at = &ap->ap_ata[target]; 2083 fis = &ccb->ccb_prb->prb_h2d; 2084 bzero(fis, sizeof(*fis)); 2085 2086 fis->type = ATA_FIS_TYPE_H2D; 2087 fis->flags = ATA_H2D_FLAGS_CMD | target; 2088 fis->command = ATA_C_READ_LOG_EXT; 2089 fis->lba_low = 0x10; /* queued error log page (10h) */ 2090 fis->sector_count = 1; /* number of sectors (1) */ 2091 fis->sector_count_exp = 0; 2092 fis->lba_mid = 0; /* starting offset */ 2093 fis->lba_mid_exp = 0; 2094 fis->device = 0; 2095 2096 /* 2097 * NOTE: Must use sili_quick_timeout() because we hold the err_ccb 2098 */ 2099 if (sili_load_prb(ccb) != 0) { 2100 status = ATA_S_ERROR; 2101 } else { 2102 ccb->ccb_xa.state = ATA_S_PENDING; 2103 status = sili_poll(ccb, 1000, sili_quick_timeout); 2104 } 2105 2106 /* 2107 * Just spew if it fails, there isn't much we can do at this point. 2108 */ 2109 if (status != ATA_S_COMPLETE) { 2110 kprintf("%s: log page read failed, slot %d was still active.\n", 2111 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_slot); 2112 } 2113 2114 /* Done with the error CCB now. */ 2115 sili_unload_prb(ccb); 2116 sili_put_err_ccb(ccb); 2117 2118 /* Extract failed register set and tags from the scratch space. */ 2119 if (status == ATA_S_COMPLETE) { 2120 struct ata_log_page_10h *log; 2121 int err_slot; 2122 2123 log = (struct ata_log_page_10h *)ap->ap_err_scratch; 2124 if (log->err_regs.type & ATA_LOG_10H_TYPE_NOTQUEUED) { 2125 /* 2126 * Not queued bit was set - wasn't an NCQ error? 2127 * 2128 * XXX This bit seems to be set a lot even for NCQ 2129 * errors? 2130 */ 2131 } else { 2132 /* 2133 * Copy back the log record as a D2H register FIS. 2134 */ 2135 err_slot = log->err_regs.type & 2136 ATA_LOG_10H_TYPE_TAG_MASK; 2137 ccb = &ap->ap_ccbs[err_slot]; 2138 if (ap->ap_expired & (1 << ccb->ccb_slot)) { 2139 kprintf("%s: read NCQ error page slot=%d\n", 2140 ATANAME(ap, ccb->ccb_xa.at), err_slot 2141 ); 2142 memcpy(&ccb->ccb_prb->prb_d2h, &log->err_regs, 2143 sizeof(struct ata_fis_d2h)); 2144 ccb->ccb_prb->prb_d2h.type = ATA_FIS_TYPE_D2H; 2145 ccb->ccb_prb->prb_d2h.flags = 0; 2146 if (ccb->ccb_xa.state == ATA_S_TIMEOUT) 2147 ccb->ccb_xa.state = ATA_S_ERROR; 2148 } else { 2149 kprintf("%s: read NCQ error page slot=%d, " 2150 "slot does not match any cmds\n", 2151 ATANAME(ccb->ccb_port, ccb->ccb_xa.at), 2152 err_slot 2153 ); 2154 } 2155 } 2156 } 2157 } 2158 2159 /* 2160 * Allocate memory for various structures DMAd by hardware. The maximum 2161 * number of segments for these tags is 1 so the DMA memory will have a 2162 * single physical base address. 2163 */ 2164 struct sili_dmamem * 2165 sili_dmamem_alloc(struct sili_softc *sc, bus_dma_tag_t tag) 2166 { 2167 struct sili_dmamem *adm; 2168 int error; 2169 2170 adm = kmalloc(sizeof(*adm), M_DEVBUF, M_INTWAIT | M_ZERO); 2171 2172 error = bus_dmamem_alloc(tag, (void **)&adm->adm_kva, 2173 BUS_DMA_ZERO, &adm->adm_map); 2174 if (error == 0) { 2175 adm->adm_tag = tag; 2176 error = bus_dmamap_load(tag, adm->adm_map, 2177 adm->adm_kva, 2178 bus_dma_tag_getmaxsize(tag), 2179 sili_dmamem_saveseg, &adm->adm_busaddr, 2180 0); 2181 } 2182 if (error) { 2183 if (adm->adm_map) { 2184 bus_dmamap_destroy(tag, adm->adm_map); 2185 adm->adm_map = NULL; 2186 adm->adm_tag = NULL; 2187 adm->adm_kva = NULL; 2188 } 2189 kfree(adm, M_DEVBUF); 2190 adm = NULL; 2191 } 2192 return (adm); 2193 } 2194 2195 static 2196 void 2197 sili_dmamem_saveseg(void *info, bus_dma_segment_t *segs, int nsegs, int error) 2198 { 2199 KKASSERT(error == 0); 2200 KKASSERT(nsegs == 1); 2201 *(bus_addr_t *)info = segs->ds_addr; 2202 } 2203 2204 2205 void 2206 sili_dmamem_free(struct sili_softc *sc, struct sili_dmamem *adm) 2207 { 2208 if (adm->adm_map) { 2209 bus_dmamap_unload(adm->adm_tag, adm->adm_map); 2210 bus_dmamap_destroy(adm->adm_tag, adm->adm_map); 2211 adm->adm_map = NULL; 2212 adm->adm_tag = NULL; 2213 adm->adm_kva = NULL; 2214 } 2215 kfree(adm, M_DEVBUF); 2216 } 2217 2218 u_int32_t 2219 sili_read(struct sili_softc *sc, bus_size_t r) 2220 { 2221 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 2222 BUS_SPACE_BARRIER_READ); 2223 return (bus_space_read_4(sc->sc_iot, sc->sc_ioh, r)); 2224 } 2225 2226 void 2227 sili_write(struct sili_softc *sc, bus_size_t r, u_int32_t v) 2228 { 2229 bus_space_write_4(sc->sc_iot, sc->sc_ioh, r, v); 2230 bus_space_barrier(sc->sc_iot, sc->sc_ioh, r, 4, 2231 BUS_SPACE_BARRIER_WRITE); 2232 } 2233 2234 u_int32_t 2235 sili_pread(struct sili_port *ap, bus_size_t r) 2236 { 2237 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4, 2238 BUS_SPACE_BARRIER_READ); 2239 return (bus_space_read_4(ap->ap_sc->sc_iot, ap->ap_ioh, r)); 2240 } 2241 2242 void 2243 sili_pwrite(struct sili_port *ap, bus_size_t r, u_int32_t v) 2244 { 2245 bus_space_write_4(ap->ap_sc->sc_iot, ap->ap_ioh, r, v); 2246 bus_space_barrier(ap->ap_sc->sc_iot, ap->ap_ioh, r, 4, 2247 BUS_SPACE_BARRIER_WRITE); 2248 } 2249 2250 /* 2251 * Wait up to (timeout) milliseconds for the masked port register to 2252 * match the target. 2253 * 2254 * Timeout is in milliseconds. 2255 */ 2256 int 2257 sili_pwait_eq(struct sili_port *ap, int timeout, 2258 bus_size_t r, u_int32_t mask, u_int32_t target) 2259 { 2260 int t; 2261 2262 /* 2263 * Loop hard up to 100uS 2264 */ 2265 for (t = 0; t < 100; ++t) { 2266 if ((sili_pread(ap, r) & mask) == target) 2267 return (0); 2268 sili_os_hardsleep(1); /* us */ 2269 } 2270 2271 do { 2272 timeout -= sili_os_softsleep(); 2273 if ((sili_pread(ap, r) & mask) == target) 2274 return (0); 2275 } while (timeout > 0); 2276 return (1); 2277 } 2278 2279 int 2280 sili_wait_ne(struct sili_softc *sc, bus_size_t r, u_int32_t mask, 2281 u_int32_t target) 2282 { 2283 int t; 2284 2285 /* 2286 * Loop hard up to 100uS 2287 */ 2288 for (t = 0; t < 100; ++t) { 2289 if ((sili_read(sc, r) & mask) != target) 2290 return (0); 2291 sili_os_hardsleep(1); /* us */ 2292 } 2293 2294 /* 2295 * And one millisecond the slow way 2296 */ 2297 t = 1000; 2298 do { 2299 t -= sili_os_softsleep(); 2300 if ((sili_read(sc, r) & mask) != target) 2301 return (0); 2302 } while (t > 0); 2303 2304 return (1); 2305 } 2306 2307 2308 /* 2309 * Acquire an ata transfer. 2310 * 2311 * Pass a NULL at for direct-attached transfers, and a non-NULL at for 2312 * targets that go through the port multiplier. 2313 */ 2314 struct ata_xfer * 2315 sili_ata_get_xfer(struct sili_port *ap, struct ata_port *at) 2316 { 2317 struct sili_ccb *ccb; 2318 2319 ccb = sili_get_ccb(ap); 2320 if (ccb == NULL) { 2321 DPRINTF(SILI_D_XFER, "%s: sili_ata_get_xfer: NULL ccb\n", 2322 PORTNAME(ap)); 2323 return (NULL); 2324 } 2325 2326 DPRINTF(SILI_D_XFER, "%s: sili_ata_get_xfer got slot %d\n", 2327 PORTNAME(ap), ccb->ccb_slot); 2328 2329 bzero(ccb->ccb_xa.fis, sizeof(*ccb->ccb_xa.fis)); 2330 ccb->ccb_xa.at = at; 2331 ccb->ccb_xa.fis->type = ATA_FIS_TYPE_H2D; 2332 2333 return (&ccb->ccb_xa); 2334 } 2335 2336 void 2337 sili_ata_put_xfer(struct ata_xfer *xa) 2338 { 2339 struct sili_ccb *ccb = (struct sili_ccb *)xa; 2340 2341 DPRINTF(SILI_D_XFER, "sili_ata_put_xfer slot %d\n", ccb->ccb_slot); 2342 2343 sili_put_ccb(ccb); 2344 } 2345 2346 int 2347 sili_ata_cmd(struct ata_xfer *xa) 2348 { 2349 struct sili_ccb *ccb = (struct sili_ccb *)xa; 2350 2351 KKASSERT(xa->state == ATA_S_SETUP); 2352 2353 if (ccb->ccb_port->ap_state == AP_S_FATAL_ERROR) 2354 goto failcmd; 2355 #if 0 2356 kprintf("%s: started std command %b ccb %d ccb_at %p %d\n", 2357 ATANAME(ccb->ccb_port, ccb->ccb_xa.at), 2358 sili_pread(ccb->ccb_port, SILI_PREG_CMD), SILI_PFMT_CMD, 2359 ccb->ccb_slot, 2360 ccb->ccb_xa.at, 2361 ccb->ccb_xa.at ? ccb->ccb_xa.at->at_target : -1); 2362 #endif 2363 2364 ccb->ccb_done = sili_ata_cmd_done; 2365 2366 if (sili_load_prb(ccb) != 0) 2367 goto failcmd; 2368 2369 xa->state = ATA_S_PENDING; 2370 2371 if (xa->flags & ATA_F_POLL) 2372 return (sili_poll(ccb, xa->timeout, sili_ata_cmd_timeout)); 2373 2374 crit_enter(); 2375 KKASSERT((xa->flags & ATA_F_TIMEOUT_EXPIRED) == 0); 2376 xa->flags |= ATA_F_TIMEOUT_DESIRED; 2377 sili_start(ccb); 2378 crit_exit(); 2379 return (xa->state); 2380 2381 failcmd: 2382 crit_enter(); 2383 xa->state = ATA_S_ERROR; 2384 xa->complete(xa); 2385 crit_exit(); 2386 return (ATA_S_ERROR); 2387 } 2388 2389 static void 2390 sili_ata_cmd_done(struct sili_ccb *ccb) 2391 { 2392 struct ata_xfer *xa = &ccb->ccb_xa; 2393 2394 /* 2395 * NOTE: callout does not lock port and may race us modifying 2396 * the flags, so make sure its stopped. 2397 */ 2398 if (xa->flags & ATA_F_TIMEOUT_RUNNING) { 2399 callout_stop(&ccb->ccb_timeout); 2400 xa->flags &= ~ATA_F_TIMEOUT_RUNNING; 2401 } 2402 xa->flags &= ~(ATA_F_TIMEOUT_DESIRED | ATA_F_TIMEOUT_EXPIRED); 2403 2404 KKASSERT(xa->state != ATA_S_ONCHIP); 2405 sili_unload_prb(ccb); 2406 2407 if (xa->state != ATA_S_TIMEOUT) 2408 xa->complete(xa); 2409 } 2410 2411 /* 2412 * Timeout from callout, MPSAFE - nothing can mess with the CCB's flags 2413 * while the callout is runing. 2414 * 2415 * We can't safely get the port lock here or delay, we could block 2416 * the callout thread. 2417 */ 2418 static void 2419 sili_ata_cmd_timeout_unserialized(void *arg) 2420 { 2421 struct sili_ccb *ccb = arg; 2422 struct sili_port *ap = ccb->ccb_port; 2423 2424 ccb->ccb_xa.flags &= ~ATA_F_TIMEOUT_RUNNING; 2425 ccb->ccb_xa.flags |= ATA_F_TIMEOUT_EXPIRED; 2426 sili_os_signal_port_thread(ap, AP_SIGF_TIMEOUT); 2427 } 2428 2429 void 2430 sili_ata_cmd_timeout(struct sili_ccb *ccb) 2431 { 2432 sili_core_timeout(ccb, 0); 2433 } 2434 2435 /* 2436 * Timeout code, typically called when the port command processor is running. 2437 * 2438 * Returns 0 if all timeout processing completed, non-zero if it is still 2439 * in progress. 2440 */ 2441 static 2442 int 2443 sili_core_timeout(struct sili_ccb *ccb, int really_error) 2444 { 2445 struct ata_xfer *xa = &ccb->ccb_xa; 2446 struct sili_port *ap = ccb->ccb_port; 2447 struct ata_port *at; 2448 2449 at = ccb->ccb_xa.at; 2450 2451 kprintf("%s: CMD %s state=%d slot=%d\n" 2452 "\t active=%08x\n" 2453 "\texpired=%08x\n" 2454 "\thactive=%08x\n", 2455 ATANAME(ap, at), 2456 (really_error ? "ERROR" : "TIMEOUT"), 2457 ccb->ccb_xa.state, ccb->ccb_slot, 2458 ap->ap_active, 2459 ap->ap_expired, 2460 sili_pread(ap, SILI_PREG_SLOTST) 2461 ); 2462 2463 /* 2464 * NOTE: Timeout will not be running if the command was polled. 2465 * If we got here at least one of these flags should be set. 2466 * 2467 * However, it might be running if we are called from the 2468 * interrupt error handling code. 2469 */ 2470 KKASSERT(xa->flags & (ATA_F_POLL | ATA_F_TIMEOUT_DESIRED | 2471 ATA_F_TIMEOUT_RUNNING)); 2472 if (xa->flags & ATA_F_TIMEOUT_RUNNING) { 2473 callout_stop(&ccb->ccb_timeout); 2474 xa->flags &= ~ATA_F_TIMEOUT_RUNNING; 2475 } 2476 xa->flags &= ~ATA_F_TIMEOUT_EXPIRED; 2477 2478 if (ccb->ccb_xa.state == ATA_S_PENDING) { 2479 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry); 2480 ccb->ccb_xa.state = ATA_S_TIMEOUT; 2481 ccb->ccb_done(ccb); 2482 xa->complete(xa); 2483 sili_issue_pending_commands(ap, NULL); 2484 return(1); 2485 } 2486 if (ccb->ccb_xa.state != ATA_S_ONCHIP) { 2487 kprintf("%s: Unexpected state during timeout: %d\n", 2488 ATANAME(ap, at), ccb->ccb_xa.state); 2489 return(1); 2490 } 2491 2492 /* 2493 * We can't process timeouts while other commands are running. 2494 */ 2495 ap->ap_expired |= 1 << ccb->ccb_slot; 2496 2497 if (ap->ap_active != ap->ap_expired) { 2498 kprintf("%s: Deferred timeout until its safe, slot %d\n", 2499 ATANAME(ap, at), ccb->ccb_slot); 2500 return(1); 2501 } 2502 2503 /* 2504 * We have to issue a Port reinit. We don't read an error log 2505 * page for timeouts. Reiniting the port will clear all pending 2506 * commands. 2507 */ 2508 sili_port_reinit(ap); 2509 return(0); 2510 } 2511 2512 /* 2513 * Used by the softreset, pm_port_probe, and read_ncq_error only, in very 2514 * specialized, controlled circumstances. 2515 */ 2516 void 2517 sili_quick_timeout(struct sili_ccb *ccb) 2518 { 2519 struct sili_port *ap = ccb->ccb_port; 2520 2521 switch (ccb->ccb_xa.state) { 2522 case ATA_S_PENDING: 2523 TAILQ_REMOVE(&ap->ap_ccb_pending, ccb, ccb_entry); 2524 ccb->ccb_xa.state = ATA_S_TIMEOUT; 2525 break; 2526 case ATA_S_ONCHIP: 2527 KKASSERT((ap->ap_active & ~ap->ap_expired) == 2528 (1 << ccb->ccb_slot)); 2529 ccb->ccb_xa.state = ATA_S_TIMEOUT; 2530 ap->ap_active &= ~(1 << ccb->ccb_slot); 2531 KKASSERT(ap->ap_active_cnt > 0); 2532 --ap->ap_active_cnt; 2533 sili_port_reinit(ap); 2534 break; 2535 default: 2536 panic("%s: sili_quick_timeout: ccb in bad state %d", 2537 ATANAME(ap, ccb->ccb_xa.at), ccb->ccb_xa.state); 2538 } 2539 } 2540 2541 static void 2542 sili_dummy_done(struct ata_xfer *xa) 2543 { 2544 } 2545 2546 static void 2547 sili_empty_done(struct sili_ccb *ccb) 2548 { 2549 } 2550