xref: /dragonfly/sys/dev/disk/sym/sym_hipd.c (revision 86e1c02b)
1 /*
2  *  Device driver optimized for the Symbios/LSI 53C896/53C895A/53C1010
3  *  PCI-SCSI controllers.
4  *
5  *  Copyright (C) 1999-2001  Gerard Roudier <groudier@free.fr>
6  *
7  *  This driver also supports the following Symbios/LSI PCI-SCSI chips:
8  *	53C810A, 53C825A, 53C860, 53C875, 53C876, 53C885, 53C895,
9  *	53C810,  53C815,  53C825 and the 53C1510D is 53C8XX mode.
10  *
11  *
12  *  This driver for FreeBSD-CAM is derived from the Linux sym53c8xx driver.
13  *  Copyright (C) 1998-1999  Gerard Roudier
14  *
15  *  The sym53c8xx driver is derived from the ncr53c8xx driver that had been
16  *  a port of the FreeBSD ncr driver to Linux-1.2.13.
17  *
18  *  The original ncr driver has been written for 386bsd and FreeBSD by
19  *          Wolfgang Stanglmeier        <wolf@cologne.de>
20  *          Stefan Esser                <se@mi.Uni-Koeln.de>
21  *  Copyright (C) 1994  Wolfgang Stanglmeier
22  *
23  *  The initialisation code, and part of the code that addresses
24  *  FreeBSD-CAM services is based on the aic7xxx driver for FreeBSD-CAM
25  *  written by Justin T. Gibbs.
26  *
27  *  Other major contributions:
28  *
29  *  NVRAM detection and reading.
30  *  Copyright (C) 1997 Richard Waltham <dormouse@farsrobt.demon.co.uk>
31  *
32  *-----------------------------------------------------------------------------
33  *
34  * Redistribution and use in source and binary forms, with or without
35  * modification, are permitted provided that the following conditions
36  * are met:
37  * 1. Redistributions of source code must retain the above copyright
38  *    notice, this list of conditions and the following disclaimer.
39  * 2. Redistributions in binary form must reproduce the above copyright
40  *    notice, this list of conditions and the following disclaimer in the
41  *    documentation and/or other materials provided with the distribution.
42  * 3. The name of the author may not be used to endorse or promote products
43  *    derived from this software without specific prior written permission.
44  *
45  * THIS SOFTWARE IS PROVIDED BY THE AUTHORS AND CONTRIBUTORS ``AS IS'' AND
46  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
47  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
48  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR
49  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
50  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
51  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
52  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
53  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
54  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
55  * SUCH DAMAGE.
56  */
57 
58 /* $FreeBSD: src/sys/dev/sym/sym_hipd.c,v 1.6.2.12 2001/12/02 19:01:10 groudier Exp $ */
59 /* $DragonFly: src/sys/dev/disk/sym/sym_hipd.c,v 1.22 2007/09/23 04:09:55 yanyh Exp $ */
60 
61 #define SYM_DRIVER_NAME	"sym-1.6.5-20000902"
62 
63 /* #define SYM_DEBUG_GENERIC_SUPPORT */
64 /* #define CAM_NEW_TRAN_CODE */
65 
66 #include "use_pci.h"
67 #include <sys/param.h>
68 
69 /*
70  *  Only use the BUS stuff for PCI under FreeBSD 4 and later versions.
71  *  Note that the old BUS stuff also works for FreeBSD 4 and spares
72  *  about 1 KB for the driver object file.
73  */
74 #if 	defined(__DragonFly__) || __FreeBSD_version >= 400000
75 #define	FreeBSD_Bus_Dma_Abstraction
76 #define	FreeBSD_Bus_Io_Abstraction
77 #define	FreeBSD_Bus_Space_Abstraction
78 #endif
79 
80 /*
81  *  Driver configuration options.
82  */
83 #include "opt_sym.h"
84 #include "sym_conf.h"
85 
86 #ifndef FreeBSD_Bus_Io_Abstraction
87 #include "use_ncr.h"	/* To know if the ncr has been configured */
88 #endif
89 
90 #include <sys/systm.h>
91 #include <sys/malloc.h>
92 #include <sys/kernel.h>
93 #ifdef FreeBSD_Bus_Io_Abstraction
94 #include <sys/module.h>
95 #include <sys/bus.h>
96 #include <sys/rman.h>
97 #endif
98 #include <sys/thread2.h>
99 
100 #include <sys/proc.h>
101 
102 #include <bus/pci/pcireg.h>
103 #include <bus/pci/pcivar.h>
104 
105 #include <machine/clock.h>
106 
107 #include <bus/cam/cam.h>
108 #include <bus/cam/cam_ccb.h>
109 #include <bus/cam/cam_sim.h>
110 #include <bus/cam/cam_xpt_sim.h>
111 #include <bus/cam/cam_debug.h>
112 
113 #include <bus/cam/scsi/scsi_all.h>
114 #include <bus/cam/scsi/scsi_message.h>
115 
116 #include <vm/vm.h>
117 #include <vm/vm_param.h>
118 #include <vm/pmap.h>
119 
120 /* Short and quite clear integer types */
121 typedef int8_t    s8;
122 typedef int16_t   s16;
123 typedef	int32_t   s32;
124 typedef u_int8_t  u8;
125 typedef u_int16_t u16;
126 typedef	u_int32_t u32;
127 
128 /*
129  *  From 'cam.error_recovery_diffs.20010313.context' patch.
130  */
131 #ifdef  CAM_NEW_TRAN_CODE
132 #define FreeBSD_New_Tran_Settings
133 #endif  /* CAM_NEW_TRAN_CODE */
134 
135 /*
136  *  Driver definitions.
137  */
138 #include "sym_defs.h"
139 #include "sym_fw.h"
140 
141 /*
142  *  IA32 architecture does not reorder STORES and prevents
143  *  LOADS from passing STORES. It is called `program order'
144  *  by Intel and allows device drivers to deal with memory
145  *  ordering by only ensuring that the code is not reordered
146  *  by the compiler when ordering is required.
147  *  Other architectures implement a weaker ordering that
148  *  requires memory barriers (and also IO barriers when they
149  *  make sense) to be used.
150  */
151 
152 #if	defined	__i386__ || defined __amd64__
153 #define MEMORY_BARRIER()	do { ; } while(0)
154 #elif	defined	__powerpc__
155 #define MEMORY_BARRIER()	__asm__ volatile("eieio; sync" : : : "memory")
156 #elif	defined	__ia64__
157 #define MEMORY_BARRIER()	__asm__ volatile("mf.a; mf" : : : "memory")
158 #elif	defined	__sparc64__
159 #define MEMORY_BARRIER()	__asm__ volatile("membar #Sync" : : : "memory")
160 #else
161 #error	"Not supported platform"
162 #endif
163 
164 /*
165  *  Portable but silly implemented byte order primitives.
166  *  We define the primitives we need, since FreeBSD doesn't
167  *  seem to have them yet.
168  */
169 #if	BYTE_ORDER == BIG_ENDIAN
170 
171 #define __revb16(x) (	(((u16)(x) & (u16)0x00ffU) << 8) | \
172 			(((u16)(x) & (u16)0xff00U) >> 8) 	)
173 #define __revb32(x) (	(((u32)(x) & 0x000000ffU) << 24) | \
174 			(((u32)(x) & 0x0000ff00U) <<  8) | \
175 			(((u32)(x) & 0x00ff0000U) >>  8) | \
176 			(((u32)(x) & 0xff000000U) >> 24)	)
177 
178 #define __htole16(v)	__revb16(v)
179 #define __htole32(v)	__revb32(v)
180 #define __le16toh(v)	__htole16(v)
181 #define __le32toh(v)	__htole32(v)
182 
183 static __inline u16	_htole16(u16 v) { return __htole16(v); }
184 static __inline u32	_htole32(u32 v) { return __htole32(v); }
185 #define _le16toh	_htole16
186 #define _le32toh	_htole32
187 
188 #else	/* LITTLE ENDIAN */
189 
190 #define __htole16(v)	(v)
191 #define __htole32(v)	(v)
192 #define __le16toh(v)	(v)
193 #define __le32toh(v)	(v)
194 
195 #define _htole16(v)	(v)
196 #define _htole32(v)	(v)
197 #define _le16toh(v)	(v)
198 #define _le32toh(v)	(v)
199 
200 #endif	/* BYTE_ORDER */
201 
202 /*
203  *  A la VMS/CAM-3 queue management.
204  */
205 
206 typedef struct sym_quehead {
207 	struct sym_quehead *flink;	/* Forward  pointer */
208 	struct sym_quehead *blink;	/* Backward pointer */
209 } SYM_QUEHEAD;
210 
211 #define sym_que_init(ptr) do { \
212 	(ptr)->flink = (ptr); (ptr)->blink = (ptr); \
213 } while (0)
214 
215 static __inline struct sym_quehead *sym_que_first(struct sym_quehead *head)
216 {
217 	return (head->flink == head) ? 0 : head->flink;
218 }
219 
220 static __inline struct sym_quehead *sym_que_last(struct sym_quehead *head)
221 {
222 	return (head->blink == head) ? 0 : head->blink;
223 }
224 
225 static __inline void __sym_que_add(struct sym_quehead * new,
226 	struct sym_quehead * blink,
227 	struct sym_quehead * flink)
228 {
229 	flink->blink	= new;
230 	new->flink	= flink;
231 	new->blink	= blink;
232 	blink->flink	= new;
233 }
234 
235 static __inline void __sym_que_del(struct sym_quehead * blink,
236 	struct sym_quehead * flink)
237 {
238 	flink->blink = blink;
239 	blink->flink = flink;
240 }
241 
242 static __inline int sym_que_empty(struct sym_quehead *head)
243 {
244 	return head->flink == head;
245 }
246 
247 static __inline void sym_que_splice(struct sym_quehead *list,
248 	struct sym_quehead *head)
249 {
250 	struct sym_quehead *first = list->flink;
251 
252 	if (first != list) {
253 		struct sym_quehead *last = list->blink;
254 		struct sym_quehead *at   = head->flink;
255 
256 		first->blink = head;
257 		head->flink  = first;
258 
259 		last->flink = at;
260 		at->blink   = last;
261 	}
262 }
263 
264 #define sym_que_entry(ptr, type, member) \
265 	((type *)((char *)(ptr)-(unsigned int)(&((type *)0)->member)))
266 
267 
268 #define sym_insque(new, pos)		__sym_que_add(new, pos, (pos)->flink)
269 
270 #define sym_remque(el)			__sym_que_del((el)->blink, (el)->flink)
271 
272 #define sym_insque_head(new, head)	__sym_que_add(new, head, (head)->flink)
273 
274 static __inline struct sym_quehead *sym_remque_head(struct sym_quehead *head)
275 {
276 	struct sym_quehead *elem = head->flink;
277 
278 	if (elem != head)
279 		__sym_que_del(head, elem->flink);
280 	else
281 		elem = 0;
282 	return elem;
283 }
284 
285 #define sym_insque_tail(new, head)	__sym_que_add(new, (head)->blink, head)
286 
287 static __inline struct sym_quehead *sym_remque_tail(struct sym_quehead *head)
288 {
289 	struct sym_quehead *elem = head->blink;
290 
291 	if (elem != head)
292 		__sym_que_del(elem->blink, head);
293 	else
294 		elem = 0;
295 	return elem;
296 }
297 
298 /*
299  *  This one may be useful.
300  */
301 #define FOR_EACH_QUEUED_ELEMENT(head, qp) \
302 	for (qp = (head)->flink; qp != (head); qp = qp->flink)
303 /*
304  *  FreeBSD does not offer our kind of queue in the CAM CCB.
305  *  So, we have to cast.
306  */
307 #define sym_qptr(p)	((struct sym_quehead *) (p))
308 
309 /*
310  *  Simple bitmap operations.
311  */
312 #define sym_set_bit(p, n)	(((u32 *)(p))[(n)>>5] |=  (1<<((n)&0x1f)))
313 #define sym_clr_bit(p, n)	(((u32 *)(p))[(n)>>5] &= ~(1<<((n)&0x1f)))
314 #define sym_is_bit(p, n)	(((u32 *)(p))[(n)>>5] &   (1<<((n)&0x1f)))
315 
316 /*
317  *  Number of tasks per device we want to handle.
318  */
319 #if	SYM_CONF_MAX_TAG_ORDER > 8
320 #error	"more than 256 tags per logical unit not allowed."
321 #endif
322 #define	SYM_CONF_MAX_TASK	(1<<SYM_CONF_MAX_TAG_ORDER)
323 
324 /*
325  *  Donnot use more tasks that we can handle.
326  */
327 #ifndef	SYM_CONF_MAX_TAG
328 #define	SYM_CONF_MAX_TAG	SYM_CONF_MAX_TASK
329 #endif
330 #if	SYM_CONF_MAX_TAG > SYM_CONF_MAX_TASK
331 #undef	SYM_CONF_MAX_TAG
332 #define	SYM_CONF_MAX_TAG	SYM_CONF_MAX_TASK
333 #endif
334 
335 /*
336  *    This one means 'NO TAG for this job'
337  */
338 #define NO_TAG	(256)
339 
340 /*
341  *  Number of SCSI targets.
342  */
343 #if	SYM_CONF_MAX_TARGET > 16
344 #error	"more than 16 targets not allowed."
345 #endif
346 
347 /*
348  *  Number of logical units per target.
349  */
350 #if	SYM_CONF_MAX_LUN > 64
351 #error	"more than 64 logical units per target not allowed."
352 #endif
353 
354 /*
355  *    Asynchronous pre-scaler (ns). Shall be 40 for
356  *    the SCSI timings to be compliant.
357  */
358 #define	SYM_CONF_MIN_ASYNC (40)
359 
360 /*
361  *  Number of entries in the START and DONE queues.
362  *
363  *  We limit to 1 PAGE in order to succeed allocation of
364  *  these queues. Each entry is 8 bytes long (2 DWORDS).
365  */
366 #ifdef	SYM_CONF_MAX_START
367 #define	SYM_CONF_MAX_QUEUE (SYM_CONF_MAX_START+2)
368 #else
369 #define	SYM_CONF_MAX_QUEUE (7*SYM_CONF_MAX_TASK+2)
370 #define	SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
371 #endif
372 
373 #if	SYM_CONF_MAX_QUEUE > PAGE_SIZE/8
374 #undef	SYM_CONF_MAX_QUEUE
375 #define	SYM_CONF_MAX_QUEUE   PAGE_SIZE/8
376 #undef	SYM_CONF_MAX_START
377 #define	SYM_CONF_MAX_START (SYM_CONF_MAX_QUEUE-2)
378 #endif
379 
380 /*
381  *  For this one, we want a short name :-)
382  */
383 #define MAX_QUEUE	SYM_CONF_MAX_QUEUE
384 
385 /*
386  *  Active debugging tags and verbosity.
387  */
388 #define DEBUG_ALLOC	(0x0001)
389 #define DEBUG_PHASE	(0x0002)
390 #define DEBUG_POLL	(0x0004)
391 #define DEBUG_QUEUE	(0x0008)
392 #define DEBUG_RESULT	(0x0010)
393 #define DEBUG_SCATTER	(0x0020)
394 #define DEBUG_SCRIPT	(0x0040)
395 #define DEBUG_TINY	(0x0080)
396 #define DEBUG_TIMING	(0x0100)
397 #define DEBUG_NEGO	(0x0200)
398 #define DEBUG_TAGS	(0x0400)
399 #define DEBUG_POINTER	(0x0800)
400 
401 #if 0
402 static int sym_debug = 0;
403 	#define DEBUG_FLAGS sym_debug
404 #else
405 /*	#define DEBUG_FLAGS (0x0631) */
406 	#define DEBUG_FLAGS (0x0000)
407 
408 #endif
409 #define sym_verbose	(np->verbose)
410 
411 /*
412  *  Insert a delay in micro-seconds and milli-seconds.
413  */
414 static void UDELAY(int us) { DELAY(us); }
415 static void MDELAY(int ms) { while (ms--) UDELAY(1000); }
416 
417 /*
418  *  Simple power of two buddy-like allocator.
419  *
420  *  This simple code is not intended to be fast, but to
421  *  provide power of 2 aligned memory allocations.
422  *  Since the SCRIPTS processor only supplies 8 bit arithmetic,
423  *  this allocator allows simple and fast address calculations
424  *  from the SCRIPTS code. In addition, cache line alignment
425  *  is guaranteed for power of 2 cache line size.
426  *
427  *  This allocator has been developped for the Linux sym53c8xx
428  *  driver, since this O/S does not provide naturally aligned
429  *  allocations.
430  *  It has the advantage of allowing the driver to use private
431  *  pages of memory that will be useful if we ever need to deal
432  *  with IO MMUs for PCI.
433  */
434 
435 #define MEMO_SHIFT	4	/* 16 bytes minimum memory chunk */
436 #define MEMO_PAGE_ORDER	0	/* 1 PAGE  maximum */
437 #if 0
438 #define MEMO_FREE_UNUSED	/* Free unused pages immediately */
439 #endif
440 #define MEMO_WARN	1
441 #define MEMO_CLUSTER_SHIFT	(PAGE_SHIFT+MEMO_PAGE_ORDER)
442 #define MEMO_CLUSTER_SIZE	(1UL << MEMO_CLUSTER_SHIFT)
443 #define MEMO_CLUSTER_MASK	(MEMO_CLUSTER_SIZE-1)
444 
445 #define get_pages()		kmalloc(MEMO_CLUSTER_SIZE, M_DEVBUF, M_INTWAIT)
446 #define free_pages(p)		kfree((p), M_DEVBUF)
447 
448 typedef u_long m_addr_t;	/* Enough bits to bit-hack addresses */
449 
450 typedef struct m_link {		/* Link between free memory chunks */
451 	struct m_link *next;
452 } m_link_s;
453 
454 #ifdef	FreeBSD_Bus_Dma_Abstraction
455 typedef struct m_vtob {		/* Virtual to Bus address translation */
456 	struct m_vtob	*next;
457 	bus_dmamap_t	dmamap;	/* Map for this chunk */
458 	m_addr_t	vaddr;	/* Virtual address */
459 	m_addr_t	baddr;	/* Bus physical address */
460 } m_vtob_s;
461 /* Hash this stuff a bit to speed up translations */
462 #define VTOB_HASH_SHIFT		5
463 #define VTOB_HASH_SIZE		(1UL << VTOB_HASH_SHIFT)
464 #define VTOB_HASH_MASK		(VTOB_HASH_SIZE-1)
465 #define VTOB_HASH_CODE(m)	\
466 	((((m_addr_t) (m)) >> MEMO_CLUSTER_SHIFT) & VTOB_HASH_MASK)
467 #endif
468 
469 typedef struct m_pool {		/* Memory pool of a given kind */
470 #ifdef	FreeBSD_Bus_Dma_Abstraction
471 	bus_dma_tag_t	 dev_dmat;	/* Identifies the pool */
472 	bus_dma_tag_t	 dmat;		/* Tag for our fixed allocations */
473 	m_addr_t (*getp)(struct m_pool *);
474 #ifdef	MEMO_FREE_UNUSED
475 	void (*freep)(struct m_pool *, m_addr_t);
476 #endif
477 #define M_GETP()		mp->getp(mp)
478 #define M_FREEP(p)		mp->freep(mp, p)
479 	int nump;
480 	m_vtob_s *(vtob[VTOB_HASH_SIZE]);
481 	struct m_pool *next;
482 #else
483 #define M_GETP()		get_pages()
484 #define M_FREEP(p)		free_pages(p)
485 #endif	/* FreeBSD_Bus_Dma_Abstraction */
486 	struct m_link h[MEMO_CLUSTER_SHIFT - MEMO_SHIFT + 1];
487 } m_pool_s;
488 
489 static void *___sym_malloc(m_pool_s *mp, int size)
490 {
491 	int i = 0;
492 	int s = (1 << MEMO_SHIFT);
493 	int j;
494 	m_addr_t a;
495 	m_link_s *h = mp->h;
496 
497 	if (size > MEMO_CLUSTER_SIZE)
498 		return 0;
499 
500 	while (size > s) {
501 		s <<= 1;
502 		++i;
503 	}
504 
505 	j = i;
506 	while (!h[j].next) {
507 		if (s == MEMO_CLUSTER_SIZE) {
508 			h[j].next = (m_link_s *) M_GETP();
509 			if (h[j].next)
510 				h[j].next->next = 0;
511 			break;
512 		}
513 		++j;
514 		s <<= 1;
515 	}
516 	a = (m_addr_t) h[j].next;
517 	if (a) {
518 		h[j].next = h[j].next->next;
519 		while (j > i) {
520 			j -= 1;
521 			s >>= 1;
522 			h[j].next = (m_link_s *) (a+s);
523 			h[j].next->next = 0;
524 		}
525 	}
526 #ifdef DEBUG
527 	kprintf("___sym_malloc(%d) = %p\n", size, (void *) a);
528 #endif
529 	return (void *) a;
530 }
531 
532 static void ___sym_mfree(m_pool_s *mp, void *ptr, int size)
533 {
534 	int i = 0;
535 	int s = (1 << MEMO_SHIFT);
536 	m_link_s *q;
537 	m_addr_t a, b;
538 	m_link_s *h = mp->h;
539 
540 #ifdef DEBUG
541 	kprintf("___sym_mfree(%p, %d)\n", ptr, size);
542 #endif
543 
544 	if (size > MEMO_CLUSTER_SIZE)
545 		return;
546 
547 	while (size > s) {
548 		s <<= 1;
549 		++i;
550 	}
551 
552 	a = (m_addr_t) ptr;
553 
554 	while (1) {
555 #ifdef MEMO_FREE_UNUSED
556 		if (s == MEMO_CLUSTER_SIZE) {
557 			M_FREEP(a);
558 			break;
559 		}
560 #endif
561 		b = a ^ s;
562 		q = &h[i];
563 		while (q->next && q->next != (m_link_s *) b) {
564 			q = q->next;
565 		}
566 		if (!q->next) {
567 			((m_link_s *) a)->next = h[i].next;
568 			h[i].next = (m_link_s *) a;
569 			break;
570 		}
571 		q->next = q->next->next;
572 		a = a & b;
573 		s <<= 1;
574 		++i;
575 	}
576 }
577 
578 static void *__sym_calloc2(m_pool_s *mp, int size, char *name, int uflags)
579 {
580 	void *p;
581 
582 	p = ___sym_malloc(mp, size);
583 
584 	if (DEBUG_FLAGS & DEBUG_ALLOC)
585 		kprintf ("new %-10s[%4d] @%p.\n", name, size, p);
586 
587 	if (p)
588 		bzero(p, size);
589 	else if (uflags & MEMO_WARN)
590 		kprintf ("__sym_calloc2: failed to allocate %s[%d]\n", name, size);
591 
592 	return p;
593 }
594 
595 #define __sym_calloc(mp, s, n)	__sym_calloc2(mp, s, n, MEMO_WARN)
596 
597 static void __sym_mfree(m_pool_s *mp, void *ptr, int size, char *name)
598 {
599 	if (DEBUG_FLAGS & DEBUG_ALLOC)
600 		kprintf ("freeing %-10s[%4d] @%p.\n", name, size, ptr);
601 
602 	___sym_mfree(mp, ptr, size);
603 
604 }
605 
606 /*
607  * Default memory pool we donnot need to involve in DMA.
608  */
609 #ifndef	FreeBSD_Bus_Dma_Abstraction
610 /*
611  * Without the `bus dma abstraction', all the memory is assumed
612  * DMAable and a single pool is all what we need.
613  */
614 static m_pool_s mp0;
615 
616 #else
617 /*
618  * With the `bus dma abstraction', we use a separate pool for
619  * memory we donnot need to involve in DMA.
620  */
621 static m_addr_t ___mp0_getp(m_pool_s *mp)
622 {
623 	m_addr_t m = (m_addr_t) get_pages();
624 	if (m)
625 		++mp->nump;
626 	return m;
627 }
628 
629 #ifdef	MEMO_FREE_UNUSED
630 static void ___mp0_freep(m_pool_s *mp, m_addr_t m)
631 {
632 	free_pages(m);
633 	--mp->nump;
634 }
635 #endif
636 
637 #ifdef	MEMO_FREE_UNUSED
638 static m_pool_s mp0 = {0, 0, ___mp0_getp, ___mp0_freep};
639 #else
640 static m_pool_s mp0 = {0, 0, ___mp0_getp};
641 #endif
642 
643 #endif	/* FreeBSD_Bus_Dma_Abstraction */
644 
645 /*
646  * Actual memory allocation routine for non-DMAed memory.
647  */
648 static void *sym_calloc(int size, char *name)
649 {
650 	void *m;
651 	/* Lock */
652 	m = __sym_calloc(&mp0, size, name);
653 	/* Unlock */
654 	return m;
655 }
656 
657 /*
658  * Actual memory allocation routine for non-DMAed memory.
659  */
660 static void sym_mfree(void *ptr, int size, char *name)
661 {
662 	/* Lock */
663 	__sym_mfree(&mp0, ptr, size, name);
664 	/* Unlock */
665 }
666 
667 /*
668  * DMAable pools.
669  */
670 #ifndef	FreeBSD_Bus_Dma_Abstraction
671 /*
672  * Without `bus dma abstraction', all the memory is DMAable, and
673  * only a single pool is needed (vtophys() is our friend).
674  */
675 #define __sym_calloc_dma(b, s, n)	sym_calloc(s, n)
676 #define __sym_mfree_dma(b, p, s, n)	sym_mfree(p, s, n)
677 #define __vtobus(b, p)	vtophys(p)
678 
679 #else
680 /*
681  * With `bus dma abstraction', we use a separate pool per parent
682  * BUS handle. A reverse table (hashed) is maintained for virtual
683  * to BUS address translation.
684  */
685 static void getbaddrcb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
686 {
687 	bus_addr_t *baddr;
688 	baddr = (bus_addr_t *)arg;
689 	*baddr = segs->ds_addr;
690 }
691 
692 static m_addr_t ___dma_getp(m_pool_s *mp)
693 {
694 	m_vtob_s *vbp;
695 	void *vaddr = 0;
696 	bus_addr_t baddr = 0;
697 
698 	vbp = __sym_calloc(&mp0, sizeof(*vbp), "VTOB");
699 	if (!vbp)
700 		goto out_err;
701 
702 	if (bus_dmamem_alloc(mp->dmat, &vaddr,
703 			      BUS_DMA_NOWAIT, &vbp->dmamap))
704 		goto out_err;
705 	bus_dmamap_load(mp->dmat, vbp->dmamap, vaddr,
706 			MEMO_CLUSTER_SIZE, getbaddrcb, &baddr, 0);
707 	if (baddr) {
708 		int hc = VTOB_HASH_CODE(vaddr);
709 		vbp->vaddr = (m_addr_t) vaddr;
710 		vbp->baddr = (m_addr_t) baddr;
711 		vbp->next = mp->vtob[hc];
712 		mp->vtob[hc] = vbp;
713 		++mp->nump;
714 		return (m_addr_t) vaddr;
715 	}
716 out_err:
717 	if (baddr)
718 		bus_dmamap_unload(mp->dmat, vbp->dmamap);
719 	if (vaddr)
720 		bus_dmamem_free(mp->dmat, vaddr, vbp->dmamap);
721 	if (vbp->dmamap)
722 		bus_dmamap_destroy(mp->dmat, vbp->dmamap);
723 	if (vbp)
724 		__sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
725 	return 0;
726 }
727 
728 #ifdef	MEMO_FREE_UNUSED
729 static void ___dma_freep(m_pool_s *mp, m_addr_t m)
730 {
731 	m_vtob_s **vbpp, *vbp;
732 	int hc = VTOB_HASH_CODE(m);
733 
734 	vbpp = &mp->vtob[hc];
735 	while (*vbpp && (*vbpp)->vaddr != m)
736 		vbpp = &(*vbpp)->next;
737 	if (*vbpp) {
738 		vbp = *vbpp;
739 		*vbpp = (*vbpp)->next;
740 		bus_dmamap_unload(mp->dmat, vbp->dmamap);
741 		bus_dmamem_free(mp->dmat, (void *) vbp->vaddr, vbp->dmamap);
742 		bus_dmamap_destroy(mp->dmat, vbp->dmamap);
743 		__sym_mfree(&mp0, vbp, sizeof(*vbp), "VTOB");
744 		--mp->nump;
745 	}
746 }
747 #endif
748 
749 static __inline m_pool_s *___get_dma_pool(bus_dma_tag_t dev_dmat)
750 {
751 	m_pool_s *mp;
752 	for (mp = mp0.next; mp && mp->dev_dmat != dev_dmat; mp = mp->next);
753 	return mp;
754 }
755 
756 static m_pool_s *___cre_dma_pool(bus_dma_tag_t dev_dmat)
757 {
758 	m_pool_s *mp = 0;
759 
760 	mp = __sym_calloc(&mp0, sizeof(*mp), "MPOOL");
761 	if (mp) {
762 		mp->dev_dmat = dev_dmat;
763 		if (!bus_dma_tag_create(dev_dmat, 1, MEMO_CLUSTER_SIZE,
764 			       BUS_SPACE_MAXADDR_32BIT,
765 			       BUS_SPACE_MAXADDR_32BIT,
766 			       NULL, NULL, MEMO_CLUSTER_SIZE, 1,
767 			       MEMO_CLUSTER_SIZE, 0, &mp->dmat)) {
768 			mp->getp = ___dma_getp;
769 #ifdef	MEMO_FREE_UNUSED
770 			mp->freep = ___dma_freep;
771 #endif
772 			mp->next = mp0.next;
773 			mp0.next = mp;
774 			return mp;
775 		}
776 	}
777 	if (mp)
778 		__sym_mfree(&mp0, mp, sizeof(*mp), "MPOOL");
779 	return 0;
780 }
781 
782 #ifdef	MEMO_FREE_UNUSED
783 static void ___del_dma_pool(m_pool_s *p)
784 {
785 	struct m_pool **pp = &mp0.next;
786 
787 	while (*pp && *pp != p)
788 		pp = &(*pp)->next;
789 	if (*pp) {
790 		*pp = (*pp)->next;
791 		bus_dma_tag_destroy(p->dmat);
792 		__sym_mfree(&mp0, p, sizeof(*p), "MPOOL");
793 	}
794 }
795 #endif
796 
797 static void *__sym_calloc_dma(bus_dma_tag_t dev_dmat, int size, char *name)
798 {
799 	struct m_pool *mp;
800 	void *m = 0;
801 
802 	/* Lock */
803 	mp = ___get_dma_pool(dev_dmat);
804 	if (!mp)
805 		mp = ___cre_dma_pool(dev_dmat);
806 	if (mp)
807 		m = __sym_calloc(mp, size, name);
808 #ifdef	MEMO_FREE_UNUSED
809 	if (mp && !mp->nump)
810 		___del_dma_pool(mp);
811 #endif
812 	/* Unlock */
813 
814 	return m;
815 }
816 
817 static void
818 __sym_mfree_dma(bus_dma_tag_t dev_dmat, void *m, int size, char *name)
819 {
820 	struct m_pool *mp;
821 
822 	/* Lock */
823 	mp = ___get_dma_pool(dev_dmat);
824 	if (mp)
825 		__sym_mfree(mp, m, size, name);
826 #ifdef	MEMO_FREE_UNUSED
827 	if (mp && !mp->nump)
828 		___del_dma_pool(mp);
829 #endif
830 	/* Unlock */
831 }
832 
833 static m_addr_t __vtobus(bus_dma_tag_t dev_dmat, void *m)
834 {
835 	m_pool_s *mp;
836 	int hc = VTOB_HASH_CODE(m);
837 	m_vtob_s *vp = 0;
838 	m_addr_t a = ((m_addr_t) m) & ~MEMO_CLUSTER_MASK;
839 
840 	/* Lock */
841 	mp = ___get_dma_pool(dev_dmat);
842 	if (mp) {
843 		vp = mp->vtob[hc];
844 		while (vp && (m_addr_t) vp->vaddr != a)
845 			vp = vp->next;
846 	}
847 	/* Unlock */
848 	if (!vp)
849 		panic("sym: VTOBUS FAILED!\n");
850 	return vp ? vp->baddr + (((m_addr_t) m) - a) : 0;
851 }
852 
853 #endif	/* FreeBSD_Bus_Dma_Abstraction */
854 
855 /*
856  * Verbs for DMAable memory handling.
857  * The _uvptv_ macro avoids a nasty warning about pointer to volatile
858  * being discarded.
859  */
860 #define _uvptv_(p) ((void *)((vm_offset_t)(p)))
861 #define _sym_calloc_dma(np, s, n)	__sym_calloc_dma(np->bus_dmat, s, n)
862 #define _sym_mfree_dma(np, p, s, n)	\
863 				__sym_mfree_dma(np->bus_dmat, _uvptv_(p), s, n)
864 #define sym_calloc_dma(s, n)		_sym_calloc_dma(np, s, n)
865 #define sym_mfree_dma(p, s, n)		_sym_mfree_dma(np, p, s, n)
866 #define _vtobus(np, p)			__vtobus(np->bus_dmat, _uvptv_(p))
867 #define vtobus(p)			_vtobus(np, p)
868 
869 
870 /*
871  *  Print a buffer in hexadecimal format.
872  */
873 static void sym_printb_hex (u_char *p, int n)
874 {
875 	while (n-- > 0)
876 		kprintf (" %x", *p++);
877 }
878 
879 /*
880  *  Same with a label at beginning and .\n at end.
881  */
882 static void sym_printl_hex (char *label, u_char *p, int n)
883 {
884 	kprintf ("%s", label);
885 	sym_printb_hex (p, n);
886 	kprintf (".\n");
887 }
888 
889 /*
890  *  Return a string for SCSI BUS mode.
891  */
892 static char *sym_scsi_bus_mode(int mode)
893 {
894 	switch(mode) {
895 	case SMODE_HVD:	return "HVD";
896 	case SMODE_SE:	return "SE";
897 	case SMODE_LVD: return "LVD";
898 	}
899 	return "??";
900 }
901 
902 /*
903  *  Some poor and bogus sync table that refers to Tekram NVRAM layout.
904  */
905 #ifdef SYM_CONF_NVRAM_SUPPORT
906 static u_char Tekram_sync[16] =
907 	{25,31,37,43, 50,62,75,125, 12,15,18,21, 6,7,9,10};
908 #endif
909 
910 /*
911  *  Union of supported NVRAM formats.
912  */
913 struct sym_nvram {
914 	int type;
915 #define	SYM_SYMBIOS_NVRAM	(1)
916 #define	SYM_TEKRAM_NVRAM	(2)
917 #ifdef	SYM_CONF_NVRAM_SUPPORT
918 	union {
919 		Symbios_nvram Symbios;
920 		Tekram_nvram Tekram;
921 	} data;
922 #endif
923 };
924 
925 /*
926  *  This one is hopefully useless, but actually useful. :-)
927  */
928 #ifndef assert
929 #define	assert(expression) { \
930 	if (!(expression)) { \
931 		(void)panic( \
932 			"assertion \"%s\" failed: file \"%s\", line %d\n", \
933 			#expression, \
934 			__FILE__, __LINE__); \
935 	} \
936 }
937 #endif
938 
939 /*
940  *  Some provision for a possible big endian mode supported by
941  *  Symbios chips (never seen, by the way).
942  *  For now, this stuff does not deserve any comments. :)
943  */
944 
945 #define sym_offb(o)	(o)
946 #define sym_offw(o)	(o)
947 
948 /*
949  *  Some provision for support for BIG ENDIAN CPU.
950  *  Btw, FreeBSD does not seem to be ready yet for big endian.
951  */
952 
953 #if	BYTE_ORDER == BIG_ENDIAN
954 #define cpu_to_scr(dw)	_htole32(dw)
955 #define scr_to_cpu(dw)	_le32toh(dw)
956 #else
957 #define cpu_to_scr(dw)	(dw)
958 #define scr_to_cpu(dw)	(dw)
959 #endif
960 
961 /*
962  *  Access to the chip IO registers and on-chip RAM.
963  *  We use the `bus space' interface under FreeBSD-4 and
964  *  later kernel versions.
965  */
966 
967 #ifdef	FreeBSD_Bus_Space_Abstraction
968 
969 #if defined(SYM_CONF_IOMAPPED)
970 
971 #define INB_OFF(o)	bus_space_read_1(np->io_tag, np->io_bsh, o)
972 #define INW_OFF(o)	bus_space_read_2(np->io_tag, np->io_bsh, o)
973 #define INL_OFF(o)	bus_space_read_4(np->io_tag, np->io_bsh, o)
974 
975 #define OUTB_OFF(o, v)	bus_space_write_1(np->io_tag, np->io_bsh, o, (v))
976 #define OUTW_OFF(o, v)	bus_space_write_2(np->io_tag, np->io_bsh, o, (v))
977 #define OUTL_OFF(o, v)	bus_space_write_4(np->io_tag, np->io_bsh, o, (v))
978 
979 #else	/* Memory mapped IO */
980 
981 #define INB_OFF(o)	bus_space_read_1(np->mmio_tag, np->mmio_bsh, o)
982 #define INW_OFF(o)	bus_space_read_2(np->mmio_tag, np->mmio_bsh, o)
983 #define INL_OFF(o)	bus_space_read_4(np->mmio_tag, np->mmio_bsh, o)
984 
985 #define OUTB_OFF(o, v)	bus_space_write_1(np->mmio_tag, np->mmio_bsh, o, (v))
986 #define OUTW_OFF(o, v)	bus_space_write_2(np->mmio_tag, np->mmio_bsh, o, (v))
987 #define OUTL_OFF(o, v)	bus_space_write_4(np->mmio_tag, np->mmio_bsh, o, (v))
988 
989 #endif	/* SYM_CONF_IOMAPPED */
990 
991 #define OUTRAM_OFF(o, a, l)	\
992 	bus_space_write_region_1(np->ram_tag, np->ram_bsh, o, (a), (l))
993 
994 #else	/* not defined FreeBSD_Bus_Space_Abstraction */
995 
996 #if	BYTE_ORDER == BIG_ENDIAN
997 #error	"BIG ENDIAN support requires bus space kernel interface"
998 #endif
999 
1000 /*
1001  *  Access to the chip IO registers and on-chip RAM.
1002  *  We use legacy MMIO and IO interface for FreeBSD 3.X versions.
1003  */
1004 
1005 /*
1006  *  Define some understable verbs for IO and MMIO.
1007  */
1008 #define io_read8(p)	 scr_to_cpu(inb((p)))
1009 #define	io_read16(p)	 scr_to_cpu(inw((p)))
1010 #define io_read32(p)	 scr_to_cpu(inl((p)))
1011 #define	io_write8(p, v)	 outb((p), cpu_to_scr(v))
1012 #define io_write16(p, v) outw((p), cpu_to_scr(v))
1013 #define io_write32(p, v) outl((p), cpu_to_scr(v))
1014 
1015 #define mmio_read8(a)	     scr_to_cpu((*(volatile unsigned char *) (a)))
1016 #define mmio_read16(a)	     scr_to_cpu((*(volatile unsigned short *) (a)))
1017 #define mmio_read32(a)	     scr_to_cpu((*(volatile unsigned int *) (a)))
1018 #define mmio_write8(a, b)   (*(volatile unsigned char *) (a)) = cpu_to_scr(b)
1019 #define mmio_write16(a, b)  (*(volatile unsigned short *) (a)) = cpu_to_scr(b)
1020 #define mmio_write32(a, b)  (*(volatile unsigned int *) (a)) = cpu_to_scr(b)
1021 #define memcpy_to_pci(d, s, n)	bcopy((s), (void *)(d), (n))
1022 
1023 /*
1024  *  Normal IO
1025  */
1026 #if defined(SYM_CONF_IOMAPPED)
1027 
1028 #define	INB_OFF(o)	io_read8(np->io_port + sym_offb(o))
1029 #define	OUTB_OFF(o, v)	io_write8(np->io_port + sym_offb(o), (v))
1030 
1031 #define	INW_OFF(o)	io_read16(np->io_port + sym_offw(o))
1032 #define	OUTW_OFF(o, v)	io_write16(np->io_port + sym_offw(o), (v))
1033 
1034 #define	INL_OFF(o)	io_read32(np->io_port + (o))
1035 #define	OUTL_OFF(o, v)	io_write32(np->io_port + (o), (v))
1036 
1037 #else	/* Memory mapped IO */
1038 
1039 #define	INB_OFF(o)	mmio_read8(np->mmio_va + sym_offb(o))
1040 #define	OUTB_OFF(o, v)	mmio_write8(np->mmio_va + sym_offb(o), (v))
1041 
1042 #define	INW_OFF(o)	mmio_read16(np->mmio_va + sym_offw(o))
1043 #define	OUTW_OFF(o, v)	mmio_write16(np->mmio_va + sym_offw(o), (v))
1044 
1045 #define	INL_OFF(o)	mmio_read32(np->mmio_va + (o))
1046 #define	OUTL_OFF(o, v)	mmio_write32(np->mmio_va + (o), (v))
1047 
1048 #endif
1049 
1050 #define OUTRAM_OFF(o, a, l) memcpy_to_pci(np->ram_va + (o), (a), (l))
1051 
1052 #endif	/* FreeBSD_Bus_Space_Abstraction */
1053 
1054 /*
1055  *  Common definitions for both bus space and legacy IO methods.
1056  */
1057 #define INB(r)		INB_OFF(offsetof(struct sym_reg,r))
1058 #define INW(r)		INW_OFF(offsetof(struct sym_reg,r))
1059 #define INL(r)		INL_OFF(offsetof(struct sym_reg,r))
1060 
1061 #define OUTB(r, v)	OUTB_OFF(offsetof(struct sym_reg,r), (v))
1062 #define OUTW(r, v)	OUTW_OFF(offsetof(struct sym_reg,r), (v))
1063 #define OUTL(r, v)	OUTL_OFF(offsetof(struct sym_reg,r), (v))
1064 
1065 #define OUTONB(r, m)	OUTB(r, INB(r) | (m))
1066 #define OUTOFFB(r, m)	OUTB(r, INB(r) & ~(m))
1067 #define OUTONW(r, m)	OUTW(r, INW(r) | (m))
1068 #define OUTOFFW(r, m)	OUTW(r, INW(r) & ~(m))
1069 #define OUTONL(r, m)	OUTL(r, INL(r) | (m))
1070 #define OUTOFFL(r, m)	OUTL(r, INL(r) & ~(m))
1071 
1072 /*
1073  *  We normally want the chip to have a consistent view
1074  *  of driver internal data structures when we restart it.
1075  *  Thus these macros.
1076  */
1077 #define OUTL_DSP(v)				\
1078 	do {					\
1079 		MEMORY_BARRIER();		\
1080 		OUTL (nc_dsp, (v));		\
1081 	} while (0)
1082 
1083 #define OUTONB_STD()				\
1084 	do {					\
1085 		MEMORY_BARRIER();		\
1086 		OUTONB (nc_dcntl, (STD|NOCOM));	\
1087 	} while (0)
1088 
1089 /*
1090  *  Command control block states.
1091  */
1092 #define HS_IDLE		(0)
1093 #define HS_BUSY		(1)
1094 #define HS_NEGOTIATE	(2)	/* sync/wide data transfer*/
1095 #define HS_DISCONNECT	(3)	/* Disconnected by target */
1096 #define HS_WAIT		(4)	/* waiting for resource	  */
1097 
1098 #define HS_DONEMASK	(0x80)
1099 #define HS_COMPLETE	(4|HS_DONEMASK)
1100 #define HS_SEL_TIMEOUT	(5|HS_DONEMASK)	/* Selection timeout      */
1101 #define HS_UNEXPECTED	(6|HS_DONEMASK)	/* Unexpected disconnect  */
1102 #define HS_COMP_ERR	(7|HS_DONEMASK)	/* Completed with error	  */
1103 
1104 /*
1105  *  Software Interrupt Codes
1106  */
1107 #define	SIR_BAD_SCSI_STATUS	(1)
1108 #define	SIR_SEL_ATN_NO_MSG_OUT	(2)
1109 #define	SIR_MSG_RECEIVED	(3)
1110 #define	SIR_MSG_WEIRD		(4)
1111 #define	SIR_NEGO_FAILED		(5)
1112 #define	SIR_NEGO_PROTO		(6)
1113 #define	SIR_SCRIPT_STOPPED	(7)
1114 #define	SIR_REJECT_TO_SEND	(8)
1115 #define	SIR_SWIDE_OVERRUN	(9)
1116 #define	SIR_SODL_UNDERRUN	(10)
1117 #define	SIR_RESEL_NO_MSG_IN	(11)
1118 #define	SIR_RESEL_NO_IDENTIFY	(12)
1119 #define	SIR_RESEL_BAD_LUN	(13)
1120 #define	SIR_TARGET_SELECTED	(14)
1121 #define	SIR_RESEL_BAD_I_T_L	(15)
1122 #define	SIR_RESEL_BAD_I_T_L_Q	(16)
1123 #define	SIR_ABORT_SENT		(17)
1124 #define	SIR_RESEL_ABORTED	(18)
1125 #define	SIR_MSG_OUT_DONE	(19)
1126 #define	SIR_COMPLETE_ERROR	(20)
1127 #define	SIR_DATA_OVERRUN	(21)
1128 #define	SIR_BAD_PHASE		(22)
1129 #define	SIR_MAX			(22)
1130 
1131 /*
1132  *  Extended error bit codes.
1133  *  xerr_status field of struct sym_ccb.
1134  */
1135 #define	XE_EXTRA_DATA	(1)	/* unexpected data phase	 */
1136 #define	XE_BAD_PHASE	(1<<1)	/* illegal phase (4/5)		 */
1137 #define	XE_PARITY_ERR	(1<<2)	/* unrecovered SCSI parity error */
1138 #define	XE_SODL_UNRUN	(1<<3)	/* ODD transfer in DATA OUT phase */
1139 #define	XE_SWIDE_OVRUN	(1<<4)	/* ODD transfer in DATA IN phase */
1140 
1141 /*
1142  *  Negotiation status.
1143  *  nego_status field of struct sym_ccb.
1144  */
1145 #define NS_SYNC		(1)
1146 #define NS_WIDE		(2)
1147 #define NS_PPR		(3)
1148 
1149 /*
1150  *  A CCB hashed table is used to retrieve CCB address
1151  *  from DSA value.
1152  */
1153 #define CCB_HASH_SHIFT		8
1154 #define CCB_HASH_SIZE		(1UL << CCB_HASH_SHIFT)
1155 #define CCB_HASH_MASK		(CCB_HASH_SIZE-1)
1156 #define CCB_HASH_CODE(dsa)	(((dsa) >> 9) & CCB_HASH_MASK)
1157 
1158 /*
1159  *  Device flags.
1160  */
1161 #define SYM_DISC_ENABLED	(1)
1162 #define SYM_TAGS_ENABLED	(1<<1)
1163 #define SYM_SCAN_BOOT_DISABLED	(1<<2)
1164 #define SYM_SCAN_LUNS_DISABLED	(1<<3)
1165 
1166 /*
1167  *  Host adapter miscellaneous flags.
1168  */
1169 #define SYM_AVOID_BUS_RESET	(1)
1170 #define SYM_SCAN_TARGETS_HILO	(1<<1)
1171 
1172 /*
1173  *  Device quirks.
1174  *  Some devices, for example the CHEETAH 2 LVD, disconnects without
1175  *  saving the DATA POINTER then reselects and terminates the IO.
1176  *  On reselection, the automatic RESTORE DATA POINTER makes the
1177  *  CURRENT DATA POINTER not point at the end of the IO.
1178  *  This behaviour just breaks our calculation of the residual.
1179  *  For now, we just force an AUTO SAVE on disconnection and will
1180  *  fix that in a further driver version.
1181  */
1182 #define SYM_QUIRK_AUTOSAVE 1
1183 
1184 /*
1185  *  Misc.
1186  */
1187 #define SYM_SNOOP_TIMEOUT (10000000)
1188 #define SYM_PCI_IO	PCIR_MAPS
1189 #define SYM_PCI_MMIO	(PCIR_MAPS + 4)
1190 #define SYM_PCI_RAM	(PCIR_MAPS + 8)
1191 #define SYM_PCI_RAM64	(PCIR_MAPS + 12)
1192 
1193 /*
1194  *  Back-pointer from the CAM CCB to our data structures.
1195  */
1196 #define sym_hcb_ptr	spriv_ptr0
1197 /* #define sym_ccb_ptr	spriv_ptr1 */
1198 
1199 /*
1200  *  We mostly have to deal with pointers.
1201  *  Thus these typedef's.
1202  */
1203 typedef struct sym_tcb *tcb_p;
1204 typedef struct sym_lcb *lcb_p;
1205 typedef struct sym_ccb *ccb_p;
1206 typedef struct sym_hcb *hcb_p;
1207 
1208 /*
1209  *  Gather negotiable parameters value
1210  */
1211 struct sym_trans {
1212 #ifdef	FreeBSD_New_Tran_Settings
1213 	u8 scsi_version;
1214 	u8 spi_version;
1215 #endif
1216 	u8 period;
1217 	u8 offset;
1218 	u8 width;
1219 	u8 options;	/* PPR options */
1220 };
1221 
1222 struct sym_tinfo {
1223 	struct sym_trans current;
1224 	struct sym_trans goal;
1225 	struct sym_trans user;
1226 };
1227 
1228 #define BUS_8_BIT	MSG_EXT_WDTR_BUS_8_BIT
1229 #define BUS_16_BIT	MSG_EXT_WDTR_BUS_16_BIT
1230 
1231 /*
1232  *  Global TCB HEADER.
1233  *
1234  *  Due to lack of indirect addressing on earlier NCR chips,
1235  *  this substructure is copied from the TCB to a global
1236  *  address after selection.
1237  *  For SYMBIOS chips that support LOAD/STORE this copy is
1238  *  not needed and thus not performed.
1239  */
1240 struct sym_tcbh {
1241 	/*
1242 	 *  Scripts bus addresses of LUN table accessed from scripts.
1243 	 *  LUN #0 is a special case, since multi-lun devices are rare,
1244 	 *  and we we want to speed-up the general case and not waste
1245 	 *  resources.
1246 	 */
1247 	u32	luntbl_sa;	/* bus address of this table	*/
1248 	u32	lun0_sa;	/* bus address of LCB #0	*/
1249 	/*
1250 	 *  Actual SYNC/WIDE IO registers value for this target.
1251 	 *  'sval', 'wval' and 'uval' are read from SCRIPTS and
1252 	 *  so have alignment constraints.
1253 	 */
1254 /*0*/	u_char	uval;		/* -> SCNTL4 register		*/
1255 /*1*/	u_char	sval;		/* -> SXFER  io register	*/
1256 /*2*/	u_char	filler1;
1257 /*3*/	u_char	wval;		/* -> SCNTL3 io register	*/
1258 };
1259 
1260 /*
1261  *  Target Control Block
1262  */
1263 struct sym_tcb {
1264 	/*
1265 	 *  TCB header.
1266 	 *  Assumed at offset 0.
1267 	 */
1268 /*0*/	struct sym_tcbh head;
1269 
1270 	/*
1271 	 *  LUN table used by the SCRIPTS processor.
1272 	 *  An array of bus addresses is used on reselection.
1273 	 */
1274 	u32	*luntbl;	/* LCBs bus address table	*/
1275 
1276 	/*
1277 	 *  LUN table used by the C code.
1278 	 */
1279 	lcb_p	lun0p;		/* LCB of LUN #0 (usual case)	*/
1280 #if SYM_CONF_MAX_LUN > 1
1281 	lcb_p	*lunmp;		/* Other LCBs [1..MAX_LUN]	*/
1282 #endif
1283 
1284 	/*
1285 	 *  Bitmap that tells about LUNs that succeeded at least
1286 	 *  1 IO and therefore assumed to be a real device.
1287 	 *  Avoid useless allocation of the LCB structure.
1288 	 */
1289 	u32	lun_map[(SYM_CONF_MAX_LUN+31)/32];
1290 
1291 	/*
1292 	 *  Bitmap that tells about LUNs that haven't yet an LCB
1293 	 *  allocated (not discovered or LCB allocation failed).
1294 	 */
1295 	u32	busy0_map[(SYM_CONF_MAX_LUN+31)/32];
1296 
1297 	/*
1298 	 *  Transfer capabilities (SIP)
1299 	 */
1300 	struct sym_tinfo tinfo;
1301 
1302 	/*
1303 	 * Keep track of the CCB used for the negotiation in order
1304 	 * to ensure that only 1 negotiation is queued at a time.
1305 	 */
1306 	ccb_p   nego_cp;	/* CCB used for the nego		*/
1307 
1308 	/*
1309 	 *  Set when we want to reset the device.
1310 	 */
1311 	u_char	to_reset;
1312 
1313 	/*
1314 	 *  Other user settable limits and options.
1315 	 *  These limits are read from the NVRAM if present.
1316 	 */
1317 	u_char	usrflags;
1318 	u_short	usrtags;
1319 };
1320 
1321 /*
1322  *  Global LCB HEADER.
1323  *
1324  *  Due to lack of indirect addressing on earlier NCR chips,
1325  *  this substructure is copied from the LCB to a global
1326  *  address after selection.
1327  *  For SYMBIOS chips that support LOAD/STORE this copy is
1328  *  not needed and thus not performed.
1329  */
1330 struct sym_lcbh {
1331 	/*
1332 	 *  SCRIPTS address jumped by SCRIPTS on reselection.
1333 	 *  For not probed logical units, this address points to
1334 	 *  SCRIPTS that deal with bad LU handling (must be at
1335 	 *  offset zero of the LCB for that reason).
1336 	 */
1337 /*0*/	u32	resel_sa;
1338 
1339 	/*
1340 	 *  Task (bus address of a CCB) read from SCRIPTS that points
1341 	 *  to the unique ITL nexus allowed to be disconnected.
1342 	 */
1343 	u32	itl_task_sa;
1344 
1345 	/*
1346 	 *  Task table bus address (read from SCRIPTS).
1347 	 */
1348 	u32	itlq_tbl_sa;
1349 };
1350 
1351 /*
1352  *  Logical Unit Control Block
1353  */
1354 struct sym_lcb {
1355 	/*
1356 	 *  TCB header.
1357 	 *  Assumed at offset 0.
1358 	 */
1359 /*0*/	struct sym_lcbh head;
1360 
1361 	/*
1362 	 *  Task table read from SCRIPTS that contains pointers to
1363 	 *  ITLQ nexuses. The bus address read from SCRIPTS is
1364 	 *  inside the header.
1365 	 */
1366 	u32	*itlq_tbl;	/* Kernel virtual address	*/
1367 
1368 	/*
1369 	 *  Busy CCBs management.
1370 	 */
1371 	u_short	busy_itlq;	/* Number of busy tagged CCBs	*/
1372 	u_short	busy_itl;	/* Number of busy untagged CCBs	*/
1373 
1374 	/*
1375 	 *  Circular tag allocation buffer.
1376 	 */
1377 	u_short	ia_tag;		/* Tag allocation index		*/
1378 	u_short	if_tag;		/* Tag release index		*/
1379 	u_char	*cb_tags;	/* Circular tags buffer		*/
1380 
1381 	/*
1382 	 *  Set when we want to clear all tasks.
1383 	 */
1384 	u_char to_clear;
1385 
1386 	/*
1387 	 *  Capabilities.
1388 	 */
1389 	u_char	user_flags;
1390 	u_char	current_flags;
1391 };
1392 
1393 /*
1394  *  Action from SCRIPTS on a task.
1395  *  Is part of the CCB, but is also used separately to plug
1396  *  error handling action to perform from SCRIPTS.
1397  */
1398 struct sym_actscr {
1399 	u32	start;		/* Jumped by SCRIPTS after selection	*/
1400 	u32	restart;	/* Jumped by SCRIPTS on relection	*/
1401 };
1402 
1403 /*
1404  *  Phase mismatch context.
1405  *
1406  *  It is part of the CCB and is used as parameters for the
1407  *  DATA pointer. We need two contexts to handle correctly the
1408  *  SAVED DATA POINTER.
1409  */
1410 struct sym_pmc {
1411 	struct	sym_tblmove sg;	/* Updated interrupted SG block	*/
1412 	u32	ret;		/* SCRIPT return address	*/
1413 };
1414 
1415 /*
1416  *  LUN control block lookup.
1417  *  We use a direct pointer for LUN #0, and a table of
1418  *  pointers which is only allocated for devices that support
1419  *  LUN(s) > 0.
1420  */
1421 #if SYM_CONF_MAX_LUN <= 1
1422 #define sym_lp(np, tp, lun) (!lun) ? (tp)->lun0p : 0
1423 #else
1424 #define sym_lp(np, tp, lun) \
1425 	(!lun) ? (tp)->lun0p : (tp)->lunmp ? (tp)->lunmp[(lun)] : 0
1426 #endif
1427 
1428 /*
1429  *  Status are used by the host and the script processor.
1430  *
1431  *  The last four bytes (status[4]) are copied to the
1432  *  scratchb register (declared as scr0..scr3) just after the
1433  *  select/reselect, and copied back just after disconnecting.
1434  *  Inside the script the XX_REG are used.
1435  */
1436 
1437 /*
1438  *  Last four bytes (script)
1439  */
1440 #define  QU_REG	scr0
1441 #define  HS_REG	scr1
1442 #define  HS_PRT	nc_scr1
1443 #define  SS_REG	scr2
1444 #define  SS_PRT	nc_scr2
1445 #define  HF_REG	scr3
1446 #define  HF_PRT	nc_scr3
1447 
1448 /*
1449  *  Last four bytes (host)
1450  */
1451 #define  actualquirks  phys.head.status[0]
1452 #define  host_status   phys.head.status[1]
1453 #define  ssss_status   phys.head.status[2]
1454 #define  host_flags    phys.head.status[3]
1455 
1456 /*
1457  *  Host flags
1458  */
1459 #define HF_IN_PM0	1u
1460 #define HF_IN_PM1	(1u<<1)
1461 #define HF_ACT_PM	(1u<<2)
1462 #define HF_DP_SAVED	(1u<<3)
1463 #define HF_SENSE	(1u<<4)
1464 #define HF_EXT_ERR	(1u<<5)
1465 #define HF_DATA_IN	(1u<<6)
1466 #ifdef SYM_CONF_IARB_SUPPORT
1467 #define HF_HINT_IARB	(1u<<7)
1468 #endif
1469 
1470 /*
1471  *  Global CCB HEADER.
1472  *
1473  *  Due to lack of indirect addressing on earlier NCR chips,
1474  *  this substructure is copied from the ccb to a global
1475  *  address after selection (or reselection) and copied back
1476  *  before disconnect.
1477  *  For SYMBIOS chips that support LOAD/STORE this copy is
1478  *  not needed and thus not performed.
1479  */
1480 
1481 struct sym_ccbh {
1482 	/*
1483 	 *  Start and restart SCRIPTS addresses (must be at 0).
1484 	 */
1485 /*0*/	struct sym_actscr go;
1486 
1487 	/*
1488 	 *  SCRIPTS jump address that deal with data pointers.
1489 	 *  'savep' points to the position in the script responsible
1490 	 *  for the actual transfer of data.
1491 	 *  It's written on reception of a SAVE_DATA_POINTER message.
1492 	 */
1493 	u32	savep;		/* Jump address to saved data pointer	*/
1494 	u32	lastp;		/* SCRIPTS address at end of data	*/
1495 	u32	goalp;		/* Not accessed for now from SCRIPTS	*/
1496 
1497 	/*
1498 	 *  Status fields.
1499 	 */
1500 	u8	status[4];
1501 };
1502 
1503 /*
1504  *  Data Structure Block
1505  *
1506  *  During execution of a ccb by the script processor, the
1507  *  DSA (data structure address) register points to this
1508  *  substructure of the ccb.
1509  */
1510 struct sym_dsb {
1511 	/*
1512 	 *  CCB header.
1513 	 *  Also assumed at offset 0 of the sym_ccb structure.
1514 	 */
1515 /*0*/	struct sym_ccbh head;
1516 
1517 	/*
1518 	 *  Phase mismatch contexts.
1519 	 *  We need two to handle correctly the SAVED DATA POINTER.
1520 	 *  MUST BOTH BE AT OFFSET < 256, due to using 8 bit arithmetic
1521 	 *  for address calculation from SCRIPTS.
1522 	 */
1523 	struct sym_pmc pm0;
1524 	struct sym_pmc pm1;
1525 
1526 	/*
1527 	 *  Table data for Script
1528 	 */
1529 	struct sym_tblsel  select;
1530 	struct sym_tblmove smsg;
1531 	struct sym_tblmove smsg_ext;
1532 	struct sym_tblmove cmd;
1533 	struct sym_tblmove sense;
1534 	struct sym_tblmove wresid;
1535 	struct sym_tblmove data [SYM_CONF_MAX_SG];
1536 };
1537 
1538 /*
1539  *  Our Command Control Block
1540  */
1541 struct sym_ccb {
1542 	/*
1543 	 *  This is the data structure which is pointed by the DSA
1544 	 *  register when it is executed by the script processor.
1545 	 *  It must be the first entry.
1546 	 */
1547 	struct sym_dsb phys;
1548 
1549 	/*
1550 	 *  Pointer to CAM ccb and related stuff.
1551 	 */
1552 	union ccb *cam_ccb;	/* CAM scsiio ccb		*/
1553 	u8	cdb_buf[16];	/* Copy of CDB			*/
1554 	u8	*sns_bbuf;	/* Bounce buffer for sense data	*/
1555 #define SYM_SNS_BBUF_LEN	sizeof(struct scsi_sense_data)
1556 	int	data_len;	/* Total data length		*/
1557 	int	segments;	/* Number of SG segments	*/
1558 
1559 	/*
1560 	 *  Miscellaneous status'.
1561 	 */
1562 	u_char	nego_status;	/* Negotiation status		*/
1563 	u_char	xerr_status;	/* Extended error flags		*/
1564 	u32	extra_bytes;	/* Extraneous bytes transferred	*/
1565 
1566 	/*
1567 	 *  Message areas.
1568 	 *  We prepare a message to be sent after selection.
1569 	 *  We may use a second one if the command is rescheduled
1570 	 *  due to CHECK_CONDITION or COMMAND TERMINATED.
1571 	 *  Contents are IDENTIFY and SIMPLE_TAG.
1572 	 *  While negotiating sync or wide transfer,
1573 	 *  a SDTR or WDTR message is appended.
1574 	 */
1575 	u_char	scsi_smsg [12];
1576 	u_char	scsi_smsg2[12];
1577 
1578 	/*
1579 	 *  Auto request sense related fields.
1580 	 */
1581 	u_char	sensecmd[6];	/* Request Sense command	*/
1582 	u_char	sv_scsi_status;	/* Saved SCSI status 		*/
1583 	u_char	sv_xerr_status;	/* Saved extended status	*/
1584 	int	sv_resid;	/* Saved residual		*/
1585 
1586 	/*
1587 	 *  Map for the DMA of user data.
1588 	 */
1589 #ifdef	FreeBSD_Bus_Dma_Abstraction
1590 	void		*arg;	/* Argument for some callback	*/
1591 	bus_dmamap_t	dmamap;	/* DMA map for user data	*/
1592 	u_char		dmamapped;
1593 #define SYM_DMA_NONE	0
1594 #define SYM_DMA_READ	1
1595 #define SYM_DMA_WRITE	2
1596 #endif
1597 	/*
1598 	 *  Other fields.
1599 	 */
1600 	u32	ccb_ba;		/* BUS address of this CCB	*/
1601 	u_short	tag;		/* Tag for this transfer	*/
1602 				/*  NO_TAG means no tag		*/
1603 	u_char	target;
1604 	u_char	lun;
1605 	ccb_p	link_ccbh;	/* Host adapter CCB hash chain	*/
1606 	SYM_QUEHEAD
1607 		link_ccbq;	/* Link to free/busy CCB queue	*/
1608 	u32	startp;		/* Initial data pointer		*/
1609 	int	ext_sg;		/* Extreme data pointer, used	*/
1610 	int	ext_ofs;	/*  to calculate the residual.	*/
1611 	u_char	to_abort;	/* Want this IO to be aborted	*/
1612 };
1613 
1614 #define CCB_BA(cp,lbl)	(cp->ccb_ba + offsetof(struct sym_ccb, lbl))
1615 
1616 /*
1617  *  Host Control Block
1618  */
1619 struct sym_hcb {
1620 	/*
1621 	 *  Global headers.
1622 	 *  Due to poorness of addressing capabilities, earlier
1623 	 *  chips (810, 815, 825) copy part of the data structures
1624 	 *  (CCB, TCB and LCB) in fixed areas.
1625 	 */
1626 #ifdef	SYM_CONF_GENERIC_SUPPORT
1627 	struct sym_ccbh	ccb_head;
1628 	struct sym_tcbh	tcb_head;
1629 	struct sym_lcbh	lcb_head;
1630 #endif
1631 	/*
1632 	 *  Idle task and invalid task actions and
1633 	 *  their bus addresses.
1634 	 */
1635 	struct sym_actscr idletask, notask, bad_itl, bad_itlq;
1636 	vm_offset_t idletask_ba, notask_ba, bad_itl_ba, bad_itlq_ba;
1637 
1638 	/*
1639 	 *  Dummy lun table to protect us against target
1640 	 *  returning bad lun number on reselection.
1641 	 */
1642 	u32	*badluntbl;	/* Table physical address	*/
1643 	u32	badlun_sa;	/* SCRIPT handler BUS address	*/
1644 
1645 	/*
1646 	 *  Bus address of this host control block.
1647 	 */
1648 	u32	hcb_ba;
1649 
1650 	/*
1651 	 *  Bit 32-63 of the on-chip RAM bus address in LE format.
1652 	 *  The START_RAM64 script loads the MMRS and MMWS from this
1653 	 *  field.
1654 	 */
1655 	u32	scr_ram_seg;
1656 
1657 	/*
1658 	 *  Chip and controller indentification.
1659 	 */
1660 #ifdef FreeBSD_Bus_Io_Abstraction
1661 	device_t device;
1662 #else
1663 	pcici_t	pci_tag;
1664 #endif
1665 	int	unit;
1666 	char	inst_name[8];
1667 
1668 	/*
1669 	 *  Initial value of some IO register bits.
1670 	 *  These values are assumed to have been set by BIOS, and may
1671 	 *  be used to probe adapter implementation differences.
1672 	 */
1673 	u_char	sv_scntl0, sv_scntl3, sv_dmode, sv_dcntl, sv_ctest3, sv_ctest4,
1674 		sv_ctest5, sv_gpcntl, sv_stest2, sv_stest4, sv_scntl4,
1675 		sv_stest1;
1676 
1677 	/*
1678 	 *  Actual initial value of IO register bits used by the
1679 	 *  driver. They are loaded at initialisation according to
1680 	 *  features that are to be enabled/disabled.
1681 	 */
1682 	u_char	rv_scntl0, rv_scntl3, rv_dmode, rv_dcntl, rv_ctest3, rv_ctest4,
1683 		rv_ctest5, rv_stest2, rv_ccntl0, rv_ccntl1, rv_scntl4;
1684 
1685 	/*
1686 	 *  Target data.
1687 	 */
1688 	struct sym_tcb	target[SYM_CONF_MAX_TARGET];
1689 
1690 	/*
1691 	 *  Target control block bus address array used by the SCRIPT
1692 	 *  on reselection.
1693 	 */
1694 	u32		*targtbl;
1695 	u32		targtbl_ba;
1696 
1697 	/*
1698 	 *  CAM SIM information for this instance.
1699 	 */
1700 	struct		cam_sim  *sim;
1701 	struct		cam_path *path;
1702 
1703 	/*
1704 	 *  Allocated hardware resources.
1705 	 */
1706 #ifdef FreeBSD_Bus_Io_Abstraction
1707 	struct resource	*irq_res;
1708 	struct resource	*io_res;
1709 	struct resource	*mmio_res;
1710 	struct resource	*ram_res;
1711 	int		ram_id;
1712 	void *intr;
1713 #endif
1714 
1715 	/*
1716 	 *  Bus stuff.
1717 	 *
1718 	 *  My understanding of PCI is that all agents must share the
1719 	 *  same addressing range and model.
1720 	 *  But some hardware architecture guys provide complex and
1721 	 *  brain-deaded stuff that makes shit.
1722 	 *  This driver only support PCI compliant implementations and
1723 	 *  deals with part of the BUS stuff complexity only to fit O/S
1724 	 *  requirements.
1725 	 */
1726 #ifdef FreeBSD_Bus_Io_Abstraction
1727 	bus_space_handle_t	io_bsh;
1728 	bus_space_tag_t		io_tag;
1729 	bus_space_handle_t	mmio_bsh;
1730 	bus_space_tag_t		mmio_tag;
1731 	bus_space_handle_t	ram_bsh;
1732 	bus_space_tag_t		ram_tag;
1733 #endif
1734 
1735 	/*
1736 	 *  DMA stuff.
1737 	 */
1738 #ifdef	FreeBSD_Bus_Dma_Abstraction
1739 	bus_dma_tag_t	bus_dmat;	/* DMA tag from parent BUS	*/
1740 	bus_dma_tag_t	data_dmat;	/* DMA tag for user data	*/
1741 #endif
1742 	/*
1743 	 *  Virtual and physical bus addresses of the chip.
1744 	 */
1745 	vm_offset_t	mmio_va;	/* MMIO kernel virtual address	*/
1746 	vm_offset_t	mmio_pa;	/* MMIO CPU physical address	*/
1747 	vm_offset_t	mmio_ba;	/* MMIO BUS address		*/
1748 	int		mmio_ws;	/* MMIO Window size		*/
1749 
1750 	vm_offset_t	ram_va;		/* RAM kernel virtual address	*/
1751 	vm_offset_t	ram_pa;		/* RAM CPU physical address	*/
1752 	vm_offset_t	ram_ba;		/* RAM BUS address		*/
1753 	int		ram_ws;		/* RAM window size		*/
1754 	u32		io_port;	/* IO port address		*/
1755 
1756 	/*
1757 	 *  SCRIPTS virtual and physical bus addresses.
1758 	 *  'script'  is loaded in the on-chip RAM if present.
1759 	 *  'scripth' stays in main memory for all chips except the
1760 	 *  53C895A, 53C896 and 53C1010 that provide 8K on-chip RAM.
1761 	 */
1762 	u_char		*scripta0;	/* Copies of script and scripth	*/
1763 	u_char		*scriptb0;	/* Copies of script and scripth	*/
1764 	vm_offset_t	scripta_ba;	/* Actual script and scripth	*/
1765 	vm_offset_t	scriptb_ba;	/*  bus addresses.		*/
1766 	vm_offset_t	scriptb0_ba;
1767 	u_short		scripta_sz;	/* Actual size of script A	*/
1768 	u_short		scriptb_sz;	/* Actual size of script B	*/
1769 
1770 	/*
1771 	 *  Bus addresses, setup and patch methods for
1772 	 *  the selected firmware.
1773 	 */
1774 	struct sym_fwa_ba fwa_bas;	/* Useful SCRIPTA bus addresses	*/
1775 	struct sym_fwb_ba fwb_bas;	/* Useful SCRIPTB bus addresses	*/
1776 	void		(*fw_setup)(hcb_p np, struct sym_fw *fw);
1777 	void		(*fw_patch)(hcb_p np);
1778 	char		*fw_name;
1779 
1780 	/*
1781 	 *  General controller parameters and configuration.
1782 	 */
1783 	u_short	device_id;	/* PCI device id		*/
1784 	u_char	revision_id;	/* PCI device revision id	*/
1785 	u_int	features;	/* Chip features map		*/
1786 	u_char	myaddr;		/* SCSI id of the adapter	*/
1787 	u_char	maxburst;	/* log base 2 of dwords burst	*/
1788 	u_char	maxwide;	/* Maximum transfer width	*/
1789 	u_char	minsync;	/* Min sync period factor (ST)	*/
1790 	u_char	maxsync;	/* Max sync period factor (ST)	*/
1791 	u_char	maxoffs;	/* Max scsi offset        (ST)	*/
1792 	u_char	minsync_dt;	/* Min sync period factor (DT)	*/
1793 	u_char	maxsync_dt;	/* Max sync period factor (DT)	*/
1794 	u_char	maxoffs_dt;	/* Max scsi offset        (DT)	*/
1795 	u_char	multiplier;	/* Clock multiplier (1,2,4)	*/
1796 	u_char	clock_divn;	/* Number of clock divisors	*/
1797 	u32	clock_khz;	/* SCSI clock frequency in KHz	*/
1798 	u32	pciclk_khz;	/* Estimated PCI clock  in KHz	*/
1799 	/*
1800 	 *  Start queue management.
1801 	 *  It is filled up by the host processor and accessed by the
1802 	 *  SCRIPTS processor in order to start SCSI commands.
1803 	 */
1804 	volatile		/* Prevent code optimizations	*/
1805 	u32	*squeue;	/* Start queue virtual address	*/
1806 	u32	squeue_ba;	/* Start queue BUS address	*/
1807 	u_short	squeueput;	/* Next free slot of the queue	*/
1808 	u_short	actccbs;	/* Number of allocated CCBs	*/
1809 
1810 	/*
1811 	 *  Command completion queue.
1812 	 *  It is the same size as the start queue to avoid overflow.
1813 	 */
1814 	u_short	dqueueget;	/* Next position to scan	*/
1815 	volatile		/* Prevent code optimizations	*/
1816 	u32	*dqueue;	/* Completion (done) queue	*/
1817 	u32	dqueue_ba;	/* Done queue BUS address	*/
1818 
1819 	/*
1820 	 *  Miscellaneous buffers accessed by the scripts-processor.
1821 	 *  They shall be DWORD aligned, because they may be read or
1822 	 *  written with a script command.
1823 	 */
1824 	u_char		msgout[8];	/* Buffer for MESSAGE OUT 	*/
1825 	u_char		msgin [8];	/* Buffer for MESSAGE IN	*/
1826 	u32		lastmsg;	/* Last SCSI message sent	*/
1827 	u_char		scratch;	/* Scratch for SCSI receive	*/
1828 
1829 	/*
1830 	 *  Miscellaneous configuration and status parameters.
1831 	 */
1832 	u_char		usrflags;	/* Miscellaneous user flags	*/
1833 	u_char		scsi_mode;	/* Current SCSI BUS mode	*/
1834 	u_char		verbose;	/* Verbosity for this controller*/
1835 	u32		cache;		/* Used for cache test at init.	*/
1836 
1837 	/*
1838 	 *  CCB lists and queue.
1839 	 */
1840 	ccb_p ccbh[CCB_HASH_SIZE];	/* CCB hashed by DSA value	*/
1841 	SYM_QUEHEAD	free_ccbq;	/* Queue of available CCBs	*/
1842 	SYM_QUEHEAD	busy_ccbq;	/* Queue of busy CCBs		*/
1843 
1844 	/*
1845 	 *  During error handling and/or recovery,
1846 	 *  active CCBs that are to be completed with
1847 	 *  error or requeued are moved from the busy_ccbq
1848 	 *  to the comp_ccbq prior to completion.
1849 	 */
1850 	SYM_QUEHEAD	comp_ccbq;
1851 
1852 	/*
1853 	 *  CAM CCB pending queue.
1854 	 */
1855 	SYM_QUEHEAD	cam_ccbq;
1856 
1857 	/*
1858 	 *  IMMEDIATE ARBITRATION (IARB) control.
1859 	 *
1860 	 *  We keep track in 'last_cp' of the last CCB that has been
1861 	 *  queued to the SCRIPTS processor and clear 'last_cp' when
1862 	 *  this CCB completes. If last_cp is not zero at the moment
1863 	 *  we queue a new CCB, we set a flag in 'last_cp' that is
1864 	 *  used by the SCRIPTS as a hint for setting IARB.
1865 	 *  We donnot set more than 'iarb_max' consecutive hints for
1866 	 *  IARB in order to leave devices a chance to reselect.
1867 	 *  By the way, any non zero value of 'iarb_max' is unfair. :)
1868 	 */
1869 #ifdef SYM_CONF_IARB_SUPPORT
1870 	u_short		iarb_max;	/* Max. # consecutive IARB hints*/
1871 	u_short		iarb_count;	/* Actual # of these hints	*/
1872 	ccb_p		last_cp;
1873 #endif
1874 
1875 	/*
1876 	 *  Command abort handling.
1877 	 *  We need to synchronize tightly with the SCRIPTS
1878 	 *  processor in order to handle things correctly.
1879 	 */
1880 	u_char		abrt_msg[4];	/* Message to send buffer	*/
1881 	struct sym_tblmove abrt_tbl;	/* Table for the MOV of it 	*/
1882 	struct sym_tblsel  abrt_sel;	/* Sync params for selection	*/
1883 	u_char		istat_sem;	/* Tells the chip to stop (SEM)	*/
1884 };
1885 
1886 #define HCB_BA(np, lbl)	    (np->hcb_ba      + offsetof(struct sym_hcb, lbl))
1887 
1888 /*
1889  *  Return the name of the controller.
1890  */
1891 static __inline char *sym_name(hcb_p np)
1892 {
1893 	return np->inst_name;
1894 }
1895 
1896 /*--------------------------------------------------------------------------*/
1897 /*------------------------------ FIRMWARES ---------------------------------*/
1898 /*--------------------------------------------------------------------------*/
1899 
1900 /*
1901  *  This stuff will be moved to a separate source file when
1902  *  the driver will be broken into several source modules.
1903  */
1904 
1905 /*
1906  *  Macros used for all firmwares.
1907  */
1908 #define	SYM_GEN_A(s, label)	((short) offsetof(s, label)),
1909 #define	SYM_GEN_B(s, label)	((short) offsetof(s, label)),
1910 #define	PADDR_A(label)		SYM_GEN_PADDR_A(struct SYM_FWA_SCR, label)
1911 #define	PADDR_B(label)		SYM_GEN_PADDR_B(struct SYM_FWB_SCR, label)
1912 
1913 
1914 #ifdef	SYM_CONF_GENERIC_SUPPORT
1915 /*
1916  *  Allocate firmware #1 script area.
1917  */
1918 #define	SYM_FWA_SCR		sym_fw1a_scr
1919 #define	SYM_FWB_SCR		sym_fw1b_scr
1920 #include "sym_fw1.h"
1921 struct sym_fwa_ofs sym_fw1a_ofs = {
1922 	SYM_GEN_FW_A(struct SYM_FWA_SCR)
1923 };
1924 struct sym_fwb_ofs sym_fw1b_ofs = {
1925 	SYM_GEN_FW_B(struct SYM_FWB_SCR)
1926 };
1927 #undef	SYM_FWA_SCR
1928 #undef	SYM_FWB_SCR
1929 #endif	/* SYM_CONF_GENERIC_SUPPORT */
1930 
1931 /*
1932  *  Allocate firmware #2 script area.
1933  */
1934 #define	SYM_FWA_SCR		sym_fw2a_scr
1935 #define	SYM_FWB_SCR		sym_fw2b_scr
1936 #include "sym_fw2.h"
1937 struct sym_fwa_ofs sym_fw2a_ofs = {
1938 	SYM_GEN_FW_A(struct SYM_FWA_SCR)
1939 };
1940 struct sym_fwb_ofs sym_fw2b_ofs = {
1941 	SYM_GEN_FW_B(struct SYM_FWB_SCR)
1942 	SYM_GEN_B(struct SYM_FWB_SCR, start64)
1943 	SYM_GEN_B(struct SYM_FWB_SCR, pm_handle)
1944 };
1945 #undef	SYM_FWA_SCR
1946 #undef	SYM_FWB_SCR
1947 
1948 #undef	SYM_GEN_A
1949 #undef	SYM_GEN_B
1950 #undef	PADDR_A
1951 #undef	PADDR_B
1952 
1953 #ifdef	SYM_CONF_GENERIC_SUPPORT
1954 /*
1955  *  Patch routine for firmware #1.
1956  */
1957 static void
1958 sym_fw1_patch(hcb_p np)
1959 {
1960 	struct sym_fw1a_scr *scripta0;
1961 	struct sym_fw1b_scr *scriptb0;
1962 
1963 	scripta0 = (struct sym_fw1a_scr *) np->scripta0;
1964 	scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
1965 
1966 	/*
1967 	 *  Remove LED support if not needed.
1968 	 */
1969 	if (!(np->features & FE_LED0)) {
1970 		scripta0->idle[0]	= cpu_to_scr(SCR_NO_OP);
1971 		scripta0->reselected[0]	= cpu_to_scr(SCR_NO_OP);
1972 		scripta0->start[0]	= cpu_to_scr(SCR_NO_OP);
1973 	}
1974 
1975 #ifdef SYM_CONF_IARB_SUPPORT
1976 	/*
1977 	 *    If user does not want to use IMMEDIATE ARBITRATION
1978 	 *    when we are reselected while attempting to arbitrate,
1979 	 *    patch the SCRIPTS accordingly with a SCRIPT NO_OP.
1980 	 */
1981 	if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
1982 		scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
1983 #endif
1984 	/*
1985 	 *  Patch some data in SCRIPTS.
1986 	 *  - start and done queue initial bus address.
1987 	 *  - target bus address table bus address.
1988 	 */
1989 	scriptb0->startpos[0]	= cpu_to_scr(np->squeue_ba);
1990 	scriptb0->done_pos[0]	= cpu_to_scr(np->dqueue_ba);
1991 	scriptb0->targtbl[0]	= cpu_to_scr(np->targtbl_ba);
1992 }
1993 #endif	/* SYM_CONF_GENERIC_SUPPORT */
1994 
1995 /*
1996  *  Patch routine for firmware #2.
1997  */
1998 static void
1999 sym_fw2_patch(hcb_p np)
2000 {
2001 	struct sym_fw2a_scr *scripta0;
2002 	struct sym_fw2b_scr *scriptb0;
2003 
2004 	scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2005 	scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2006 
2007 	/*
2008 	 *  Remove LED support if not needed.
2009 	 */
2010 	if (!(np->features & FE_LED0)) {
2011 		scripta0->idle[0]	= cpu_to_scr(SCR_NO_OP);
2012 		scripta0->reselected[0]	= cpu_to_scr(SCR_NO_OP);
2013 		scripta0->start[0]	= cpu_to_scr(SCR_NO_OP);
2014 	}
2015 
2016 #ifdef SYM_CONF_IARB_SUPPORT
2017 	/*
2018 	 *    If user does not want to use IMMEDIATE ARBITRATION
2019 	 *    when we are reselected while attempting to arbitrate,
2020 	 *    patch the SCRIPTS accordingly with a SCRIPT NO_OP.
2021 	 */
2022 	if (!SYM_CONF_SET_IARB_ON_ARB_LOST)
2023 		scripta0->ungetjob[0] = cpu_to_scr(SCR_NO_OP);
2024 #endif
2025 	/*
2026 	 *  Patch some variable in SCRIPTS.
2027 	 *  - start and done queue initial bus address.
2028 	 *  - target bus address table bus address.
2029 	 */
2030 	scriptb0->startpos[0]	= cpu_to_scr(np->squeue_ba);
2031 	scriptb0->done_pos[0]	= cpu_to_scr(np->dqueue_ba);
2032 	scriptb0->targtbl[0]	= cpu_to_scr(np->targtbl_ba);
2033 
2034 	/*
2035 	 *  Remove the load of SCNTL4 on reselection if not a C10.
2036 	 */
2037 	if (!(np->features & FE_C10)) {
2038 		scripta0->resel_scntl4[0] = cpu_to_scr(SCR_NO_OP);
2039 		scripta0->resel_scntl4[1] = cpu_to_scr(0);
2040 	}
2041 
2042 	/*
2043 	 *  Remove a couple of work-arounds specific to C1010 if
2044 	 *  they are not desirable. See `sym_fw2.h' for more details.
2045 	 */
2046 	if (!(np->device_id == PCI_ID_LSI53C1010_2 &&
2047 	      np->revision_id < 0x1 &&
2048 	      np->pciclk_khz < 60000)) {
2049 		scripta0->datao_phase[0] = cpu_to_scr(SCR_NO_OP);
2050 		scripta0->datao_phase[1] = cpu_to_scr(0);
2051 	}
2052 	if (!(np->device_id == PCI_ID_LSI53C1010 &&
2053 	      /* np->revision_id < 0xff */ 1)) {
2054 		scripta0->sel_done[0] = cpu_to_scr(SCR_NO_OP);
2055 		scripta0->sel_done[1] = cpu_to_scr(0);
2056 	}
2057 
2058 	/*
2059 	 *  Patch some other variables in SCRIPTS.
2060 	 *  These ones are loaded by the SCRIPTS processor.
2061 	 */
2062 	scriptb0->pm0_data_addr[0] =
2063 		cpu_to_scr(np->scripta_ba +
2064 			   offsetof(struct sym_fw2a_scr, pm0_data));
2065 	scriptb0->pm1_data_addr[0] =
2066 		cpu_to_scr(np->scripta_ba +
2067 			   offsetof(struct sym_fw2a_scr, pm1_data));
2068 }
2069 
2070 /*
2071  *  Fill the data area in scripts.
2072  *  To be done for all firmwares.
2073  */
2074 static void
2075 sym_fw_fill_data (u32 *in, u32 *out)
2076 {
2077 	int	i;
2078 
2079 	for (i = 0; i < SYM_CONF_MAX_SG; i++) {
2080 		*in++  = SCR_CHMOV_TBL ^ SCR_DATA_IN;
2081 		*in++  = offsetof (struct sym_dsb, data[i]);
2082 		*out++ = SCR_CHMOV_TBL ^ SCR_DATA_OUT;
2083 		*out++ = offsetof (struct sym_dsb, data[i]);
2084 	}
2085 }
2086 
2087 /*
2088  *  Setup useful script bus addresses.
2089  *  To be done for all firmwares.
2090  */
2091 static void
2092 sym_fw_setup_bus_addresses(hcb_p np, struct sym_fw *fw)
2093 {
2094 	u32 *pa;
2095 	u_short *po;
2096 	int i;
2097 
2098 	/*
2099 	 *  Build the bus address table for script A
2100 	 *  from the script A offset table.
2101 	 */
2102 	po = (u_short *) fw->a_ofs;
2103 	pa = (u32 *) &np->fwa_bas;
2104 	for (i = 0 ; i < sizeof(np->fwa_bas)/sizeof(u32) ; i++)
2105 		pa[i] = np->scripta_ba + po[i];
2106 
2107 	/*
2108 	 *  Same for script B.
2109 	 */
2110 	po = (u_short *) fw->b_ofs;
2111 	pa = (u32 *) &np->fwb_bas;
2112 	for (i = 0 ; i < sizeof(np->fwb_bas)/sizeof(u32) ; i++)
2113 		pa[i] = np->scriptb_ba + po[i];
2114 }
2115 
2116 #ifdef	SYM_CONF_GENERIC_SUPPORT
2117 /*
2118  *  Setup routine for firmware #1.
2119  */
2120 static void
2121 sym_fw1_setup(hcb_p np, struct sym_fw *fw)
2122 {
2123 	struct sym_fw1a_scr *scripta0;
2124 	struct sym_fw1b_scr *scriptb0;
2125 
2126 	scripta0 = (struct sym_fw1a_scr *) np->scripta0;
2127 	scriptb0 = (struct sym_fw1b_scr *) np->scriptb0;
2128 
2129 	/*
2130 	 *  Fill variable parts in scripts.
2131 	 */
2132 	sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2133 
2134 	/*
2135 	 *  Setup bus addresses used from the C code..
2136 	 */
2137 	sym_fw_setup_bus_addresses(np, fw);
2138 }
2139 #endif	/* SYM_CONF_GENERIC_SUPPORT */
2140 
2141 /*
2142  *  Setup routine for firmware #2.
2143  */
2144 static void
2145 sym_fw2_setup(hcb_p np, struct sym_fw *fw)
2146 {
2147 	struct sym_fw2a_scr *scripta0;
2148 	struct sym_fw2b_scr *scriptb0;
2149 
2150 	scripta0 = (struct sym_fw2a_scr *) np->scripta0;
2151 	scriptb0 = (struct sym_fw2b_scr *) np->scriptb0;
2152 
2153 	/*
2154 	 *  Fill variable parts in scripts.
2155 	 */
2156 	sym_fw_fill_data(scripta0->data_in, scripta0->data_out);
2157 
2158 	/*
2159 	 *  Setup bus addresses used from the C code..
2160 	 */
2161 	sym_fw_setup_bus_addresses(np, fw);
2162 }
2163 
2164 /*
2165  *  Allocate firmware descriptors.
2166  */
2167 #ifdef	SYM_CONF_GENERIC_SUPPORT
2168 static struct sym_fw sym_fw1 = SYM_FW_ENTRY(sym_fw1, "NCR-generic");
2169 #endif	/* SYM_CONF_GENERIC_SUPPORT */
2170 static struct sym_fw sym_fw2 = SYM_FW_ENTRY(sym_fw2, "LOAD/STORE-based");
2171 
2172 /*
2173  *  Find the most appropriate firmware for a chip.
2174  */
2175 static struct sym_fw *
2176 sym_find_firmware(struct sym_pci_chip *chip)
2177 {
2178 	if (chip->features & FE_LDSTR)
2179 		return &sym_fw2;
2180 #ifdef	SYM_CONF_GENERIC_SUPPORT
2181 	else if (!(chip->features & (FE_PFEN|FE_NOPM|FE_DAC)))
2182 		return &sym_fw1;
2183 #endif
2184 	else
2185 		return 0;
2186 }
2187 
2188 /*
2189  *  Bind a script to physical addresses.
2190  */
2191 static void sym_fw_bind_script (hcb_p np, u32 *start, int len)
2192 {
2193 	u32 opcode, new, old, tmp1, tmp2;
2194 	u32 *end, *cur;
2195 	int relocs;
2196 
2197 	cur = start;
2198 	end = start + len/4;
2199 
2200 	while (cur < end) {
2201 
2202 		opcode = *cur;
2203 
2204 		/*
2205 		 *  If we forget to change the length
2206 		 *  in scripts, a field will be
2207 		 *  padded with 0. This is an illegal
2208 		 *  command.
2209 		 */
2210 		if (opcode == 0) {
2211 			kprintf ("%s: ERROR0 IN SCRIPT at %d.\n",
2212 				sym_name(np), (int) (cur-start));
2213 			MDELAY (10000);
2214 			++cur;
2215 			continue;
2216 		};
2217 
2218 		/*
2219 		 *  We use the bogus value 0xf00ff00f ;-)
2220 		 *  to reserve data area in SCRIPTS.
2221 		 */
2222 		if (opcode == SCR_DATA_ZERO) {
2223 			*cur++ = 0;
2224 			continue;
2225 		}
2226 
2227 		if (DEBUG_FLAGS & DEBUG_SCRIPT)
2228 			kprintf ("%d:  <%x>\n", (int) (cur-start),
2229 				(unsigned)opcode);
2230 
2231 		/*
2232 		 *  We don't have to decode ALL commands
2233 		 */
2234 		switch (opcode >> 28) {
2235 		case 0xf:
2236 			/*
2237 			 *  LOAD / STORE DSA relative, don't relocate.
2238 			 */
2239 			relocs = 0;
2240 			break;
2241 		case 0xe:
2242 			/*
2243 			 *  LOAD / STORE absolute.
2244 			 */
2245 			relocs = 1;
2246 			break;
2247 		case 0xc:
2248 			/*
2249 			 *  COPY has TWO arguments.
2250 			 */
2251 			relocs = 2;
2252 			tmp1 = cur[1];
2253 			tmp2 = cur[2];
2254 			if ((tmp1 ^ tmp2) & 3) {
2255 				kprintf ("%s: ERROR1 IN SCRIPT at %d.\n",
2256 					sym_name(np), (int) (cur-start));
2257 				MDELAY (10000);
2258 			}
2259 			/*
2260 			 *  If PREFETCH feature not enabled, remove
2261 			 *  the NO FLUSH bit if present.
2262 			 */
2263 			if ((opcode & SCR_NO_FLUSH) &&
2264 			    !(np->features & FE_PFEN)) {
2265 				opcode = (opcode & ~SCR_NO_FLUSH);
2266 			}
2267 			break;
2268 		case 0x0:
2269 			/*
2270 			 *  MOVE/CHMOV (absolute address)
2271 			 */
2272 			if (!(np->features & FE_WIDE))
2273 				opcode = (opcode | OPC_MOVE);
2274 			relocs = 1;
2275 			break;
2276 		case 0x1:
2277 			/*
2278 			 *  MOVE/CHMOV (table indirect)
2279 			 */
2280 			if (!(np->features & FE_WIDE))
2281 				opcode = (opcode | OPC_MOVE);
2282 			relocs = 0;
2283 			break;
2284 		case 0x8:
2285 			/*
2286 			 *  JUMP / CALL
2287 			 *  dont't relocate if relative :-)
2288 			 */
2289 			if (opcode & 0x00800000)
2290 				relocs = 0;
2291 			else if ((opcode & 0xf8400000) == 0x80400000)/*JUMP64*/
2292 				relocs = 2;
2293 			else
2294 				relocs = 1;
2295 			break;
2296 		case 0x4:
2297 		case 0x5:
2298 		case 0x6:
2299 		case 0x7:
2300 			relocs = 1;
2301 			break;
2302 		default:
2303 			relocs = 0;
2304 			break;
2305 		};
2306 
2307 		/*
2308 		 *  Scriptify:) the opcode.
2309 		 */
2310 		*cur++ = cpu_to_scr(opcode);
2311 
2312 		/*
2313 		 *  If no relocation, assume 1 argument
2314 		 *  and just scriptize:) it.
2315 		 */
2316 		if (!relocs) {
2317 			*cur = cpu_to_scr(*cur);
2318 			++cur;
2319 			continue;
2320 		}
2321 
2322 		/*
2323 		 *  Otherwise performs all needed relocations.
2324 		 */
2325 		while (relocs--) {
2326 			old = *cur;
2327 
2328 			switch (old & RELOC_MASK) {
2329 			case RELOC_REGISTER:
2330 				new = (old & ~RELOC_MASK) + np->mmio_ba;
2331 				break;
2332 			case RELOC_LABEL_A:
2333 				new = (old & ~RELOC_MASK) + np->scripta_ba;
2334 				break;
2335 			case RELOC_LABEL_B:
2336 				new = (old & ~RELOC_MASK) + np->scriptb_ba;
2337 				break;
2338 			case RELOC_SOFTC:
2339 				new = (old & ~RELOC_MASK) + np->hcb_ba;
2340 				break;
2341 			case 0:
2342 				/*
2343 				 *  Don't relocate a 0 address.
2344 				 *  They are mostly used for patched or
2345 				 *  script self-modified areas.
2346 				 */
2347 				if (old == 0) {
2348 					new = old;
2349 					break;
2350 				}
2351 				/* fall through */
2352 			default:
2353 				new = 0;
2354 				panic("sym_fw_bind_script: "
2355 				      "weird relocation %x\n", old);
2356 				break;
2357 			}
2358 
2359 			*cur++ = cpu_to_scr(new);
2360 		}
2361 	};
2362 }
2363 
2364 /*--------------------------------------------------------------------------*/
2365 /*--------------------------- END OF FIRMWARES  ----------------------------*/
2366 /*--------------------------------------------------------------------------*/
2367 
2368 /*
2369  *  Function prototypes.
2370  */
2371 static void sym_save_initial_setting (hcb_p np);
2372 static int  sym_prepare_setting (hcb_p np, struct sym_nvram *nvram);
2373 static int  sym_prepare_nego (hcb_p np, ccb_p cp, int nego, u_char *msgptr);
2374 static void sym_put_start_queue (hcb_p np, ccb_p cp);
2375 static void sym_chip_reset (hcb_p np);
2376 static void sym_soft_reset (hcb_p np);
2377 static void sym_start_reset (hcb_p np);
2378 static int  sym_reset_scsi_bus (hcb_p np, int enab_int);
2379 static int  sym_wakeup_done (hcb_p np);
2380 static void sym_flush_busy_queue (hcb_p np, int cam_status);
2381 static void sym_flush_comp_queue (hcb_p np, int cam_status);
2382 static void sym_init (hcb_p np, int reason);
2383 static int  sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp,
2384 		        u_char *fakp);
2385 static void sym_setsync (hcb_p np, ccb_p cp, u_char ofs, u_char per,
2386 			 u_char div, u_char fak);
2387 static void sym_setwide (hcb_p np, ccb_p cp, u_char wide);
2388 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2389 			 u_char per, u_char wide, u_char div, u_char fak);
2390 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
2391 			 u_char per, u_char wide, u_char div, u_char fak);
2392 static void sym_log_hard_error (hcb_p np, u_short sist, u_char dstat);
2393 static void sym_intr (void *arg);
2394 static void sym_poll (struct cam_sim *sim);
2395 static void sym_recover_scsi_int (hcb_p np, u_char hsts);
2396 static void sym_int_sto (hcb_p np);
2397 static void sym_int_udc (hcb_p np);
2398 static void sym_int_sbmc (hcb_p np);
2399 static void sym_int_par (hcb_p np, u_short sist);
2400 static void sym_int_ma (hcb_p np);
2401 static int  sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun,
2402 				    int task);
2403 static void sym_sir_bad_scsi_status (hcb_p np, int num, ccb_p cp);
2404 static int  sym_clear_tasks (hcb_p np, int status, int targ, int lun, int task);
2405 static void sym_sir_task_recovery (hcb_p np, int num);
2406 static int  sym_evaluate_dp (hcb_p np, ccb_p cp, u32 scr, int *ofs);
2407 static void sym_modify_dp (hcb_p np, tcb_p tp, ccb_p cp, int ofs);
2408 static int  sym_compute_residual (hcb_p np, ccb_p cp);
2409 static int  sym_show_msg (u_char * msg);
2410 static void sym_print_msg (ccb_p cp, char *label, u_char *msg);
2411 static void sym_sync_nego (hcb_p np, tcb_p tp, ccb_p cp);
2412 static void sym_ppr_nego (hcb_p np, tcb_p tp, ccb_p cp);
2413 static void sym_wide_nego (hcb_p np, tcb_p tp, ccb_p cp);
2414 static void sym_nego_default (hcb_p np, tcb_p tp, ccb_p cp);
2415 static void sym_nego_rejected (hcb_p np, tcb_p tp, ccb_p cp);
2416 static void sym_int_sir (hcb_p np);
2417 static void sym_free_ccb (hcb_p np, ccb_p cp);
2418 static ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order);
2419 static ccb_p sym_alloc_ccb (hcb_p np);
2420 static ccb_p sym_ccb_from_dsa (hcb_p np, u32 dsa);
2421 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln);
2422 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln);
2423 static int  sym_snooptest (hcb_p np);
2424 static void sym_selectclock(hcb_p np, u_char scntl3);
2425 static void sym_getclock (hcb_p np, int mult);
2426 static int  sym_getpciclock (hcb_p np);
2427 static void sym_complete_ok (hcb_p np, ccb_p cp);
2428 static void sym_complete_error (hcb_p np, ccb_p cp);
2429 static void sym_timeout (void *arg);
2430 static int  sym_abort_scsiio (hcb_p np, union ccb *ccb, int timed_out);
2431 static void sym_reset_dev (hcb_p np, union ccb *ccb);
2432 static void sym_action (struct cam_sim *sim, union ccb *ccb);
2433 static void sym_action1 (struct cam_sim *sim, union ccb *ccb);
2434 static int  sym_setup_cdb (hcb_p np, struct ccb_scsiio *csio, ccb_p cp);
2435 static void sym_setup_data_and_start (hcb_p np, struct ccb_scsiio *csio,
2436 				      ccb_p cp);
2437 #ifdef	FreeBSD_Bus_Dma_Abstraction
2438 static int sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
2439 					bus_dma_segment_t *psegs, int nsegs);
2440 #else
2441 static int  sym_scatter_virtual (hcb_p np, ccb_p cp, vm_offset_t vaddr,
2442 				 vm_size_t len);
2443 static int  sym_scatter_sg_virtual (hcb_p np, ccb_p cp,
2444 				    bus_dma_segment_t *psegs, int nsegs);
2445 static int  sym_scatter_physical (hcb_p np, ccb_p cp, vm_offset_t paddr,
2446 				  vm_size_t len);
2447 #endif
2448 static int sym_scatter_sg_physical (hcb_p np, ccb_p cp,
2449 				    bus_dma_segment_t *psegs, int nsegs);
2450 static void sym_action2 (struct cam_sim *sim, union ccb *ccb);
2451 static void sym_update_trans (hcb_p np, tcb_p tp, struct sym_trans *tip,
2452 			      struct ccb_trans_settings *cts);
2453 static void sym_update_dflags(hcb_p np, u_char *flags,
2454 			      struct ccb_trans_settings *cts);
2455 
2456 #ifdef FreeBSD_Bus_Io_Abstraction
2457 static struct sym_pci_chip *sym_find_pci_chip (device_t dev);
2458 static int  sym_pci_probe (device_t dev);
2459 static int  sym_pci_attach (device_t dev);
2460 #else
2461 static struct sym_pci_chip *sym_find_pci_chip (pcici_t tag);
2462 static const char *sym_pci_probe (pcici_t tag, pcidi_t type);
2463 static void sym_pci_attach (pcici_t tag, int unit);
2464 static int sym_pci_attach2 (pcici_t tag, int unit);
2465 #endif
2466 
2467 static void sym_pci_free (hcb_p np);
2468 static int  sym_cam_attach (hcb_p np);
2469 static void sym_cam_free (hcb_p np);
2470 
2471 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram);
2472 static void sym_nvram_setup_target (hcb_p np, int targ, struct sym_nvram *nvp);
2473 static int sym_read_nvram (hcb_p np, struct sym_nvram *nvp);
2474 
2475 /*
2476  *  Print something which allows to retrieve the controler type,
2477  *  unit, target, lun concerned by a kernel message.
2478  */
2479 static void PRINT_TARGET (hcb_p np, int target)
2480 {
2481 	kprintf ("%s:%d:", sym_name(np), target);
2482 }
2483 
2484 static void PRINT_LUN(hcb_p np, int target, int lun)
2485 {
2486 	kprintf ("%s:%d:%d:", sym_name(np), target, lun);
2487 }
2488 
2489 static void PRINT_ADDR (ccb_p cp)
2490 {
2491 	if (cp && cp->cam_ccb)
2492 		xpt_print_path(cp->cam_ccb->ccb_h.path);
2493 }
2494 
2495 /*
2496  *  Take into account this ccb in the freeze count.
2497  */
2498 static void sym_freeze_cam_ccb(union ccb *ccb)
2499 {
2500 	if (!(ccb->ccb_h.flags & CAM_DEV_QFRZDIS)) {
2501 		if (!(ccb->ccb_h.status & CAM_DEV_QFRZN)) {
2502 			ccb->ccb_h.status |= CAM_DEV_QFRZN;
2503 			xpt_freeze_devq(ccb->ccb_h.path, 1);
2504 		}
2505 	}
2506 }
2507 
2508 /*
2509  *  Set the status field of a CAM CCB.
2510  */
2511 static __inline void sym_set_cam_status(union ccb *ccb, cam_status status)
2512 {
2513 	ccb->ccb_h.status &= ~CAM_STATUS_MASK;
2514 	ccb->ccb_h.status |= status;
2515 }
2516 
2517 /*
2518  *  Get the status field of a CAM CCB.
2519  */
2520 static __inline int sym_get_cam_status(union ccb *ccb)
2521 {
2522 	return ccb->ccb_h.status & CAM_STATUS_MASK;
2523 }
2524 
2525 /*
2526  *  Enqueue a CAM CCB.
2527  */
2528 static void sym_enqueue_cam_ccb(hcb_p np, union ccb *ccb)
2529 {
2530 	assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
2531 	ccb->ccb_h.status = CAM_REQ_INPROG;
2532 
2533 	callout_reset(&ccb->ccb_h.timeout_ch, ccb->ccb_h.timeout*hz/1000,
2534 		      sym_timeout, ccb);
2535 	ccb->ccb_h.status |= CAM_SIM_QUEUED;
2536 	ccb->ccb_h.sym_hcb_ptr = np;
2537 
2538 	sym_insque_tail(sym_qptr(&ccb->ccb_h.sim_links), &np->cam_ccbq);
2539 }
2540 
2541 /*
2542  *  Complete a pending CAM CCB.
2543  */
2544 static void sym_xpt_done(hcb_p np, union ccb *ccb)
2545 {
2546 	if (ccb->ccb_h.status & CAM_SIM_QUEUED) {
2547 		callout_stop(&ccb->ccb_h.timeout_ch);
2548 		sym_remque(sym_qptr(&ccb->ccb_h.sim_links));
2549 		ccb->ccb_h.status &= ~CAM_SIM_QUEUED;
2550 		ccb->ccb_h.sym_hcb_ptr = 0;
2551 	}
2552 	if (ccb->ccb_h.flags & CAM_DEV_QFREEZE)
2553 		sym_freeze_cam_ccb(ccb);
2554 	xpt_done(ccb);
2555 }
2556 
2557 static void sym_xpt_done2(hcb_p np, union ccb *ccb, int cam_status)
2558 {
2559 	sym_set_cam_status(ccb, cam_status);
2560 	sym_xpt_done(np, ccb);
2561 }
2562 
2563 /*
2564  *  SYMBIOS chip clock divisor table.
2565  *
2566  *  Divisors are multiplied by 10,000,000 in order to make
2567  *  calculations more simple.
2568  */
2569 #define _5M 5000000
2570 static u32 div_10M[] = {2*_5M, 3*_5M, 4*_5M, 6*_5M, 8*_5M, 12*_5M, 16*_5M};
2571 
2572 /*
2573  *  SYMBIOS chips allow burst lengths of 2, 4, 8, 16, 32, 64,
2574  *  128 transfers. All chips support at least 16 transfers
2575  *  bursts. The 825A, 875 and 895 chips support bursts of up
2576  *  to 128 transfers and the 895A and 896 support bursts of up
2577  *  to 64 transfers. All other chips support up to 16
2578  *  transfers bursts.
2579  *
2580  *  For PCI 32 bit data transfers each transfer is a DWORD.
2581  *  It is a QUADWORD (8 bytes) for PCI 64 bit data transfers.
2582  *
2583  *  We use log base 2 (burst length) as internal code, with
2584  *  value 0 meaning "burst disabled".
2585  */
2586 
2587 /*
2588  *  Burst length from burst code.
2589  */
2590 #define burst_length(bc) (!(bc))? 0 : 1 << (bc)
2591 
2592 /*
2593  *  Burst code from io register bits.
2594  */
2595 #define burst_code(dmode, ctest4, ctest5) \
2596 	(ctest4) & 0x80? 0 : (((dmode) & 0xc0) >> 6) + ((ctest5) & 0x04) + 1
2597 
2598 /*
2599  *  Set initial io register bits from burst code.
2600  */
2601 static __inline void sym_init_burst(hcb_p np, u_char bc)
2602 {
2603 	np->rv_ctest4	&= ~0x80;
2604 	np->rv_dmode	&= ~(0x3 << 6);
2605 	np->rv_ctest5	&= ~0x4;
2606 
2607 	if (!bc) {
2608 		np->rv_ctest4	|= 0x80;
2609 	}
2610 	else {
2611 		--bc;
2612 		np->rv_dmode	|= ((bc & 0x3) << 6);
2613 		np->rv_ctest5	|= (bc & 0x4);
2614 	}
2615 }
2616 
2617 
2618 /*
2619  * Print out the list of targets that have some flag disabled by user.
2620  */
2621 static void sym_print_targets_flag(hcb_p np, int mask, char *msg)
2622 {
2623 	int cnt;
2624 	int i;
2625 
2626 	for (cnt = 0, i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2627 		if (i == np->myaddr)
2628 			continue;
2629 		if (np->target[i].usrflags & mask) {
2630 			if (!cnt++)
2631 				kprintf("%s: %s disabled for targets",
2632 					sym_name(np), msg);
2633 			kprintf(" %d", i);
2634 		}
2635 	}
2636 	if (cnt)
2637 		kprintf(".\n");
2638 }
2639 
2640 /*
2641  *  Save initial settings of some IO registers.
2642  *  Assumed to have been set by BIOS.
2643  *  We cannot reset the chip prior to reading the
2644  *  IO registers, since informations will be lost.
2645  *  Since the SCRIPTS processor may be running, this
2646  *  is not safe on paper, but it seems to work quite
2647  *  well. :)
2648  */
2649 static void sym_save_initial_setting (hcb_p np)
2650 {
2651 	np->sv_scntl0	= INB(nc_scntl0) & 0x0a;
2652 	np->sv_scntl3	= INB(nc_scntl3) & 0x07;
2653 	np->sv_dmode	= INB(nc_dmode)  & 0xce;
2654 	np->sv_dcntl	= INB(nc_dcntl)  & 0xa8;
2655 	np->sv_ctest3	= INB(nc_ctest3) & 0x01;
2656 	np->sv_ctest4	= INB(nc_ctest4) & 0x80;
2657 	np->sv_gpcntl	= INB(nc_gpcntl);
2658 	np->sv_stest1	= INB(nc_stest1);
2659 	np->sv_stest2	= INB(nc_stest2) & 0x20;
2660 	np->sv_stest4	= INB(nc_stest4);
2661 	if (np->features & FE_C10) {	/* Always large DMA fifo + ultra3 */
2662 		np->sv_scntl4	= INB(nc_scntl4);
2663 		np->sv_ctest5	= INB(nc_ctest5) & 0x04;
2664 	}
2665 	else
2666 		np->sv_ctest5	= INB(nc_ctest5) & 0x24;
2667 }
2668 
2669 /*
2670  *  Prepare io register values used by sym_init() according
2671  *  to selected and supported features.
2672  */
2673 static int sym_prepare_setting(hcb_p np, struct sym_nvram *nvram)
2674 {
2675 	u_char	burst_max;
2676 	u32	period;
2677 	int i;
2678 
2679 	/*
2680 	 *  Wide ?
2681 	 */
2682 	np->maxwide	= (np->features & FE_WIDE)? 1 : 0;
2683 
2684 	/*
2685 	 *  Get the frequency of the chip's clock.
2686 	 */
2687 	if	(np->features & FE_QUAD)
2688 		np->multiplier	= 4;
2689 	else if	(np->features & FE_DBLR)
2690 		np->multiplier	= 2;
2691 	else
2692 		np->multiplier	= 1;
2693 
2694 	np->clock_khz	= (np->features & FE_CLK80)? 80000 : 40000;
2695 	np->clock_khz	*= np->multiplier;
2696 
2697 	if (np->clock_khz != 40000)
2698 		sym_getclock(np, np->multiplier);
2699 
2700 	/*
2701 	 * Divisor to be used for async (timer pre-scaler).
2702 	 */
2703 	i = np->clock_divn - 1;
2704 	while (--i >= 0) {
2705 		if (10ul * SYM_CONF_MIN_ASYNC * np->clock_khz > div_10M[i]) {
2706 			++i;
2707 			break;
2708 		}
2709 	}
2710 	np->rv_scntl3 = i+1;
2711 
2712 	/*
2713 	 * The C1010 uses hardwired divisors for async.
2714 	 * So, we just throw away, the async. divisor.:-)
2715 	 */
2716 	if (np->features & FE_C10)
2717 		np->rv_scntl3 = 0;
2718 
2719 	/*
2720 	 * Minimum synchronous period factor supported by the chip.
2721 	 * Btw, 'period' is in tenths of nanoseconds.
2722 	 */
2723 	period = (4 * div_10M[0] + np->clock_khz - 1) / np->clock_khz;
2724 	if	(period <= 250)		np->minsync = 10;
2725 	else if	(period <= 303)		np->minsync = 11;
2726 	else if	(period <= 500)		np->minsync = 12;
2727 	else				np->minsync = (period + 40 - 1) / 40;
2728 
2729 	/*
2730 	 * Check against chip SCSI standard support (SCSI-2,ULTRA,ULTRA2).
2731 	 */
2732 	if	(np->minsync < 25 &&
2733 		 !(np->features & (FE_ULTRA|FE_ULTRA2|FE_ULTRA3)))
2734 		np->minsync = 25;
2735 	else if	(np->minsync < 12 &&
2736 		 !(np->features & (FE_ULTRA2|FE_ULTRA3)))
2737 		np->minsync = 12;
2738 
2739 	/*
2740 	 * Maximum synchronous period factor supported by the chip.
2741 	 */
2742 	period = (11 * div_10M[np->clock_divn - 1]) / (4 * np->clock_khz);
2743 	np->maxsync = period > 2540 ? 254 : period / 10;
2744 
2745 	/*
2746 	 * If chip is a C1010, guess the sync limits in DT mode.
2747 	 */
2748 	if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) {
2749 		if (np->clock_khz == 160000) {
2750 			np->minsync_dt = 9;
2751 			np->maxsync_dt = 50;
2752 			np->maxoffs_dt = 62;
2753 		}
2754 	}
2755 
2756 	/*
2757 	 *  64 bit addressing  (895A/896/1010) ?
2758 	 */
2759 	if (np->features & FE_DAC)
2760 #if BITS_PER_LONG > 32
2761 		np->rv_ccntl1	|= (XTIMOD | EXTIBMV);
2762 #else
2763 		np->rv_ccntl1	|= (DDAC);
2764 #endif
2765 
2766 	/*
2767 	 *  Phase mismatch handled by SCRIPTS (895A/896/1010) ?
2768   	 */
2769 	if (np->features & FE_NOPM)
2770 		np->rv_ccntl0	|= (ENPMJ);
2771 
2772  	/*
2773 	 *  C1010 Errata.
2774 	 *  In dual channel mode, contention occurs if internal cycles
2775 	 *  are used. Disable internal cycles.
2776 	 */
2777 	if (np->device_id == PCI_ID_LSI53C1010 &&
2778 	    np->revision_id < 0x2)
2779 		np->rv_ccntl0	|=  DILS;
2780 
2781 	/*
2782 	 *  Select burst length (dwords)
2783 	 */
2784 	burst_max	= SYM_SETUP_BURST_ORDER;
2785 	if (burst_max == 255)
2786 		burst_max = burst_code(np->sv_dmode, np->sv_ctest4,
2787 				       np->sv_ctest5);
2788 	if (burst_max > 7)
2789 		burst_max = 7;
2790 	if (burst_max > np->maxburst)
2791 		burst_max = np->maxburst;
2792 
2793 	/*
2794 	 *  DEL 352 - 53C810 Rev x11 - Part Number 609-0392140 - ITEM 2.
2795 	 *  This chip and the 860 Rev 1 may wrongly use PCI cache line
2796 	 *  based transactions on LOAD/STORE instructions. So we have
2797 	 *  to prevent these chips from using such PCI transactions in
2798 	 *  this driver. The generic ncr driver that does not use
2799 	 *  LOAD/STORE instructions does not need this work-around.
2800 	 */
2801 	if ((np->device_id == PCI_ID_SYM53C810 &&
2802 	     np->revision_id >= 0x10 && np->revision_id <= 0x11) ||
2803 	    (np->device_id == PCI_ID_SYM53C860 &&
2804 	     np->revision_id <= 0x1))
2805 		np->features &= ~(FE_WRIE|FE_ERL|FE_ERMP);
2806 
2807 	/*
2808 	 *  Select all supported special features.
2809 	 *  If we are using on-board RAM for scripts, prefetch (PFEN)
2810 	 *  does not help, but burst op fetch (BOF) does.
2811 	 *  Disabling PFEN makes sure BOF will be used.
2812 	 */
2813 	if (np->features & FE_ERL)
2814 		np->rv_dmode	|= ERL;		/* Enable Read Line */
2815 	if (np->features & FE_BOF)
2816 		np->rv_dmode	|= BOF;		/* Burst Opcode Fetch */
2817 	if (np->features & FE_ERMP)
2818 		np->rv_dmode	|= ERMP;	/* Enable Read Multiple */
2819 #if 1
2820 	if ((np->features & FE_PFEN) && !np->ram_ba)
2821 #else
2822 	if (np->features & FE_PFEN)
2823 #endif
2824 		np->rv_dcntl	|= PFEN;	/* Prefetch Enable */
2825 	if (np->features & FE_CLSE)
2826 		np->rv_dcntl	|= CLSE;	/* Cache Line Size Enable */
2827 	if (np->features & FE_WRIE)
2828 		np->rv_ctest3	|= WRIE;	/* Write and Invalidate */
2829 	if (np->features & FE_DFS)
2830 		np->rv_ctest5	|= DFS;		/* Dma Fifo Size */
2831 
2832 	/*
2833 	 *  Select some other
2834 	 */
2835 	if (SYM_SETUP_PCI_PARITY)
2836 		np->rv_ctest4	|= MPEE; /* Master parity checking */
2837 	if (SYM_SETUP_SCSI_PARITY)
2838 		np->rv_scntl0	|= 0x0a; /*  full arb., ena parity, par->ATN  */
2839 
2840 	/*
2841 	 *  Get parity checking, host ID and verbose mode from NVRAM
2842 	 */
2843 	np->myaddr = 255;
2844 	sym_nvram_setup_host (np, nvram);
2845 
2846 	/*
2847 	 *  Get SCSI addr of host adapter (set by bios?).
2848 	 */
2849 	if (np->myaddr == 255) {
2850 		np->myaddr = INB(nc_scid) & 0x07;
2851 		if (!np->myaddr)
2852 			np->myaddr = SYM_SETUP_HOST_ID;
2853 	}
2854 
2855 	/*
2856 	 *  Prepare initial io register bits for burst length
2857 	 */
2858 	sym_init_burst(np, burst_max);
2859 
2860 	/*
2861 	 *  Set SCSI BUS mode.
2862 	 *  - LVD capable chips (895/895A/896/1010) report the
2863 	 *    current BUS mode through the STEST4 IO register.
2864 	 *  - For previous generation chips (825/825A/875),
2865 	 *    user has to tell us how to check against HVD,
2866 	 *    since a 100% safe algorithm is not possible.
2867 	 */
2868 	np->scsi_mode = SMODE_SE;
2869 	if (np->features & (FE_ULTRA2|FE_ULTRA3))
2870 		np->scsi_mode = (np->sv_stest4 & SMODE);
2871 	else if	(np->features & FE_DIFF) {
2872 		if (SYM_SETUP_SCSI_DIFF == 1) {
2873 			if (np->sv_scntl3) {
2874 				if (np->sv_stest2 & 0x20)
2875 					np->scsi_mode = SMODE_HVD;
2876 			}
2877 			else if (nvram->type == SYM_SYMBIOS_NVRAM) {
2878 				if (!(INB(nc_gpreg) & 0x08))
2879 					np->scsi_mode = SMODE_HVD;
2880 			}
2881 		}
2882 		else if	(SYM_SETUP_SCSI_DIFF == 2)
2883 			np->scsi_mode = SMODE_HVD;
2884 	}
2885 	if (np->scsi_mode == SMODE_HVD)
2886 		np->rv_stest2 |= 0x20;
2887 
2888 	/*
2889 	 *  Set LED support from SCRIPTS.
2890 	 *  Ignore this feature for boards known to use a
2891 	 *  specific GPIO wiring and for the 895A, 896
2892 	 *  and 1010 that drive the LED directly.
2893 	 */
2894 	if ((SYM_SETUP_SCSI_LED ||
2895 	     (nvram->type == SYM_SYMBIOS_NVRAM ||
2896 	      (nvram->type == SYM_TEKRAM_NVRAM &&
2897 	       np->device_id == PCI_ID_SYM53C895))) &&
2898 	    !(np->features & FE_LEDC) && !(np->sv_gpcntl & 0x01))
2899 		np->features |= FE_LED0;
2900 
2901 	/*
2902 	 *  Set irq mode.
2903 	 */
2904 	switch(SYM_SETUP_IRQ_MODE & 3) {
2905 	case 2:
2906 		np->rv_dcntl	|= IRQM;
2907 		break;
2908 	case 1:
2909 		np->rv_dcntl	|= (np->sv_dcntl & IRQM);
2910 		break;
2911 	default:
2912 		break;
2913 	}
2914 
2915 	/*
2916 	 *  Configure targets according to driver setup.
2917 	 *  If NVRAM present get targets setup from NVRAM.
2918 	 */
2919 	for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
2920 		tcb_p tp = &np->target[i];
2921 
2922 #ifdef	FreeBSD_New_Tran_Settings
2923 		tp->tinfo.user.scsi_version = tp->tinfo.current.scsi_version= 2;
2924 		tp->tinfo.user.spi_version  = tp->tinfo.current.spi_version = 2;
2925 #endif
2926 		tp->tinfo.user.period = np->minsync;
2927 		tp->tinfo.user.offset = np->maxoffs;
2928 		tp->tinfo.user.width  = np->maxwide ? BUS_16_BIT : BUS_8_BIT;
2929 		tp->usrflags |= (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
2930 		tp->usrtags = SYM_SETUP_MAX_TAG;
2931 
2932 		sym_nvram_setup_target (np, i, nvram);
2933 
2934 		/*
2935 		 *  For now, guess PPR/DT support from the period
2936 		 *  and BUS width.
2937 		 */
2938 		if (np->features & FE_ULTRA3) {
2939 			if (tp->tinfo.user.period <= 9	&&
2940 			    tp->tinfo.user.width == BUS_16_BIT) {
2941 				tp->tinfo.user.options |= PPR_OPT_DT;
2942 				tp->tinfo.user.offset   = np->maxoffs_dt;
2943 #ifdef	FreeBSD_New_Tran_Settings
2944 				tp->tinfo.user.spi_version = 3;
2945 #endif
2946 			}
2947 		}
2948 
2949 		if (!tp->usrtags)
2950 			tp->usrflags &= ~SYM_TAGS_ENABLED;
2951 	}
2952 
2953 	/*
2954 	 *  Let user know about the settings.
2955 	 */
2956 	i = nvram->type;
2957 	kprintf("%s: %s NVRAM, ID %d, Fast-%d, %s, %s\n", sym_name(np),
2958 		i  == SYM_SYMBIOS_NVRAM ? "Symbios" :
2959 		(i == SYM_TEKRAM_NVRAM  ? "Tekram" : "No"),
2960 		np->myaddr,
2961 		(np->features & FE_ULTRA3) ? 80 :
2962 		(np->features & FE_ULTRA2) ? 40 :
2963 		(np->features & FE_ULTRA)  ? 20 : 10,
2964 		sym_scsi_bus_mode(np->scsi_mode),
2965 		(np->rv_scntl0 & 0xa)	? "parity checking" : "NO parity");
2966 	/*
2967 	 *  Tell him more on demand.
2968 	 */
2969 	if (sym_verbose) {
2970 		kprintf("%s: %s IRQ line driver%s\n",
2971 			sym_name(np),
2972 			np->rv_dcntl & IRQM ? "totem pole" : "open drain",
2973 			np->ram_ba ? ", using on-chip SRAM" : "");
2974 		kprintf("%s: using %s firmware.\n", sym_name(np), np->fw_name);
2975 		if (np->features & FE_NOPM)
2976 			kprintf("%s: handling phase mismatch from SCRIPTS.\n",
2977 			       sym_name(np));
2978 	}
2979 	/*
2980 	 *  And still more.
2981 	 */
2982 	if (sym_verbose > 1) {
2983 		kprintf ("%s: initial SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2984 			"(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2985 			sym_name(np), np->sv_scntl3, np->sv_dmode, np->sv_dcntl,
2986 			np->sv_ctest3, np->sv_ctest4, np->sv_ctest5);
2987 
2988 		kprintf ("%s: final   SCNTL3/DMODE/DCNTL/CTEST3/4/5 = "
2989 			"(hex) %02x/%02x/%02x/%02x/%02x/%02x\n",
2990 			sym_name(np), np->rv_scntl3, np->rv_dmode, np->rv_dcntl,
2991 			np->rv_ctest3, np->rv_ctest4, np->rv_ctest5);
2992 	}
2993 	/*
2994 	 *  Let user be aware of targets that have some disable flags set.
2995 	 */
2996 	sym_print_targets_flag(np, SYM_SCAN_BOOT_DISABLED, "SCAN AT BOOT");
2997 	if (sym_verbose)
2998 		sym_print_targets_flag(np, SYM_SCAN_LUNS_DISABLED,
2999 				       "SCAN FOR LUNS");
3000 
3001 	return 0;
3002 }
3003 
3004 /*
3005  *  Prepare the next negotiation message if needed.
3006  *
3007  *  Fill in the part of message buffer that contains the
3008  *  negotiation and the nego_status field of the CCB.
3009  *  Returns the size of the message in bytes.
3010  */
3011 
3012 static int sym_prepare_nego(hcb_p np, ccb_p cp, int nego, u_char *msgptr)
3013 {
3014 	tcb_p tp = &np->target[cp->target];
3015 	int msglen = 0;
3016 
3017 	/*
3018 	 *  Early C1010 chips need a work-around for DT
3019 	 *  data transfer to work.
3020 	 */
3021 	if (!(np->features & FE_U3EN))
3022 		tp->tinfo.goal.options = 0;
3023 	/*
3024 	 *  negotiate using PPR ?
3025 	 */
3026 	if (tp->tinfo.goal.options & PPR_OPT_MASK)
3027 		nego = NS_PPR;
3028 	/*
3029 	 *  negotiate wide transfers ?
3030 	 */
3031 	else if (tp->tinfo.current.width != tp->tinfo.goal.width)
3032 		nego = NS_WIDE;
3033 	/*
3034 	 *  negotiate synchronous transfers?
3035 	 */
3036 	else if (tp->tinfo.current.period != tp->tinfo.goal.period ||
3037 		 tp->tinfo.current.offset != tp->tinfo.goal.offset)
3038 		nego = NS_SYNC;
3039 
3040 	switch (nego) {
3041 	case NS_SYNC:
3042 		msgptr[msglen++] = M_EXTENDED;
3043 		msgptr[msglen++] = 3;
3044 		msgptr[msglen++] = M_X_SYNC_REQ;
3045 		msgptr[msglen++] = tp->tinfo.goal.period;
3046 		msgptr[msglen++] = tp->tinfo.goal.offset;
3047 		break;
3048 	case NS_WIDE:
3049 		msgptr[msglen++] = M_EXTENDED;
3050 		msgptr[msglen++] = 2;
3051 		msgptr[msglen++] = M_X_WIDE_REQ;
3052 		msgptr[msglen++] = tp->tinfo.goal.width;
3053 		break;
3054 	case NS_PPR:
3055 		msgptr[msglen++] = M_EXTENDED;
3056 		msgptr[msglen++] = 6;
3057 		msgptr[msglen++] = M_X_PPR_REQ;
3058 		msgptr[msglen++] = tp->tinfo.goal.period;
3059 		msgptr[msglen++] = 0;
3060 		msgptr[msglen++] = tp->tinfo.goal.offset;
3061 		msgptr[msglen++] = tp->tinfo.goal.width;
3062 		msgptr[msglen++] = tp->tinfo.goal.options & PPR_OPT_DT;
3063 		break;
3064 	};
3065 
3066 	cp->nego_status = nego;
3067 
3068 	if (nego) {
3069 		tp->nego_cp = cp; /* Keep track a nego will be performed */
3070 		if (DEBUG_FLAGS & DEBUG_NEGO) {
3071 			sym_print_msg(cp, nego == NS_SYNC ? "sync msgout" :
3072 					  nego == NS_WIDE ? "wide msgout" :
3073 					  "ppr msgout", msgptr);
3074 		};
3075 	};
3076 
3077 	return msglen;
3078 }
3079 
3080 /*
3081  *  Insert a job into the start queue.
3082  */
3083 static void sym_put_start_queue(hcb_p np, ccb_p cp)
3084 {
3085 	u_short	qidx;
3086 
3087 #ifdef SYM_CONF_IARB_SUPPORT
3088 	/*
3089 	 *  If the previously queued CCB is not yet done,
3090 	 *  set the IARB hint. The SCRIPTS will go with IARB
3091 	 *  for this job when starting the previous one.
3092 	 *  We leave devices a chance to win arbitration by
3093 	 *  not using more than 'iarb_max' consecutive
3094 	 *  immediate arbitrations.
3095 	 */
3096 	if (np->last_cp && np->iarb_count < np->iarb_max) {
3097 		np->last_cp->host_flags |= HF_HINT_IARB;
3098 		++np->iarb_count;
3099 	}
3100 	else
3101 		np->iarb_count = 0;
3102 	np->last_cp = cp;
3103 #endif
3104 
3105 	/*
3106 	 *  Insert first the idle task and then our job.
3107 	 *  The MB should ensure proper ordering.
3108 	 */
3109 	qidx = np->squeueput + 2;
3110 	if (qidx >= MAX_QUEUE*2) qidx = 0;
3111 
3112 	np->squeue [qidx]	   = cpu_to_scr(np->idletask_ba);
3113 	MEMORY_BARRIER();
3114 	np->squeue [np->squeueput] = cpu_to_scr(cp->ccb_ba);
3115 
3116 	np->squeueput = qidx;
3117 
3118 	if (DEBUG_FLAGS & DEBUG_QUEUE)
3119 		kprintf ("%s: queuepos=%d.\n", sym_name (np), np->squeueput);
3120 
3121 	/*
3122 	 *  Script processor may be waiting for reselect.
3123 	 *  Wake it up.
3124 	 */
3125 	MEMORY_BARRIER();
3126 	OUTB (nc_istat, SIGP|np->istat_sem);
3127 }
3128 
3129 
3130 /*
3131  *  Soft reset the chip.
3132  *
3133  *  Raising SRST when the chip is running may cause
3134  *  problems on dual function chips (see below).
3135  *  On the other hand, LVD devices need some delay
3136  *  to settle and report actual BUS mode in STEST4.
3137  */
3138 static void sym_chip_reset (hcb_p np)
3139 {
3140 	OUTB (nc_istat, SRST);
3141 	UDELAY (10);
3142 	OUTB (nc_istat, 0);
3143 	UDELAY(2000);	/* For BUS MODE to settle */
3144 }
3145 
3146 /*
3147  *  Soft reset the chip.
3148  *
3149  *  Some 896 and 876 chip revisions may hang-up if we set
3150  *  the SRST (soft reset) bit at the wrong time when SCRIPTS
3151  *  are running.
3152  *  So, we need to abort the current operation prior to
3153  *  soft resetting the chip.
3154  */
3155 static void sym_soft_reset (hcb_p np)
3156 {
3157 	u_char istat;
3158 	int i;
3159 
3160 	OUTB (nc_istat, CABRT);
3161 	for (i = 1000000 ; i ; --i) {
3162 		istat = INB (nc_istat);
3163 		if (istat & SIP) {
3164 			INW (nc_sist);
3165 			continue;
3166 		}
3167 		if (istat & DIP) {
3168 			OUTB (nc_istat, 0);
3169 			INB (nc_dstat);
3170 			break;
3171 		}
3172 	}
3173 	if (!i)
3174 		kprintf("%s: unable to abort current chip operation.\n",
3175 			sym_name(np));
3176 	sym_chip_reset (np);
3177 }
3178 
3179 /*
3180  *  Start reset process.
3181  *
3182  *  The interrupt handler will reinitialize the chip.
3183  */
3184 static void sym_start_reset(hcb_p np)
3185 {
3186 	(void) sym_reset_scsi_bus(np, 1);
3187 }
3188 
3189 static int sym_reset_scsi_bus(hcb_p np, int enab_int)
3190 {
3191 	u32 term;
3192 	int retv = 0;
3193 
3194 	sym_soft_reset(np);	/* Soft reset the chip */
3195 	if (enab_int)
3196 		OUTW (nc_sien, RST);
3197 	/*
3198 	 *  Enable Tolerant, reset IRQD if present and
3199 	 *  properly set IRQ mode, prior to resetting the bus.
3200 	 */
3201 	OUTB (nc_stest3, TE);
3202 	OUTB (nc_dcntl, (np->rv_dcntl & IRQM));
3203 	OUTB (nc_scntl1, CRST);
3204 	UDELAY (200);
3205 
3206 	if (!SYM_SETUP_SCSI_BUS_CHECK)
3207 		goto out;
3208 	/*
3209 	 *  Check for no terminators or SCSI bus shorts to ground.
3210 	 *  Read SCSI data bus, data parity bits and control signals.
3211 	 *  We are expecting RESET to be TRUE and other signals to be
3212 	 *  FALSE.
3213 	 */
3214 	term =	INB(nc_sstat0);
3215 	term =	((term & 2) << 7) + ((term & 1) << 17);	/* rst sdp0 */
3216 	term |= ((INB(nc_sstat2) & 0x01) << 26) |	/* sdp1     */
3217 		((INW(nc_sbdl) & 0xff)   << 9)  |	/* d7-0     */
3218 		((INW(nc_sbdl) & 0xff00) << 10) |	/* d15-8    */
3219 		INB(nc_sbcl);	/* req ack bsy sel atn msg cd io    */
3220 
3221 	if (!(np->features & FE_WIDE))
3222 		term &= 0x3ffff;
3223 
3224 	if (term != (2<<7)) {
3225 		kprintf("%s: suspicious SCSI data while resetting the BUS.\n",
3226 			sym_name(np));
3227 		kprintf("%s: %sdp0,d7-0,rst,req,ack,bsy,sel,atn,msg,c/d,i/o = "
3228 			"0x%lx, expecting 0x%lx\n",
3229 			sym_name(np),
3230 			(np->features & FE_WIDE) ? "dp1,d15-8," : "",
3231 			(u_long)term, (u_long)(2<<7));
3232 		if (SYM_SETUP_SCSI_BUS_CHECK == 1)
3233 			retv = 1;
3234 	}
3235 out:
3236 	OUTB (nc_scntl1, 0);
3237 	/* MDELAY(100); */
3238 	return retv;
3239 }
3240 
3241 /*
3242  *  The chip may have completed jobs. Look at the DONE QUEUE.
3243  *
3244  *  On architectures that may reorder LOAD/STORE operations,
3245  *  a memory barrier may be needed after the reading of the
3246  *  so-called `flag' and prior to dealing with the data.
3247  */
3248 static int sym_wakeup_done (hcb_p np)
3249 {
3250 	ccb_p cp;
3251 	int i, n;
3252 	u32 dsa;
3253 
3254 	n = 0;
3255 	i = np->dqueueget;
3256 	while (1) {
3257 		dsa = scr_to_cpu(np->dqueue[i]);
3258 		if (!dsa)
3259 			break;
3260 		np->dqueue[i] = 0;
3261 		if ((i = i+2) >= MAX_QUEUE*2)
3262 			i = 0;
3263 
3264 		cp = sym_ccb_from_dsa(np, dsa);
3265 		if (cp) {
3266 			MEMORY_BARRIER();
3267 			sym_complete_ok (np, cp);
3268 			++n;
3269 		}
3270 		else
3271 			kprintf ("%s: bad DSA (%x) in done queue.\n",
3272 				sym_name(np), (u_int) dsa);
3273 	}
3274 	np->dqueueget = i;
3275 
3276 	return n;
3277 }
3278 
3279 /*
3280  *  Complete all active CCBs with error.
3281  *  Used on CHIP/SCSI RESET.
3282  */
3283 static void sym_flush_busy_queue (hcb_p np, int cam_status)
3284 {
3285 	/*
3286 	 *  Move all active CCBs to the COMP queue
3287 	 *  and flush this queue.
3288 	 */
3289 	sym_que_splice(&np->busy_ccbq, &np->comp_ccbq);
3290 	sym_que_init(&np->busy_ccbq);
3291 	sym_flush_comp_queue(np, cam_status);
3292 }
3293 
3294 /*
3295  *  Start chip.
3296  *
3297  *  'reason' means:
3298  *     0: initialisation.
3299  *     1: SCSI BUS RESET delivered or received.
3300  *     2: SCSI BUS MODE changed.
3301  */
3302 static void sym_init (hcb_p np, int reason)
3303 {
3304  	int	i;
3305 	u32	phys;
3306 
3307  	/*
3308 	 *  Reset chip if asked, otherwise just clear fifos.
3309  	 */
3310 	if (reason == 1)
3311 		sym_soft_reset(np);
3312 	else {
3313 		OUTB (nc_stest3, TE|CSF);
3314 		OUTONB (nc_ctest3, CLF);
3315 	}
3316 
3317 	/*
3318 	 *  Clear Start Queue
3319 	 */
3320 	phys = np->squeue_ba;
3321 	for (i = 0; i < MAX_QUEUE*2; i += 2) {
3322 		np->squeue[i]   = cpu_to_scr(np->idletask_ba);
3323 		np->squeue[i+1] = cpu_to_scr(phys + (i+2)*4);
3324 	}
3325 	np->squeue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3326 
3327 	/*
3328 	 *  Start at first entry.
3329 	 */
3330 	np->squeueput = 0;
3331 
3332 	/*
3333 	 *  Clear Done Queue
3334 	 */
3335 	phys = np->dqueue_ba;
3336 	for (i = 0; i < MAX_QUEUE*2; i += 2) {
3337 		np->dqueue[i]   = 0;
3338 		np->dqueue[i+1] = cpu_to_scr(phys + (i+2)*4);
3339 	}
3340 	np->dqueue[MAX_QUEUE*2-1] = cpu_to_scr(phys);
3341 
3342 	/*
3343 	 *  Start at first entry.
3344 	 */
3345 	np->dqueueget = 0;
3346 
3347 	/*
3348 	 *  Install patches in scripts.
3349 	 *  This also let point to first position the start
3350 	 *  and done queue pointers used from SCRIPTS.
3351 	 */
3352 	np->fw_patch(np);
3353 
3354 	/*
3355 	 *  Wakeup all pending jobs.
3356 	 */
3357 	sym_flush_busy_queue(np, CAM_SCSI_BUS_RESET);
3358 
3359 	/*
3360 	 *  Init chip.
3361 	 */
3362 	OUTB (nc_istat,  0x00   );	/*  Remove Reset, abort */
3363 	UDELAY (2000);	/* The 895 needs time for the bus mode to settle */
3364 
3365 	OUTB (nc_scntl0, np->rv_scntl0 | 0xc0);
3366 					/*  full arb., ena parity, par->ATN  */
3367 	OUTB (nc_scntl1, 0x00);		/*  odd parity, and remove CRST!! */
3368 
3369 	sym_selectclock(np, np->rv_scntl3);	/* Select SCSI clock */
3370 
3371 	OUTB (nc_scid  , RRE|np->myaddr);	/* Adapter SCSI address */
3372 	OUTW (nc_respid, 1ul<<np->myaddr);	/* Id to respond to */
3373 	OUTB (nc_istat , SIGP	);		/*  Signal Process */
3374 	OUTB (nc_dmode , np->rv_dmode);		/* Burst length, dma mode */
3375 	OUTB (nc_ctest5, np->rv_ctest5);	/* Large fifo + large burst */
3376 
3377 	OUTB (nc_dcntl , NOCOM|np->rv_dcntl);	/* Protect SFBR */
3378 	OUTB (nc_ctest3, np->rv_ctest3);	/* Write and invalidate */
3379 	OUTB (nc_ctest4, np->rv_ctest4);	/* Master parity checking */
3380 
3381 	/* Extended Sreq/Sack filtering not supported on the C10 */
3382 	if (np->features & FE_C10)
3383 		OUTB (nc_stest2, np->rv_stest2);
3384 	else
3385 		OUTB (nc_stest2, EXT|np->rv_stest2);
3386 
3387 	OUTB (nc_stest3, TE);			/* TolerANT enable */
3388 	OUTB (nc_stime0, 0x0c);			/* HTH disabled  STO 0.25 sec */
3389 
3390 	/*
3391 	 *  For now, disable AIP generation on C1010-66.
3392 	 */
3393 	if (np->device_id == PCI_ID_LSI53C1010_2)
3394 		OUTB (nc_aipcntl1, DISAIP);
3395 
3396 	/*
3397 	 *  C10101 Errata.
3398 	 *  Errant SGE's when in narrow. Write bits 4 & 5 of
3399 	 *  STEST1 register to disable SGE. We probably should do
3400 	 *  that from SCRIPTS for each selection/reselection, but
3401 	 *  I just don't want. :)
3402 	 */
3403 	if (np->device_id == PCI_ID_LSI53C1010 &&
3404 	    /* np->revision_id < 0xff */ 1)
3405 		OUTB (nc_stest1, INB(nc_stest1) | 0x30);
3406 
3407 	/*
3408 	 *  DEL 441 - 53C876 Rev 5 - Part Number 609-0392787/2788 - ITEM 2.
3409 	 *  Disable overlapped arbitration for some dual function devices,
3410 	 *  regardless revision id (kind of post-chip-design feature. ;-))
3411 	 */
3412 	if (np->device_id == PCI_ID_SYM53C875)
3413 		OUTB (nc_ctest0, (1<<5));
3414 	else if (np->device_id == PCI_ID_SYM53C896)
3415 		np->rv_ccntl0 |= DPR;
3416 
3417 	/*
3418 	 *  Write CCNTL0/CCNTL1 for chips capable of 64 bit addressing
3419 	 *  and/or hardware phase mismatch, since only such chips
3420 	 *  seem to support those IO registers.
3421 	 */
3422 	if (np->features & (FE_DAC|FE_NOPM)) {
3423 		OUTB (nc_ccntl0, np->rv_ccntl0);
3424 		OUTB (nc_ccntl1, np->rv_ccntl1);
3425 	}
3426 
3427 	/*
3428 	 *  If phase mismatch handled by scripts (895A/896/1010),
3429 	 *  set PM jump addresses.
3430 	 */
3431 	if (np->features & FE_NOPM) {
3432 		OUTL (nc_pmjad1, SCRIPTB_BA (np, pm_handle));
3433 		OUTL (nc_pmjad2, SCRIPTB_BA (np, pm_handle));
3434 	}
3435 
3436 	/*
3437 	 *    Enable GPIO0 pin for writing if LED support from SCRIPTS.
3438 	 *    Also set GPIO5 and clear GPIO6 if hardware LED control.
3439 	 */
3440 	if (np->features & FE_LED0)
3441 		OUTB(nc_gpcntl, INB(nc_gpcntl) & ~0x01);
3442 	else if (np->features & FE_LEDC)
3443 		OUTB(nc_gpcntl, (INB(nc_gpcntl) & ~0x41) | 0x20);
3444 
3445 	/*
3446 	 *      enable ints
3447 	 */
3448 	OUTW (nc_sien , STO|HTH|MA|SGE|UDC|RST|PAR);
3449 	OUTB (nc_dien , MDPE|BF|SSI|SIR|IID);
3450 
3451 	/*
3452 	 *  For 895/6 enable SBMC interrupt and save current SCSI bus mode.
3453 	 *  Try to eat the spurious SBMC interrupt that may occur when
3454 	 *  we reset the chip but not the SCSI BUS (at initialization).
3455 	 */
3456 	if (np->features & (FE_ULTRA2|FE_ULTRA3)) {
3457 		OUTONW (nc_sien, SBMC);
3458 		if (reason == 0) {
3459 			MDELAY(100);
3460 			INW (nc_sist);
3461 		}
3462 		np->scsi_mode = INB (nc_stest4) & SMODE;
3463 	}
3464 
3465 	/*
3466 	 *  Fill in target structure.
3467 	 *  Reinitialize usrsync.
3468 	 *  Reinitialize usrwide.
3469 	 *  Prepare sync negotiation according to actual SCSI bus mode.
3470 	 */
3471 	for (i=0;i<SYM_CONF_MAX_TARGET;i++) {
3472 		tcb_p tp = &np->target[i];
3473 
3474 		tp->to_reset  = 0;
3475 		tp->head.sval = 0;
3476 		tp->head.wval = np->rv_scntl3;
3477 		tp->head.uval = 0;
3478 
3479 		tp->tinfo.current.period = 0;
3480 		tp->tinfo.current.offset = 0;
3481 		tp->tinfo.current.width  = BUS_8_BIT;
3482 		tp->tinfo.current.options = 0;
3483 	}
3484 
3485 	/*
3486 	 *  Download SCSI SCRIPTS to on-chip RAM if present,
3487 	 *  and start script processor.
3488 	 */
3489 	if (np->ram_ba) {
3490 		if (sym_verbose > 1)
3491 			kprintf ("%s: Downloading SCSI SCRIPTS.\n",
3492 				sym_name(np));
3493 		if (np->ram_ws == 8192) {
3494 			OUTRAM_OFF(4096, np->scriptb0, np->scriptb_sz);
3495 			OUTL (nc_mmws, np->scr_ram_seg);
3496 			OUTL (nc_mmrs, np->scr_ram_seg);
3497 			OUTL (nc_sfs,  np->scr_ram_seg);
3498 			phys = SCRIPTB_BA (np, start64);
3499 		}
3500 		else
3501 			phys = SCRIPTA_BA (np, init);
3502 		OUTRAM_OFF(0, np->scripta0, np->scripta_sz);
3503 	}
3504 	else
3505 		phys = SCRIPTA_BA (np, init);
3506 
3507 	np->istat_sem = 0;
3508 
3509 	OUTL (nc_dsa, np->hcb_ba);
3510 	OUTL_DSP (phys);
3511 
3512 	/*
3513 	 *  Notify the XPT about the RESET condition.
3514 	 */
3515 	if (reason != 0)
3516 		xpt_async(AC_BUS_RESET, np->path, NULL);
3517 }
3518 
3519 /*
3520  *  Get clock factor and sync divisor for a given
3521  *  synchronous factor period.
3522  */
3523 static int
3524 sym_getsync(hcb_p np, u_char dt, u_char sfac, u_char *divp, u_char *fakp)
3525 {
3526 	u32	clk = np->clock_khz;	/* SCSI clock frequency in kHz	*/
3527 	int	div = np->clock_divn;	/* Number of divisors supported	*/
3528 	u32	fak;			/* Sync factor in sxfer		*/
3529 	u32	per;			/* Period in tenths of ns	*/
3530 	u32	kpc;			/* (per * clk)			*/
3531 	int	ret;
3532 
3533 	/*
3534 	 *  Compute the synchronous period in tenths of nano-seconds
3535 	 */
3536 	if (dt && sfac <= 9)	per = 125;
3537 	else if	(sfac <= 10)	per = 250;
3538 	else if	(sfac == 11)	per = 303;
3539 	else if	(sfac == 12)	per = 500;
3540 	else			per = 40 * sfac;
3541 	ret = per;
3542 
3543 	kpc = per * clk;
3544 	if (dt)
3545 		kpc <<= 1;
3546 
3547 	/*
3548 	 *  For earliest C10 revision 0, we cannot use extra
3549 	 *  clocks for the setting of the SCSI clocking.
3550 	 *  Note that this limits the lowest sync data transfer
3551 	 *  to 5 Mega-transfers per second and may result in
3552 	 *  using higher clock divisors.
3553 	 */
3554 #if 1
3555 	if ((np->features & (FE_C10|FE_U3EN)) == FE_C10) {
3556 		/*
3557 		 *  Look for the lowest clock divisor that allows an
3558 		 *  output speed not faster than the period.
3559 		 */
3560 		while (div > 0) {
3561 			--div;
3562 			if (kpc > (div_10M[div] << 2)) {
3563 				++div;
3564 				break;
3565 			}
3566 		}
3567 		fak = 0;			/* No extra clocks */
3568 		if (div == np->clock_divn) {	/* Are we too fast ? */
3569 			ret = -1;
3570 		}
3571 		*divp = div;
3572 		*fakp = fak;
3573 		return ret;
3574 	}
3575 #endif
3576 
3577 	/*
3578 	 *  Look for the greatest clock divisor that allows an
3579 	 *  input speed faster than the period.
3580 	 */
3581 	while (div-- > 0)
3582 		if (kpc >= (div_10M[div] << 2)) break;
3583 
3584 	/*
3585 	 *  Calculate the lowest clock factor that allows an output
3586 	 *  speed not faster than the period, and the max output speed.
3587 	 *  If fak >= 1 we will set both XCLKH_ST and XCLKH_DT.
3588 	 *  If fak >= 2 we will also set XCLKS_ST and XCLKS_DT.
3589 	 */
3590 	if (dt) {
3591 		fak = (kpc - 1) / (div_10M[div] << 1) + 1 - 2;
3592 		/* ret = ((2+fak)*div_10M[div])/np->clock_khz; */
3593 	}
3594 	else {
3595 		fak = (kpc - 1) / div_10M[div] + 1 - 4;
3596 		/* ret = ((4+fak)*div_10M[div])/np->clock_khz; */
3597 	}
3598 
3599 	/*
3600 	 *  Check against our hardware limits, or bugs :).
3601 	 */
3602 	if (fak < 0)	{fak = 0; ret = -1;}
3603 	if (fak > 2)	{fak = 2; ret = -1;}
3604 
3605 	/*
3606 	 *  Compute and return sync parameters.
3607 	 */
3608 	*divp = div;
3609 	*fakp = fak;
3610 
3611 	return ret;
3612 }
3613 
3614 /*
3615  *  Tell the SCSI layer about the new transfer parameters.
3616  */
3617 static void
3618 sym_xpt_async_transfer_neg(hcb_p np, int target, u_int spi_valid)
3619 {
3620 	struct ccb_trans_settings cts;
3621 	struct cam_path *path;
3622 	int sts;
3623 	tcb_p tp = &np->target[target];
3624 
3625 	sts = xpt_create_path(&path, NULL, cam_sim_path(np->sim), target,
3626 	                      CAM_LUN_WILDCARD);
3627 	if (sts != CAM_REQ_CMP)
3628 		return;
3629 
3630 	bzero(&cts, sizeof(cts));
3631 
3632 #ifdef	FreeBSD_New_Tran_Settings
3633 #define	cts__scsi (cts.proto_specific.scsi)
3634 #define	cts__spi  (cts.xport_specific.spi)
3635 
3636 	cts.type      = CTS_TYPE_CURRENT_SETTINGS;
3637 	cts.protocol  = PROTO_SCSI;
3638 	cts.transport = XPORT_SPI;
3639 	cts.protocol_version  = tp->tinfo.current.scsi_version;
3640 	cts.transport_version = tp->tinfo.current.spi_version;
3641 
3642 	cts__spi.valid = spi_valid;
3643 	if (spi_valid & CTS_SPI_VALID_SYNC_RATE)
3644 		cts__spi.sync_period = tp->tinfo.current.period;
3645 	if (spi_valid & CTS_SPI_VALID_SYNC_OFFSET)
3646 		cts__spi.sync_offset = tp->tinfo.current.offset;
3647 	if (spi_valid & CTS_SPI_VALID_BUS_WIDTH)
3648 		cts__spi.bus_width   = tp->tinfo.current.width;
3649 	if (spi_valid & CTS_SPI_VALID_PPR_OPTIONS)
3650 		cts__spi.ppr_options = tp->tinfo.current.options;
3651 #undef cts__spi
3652 #undef cts__scsi
3653 #else
3654 	cts.valid = spi_valid;
3655 	if (spi_valid & CCB_TRANS_SYNC_RATE_VALID)
3656 		cts.sync_period = tp->tinfo.current.period;
3657 	if (spi_valid & CCB_TRANS_SYNC_OFFSET_VALID)
3658 		cts.sync_offset = tp->tinfo.current.offset;
3659 	if (spi_valid & CCB_TRANS_BUS_WIDTH_VALID)
3660 		cts.bus_width   = tp->tinfo.current.width;
3661 #endif
3662 	xpt_setup_ccb(&cts.ccb_h, path, /*priority*/1);
3663 	xpt_async(AC_TRANSFER_NEG, path, &cts);
3664 	xpt_free_path(path);
3665 }
3666 
3667 #ifdef	FreeBSD_New_Tran_Settings
3668 #define SYM_SPI_VALID_WDTR		\
3669 	CTS_SPI_VALID_BUS_WIDTH |	\
3670 	CTS_SPI_VALID_SYNC_RATE |	\
3671 	CTS_SPI_VALID_SYNC_OFFSET
3672 #define SYM_SPI_VALID_SDTR		\
3673 	CTS_SPI_VALID_SYNC_RATE |	\
3674 	CTS_SPI_VALID_SYNC_OFFSET
3675 #define SYM_SPI_VALID_PPR		\
3676 	CTS_SPI_VALID_PPR_OPTIONS |	\
3677 	CTS_SPI_VALID_BUS_WIDTH |	\
3678 	CTS_SPI_VALID_SYNC_RATE |	\
3679 	CTS_SPI_VALID_SYNC_OFFSET
3680 #else
3681 #define SYM_SPI_VALID_WDTR		\
3682 	CCB_TRANS_BUS_WIDTH_VALID |	\
3683 	CCB_TRANS_SYNC_RATE_VALID |	\
3684 	CCB_TRANS_SYNC_OFFSET_VALID
3685 #define SYM_SPI_VALID_SDTR		\
3686 	CCB_TRANS_SYNC_RATE_VALID |	\
3687 	CCB_TRANS_SYNC_OFFSET_VALID
3688 #define SYM_SPI_VALID_PPR		\
3689 	CCB_TRANS_BUS_WIDTH_VALID |	\
3690 	CCB_TRANS_SYNC_RATE_VALID |	\
3691 	CCB_TRANS_SYNC_OFFSET_VALID
3692 #endif
3693 
3694 /*
3695  *  We received a WDTR.
3696  *  Let everything be aware of the changes.
3697  */
3698 static void sym_setwide(hcb_p np, ccb_p cp, u_char wide)
3699 {
3700 	tcb_p tp = &np->target[cp->target];
3701 
3702 	sym_settrans(np, cp, 0, 0, 0, wide, 0, 0);
3703 
3704 	/*
3705 	 *  Tell the SCSI layer about the new transfer parameters.
3706 	 */
3707 	tp->tinfo.goal.width = tp->tinfo.current.width = wide;
3708 	tp->tinfo.current.offset = 0;
3709 	tp->tinfo.current.period = 0;
3710 	tp->tinfo.current.options = 0;
3711 
3712 	sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_WDTR);
3713 }
3714 
3715 /*
3716  *  We received a SDTR.
3717  *  Let everything be aware of the changes.
3718  */
3719 static void
3720 sym_setsync(hcb_p np, ccb_p cp, u_char ofs, u_char per, u_char div, u_char fak)
3721 {
3722 	tcb_p tp = &np->target[cp->target];
3723 	u_char wide = (cp->phys.select.sel_scntl3 & EWS) ? 1 : 0;
3724 
3725 	sym_settrans(np, cp, 0, ofs, per, wide, div, fak);
3726 
3727 	/*
3728 	 *  Tell the SCSI layer about the new transfer parameters.
3729 	 */
3730 	tp->tinfo.goal.period	= tp->tinfo.current.period  = per;
3731 	tp->tinfo.goal.offset	= tp->tinfo.current.offset  = ofs;
3732 	tp->tinfo.goal.options	= tp->tinfo.current.options = 0;
3733 
3734 	sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_SDTR);
3735 }
3736 
3737 /*
3738  *  We received a PPR.
3739  *  Let everything be aware of the changes.
3740  */
3741 static void sym_setpprot(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3742 			 u_char per, u_char wide, u_char div, u_char fak)
3743 {
3744 	tcb_p tp = &np->target[cp->target];
3745 
3746 	sym_settrans(np, cp, dt, ofs, per, wide, div, fak);
3747 
3748 	/*
3749 	 *  Tell the SCSI layer about the new transfer parameters.
3750 	 */
3751 	tp->tinfo.goal.width	= tp->tinfo.current.width  = wide;
3752 	tp->tinfo.goal.period	= tp->tinfo.current.period = per;
3753 	tp->tinfo.goal.offset	= tp->tinfo.current.offset = ofs;
3754 	tp->tinfo.goal.options	= tp->tinfo.current.options = dt;
3755 
3756 	sym_xpt_async_transfer_neg(np, cp->target, SYM_SPI_VALID_PPR);
3757 }
3758 
3759 /*
3760  *  Switch trans mode for current job and it's target.
3761  */
3762 static void sym_settrans(hcb_p np, ccb_p cp, u_char dt, u_char ofs,
3763 			 u_char per, u_char wide, u_char div, u_char fak)
3764 {
3765 	SYM_QUEHEAD *qp;
3766 	union	ccb *ccb;
3767 	tcb_p tp;
3768 	u_char target = INB (nc_sdid) & 0x0f;
3769 	u_char sval, wval, uval;
3770 
3771 	assert (cp);
3772 	if (!cp) return;
3773 	ccb = cp->cam_ccb;
3774 	assert (ccb);
3775 	if (!ccb) return;
3776 	assert (target == (cp->target & 0xf));
3777 	tp = &np->target[target];
3778 
3779 	sval = tp->head.sval;
3780 	wval = tp->head.wval;
3781 	uval = tp->head.uval;
3782 
3783 #if 0
3784 	kprintf("XXXX sval=%x wval=%x uval=%x (%x)\n",
3785 		sval, wval, uval, np->rv_scntl3);
3786 #endif
3787 	/*
3788 	 *  Set the offset.
3789 	 */
3790 	if (!(np->features & FE_C10))
3791 		sval = (sval & ~0x1f) | ofs;
3792 	else
3793 		sval = (sval & ~0x3f) | ofs;
3794 
3795 	/*
3796 	 *  Set the sync divisor and extra clock factor.
3797 	 */
3798 	if (ofs != 0) {
3799 		wval = (wval & ~0x70) | ((div+1) << 4);
3800 		if (!(np->features & FE_C10))
3801 			sval = (sval & ~0xe0) | (fak << 5);
3802 		else {
3803 			uval = uval & ~(XCLKH_ST|XCLKH_DT|XCLKS_ST|XCLKS_DT);
3804 			if (fak >= 1) uval |= (XCLKH_ST|XCLKH_DT);
3805 			if (fak >= 2) uval |= (XCLKS_ST|XCLKS_DT);
3806 		}
3807 	}
3808 
3809 	/*
3810 	 *  Set the bus width.
3811 	 */
3812 	wval = wval & ~EWS;
3813 	if (wide != 0)
3814 		wval |= EWS;
3815 
3816 	/*
3817 	 *  Set misc. ultra enable bits.
3818 	 */
3819 	if (np->features & FE_C10) {
3820 		uval = uval & ~(U3EN|AIPCKEN);
3821 		if (dt)	{
3822 			assert(np->features & FE_U3EN);
3823 			uval |= U3EN;
3824 		}
3825 	}
3826 	else {
3827 		wval = wval & ~ULTRA;
3828 		if (per <= 12)	wval |= ULTRA;
3829 	}
3830 
3831 	/*
3832 	 *   Stop there if sync parameters are unchanged.
3833 	 */
3834 	if (tp->head.sval == sval &&
3835 	    tp->head.wval == wval &&
3836 	    tp->head.uval == uval)
3837 		return;
3838 	tp->head.sval = sval;
3839 	tp->head.wval = wval;
3840 	tp->head.uval = uval;
3841 
3842 	/*
3843 	 *  Disable extended Sreq/Sack filtering if per < 50.
3844 	 *  Not supported on the C1010.
3845 	 */
3846 	if (per < 50 && !(np->features & FE_C10))
3847 		OUTOFFB (nc_stest2, EXT);
3848 
3849 	/*
3850 	 *  set actual value and sync_status
3851 	 */
3852 	OUTB (nc_sxfer,  tp->head.sval);
3853 	OUTB (nc_scntl3, tp->head.wval);
3854 
3855 	if (np->features & FE_C10) {
3856 		OUTB (nc_scntl4, tp->head.uval);
3857 	}
3858 
3859 	/*
3860 	 *  patch ALL busy ccbs of this target.
3861 	 */
3862 	FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
3863 		cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
3864 		if (cp->target != target)
3865 			continue;
3866 		cp->phys.select.sel_scntl3 = tp->head.wval;
3867 		cp->phys.select.sel_sxfer  = tp->head.sval;
3868 		if (np->features & FE_C10) {
3869 			cp->phys.select.sel_scntl4 = tp->head.uval;
3870 		}
3871 	}
3872 }
3873 
3874 /*
3875  *  log message for real hard errors
3876  *
3877  *  sym0 targ 0?: ERROR (ds:si) (so-si-sd) (sxfer/scntl3) @ name (dsp:dbc).
3878  *  	      reg: r0 r1 r2 r3 r4 r5 r6 ..... rf.
3879  *
3880  *  exception register:
3881  *  	ds:	dstat
3882  *  	si:	sist
3883  *
3884  *  SCSI bus lines:
3885  *  	so:	control lines as driven by chip.
3886  *  	si:	control lines as seen by chip.
3887  *  	sd:	scsi data lines as seen by chip.
3888  *
3889  *  wide/fastmode:
3890  *  	sxfer:	(see the manual)
3891  *  	scntl3:	(see the manual)
3892  *
3893  *  current script command:
3894  *  	dsp:	script adress (relative to start of script).
3895  *  	dbc:	first word of script command.
3896  *
3897  *  First 24 register of the chip:
3898  *  	r0..rf
3899  */
3900 static void sym_log_hard_error(hcb_p np, u_short sist, u_char dstat)
3901 {
3902 	u32	dsp;
3903 	int	script_ofs;
3904 	int	script_size;
3905 	char	*script_name;
3906 	u_char	*script_base;
3907 	int	i;
3908 
3909 	dsp	= INL (nc_dsp);
3910 
3911 	if	(dsp > np->scripta_ba &&
3912 		 dsp <= np->scripta_ba + np->scripta_sz) {
3913 		script_ofs	= dsp - np->scripta_ba;
3914 		script_size	= np->scripta_sz;
3915 		script_base	= (u_char *) np->scripta0;
3916 		script_name	= "scripta";
3917 	}
3918 	else if (np->scriptb_ba < dsp &&
3919 		 dsp <= np->scriptb_ba + np->scriptb_sz) {
3920 		script_ofs	= dsp - np->scriptb_ba;
3921 		script_size	= np->scriptb_sz;
3922 		script_base	= (u_char *) np->scriptb0;
3923 		script_name	= "scriptb";
3924 	} else {
3925 		script_ofs	= dsp;
3926 		script_size	= 0;
3927 		script_base	= 0;
3928 		script_name	= "mem";
3929 	}
3930 
3931 	kprintf ("%s:%d: ERROR (%x:%x) (%x-%x-%x) (%x/%x) @ (%s %x:%08x).\n",
3932 		sym_name (np), (unsigned)INB (nc_sdid)&0x0f, dstat, sist,
3933 		(unsigned)INB (nc_socl), (unsigned)INB (nc_sbcl),
3934 		(unsigned)INB (nc_sbdl), (unsigned)INB (nc_sxfer),
3935 		(unsigned)INB (nc_scntl3), script_name, script_ofs,
3936 		(unsigned)INL (nc_dbc));
3937 
3938 	if (((script_ofs & 3) == 0) &&
3939 	    (unsigned)script_ofs < script_size) {
3940 		kprintf ("%s: script cmd = %08x\n", sym_name(np),
3941 			scr_to_cpu((int) *(u32 *)(script_base + script_ofs)));
3942 	}
3943 
3944         kprintf ("%s: regdump:", sym_name(np));
3945         for (i=0; i<24;i++)
3946             kprintf (" %02x", (unsigned)INB_OFF(i));
3947         kprintf (".\n");
3948 
3949 	/*
3950 	 *  PCI BUS error, read the PCI ststus register.
3951 	 */
3952 	if (dstat & (MDPE|BF)) {
3953 		u_short pci_sts;
3954 #ifdef FreeBSD_Bus_Io_Abstraction
3955 		pci_sts = pci_read_config(np->device, PCIR_STATUS, 2);
3956 #else
3957 		pci_sts = pci_cfgread(np->pci_tag, PCIR_STATUS, 2);
3958 #endif
3959 		if (pci_sts & 0xf900) {
3960 #ifdef FreeBSD_Bus_Io_Abstraction
3961 			pci_write_config(np->device, PCIR_STATUS, pci_sts, 2);
3962 #else
3963 			pci_cfgwrite(np->pci_tag, PCIR_STATUS, pci_sts, 2);
3964 #endif
3965 			kprintf("%s: PCI STATUS = 0x%04x\n",
3966 				sym_name(np), pci_sts & 0xf900);
3967 		}
3968 	}
3969 }
3970 
3971 /*
3972  *  chip interrupt handler
3973  *
3974  *  In normal situations, interrupt conditions occur one at
3975  *  a time. But when something bad happens on the SCSI BUS,
3976  *  the chip may raise several interrupt flags before
3977  *  stopping and interrupting the CPU. The additionnal
3978  *  interrupt flags are stacked in some extra registers
3979  *  after the SIP and/or DIP flag has been raised in the
3980  *  ISTAT. After the CPU has read the interrupt condition
3981  *  flag from SIST or DSTAT, the chip unstacks the other
3982  *  interrupt flags and sets the corresponding bits in
3983  *  SIST or DSTAT. Since the chip starts stacking once the
3984  *  SIP or DIP flag is set, there is a small window of time
3985  *  where the stacking does not occur.
3986  *
3987  *  Typically, multiple interrupt conditions may happen in
3988  *  the following situations:
3989  *
3990  *  - SCSI parity error + Phase mismatch  (PAR|MA)
3991  *    When an parity error is detected in input phase
3992  *    and the device switches to msg-in phase inside a
3993  *    block MOV.
3994  *  - SCSI parity error + Unexpected disconnect (PAR|UDC)
3995  *    When a stupid device does not want to handle the
3996  *    recovery of an SCSI parity error.
3997  *  - Some combinations of STO, PAR, UDC, ...
3998  *    When using non compliant SCSI stuff, when user is
3999  *    doing non compliant hot tampering on the BUS, when
4000  *    something really bad happens to a device, etc ...
4001  *
4002  *  The heuristic suggested by SYMBIOS to handle
4003  *  multiple interrupts is to try unstacking all
4004  *  interrupts conditions and to handle them on some
4005  *  priority based on error severity.
4006  *  This will work when the unstacking has been
4007  *  successful, but we cannot be 100 % sure of that,
4008  *  since the CPU may have been faster to unstack than
4009  *  the chip is able to stack. Hmmm ... But it seems that
4010  *  such a situation is very unlikely to happen.
4011  *
4012  *  If this happen, for example STO caught by the CPU
4013  *  then UDC happenning before the CPU have restarted
4014  *  the SCRIPTS, the driver may wrongly complete the
4015  *  same command on UDC, since the SCRIPTS didn't restart
4016  *  and the DSA still points to the same command.
4017  *  We avoid this situation by setting the DSA to an
4018  *  invalid value when the CCB is completed and before
4019  *  restarting the SCRIPTS.
4020  *
4021  *  Another issue is that we need some section of our
4022  *  recovery procedures to be somehow uninterruptible but
4023  *  the SCRIPTS processor does not provides such a
4024  *  feature. For this reason, we handle recovery preferently
4025  *  from the C code and check against some SCRIPTS critical
4026  *  sections from the C code.
4027  *
4028  *  Hopefully, the interrupt handling of the driver is now
4029  *  able to resist to weird BUS error conditions, but donnot
4030  *  ask me for any guarantee that it will never fail. :-)
4031  *  Use at your own decision and risk.
4032  */
4033 
4034 static void sym_intr1 (hcb_p np)
4035 {
4036 	u_char	istat, istatc;
4037 	u_char	dstat;
4038 	u_short	sist;
4039 
4040 	/*
4041 	 *  interrupt on the fly ?
4042 	 *
4043 	 *  A `dummy read' is needed to ensure that the
4044 	 *  clear of the INTF flag reaches the device
4045 	 *  before the scanning of the DONE queue.
4046 	 */
4047 	istat = INB (nc_istat);
4048 	if (istat & INTF) {
4049 		OUTB (nc_istat, (istat & SIGP) | INTF | np->istat_sem);
4050 		istat = INB (nc_istat);		/* DUMMY READ */
4051 		if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("F ");
4052 		(void)sym_wakeup_done (np);
4053 	};
4054 
4055 	if (!(istat & (SIP|DIP)))
4056 		return;
4057 
4058 #if 0	/* We should never get this one */
4059 	if (istat & CABRT)
4060 		OUTB (nc_istat, CABRT);
4061 #endif
4062 
4063 	/*
4064 	 *  PAR and MA interrupts may occur at the same time,
4065 	 *  and we need to know of both in order to handle
4066 	 *  this situation properly. We try to unstack SCSI
4067 	 *  interrupts for that reason. BTW, I dislike a LOT
4068 	 *  such a loop inside the interrupt routine.
4069 	 *  Even if DMA interrupt stacking is very unlikely to
4070 	 *  happen, we also try unstacking these ones, since
4071 	 *  this has no performance impact.
4072 	 */
4073 	sist	= 0;
4074 	dstat	= 0;
4075 	istatc	= istat;
4076 	do {
4077 		if (istatc & SIP)
4078 			sist  |= INW (nc_sist);
4079 		if (istatc & DIP)
4080 			dstat |= INB (nc_dstat);
4081 		istatc = INB (nc_istat);
4082 		istat |= istatc;
4083 	} while (istatc & (SIP|DIP));
4084 
4085 	if (DEBUG_FLAGS & DEBUG_TINY)
4086 		kprintf ("<%d|%x:%x|%x:%x>",
4087 			(int)INB(nc_scr0),
4088 			dstat,sist,
4089 			(unsigned)INL(nc_dsp),
4090 			(unsigned)INL(nc_dbc));
4091 	/*
4092 	 *  On paper, a memory barrier may be needed here.
4093 	 *  And since we are paranoid ... :)
4094 	 */
4095 	MEMORY_BARRIER();
4096 
4097 	/*
4098 	 *  First, interrupts we want to service cleanly.
4099 	 *
4100 	 *  Phase mismatch (MA) is the most frequent interrupt
4101 	 *  for chip earlier than the 896 and so we have to service
4102 	 *  it as quickly as possible.
4103 	 *  A SCSI parity error (PAR) may be combined with a phase
4104 	 *  mismatch condition (MA).
4105 	 *  Programmed interrupts (SIR) are used to call the C code
4106 	 *  from SCRIPTS.
4107 	 *  The single step interrupt (SSI) is not used in this
4108 	 *  driver.
4109 	 */
4110 	if (!(sist  & (STO|GEN|HTH|SGE|UDC|SBMC|RST)) &&
4111 	    !(dstat & (MDPE|BF|ABRT|IID))) {
4112 		if	(sist & PAR)	sym_int_par (np, sist);
4113 		else if (sist & MA)	sym_int_ma (np);
4114 		else if (dstat & SIR)	sym_int_sir (np);
4115 		else if (dstat & SSI)	OUTONB_STD ();
4116 		else			goto unknown_int;
4117 		return;
4118 	};
4119 
4120 	/*
4121 	 *  Now, interrupts that donnot happen in normal
4122 	 *  situations and that we may need to recover from.
4123 	 *
4124 	 *  On SCSI RESET (RST), we reset everything.
4125 	 *  On SCSI BUS MODE CHANGE (SBMC), we complete all
4126 	 *  active CCBs with RESET status, prepare all devices
4127 	 *  for negotiating again and restart the SCRIPTS.
4128 	 *  On STO and UDC, we complete the CCB with the corres-
4129 	 *  ponding status and restart the SCRIPTS.
4130 	 */
4131 	if (sist & RST) {
4132 		xpt_print_path(np->path);
4133 		kprintf("SCSI BUS reset detected.\n");
4134 		sym_init (np, 1);
4135 		return;
4136 	};
4137 
4138 	OUTB (nc_ctest3, np->rv_ctest3 | CLF);	/* clear dma fifo  */
4139 	OUTB (nc_stest3, TE|CSF);		/* clear scsi fifo */
4140 
4141 	if (!(sist  & (GEN|HTH|SGE)) &&
4142 	    !(dstat & (MDPE|BF|ABRT|IID))) {
4143 		if	(sist & SBMC)	sym_int_sbmc (np);
4144 		else if (sist & STO)	sym_int_sto (np);
4145 		else if (sist & UDC)	sym_int_udc (np);
4146 		else			goto unknown_int;
4147 		return;
4148 	};
4149 
4150 	/*
4151 	 *  Now, interrupts we are not able to recover cleanly.
4152 	 *
4153 	 *  Log message for hard errors.
4154 	 *  Reset everything.
4155 	 */
4156 
4157 	sym_log_hard_error(np, sist, dstat);
4158 
4159 	if ((sist & (GEN|HTH|SGE)) ||
4160 		(dstat & (MDPE|BF|ABRT|IID))) {
4161 		sym_start_reset(np);
4162 		return;
4163 	};
4164 
4165 unknown_int:
4166 	/*
4167 	 *  We just miss the cause of the interrupt. :(
4168 	 *  Print a message. The timeout will do the real work.
4169 	 */
4170 	kprintf(	"%s: unknown interrupt(s) ignored, "
4171 		"ISTAT=0x%x DSTAT=0x%x SIST=0x%x\n",
4172 		sym_name(np), istat, dstat, sist);
4173 }
4174 
4175 static void sym_intr(void *arg)
4176 {
4177 	if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("[");
4178 	sym_intr1((hcb_p) arg);
4179 	if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("]");
4180 	return;
4181 }
4182 
4183 static void sym_poll(struct cam_sim *sim)
4184 {
4185 	crit_enter();
4186 	sym_intr(cam_sim_softc(sim));
4187 	crit_exit();
4188 }
4189 
4190 
4191 /*
4192  *  generic recovery from scsi interrupt
4193  *
4194  *  The doc says that when the chip gets an SCSI interrupt,
4195  *  it tries to stop in an orderly fashion, by completing
4196  *  an instruction fetch that had started or by flushing
4197  *  the DMA fifo for a write to memory that was executing.
4198  *  Such a fashion is not enough to know if the instruction
4199  *  that was just before the current DSP value has been
4200  *  executed or not.
4201  *
4202  *  There are some small SCRIPTS sections that deal with
4203  *  the start queue and the done queue that may break any
4204  *  assomption from the C code if we are interrupted
4205  *  inside, so we reset if this happens. Btw, since these
4206  *  SCRIPTS sections are executed while the SCRIPTS hasn't
4207  *  started SCSI operations, it is very unlikely to happen.
4208  *
4209  *  All the driver data structures are supposed to be
4210  *  allocated from the same 4 GB memory window, so there
4211  *  is a 1 to 1 relationship between DSA and driver data
4212  *  structures. Since we are careful :) to invalidate the
4213  *  DSA when we complete a command or when the SCRIPTS
4214  *  pushes a DSA into a queue, we can trust it when it
4215  *  points to a CCB.
4216  */
4217 static void sym_recover_scsi_int (hcb_p np, u_char hsts)
4218 {
4219 	u32	dsp	= INL (nc_dsp);
4220 	u32	dsa	= INL (nc_dsa);
4221 	ccb_p cp	= sym_ccb_from_dsa(np, dsa);
4222 
4223 	/*
4224 	 *  If we haven't been interrupted inside the SCRIPTS
4225 	 *  critical pathes, we can safely restart the SCRIPTS
4226 	 *  and trust the DSA value if it matches a CCB.
4227 	 */
4228 	if ((!(dsp > SCRIPTA_BA (np, getjob_begin) &&
4229 	       dsp < SCRIPTA_BA (np, getjob_end) + 1)) &&
4230 	    (!(dsp > SCRIPTA_BA (np, ungetjob) &&
4231 	       dsp < SCRIPTA_BA (np, reselect) + 1)) &&
4232 	    (!(dsp > SCRIPTB_BA (np, sel_for_abort) &&
4233 	       dsp < SCRIPTB_BA (np, sel_for_abort_1) + 1)) &&
4234 	    (!(dsp > SCRIPTA_BA (np, done) &&
4235 	       dsp < SCRIPTA_BA (np, done_end) + 1))) {
4236 		OUTB (nc_ctest3, np->rv_ctest3 | CLF);	/* clear dma fifo  */
4237 		OUTB (nc_stest3, TE|CSF);		/* clear scsi fifo */
4238 		/*
4239 		 *  If we have a CCB, let the SCRIPTS call us back for
4240 		 *  the handling of the error with SCRATCHA filled with
4241 		 *  STARTPOS. This way, we will be able to freeze the
4242 		 *  device queue and requeue awaiting IOs.
4243 		 */
4244 		if (cp) {
4245 			cp->host_status = hsts;
4246 			OUTL_DSP (SCRIPTA_BA (np, complete_error));
4247 		}
4248 		/*
4249 		 *  Otherwise just restart the SCRIPTS.
4250 		 */
4251 		else {
4252 			OUTL (nc_dsa, 0xffffff);
4253 			OUTL_DSP (SCRIPTA_BA (np, start));
4254 		}
4255 	}
4256 	else
4257 		goto reset_all;
4258 
4259 	return;
4260 
4261 reset_all:
4262 	sym_start_reset(np);
4263 }
4264 
4265 /*
4266  *  chip exception handler for selection timeout
4267  */
4268 void sym_int_sto (hcb_p np)
4269 {
4270 	u32 dsp	= INL (nc_dsp);
4271 
4272 	if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("T");
4273 
4274 	if (dsp == SCRIPTA_BA (np, wf_sel_done) + 8)
4275 		sym_recover_scsi_int(np, HS_SEL_TIMEOUT);
4276 	else
4277 		sym_start_reset(np);
4278 }
4279 
4280 /*
4281  *  chip exception handler for unexpected disconnect
4282  */
4283 void sym_int_udc (hcb_p np)
4284 {
4285 	kprintf ("%s: unexpected disconnect\n", sym_name(np));
4286 	sym_recover_scsi_int(np, HS_UNEXPECTED);
4287 }
4288 
4289 /*
4290  *  chip exception handler for SCSI bus mode change
4291  *
4292  *  spi2-r12 11.2.3 says a transceiver mode change must
4293  *  generate a reset event and a device that detects a reset
4294  *  event shall initiate a hard reset. It says also that a
4295  *  device that detects a mode change shall set data transfer
4296  *  mode to eight bit asynchronous, etc...
4297  *  So, just reinitializing all except chip should be enough.
4298  */
4299 static void sym_int_sbmc (hcb_p np)
4300 {
4301 	u_char scsi_mode = INB (nc_stest4) & SMODE;
4302 
4303 	/*
4304 	 *  Notify user.
4305 	 */
4306 	xpt_print_path(np->path);
4307 	kprintf("SCSI BUS mode change from %s to %s.\n",
4308 		sym_scsi_bus_mode(np->scsi_mode), sym_scsi_bus_mode(scsi_mode));
4309 
4310 	/*
4311 	 *  Should suspend command processing for a few seconds and
4312 	 *  reinitialize all except the chip.
4313 	 */
4314 	sym_init (np, 2);
4315 }
4316 
4317 /*
4318  *  chip exception handler for SCSI parity error.
4319  *
4320  *  When the chip detects a SCSI parity error and is
4321  *  currently executing a (CH)MOV instruction, it does
4322  *  not interrupt immediately, but tries to finish the
4323  *  transfer of the current scatter entry before
4324  *  interrupting. The following situations may occur:
4325  *
4326  *  - The complete scatter entry has been transferred
4327  *    without the device having changed phase.
4328  *    The chip will then interrupt with the DSP pointing
4329  *    to the instruction that follows the MOV.
4330  *
4331  *  - A phase mismatch occurs before the MOV finished
4332  *    and phase errors are to be handled by the C code.
4333  *    The chip will then interrupt with both PAR and MA
4334  *    conditions set.
4335  *
4336  *  - A phase mismatch occurs before the MOV finished and
4337  *    phase errors are to be handled by SCRIPTS.
4338  *    The chip will load the DSP with the phase mismatch
4339  *    JUMP address and interrupt the host processor.
4340  */
4341 static void sym_int_par (hcb_p np, u_short sist)
4342 {
4343 	u_char	hsts	= INB (HS_PRT);
4344 	u32	dsp	= INL (nc_dsp);
4345 	u32	dbc	= INL (nc_dbc);
4346 	u32	dsa	= INL (nc_dsa);
4347 	u_char	sbcl	= INB (nc_sbcl);
4348 	u_char	cmd	= dbc >> 24;
4349 	int phase	= cmd & 7;
4350 	ccb_p	cp	= sym_ccb_from_dsa(np, dsa);
4351 
4352 	kprintf("%s: SCSI parity error detected: SCR1=%d DBC=%x SBCL=%x\n",
4353 		sym_name(np), hsts, dbc, sbcl);
4354 
4355 	/*
4356 	 *  Check that the chip is connected to the SCSI BUS.
4357 	 */
4358 	if (!(INB (nc_scntl1) & ISCON)) {
4359 		sym_recover_scsi_int(np, HS_UNEXPECTED);
4360 		return;
4361 	}
4362 
4363 	/*
4364 	 *  If the nexus is not clearly identified, reset the bus.
4365 	 *  We will try to do better later.
4366 	 */
4367 	if (!cp)
4368 		goto reset_all;
4369 
4370 	/*
4371 	 *  Check instruction was a MOV, direction was INPUT and
4372 	 *  ATN is asserted.
4373 	 */
4374 	if ((cmd & 0xc0) || !(phase & 1) || !(sbcl & 0x8))
4375 		goto reset_all;
4376 
4377 	/*
4378 	 *  Keep track of the parity error.
4379 	 */
4380 	OUTONB (HF_PRT, HF_EXT_ERR);
4381 	cp->xerr_status |= XE_PARITY_ERR;
4382 
4383 	/*
4384 	 *  Prepare the message to send to the device.
4385 	 */
4386 	np->msgout[0] = (phase == 7) ? M_PARITY : M_ID_ERROR;
4387 
4388 	/*
4389 	 *  If the old phase was DATA IN phase, we have to deal with
4390 	 *  the 3 situations described above.
4391 	 *  For other input phases (MSG IN and STATUS), the device
4392 	 *  must resend the whole thing that failed parity checking
4393 	 *  or signal error. So, jumping to dispatcher should be OK.
4394 	 */
4395 	if (phase == 1 || phase == 5) {
4396 		/* Phase mismatch handled by SCRIPTS */
4397 		if (dsp == SCRIPTB_BA (np, pm_handle))
4398 			OUTL_DSP (dsp);
4399 		/* Phase mismatch handled by the C code */
4400 		else if (sist & MA)
4401 			sym_int_ma (np);
4402 		/* No phase mismatch occurred */
4403 		else {
4404 			OUTL (nc_temp, dsp);
4405 			OUTL_DSP (SCRIPTA_BA (np, dispatch));
4406 		}
4407 	}
4408 	else
4409 		OUTL_DSP (SCRIPTA_BA (np, clrack));
4410 	return;
4411 
4412 reset_all:
4413 	sym_start_reset(np);
4414 	return;
4415 }
4416 
4417 /*
4418  *  chip exception handler for phase errors.
4419  *
4420  *  We have to construct a new transfer descriptor,
4421  *  to transfer the rest of the current block.
4422  */
4423 static void sym_int_ma (hcb_p np)
4424 {
4425 	u32	dbc;
4426 	u32	rest;
4427 	u32	dsp;
4428 	u32	dsa;
4429 	u32	nxtdsp;
4430 	u32	*vdsp;
4431 	u32	oadr, olen;
4432 	u32	*tblp;
4433         u32	newcmd;
4434 	u_int	delta;
4435 	u_char	cmd;
4436 	u_char	hflags, hflags0;
4437 	struct	sym_pmc *pm;
4438 	ccb_p	cp;
4439 
4440 	dsp	= INL (nc_dsp);
4441 	dbc	= INL (nc_dbc);
4442 	dsa	= INL (nc_dsa);
4443 
4444 	cmd	= dbc >> 24;
4445 	rest	= dbc & 0xffffff;
4446 	delta	= 0;
4447 
4448 	/*
4449 	 *  locate matching cp if any.
4450 	 */
4451 	cp = sym_ccb_from_dsa(np, dsa);
4452 
4453 	/*
4454 	 *  Donnot take into account dma fifo and various buffers in
4455 	 *  INPUT phase since the chip flushes everything before
4456 	 *  raising the MA interrupt for interrupted INPUT phases.
4457 	 *  For DATA IN phase, we will check for the SWIDE later.
4458 	 */
4459 	if ((cmd & 7) != 1 && (cmd & 7) != 5) {
4460 		u_char ss0, ss2;
4461 
4462 		if (np->features & FE_DFBC)
4463 			delta = INW (nc_dfbc);
4464 		else {
4465 			u32 dfifo;
4466 
4467 			/*
4468 			 * Read DFIFO, CTEST[4-6] using 1 PCI bus ownership.
4469 			 */
4470 			dfifo = INL(nc_dfifo);
4471 
4472 			/*
4473 			 *  Calculate remaining bytes in DMA fifo.
4474 			 *  (CTEST5 = dfifo >> 16)
4475 			 */
4476 			if (dfifo & (DFS << 16))
4477 				delta = ((((dfifo >> 8) & 0x300) |
4478 				          (dfifo & 0xff)) - rest) & 0x3ff;
4479 			else
4480 				delta = ((dfifo & 0xff) - rest) & 0x7f;
4481 		}
4482 
4483 		/*
4484 		 *  The data in the dma fifo has not been transfered to
4485 		 *  the target -> add the amount to the rest
4486 		 *  and clear the data.
4487 		 *  Check the sstat2 register in case of wide transfer.
4488 		 */
4489 		rest += delta;
4490 		ss0  = INB (nc_sstat0);
4491 		if (ss0 & OLF) rest++;
4492 		if (!(np->features & FE_C10))
4493 			if (ss0 & ORF) rest++;
4494 		if (cp && (cp->phys.select.sel_scntl3 & EWS)) {
4495 			ss2 = INB (nc_sstat2);
4496 			if (ss2 & OLF1) rest++;
4497 			if (!(np->features & FE_C10))
4498 				if (ss2 & ORF1) rest++;
4499 		};
4500 
4501 		/*
4502 		 *  Clear fifos.
4503 		 */
4504 		OUTB (nc_ctest3, np->rv_ctest3 | CLF);	/* dma fifo  */
4505 		OUTB (nc_stest3, TE|CSF);		/* scsi fifo */
4506 	}
4507 
4508 	/*
4509 	 *  log the information
4510 	 */
4511 	if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_PHASE))
4512 		kprintf ("P%x%x RL=%d D=%d ", cmd&7, INB(nc_sbcl)&7,
4513 			(unsigned) rest, (unsigned) delta);
4514 
4515 	/*
4516 	 *  try to find the interrupted script command,
4517 	 *  and the address at which to continue.
4518 	 */
4519 	vdsp	= 0;
4520 	nxtdsp	= 0;
4521 	if	(dsp >  np->scripta_ba &&
4522 		 dsp <= np->scripta_ba + np->scripta_sz) {
4523 		vdsp = (u32 *)((char*)np->scripta0 + (dsp-np->scripta_ba-8));
4524 		nxtdsp = dsp;
4525 	}
4526 	else if	(dsp >  np->scriptb_ba &&
4527 		 dsp <= np->scriptb_ba + np->scriptb_sz) {
4528 		vdsp = (u32 *)((char*)np->scriptb0 + (dsp-np->scriptb_ba-8));
4529 		nxtdsp = dsp;
4530 	}
4531 
4532 	/*
4533 	 *  log the information
4534 	 */
4535 	if (DEBUG_FLAGS & DEBUG_PHASE) {
4536 		kprintf ("\nCP=%p DSP=%x NXT=%x VDSP=%p CMD=%x ",
4537 			cp, (unsigned)dsp, (unsigned)nxtdsp, vdsp, cmd);
4538 	};
4539 
4540 	if (!vdsp) {
4541 		kprintf ("%s: interrupted SCRIPT address not found.\n",
4542 			sym_name (np));
4543 		goto reset_all;
4544 	}
4545 
4546 	if (!cp) {
4547 		kprintf ("%s: SCSI phase error fixup: CCB already dequeued.\n",
4548 			sym_name (np));
4549 		goto reset_all;
4550 	}
4551 
4552 	/*
4553 	 *  get old startaddress and old length.
4554 	 */
4555 	oadr = scr_to_cpu(vdsp[1]);
4556 
4557 	if (cmd & 0x10) {	/* Table indirect */
4558 		tblp = (u32 *) ((char*) &cp->phys + oadr);
4559 		olen = scr_to_cpu(tblp[0]);
4560 		oadr = scr_to_cpu(tblp[1]);
4561 	} else {
4562 		tblp = (u32 *) 0;
4563 		olen = scr_to_cpu(vdsp[0]) & 0xffffff;
4564 	};
4565 
4566 	if (DEBUG_FLAGS & DEBUG_PHASE) {
4567 		kprintf ("OCMD=%x\nTBLP=%p OLEN=%x OADR=%x\n",
4568 			(unsigned) (scr_to_cpu(vdsp[0]) >> 24),
4569 			tblp,
4570 			(unsigned) olen,
4571 			(unsigned) oadr);
4572 	};
4573 
4574 	/*
4575 	 *  check cmd against assumed interrupted script command.
4576 	 *  If dt data phase, the MOVE instruction hasn't bit 4 of
4577 	 *  the phase.
4578 	 */
4579 	if (((cmd & 2) ? cmd : (cmd & ~4)) != (scr_to_cpu(vdsp[0]) >> 24)) {
4580 		PRINT_ADDR(cp);
4581 		kprintf ("internal error: cmd=%02x != %02x=(vdsp[0] >> 24)\n",
4582 			(unsigned)cmd, (unsigned)scr_to_cpu(vdsp[0]) >> 24);
4583 
4584 		goto reset_all;
4585 	};
4586 
4587 	/*
4588 	 *  if old phase not dataphase, leave here.
4589 	 */
4590 	if (cmd & 2) {
4591 		PRINT_ADDR(cp);
4592 		kprintf ("phase change %x-%x %d@%08x resid=%d.\n",
4593 			cmd&7, INB(nc_sbcl)&7, (unsigned)olen,
4594 			(unsigned)oadr, (unsigned)rest);
4595 		goto unexpected_phase;
4596 	};
4597 
4598 	/*
4599 	 *  Choose the correct PM save area.
4600 	 *
4601 	 *  Look at the PM_SAVE SCRIPT if you want to understand
4602 	 *  this stuff. The equivalent code is implemented in
4603 	 *  SCRIPTS for the 895A, 896 and 1010 that are able to
4604 	 *  handle PM from the SCRIPTS processor.
4605 	 */
4606 	hflags0 = INB (HF_PRT);
4607 	hflags = hflags0;
4608 
4609 	if (hflags & (HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED)) {
4610 		if (hflags & HF_IN_PM0)
4611 			nxtdsp = scr_to_cpu(cp->phys.pm0.ret);
4612 		else if	(hflags & HF_IN_PM1)
4613 			nxtdsp = scr_to_cpu(cp->phys.pm1.ret);
4614 
4615 		if (hflags & HF_DP_SAVED)
4616 			hflags ^= HF_ACT_PM;
4617 	}
4618 
4619 	if (!(hflags & HF_ACT_PM)) {
4620 		pm = &cp->phys.pm0;
4621 		newcmd = SCRIPTA_BA (np, pm0_data);
4622 	}
4623 	else {
4624 		pm = &cp->phys.pm1;
4625 		newcmd = SCRIPTA_BA (np, pm1_data);
4626 	}
4627 
4628 	hflags &= ~(HF_IN_PM0 | HF_IN_PM1 | HF_DP_SAVED);
4629 	if (hflags != hflags0)
4630 		OUTB (HF_PRT, hflags);
4631 
4632 	/*
4633 	 *  fillin the phase mismatch context
4634 	 */
4635 	pm->sg.addr = cpu_to_scr(oadr + olen - rest);
4636 	pm->sg.size = cpu_to_scr(rest);
4637 	pm->ret     = cpu_to_scr(nxtdsp);
4638 
4639 	/*
4640 	 *  If we have a SWIDE,
4641 	 *  - prepare the address to write the SWIDE from SCRIPTS,
4642 	 *  - compute the SCRIPTS address to restart from,
4643 	 *  - move current data pointer context by one byte.
4644 	 */
4645 	nxtdsp = SCRIPTA_BA (np, dispatch);
4646 	if ((cmd & 7) == 1 && cp && (cp->phys.select.sel_scntl3 & EWS) &&
4647 	    (INB (nc_scntl2) & WSR)) {
4648 		u32 tmp;
4649 
4650 		/*
4651 		 *  Set up the table indirect for the MOVE
4652 		 *  of the residual byte and adjust the data
4653 		 *  pointer context.
4654 		 */
4655 		tmp = scr_to_cpu(pm->sg.addr);
4656 		cp->phys.wresid.addr = cpu_to_scr(tmp);
4657 		pm->sg.addr = cpu_to_scr(tmp + 1);
4658 		tmp = scr_to_cpu(pm->sg.size);
4659 		cp->phys.wresid.size = cpu_to_scr((tmp&0xff000000) | 1);
4660 		pm->sg.size = cpu_to_scr(tmp - 1);
4661 
4662 		/*
4663 		 *  If only the residual byte is to be moved,
4664 		 *  no PM context is needed.
4665 		 */
4666 		if ((tmp&0xffffff) == 1)
4667 			newcmd = pm->ret;
4668 
4669 		/*
4670 		 *  Prepare the address of SCRIPTS that will
4671 		 *  move the residual byte to memory.
4672 		 */
4673 		nxtdsp = SCRIPTB_BA (np, wsr_ma_helper);
4674 	}
4675 
4676 	if (DEBUG_FLAGS & DEBUG_PHASE) {
4677 		PRINT_ADDR(cp);
4678 		kprintf ("PM %x %x %x / %x %x %x.\n",
4679 			hflags0, hflags, newcmd,
4680 			(unsigned)scr_to_cpu(pm->sg.addr),
4681 			(unsigned)scr_to_cpu(pm->sg.size),
4682 			(unsigned)scr_to_cpu(pm->ret));
4683 	}
4684 
4685 	/*
4686 	 *  Restart the SCRIPTS processor.
4687 	 */
4688 	OUTL (nc_temp, newcmd);
4689 	OUTL_DSP (nxtdsp);
4690 	return;
4691 
4692 	/*
4693 	 *  Unexpected phase changes that occurs when the current phase
4694 	 *  is not a DATA IN or DATA OUT phase are due to error conditions.
4695 	 *  Such event may only happen when the SCRIPTS is using a
4696 	 *  multibyte SCSI MOVE.
4697 	 *
4698 	 *  Phase change		Some possible cause
4699 	 *
4700 	 *  COMMAND  --> MSG IN	SCSI parity error detected by target.
4701 	 *  COMMAND  --> STATUS	Bad command or refused by target.
4702 	 *  MSG OUT  --> MSG IN     Message rejected by target.
4703 	 *  MSG OUT  --> COMMAND    Bogus target that discards extended
4704 	 *  			negotiation messages.
4705 	 *
4706 	 *  The code below does not care of the new phase and so
4707 	 *  trusts the target. Why to annoy it ?
4708 	 *  If the interrupted phase is COMMAND phase, we restart at
4709 	 *  dispatcher.
4710 	 *  If a target does not get all the messages after selection,
4711 	 *  the code assumes blindly that the target discards extended
4712 	 *  messages and clears the negotiation status.
4713 	 *  If the target does not want all our response to negotiation,
4714 	 *  we force a SIR_NEGO_PROTO interrupt (it is a hack that avoids
4715 	 *  bloat for such a should_not_happen situation).
4716 	 *  In all other situation, we reset the BUS.
4717 	 *  Are these assumptions reasonnable ? (Wait and see ...)
4718 	 */
4719 unexpected_phase:
4720 	dsp -= 8;
4721 	nxtdsp = 0;
4722 
4723 	switch (cmd & 7) {
4724 	case 2:	/* COMMAND phase */
4725 		nxtdsp = SCRIPTA_BA (np, dispatch);
4726 		break;
4727 #if 0
4728 	case 3:	/* STATUS  phase */
4729 		nxtdsp = SCRIPTA_BA (np, dispatch);
4730 		break;
4731 #endif
4732 	case 6:	/* MSG OUT phase */
4733 		/*
4734 		 *  If the device may want to use untagged when we want
4735 		 *  tagged, we prepare an IDENTIFY without disc. granted,
4736 		 *  since we will not be able to handle reselect.
4737 		 *  Otherwise, we just don't care.
4738 		 */
4739 		if	(dsp == SCRIPTA_BA (np, send_ident)) {
4740 			if (cp->tag != NO_TAG && olen - rest <= 3) {
4741 				cp->host_status = HS_BUSY;
4742 				np->msgout[0] = M_IDENTIFY | cp->lun;
4743 				nxtdsp = SCRIPTB_BA (np, ident_break_atn);
4744 			}
4745 			else
4746 				nxtdsp = SCRIPTB_BA (np, ident_break);
4747 		}
4748 		else if	(dsp == SCRIPTB_BA (np, send_wdtr) ||
4749 			 dsp == SCRIPTB_BA (np, send_sdtr) ||
4750 			 dsp == SCRIPTB_BA (np, send_ppr)) {
4751 			nxtdsp = SCRIPTB_BA (np, nego_bad_phase);
4752 		}
4753 		break;
4754 #if 0
4755 	case 7:	/* MSG IN  phase */
4756 		nxtdsp = SCRIPTA_BA (np, clrack);
4757 		break;
4758 #endif
4759 	}
4760 
4761 	if (nxtdsp) {
4762 		OUTL_DSP (nxtdsp);
4763 		return;
4764 	}
4765 
4766 reset_all:
4767 	sym_start_reset(np);
4768 }
4769 
4770 /*
4771  *  Dequeue from the START queue all CCBs that match
4772  *  a given target/lun/task condition (-1 means all),
4773  *  and move them from the BUSY queue to the COMP queue
4774  *  with CAM_REQUEUE_REQ status condition.
4775  *  This function is used during error handling/recovery.
4776  *  It is called with SCRIPTS not running.
4777  */
4778 static int
4779 sym_dequeue_from_squeue(hcb_p np, int i, int target, int lun, int task)
4780 {
4781 	int j;
4782 	ccb_p cp;
4783 
4784 	/*
4785 	 *  Make sure the starting index is within range.
4786 	 */
4787 	assert((i >= 0) && (i < 2*MAX_QUEUE));
4788 
4789 	/*
4790 	 *  Walk until end of START queue and dequeue every job
4791 	 *  that matches the target/lun/task condition.
4792 	 */
4793 	j = i;
4794 	while (i != np->squeueput) {
4795 		cp = sym_ccb_from_dsa(np, scr_to_cpu(np->squeue[i]));
4796 		assert(cp);
4797 #ifdef SYM_CONF_IARB_SUPPORT
4798 		/* Forget hints for IARB, they may be no longer relevant */
4799 		cp->host_flags &= ~HF_HINT_IARB;
4800 #endif
4801 		if ((target == -1 || cp->target == target) &&
4802 		    (lun    == -1 || cp->lun    == lun)    &&
4803 		    (task   == -1 || cp->tag    == task)) {
4804 			sym_set_cam_status(cp->cam_ccb, CAM_REQUEUE_REQ);
4805 			sym_remque(&cp->link_ccbq);
4806 			sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
4807 		}
4808 		else {
4809 			if (i != j)
4810 				np->squeue[j] = np->squeue[i];
4811 			if ((j += 2) >= MAX_QUEUE*2) j = 0;
4812 		}
4813 		if ((i += 2) >= MAX_QUEUE*2) i = 0;
4814 	}
4815 	if (i != j)		/* Copy back the idle task if needed */
4816 		np->squeue[j] = np->squeue[i];
4817 	np->squeueput = j;	/* Update our current start queue pointer */
4818 
4819 	return (i - j) / 2;
4820 }
4821 
4822 /*
4823  *  Complete all CCBs queued to the COMP queue.
4824  *
4825  *  These CCBs are assumed:
4826  *  - Not to be referenced either by devices or
4827  *    SCRIPTS-related queues and datas.
4828  *  - To have to be completed with an error condition
4829  *    or requeued.
4830  *
4831  *  The device queue freeze count is incremented
4832  *  for each CCB that does not prevent this.
4833  *  This function is called when all CCBs involved
4834  *  in error handling/recovery have been reaped.
4835  */
4836 static void
4837 sym_flush_comp_queue(hcb_p np, int cam_status)
4838 {
4839 	SYM_QUEHEAD *qp;
4840 	ccb_p cp;
4841 
4842 	while ((qp = sym_remque_head(&np->comp_ccbq)) != 0) {
4843 		union ccb *ccb;
4844 		cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
4845 		sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
4846 		/* Leave quiet CCBs waiting for resources */
4847 		if (cp->host_status == HS_WAIT)
4848 			continue;
4849 		ccb = cp->cam_ccb;
4850 		if (cam_status)
4851 			sym_set_cam_status(ccb, cam_status);
4852 		sym_free_ccb(np, cp);
4853 		sym_freeze_cam_ccb(ccb);
4854 		sym_xpt_done(np, ccb);
4855 	}
4856 }
4857 
4858 /*
4859  *  chip handler for bad SCSI status condition
4860  *
4861  *  In case of bad SCSI status, we unqueue all the tasks
4862  *  currently queued to the controller but not yet started
4863  *  and then restart the SCRIPTS processor immediately.
4864  *
4865  *  QUEUE FULL and BUSY conditions are handled the same way.
4866  *  Basically all the not yet started tasks are requeued in
4867  *  device queue and the queue is frozen until a completion.
4868  *
4869  *  For CHECK CONDITION and COMMAND TERMINATED status, we use
4870  *  the CCB of the failed command to prepare a REQUEST SENSE
4871  *  SCSI command and queue it to the controller queue.
4872  *
4873  *  SCRATCHA is assumed to have been loaded with STARTPOS
4874  *  before the SCRIPTS called the C code.
4875  */
4876 static void sym_sir_bad_scsi_status(hcb_p np, int num, ccb_p cp)
4877 {
4878 	tcb_p tp	= &np->target[cp->target];
4879 	u32		startp;
4880 	u_char		s_status = cp->ssss_status;
4881 	u_char		h_flags  = cp->host_flags;
4882 	int		msglen;
4883 	int		nego;
4884 	int		i;
4885 
4886 	/*
4887 	 *  Compute the index of the next job to start from SCRIPTS.
4888 	 */
4889 	i = (INL (nc_scratcha) - np->squeue_ba) / 4;
4890 
4891 	/*
4892 	 *  The last CCB queued used for IARB hint may be
4893 	 *  no longer relevant. Forget it.
4894 	 */
4895 #ifdef SYM_CONF_IARB_SUPPORT
4896 	if (np->last_cp)
4897 		np->last_cp = 0;
4898 #endif
4899 
4900 	/*
4901 	 *  Now deal with the SCSI status.
4902 	 */
4903 	switch(s_status) {
4904 	case S_BUSY:
4905 	case S_QUEUE_FULL:
4906 		if (sym_verbose >= 2) {
4907 			PRINT_ADDR(cp);
4908 			kprintf (s_status == S_BUSY ? "BUSY" : "QUEUE FULL\n");
4909 		}
4910 	default:	/* S_INT, S_INT_COND_MET, S_CONFLICT */
4911 		sym_complete_error (np, cp);
4912 		break;
4913 	case S_TERMINATED:
4914 	case S_CHECK_COND:
4915 		/*
4916 		 *  If we get an SCSI error when requesting sense, give up.
4917 		 */
4918 		if (h_flags & HF_SENSE) {
4919 			sym_complete_error (np, cp);
4920 			break;
4921 		}
4922 
4923 		/*
4924 		 *  Dequeue all queued CCBs for that device not yet started,
4925 		 *  and restart the SCRIPTS processor immediately.
4926 		 */
4927 		(void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
4928 		OUTL_DSP (SCRIPTA_BA (np, start));
4929 
4930  		/*
4931 		 *  Save some info of the actual IO.
4932 		 *  Compute the data residual.
4933 		 */
4934 		cp->sv_scsi_status = cp->ssss_status;
4935 		cp->sv_xerr_status = cp->xerr_status;
4936 		cp->sv_resid = sym_compute_residual(np, cp);
4937 
4938 		/*
4939 		 *  Prepare all needed data structures for
4940 		 *  requesting sense data.
4941 		 */
4942 
4943 		/*
4944 		 *  identify message
4945 		 */
4946 		cp->scsi_smsg2[0] = M_IDENTIFY | cp->lun;
4947 		msglen = 1;
4948 
4949 		/*
4950 		 *  If we are currently using anything different from
4951 		 *  async. 8 bit data transfers with that target,
4952 		 *  start a negotiation, since the device may want
4953 		 *  to report us a UNIT ATTENTION condition due to
4954 		 *  a cause we currently ignore, and we donnot want
4955 		 *  to be stuck with WIDE and/or SYNC data transfer.
4956 		 *
4957 		 *  cp->nego_status is filled by sym_prepare_nego().
4958 		 */
4959 		cp->nego_status = 0;
4960 		nego = 0;
4961 		if	(tp->tinfo.current.options & PPR_OPT_MASK)
4962 			nego = NS_PPR;
4963 		else if	(tp->tinfo.current.width != BUS_8_BIT)
4964 			nego = NS_WIDE;
4965 		else if (tp->tinfo.current.offset != 0)
4966 			nego = NS_SYNC;
4967 		if (nego)
4968 			msglen +=
4969 			sym_prepare_nego (np,cp, nego, &cp->scsi_smsg2[msglen]);
4970 		/*
4971 		 *  Message table indirect structure.
4972 		 */
4973 		cp->phys.smsg.addr	= cpu_to_scr(CCB_BA (cp, scsi_smsg2));
4974 		cp->phys.smsg.size	= cpu_to_scr(msglen);
4975 
4976 		/*
4977 		 *  sense command
4978 		 */
4979 		cp->phys.cmd.addr	= cpu_to_scr(CCB_BA (cp, sensecmd));
4980 		cp->phys.cmd.size	= cpu_to_scr(6);
4981 
4982 		/*
4983 		 *  patch requested size into sense command
4984 		 */
4985 		cp->sensecmd[0]		= 0x03;
4986 		cp->sensecmd[1]		= cp->lun << 5;
4987 #ifdef	FreeBSD_New_Tran_Settings
4988 		if (tp->tinfo.current.scsi_version > 2 || cp->lun > 7)
4989 			cp->sensecmd[1]	= 0;
4990 #endif
4991 		cp->sensecmd[4]		= SYM_SNS_BBUF_LEN;
4992 		cp->data_len		= SYM_SNS_BBUF_LEN;
4993 
4994 		/*
4995 		 *  sense data
4996 		 */
4997 		bzero(cp->sns_bbuf, SYM_SNS_BBUF_LEN);
4998 		cp->phys.sense.addr	= cpu_to_scr(vtobus(cp->sns_bbuf));
4999 		cp->phys.sense.size	= cpu_to_scr(SYM_SNS_BBUF_LEN);
5000 
5001 		/*
5002 		 *  requeue the command.
5003 		 */
5004 		startp = SCRIPTB_BA (np, sdata_in);
5005 
5006 		cp->phys.head.savep	= cpu_to_scr(startp);
5007 		cp->phys.head.goalp	= cpu_to_scr(startp + 16);
5008 		cp->phys.head.lastp	= cpu_to_scr(startp);
5009 		cp->startp	= cpu_to_scr(startp);
5010 
5011 		cp->actualquirks = SYM_QUIRK_AUTOSAVE;
5012 		cp->host_status	= cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
5013 		cp->ssss_status = S_ILLEGAL;
5014 		cp->host_flags	= (HF_SENSE|HF_DATA_IN);
5015 		cp->xerr_status = 0;
5016 		cp->extra_bytes = 0;
5017 
5018 		cp->phys.head.go.start = cpu_to_scr(SCRIPTA_BA (np, select));
5019 
5020 		/*
5021 		 *  Requeue the command.
5022 		 */
5023 		sym_put_start_queue(np, cp);
5024 
5025 		/*
5026 		 *  Give back to upper layer everything we have dequeued.
5027 		 */
5028 		sym_flush_comp_queue(np, 0);
5029 		break;
5030 	}
5031 }
5032 
5033 /*
5034  *  After a device has accepted some management message
5035  *  as BUS DEVICE RESET, ABORT TASK, etc ..., or when
5036  *  a device signals a UNIT ATTENTION condition, some
5037  *  tasks are thrown away by the device. We are required
5038  *  to reflect that on our tasks list since the device
5039  *  will never complete these tasks.
5040  *
5041  *  This function move from the BUSY queue to the COMP
5042  *  queue all disconnected CCBs for a given target that
5043  *  match the following criteria:
5044  *  - lun=-1  means any logical UNIT otherwise a given one.
5045  *  - task=-1 means any task, otherwise a given one.
5046  */
5047 static int
5048 sym_clear_tasks(hcb_p np, int cam_status, int target, int lun, int task)
5049 {
5050 	SYM_QUEHEAD qtmp, *qp;
5051 	int i = 0;
5052 	ccb_p cp;
5053 
5054 	/*
5055 	 *  Move the entire BUSY queue to our temporary queue.
5056 	 */
5057 	sym_que_init(&qtmp);
5058 	sym_que_splice(&np->busy_ccbq, &qtmp);
5059 	sym_que_init(&np->busy_ccbq);
5060 
5061 	/*
5062 	 *  Put all CCBs that matches our criteria into
5063 	 *  the COMP queue and put back other ones into
5064 	 *  the BUSY queue.
5065 	 */
5066 	while ((qp = sym_remque_head(&qtmp)) != 0) {
5067 		union ccb *ccb;
5068 		cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5069 		ccb = cp->cam_ccb;
5070 		if (cp->host_status != HS_DISCONNECT ||
5071 		    cp->target != target	     ||
5072 		    (lun  != -1 && cp->lun != lun)   ||
5073 		    (task != -1 &&
5074 			(cp->tag != NO_TAG && cp->scsi_smsg[2] != task))) {
5075 			sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
5076 			continue;
5077 		}
5078 		sym_insque_tail(&cp->link_ccbq, &np->comp_ccbq);
5079 
5080 		/* Preserve the software timeout condition */
5081 		if (sym_get_cam_status(ccb) != CAM_CMD_TIMEOUT)
5082 			sym_set_cam_status(ccb, cam_status);
5083 		++i;
5084 #if 0
5085 kprintf("XXXX TASK @%p CLEARED\n", cp);
5086 #endif
5087 	}
5088 	return i;
5089 }
5090 
5091 /*
5092  *  chip handler for TASKS recovery
5093  *
5094  *  We cannot safely abort a command, while the SCRIPTS
5095  *  processor is running, since we just would be in race
5096  *  with it.
5097  *
5098  *  As long as we have tasks to abort, we keep the SEM
5099  *  bit set in the ISTAT. When this bit is set, the
5100  *  SCRIPTS processor interrupts (SIR_SCRIPT_STOPPED)
5101  *  each time it enters the scheduler.
5102  *
5103  *  If we have to reset a target, clear tasks of a unit,
5104  *  or to perform the abort of a disconnected job, we
5105  *  restart the SCRIPTS for selecting the target. Once
5106  *  selected, the SCRIPTS interrupts (SIR_TARGET_SELECTED).
5107  *  If it loses arbitration, the SCRIPTS will interrupt again
5108  *  the next time it will enter its scheduler, and so on ...
5109  *
5110  *  On SIR_TARGET_SELECTED, we scan for the more
5111  *  appropriate thing to do:
5112  *
5113  *  - If nothing, we just sent a M_ABORT message to the
5114  *    target to get rid of the useless SCSI bus ownership.
5115  *    According to the specs, no tasks shall be affected.
5116  *  - If the target is to be reset, we send it a M_RESET
5117  *    message.
5118  *  - If a logical UNIT is to be cleared , we send the
5119  *    IDENTIFY(lun) + M_ABORT.
5120  *  - If an untagged task is to be aborted, we send the
5121  *    IDENTIFY(lun) + M_ABORT.
5122  *  - If a tagged task is to be aborted, we send the
5123  *    IDENTIFY(lun) + task attributes + M_ABORT_TAG.
5124  *
5125  *  Once our 'kiss of death' :) message has been accepted
5126  *  by the target, the SCRIPTS interrupts again
5127  *  (SIR_ABORT_SENT). On this interrupt, we complete
5128  *  all the CCBs that should have been aborted by the
5129  *  target according to our message.
5130  */
5131 static void sym_sir_task_recovery(hcb_p np, int num)
5132 {
5133 	SYM_QUEHEAD *qp;
5134 	ccb_p cp;
5135 	tcb_p tp;
5136 	int target=-1, lun=-1, task;
5137 	int i, k;
5138 
5139 	switch(num) {
5140 	/*
5141 	 *  The SCRIPTS processor stopped before starting
5142 	 *  the next command in order to allow us to perform
5143 	 *  some task recovery.
5144 	 */
5145 	case SIR_SCRIPT_STOPPED:
5146 		/*
5147 		 *  Do we have any target to reset or unit to clear ?
5148 		 */
5149 		for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
5150 			tp = &np->target[i];
5151 			if (tp->to_reset ||
5152 			    (tp->lun0p && tp->lun0p->to_clear)) {
5153 				target = i;
5154 				break;
5155 			}
5156 			if (!tp->lunmp)
5157 				continue;
5158 			for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5159 				if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5160 					target	= i;
5161 					break;
5162 				}
5163 			}
5164 			if (target != -1)
5165 				break;
5166 		}
5167 
5168 		/*
5169 		 *  If not, walk the busy queue for any
5170 		 *  disconnected CCB to be aborted.
5171 		 */
5172 		if (target == -1) {
5173 			FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5174 				cp = sym_que_entry(qp,struct sym_ccb,link_ccbq);
5175 				if (cp->host_status != HS_DISCONNECT)
5176 					continue;
5177 				if (cp->to_abort) {
5178 					target = cp->target;
5179 					break;
5180 				}
5181 			}
5182 		}
5183 
5184 		/*
5185 		 *  If some target is to be selected,
5186 		 *  prepare and start the selection.
5187 		 */
5188 		if (target != -1) {
5189 			tp = &np->target[target];
5190 			np->abrt_sel.sel_id	= target;
5191 			np->abrt_sel.sel_scntl3 = tp->head.wval;
5192 			np->abrt_sel.sel_sxfer  = tp->head.sval;
5193 			OUTL(nc_dsa, np->hcb_ba);
5194 			OUTL_DSP (SCRIPTB_BA (np, sel_for_abort));
5195 			return;
5196 		}
5197 
5198 		/*
5199 		 *  Now look for a CCB to abort that haven't started yet.
5200 		 *  Btw, the SCRIPTS processor is still stopped, so
5201 		 *  we are not in race.
5202 		 */
5203 		i = 0;
5204 		cp = 0;
5205 		FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5206 			cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5207 			if (cp->host_status != HS_BUSY &&
5208 			    cp->host_status != HS_NEGOTIATE)
5209 				continue;
5210 			if (!cp->to_abort)
5211 				continue;
5212 #ifdef SYM_CONF_IARB_SUPPORT
5213 			/*
5214 			 *    If we are using IMMEDIATE ARBITRATION, we donnot
5215 			 *    want to cancel the last queued CCB, since the
5216 			 *    SCRIPTS may have anticipated the selection.
5217 			 */
5218 			if (cp == np->last_cp) {
5219 				cp->to_abort = 0;
5220 				continue;
5221 			}
5222 #endif
5223 			i = 1;	/* Means we have found some */
5224 			break;
5225 		}
5226 		if (!i) {
5227 			/*
5228 			 *  We are done, so we donnot need
5229 			 *  to synchronize with the SCRIPTS anylonger.
5230 			 *  Remove the SEM flag from the ISTAT.
5231 			 */
5232 			np->istat_sem = 0;
5233 			OUTB (nc_istat, SIGP);
5234 			break;
5235 		}
5236 		/*
5237 		 *  Compute index of next position in the start
5238 		 *  queue the SCRIPTS intends to start and dequeue
5239 		 *  all CCBs for that device that haven't been started.
5240 		 */
5241 		i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5242 		i = sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
5243 
5244 		/*
5245 		 *  Make sure at least our IO to abort has been dequeued.
5246 		 */
5247 		assert(i && sym_get_cam_status(cp->cam_ccb) == CAM_REQUEUE_REQ);
5248 
5249 		/*
5250 		 *  Keep track in cam status of the reason of the abort.
5251 		 */
5252 		if (cp->to_abort == 2)
5253 			sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5254 		else
5255 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
5256 
5257 		/*
5258 		 *  Complete with error everything that we have dequeued.
5259 	 	 */
5260 		sym_flush_comp_queue(np, 0);
5261 		break;
5262 	/*
5263 	 *  The SCRIPTS processor has selected a target
5264 	 *  we may have some manual recovery to perform for.
5265 	 */
5266 	case SIR_TARGET_SELECTED:
5267 		target = (INB (nc_sdid) & 0xf);
5268 		tp = &np->target[target];
5269 
5270 		np->abrt_tbl.addr = cpu_to_scr(vtobus(np->abrt_msg));
5271 
5272 		/*
5273 		 *  If the target is to be reset, prepare a
5274 		 *  M_RESET message and clear the to_reset flag
5275 		 *  since we donnot expect this operation to fail.
5276 		 */
5277 		if (tp->to_reset) {
5278 			np->abrt_msg[0] = M_RESET;
5279 			np->abrt_tbl.size = 1;
5280 			tp->to_reset = 0;
5281 			break;
5282 		}
5283 
5284 		/*
5285 		 *  Otherwise, look for some logical unit to be cleared.
5286 		 */
5287 		if (tp->lun0p && tp->lun0p->to_clear)
5288 			lun = 0;
5289 		else if (tp->lunmp) {
5290 			for (k = 1 ; k < SYM_CONF_MAX_LUN ; k++) {
5291 				if (tp->lunmp[k] && tp->lunmp[k]->to_clear) {
5292 					lun = k;
5293 					break;
5294 				}
5295 			}
5296 		}
5297 
5298 		/*
5299 		 *  If a logical unit is to be cleared, prepare
5300 		 *  an IDENTIFY(lun) + ABORT MESSAGE.
5301 		 */
5302 		if (lun != -1) {
5303 			lcb_p lp = sym_lp(np, tp, lun);
5304 			lp->to_clear = 0; /* We donnot expect to fail here */
5305 			np->abrt_msg[0] = M_IDENTIFY | lun;
5306 			np->abrt_msg[1] = M_ABORT;
5307 			np->abrt_tbl.size = 2;
5308 			break;
5309 		}
5310 
5311 		/*
5312 		 *  Otherwise, look for some disconnected job to
5313 		 *  abort for this target.
5314 		 */
5315 		i = 0;
5316 		cp = 0;
5317 		FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
5318 			cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
5319 			if (cp->host_status != HS_DISCONNECT)
5320 				continue;
5321 			if (cp->target != target)
5322 				continue;
5323 			if (!cp->to_abort)
5324 				continue;
5325 			i = 1;	/* Means we have some */
5326 			break;
5327 		}
5328 
5329 		/*
5330 		 *  If we have none, probably since the device has
5331 		 *  completed the command before we won abitration,
5332 		 *  send a M_ABORT message without IDENTIFY.
5333 		 *  According to the specs, the device must just
5334 		 *  disconnect the BUS and not abort any task.
5335 		 */
5336 		if (!i) {
5337 			np->abrt_msg[0] = M_ABORT;
5338 			np->abrt_tbl.size = 1;
5339 			break;
5340 		}
5341 
5342 		/*
5343 		 *  We have some task to abort.
5344 		 *  Set the IDENTIFY(lun)
5345 		 */
5346 		np->abrt_msg[0] = M_IDENTIFY | cp->lun;
5347 
5348 		/*
5349 		 *  If we want to abort an untagged command, we
5350 		 *  will send a IDENTIFY + M_ABORT.
5351 		 *  Otherwise (tagged command), we will send
5352 		 *  a IDENTITFY + task attributes + ABORT TAG.
5353 		 */
5354 		if (cp->tag == NO_TAG) {
5355 			np->abrt_msg[1] = M_ABORT;
5356 			np->abrt_tbl.size = 2;
5357 		}
5358 		else {
5359 			np->abrt_msg[1] = cp->scsi_smsg[1];
5360 			np->abrt_msg[2] = cp->scsi_smsg[2];
5361 			np->abrt_msg[3] = M_ABORT_TAG;
5362 			np->abrt_tbl.size = 4;
5363 		}
5364 		/*
5365 		 *  Keep track of software timeout condition, since the
5366 		 *  peripheral driver may not count retries on abort
5367 		 *  conditions not due to timeout.
5368 		 */
5369 		if (cp->to_abort == 2)
5370 			sym_set_cam_status(cp->cam_ccb, CAM_CMD_TIMEOUT);
5371 		cp->to_abort = 0; /* We donnot expect to fail here */
5372 		break;
5373 
5374 	/*
5375 	 *  The target has accepted our message and switched
5376 	 *  to BUS FREE phase as we expected.
5377 	 */
5378 	case SIR_ABORT_SENT:
5379 		target = (INB (nc_sdid) & 0xf);
5380 		tp = &np->target[target];
5381 
5382 		/*
5383 		**  If we didn't abort anything, leave here.
5384 		*/
5385 		if (np->abrt_msg[0] == M_ABORT)
5386 			break;
5387 
5388 		/*
5389 		 *  If we sent a M_RESET, then a hardware reset has
5390 		 *  been performed by the target.
5391 		 *  - Reset everything to async 8 bit
5392 		 *  - Tell ourself to negotiate next time :-)
5393 		 *  - Prepare to clear all disconnected CCBs for
5394 		 *    this target from our task list (lun=task=-1)
5395 		 */
5396 		lun = -1;
5397 		task = -1;
5398 		if (np->abrt_msg[0] == M_RESET) {
5399 			tp->head.sval = 0;
5400 			tp->head.wval = np->rv_scntl3;
5401 			tp->head.uval = 0;
5402 			tp->tinfo.current.period = 0;
5403 			tp->tinfo.current.offset = 0;
5404 			tp->tinfo.current.width  = BUS_8_BIT;
5405 			tp->tinfo.current.options = 0;
5406 		}
5407 
5408 		/*
5409 		 *  Otherwise, check for the LUN and TASK(s)
5410 		 *  concerned by the cancelation.
5411 		 *  If it is not ABORT_TAG then it is CLEAR_QUEUE
5412 		 *  or an ABORT message :-)
5413 		 */
5414 		else {
5415 			lun = np->abrt_msg[0] & 0x3f;
5416 			if (np->abrt_msg[1] == M_ABORT_TAG)
5417 				task = np->abrt_msg[2];
5418 		}
5419 
5420 		/*
5421 		 *  Complete all the CCBs the device should have
5422 		 *  aborted due to our 'kiss of death' message.
5423 		 */
5424 		i = (INL (nc_scratcha) - np->squeue_ba) / 4;
5425 		(void) sym_dequeue_from_squeue(np, i, target, lun, -1);
5426 		(void) sym_clear_tasks(np, CAM_REQ_ABORTED, target, lun, task);
5427 		sym_flush_comp_queue(np, 0);
5428 
5429 		/*
5430 		 *  If we sent a BDR, make uper layer aware of that.
5431 		 */
5432 		if (np->abrt_msg[0] == M_RESET)
5433 			xpt_async(AC_SENT_BDR, np->path, NULL);
5434 		break;
5435 	}
5436 
5437 	/*
5438 	 *  Print to the log the message we intend to send.
5439 	 */
5440 	if (num == SIR_TARGET_SELECTED) {
5441 		PRINT_TARGET(np, target);
5442 		sym_printl_hex("control msgout:", np->abrt_msg,
5443 			      np->abrt_tbl.size);
5444 		np->abrt_tbl.size = cpu_to_scr(np->abrt_tbl.size);
5445 	}
5446 
5447 	/*
5448 	 *  Let the SCRIPTS processor continue.
5449 	 */
5450 	OUTONB_STD ();
5451 }
5452 
5453 /*
5454  *  Gerard's alchemy:) that deals with with the data
5455  *  pointer for both MDP and the residual calculation.
5456  *
5457  *  I didn't want to bloat the code by more than 200
5458  *  lignes for the handling of both MDP and the residual.
5459  *  This has been achieved by using a data pointer
5460  *  representation consisting in an index in the data
5461  *  array (dp_sg) and a negative offset (dp_ofs) that
5462  *  have the following meaning:
5463  *
5464  *  - dp_sg = SYM_CONF_MAX_SG
5465  *    we are at the end of the data script.
5466  *  - dp_sg < SYM_CONF_MAX_SG
5467  *    dp_sg points to the next entry of the scatter array
5468  *    we want to transfer.
5469  *  - dp_ofs < 0
5470  *    dp_ofs represents the residual of bytes of the
5471  *    previous entry scatter entry we will send first.
5472  *  - dp_ofs = 0
5473  *    no residual to send first.
5474  *
5475  *  The function sym_evaluate_dp() accepts an arbitray
5476  *  offset (basically from the MDP message) and returns
5477  *  the corresponding values of dp_sg and dp_ofs.
5478  */
5479 
5480 static int sym_evaluate_dp(hcb_p np, ccb_p cp, u32 scr, int *ofs)
5481 {
5482 	u32	dp_scr;
5483 	int	dp_ofs, dp_sg, dp_sgmin;
5484 	int	tmp;
5485 	struct sym_pmc *pm;
5486 
5487 	/*
5488 	 *  Compute the resulted data pointer in term of a script
5489 	 *  address within some DATA script and a signed byte offset.
5490 	 */
5491 	dp_scr = scr;
5492 	dp_ofs = *ofs;
5493 	if	(dp_scr == SCRIPTA_BA (np, pm0_data))
5494 		pm = &cp->phys.pm0;
5495 	else if (dp_scr == SCRIPTA_BA (np, pm1_data))
5496 		pm = &cp->phys.pm1;
5497 	else
5498 		pm = 0;
5499 
5500 	if (pm) {
5501 		dp_scr  = scr_to_cpu(pm->ret);
5502 		dp_ofs -= scr_to_cpu(pm->sg.size);
5503 	}
5504 
5505 	/*
5506 	 *  If we are auto-sensing, then we are done.
5507 	 */
5508 	if (cp->host_flags & HF_SENSE) {
5509 		*ofs = dp_ofs;
5510 		return 0;
5511 	}
5512 
5513 	/*
5514 	 *  Deduce the index of the sg entry.
5515 	 *  Keep track of the index of the first valid entry.
5516 	 *  If result is dp_sg = SYM_CONF_MAX_SG, then we are at the
5517 	 *  end of the data.
5518 	 */
5519 	tmp = scr_to_cpu(cp->phys.head.goalp);
5520 	dp_sg = SYM_CONF_MAX_SG;
5521 	if (dp_scr != tmp)
5522 		dp_sg -= (tmp - 8 - (int)dp_scr) / (2*4);
5523 	dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5524 
5525 	/*
5526 	 *  Move to the sg entry the data pointer belongs to.
5527 	 *
5528 	 *  If we are inside the data area, we expect result to be:
5529 	 *
5530 	 *  Either,
5531 	 *      dp_ofs = 0 and dp_sg is the index of the sg entry
5532 	 *      the data pointer belongs to (or the end of the data)
5533 	 *  Or,
5534 	 *      dp_ofs < 0 and dp_sg is the index of the sg entry
5535 	 *      the data pointer belongs to + 1.
5536 	 */
5537 	if (dp_ofs < 0) {
5538 		int n;
5539 		while (dp_sg > dp_sgmin) {
5540 			--dp_sg;
5541 			tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5542 			n = dp_ofs + (tmp & 0xffffff);
5543 			if (n > 0) {
5544 				++dp_sg;
5545 				break;
5546 			}
5547 			dp_ofs = n;
5548 		}
5549 	}
5550 	else if (dp_ofs > 0) {
5551 		while (dp_sg < SYM_CONF_MAX_SG) {
5552 			tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5553 			dp_ofs -= (tmp & 0xffffff);
5554 			++dp_sg;
5555 			if (dp_ofs <= 0)
5556 				break;
5557 		}
5558 	}
5559 
5560 	/*
5561 	 *  Make sure the data pointer is inside the data area.
5562 	 *  If not, return some error.
5563 	 */
5564 	if	(dp_sg < dp_sgmin || (dp_sg == dp_sgmin && dp_ofs < 0))
5565 		goto out_err;
5566 	else if	(dp_sg > SYM_CONF_MAX_SG ||
5567 		 (dp_sg == SYM_CONF_MAX_SG && dp_ofs > 0))
5568 		goto out_err;
5569 
5570 	/*
5571 	 *  Save the extreme pointer if needed.
5572 	 */
5573 	if (dp_sg > cp->ext_sg ||
5574             (dp_sg == cp->ext_sg && dp_ofs > cp->ext_ofs)) {
5575 		cp->ext_sg  = dp_sg;
5576 		cp->ext_ofs = dp_ofs;
5577 	}
5578 
5579 	/*
5580 	 *  Return data.
5581 	 */
5582 	*ofs = dp_ofs;
5583 	return dp_sg;
5584 
5585 out_err:
5586 	return -1;
5587 }
5588 
5589 /*
5590  *  chip handler for MODIFY DATA POINTER MESSAGE
5591  *
5592  *  We also call this function on IGNORE WIDE RESIDUE
5593  *  messages that do not match a SWIDE full condition.
5594  *  Btw, we assume in that situation that such a message
5595  *  is equivalent to a MODIFY DATA POINTER (offset=-1).
5596  */
5597 
5598 static void sym_modify_dp(hcb_p np, tcb_p tp, ccb_p cp, int ofs)
5599 {
5600 	int dp_ofs	= ofs;
5601 	u32	dp_scr	= INL (nc_temp);
5602 	u32	dp_ret;
5603 	u32	tmp;
5604 	u_char	hflags;
5605 	int	dp_sg;
5606 	struct	sym_pmc *pm;
5607 
5608 	/*
5609 	 *  Not supported for auto-sense.
5610 	 */
5611 	if (cp->host_flags & HF_SENSE)
5612 		goto out_reject;
5613 
5614 	/*
5615 	 *  Apply our alchemy:) (see comments in sym_evaluate_dp()),
5616 	 *  to the resulted data pointer.
5617 	 */
5618 	dp_sg = sym_evaluate_dp(np, cp, dp_scr, &dp_ofs);
5619 	if (dp_sg < 0)
5620 		goto out_reject;
5621 
5622 	/*
5623 	 *  And our alchemy:) allows to easily calculate the data
5624 	 *  script address we want to return for the next data phase.
5625 	 */
5626 	dp_ret = cpu_to_scr(cp->phys.head.goalp);
5627 	dp_ret = dp_ret - 8 - (SYM_CONF_MAX_SG - dp_sg) * (2*4);
5628 
5629 	/*
5630 	 *  If offset / scatter entry is zero we donnot need
5631 	 *  a context for the new current data pointer.
5632 	 */
5633 	if (dp_ofs == 0) {
5634 		dp_scr = dp_ret;
5635 		goto out_ok;
5636 	}
5637 
5638 	/*
5639 	 *  Get a context for the new current data pointer.
5640 	 */
5641 	hflags = INB (HF_PRT);
5642 
5643 	if (hflags & HF_DP_SAVED)
5644 		hflags ^= HF_ACT_PM;
5645 
5646 	if (!(hflags & HF_ACT_PM)) {
5647 		pm  = &cp->phys.pm0;
5648 		dp_scr = SCRIPTA_BA (np, pm0_data);
5649 	}
5650 	else {
5651 		pm = &cp->phys.pm1;
5652 		dp_scr = SCRIPTA_BA (np, pm1_data);
5653 	}
5654 
5655 	hflags &= ~(HF_DP_SAVED);
5656 
5657 	OUTB (HF_PRT, hflags);
5658 
5659 	/*
5660 	 *  Set up the new current data pointer.
5661 	 *  ofs < 0 there, and for the next data phase, we
5662 	 *  want to transfer part of the data of the sg entry
5663 	 *  corresponding to index dp_sg-1 prior to returning
5664 	 *  to the main data script.
5665 	 */
5666 	pm->ret = cpu_to_scr(dp_ret);
5667 	tmp  = scr_to_cpu(cp->phys.data[dp_sg-1].addr);
5668 	tmp += scr_to_cpu(cp->phys.data[dp_sg-1].size) + dp_ofs;
5669 	pm->sg.addr = cpu_to_scr(tmp);
5670 	pm->sg.size = cpu_to_scr(-dp_ofs);
5671 
5672 out_ok:
5673 	OUTL (nc_temp, dp_scr);
5674 	OUTL_DSP (SCRIPTA_BA (np, clrack));
5675 	return;
5676 
5677 out_reject:
5678 	OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5679 }
5680 
5681 
5682 /*
5683  *  chip calculation of the data residual.
5684  *
5685  *  As I used to say, the requirement of data residual
5686  *  in SCSI is broken, useless and cannot be achieved
5687  *  without huge complexity.
5688  *  But most OSes and even the official CAM require it.
5689  *  When stupidity happens to be so widely spread inside
5690  *  a community, it gets hard to convince.
5691  *
5692  *  Anyway, I don't care, since I am not going to use
5693  *  any software that considers this data residual as
5694  *  a relevant information. :)
5695  */
5696 
5697 static int sym_compute_residual(hcb_p np, ccb_p cp)
5698 {
5699 	int dp_sg, dp_sgmin, resid = 0;
5700 	int dp_ofs = 0;
5701 
5702 	/*
5703 	 *  Check for some data lost or just thrown away.
5704 	 *  We are not required to be quite accurate in this
5705 	 *  situation. Btw, if we are odd for output and the
5706 	 *  device claims some more data, it may well happen
5707 	 *  than our residual be zero. :-)
5708 	 */
5709 	if (cp->xerr_status & (XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN)) {
5710 		if (cp->xerr_status & XE_EXTRA_DATA)
5711 			resid -= cp->extra_bytes;
5712 		if (cp->xerr_status & XE_SODL_UNRUN)
5713 			++resid;
5714 		if (cp->xerr_status & XE_SWIDE_OVRUN)
5715 			--resid;
5716 	}
5717 
5718 	/*
5719 	 *  If all data has been transferred,
5720 	 *  there is no residual.
5721 	 */
5722 	if (cp->phys.head.lastp == cp->phys.head.goalp)
5723 		return resid;
5724 
5725 	/*
5726 	 *  If no data transfer occurs, or if the data
5727 	 *  pointer is weird, return full residual.
5728 	 */
5729 	if (cp->startp == cp->phys.head.lastp ||
5730 	    sym_evaluate_dp(np, cp, scr_to_cpu(cp->phys.head.lastp),
5731 			    &dp_ofs) < 0) {
5732 		return cp->data_len;
5733 	}
5734 
5735 	/*
5736 	 *  If we were auto-sensing, then we are done.
5737 	 */
5738 	if (cp->host_flags & HF_SENSE) {
5739 		return -dp_ofs;
5740 	}
5741 
5742 	/*
5743 	 *  We are now full comfortable in the computation
5744 	 *  of the data residual (2's complement).
5745 	 */
5746 	dp_sgmin = SYM_CONF_MAX_SG - cp->segments;
5747 	resid = -cp->ext_ofs;
5748 	for (dp_sg = cp->ext_sg; dp_sg < SYM_CONF_MAX_SG; ++dp_sg) {
5749 		u_int tmp = scr_to_cpu(cp->phys.data[dp_sg].size);
5750 		resid += (tmp & 0xffffff);
5751 	}
5752 
5753 	/*
5754 	 *  Hopefully, the result is not too wrong.
5755 	 */
5756 	return resid;
5757 }
5758 
5759 /*
5760  *  Print out the content of a SCSI message.
5761  */
5762 
5763 static int sym_show_msg (u_char * msg)
5764 {
5765 	u_char i;
5766 	kprintf ("%x",*msg);
5767 	if (*msg==M_EXTENDED) {
5768 		for (i=1;i<8;i++) {
5769 			if (i-1>msg[1]) break;
5770 			kprintf ("-%x",msg[i]);
5771 		};
5772 		return (i+1);
5773 	} else if ((*msg & 0xf0) == 0x20) {
5774 		kprintf ("-%x",msg[1]);
5775 		return (2);
5776 	};
5777 	return (1);
5778 }
5779 
5780 static void sym_print_msg (ccb_p cp, char *label, u_char *msg)
5781 {
5782 	PRINT_ADDR(cp);
5783 	if (label)
5784 		kprintf ("%s: ", label);
5785 
5786 	(void) sym_show_msg (msg);
5787 	kprintf (".\n");
5788 }
5789 
5790 /*
5791  *  Negotiation for WIDE and SYNCHRONOUS DATA TRANSFER.
5792  *
5793  *  When we try to negotiate, we append the negotiation message
5794  *  to the identify and (maybe) simple tag message.
5795  *  The host status field is set to HS_NEGOTIATE to mark this
5796  *  situation.
5797  *
5798  *  If the target doesn't answer this message immediately
5799  *  (as required by the standard), the SIR_NEGO_FAILED interrupt
5800  *  will be raised eventually.
5801  *  The handler removes the HS_NEGOTIATE status, and sets the
5802  *  negotiated value to the default (async / nowide).
5803  *
5804  *  If we receive a matching answer immediately, we check it
5805  *  for validity, and set the values.
5806  *
5807  *  If we receive a Reject message immediately, we assume the
5808  *  negotiation has failed, and fall back to standard values.
5809  *
5810  *  If we receive a negotiation message while not in HS_NEGOTIATE
5811  *  state, it's a target initiated negotiation. We prepare a
5812  *  (hopefully) valid answer, set our parameters, and send back
5813  *  this answer to the target.
5814  *
5815  *  If the target doesn't fetch the answer (no message out phase),
5816  *  we assume the negotiation has failed, and fall back to default
5817  *  settings (SIR_NEGO_PROTO interrupt).
5818  *
5819  *  When we set the values, we adjust them in all ccbs belonging
5820  *  to this target, in the controller's register, and in the "phys"
5821  *  field of the controller's struct sym_hcb.
5822  */
5823 
5824 /*
5825  *  chip handler for SYNCHRONOUS DATA TRANSFER REQUEST (SDTR) message.
5826  */
5827 static void sym_sync_nego(hcb_p np, tcb_p tp, ccb_p cp)
5828 {
5829 	u_char	chg, ofs, per, fak, div;
5830 	int	req = 1;
5831 
5832 	/*
5833 	 *  Synchronous request message received.
5834 	 */
5835 	if (DEBUG_FLAGS & DEBUG_NEGO) {
5836 		sym_print_msg(cp, "sync msgin", np->msgin);
5837 	};
5838 
5839 	/*
5840 	 * request or answer ?
5841 	 */
5842 	if (INB (HS_PRT) == HS_NEGOTIATE) {
5843 		OUTB (HS_PRT, HS_BUSY);
5844 		if (cp->nego_status && cp->nego_status != NS_SYNC)
5845 			goto reject_it;
5846 		req = 0;
5847 	}
5848 
5849 	/*
5850 	 *  get requested values.
5851 	 */
5852 	chg = 0;
5853 	per = np->msgin[3];
5854 	ofs = np->msgin[4];
5855 
5856 	/*
5857 	 *  check values against our limits.
5858 	 */
5859 	if (ofs) {
5860 		if (ofs > np->maxoffs)
5861 			{chg = 1; ofs = np->maxoffs;}
5862 		if (req) {
5863 			if (ofs > tp->tinfo.user.offset)
5864 				{chg = 1; ofs = tp->tinfo.user.offset;}
5865 		}
5866 	}
5867 
5868 	if (ofs) {
5869 		if (per < np->minsync)
5870 			{chg = 1; per = np->minsync;}
5871 		if (req) {
5872 			if (per < tp->tinfo.user.period)
5873 				{chg = 1; per = tp->tinfo.user.period;}
5874 		}
5875 	}
5876 
5877 	div = fak = 0;
5878 	if (ofs && sym_getsync(np, 0, per, &div, &fak) < 0)
5879 		goto reject_it;
5880 
5881 	if (DEBUG_FLAGS & DEBUG_NEGO) {
5882 		PRINT_ADDR(cp);
5883 		kprintf ("sdtr: ofs=%d per=%d div=%d fak=%d chg=%d.\n",
5884 			ofs, per, div, fak, chg);
5885 	}
5886 
5887 	/*
5888 	 *  This was an answer message
5889 	 */
5890 	if (req == 0) {
5891 		if (chg) 	/* Answer wasn't acceptable. */
5892 			goto reject_it;
5893 		sym_setsync (np, cp, ofs, per, div, fak);
5894 		OUTL_DSP (SCRIPTA_BA (np, clrack));
5895 		return;
5896 	}
5897 
5898 	/*
5899 	 *  It was a request. Set value and
5900 	 *  prepare an answer message
5901 	 */
5902 	sym_setsync (np, cp, ofs, per, div, fak);
5903 
5904 	np->msgout[0] = M_EXTENDED;
5905 	np->msgout[1] = 3;
5906 	np->msgout[2] = M_X_SYNC_REQ;
5907 	np->msgout[3] = per;
5908 	np->msgout[4] = ofs;
5909 
5910 	cp->nego_status = NS_SYNC;
5911 
5912 	if (DEBUG_FLAGS & DEBUG_NEGO) {
5913 		sym_print_msg(cp, "sync msgout", np->msgout);
5914 	}
5915 
5916 	np->msgin [0] = M_NOOP;
5917 
5918 	OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
5919 	return;
5920 reject_it:
5921 	sym_setsync (np, cp, 0, 0, 0, 0);
5922 	OUTL_DSP (SCRIPTB_BA (np, msg_bad));
5923 }
5924 
5925 /*
5926  *  chip handler for PARALLEL PROTOCOL REQUEST (PPR) message.
5927  */
5928 static void sym_ppr_nego(hcb_p np, tcb_p tp, ccb_p cp)
5929 {
5930 	u_char	chg, ofs, per, fak, dt, div, wide;
5931 	int	req = 1;
5932 
5933 	/*
5934 	 * Synchronous request message received.
5935 	 */
5936 	if (DEBUG_FLAGS & DEBUG_NEGO) {
5937 		sym_print_msg(cp, "ppr msgin", np->msgin);
5938 	};
5939 
5940 	/*
5941 	 *  get requested values.
5942 	 */
5943 	chg  = 0;
5944 	per  = np->msgin[3];
5945 	ofs  = np->msgin[5];
5946 	wide = np->msgin[6];
5947 	dt   = np->msgin[7] & PPR_OPT_DT;
5948 
5949 	/*
5950 	 * request or answer ?
5951 	 */
5952 	if (INB (HS_PRT) == HS_NEGOTIATE) {
5953 		OUTB (HS_PRT, HS_BUSY);
5954 		if (cp->nego_status && cp->nego_status != NS_PPR)
5955 			goto reject_it;
5956 		req = 0;
5957 	}
5958 
5959 	/*
5960 	 *  check values against our limits.
5961 	 */
5962 	if (wide > np->maxwide)
5963 		{chg = 1; wide = np->maxwide;}
5964 	if (!wide || !(np->features & FE_ULTRA3))
5965 		dt &= ~PPR_OPT_DT;
5966 	if (req) {
5967 		if (wide > tp->tinfo.user.width)
5968 			{chg = 1; wide = tp->tinfo.user.width;}
5969 	}
5970 
5971 	if (!(np->features & FE_U3EN))	/* Broken U3EN bit not supported */
5972 		dt &= ~PPR_OPT_DT;
5973 
5974 	if (dt != (np->msgin[7] & PPR_OPT_MASK)) chg = 1;
5975 
5976 	if (ofs) {
5977 		if (dt) {
5978 			if (ofs > np->maxoffs_dt)
5979 				{chg = 1; ofs = np->maxoffs_dt;}
5980 		}
5981 		else if (ofs > np->maxoffs)
5982 			{chg = 1; ofs = np->maxoffs;}
5983 		if (req) {
5984 			if (ofs > tp->tinfo.user.offset)
5985 				{chg = 1; ofs = tp->tinfo.user.offset;}
5986 		}
5987 	}
5988 
5989 	if (ofs) {
5990 		if (dt) {
5991 			if (per < np->minsync_dt)
5992 				{chg = 1; per = np->minsync_dt;}
5993 		}
5994 		else if (per < np->minsync)
5995 			{chg = 1; per = np->minsync;}
5996 		if (req) {
5997 			if (per < tp->tinfo.user.period)
5998 				{chg = 1; per = tp->tinfo.user.period;}
5999 		}
6000 	}
6001 
6002 	div = fak = 0;
6003 	if (ofs && sym_getsync(np, dt, per, &div, &fak) < 0)
6004 		goto reject_it;
6005 
6006 	if (DEBUG_FLAGS & DEBUG_NEGO) {
6007 		PRINT_ADDR(cp);
6008 		kprintf ("ppr: "
6009 			"dt=%x ofs=%d per=%d wide=%d div=%d fak=%d chg=%d.\n",
6010 			dt, ofs, per, wide, div, fak, chg);
6011 	}
6012 
6013 	/*
6014 	 *  It was an answer.
6015 	 */
6016 	if (req == 0) {
6017 		if (chg) 	/* Answer wasn't acceptable */
6018 			goto reject_it;
6019 		sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6020 		OUTL_DSP (SCRIPTA_BA (np, clrack));
6021 		return;
6022 	}
6023 
6024 	/*
6025 	 *  It was a request. Set value and
6026 	 *  prepare an answer message
6027 	 */
6028 	sym_setpprot (np, cp, dt, ofs, per, wide, div, fak);
6029 
6030 	np->msgout[0] = M_EXTENDED;
6031 	np->msgout[1] = 6;
6032 	np->msgout[2] = M_X_PPR_REQ;
6033 	np->msgout[3] = per;
6034 	np->msgout[4] = 0;
6035 	np->msgout[5] = ofs;
6036 	np->msgout[6] = wide;
6037 	np->msgout[7] = dt;
6038 
6039 	cp->nego_status = NS_PPR;
6040 
6041 	if (DEBUG_FLAGS & DEBUG_NEGO) {
6042 		sym_print_msg(cp, "ppr msgout", np->msgout);
6043 	}
6044 
6045 	np->msgin [0] = M_NOOP;
6046 
6047 	OUTL_DSP (SCRIPTB_BA (np, ppr_resp));
6048 	return;
6049 reject_it:
6050 	sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6051 	OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6052 	/*
6053 	 *  If it was a device response that should result in
6054 	 *  ST, we may want to try a legacy negotiation later.
6055 	 */
6056 	if (!req && !dt) {
6057 		tp->tinfo.goal.options = 0;
6058 		tp->tinfo.goal.width   = wide;
6059 		tp->tinfo.goal.period  = per;
6060 		tp->tinfo.goal.offset  = ofs;
6061 	}
6062 	return;
6063 }
6064 
6065 /*
6066  *  chip handler for WIDE DATA TRANSFER REQUEST (WDTR) message.
6067  */
6068 static void sym_wide_nego(hcb_p np, tcb_p tp, ccb_p cp)
6069 {
6070 	u_char	chg, wide;
6071 	int	req = 1;
6072 
6073 	/*
6074 	 *  Wide request message received.
6075 	 */
6076 	if (DEBUG_FLAGS & DEBUG_NEGO) {
6077 		sym_print_msg(cp, "wide msgin", np->msgin);
6078 	};
6079 
6080 	/*
6081 	 * Is it an request from the device?
6082 	 */
6083 	if (INB (HS_PRT) == HS_NEGOTIATE) {
6084 		OUTB (HS_PRT, HS_BUSY);
6085 		if (cp->nego_status && cp->nego_status != NS_WIDE)
6086 			goto reject_it;
6087 		req = 0;
6088 	}
6089 
6090 	/*
6091 	 *  get requested values.
6092 	 */
6093 	chg  = 0;
6094 	wide = np->msgin[3];
6095 
6096 	/*
6097 	 *  check values against driver limits.
6098 	 */
6099 	if (wide > np->maxwide)
6100 		{chg = 1; wide = np->maxwide;}
6101 	if (req) {
6102 		if (wide > tp->tinfo.user.width)
6103 			{chg = 1; wide = tp->tinfo.user.width;}
6104 	}
6105 
6106 	if (DEBUG_FLAGS & DEBUG_NEGO) {
6107 		PRINT_ADDR(cp);
6108 		kprintf ("wdtr: wide=%d chg=%d.\n", wide, chg);
6109 	}
6110 
6111 	/*
6112 	 * This was an answer message
6113 	 */
6114 	if (req == 0) {
6115 		if (chg)	/*  Answer wasn't acceptable. */
6116 			goto reject_it;
6117 		sym_setwide (np, cp, wide);
6118 
6119 		/*
6120 		 * Negotiate for SYNC immediately after WIDE response.
6121 		 * This allows to negotiate for both WIDE and SYNC on
6122 		 * a single SCSI command (Suggested by Justin Gibbs).
6123 		 */
6124 		if (tp->tinfo.goal.offset) {
6125 			np->msgout[0] = M_EXTENDED;
6126 			np->msgout[1] = 3;
6127 			np->msgout[2] = M_X_SYNC_REQ;
6128 			np->msgout[3] = tp->tinfo.goal.period;
6129 			np->msgout[4] = tp->tinfo.goal.offset;
6130 
6131 			if (DEBUG_FLAGS & DEBUG_NEGO) {
6132 				sym_print_msg(cp, "sync msgout", np->msgout);
6133 			}
6134 
6135 			cp->nego_status = NS_SYNC;
6136 			OUTB (HS_PRT, HS_NEGOTIATE);
6137 			OUTL_DSP (SCRIPTB_BA (np, sdtr_resp));
6138 			return;
6139 		}
6140 
6141 		OUTL_DSP (SCRIPTA_BA (np, clrack));
6142 		return;
6143 	};
6144 
6145 	/*
6146 	 *  It was a request, set value and
6147 	 *  prepare an answer message
6148 	 */
6149 	sym_setwide (np, cp, wide);
6150 
6151 	np->msgout[0] = M_EXTENDED;
6152 	np->msgout[1] = 2;
6153 	np->msgout[2] = M_X_WIDE_REQ;
6154 	np->msgout[3] = wide;
6155 
6156 	np->msgin [0] = M_NOOP;
6157 
6158 	cp->nego_status = NS_WIDE;
6159 
6160 	if (DEBUG_FLAGS & DEBUG_NEGO) {
6161 		sym_print_msg(cp, "wide msgout", np->msgout);
6162 	}
6163 
6164 	OUTL_DSP (SCRIPTB_BA (np, wdtr_resp));
6165 	return;
6166 reject_it:
6167 	OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6168 }
6169 
6170 /*
6171  *  Reset SYNC or WIDE to default settings.
6172  *
6173  *  Called when a negotiation does not succeed either
6174  *  on rejection or on protocol error.
6175  *
6176  *  If it was a PPR that made problems, we may want to
6177  *  try a legacy negotiation later.
6178  */
6179 static void sym_nego_default(hcb_p np, tcb_p tp, ccb_p cp)
6180 {
6181 	/*
6182 	 *  any error in negotiation:
6183 	 *  fall back to default mode.
6184 	 */
6185 	switch (cp->nego_status) {
6186 	case NS_PPR:
6187 #if 0
6188 		sym_setpprot (np, cp, 0, 0, 0, 0, 0, 0);
6189 #else
6190 		tp->tinfo.goal.options = 0;
6191 		if (tp->tinfo.goal.period < np->minsync)
6192 			tp->tinfo.goal.period = np->minsync;
6193 		if (tp->tinfo.goal.offset > np->maxoffs)
6194 			tp->tinfo.goal.offset = np->maxoffs;
6195 #endif
6196 		break;
6197 	case NS_SYNC:
6198 		sym_setsync (np, cp, 0, 0, 0, 0);
6199 		break;
6200 	case NS_WIDE:
6201 		sym_setwide (np, cp, 0);
6202 		break;
6203 	};
6204 	np->msgin [0] = M_NOOP;
6205 	np->msgout[0] = M_NOOP;
6206 	cp->nego_status = 0;
6207 }
6208 
6209 /*
6210  *  chip handler for MESSAGE REJECT received in response to
6211  *  a WIDE or SYNCHRONOUS negotiation.
6212  */
6213 static void sym_nego_rejected(hcb_p np, tcb_p tp, ccb_p cp)
6214 {
6215 	sym_nego_default(np, tp, cp);
6216 	OUTB (HS_PRT, HS_BUSY);
6217 }
6218 
6219 /*
6220  *  chip exception handler for programmed interrupts.
6221  */
6222 void sym_int_sir (hcb_p np)
6223 {
6224 	u_char	num	= INB (nc_dsps);
6225 	u32	dsa	= INL (nc_dsa);
6226 	ccb_p	cp	= sym_ccb_from_dsa(np, dsa);
6227 	u_char	target	= INB (nc_sdid) & 0x0f;
6228 	tcb_p	tp	= &np->target[target];
6229 	int	tmp;
6230 
6231 	if (DEBUG_FLAGS & DEBUG_TINY) kprintf ("I#%d", num);
6232 
6233 	switch (num) {
6234 	/*
6235 	 *  Command has been completed with error condition
6236 	 *  or has been auto-sensed.
6237 	 */
6238 	case SIR_COMPLETE_ERROR:
6239 		sym_complete_error(np, cp);
6240 		return;
6241 	/*
6242 	 *  The C code is currently trying to recover from something.
6243 	 *  Typically, user want to abort some command.
6244 	 */
6245 	case SIR_SCRIPT_STOPPED:
6246 	case SIR_TARGET_SELECTED:
6247 	case SIR_ABORT_SENT:
6248 		sym_sir_task_recovery(np, num);
6249 		return;
6250 	/*
6251 	 *  The device didn't go to MSG OUT phase after having
6252 	 *  been selected with ATN. We donnot want to handle
6253 	 *  that.
6254 	 */
6255 	case SIR_SEL_ATN_NO_MSG_OUT:
6256 		kprintf ("%s:%d: No MSG OUT phase after selection with ATN.\n",
6257 			sym_name (np), target);
6258 		goto out_stuck;
6259 	/*
6260 	 *  The device didn't switch to MSG IN phase after
6261 	 *  having reseleted the initiator.
6262 	 */
6263 	case SIR_RESEL_NO_MSG_IN:
6264 		kprintf ("%s:%d: No MSG IN phase after reselection.\n",
6265 			sym_name (np), target);
6266 		goto out_stuck;
6267 	/*
6268 	 *  After reselection, the device sent a message that wasn't
6269 	 *  an IDENTIFY.
6270 	 */
6271 	case SIR_RESEL_NO_IDENTIFY:
6272 		kprintf ("%s:%d: No IDENTIFY after reselection.\n",
6273 			sym_name (np), target);
6274 		goto out_stuck;
6275 	/*
6276 	 *  The device reselected a LUN we donnot know about.
6277 	 */
6278 	case SIR_RESEL_BAD_LUN:
6279 		np->msgout[0] = M_RESET;
6280 		goto out;
6281 	/*
6282 	 *  The device reselected for an untagged nexus and we
6283 	 *  haven't any.
6284 	 */
6285 	case SIR_RESEL_BAD_I_T_L:
6286 		np->msgout[0] = M_ABORT;
6287 		goto out;
6288 	/*
6289 	 *  The device reselected for a tagged nexus that we donnot
6290 	 *  have.
6291 	 */
6292 	case SIR_RESEL_BAD_I_T_L_Q:
6293 		np->msgout[0] = M_ABORT_TAG;
6294 		goto out;
6295 	/*
6296 	 *  The SCRIPTS let us know that the device has grabbed
6297 	 *  our message and will abort the job.
6298 	 */
6299 	case SIR_RESEL_ABORTED:
6300 		np->lastmsg = np->msgout[0];
6301 		np->msgout[0] = M_NOOP;
6302 		kprintf ("%s:%d: message %x sent on bad reselection.\n",
6303 			sym_name (np), target, np->lastmsg);
6304 		goto out;
6305 	/*
6306 	 *  The SCRIPTS let us know that a message has been
6307 	 *  successfully sent to the device.
6308 	 */
6309 	case SIR_MSG_OUT_DONE:
6310 		np->lastmsg = np->msgout[0];
6311 		np->msgout[0] = M_NOOP;
6312 		/* Should we really care of that */
6313 		if (np->lastmsg == M_PARITY || np->lastmsg == M_ID_ERROR) {
6314 			if (cp) {
6315 				cp->xerr_status &= ~XE_PARITY_ERR;
6316 				if (!cp->xerr_status)
6317 					OUTOFFB (HF_PRT, HF_EXT_ERR);
6318 			}
6319 		}
6320 		goto out;
6321 	/*
6322 	 *  The device didn't send a GOOD SCSI status.
6323 	 *  We may have some work to do prior to allow
6324 	 *  the SCRIPTS processor to continue.
6325 	 */
6326 	case SIR_BAD_SCSI_STATUS:
6327 		if (!cp)
6328 			goto out;
6329 		sym_sir_bad_scsi_status(np, num, cp);
6330 		return;
6331 	/*
6332 	 *  We are asked by the SCRIPTS to prepare a
6333 	 *  REJECT message.
6334 	 */
6335 	case SIR_REJECT_TO_SEND:
6336 		sym_print_msg(cp, "M_REJECT to send for ", np->msgin);
6337 		np->msgout[0] = M_REJECT;
6338 		goto out;
6339 	/*
6340 	 *  We have been ODD at the end of a DATA IN
6341 	 *  transfer and the device didn't send a
6342 	 *  IGNORE WIDE RESIDUE message.
6343 	 *  It is a data overrun condition.
6344 	 */
6345 	case SIR_SWIDE_OVERRUN:
6346 		if (cp) {
6347 			OUTONB (HF_PRT, HF_EXT_ERR);
6348 			cp->xerr_status |= XE_SWIDE_OVRUN;
6349 		}
6350 		goto out;
6351 	/*
6352 	 *  We have been ODD at the end of a DATA OUT
6353 	 *  transfer.
6354 	 *  It is a data underrun condition.
6355 	 */
6356 	case SIR_SODL_UNDERRUN:
6357 		if (cp) {
6358 			OUTONB (HF_PRT, HF_EXT_ERR);
6359 			cp->xerr_status |= XE_SODL_UNRUN;
6360 		}
6361 		goto out;
6362 	/*
6363 	 *  The device wants us to tranfer more data than
6364 	 *  expected or in the wrong direction.
6365 	 *  The number of extra bytes is in scratcha.
6366 	 *  It is a data overrun condition.
6367 	 */
6368 	case SIR_DATA_OVERRUN:
6369 		if (cp) {
6370 			OUTONB (HF_PRT, HF_EXT_ERR);
6371 			cp->xerr_status |= XE_EXTRA_DATA;
6372 			cp->extra_bytes += INL (nc_scratcha);
6373 		}
6374 		goto out;
6375 	/*
6376 	 *  The device switched to an illegal phase (4/5).
6377 	 */
6378 	case SIR_BAD_PHASE:
6379 		if (cp) {
6380 			OUTONB (HF_PRT, HF_EXT_ERR);
6381 			cp->xerr_status |= XE_BAD_PHASE;
6382 		}
6383 		goto out;
6384 	/*
6385 	 *  We received a message.
6386 	 */
6387 	case SIR_MSG_RECEIVED:
6388 		if (!cp)
6389 			goto out_stuck;
6390 		switch (np->msgin [0]) {
6391 		/*
6392 		 *  We received an extended message.
6393 		 *  We handle MODIFY DATA POINTER, SDTR, WDTR
6394 		 *  and reject all other extended messages.
6395 		 */
6396 		case M_EXTENDED:
6397 			switch (np->msgin [2]) {
6398 			case M_X_MODIFY_DP:
6399 				if (DEBUG_FLAGS & DEBUG_POINTER)
6400 					sym_print_msg(cp,"modify DP",np->msgin);
6401 				tmp = (np->msgin[3]<<24) + (np->msgin[4]<<16) +
6402 				      (np->msgin[5]<<8)  + (np->msgin[6]);
6403 				sym_modify_dp(np, tp, cp, tmp);
6404 				return;
6405 			case M_X_SYNC_REQ:
6406 				sym_sync_nego(np, tp, cp);
6407 				return;
6408 			case M_X_PPR_REQ:
6409 				sym_ppr_nego(np, tp, cp);
6410 				return;
6411 			case M_X_WIDE_REQ:
6412 				sym_wide_nego(np, tp, cp);
6413 				return;
6414 			default:
6415 				goto out_reject;
6416 			}
6417 			break;
6418 		/*
6419 		 *  We received a 1/2 byte message not handled from SCRIPTS.
6420 		 *  We are only expecting MESSAGE REJECT and IGNORE WIDE
6421 		 *  RESIDUE messages that haven't been anticipated by
6422 		 *  SCRIPTS on SWIDE full condition. Unanticipated IGNORE
6423 		 *  WIDE RESIDUE messages are aliased as MODIFY DP (-1).
6424 		 */
6425 		case M_IGN_RESIDUE:
6426 			if (DEBUG_FLAGS & DEBUG_POINTER)
6427 				sym_print_msg(cp,"ign wide residue", np->msgin);
6428 			sym_modify_dp(np, tp, cp, -1);
6429 			return;
6430 		case M_REJECT:
6431 			if (INB (HS_PRT) == HS_NEGOTIATE)
6432 				sym_nego_rejected(np, tp, cp);
6433 			else {
6434 				PRINT_ADDR(cp);
6435 				kprintf ("M_REJECT received (%x:%x).\n",
6436 					scr_to_cpu(np->lastmsg), np->msgout[0]);
6437 			}
6438 			goto out_clrack;
6439 			break;
6440 		default:
6441 			goto out_reject;
6442 		}
6443 		break;
6444 	/*
6445 	 *  We received an unknown message.
6446 	 *  Ignore all MSG IN phases and reject it.
6447 	 */
6448 	case SIR_MSG_WEIRD:
6449 		sym_print_msg(cp, "WEIRD message received", np->msgin);
6450 		OUTL_DSP (SCRIPTB_BA (np, msg_weird));
6451 		return;
6452 	/*
6453 	 *  Negotiation failed.
6454 	 *  Target does not send us the reply.
6455 	 *  Remove the HS_NEGOTIATE status.
6456 	 */
6457 	case SIR_NEGO_FAILED:
6458 		OUTB (HS_PRT, HS_BUSY);
6459 	/*
6460 	 *  Negotiation failed.
6461 	 *  Target does not want answer message.
6462 	 */
6463 	case SIR_NEGO_PROTO:
6464 		sym_nego_default(np, tp, cp);
6465 		goto out;
6466 	};
6467 
6468 out:
6469 	OUTONB_STD ();
6470 	return;
6471 out_reject:
6472 	OUTL_DSP (SCRIPTB_BA (np, msg_bad));
6473 	return;
6474 out_clrack:
6475 	OUTL_DSP (SCRIPTA_BA (np, clrack));
6476 	return;
6477 out_stuck:
6478 	;
6479 }
6480 
6481 /*
6482  *  Acquire a control block
6483  */
6484 static	ccb_p sym_get_ccb (hcb_p np, u_char tn, u_char ln, u_char tag_order)
6485 {
6486 	tcb_p tp = &np->target[tn];
6487 	lcb_p lp = sym_lp(np, tp, ln);
6488 	u_short tag = NO_TAG;
6489 	SYM_QUEHEAD *qp;
6490 	ccb_p cp = (ccb_p) 0;
6491 
6492 	/*
6493 	 *  Look for a free CCB
6494 	 */
6495 	if (sym_que_empty(&np->free_ccbq))
6496 		(void) sym_alloc_ccb(np);
6497 	qp = sym_remque_head(&np->free_ccbq);
6498 	if (!qp)
6499 		goto out;
6500 	cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
6501 
6502 	/*
6503 	 *  If the LCB is not yet available and the LUN
6504 	 *  has been probed ok, try to allocate the LCB.
6505 	 */
6506 	if (!lp && sym_is_bit(tp->lun_map, ln)) {
6507 		lp = sym_alloc_lcb(np, tn, ln);
6508 		if (!lp)
6509 			goto out_free;
6510 	}
6511 
6512 	/*
6513 	 *  If the LCB is not available here, then the
6514 	 *  logical unit is not yet discovered. For those
6515 	 *  ones only accept 1 SCSI IO per logical unit,
6516 	 *  since we cannot allow disconnections.
6517 	 */
6518 	if (!lp) {
6519 		if (!sym_is_bit(tp->busy0_map, ln))
6520 			sym_set_bit(tp->busy0_map, ln);
6521 		else
6522 			goto out_free;
6523 	} else {
6524 		/*
6525 		 *  If we have been asked for a tagged command.
6526 		 */
6527 		if (tag_order) {
6528 			/*
6529 			 *  Debugging purpose.
6530 			 */
6531 			assert(lp->busy_itl == 0);
6532 			/*
6533 			 *  Allocate resources for tags if not yet.
6534 			 */
6535 			if (!lp->cb_tags) {
6536 				sym_alloc_lcb_tags(np, tn, ln);
6537 				if (!lp->cb_tags)
6538 					goto out_free;
6539 			}
6540 			/*
6541 			 *  Get a tag for this SCSI IO and set up
6542 			 *  the CCB bus address for reselection,
6543 			 *  and count it for this LUN.
6544 			 *  Toggle reselect path to tagged.
6545 			 */
6546 			if (lp->busy_itlq < SYM_CONF_MAX_TASK) {
6547 				tag = lp->cb_tags[lp->ia_tag];
6548 				if (++lp->ia_tag == SYM_CONF_MAX_TASK)
6549 					lp->ia_tag = 0;
6550 				lp->itlq_tbl[tag] = cpu_to_scr(cp->ccb_ba);
6551 				++lp->busy_itlq;
6552 				lp->head.resel_sa =
6553 					cpu_to_scr(SCRIPTA_BA (np, resel_tag));
6554 			}
6555 			else
6556 				goto out_free;
6557 		}
6558 		/*
6559 		 *  This command will not be tagged.
6560 		 *  If we already have either a tagged or untagged
6561 		 *  one, refuse to overlap this untagged one.
6562 		 */
6563 		else {
6564 			/*
6565 			 *  Debugging purpose.
6566 			 */
6567 			assert(lp->busy_itl == 0 && lp->busy_itlq == 0);
6568 			/*
6569 			 *  Count this nexus for this LUN.
6570 			 *  Set up the CCB bus address for reselection.
6571 			 *  Toggle reselect path to untagged.
6572 			 */
6573 			if (++lp->busy_itl == 1) {
6574 				lp->head.itl_task_sa = cpu_to_scr(cp->ccb_ba);
6575 				lp->head.resel_sa =
6576 				      cpu_to_scr(SCRIPTA_BA (np, resel_no_tag));
6577 			}
6578 			else
6579 				goto out_free;
6580 		}
6581 	}
6582 	/*
6583 	 *  Put the CCB into the busy queue.
6584 	 */
6585 	sym_insque_tail(&cp->link_ccbq, &np->busy_ccbq);
6586 
6587 	/*
6588 	 *  Remember all informations needed to free this CCB.
6589 	 */
6590 	cp->to_abort = 0;
6591 	cp->tag	   = tag;
6592 	cp->target = tn;
6593 	cp->lun    = ln;
6594 
6595 	if (DEBUG_FLAGS & DEBUG_TAGS) {
6596 		PRINT_LUN(np, tn, ln);
6597 		kprintf ("ccb @%p using tag %d.\n", cp, tag);
6598 	}
6599 
6600 out:
6601 	return cp;
6602 out_free:
6603 	sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6604 	return (ccb_p) 0;
6605 }
6606 
6607 /*
6608  *  Release one control block
6609  */
6610 static void sym_free_ccb (hcb_p np, ccb_p cp)
6611 {
6612 	tcb_p tp = &np->target[cp->target];
6613 	lcb_p lp = sym_lp(np, tp, cp->lun);
6614 
6615 	if (DEBUG_FLAGS & DEBUG_TAGS) {
6616 		PRINT_LUN(np, cp->target, cp->lun);
6617 		kprintf ("ccb @%p freeing tag %d.\n", cp, cp->tag);
6618 	}
6619 
6620 	/*
6621 	 *  If LCB available,
6622 	 */
6623 	if (lp) {
6624 		/*
6625 		 *  If tagged, release the tag, set the relect path
6626 		 */
6627 		if (cp->tag != NO_TAG) {
6628 			/*
6629 			 *  Free the tag value.
6630 			 */
6631 			lp->cb_tags[lp->if_tag] = cp->tag;
6632 			if (++lp->if_tag == SYM_CONF_MAX_TASK)
6633 				lp->if_tag = 0;
6634 			/*
6635 			 *  Make the reselect path invalid,
6636 			 *  and uncount this CCB.
6637 			 */
6638 			lp->itlq_tbl[cp->tag] = cpu_to_scr(np->bad_itlq_ba);
6639 			--lp->busy_itlq;
6640 		} else {	/* Untagged */
6641 			/*
6642 			 *  Make the reselect path invalid,
6643 			 *  and uncount this CCB.
6644 			 */
6645 			lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6646 			--lp->busy_itl;
6647 		}
6648 		/*
6649 		 *  If no JOB active, make the LUN reselect path invalid.
6650 		 */
6651 		if (lp->busy_itlq == 0 && lp->busy_itl == 0)
6652 			lp->head.resel_sa =
6653 				cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6654 	}
6655 	/*
6656 	 *  Otherwise, we only accept 1 IO per LUN.
6657 	 *  Clear the bit that keeps track of this IO.
6658 	 */
6659 	else
6660 		sym_clr_bit(tp->busy0_map, cp->lun);
6661 
6662 	/*
6663 	 *  We donnot queue more than 1 ccb per target
6664 	 *  with negotiation at any time. If this ccb was
6665 	 *  used for negotiation, clear this info in the tcb.
6666 	 */
6667 	if (cp == tp->nego_cp)
6668 		tp->nego_cp = 0;
6669 
6670 #ifdef SYM_CONF_IARB_SUPPORT
6671 	/*
6672 	 *  If we just complete the last queued CCB,
6673 	 *  clear this info that is no longer relevant.
6674 	 */
6675 	if (cp == np->last_cp)
6676 		np->last_cp = 0;
6677 #endif
6678 
6679 #ifdef	FreeBSD_Bus_Dma_Abstraction
6680 	/*
6681 	 *  Unmap user data from DMA map if needed.
6682 	 */
6683 	if (cp->dmamapped) {
6684 		bus_dmamap_unload(np->data_dmat, cp->dmamap);
6685 		cp->dmamapped = 0;
6686 	}
6687 #endif
6688 
6689 	/*
6690 	 *  Make this CCB available.
6691 	 */
6692 	cp->cam_ccb = 0;
6693 	cp->host_status = HS_IDLE;
6694 	sym_remque(&cp->link_ccbq);
6695 	sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6696 }
6697 
6698 /*
6699  *  Allocate a CCB from memory and initialize its fixed part.
6700  */
6701 static ccb_p sym_alloc_ccb(hcb_p np)
6702 {
6703 	ccb_p cp = 0;
6704 	int hcode;
6705 
6706 	/*
6707 	 *  Prevent from allocating more CCBs than we can
6708 	 *  queue to the controller.
6709 	 */
6710 	if (np->actccbs >= SYM_CONF_MAX_START)
6711 		return 0;
6712 
6713 	/*
6714 	 *  Allocate memory for this CCB.
6715 	 */
6716 	cp = sym_calloc_dma(sizeof(struct sym_ccb), "CCB");
6717 	if (!cp)
6718 		goto out_free;
6719 
6720 	/*
6721 	 *  Allocate a bounce buffer for sense data.
6722 	 */
6723 	cp->sns_bbuf = sym_calloc_dma(SYM_SNS_BBUF_LEN, "SNS_BBUF");
6724 	if (!cp->sns_bbuf)
6725 		goto out_free;
6726 
6727 	/*
6728 	 *  Allocate a map for the DMA of user data.
6729 	 */
6730 #ifdef	FreeBSD_Bus_Dma_Abstraction
6731 	if (bus_dmamap_create(np->data_dmat, 0, &cp->dmamap))
6732 		goto out_free;
6733 #endif
6734 	/*
6735 	 *  Count it.
6736 	 */
6737 	np->actccbs++;
6738 
6739 	/*
6740 	 *  Compute the bus address of this ccb.
6741 	 */
6742 	cp->ccb_ba = vtobus(cp);
6743 
6744 	/*
6745 	 *  Insert this ccb into the hashed list.
6746 	 */
6747 	hcode = CCB_HASH_CODE(cp->ccb_ba);
6748 	cp->link_ccbh = np->ccbh[hcode];
6749 	np->ccbh[hcode] = cp;
6750 
6751 	/*
6752 	 *  Initialyze the start and restart actions.
6753 	 */
6754 	cp->phys.head.go.start   = cpu_to_scr(SCRIPTA_BA (np, idle));
6755 	cp->phys.head.go.restart = cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
6756 
6757  	/*
6758 	 *  Initilialyze some other fields.
6759 	 */
6760 	cp->phys.smsg_ext.addr = cpu_to_scr(HCB_BA(np, msgin[2]));
6761 
6762 	/*
6763 	 *  Chain into free ccb queue.
6764 	 */
6765 	sym_insque_head(&cp->link_ccbq, &np->free_ccbq);
6766 
6767 	return cp;
6768 out_free:
6769 	if (cp) {
6770 		if (cp->sns_bbuf)
6771 			sym_mfree_dma(cp->sns_bbuf,SYM_SNS_BBUF_LEN,"SNS_BBUF");
6772 		sym_mfree_dma(cp, sizeof(*cp), "CCB");
6773 	}
6774 	return 0;
6775 }
6776 
6777 /*
6778  *  Look up a CCB from a DSA value.
6779  */
6780 static ccb_p sym_ccb_from_dsa(hcb_p np, u32 dsa)
6781 {
6782 	int hcode;
6783 	ccb_p cp;
6784 
6785 	hcode = CCB_HASH_CODE(dsa);
6786 	cp = np->ccbh[hcode];
6787 	while (cp) {
6788 		if (cp->ccb_ba == dsa)
6789 			break;
6790 		cp = cp->link_ccbh;
6791 	}
6792 
6793 	return cp;
6794 }
6795 
6796 /*
6797  *  Target control block initialisation.
6798  *  Nothing important to do at the moment.
6799  */
6800 static void sym_init_tcb (hcb_p np, u_char tn)
6801 {
6802 	/*
6803 	 *  Check some alignments required by the chip.
6804 	 */
6805 	assert (((offsetof(struct sym_reg, nc_sxfer) ^
6806 		offsetof(struct sym_tcb, head.sval)) &3) == 0);
6807 	assert (((offsetof(struct sym_reg, nc_scntl3) ^
6808 		offsetof(struct sym_tcb, head.wval)) &3) == 0);
6809 }
6810 
6811 /*
6812  *  Lun control block allocation and initialization.
6813  */
6814 static lcb_p sym_alloc_lcb (hcb_p np, u_char tn, u_char ln)
6815 {
6816 	tcb_p tp = &np->target[tn];
6817 	lcb_p lp = sym_lp(np, tp, ln);
6818 
6819 	/*
6820 	 *  Already done, just return.
6821 	 */
6822 	if (lp)
6823 		return lp;
6824 	/*
6825 	 *  Check against some race.
6826 	 */
6827 	assert(!sym_is_bit(tp->busy0_map, ln));
6828 
6829 	/*
6830 	 *  Initialize the target control block if not yet.
6831 	 */
6832 	sym_init_tcb (np, tn);
6833 
6834 	/*
6835 	 *  Allocate the LCB bus address array.
6836 	 *  Compute the bus address of this table.
6837 	 */
6838 	if (ln && !tp->luntbl) {
6839 		int i;
6840 
6841 		tp->luntbl = sym_calloc_dma(256, "LUNTBL");
6842 		if (!tp->luntbl)
6843 			goto fail;
6844 		for (i = 0 ; i < 64 ; i++)
6845 			tp->luntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
6846 		tp->head.luntbl_sa = cpu_to_scr(vtobus(tp->luntbl));
6847 	}
6848 
6849 	/*
6850 	 *  Allocate the table of pointers for LUN(s) > 0, if needed.
6851 	 */
6852 	if (ln && !tp->lunmp) {
6853 		tp->lunmp = sym_calloc(SYM_CONF_MAX_LUN * sizeof(lcb_p),
6854 				   "LUNMP");
6855 		if (!tp->lunmp)
6856 			goto fail;
6857 	}
6858 
6859 	/*
6860 	 *  Allocate the lcb.
6861 	 *  Make it available to the chip.
6862 	 */
6863 	lp = sym_calloc_dma(sizeof(struct sym_lcb), "LCB");
6864 	if (!lp)
6865 		goto fail;
6866 	if (ln) {
6867 		tp->lunmp[ln] = lp;
6868 		tp->luntbl[ln] = cpu_to_scr(vtobus(lp));
6869 	}
6870 	else {
6871 		tp->lun0p = lp;
6872 		tp->head.lun0_sa = cpu_to_scr(vtobus(lp));
6873 	}
6874 
6875 	/*
6876 	 *  Let the itl task point to error handling.
6877 	 */
6878 	lp->head.itl_task_sa = cpu_to_scr(np->bad_itl_ba);
6879 
6880 	/*
6881 	 *  Set the reselect pattern to our default. :)
6882 	 */
6883 	lp->head.resel_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
6884 
6885 	/*
6886 	 *  Set user capabilities.
6887 	 */
6888 	lp->user_flags = tp->usrflags & (SYM_DISC_ENABLED | SYM_TAGS_ENABLED);
6889 
6890 fail:
6891 	return lp;
6892 }
6893 
6894 /*
6895  *  Allocate LCB resources for tagged command queuing.
6896  */
6897 static void sym_alloc_lcb_tags (hcb_p np, u_char tn, u_char ln)
6898 {
6899 	tcb_p tp = &np->target[tn];
6900 	lcb_p lp = sym_lp(np, tp, ln);
6901 	int i;
6902 
6903 	/*
6904 	 *  If LCB not available, try to allocate it.
6905 	 */
6906 	if (!lp && !(lp = sym_alloc_lcb(np, tn, ln)))
6907 		goto fail;
6908 
6909 	/*
6910 	 *  Allocate the task table and and the tag allocation
6911 	 *  circular buffer. We want both or none.
6912 	 */
6913 	lp->itlq_tbl = sym_calloc_dma(SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6914 	if (!lp->itlq_tbl)
6915 		goto fail;
6916 	lp->cb_tags = sym_calloc(SYM_CONF_MAX_TASK, "CB_TAGS");
6917 	if (!lp->cb_tags) {
6918 		sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4, "ITLQ_TBL");
6919 		lp->itlq_tbl = 0;
6920 		goto fail;
6921 	}
6922 
6923 	/*
6924 	 *  Initialize the task table with invalid entries.
6925 	 */
6926 	for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6927 		lp->itlq_tbl[i] = cpu_to_scr(np->notask_ba);
6928 
6929 	/*
6930 	 *  Fill up the tag buffer with tag numbers.
6931 	 */
6932 	for (i = 0 ; i < SYM_CONF_MAX_TASK ; i++)
6933 		lp->cb_tags[i] = i;
6934 
6935 	/*
6936 	 *  Make the task table available to SCRIPTS,
6937 	 *  And accept tagged commands now.
6938 	 */
6939 	lp->head.itlq_tbl_sa = cpu_to_scr(vtobus(lp->itlq_tbl));
6940 fail:
6941 	;
6942 }
6943 
6944 /*
6945  *  Test the pci bus snoop logic :-(
6946  *
6947  *  Has to be called with interrupts disabled.
6948  */
6949 #ifndef SYM_CONF_IOMAPPED
6950 static int sym_regtest (hcb_p np)
6951 {
6952 	volatile u32 data;
6953 	/*
6954 	 *  chip registers may NOT be cached.
6955 	 *  write 0xffffffff to a read only register area,
6956 	 *  and try to read it back.
6957 	 */
6958 	data = 0xffffffff;
6959 	OUTL_OFF(offsetof(struct sym_reg, nc_dstat), data);
6960 	data = INL_OFF(offsetof(struct sym_reg, nc_dstat));
6961 #if 1
6962 	if (data == 0xffffffff) {
6963 #else
6964 	if ((data & 0xe2f0fffd) != 0x02000080) {
6965 #endif
6966 		kprintf ("CACHE TEST FAILED: reg dstat-sstat2 readback %x.\n",
6967 			(unsigned) data);
6968 		return (0x10);
6969 	};
6970 	return (0);
6971 }
6972 #endif
6973 
6974 static int sym_snooptest (hcb_p np)
6975 {
6976 	u32	sym_rd, sym_wr, sym_bk, host_rd, host_wr, pc, dstat;
6977 	int	i, err=0;
6978 #ifndef SYM_CONF_IOMAPPED
6979 	err |= sym_regtest (np);
6980 	if (err) return (err);
6981 #endif
6982 restart_test:
6983 	/*
6984 	 *  Enable Master Parity Checking as we intend
6985 	 *  to enable it for normal operations.
6986 	 */
6987 	OUTB (nc_ctest4, (np->rv_ctest4 & MPEE));
6988 	/*
6989 	 *  init
6990 	 */
6991 	pc  = SCRIPTB0_BA (np, snooptest);
6992 	host_wr = 1;
6993 	sym_wr  = 2;
6994 	/*
6995 	 *  Set memory and register.
6996 	 */
6997 	np->cache = cpu_to_scr(host_wr);
6998 	OUTL (nc_temp, sym_wr);
6999 	/*
7000 	 *  Start script (exchange values)
7001 	 */
7002 	OUTL (nc_dsa, np->hcb_ba);
7003 	OUTL_DSP (pc);
7004 	/*
7005 	 *  Wait 'til done (with timeout)
7006 	 */
7007 	for (i=0; i<SYM_SNOOP_TIMEOUT; i++)
7008 		if (INB(nc_istat) & (INTF|SIP|DIP))
7009 			break;
7010 	if (i>=SYM_SNOOP_TIMEOUT) {
7011 		kprintf ("CACHE TEST FAILED: timeout.\n");
7012 		return (0x20);
7013 	};
7014 	/*
7015 	 *  Check for fatal DMA errors.
7016 	 */
7017 	dstat = INB (nc_dstat);
7018 #if 1	/* Band aiding for broken hardwares that fail PCI parity */
7019 	if ((dstat & MDPE) && (np->rv_ctest4 & MPEE)) {
7020 		kprintf ("%s: PCI DATA PARITY ERROR DETECTED - "
7021 			"DISABLING MASTER DATA PARITY CHECKING.\n",
7022 			sym_name(np));
7023 		np->rv_ctest4 &= ~MPEE;
7024 		goto restart_test;
7025 	}
7026 #endif
7027 	if (dstat & (MDPE|BF|IID)) {
7028 		kprintf ("CACHE TEST FAILED: DMA error (dstat=0x%02x).", dstat);
7029 		return (0x80);
7030 	}
7031 	/*
7032 	 *  Save termination position.
7033 	 */
7034 	pc = INL (nc_dsp);
7035 	/*
7036 	 *  Read memory and register.
7037 	 */
7038 	host_rd = scr_to_cpu(np->cache);
7039 	sym_rd  = INL (nc_scratcha);
7040 	sym_bk  = INL (nc_temp);
7041 
7042 	/*
7043 	 *  Check termination position.
7044 	 */
7045 	if (pc != SCRIPTB0_BA (np, snoopend)+8) {
7046 		kprintf ("CACHE TEST FAILED: script execution failed.\n");
7047 		kprintf ("start=%08lx, pc=%08lx, end=%08lx\n",
7048 			(u_long) SCRIPTB0_BA (np, snooptest), (u_long) pc,
7049 			(u_long) SCRIPTB0_BA (np, snoopend) +8);
7050 		return (0x40);
7051 	};
7052 	/*
7053 	 *  Show results.
7054 	 */
7055 	if (host_wr != sym_rd) {
7056 		kprintf ("CACHE TEST FAILED: host wrote %d, chip read %d.\n",
7057 			(int) host_wr, (int) sym_rd);
7058 		err |= 1;
7059 	};
7060 	if (host_rd != sym_wr) {
7061 		kprintf ("CACHE TEST FAILED: chip wrote %d, host read %d.\n",
7062 			(int) sym_wr, (int) host_rd);
7063 		err |= 2;
7064 	};
7065 	if (sym_bk != sym_wr) {
7066 		kprintf ("CACHE TEST FAILED: chip wrote %d, read back %d.\n",
7067 			(int) sym_wr, (int) sym_bk);
7068 		err |= 4;
7069 	};
7070 
7071 	return (err);
7072 }
7073 
7074 /*
7075  *  Determine the chip's clock frequency.
7076  *
7077  *  This is essential for the negotiation of the synchronous
7078  *  transfer rate.
7079  *
7080  *  Note: we have to return the correct value.
7081  *  THERE IS NO SAFE DEFAULT VALUE.
7082  *
7083  *  Most NCR/SYMBIOS boards are delivered with a 40 Mhz clock.
7084  *  53C860 and 53C875 rev. 1 support fast20 transfers but
7085  *  do not have a clock doubler and so are provided with a
7086  *  80 MHz clock. All other fast20 boards incorporate a doubler
7087  *  and so should be delivered with a 40 MHz clock.
7088  *  The recent fast40 chips (895/896/895A/1010) use a 40 Mhz base
7089  *  clock and provide a clock quadrupler (160 Mhz).
7090  */
7091 
7092 /*
7093  *  Select SCSI clock frequency
7094  */
7095 static void sym_selectclock(hcb_p np, u_char scntl3)
7096 {
7097 	/*
7098 	 *  If multiplier not present or not selected, leave here.
7099 	 */
7100 	if (np->multiplier <= 1) {
7101 		OUTB(nc_scntl3,	scntl3);
7102 		return;
7103 	}
7104 
7105 	if (sym_verbose >= 2)
7106 		kprintf ("%s: enabling clock multiplier\n", sym_name(np));
7107 
7108 	OUTB(nc_stest1, DBLEN);	   /* Enable clock multiplier		  */
7109 	/*
7110 	 *  Wait for the LCKFRQ bit to be set if supported by the chip.
7111 	 *  Otherwise wait 20 micro-seconds.
7112 	 */
7113 	if (np->features & FE_LCKFRQ) {
7114 		int i = 20;
7115 		while (!(INB(nc_stest4) & LCKFRQ) && --i > 0)
7116 			UDELAY (20);
7117 		if (!i)
7118 			kprintf("%s: the chip cannot lock the frequency\n",
7119 				sym_name(np));
7120 	} else
7121 		UDELAY (20);
7122 	OUTB(nc_stest3, HSC);		/* Halt the scsi clock		*/
7123 	OUTB(nc_scntl3,	scntl3);
7124 	OUTB(nc_stest1, (DBLEN|DBLSEL));/* Select clock multiplier	*/
7125 	OUTB(nc_stest3, 0x00);		/* Restart scsi clock 		*/
7126 }
7127 
7128 /*
7129  *  calculate SCSI clock frequency (in KHz)
7130  */
7131 static unsigned getfreq (hcb_p np, int gen)
7132 {
7133 	unsigned int ms = 0;
7134 	unsigned int f;
7135 
7136 	/*
7137 	 * Measure GEN timer delay in order
7138 	 * to calculate SCSI clock frequency
7139 	 *
7140 	 * This code will never execute too
7141 	 * many loop iterations (if DELAY is
7142 	 * reasonably correct). It could get
7143 	 * too low a delay (too high a freq.)
7144 	 * if the CPU is slow executing the
7145 	 * loop for some reason (an NMI, for
7146 	 * example). For this reason we will
7147 	 * if multiple measurements are to be
7148 	 * performed trust the higher delay
7149 	 * (lower frequency returned).
7150 	 */
7151 	OUTW (nc_sien , 0);	/* mask all scsi interrupts */
7152 	(void) INW (nc_sist);	/* clear pending scsi interrupt */
7153 	OUTB (nc_dien , 0);	/* mask all dma interrupts */
7154 	(void) INW (nc_sist);	/* another one, just to be sure :) */
7155 	OUTB (nc_scntl3, 4);	/* set pre-scaler to divide by 3 */
7156 	OUTB (nc_stime1, 0);	/* disable general purpose timer */
7157 	OUTB (nc_stime1, gen);	/* set to nominal delay of 1<<gen * 125us */
7158 	while (!(INW(nc_sist) & GEN) && ms++ < 100000)
7159 		UDELAY (1000);	/* count ms */
7160 	OUTB (nc_stime1, 0);	/* disable general purpose timer */
7161  	/*
7162  	 * set prescaler to divide by whatever 0 means
7163  	 * 0 ought to choose divide by 2, but appears
7164  	 * to set divide by 3.5 mode in my 53c810 ...
7165  	 */
7166  	OUTB (nc_scntl3, 0);
7167 
7168   	/*
7169  	 * adjust for prescaler, and convert into KHz
7170   	 */
7171 	f = ms ? ((1 << gen) * 4340) / ms : 0;
7172 
7173 	if (sym_verbose >= 2)
7174 		kprintf ("%s: Delay (GEN=%d): %u msec, %u KHz\n",
7175 			sym_name(np), gen, ms, f);
7176 
7177 	return f;
7178 }
7179 
7180 static unsigned sym_getfreq (hcb_p np)
7181 {
7182 	u_int f1, f2;
7183 	int gen = 11;
7184 
7185 	(void) getfreq (np, gen);	/* throw away first result */
7186 	f1 = getfreq (np, gen);
7187 	f2 = getfreq (np, gen);
7188 	if (f1 > f2) f1 = f2;		/* trust lower result	*/
7189 	return f1;
7190 }
7191 
7192 /*
7193  *  Get/probe chip SCSI clock frequency
7194  */
7195 static void sym_getclock (hcb_p np, int mult)
7196 {
7197 	unsigned char scntl3 = np->sv_scntl3;
7198 	unsigned char stest1 = np->sv_stest1;
7199 	unsigned f1;
7200 
7201 	/*
7202 	 *  For the C10 core, assume 40 MHz.
7203 	 */
7204 	if (np->features & FE_C10) {
7205 		np->multiplier = mult;
7206 		np->clock_khz = 40000 * mult;
7207 		return;
7208 	}
7209 
7210 	np->multiplier = 1;
7211 	f1 = 40000;
7212 	/*
7213 	 *  True with 875/895/896/895A with clock multiplier selected
7214 	 */
7215 	if (mult > 1 && (stest1 & (DBLEN+DBLSEL)) == DBLEN+DBLSEL) {
7216 		if (sym_verbose >= 2)
7217 			kprintf ("%s: clock multiplier found\n", sym_name(np));
7218 		np->multiplier = mult;
7219 	}
7220 
7221 	/*
7222 	 *  If multiplier not found or scntl3 not 7,5,3,
7223 	 *  reset chip and get frequency from general purpose timer.
7224 	 *  Otherwise trust scntl3 BIOS setting.
7225 	 */
7226 	if (np->multiplier != mult || (scntl3 & 7) < 3 || !(scntl3 & 1)) {
7227 		OUTB (nc_stest1, 0);		/* make sure doubler is OFF */
7228 		f1 = sym_getfreq (np);
7229 
7230 		if (sym_verbose)
7231 			kprintf ("%s: chip clock is %uKHz\n", sym_name(np), f1);
7232 
7233 		if	(f1 <	45000)		f1 =  40000;
7234 		else if (f1 <	55000)		f1 =  50000;
7235 		else				f1 =  80000;
7236 
7237 		if (f1 < 80000 && mult > 1) {
7238 			if (sym_verbose >= 2)
7239 				kprintf ("%s: clock multiplier assumed\n",
7240 					sym_name(np));
7241 			np->multiplier	= mult;
7242 		}
7243 	} else {
7244 		if	((scntl3 & 7) == 3)	f1 =  40000;
7245 		else if	((scntl3 & 7) == 5)	f1 =  80000;
7246 		else 				f1 = 160000;
7247 
7248 		f1 /= np->multiplier;
7249 	}
7250 
7251 	/*
7252 	 *  Compute controller synchronous parameters.
7253 	 */
7254 	f1		*= np->multiplier;
7255 	np->clock_khz	= f1;
7256 }
7257 
7258 /*
7259  *  Get/probe PCI clock frequency
7260  */
7261 static int sym_getpciclock (hcb_p np)
7262 {
7263 	int f = 0;
7264 
7265 	/*
7266 	 *  For the C1010-33, this doesn't work.
7267 	 *  For the C1010-66, this will be tested when I'll have
7268 	 *  such a beast to play with.
7269 	 */
7270 	if (!(np->features & FE_C10)) {
7271 		OUTB (nc_stest1, SCLK);	/* Use the PCI clock as SCSI clock */
7272 		f = (int) sym_getfreq (np);
7273 		OUTB (nc_stest1, 0);
7274 	}
7275 	np->pciclk_khz = f;
7276 
7277 	return f;
7278 }
7279 
7280 /*============= DRIVER ACTION/COMPLETION ====================*/
7281 
7282 /*
7283  *  Print something that tells about extended errors.
7284  */
7285 static void sym_print_xerr(ccb_p cp, int x_status)
7286 {
7287 	if (x_status & XE_PARITY_ERR) {
7288 		PRINT_ADDR(cp);
7289 		kprintf ("unrecovered SCSI parity error.\n");
7290 	}
7291 	if (x_status & XE_EXTRA_DATA) {
7292 		PRINT_ADDR(cp);
7293 		kprintf ("extraneous data discarded.\n");
7294 	}
7295 	if (x_status & XE_BAD_PHASE) {
7296 		PRINT_ADDR(cp);
7297 		kprintf ("illegal scsi phase (4/5).\n");
7298 	}
7299 	if (x_status & XE_SODL_UNRUN) {
7300 		PRINT_ADDR(cp);
7301 		kprintf ("ODD transfer in DATA OUT phase.\n");
7302 	}
7303 	if (x_status & XE_SWIDE_OVRUN) {
7304 		PRINT_ADDR(cp);
7305 		kprintf ("ODD transfer in DATA IN phase.\n");
7306 	}
7307 }
7308 
7309 /*
7310  *  Choose the more appropriate CAM status if
7311  *  the IO encountered an extended error.
7312  */
7313 static int sym_xerr_cam_status(int cam_status, int x_status)
7314 {
7315 	if (x_status) {
7316 		if	(x_status & XE_PARITY_ERR)
7317 			cam_status = CAM_UNCOR_PARITY;
7318 		else if	(x_status &(XE_EXTRA_DATA|XE_SODL_UNRUN|XE_SWIDE_OVRUN))
7319 			cam_status = CAM_DATA_RUN_ERR;
7320 		else if	(x_status & XE_BAD_PHASE)
7321 			cam_status = CAM_REQ_CMP_ERR;
7322 		else
7323 			cam_status = CAM_REQ_CMP_ERR;
7324 	}
7325 	return cam_status;
7326 }
7327 
7328 /*
7329  *  Complete execution of a SCSI command with extented
7330  *  error, SCSI status error, or having been auto-sensed.
7331  *
7332  *  The SCRIPTS processor is not running there, so we
7333  *  can safely access IO registers and remove JOBs from
7334  *  the START queue.
7335  *  SCRATCHA is assumed to have been loaded with STARTPOS
7336  *  before the SCRIPTS called the C code.
7337  */
7338 static void sym_complete_error (hcb_p np, ccb_p cp)
7339 {
7340 	struct ccb_scsiio *csio;
7341 	u_int cam_status;
7342 	int i;
7343 
7344 	/*
7345 	 *  Paranoid check. :)
7346 	 */
7347 	if (!cp || !cp->cam_ccb)
7348 		return;
7349 
7350 	if (DEBUG_FLAGS & (DEBUG_TINY|DEBUG_RESULT)) {
7351 		kprintf ("CCB=%lx STAT=%x/%x/%x DEV=%d/%d\n", (unsigned long)cp,
7352 			cp->host_status, cp->ssss_status, cp->host_flags,
7353 			cp->target, cp->lun);
7354 		MDELAY(100);
7355 	}
7356 
7357 	/*
7358 	 *  Get CAM command pointer.
7359 	 */
7360 	csio = &cp->cam_ccb->csio;
7361 
7362 	/*
7363 	 *  Check for extended errors.
7364 	 */
7365 	if (cp->xerr_status) {
7366 		if (sym_verbose)
7367 			sym_print_xerr(cp, cp->xerr_status);
7368 		if (cp->host_status == HS_COMPLETE)
7369 			cp->host_status = HS_COMP_ERR;
7370 	}
7371 
7372 	/*
7373 	 *  Calculate the residual.
7374 	 */
7375 	csio->sense_resid = 0;
7376 	csio->resid = sym_compute_residual(np, cp);
7377 
7378 	if (!SYM_CONF_RESIDUAL_SUPPORT) {/* If user does not want residuals */
7379 		csio->resid  = 0;	/* throw them away. :)		   */
7380 		cp->sv_resid = 0;
7381 	}
7382 
7383 	if (cp->host_flags & HF_SENSE) {		/* Auto sense     */
7384 		csio->scsi_status = cp->sv_scsi_status;	/* Restore status */
7385 		csio->sense_resid = csio->resid;	/* Swap residuals */
7386 		csio->resid       = cp->sv_resid;
7387 		cp->sv_resid	  = 0;
7388 		if (sym_verbose && cp->sv_xerr_status)
7389 			sym_print_xerr(cp, cp->sv_xerr_status);
7390 		if (cp->host_status == HS_COMPLETE &&
7391 		    cp->ssss_status == S_GOOD &&
7392 		    cp->xerr_status == 0) {
7393 			cam_status = sym_xerr_cam_status(CAM_SCSI_STATUS_ERROR,
7394 							 cp->sv_xerr_status);
7395 			cam_status |= CAM_AUTOSNS_VALID;
7396 			/*
7397 			 *  Bounce back the sense data to user and
7398 			 *  fix the residual.
7399 			 */
7400 			bzero(&csio->sense_data, csio->sense_len);
7401 			bcopy(cp->sns_bbuf, &csio->sense_data,
7402 			      MIN(csio->sense_len, SYM_SNS_BBUF_LEN));
7403 			csio->sense_resid += csio->sense_len;
7404 			csio->sense_resid -= SYM_SNS_BBUF_LEN;
7405 #if 0
7406 			/*
7407 			 *  If the device reports a UNIT ATTENTION condition
7408 			 *  due to a RESET condition, we should consider all
7409 			 *  disconnect CCBs for this unit as aborted.
7410 			 */
7411 			if (1) {
7412 				u_char *p;
7413 				p  = (u_char *) csio->sense_data;
7414 				if (p[0]==0x70 && p[2]==0x6 && p[12]==0x29)
7415 					sym_clear_tasks(np, CAM_REQ_ABORTED,
7416 							cp->target,cp->lun, -1);
7417 			}
7418 #endif
7419 		}
7420 		else
7421 			cam_status = CAM_AUTOSENSE_FAIL;
7422 	}
7423 	else if (cp->host_status == HS_COMPLETE) {	/* Bad SCSI status */
7424 		csio->scsi_status = cp->ssss_status;
7425 		cam_status = CAM_SCSI_STATUS_ERROR;
7426 	}
7427 	else if (cp->host_status == HS_SEL_TIMEOUT)	/* Selection timeout */
7428 		cam_status = CAM_SEL_TIMEOUT;
7429 	else if (cp->host_status == HS_UNEXPECTED)	/* Unexpected BUS FREE*/
7430 		cam_status = CAM_UNEXP_BUSFREE;
7431 	else {						/* Extended error */
7432 		if (sym_verbose) {
7433 			PRINT_ADDR(cp);
7434 			kprintf ("COMMAND FAILED (%x %x %x).\n",
7435 				cp->host_status, cp->ssss_status,
7436 				cp->xerr_status);
7437 		}
7438 		csio->scsi_status = cp->ssss_status;
7439 		/*
7440 		 *  Set the most appropriate value for CAM status.
7441 		 */
7442 		cam_status = sym_xerr_cam_status(CAM_REQ_CMP_ERR,
7443 						 cp->xerr_status);
7444 	}
7445 
7446 	/*
7447 	 *  Dequeue all queued CCBs for that device
7448 	 *  not yet started by SCRIPTS.
7449 	 */
7450 	i = (INL (nc_scratcha) - np->squeue_ba) / 4;
7451 	(void) sym_dequeue_from_squeue(np, i, cp->target, cp->lun, -1);
7452 
7453 	/*
7454 	 *  Restart the SCRIPTS processor.
7455 	 */
7456 	OUTL_DSP (SCRIPTA_BA (np, start));
7457 
7458 #ifdef	FreeBSD_Bus_Dma_Abstraction
7459 	/*
7460 	 *  Synchronize DMA map if needed.
7461 	 */
7462 	if (cp->dmamapped) {
7463 		bus_dmamap_sync(np->data_dmat, cp->dmamap,
7464 			(bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7465 				BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7466 	}
7467 #endif
7468 	/*
7469 	 *  Add this one to the COMP queue.
7470 	 *  Complete all those commands with either error
7471 	 *  or requeue condition.
7472 	 */
7473 	sym_set_cam_status((union ccb *) csio, cam_status);
7474 	sym_remque(&cp->link_ccbq);
7475 	sym_insque_head(&cp->link_ccbq, &np->comp_ccbq);
7476 	sym_flush_comp_queue(np, 0);
7477 }
7478 
7479 /*
7480  *  Complete execution of a successful SCSI command.
7481  *
7482  *  Only successful commands go to the DONE queue,
7483  *  since we need to have the SCRIPTS processor
7484  *  stopped on any error condition.
7485  *  The SCRIPTS processor is running while we are
7486  *  completing successful commands.
7487  */
7488 static void sym_complete_ok (hcb_p np, ccb_p cp)
7489 {
7490 	struct ccb_scsiio *csio;
7491 	tcb_p tp;
7492 	lcb_p lp;
7493 
7494 	/*
7495 	 *  Paranoid check. :)
7496 	 */
7497 	if (!cp || !cp->cam_ccb)
7498 		return;
7499 	assert (cp->host_status == HS_COMPLETE);
7500 
7501 	/*
7502 	 *  Get command, target and lun pointers.
7503 	 */
7504 	csio = &cp->cam_ccb->csio;
7505 	tp = &np->target[cp->target];
7506 	lp = sym_lp(np, tp, cp->lun);
7507 
7508 	/*
7509 	 *  Assume device discovered on first success.
7510 	 */
7511 	if (!lp)
7512 		sym_set_bit(tp->lun_map, cp->lun);
7513 
7514 	/*
7515 	 *  If all data have been transferred, given than no
7516 	 *  extended error did occur, there is no residual.
7517 	 */
7518 	csio->resid = 0;
7519 	if (cp->phys.head.lastp != cp->phys.head.goalp)
7520 		csio->resid = sym_compute_residual(np, cp);
7521 
7522 	/*
7523 	 *  Wrong transfer residuals may be worse than just always
7524 	 *  returning zero. User can disable this feature from
7525 	 *  sym_conf.h. Residual support is enabled by default.
7526 	 */
7527 	if (!SYM_CONF_RESIDUAL_SUPPORT)
7528 		csio->resid  = 0;
7529 
7530 #ifdef	FreeBSD_Bus_Dma_Abstraction
7531 	/*
7532 	 *  Synchronize DMA map if needed.
7533 	 */
7534 	if (cp->dmamapped) {
7535 		bus_dmamap_sync(np->data_dmat, cp->dmamap,
7536 			(bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
7537 				BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE));
7538 	}
7539 #endif
7540 	/*
7541 	 *  Set status and complete the command.
7542 	 */
7543 	csio->scsi_status = cp->ssss_status;
7544 	sym_set_cam_status((union ccb *) csio, CAM_REQ_CMP);
7545 	sym_free_ccb (np, cp);
7546 	sym_xpt_done(np, (union ccb *) csio);
7547 }
7548 
7549 /*
7550  *  Our timeout handler.
7551  */
7552 static void sym_timeout1(void *arg)
7553 {
7554 	union ccb *ccb = (union ccb *) arg;
7555 	hcb_p np = ccb->ccb_h.sym_hcb_ptr;
7556 
7557 	/*
7558 	 *  Check that the CAM CCB is still queued.
7559 	 */
7560 	if (!np)
7561 		return;
7562 
7563 	switch(ccb->ccb_h.func_code) {
7564 	case XPT_SCSI_IO:
7565 		(void) sym_abort_scsiio(np, ccb, 1);
7566 		break;
7567 	default:
7568 		break;
7569 	}
7570 }
7571 
7572 static void sym_timeout(void *arg)
7573 {
7574 	crit_enter();
7575 	sym_timeout1(arg);
7576 	crit_exit();
7577 }
7578 
7579 /*
7580  *  Abort an SCSI IO.
7581  */
7582 static int sym_abort_scsiio(hcb_p np, union ccb *ccb, int timed_out)
7583 {
7584 	ccb_p cp;
7585 	SYM_QUEHEAD *qp;
7586 
7587 	/*
7588 	 *  Look up our CCB control block.
7589 	 */
7590 	cp = 0;
7591 	FOR_EACH_QUEUED_ELEMENT(&np->busy_ccbq, qp) {
7592 		ccb_p cp2 = sym_que_entry(qp, struct sym_ccb, link_ccbq);
7593 		if (cp2->cam_ccb == ccb) {
7594 			cp = cp2;
7595 			break;
7596 		}
7597 	}
7598 	if (!cp || cp->host_status == HS_WAIT)
7599 		return -1;
7600 
7601 	/*
7602 	 *  If a previous abort didn't succeed in time,
7603 	 *  perform a BUS reset.
7604 	 */
7605 	if (cp->to_abort) {
7606 		sym_reset_scsi_bus(np, 1);
7607 		return 0;
7608 	}
7609 
7610 	/*
7611 	 *  Mark the CCB for abort and allow time for.
7612 	 */
7613 	cp->to_abort = timed_out ? 2 : 1;
7614 	callout_reset(&ccb->ccb_h.timeout_ch, 10 * hz, sym_timeout, ccb);
7615 
7616 	/*
7617 	 *  Tell the SCRIPTS processor to stop and synchronize with us.
7618 	 */
7619 	np->istat_sem = SEM;
7620 	OUTB (nc_istat, SIGP|SEM);
7621 	return 0;
7622 }
7623 
7624 /*
7625  *  Reset a SCSI device (all LUNs of a target).
7626  */
7627 static void sym_reset_dev(hcb_p np, union ccb *ccb)
7628 {
7629 	tcb_p tp;
7630 	struct ccb_hdr *ccb_h = &ccb->ccb_h;
7631 
7632 	if (ccb_h->target_id   == np->myaddr ||
7633 	    ccb_h->target_id   >= SYM_CONF_MAX_TARGET ||
7634 	    ccb_h->target_lun  >= SYM_CONF_MAX_LUN) {
7635 		sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7636 		return;
7637 	}
7638 
7639 	tp = &np->target[ccb_h->target_id];
7640 
7641 	tp->to_reset = 1;
7642 	sym_xpt_done2(np, ccb, CAM_REQ_CMP);
7643 
7644 	np->istat_sem = SEM;
7645 	OUTB (nc_istat, SIGP|SEM);
7646 	return;
7647 }
7648 
7649 /*
7650  *  SIM action entry point.
7651  */
7652 static void sym_action(struct cam_sim *sim, union ccb *ccb)
7653 {
7654 	crit_enter();
7655 	sym_action1(sim, ccb);
7656 	crit_exit();
7657 }
7658 
7659 static void sym_action1(struct cam_sim *sim, union ccb *ccb)
7660 {
7661 	hcb_p	np;
7662 	tcb_p	tp;
7663 	lcb_p	lp;
7664 	ccb_p	cp;
7665 	int 	tmp;
7666 	u_char	idmsg, *msgptr;
7667 	u_int   msglen;
7668 	struct	ccb_scsiio *csio;
7669 	struct	ccb_hdr  *ccb_h;
7670 
7671 	CAM_DEBUG(ccb->ccb_h.path, CAM_DEBUG_TRACE, ("sym_action\n"));
7672 
7673 	/*
7674 	 *  Retrieve our controller data structure.
7675 	 */
7676 	np = (hcb_p) cam_sim_softc(sim);
7677 
7678 	/*
7679 	 *  The common case is SCSI IO.
7680 	 *  We deal with other ones elsewhere.
7681 	 */
7682 	if (ccb->ccb_h.func_code != XPT_SCSI_IO) {
7683 		sym_action2(sim, ccb);
7684 		return;
7685 	}
7686 	csio  = &ccb->csio;
7687 	ccb_h = &csio->ccb_h;
7688 
7689 	/*
7690 	 *  Work around races.
7691 	 */
7692 	if ((ccb_h->status & CAM_STATUS_MASK) != CAM_REQ_INPROG) {
7693 		xpt_done(ccb);
7694 		return;
7695 	}
7696 
7697 	/*
7698 	 *  Minimal checkings, so that we will not
7699 	 *  go outside our tables.
7700 	 */
7701 	if (ccb_h->target_id   == np->myaddr ||
7702 	    ccb_h->target_id   >= SYM_CONF_MAX_TARGET ||
7703 	    ccb_h->target_lun  >= SYM_CONF_MAX_LUN) {
7704 		sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7705 		return;
7706         }
7707 
7708 	/*
7709 	 *  Retreive the target and lun descriptors.
7710 	 */
7711 	tp = &np->target[ccb_h->target_id];
7712 	lp = sym_lp(np, tp, ccb_h->target_lun);
7713 
7714 	/*
7715 	 *  Complete the 1st INQUIRY command with error
7716 	 *  condition if the device is flagged NOSCAN
7717 	 *  at BOOT in the NVRAM. This may speed up
7718 	 *  the boot and maintain coherency with BIOS
7719 	 *  device numbering. Clearing the flag allows
7720 	 *  user to rescan skipped devices later.
7721 	 *  We also return error for devices not flagged
7722 	 *  for SCAN LUNS in the NVRAM since some mono-lun
7723 	 *  devices behave badly when asked for some non
7724 	 *  zero LUN. Btw, this is an absolute hack.:-)
7725 	 */
7726 	if (!(ccb_h->flags & CAM_CDB_PHYS) &&
7727 	    (0x12 == ((ccb_h->flags & CAM_CDB_POINTER) ?
7728 		  csio->cdb_io.cdb_ptr[0] : csio->cdb_io.cdb_bytes[0]))) {
7729 		if ((tp->usrflags & SYM_SCAN_BOOT_DISABLED) ||
7730 		    ((tp->usrflags & SYM_SCAN_LUNS_DISABLED) &&
7731 		     ccb_h->target_lun != 0)) {
7732 			tp->usrflags &= ~SYM_SCAN_BOOT_DISABLED;
7733 			sym_xpt_done2(np, ccb, CAM_DEV_NOT_THERE);
7734 			return;
7735 		}
7736 	}
7737 
7738 	/*
7739 	 *  Get a control block for this IO.
7740 	 */
7741 	tmp = ((ccb_h->flags & CAM_TAG_ACTION_VALID) != 0);
7742 	cp = sym_get_ccb(np, ccb_h->target_id, ccb_h->target_lun, tmp);
7743 	if (!cp) {
7744 		sym_xpt_done2(np, ccb, CAM_RESRC_UNAVAIL);
7745 		return;
7746 	}
7747 
7748 	/*
7749 	 *  Keep track of the IO in our CCB.
7750 	 */
7751 	cp->cam_ccb = ccb;
7752 
7753 	/*
7754 	 *  Build the IDENTIFY message.
7755 	 */
7756 	idmsg = M_IDENTIFY | cp->lun;
7757 	if (cp->tag != NO_TAG || (lp && (lp->current_flags & SYM_DISC_ENABLED)))
7758 		idmsg |= 0x40;
7759 
7760 	msgptr = cp->scsi_smsg;
7761 	msglen = 0;
7762 	msgptr[msglen++] = idmsg;
7763 
7764 	/*
7765 	 *  Build the tag message if present.
7766 	 */
7767 	if (cp->tag != NO_TAG) {
7768 		u_char order = csio->tag_action;
7769 
7770 		switch(order) {
7771 		case M_ORDERED_TAG:
7772 			break;
7773 		case M_HEAD_TAG:
7774 			break;
7775 		default:
7776 			order = M_SIMPLE_TAG;
7777 		}
7778 		msgptr[msglen++] = order;
7779 
7780 		/*
7781 		 *  For less than 128 tags, actual tags are numbered
7782 		 *  1,3,5,..2*MAXTAGS+1,since we may have to deal
7783 		 *  with devices that have problems with #TAG 0 or too
7784 		 *  great #TAG numbers. For more tags (up to 256),
7785 		 *  we use directly our tag number.
7786 		 */
7787 #if SYM_CONF_MAX_TASK > (512/4)
7788 		msgptr[msglen++] = cp->tag;
7789 #else
7790 		msgptr[msglen++] = (cp->tag << 1) + 1;
7791 #endif
7792 	}
7793 
7794 	/*
7795 	 *  Build a negotiation message if needed.
7796 	 *  (nego_status is filled by sym_prepare_nego())
7797 	 */
7798 	cp->nego_status = 0;
7799 	if (tp->tinfo.current.width   != tp->tinfo.goal.width  ||
7800 	    tp->tinfo.current.period  != tp->tinfo.goal.period ||
7801 	    tp->tinfo.current.offset  != tp->tinfo.goal.offset ||
7802 	    tp->tinfo.current.options != tp->tinfo.goal.options) {
7803 		if (!tp->nego_cp && lp)
7804 			msglen += sym_prepare_nego(np, cp, 0, msgptr + msglen);
7805 	}
7806 
7807 	/*
7808 	 *  Fill in our ccb
7809 	 */
7810 
7811 	/*
7812 	 *  Startqueue
7813 	 */
7814 	cp->phys.head.go.start   = cpu_to_scr(SCRIPTA_BA (np, select));
7815 	cp->phys.head.go.restart = cpu_to_scr(SCRIPTA_BA (np, resel_dsa));
7816 
7817 	/*
7818 	 *  select
7819 	 */
7820 	cp->phys.select.sel_id		= cp->target;
7821 	cp->phys.select.sel_scntl3	= tp->head.wval;
7822 	cp->phys.select.sel_sxfer	= tp->head.sval;
7823 	cp->phys.select.sel_scntl4	= tp->head.uval;
7824 
7825 	/*
7826 	 *  message
7827 	 */
7828 	cp->phys.smsg.addr	= cpu_to_scr(CCB_BA (cp, scsi_smsg));
7829 	cp->phys.smsg.size	= cpu_to_scr(msglen);
7830 
7831 	/*
7832 	 *  command
7833 	 */
7834 	if (sym_setup_cdb(np, csio, cp) < 0) {
7835 		sym_free_ccb(np, cp);
7836 		sym_xpt_done(np, ccb);
7837 		return;
7838 	}
7839 
7840 	/*
7841 	 *  status
7842 	 */
7843 #if	0	/* Provision */
7844 	cp->actualquirks	= tp->quirks;
7845 #endif
7846 	cp->actualquirks	= SYM_QUIRK_AUTOSAVE;
7847 	cp->host_status		= cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
7848 	cp->ssss_status		= S_ILLEGAL;
7849 	cp->xerr_status		= 0;
7850 	cp->host_flags		= 0;
7851 	cp->extra_bytes		= 0;
7852 
7853 	/*
7854 	 *  extreme data pointer.
7855 	 *  shall be positive, so -1 is lower than lowest.:)
7856 	 */
7857 	cp->ext_sg  = -1;
7858 	cp->ext_ofs = 0;
7859 
7860 	/*
7861 	 *  Build the data descriptor block
7862 	 *  and start the IO.
7863 	 */
7864 	sym_setup_data_and_start(np, csio, cp);
7865 }
7866 
7867 /*
7868  *  Setup buffers and pointers that address the CDB.
7869  *  I bet, physical CDBs will never be used on the planet,
7870  *  since they can be bounced without significant overhead.
7871  */
7872 static int sym_setup_cdb(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
7873 {
7874 	struct ccb_hdr *ccb_h;
7875 	u32	cmd_ba;
7876 	int	cmd_len;
7877 
7878 	ccb_h = &csio->ccb_h;
7879 
7880 	/*
7881 	 *  CDB is 16 bytes max.
7882 	 */
7883 	if (csio->cdb_len > sizeof(cp->cdb_buf)) {
7884 		sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7885 		return -1;
7886 	}
7887 	cmd_len = csio->cdb_len;
7888 
7889 	if (ccb_h->flags & CAM_CDB_POINTER) {
7890 		/* CDB is a pointer */
7891 		if (!(ccb_h->flags & CAM_CDB_PHYS)) {
7892 			/* CDB pointer is virtual */
7893 			bcopy(csio->cdb_io.cdb_ptr, cp->cdb_buf, cmd_len);
7894 			cmd_ba = CCB_BA (cp, cdb_buf[0]);
7895 		} else {
7896 			/* CDB pointer is physical */
7897 #if 0
7898 			cmd_ba = ((u32)csio->cdb_io.cdb_ptr) & 0xffffffff;
7899 #else
7900 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
7901 			return -1;
7902 #endif
7903 		}
7904 	} else {
7905 		/* CDB is in the CAM ccb (buffer) */
7906 		bcopy(csio->cdb_io.cdb_bytes, cp->cdb_buf, cmd_len);
7907 		cmd_ba = CCB_BA (cp, cdb_buf[0]);
7908 	}
7909 
7910 	cp->phys.cmd.addr	= cpu_to_scr(cmd_ba);
7911 	cp->phys.cmd.size	= cpu_to_scr(cmd_len);
7912 
7913 	return 0;
7914 }
7915 
7916 /*
7917  *  Set up data pointers used by SCRIPTS.
7918  */
7919 static void __inline
7920 sym_setup_data_pointers(hcb_p np, ccb_p cp, int dir)
7921 {
7922 	u32 lastp, goalp;
7923 
7924 	/*
7925 	 *  No segments means no data.
7926 	 */
7927 	if (!cp->segments)
7928 		dir = CAM_DIR_NONE;
7929 
7930 	/*
7931 	 *  Set the data pointer.
7932 	 */
7933 	switch(dir) {
7934 	case CAM_DIR_OUT:
7935 		goalp = SCRIPTA_BA (np, data_out2) + 8;
7936 		lastp = goalp - 8 - (cp->segments * (2*4));
7937 		break;
7938 	case CAM_DIR_IN:
7939 		cp->host_flags |= HF_DATA_IN;
7940 		goalp = SCRIPTA_BA (np, data_in2) + 8;
7941 		lastp = goalp - 8 - (cp->segments * (2*4));
7942 		break;
7943 	case CAM_DIR_NONE:
7944 	default:
7945 		lastp = goalp = SCRIPTB_BA (np, no_data);
7946 		break;
7947 	}
7948 
7949 	cp->phys.head.lastp = cpu_to_scr(lastp);
7950 	cp->phys.head.goalp = cpu_to_scr(goalp);
7951 	cp->phys.head.savep = cpu_to_scr(lastp);
7952 	cp->startp	    = cp->phys.head.savep;
7953 }
7954 
7955 
7956 #ifdef	FreeBSD_Bus_Dma_Abstraction
7957 /*
7958  *  Call back routine for the DMA map service.
7959  *  If bounce buffers are used (why ?), we may sleep and then
7960  *  be called there in another context.
7961  */
7962 static void
7963 sym_execute_ccb(void *arg, bus_dma_segment_t *psegs, int nsegs, int error)
7964 {
7965 	ccb_p	cp;
7966 	hcb_p	np;
7967 	union	ccb *ccb;
7968 
7969 	crit_enter();
7970 
7971 	cp  = (ccb_p) arg;
7972 	ccb = cp->cam_ccb;
7973 	np  = (hcb_p) cp->arg;
7974 
7975 	/*
7976 	 *  Deal with weird races.
7977 	 */
7978 	if (sym_get_cam_status(ccb) != CAM_REQ_INPROG)
7979 		goto out_abort;
7980 
7981 	/*
7982 	 *  Deal with weird errors.
7983 	 */
7984 	if (error) {
7985 		cp->dmamapped = 0;
7986 		sym_set_cam_status(cp->cam_ccb, CAM_REQ_ABORTED);
7987 		goto out_abort;
7988 	}
7989 
7990 	/*
7991 	 *  Build the data descriptor for the chip.
7992 	 */
7993 	if (nsegs) {
7994 		int retv;
7995 		/* 896 rev 1 requires to be careful about boundaries */
7996 		if (np->device_id == PCI_ID_SYM53C896 && np->revision_id <= 1)
7997 			retv = sym_scatter_sg_physical(np, cp, psegs, nsegs);
7998 		else
7999 			retv = sym_fast_scatter_sg_physical(np,cp, psegs,nsegs);
8000 		if (retv < 0) {
8001 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8002 			goto out_abort;
8003 		}
8004 	}
8005 
8006 	/*
8007 	 *  Synchronize the DMA map only if we have
8008 	 *  actually mapped the data.
8009 	 */
8010 	if (cp->dmamapped) {
8011 		bus_dmamap_sync(np->data_dmat, cp->dmamap,
8012 			(bus_dmasync_op_t)(cp->dmamapped == SYM_DMA_READ ?
8013 				BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE));
8014 	}
8015 
8016 	/*
8017 	 *  Set host status to busy state.
8018 	 *  May have been set back to HS_WAIT to avoid a race.
8019 	 */
8020 	cp->host_status	= cp->nego_status ? HS_NEGOTIATE : HS_BUSY;
8021 
8022 	/*
8023 	 *  Set data pointers.
8024 	 */
8025 	sym_setup_data_pointers(np, cp,  (ccb->ccb_h.flags & CAM_DIR_MASK));
8026 
8027 	/*
8028 	 *  Enqueue this IO in our pending queue.
8029 	 */
8030 	sym_enqueue_cam_ccb(np, ccb);
8031 
8032 	/*
8033 	 *  When `#ifed 1', the code below makes the driver
8034 	 *  panic on the first attempt to write to a SCSI device.
8035 	 *  It is the first test we want to do after a driver
8036 	 *  change that does not seem obviously safe. :)
8037 	 */
8038 #if 0
8039 	switch (cp->cdb_buf[0]) {
8040 	case 0x0A: case 0x2A: case 0xAA:
8041 		panic("XXXXXXXXXXXXX WRITE NOT YET ALLOWED XXXXXXXXXXXXXX\n");
8042 		MDELAY(10000);
8043 		break;
8044 	default:
8045 		break;
8046 	}
8047 #endif
8048 	/*
8049 	 *  Activate this job.
8050 	 */
8051 	sym_put_start_queue(np, cp);
8052 out:
8053 	crit_exit();
8054 	return;
8055 out_abort:
8056 	sym_free_ccb(np, cp);
8057 	sym_xpt_done(np, ccb);
8058 	goto out;
8059 }
8060 
8061 /*
8062  *  How complex it gets to deal with the data in CAM.
8063  *  The Bus Dma stuff makes things still more complex.
8064  */
8065 static void
8066 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8067 {
8068 	struct ccb_hdr *ccb_h;
8069 	int dir, retv;
8070 
8071 	ccb_h = &csio->ccb_h;
8072 
8073 	/*
8074 	 *  Now deal with the data.
8075 	 */
8076 	cp->data_len = csio->dxfer_len;
8077 	cp->arg      = np;
8078 
8079 	/*
8080 	 *  No direction means no data.
8081 	 */
8082 	dir = (ccb_h->flags & CAM_DIR_MASK);
8083 	if (dir == CAM_DIR_NONE) {
8084 		sym_execute_ccb(cp, NULL, 0, 0);
8085 		return;
8086 	}
8087 
8088 	if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8089 		/* Single buffer */
8090 		if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8091 			/* Buffer is virtual */
8092 			cp->dmamapped = (dir == CAM_DIR_IN) ?
8093 						SYM_DMA_READ : SYM_DMA_WRITE;
8094 			crit_enter();
8095 			retv = bus_dmamap_load(np->data_dmat, cp->dmamap,
8096 					       csio->data_ptr, csio->dxfer_len,
8097 					       sym_execute_ccb, cp, 0);
8098 			if (retv == EINPROGRESS) {
8099 				cp->host_status	= HS_WAIT;
8100 				xpt_freeze_simq(np->sim, 1);
8101 				csio->ccb_h.status |= CAM_RELEASE_SIMQ;
8102 			}
8103 			crit_exit();
8104 		} else {
8105 			/* Buffer is physical */
8106 			struct bus_dma_segment seg;
8107 
8108 			seg.ds_addr = (bus_addr_t) csio->data_ptr;
8109 			sym_execute_ccb(cp, &seg, 1, 0);
8110 		}
8111 	} else {
8112 		/* Scatter/gather list */
8113 		struct bus_dma_segment *segs;
8114 
8115 		if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8116 			/* The SG list pointer is physical */
8117 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8118 			goto out_abort;
8119 		}
8120 
8121 		if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8122 			/* SG buffer pointers are virtual */
8123 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8124 			goto out_abort;
8125 		}
8126 
8127 		/* SG buffer pointers are physical */
8128 		segs  = (struct bus_dma_segment *)csio->data_ptr;
8129 		sym_execute_ccb(cp, segs, csio->sglist_cnt, 0);
8130 	}
8131 	return;
8132 out_abort:
8133 	sym_free_ccb(np, cp);
8134 	sym_xpt_done(np, (union ccb *) csio);
8135 }
8136 
8137 /*
8138  *  Move the scatter list to our data block.
8139  */
8140 static int
8141 sym_fast_scatter_sg_physical(hcb_p np, ccb_p cp,
8142 			     bus_dma_segment_t *psegs, int nsegs)
8143 {
8144 	struct sym_tblmove *data;
8145 	bus_dma_segment_t *psegs2;
8146 
8147 	if (nsegs > SYM_CONF_MAX_SG)
8148 		return -1;
8149 
8150 	data   = &cp->phys.data[SYM_CONF_MAX_SG-1];
8151 	psegs2 = &psegs[nsegs-1];
8152 	cp->segments = nsegs;
8153 
8154 	while (1) {
8155 		data->addr = cpu_to_scr(psegs2->ds_addr);
8156 		data->size = cpu_to_scr(psegs2->ds_len);
8157 		if (DEBUG_FLAGS & DEBUG_SCATTER) {
8158 			kprintf ("%s scatter: paddr=%lx len=%ld\n",
8159 				sym_name(np), (long) psegs2->ds_addr,
8160 				(long) psegs2->ds_len);
8161 		}
8162 		if (psegs2 != psegs) {
8163 			--data;
8164 			--psegs2;
8165 			continue;
8166 		}
8167 		break;
8168 	}
8169 	return 0;
8170 }
8171 
8172 #else	/* FreeBSD_Bus_Dma_Abstraction */
8173 
8174 /*
8175  *  How complex it gets to deal with the data in CAM.
8176  *  Variant without the Bus Dma Abstraction option.
8177  */
8178 static void
8179 sym_setup_data_and_start(hcb_p np, struct ccb_scsiio *csio, ccb_p cp)
8180 {
8181 	struct ccb_hdr *ccb_h;
8182 	int dir, retv;
8183 
8184 	ccb_h = &csio->ccb_h;
8185 
8186 	/*
8187 	 *  Now deal with the data.
8188 	 */
8189 	cp->data_len = 0;
8190 	cp->segments = 0;
8191 
8192 	/*
8193 	 *  No direction means no data.
8194 	 */
8195 	dir = (ccb_h->flags & CAM_DIR_MASK);
8196 	if (dir == CAM_DIR_NONE)
8197 		goto end_scatter;
8198 
8199 	if (!(ccb_h->flags & CAM_SCATTER_VALID)) {
8200 		/* Single buffer */
8201 		if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8202 			/* Buffer is virtual */
8203 			retv = sym_scatter_virtual(np, cp,
8204 						(vm_offset_t) csio->data_ptr,
8205 						(vm_size_t) csio->dxfer_len);
8206 		} else {
8207 			/* Buffer is physical */
8208 			retv = sym_scatter_physical(np, cp,
8209 						(vm_offset_t) csio->data_ptr,
8210 						(vm_size_t) csio->dxfer_len);
8211 		}
8212 	} else {
8213 		/* Scatter/gather list */
8214 		int nsegs;
8215 		struct bus_dma_segment *segs;
8216 		segs  = (struct bus_dma_segment *)csio->data_ptr;
8217 		nsegs = csio->sglist_cnt;
8218 
8219 		if ((ccb_h->flags & CAM_SG_LIST_PHYS) != 0) {
8220 			/* The SG list pointer is physical */
8221 			sym_set_cam_status(cp->cam_ccb, CAM_REQ_INVALID);
8222 			goto out_abort;
8223 		}
8224 		if (!(ccb_h->flags & CAM_DATA_PHYS)) {
8225 			/* SG buffer pointers are virtual */
8226 			retv = sym_scatter_sg_virtual(np, cp, segs, nsegs);
8227 		} else {
8228 			/* SG buffer pointers are physical */
8229 			retv = sym_scatter_sg_physical(np, cp, segs, nsegs);
8230 		}
8231 	}
8232 	if (retv < 0) {
8233 		sym_set_cam_status(cp->cam_ccb, CAM_REQ_TOO_BIG);
8234 		goto out_abort;
8235 	}
8236 
8237 end_scatter:
8238 	/*
8239 	 *  Set data pointers.
8240 	 */
8241 	sym_setup_data_pointers(np, cp, dir);
8242 
8243 	/*
8244 	 *  Enqueue this IO in our pending queue.
8245 	 */
8246 	sym_enqueue_cam_ccb(np, (union ccb *) csio);
8247 
8248 	/*
8249 	 *  Activate this job.
8250 	 */
8251 	sym_put_start_queue(np, cp);
8252 
8253 	/*
8254 	 *  Command is successfully queued.
8255 	 */
8256 	return;
8257 out_abort:
8258 	sym_free_ccb(np, cp);
8259 	sym_xpt_done(np, (union ccb *) csio);
8260 }
8261 
8262 /*
8263  *  Scatter a virtual buffer into bus addressable chunks.
8264  */
8265 static int
8266 sym_scatter_virtual(hcb_p np, ccb_p cp, vm_offset_t vaddr, vm_size_t len)
8267 {
8268 	u_long	pe, pn;
8269 	u_long	n, k;
8270 	int s;
8271 
8272 	cp->data_len += len;
8273 
8274 	pe = vaddr + len;
8275 	n  = len;
8276 	s  = SYM_CONF_MAX_SG - 1 - cp->segments;
8277 
8278 	while (n && s >= 0) {
8279 		pn = (pe - 1) & ~PAGE_MASK;
8280 		k = pe - pn;
8281 		if (k > n) {
8282 			k  = n;
8283 			pn = pe - n;
8284 		}
8285 		if (DEBUG_FLAGS & DEBUG_SCATTER) {
8286 			kprintf ("%s scatter: va=%lx pa=%lx siz=%ld\n",
8287 				sym_name(np), pn, (u_long) vtobus(pn), k);
8288 		}
8289 		cp->phys.data[s].addr = cpu_to_scr(vtobus(pn));
8290 		cp->phys.data[s].size = cpu_to_scr(k);
8291 		pe = pn;
8292 		n -= k;
8293 		--s;
8294 	}
8295 	cp->segments = SYM_CONF_MAX_SG - 1 - s;
8296 
8297 	return n ? -1 : 0;
8298 }
8299 
8300 /*
8301  *  Scatter a SG list with virtual addresses into bus addressable chunks.
8302  */
8303 static int
8304 sym_scatter_sg_virtual(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8305 {
8306 	int i, retv = 0;
8307 
8308 	for (i = nsegs - 1 ;  i >= 0 ; --i) {
8309 		retv = sym_scatter_virtual(np, cp,
8310 					   psegs[i].ds_addr, psegs[i].ds_len);
8311 		if (retv < 0)
8312 			break;
8313 	}
8314 	return retv;
8315 }
8316 
8317 /*
8318  *  Scatter a physical buffer into bus addressable chunks.
8319  */
8320 static int
8321 sym_scatter_physical(hcb_p np, ccb_p cp, vm_offset_t paddr, vm_size_t len)
8322 {
8323 	struct bus_dma_segment seg;
8324 
8325 	seg.ds_addr = paddr;
8326 	seg.ds_len  = len;
8327 	return sym_scatter_sg_physical(np, cp, &seg, 1);
8328 }
8329 
8330 #endif	/* FreeBSD_Bus_Dma_Abstraction */
8331 
8332 /*
8333  *  Scatter a SG list with physical addresses into bus addressable chunks.
8334  *  We need to ensure 16MB boundaries not to be crossed during DMA of
8335  *  each segment, due to some chips being flawed.
8336  */
8337 #define BOUND_MASK ((1UL<<24)-1)
8338 static int
8339 sym_scatter_sg_physical(hcb_p np, ccb_p cp, bus_dma_segment_t *psegs, int nsegs)
8340 {
8341 	u_long	ps, pe, pn;
8342 	u_long	k;
8343 	int s, t;
8344 
8345 #ifndef	FreeBSD_Bus_Dma_Abstraction
8346 	s  = SYM_CONF_MAX_SG - 1 - cp->segments;
8347 #else
8348 	s  = SYM_CONF_MAX_SG - 1;
8349 #endif
8350 	t  = nsegs - 1;
8351 	ps = psegs[t].ds_addr;
8352 	pe = ps + psegs[t].ds_len;
8353 
8354 	while (s >= 0) {
8355 		pn = (pe - 1) & ~BOUND_MASK;
8356 		if (pn <= ps)
8357 			pn = ps;
8358 		k = pe - pn;
8359 		if (DEBUG_FLAGS & DEBUG_SCATTER) {
8360 			kprintf ("%s scatter: paddr=%lx len=%ld\n",
8361 				sym_name(np), pn, k);
8362 		}
8363 		cp->phys.data[s].addr = cpu_to_scr(pn);
8364 		cp->phys.data[s].size = cpu_to_scr(k);
8365 #ifndef	FreeBSD_Bus_Dma_Abstraction
8366 		cp->data_len += k;
8367 #endif
8368 		--s;
8369 		if (pn == ps) {
8370 			if (--t < 0)
8371 				break;
8372 			ps = psegs[t].ds_addr;
8373 			pe = ps + psegs[t].ds_len;
8374 		}
8375 		else
8376 			pe = pn;
8377 	}
8378 
8379 	cp->segments = SYM_CONF_MAX_SG - 1 - s;
8380 
8381 	return t >= 0 ? -1 : 0;
8382 }
8383 #undef BOUND_MASK
8384 
8385 /*
8386  *  SIM action for non performance critical stuff.
8387  */
8388 static void sym_action2(struct cam_sim *sim, union ccb *ccb)
8389 {
8390 	hcb_p	np;
8391 	tcb_p	tp;
8392 	lcb_p	lp;
8393 	struct	ccb_hdr  *ccb_h;
8394 
8395 	/*
8396 	 *  Retrieve our controller data structure.
8397 	 */
8398 	np = (hcb_p) cam_sim_softc(sim);
8399 
8400 	ccb_h = &ccb->ccb_h;
8401 
8402 	switch (ccb_h->func_code) {
8403 	case XPT_SET_TRAN_SETTINGS:
8404 	{
8405 		struct ccb_trans_settings *cts;
8406 
8407 		cts  = &ccb->cts;
8408 		tp = &np->target[ccb_h->target_id];
8409 
8410 		/*
8411 		 *  Update SPI transport settings in TARGET control block.
8412 		 *  Update SCSI device settings in LUN control block.
8413 		 */
8414 		lp = sym_lp(np, tp, ccb_h->target_lun);
8415 #ifdef	FreeBSD_New_Tran_Settings
8416 		if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8417 #else
8418 		if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8419 #endif
8420 			sym_update_trans(np, tp, &tp->tinfo.goal, cts);
8421 			if (lp)
8422 				sym_update_dflags(np, &lp->current_flags, cts);
8423 		}
8424 #ifdef	FreeBSD_New_Tran_Settings
8425 		if (cts->type == CTS_TYPE_USER_SETTINGS) {
8426 #else
8427 		if ((cts->flags & CCB_TRANS_USER_SETTINGS) != 0) {
8428 #endif
8429 			sym_update_trans(np, tp, &tp->tinfo.user, cts);
8430 			if (lp)
8431 				sym_update_dflags(np, &lp->user_flags, cts);
8432 		}
8433 
8434 		sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8435 		break;
8436 	}
8437 	case XPT_GET_TRAN_SETTINGS:
8438 	{
8439 		struct ccb_trans_settings *cts;
8440 		struct sym_trans *tip;
8441 		u_char dflags;
8442 
8443 		cts = &ccb->cts;
8444 		tp = &np->target[ccb_h->target_id];
8445 		lp = sym_lp(np, tp, ccb_h->target_lun);
8446 
8447 #ifdef	FreeBSD_New_Tran_Settings
8448 #define	cts__scsi (&cts->proto_specific.scsi)
8449 #define	cts__spi  (&cts->xport_specific.spi)
8450 		if (cts->type == CTS_TYPE_CURRENT_SETTINGS) {
8451 			tip = &tp->tinfo.current;
8452 			dflags = lp ? lp->current_flags : 0;
8453 		}
8454 		else {
8455 			tip = &tp->tinfo.user;
8456 			dflags = lp ? lp->user_flags : tp->usrflags;
8457 		}
8458 
8459 		cts->protocol  = PROTO_SCSI;
8460 		cts->transport = XPORT_SPI;
8461 		cts->protocol_version  = tip->scsi_version;
8462 		cts->transport_version = tip->spi_version;
8463 
8464 		cts__spi->sync_period = tip->period;
8465 		cts__spi->sync_offset = tip->offset;
8466 		cts__spi->bus_width   = tip->width;
8467 		cts__spi->ppr_options = tip->options;
8468 
8469 		cts__spi->valid = CTS_SPI_VALID_SYNC_RATE
8470 		                | CTS_SPI_VALID_SYNC_OFFSET
8471 		                | CTS_SPI_VALID_BUS_WIDTH
8472 		                | CTS_SPI_VALID_PPR_OPTIONS;
8473 
8474 		cts__spi->flags &= ~CTS_SPI_FLAGS_DISC_ENB;
8475 		if (dflags & SYM_DISC_ENABLED)
8476 			cts__spi->flags |= CTS_SPI_FLAGS_DISC_ENB;
8477 		cts__spi->valid |= CTS_SPI_VALID_DISC;
8478 
8479 		cts__scsi->flags &= ~CTS_SCSI_FLAGS_TAG_ENB;
8480 		if (dflags & SYM_TAGS_ENABLED)
8481 			cts__scsi->flags |= CTS_SCSI_FLAGS_TAG_ENB;
8482 		cts__scsi->valid |= CTS_SCSI_VALID_TQ;
8483 #undef	cts__spi
8484 #undef	cts__scsi
8485 #else
8486 		if ((cts->flags & CCB_TRANS_CURRENT_SETTINGS) != 0) {
8487 			tip = &tp->tinfo.current;
8488 			dflags = lp ? lp->current_flags : 0;
8489 		}
8490 		else {
8491 			tip = &tp->tinfo.user;
8492 			dflags = lp ? lp->user_flags : tp->usrflags;
8493 		}
8494 
8495 		cts->sync_period = tip->period;
8496 		cts->sync_offset = tip->offset;
8497 		cts->bus_width   = tip->width;
8498 
8499 		cts->valid = CCB_TRANS_SYNC_RATE_VALID
8500 			   | CCB_TRANS_SYNC_OFFSET_VALID
8501 			   | CCB_TRANS_BUS_WIDTH_VALID;
8502 
8503 		cts->flags &= ~(CCB_TRANS_DISC_ENB|CCB_TRANS_TAG_ENB);
8504 
8505 		if (dflags & SYM_DISC_ENABLED)
8506 			cts->flags |= CCB_TRANS_DISC_ENB;
8507 
8508 		if (dflags & SYM_TAGS_ENABLED)
8509 			cts->flags |= CCB_TRANS_TAG_ENB;
8510 
8511 		cts->valid |= CCB_TRANS_DISC_VALID;
8512 		cts->valid |= CCB_TRANS_TQ_VALID;
8513 #endif
8514 		sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8515 		break;
8516 	}
8517 	case XPT_CALC_GEOMETRY:
8518 	{
8519 		struct ccb_calc_geometry *ccg;
8520 		u32 size_mb;
8521 		u32 secs_per_cylinder;
8522 		int extended;
8523 
8524 		/*
8525 		 *  Silly DOS geometry.
8526 		 */
8527 		ccg = &ccb->ccg;
8528 		size_mb = ccg->volume_size
8529 			/ ((1024L * 1024L) / ccg->block_size);
8530 		extended = 1;
8531 
8532 		if (size_mb > 1024 && extended) {
8533 			ccg->heads = 255;
8534 			ccg->secs_per_track = 63;
8535 		} else {
8536 			ccg->heads = 64;
8537 			ccg->secs_per_track = 32;
8538 		}
8539 		secs_per_cylinder = ccg->heads * ccg->secs_per_track;
8540 		ccg->cylinders = ccg->volume_size / secs_per_cylinder;
8541 		sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8542 		break;
8543 	}
8544 	case XPT_PATH_INQ:
8545 	{
8546 		struct ccb_pathinq *cpi = &ccb->cpi;
8547 		cpi->version_num = 1;
8548 		cpi->hba_inquiry = PI_MDP_ABLE|PI_SDTR_ABLE|PI_TAG_ABLE;
8549 		if ((np->features & FE_WIDE) != 0)
8550 			cpi->hba_inquiry |= PI_WIDE_16;
8551 		cpi->target_sprt = 0;
8552 		cpi->hba_misc = 0;
8553 		if (np->usrflags & SYM_SCAN_TARGETS_HILO)
8554 			cpi->hba_misc |= PIM_SCANHILO;
8555 		if (np->usrflags & SYM_AVOID_BUS_RESET)
8556 			cpi->hba_misc |= PIM_NOBUSRESET;
8557 		cpi->hba_eng_cnt = 0;
8558 		cpi->max_target = (np->features & FE_WIDE) ? 15 : 7;
8559 		/* Semantic problem:)LUN number max = max number of LUNs - 1 */
8560 		cpi->max_lun = SYM_CONF_MAX_LUN-1;
8561 		if (SYM_SETUP_MAX_LUN < SYM_CONF_MAX_LUN)
8562 			cpi->max_lun = SYM_SETUP_MAX_LUN-1;
8563 		cpi->bus_id = cam_sim_bus(sim);
8564 		cpi->initiator_id = np->myaddr;
8565 		cpi->base_transfer_speed = 3300;
8566 		strncpy(cpi->sim_vid, "FreeBSD", SIM_IDLEN);
8567 		strncpy(cpi->hba_vid, "Symbios", HBA_IDLEN);
8568 		strncpy(cpi->dev_name, cam_sim_name(sim), DEV_IDLEN);
8569 		cpi->unit_number = cam_sim_unit(sim);
8570 
8571 #ifdef	FreeBSD_New_Tran_Settings
8572 		cpi->protocol = PROTO_SCSI;
8573 		cpi->protocol_version = SCSI_REV_2;
8574 		cpi->transport = XPORT_SPI;
8575 		cpi->transport_version = 2;
8576 		cpi->xport_specific.spi.ppr_options = SID_SPI_CLOCK_ST;
8577 		if (np->features & FE_ULTRA3) {
8578 			cpi->transport_version = 3;
8579 			cpi->xport_specific.spi.ppr_options =
8580 			    SID_SPI_CLOCK_DT_ST;
8581 		}
8582 #endif
8583 		sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8584 		break;
8585 	}
8586 	case XPT_ABORT:
8587 	{
8588 		union ccb *abort_ccb = ccb->cab.abort_ccb;
8589 		switch(abort_ccb->ccb_h.func_code) {
8590 		case XPT_SCSI_IO:
8591 			if (sym_abort_scsiio(np, abort_ccb, 0) == 0) {
8592 				sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8593 				break;
8594 			}
8595 		default:
8596 			sym_xpt_done2(np, ccb, CAM_UA_ABORT);
8597 			break;
8598 		}
8599 		break;
8600 	}
8601 	case XPT_RESET_DEV:
8602 	{
8603 		sym_reset_dev(np, ccb);
8604 		break;
8605 	}
8606 	case XPT_RESET_BUS:
8607 	{
8608 		sym_reset_scsi_bus(np, 0);
8609 		if (sym_verbose) {
8610 			xpt_print_path(np->path);
8611 			kprintf("SCSI BUS reset delivered.\n");
8612 		}
8613 		sym_init (np, 1);
8614 		sym_xpt_done2(np, ccb, CAM_REQ_CMP);
8615 		break;
8616 	}
8617 	case XPT_ACCEPT_TARGET_IO:
8618 	case XPT_CONT_TARGET_IO:
8619 	case XPT_EN_LUN:
8620 	case XPT_NOTIFY_ACK:
8621 	case XPT_IMMED_NOTIFY:
8622 	case XPT_TERM_IO:
8623 	default:
8624 		sym_xpt_done2(np, ccb, CAM_REQ_INVALID);
8625 		break;
8626 	}
8627 }
8628 
8629 /*
8630  *  Asynchronous notification handler.
8631  */
8632 static void
8633 sym_async(void *cb_arg, u32 code, struct cam_path *path, void *arg)
8634 {
8635 	hcb_p np;
8636 	struct cam_sim *sim;
8637 	u_int tn;
8638 	tcb_p tp;
8639 
8640 	crit_enter();
8641 
8642 	sim = (struct cam_sim *) cb_arg;
8643 	np  = (hcb_p) cam_sim_softc(sim);
8644 
8645 	switch (code) {
8646 	case AC_LOST_DEVICE:
8647 		tn = xpt_path_target_id(path);
8648 		if (tn >= SYM_CONF_MAX_TARGET)
8649 			break;
8650 
8651 		tp = &np->target[tn];
8652 
8653 		tp->to_reset  = 0;
8654 		tp->head.sval = 0;
8655 		tp->head.wval = np->rv_scntl3;
8656 		tp->head.uval = 0;
8657 
8658 		tp->tinfo.current.period  = tp->tinfo.goal.period = 0;
8659 		tp->tinfo.current.offset  = tp->tinfo.goal.offset = 0;
8660 		tp->tinfo.current.width   = tp->tinfo.goal.width  = BUS_8_BIT;
8661 		tp->tinfo.current.options = tp->tinfo.goal.options = 0;
8662 
8663 		break;
8664 	default:
8665 		break;
8666 	}
8667 
8668 	crit_exit();
8669 }
8670 
8671 /*
8672  *  Update transfer settings of a target.
8673  */
8674 static void sym_update_trans(hcb_p np, tcb_p tp, struct sym_trans *tip,
8675 			    struct ccb_trans_settings *cts)
8676 {
8677 	/*
8678 	 *  Update the infos.
8679 	 */
8680 #ifdef	FreeBSD_New_Tran_Settings
8681 #define cts__spi (&cts->xport_specific.spi)
8682 	if ((cts__spi->valid & CTS_SPI_VALID_BUS_WIDTH) != 0)
8683 		tip->width = cts__spi->bus_width;
8684 	if ((cts__spi->valid & CTS_SPI_VALID_SYNC_OFFSET) != 0)
8685 		tip->offset = cts__spi->sync_offset;
8686 	if ((cts__spi->valid & CTS_SPI_VALID_SYNC_RATE) != 0)
8687 		tip->period = cts__spi->sync_period;
8688 	if ((cts__spi->valid & CTS_SPI_VALID_PPR_OPTIONS) != 0)
8689 		tip->options = (cts__spi->ppr_options & PPR_OPT_DT);
8690 	if (cts->protocol_version != PROTO_VERSION_UNSPECIFIED &&
8691 	    cts->protocol_version != PROTO_VERSION_UNKNOWN)
8692 		tip->scsi_version = cts->protocol_version;
8693 	if (cts->transport_version != XPORT_VERSION_UNSPECIFIED &&
8694 	    cts->transport_version != XPORT_VERSION_UNKNOWN)
8695 		tip->spi_version = cts->transport_version;
8696 #undef cts__spi
8697 #else
8698 	if ((cts->valid & CCB_TRANS_BUS_WIDTH_VALID) != 0)
8699 		tip->width = cts->bus_width;
8700 	if ((cts->valid & CCB_TRANS_SYNC_OFFSET_VALID) != 0)
8701 		tip->offset = cts->sync_offset;
8702 	if ((cts->valid & CCB_TRANS_SYNC_RATE_VALID) != 0)
8703 		tip->period = cts->sync_period;
8704 #endif
8705 	/*
8706 	 *  Scale against driver configuration limits.
8707 	 */
8708 	if (tip->width  > SYM_SETUP_MAX_WIDE) tip->width  = SYM_SETUP_MAX_WIDE;
8709 	if (tip->offset > SYM_SETUP_MAX_OFFS) tip->offset = SYM_SETUP_MAX_OFFS;
8710 	if (tip->period < SYM_SETUP_MIN_SYNC) tip->period = SYM_SETUP_MIN_SYNC;
8711 
8712 	/*
8713 	 *  Scale against actual controller BUS width.
8714 	 */
8715 	if (tip->width > np->maxwide)
8716 		tip->width  = np->maxwide;
8717 
8718 #ifdef	FreeBSD_New_Tran_Settings
8719 	/*
8720 	 *  Only accept DT if controller supports and SYNC/WIDE asked.
8721 	 */
8722 	if (!((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3)) ||
8723 	    !(tip->width == BUS_16_BIT && tip->offset)) {
8724 		tip->options &= ~PPR_OPT_DT;
8725 	}
8726 #else
8727 	/*
8728 	 *  For now, only assume DT if period <= 9, BUS 16 and offset != 0.
8729 	 */
8730 	tip->options = 0;
8731 	if ((np->features & (FE_C10|FE_ULTRA3)) == (FE_C10|FE_ULTRA3) &&
8732 	    tip->period <= 9 && tip->width == BUS_16_BIT && tip->offset) {
8733 		tip->options |= PPR_OPT_DT;
8734 	}
8735 #endif
8736 
8737 	/*
8738 	 *  Scale period factor and offset against controller limits.
8739 	 */
8740 	if (tip->options & PPR_OPT_DT) {
8741 		if (tip->period < np->minsync_dt)
8742 			tip->period = np->minsync_dt;
8743 		if (tip->period > np->maxsync_dt)
8744 			tip->period = np->maxsync_dt;
8745 		if (tip->offset > np->maxoffs_dt)
8746 			tip->offset = np->maxoffs_dt;
8747 	}
8748 	else {
8749 		if (tip->period < np->minsync)
8750 			tip->period = np->minsync;
8751 		if (tip->period > np->maxsync)
8752 			tip->period = np->maxsync;
8753 		if (tip->offset > np->maxoffs)
8754 			tip->offset = np->maxoffs;
8755 	}
8756 }
8757 
8758 /*
8759  *  Update flags for a device (logical unit).
8760  */
8761 static void
8762 sym_update_dflags(hcb_p np, u_char *flags, struct ccb_trans_settings *cts)
8763 {
8764 #ifdef	FreeBSD_New_Tran_Settings
8765 #define	cts__scsi (&cts->proto_specific.scsi)
8766 #define	cts__spi  (&cts->xport_specific.spi)
8767 	if ((cts__spi->valid & CTS_SPI_VALID_DISC) != 0) {
8768 		if ((cts__spi->flags & CTS_SPI_FLAGS_DISC_ENB) != 0)
8769 			*flags |= SYM_DISC_ENABLED;
8770 		else
8771 			*flags &= ~SYM_DISC_ENABLED;
8772 	}
8773 
8774 	if ((cts__scsi->valid & CTS_SCSI_VALID_TQ) != 0) {
8775 		if ((cts__scsi->flags & CTS_SCSI_FLAGS_TAG_ENB) != 0)
8776 			*flags |= SYM_TAGS_ENABLED;
8777 		else
8778 			*flags &= ~SYM_TAGS_ENABLED;
8779 	}
8780 #undef	cts__spi
8781 #undef	cts__scsi
8782 #else
8783 	if ((cts->valid & CCB_TRANS_DISC_VALID) != 0) {
8784 		if ((cts->flags & CCB_TRANS_DISC_ENB) != 0)
8785 			*flags |= SYM_DISC_ENABLED;
8786 		else
8787 			*flags &= ~SYM_DISC_ENABLED;
8788 	}
8789 
8790 	if ((cts->valid & CCB_TRANS_TQ_VALID) != 0) {
8791 		if ((cts->flags & CCB_TRANS_TAG_ENB) != 0)
8792 			*flags |= SYM_TAGS_ENABLED;
8793 		else
8794 			*flags &= ~SYM_TAGS_ENABLED;
8795 	}
8796 #endif
8797 }
8798 
8799 
8800 /*============= DRIVER INITIALISATION ==================*/
8801 
8802 #ifdef FreeBSD_Bus_Io_Abstraction
8803 
8804 static device_method_t sym_pci_methods[] = {
8805 	DEVMETHOD(device_probe,	 sym_pci_probe),
8806 	DEVMETHOD(device_attach, sym_pci_attach),
8807 	{ 0, 0 }
8808 };
8809 
8810 static driver_t sym_pci_driver = {
8811 	"sym",
8812 	sym_pci_methods,
8813 	sizeof(struct sym_hcb)
8814 };
8815 
8816 static devclass_t sym_devclass;
8817 
8818 DRIVER_MODULE(sym, pci, sym_pci_driver, sym_devclass, 0, 0);
8819 
8820 #else	/* Pre-FreeBSD_Bus_Io_Abstraction */
8821 
8822 static u_long sym_unit;
8823 
8824 static struct	pci_device sym_pci_driver = {
8825 	"sym",
8826 	sym_pci_probe,
8827 	sym_pci_attach,
8828 	&sym_unit,
8829 	NULL
8830 };
8831 
8832 #if 	defined(__DragonFly__) || __FreeBSD_version >= 400000
8833 COMPAT_PCI_DRIVER (sym, sym_pci_driver);
8834 #else
8835 DATA_SET (pcidevice_set, sym_pci_driver);
8836 #endif
8837 
8838 #endif /* FreeBSD_Bus_Io_Abstraction */
8839 
8840 static struct sym_pci_chip sym_pci_dev_table[] = {
8841  {PCI_ID_SYM53C810, 0x0f, "810", 4, 8, 4, 64,
8842  FE_ERL}
8843  ,
8844 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8845  {PCI_ID_SYM53C810, 0xff, "810a", 4,  8, 4, 1,
8846  FE_BOF}
8847  ,
8848 #else
8849  {PCI_ID_SYM53C810, 0xff, "810a", 4,  8, 4, 1,
8850  FE_CACHE_SET|FE_LDSTR|FE_PFEN|FE_BOF}
8851  ,
8852 #endif
8853  {PCI_ID_SYM53C815, 0xff, "815", 4,  8, 4, 64,
8854  FE_BOF|FE_ERL}
8855  ,
8856  {PCI_ID_SYM53C825, 0x0f, "825", 6,  8, 4, 64,
8857  FE_WIDE|FE_BOF|FE_ERL|FE_DIFF}
8858  ,
8859  {PCI_ID_SYM53C825, 0xff, "825a", 6,  8, 4, 2,
8860  FE_WIDE|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|FE_RAM|FE_DIFF}
8861  ,
8862  {PCI_ID_SYM53C860, 0xff, "860", 4,  8, 5, 1,
8863  FE_ULTRA|FE_CLK80|FE_CACHE_SET|FE_BOF|FE_LDSTR|FE_PFEN}
8864  ,
8865  {PCI_ID_SYM53C875, 0x01, "875", 6, 16, 5, 2,
8866  FE_WIDE|FE_ULTRA|FE_CLK80|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8867  FE_RAM|FE_DIFF}
8868  ,
8869  {PCI_ID_SYM53C875, 0xff, "875", 6, 16, 5, 2,
8870  FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8871  FE_RAM|FE_DIFF}
8872  ,
8873  {PCI_ID_SYM53C875_2, 0xff, "875", 6, 16, 5, 2,
8874  FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8875  FE_RAM|FE_DIFF}
8876  ,
8877  {PCI_ID_SYM53C885, 0xff, "885", 6, 16, 5, 2,
8878  FE_WIDE|FE_ULTRA|FE_DBLR|FE_CACHE0_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8879  FE_RAM|FE_DIFF}
8880  ,
8881 #ifdef SYM_DEBUG_GENERIC_SUPPORT
8882  {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8883  FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|
8884  FE_RAM|FE_LCKFRQ}
8885  ,
8886 #else
8887  {PCI_ID_SYM53C895, 0xff, "895", 6, 31, 7, 2,
8888  FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8889  FE_RAM|FE_LCKFRQ}
8890  ,
8891 #endif
8892  {PCI_ID_SYM53C896, 0xff, "896", 6, 31, 7, 4,
8893  FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8894  FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8895  ,
8896  {PCI_ID_SYM53C895A, 0xff, "895a", 6, 31, 7, 4,
8897  FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8898  FE_RAM|FE_RAM8K|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_LCKFRQ}
8899  ,
8900  {PCI_ID_LSI53C1010, 0x00, "1010-33", 6, 31, 7, 8,
8901  FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8902  FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8903  FE_C10}
8904  ,
8905  {PCI_ID_LSI53C1010, 0xff, "1010-33", 6, 31, 7, 8,
8906  FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8907  FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_CRC|
8908  FE_C10|FE_U3EN}
8909  ,
8910  {PCI_ID_LSI53C1010_2, 0xff, "1010-66", 6, 31, 7, 8,
8911  FE_WIDE|FE_ULTRA3|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFBC|FE_LDSTR|FE_PFEN|
8912  FE_RAM|FE_RAM8K|FE_64BIT|FE_DAC|FE_IO256|FE_NOPM|FE_LEDC|FE_66MHZ|FE_CRC|
8913  FE_C10|FE_U3EN}
8914  ,
8915  {PCI_ID_LSI53C1510D, 0xff, "1510d", 6, 31, 7, 4,
8916  FE_WIDE|FE_ULTRA2|FE_QUAD|FE_CACHE_SET|FE_BOF|FE_DFS|FE_LDSTR|FE_PFEN|
8917  FE_RAM|FE_IO256|FE_LEDC}
8918 };
8919 
8920 #define sym_pci_num_devs \
8921 	(sizeof(sym_pci_dev_table) / sizeof(sym_pci_dev_table[0]))
8922 
8923 /*
8924  *  Look up the chip table.
8925  *
8926  *  Return a pointer to the chip entry if found,
8927  *  zero otherwise.
8928  */
8929 static struct sym_pci_chip *
8930 #ifdef FreeBSD_Bus_Io_Abstraction
8931 sym_find_pci_chip(device_t dev)
8932 #else
8933 sym_find_pci_chip(pcici_t pci_tag)
8934 #endif
8935 {
8936 	struct	sym_pci_chip *chip;
8937 	int	i;
8938 	u_short	device_id;
8939 	u_char	revision;
8940 
8941 #ifdef FreeBSD_Bus_Io_Abstraction
8942 	if (pci_get_vendor(dev) != PCI_VENDOR_NCR)
8943 		return 0;
8944 
8945 	device_id = pci_get_device(dev);
8946 	revision  = pci_get_revid(dev);
8947 #else
8948 	if (pci_cfgread(pci_tag, PCIR_VENDOR, 2) != PCI_VENDOR_NCR)
8949 		return 0;
8950 
8951 	device_id = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
8952 	revision  = pci_cfgread(pci_tag, PCIR_REVID,  1);
8953 #endif
8954 
8955 	for (i = 0; i < sym_pci_num_devs; i++) {
8956 		chip = &sym_pci_dev_table[i];
8957 		if (device_id != chip->device_id)
8958 			continue;
8959 		if (revision > chip->revision_id)
8960 			continue;
8961 		return chip;
8962 	}
8963 
8964 	return 0;
8965 }
8966 
8967 /*
8968  *  Tell upper layer if the chip is supported.
8969  */
8970 #ifdef FreeBSD_Bus_Io_Abstraction
8971 static int
8972 sym_pci_probe(device_t dev)
8973 {
8974 	struct	sym_pci_chip *chip;
8975 
8976 	chip = sym_find_pci_chip(dev);
8977 	if (chip && sym_find_firmware(chip)) {
8978 		device_set_desc(dev, chip->name);
8979 		return (chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP)? -2000 : 0;
8980 	}
8981 	return ENXIO;
8982 }
8983 #else /* Pre-FreeBSD_Bus_Io_Abstraction */
8984 static const char *
8985 sym_pci_probe(pcici_t pci_tag, pcidi_t type)
8986 {
8987 	struct	sym_pci_chip *chip;
8988 
8989 	chip = sym_find_pci_chip(pci_tag);
8990 	if (chip && sym_find_firmware(chip)) {
8991 #if NNCR > 0
8992 	/* Only claim chips we are allowed to take precedence over the ncr */
8993 	if (!(chip->lp_probe_bit & SYM_SETUP_LP_PROBE_MAP))
8994 #else
8995 	if (1)
8996 #endif
8997 		return chip->name;
8998 	}
8999 	return 0;
9000 }
9001 #endif
9002 
9003 /*
9004  *  Attach a sym53c8xx device.
9005  */
9006 #ifdef FreeBSD_Bus_Io_Abstraction
9007 static int
9008 sym_pci_attach(device_t dev)
9009 #else
9010 static void
9011 sym_pci_attach(pcici_t pci_tag, int unit)
9012 {
9013 	int err = sym_pci_attach2(pci_tag, unit);
9014 	if (err)
9015 		kprintf("sym: failed to attach unit %d - err=%d.\n", unit, err);
9016 }
9017 static int
9018 sym_pci_attach2(pcici_t pci_tag, int unit)
9019 #endif
9020 {
9021 	struct	sym_pci_chip *chip;
9022 	u_short	command;
9023 	u_char	cachelnsz;
9024 	struct	sym_hcb *np = 0;
9025 	struct	sym_nvram nvram;
9026 	struct	sym_fw *fw = 0;
9027 	int 	i;
9028 #ifdef	FreeBSD_Bus_Dma_Abstraction
9029 	bus_dma_tag_t	bus_dmat;
9030 
9031 	/*
9032 	 *  I expected to be told about a parent
9033 	 *  DMA tag, but didn't find any.
9034 	 */
9035 	bus_dmat = NULL;
9036 #endif
9037 
9038 	/*
9039 	 *  Only probed devices should be attached.
9040 	 *  We just enjoy being paranoid. :)
9041 	 */
9042 #ifdef FreeBSD_Bus_Io_Abstraction
9043 	chip = sym_find_pci_chip(dev);
9044 #else
9045 	chip = sym_find_pci_chip(pci_tag);
9046 #endif
9047 	if (chip == NULL || (fw = sym_find_firmware(chip)) == NULL)
9048 		return (ENXIO);
9049 
9050 	/*
9051 	 *  Allocate immediately the host control block,
9052 	 *  since we are only expecting to succeed. :)
9053 	 *  We keep track in the HCB of all the resources that
9054 	 *  are to be released on error.
9055 	 */
9056 #ifdef	FreeBSD_Bus_Dma_Abstraction
9057 	np = __sym_calloc_dma(bus_dmat, sizeof(*np), "HCB");
9058 	if (np)
9059 		np->bus_dmat = bus_dmat;
9060 	else
9061 		goto attach_failed;
9062 #else
9063 	np = sym_calloc_dma(sizeof(*np), "HCB");
9064 	if (!np)
9065 		goto attach_failed;
9066 #endif
9067 
9068 	/*
9069 	 *  Copy some useful infos to the HCB.
9070 	 */
9071 	np->hcb_ba	 = vtobus(np);
9072 	np->verbose	 = bootverbose;
9073 #ifdef FreeBSD_Bus_Io_Abstraction
9074 	np->device	 = dev;
9075 	np->unit	 = device_get_unit(dev);
9076 	np->device_id	 = pci_get_device(dev);
9077 	np->revision_id  = pci_get_revid(dev);
9078 #else
9079 	np->pci_tag	 = pci_tag;
9080 	np->unit	 = unit;
9081 	np->device_id	 = pci_cfgread(pci_tag, PCIR_DEVICE, 2);
9082 	np->revision_id  = pci_cfgread(pci_tag, PCIR_REVID,  1);
9083 #endif
9084 	np->features	 = chip->features;
9085 	np->clock_divn	 = chip->nr_divisor;
9086 	np->maxoffs	 = chip->offset_max;
9087 	np->maxburst	 = chip->burst_max;
9088 	np->scripta_sz	 = fw->a_size;
9089 	np->scriptb_sz	 = fw->b_size;
9090 	np->fw_setup	 = fw->setup;
9091 	np->fw_patch	 = fw->patch;
9092 	np->fw_name	 = fw->name;
9093 
9094 	/*
9095 	 * Edit its name.
9096 	 */
9097 	ksnprintf(np->inst_name, sizeof(np->inst_name), "sym%d", np->unit);
9098 
9099 	/*
9100 	 *  Initialyze the CCB free and busy queues.
9101 	 */
9102 	sym_que_init(&np->free_ccbq);
9103 	sym_que_init(&np->busy_ccbq);
9104 	sym_que_init(&np->comp_ccbq);
9105 	sym_que_init(&np->cam_ccbq);
9106 
9107 	/*
9108 	 *  Allocate a tag for the DMA of user data.
9109 	 */
9110 #ifdef	FreeBSD_Bus_Dma_Abstraction
9111 	if (bus_dma_tag_create(np->bus_dmat, 1, (1<<24),
9112 				BUS_SPACE_MAXADDR, BUS_SPACE_MAXADDR,
9113 				NULL, NULL,
9114 				BUS_SPACE_MAXSIZE, SYM_CONF_MAX_SG,
9115 				(1<<24), 0, &np->data_dmat)) {
9116 		device_printf(dev, "failed to create DMA tag.\n");
9117 		goto attach_failed;
9118 	}
9119 #endif
9120 	/*
9121 	 *  Read and apply some fix-ups to the PCI COMMAND
9122 	 *  register. We want the chip to be enabled for:
9123 	 *  - BUS mastering
9124 	 *  - PCI parity checking (reporting would also be fine)
9125 	 *  - Write And Invalidate.
9126 	 */
9127 #ifdef FreeBSD_Bus_Io_Abstraction
9128 	command = pci_read_config(dev, PCIR_COMMAND, 2);
9129 #else
9130 	command = pci_cfgread(pci_tag, PCIR_COMMAND, 2);
9131 #endif
9132 	command |= PCIM_CMD_BUSMASTEREN;
9133 	command |= PCIM_CMD_PERRESPEN;
9134 	command |= /* PCIM_CMD_MWIEN */ 0x0010;
9135 #ifdef FreeBSD_Bus_Io_Abstraction
9136 	pci_write_config(dev, PCIR_COMMAND, command, 2);
9137 #else
9138 	pci_cfgwrite(pci_tag, PCIR_COMMAND, command, 2);
9139 #endif
9140 
9141 	/*
9142 	 *  Let the device know about the cache line size,
9143 	 *  if it doesn't yet.
9144 	 */
9145 #ifdef FreeBSD_Bus_Io_Abstraction
9146 	cachelnsz = pci_read_config(dev, PCIR_CACHELNSZ, 1);
9147 #else
9148 	cachelnsz = pci_cfgread(pci_tag, PCIR_CACHELNSZ, 1);
9149 #endif
9150 	if (!cachelnsz) {
9151 		cachelnsz = 8;
9152 #ifdef FreeBSD_Bus_Io_Abstraction
9153 		pci_write_config(dev, PCIR_CACHELNSZ, cachelnsz, 1);
9154 #else
9155 		pci_cfgwrite(pci_tag, PCIR_CACHELNSZ, cachelnsz, 1);
9156 #endif
9157 	}
9158 
9159 	/*
9160 	 *  Alloc/get/map/retrieve everything that deals with MMIO.
9161 	 */
9162 #ifdef FreeBSD_Bus_Io_Abstraction
9163 	if ((command & PCIM_CMD_MEMEN) != 0) {
9164 		int regs_id = SYM_PCI_MMIO;
9165 		np->mmio_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &regs_id,
9166 						  0, ~0, 1, RF_ACTIVE);
9167 	}
9168 	if (!np->mmio_res) {
9169 		device_printf(dev, "failed to allocate MMIO resources\n");
9170 		goto attach_failed;
9171 	}
9172 	np->mmio_bsh = rman_get_bushandle(np->mmio_res);
9173 	np->mmio_tag = rman_get_bustag(np->mmio_res);
9174 	np->mmio_pa  = rman_get_start(np->mmio_res);
9175 	np->mmio_va  = (vm_offset_t) rman_get_virtual(np->mmio_res);
9176 	np->mmio_ba  = np->mmio_pa;
9177 #else
9178 	if ((command & PCIM_CMD_MEMEN) != 0) {
9179 		vm_offset_t vaddr, paddr;
9180 		if (!pci_map_mem(pci_tag, SYM_PCI_MMIO, &vaddr, &paddr)) {
9181 			kprintf("%s: failed to map MMIO window\n", sym_name(np));
9182 			goto attach_failed;
9183 		}
9184 		np->mmio_va = vaddr;
9185 		np->mmio_pa = paddr;
9186 		np->mmio_ba = paddr;
9187 	}
9188 #endif
9189 
9190 	/*
9191 	 *  Allocate the IRQ.
9192 	 */
9193 #ifdef FreeBSD_Bus_Io_Abstraction
9194 	i = 0;
9195 	np->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &i,
9196 					 0, ~0, 1, RF_ACTIVE | RF_SHAREABLE);
9197 	if (!np->irq_res) {
9198 		device_printf(dev, "failed to allocate IRQ resource\n");
9199 		goto attach_failed;
9200 	}
9201 #endif
9202 
9203 #ifdef	SYM_CONF_IOMAPPED
9204 	/*
9205 	 *  User want us to use normal IO with PCI.
9206 	 *  Alloc/get/map/retrieve everything that deals with IO.
9207 	 */
9208 #ifdef FreeBSD_Bus_Io_Abstraction
9209 	if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9210 		int regs_id = SYM_PCI_IO;
9211 		np->io_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &regs_id,
9212 						0, ~0, 1, RF_ACTIVE);
9213 	}
9214 	if (!np->io_res) {
9215 		device_printf(dev, "failed to allocate IO resources\n");
9216 		goto attach_failed;
9217 	}
9218 	np->io_bsh  = rman_get_bushandle(np->io_res);
9219 	np->io_tag  = rman_get_bustag(np->io_res);
9220 	np->io_port = rman_get_start(np->io_res);
9221 #else
9222 	if ((command & PCI_COMMAND_IO_ENABLE) != 0) {
9223 		pci_port_t io_port;
9224 		if (!pci_map_port (pci_tag, SYM_PCI_IO, &io_port)) {
9225 			kprintf("%s: failed to map IO window\n", sym_name(np));
9226 			goto attach_failed;
9227 		}
9228 		np->io_port = io_port;
9229 	}
9230 #endif
9231 
9232 #endif /* SYM_CONF_IOMAPPED */
9233 
9234 	/*
9235 	 *  If the chip has RAM.
9236 	 *  Alloc/get/map/retrieve the corresponding resources.
9237 	 */
9238 	if ((np->features & (FE_RAM|FE_RAM8K)) &&
9239 	    (command & PCIM_CMD_MEMEN) != 0) {
9240 #ifdef FreeBSD_Bus_Io_Abstraction
9241 		int regs_id = SYM_PCI_RAM;
9242 		if (np->features & FE_64BIT)
9243 			regs_id = SYM_PCI_RAM64;
9244 		np->ram_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &regs_id,
9245 						 0, ~0, 1, RF_ACTIVE);
9246 		if (!np->ram_res) {
9247 			device_printf(dev,"failed to allocate RAM resources\n");
9248 			goto attach_failed;
9249 		}
9250 		np->ram_id  = regs_id;
9251 		np->ram_bsh = rman_get_bushandle(np->ram_res);
9252 		np->ram_tag = rman_get_bustag(np->ram_res);
9253 		np->ram_pa  = rman_get_start(np->ram_res);
9254 		np->ram_va  = (vm_offset_t) rman_get_virtual(np->ram_res);
9255 		np->ram_ba  = np->ram_pa;
9256 #else
9257 		vm_offset_t vaddr, paddr;
9258 		int regs_id = SYM_PCI_RAM;
9259 		if (np->features & FE_64BIT)
9260 			regs_id = SYM_PCI_RAM64;
9261 		if (!pci_map_mem(pci_tag, regs_id, &vaddr, &paddr)) {
9262 			kprintf("%s: failed to map RAM window\n", sym_name(np));
9263 			goto attach_failed;
9264 		}
9265 		np->ram_va = vaddr;
9266 		np->ram_pa = paddr;
9267 		np->ram_ba = paddr;
9268 #endif
9269 	}
9270 
9271 	/*
9272 	 *  Save setting of some IO registers, so we will
9273 	 *  be able to probe specific implementations.
9274 	 */
9275 	sym_save_initial_setting (np);
9276 
9277 	/*
9278 	 *  Reset the chip now, since it has been reported
9279 	 *  that SCSI clock calibration may not work properly
9280 	 *  if the chip is currently active.
9281 	 */
9282 	sym_chip_reset (np);
9283 
9284 	/*
9285 	 *  Try to read the user set-up.
9286 	 */
9287 	(void) sym_read_nvram(np, &nvram);
9288 
9289 	/*
9290 	 *  Prepare controller and devices settings, according
9291 	 *  to chip features, user set-up and driver set-up.
9292 	 */
9293 	(void) sym_prepare_setting(np, &nvram);
9294 
9295 	/*
9296 	 *  Check the PCI clock frequency.
9297 	 *  Must be performed after prepare_setting since it destroys
9298 	 *  STEST1 that is used to probe for the clock doubler.
9299 	 */
9300 	i = sym_getpciclock(np);
9301 	if (i > 37000)
9302 #ifdef FreeBSD_Bus_Io_Abstraction
9303 		device_printf(dev, "PCI BUS clock seems too high: %u KHz.\n",i);
9304 #else
9305 		kprintf("%s: PCI BUS clock seems too high: %u KHz.\n",
9306 			sym_name(np), i);
9307 #endif
9308 
9309 	/*
9310 	 *  Allocate the start queue.
9311 	 */
9312 	np->squeue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"SQUEUE");
9313 	if (!np->squeue)
9314 		goto attach_failed;
9315 	np->squeue_ba = vtobus(np->squeue);
9316 
9317 	/*
9318 	 *  Allocate the done queue.
9319 	 */
9320 	np->dqueue = (u32 *) sym_calloc_dma(sizeof(u32)*(MAX_QUEUE*2),"DQUEUE");
9321 	if (!np->dqueue)
9322 		goto attach_failed;
9323 	np->dqueue_ba = vtobus(np->dqueue);
9324 
9325 	/*
9326 	 *  Allocate the target bus address array.
9327 	 */
9328 	np->targtbl = (u32 *) sym_calloc_dma(256, "TARGTBL");
9329 	if (!np->targtbl)
9330 		goto attach_failed;
9331 	np->targtbl_ba = vtobus(np->targtbl);
9332 
9333 	/*
9334 	 *  Allocate SCRIPTS areas.
9335 	 */
9336 	np->scripta0 = sym_calloc_dma(np->scripta_sz, "SCRIPTA0");
9337 	np->scriptb0 = sym_calloc_dma(np->scriptb_sz, "SCRIPTB0");
9338 	if (!np->scripta0 || !np->scriptb0)
9339 		goto attach_failed;
9340 
9341 	/*
9342 	 *  Allocate some CCB. We need at least ONE.
9343 	 */
9344 	if (!sym_alloc_ccb(np))
9345 		goto attach_failed;
9346 
9347 	/*
9348 	 *  Calculate BUS addresses where we are going
9349 	 *  to load the SCRIPTS.
9350 	 */
9351 	np->scripta_ba	= vtobus(np->scripta0);
9352 	np->scriptb_ba	= vtobus(np->scriptb0);
9353 	np->scriptb0_ba	= np->scriptb_ba;
9354 
9355 	if (np->ram_ba) {
9356 		np->scripta_ba	= np->ram_ba;
9357 		if (np->features & FE_RAM8K) {
9358 			np->ram_ws = 8192;
9359 			np->scriptb_ba = np->scripta_ba + 4096;
9360 #if BITS_PER_LONG > 32
9361 			np->scr_ram_seg = cpu_to_scr(np->scripta_ba >> 32);
9362 #endif
9363 		}
9364 		else
9365 			np->ram_ws = 4096;
9366 	}
9367 
9368 	/*
9369 	 *  Copy scripts to controller instance.
9370 	 */
9371 	bcopy(fw->a_base, np->scripta0, np->scripta_sz);
9372 	bcopy(fw->b_base, np->scriptb0, np->scriptb_sz);
9373 
9374 	/*
9375 	 *  Setup variable parts in scripts and compute
9376 	 *  scripts bus addresses used from the C code.
9377 	 */
9378 	np->fw_setup(np, fw);
9379 
9380 	/*
9381 	 *  Bind SCRIPTS with physical addresses usable by the
9382 	 *  SCRIPTS processor (as seen from the BUS = BUS addresses).
9383 	 */
9384 	sym_fw_bind_script(np, (u32 *) np->scripta0, np->scripta_sz);
9385 	sym_fw_bind_script(np, (u32 *) np->scriptb0, np->scriptb_sz);
9386 
9387 #ifdef SYM_CONF_IARB_SUPPORT
9388 	/*
9389 	 *    If user wants IARB to be set when we win arbitration
9390 	 *    and have other jobs, compute the max number of consecutive
9391 	 *    settings of IARB hints before we leave devices a chance to
9392 	 *    arbitrate for reselection.
9393 	 */
9394 #ifdef	SYM_SETUP_IARB_MAX
9395 	np->iarb_max = SYM_SETUP_IARB_MAX;
9396 #else
9397 	np->iarb_max = 4;
9398 #endif
9399 #endif
9400 
9401 	/*
9402 	 *  Prepare the idle and invalid task actions.
9403 	 */
9404 	np->idletask.start	= cpu_to_scr(SCRIPTA_BA (np, idle));
9405 	np->idletask.restart	= cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9406 	np->idletask_ba		= vtobus(&np->idletask);
9407 
9408 	np->notask.start	= cpu_to_scr(SCRIPTA_BA (np, idle));
9409 	np->notask.restart	= cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9410 	np->notask_ba		= vtobus(&np->notask);
9411 
9412 	np->bad_itl.start	= cpu_to_scr(SCRIPTA_BA (np, idle));
9413 	np->bad_itl.restart	= cpu_to_scr(SCRIPTB_BA (np, bad_i_t_l));
9414 	np->bad_itl_ba		= vtobus(&np->bad_itl);
9415 
9416 	np->bad_itlq.start	= cpu_to_scr(SCRIPTA_BA (np, idle));
9417 	np->bad_itlq.restart	= cpu_to_scr(SCRIPTB_BA (np,bad_i_t_l_q));
9418 	np->bad_itlq_ba		= vtobus(&np->bad_itlq);
9419 
9420 	/*
9421 	 *  Allocate and prepare the lun JUMP table that is used
9422 	 *  for a target prior the probing of devices (bad lun table).
9423 	 *  A private table will be allocated for the target on the
9424 	 *  first INQUIRY response received.
9425 	 */
9426 	np->badluntbl = sym_calloc_dma(256, "BADLUNTBL");
9427 	if (!np->badluntbl)
9428 		goto attach_failed;
9429 
9430 	np->badlun_sa = cpu_to_scr(SCRIPTB_BA (np, resel_bad_lun));
9431 	for (i = 0 ; i < 64 ; i++)	/* 64 luns/target, no less */
9432 		np->badluntbl[i] = cpu_to_scr(vtobus(&np->badlun_sa));
9433 
9434 	/*
9435 	 *  Prepare the bus address array that contains the bus
9436 	 *  address of each target control block.
9437 	 *  For now, assume all logical units are wrong. :)
9438 	 */
9439 	for (i = 0 ; i < SYM_CONF_MAX_TARGET ; i++) {
9440 		np->targtbl[i] = cpu_to_scr(vtobus(&np->target[i]));
9441 		np->target[i].head.luntbl_sa =
9442 				cpu_to_scr(vtobus(np->badluntbl));
9443 		np->target[i].head.lun0_sa =
9444 				cpu_to_scr(vtobus(&np->badlun_sa));
9445 	}
9446 
9447 	/*
9448 	 *  Now check the cache handling of the pci chipset.
9449 	 */
9450 	if (sym_snooptest (np)) {
9451 #ifdef FreeBSD_Bus_Io_Abstraction
9452 		device_printf(dev, "CACHE INCORRECTLY CONFIGURED.\n");
9453 #else
9454 		kprintf("%s: CACHE INCORRECTLY CONFIGURED.\n", sym_name(np));
9455 #endif
9456 		goto attach_failed;
9457 	};
9458 
9459 	/*
9460 	 *  Now deal with CAM.
9461 	 *  Hopefully, we will succeed with that one.:)
9462 	 */
9463 	if (!sym_cam_attach(np))
9464 		goto attach_failed;
9465 
9466 	/*
9467 	 *  Sigh! we are done.
9468 	 */
9469 	return 0;
9470 
9471 	/*
9472 	 *  We have failed.
9473 	 *  We will try to free all the resources we have
9474 	 *  allocated, but if we are a boot device, this
9475 	 *  will not help that much.;)
9476 	 */
9477 attach_failed:
9478 	if (np)
9479 		sym_pci_free(np);
9480 	return ENXIO;
9481 }
9482 
9483 /*
9484  *  Free everything that have been allocated for this device.
9485  */
9486 static void sym_pci_free(hcb_p np)
9487 {
9488 	SYM_QUEHEAD *qp;
9489 	ccb_p cp;
9490 	tcb_p tp;
9491 	lcb_p lp;
9492 	int target, lun;
9493 
9494 	/*
9495 	 *  First free CAM resources.
9496 	 */
9497 	crit_enter();
9498 	sym_cam_free(np);
9499 	crit_exit();
9500 
9501 	/*
9502 	 *  Now every should be quiet for us to
9503 	 *  free other resources.
9504 	 */
9505 #ifdef FreeBSD_Bus_Io_Abstraction
9506 	if (np->ram_res)
9507 		bus_release_resource(np->device, SYS_RES_MEMORY,
9508 				     np->ram_id, np->ram_res);
9509 	if (np->mmio_res)
9510 		bus_release_resource(np->device, SYS_RES_MEMORY,
9511 				     SYM_PCI_MMIO, np->mmio_res);
9512 	if (np->io_res)
9513 		bus_release_resource(np->device, SYS_RES_IOPORT,
9514 				     SYM_PCI_IO, np->io_res);
9515 	if (np->irq_res)
9516 		bus_release_resource(np->device, SYS_RES_IRQ,
9517 				     0, np->irq_res);
9518 #else
9519 	/*
9520 	 *  YEAH!!!
9521 	 *  It seems there is no means to free MMIO resources.
9522 	 */
9523 #endif
9524 
9525 	if (np->scriptb0)
9526 		sym_mfree_dma(np->scriptb0, np->scriptb_sz, "SCRIPTB0");
9527 	if (np->scripta0)
9528 		sym_mfree_dma(np->scripta0, np->scripta_sz, "SCRIPTA0");
9529 	if (np->squeue)
9530 		sym_mfree_dma(np->squeue, sizeof(u32)*(MAX_QUEUE*2), "SQUEUE");
9531 	if (np->dqueue)
9532 		sym_mfree_dma(np->dqueue, sizeof(u32)*(MAX_QUEUE*2), "DQUEUE");
9533 
9534 	while ((qp = sym_remque_head(&np->free_ccbq)) != 0) {
9535 		cp = sym_que_entry(qp, struct sym_ccb, link_ccbq);
9536 #ifdef	FreeBSD_Bus_Dma_Abstraction
9537 		bus_dmamap_destroy(np->data_dmat, cp->dmamap);
9538 #endif
9539 		sym_mfree_dma(cp->sns_bbuf, SYM_SNS_BBUF_LEN, "SNS_BBUF");
9540 		sym_mfree_dma(cp, sizeof(*cp), "CCB");
9541 	}
9542 
9543 	if (np->badluntbl)
9544 		sym_mfree_dma(np->badluntbl, 256,"BADLUNTBL");
9545 
9546 	for (target = 0; target < SYM_CONF_MAX_TARGET ; target++) {
9547 		tp = &np->target[target];
9548 		for (lun = 0 ; lun < SYM_CONF_MAX_LUN ; lun++) {
9549 			lp = sym_lp(np, tp, lun);
9550 			if (!lp)
9551 				continue;
9552 			if (lp->itlq_tbl)
9553 				sym_mfree_dma(lp->itlq_tbl, SYM_CONF_MAX_TASK*4,
9554 				       "ITLQ_TBL");
9555 			if (lp->cb_tags)
9556 				sym_mfree(lp->cb_tags, SYM_CONF_MAX_TASK,
9557 				       "CB_TAGS");
9558 			sym_mfree_dma(lp, sizeof(*lp), "LCB");
9559 		}
9560 #if SYM_CONF_MAX_LUN > 1
9561 		if (tp->lunmp)
9562 			sym_mfree(tp->lunmp, SYM_CONF_MAX_LUN*sizeof(lcb_p),
9563 			       "LUNMP");
9564 #endif
9565 	}
9566 	if (np->targtbl)
9567 		sym_mfree_dma(np->targtbl, 256, "TARGTBL");
9568 #ifdef	FreeBSD_Bus_Dma_Abstraction
9569 	if (np->data_dmat)
9570 		bus_dma_tag_destroy(np->data_dmat);
9571 #endif
9572 	sym_mfree_dma(np, sizeof(*np), "HCB");
9573 }
9574 
9575 /*
9576  *  Allocate CAM resources and register a bus to CAM.
9577  */
9578 int sym_cam_attach(hcb_p np)
9579 {
9580 	struct cam_devq *devq = 0;
9581 	struct cam_sim *sim = 0;
9582 	struct cam_path *path = 0;
9583 	struct ccb_setasync csa;
9584 	int err;
9585 
9586 	crit_enter();
9587 
9588 	/*
9589 	 *  Establish our interrupt handler.
9590 	 */
9591 #ifdef FreeBSD_Bus_Io_Abstraction
9592 	err = bus_setup_intr(np->device, np->irq_res, 0,
9593 			     sym_intr, np, &np->intr, NULL);
9594 	if (err) {
9595 		device_printf(np->device, "bus_setup_intr() failed: %d\n",
9596 			      err);
9597 		goto fail;
9598 	}
9599 #else
9600 	err = 0;
9601 	if (!pci_map_int (np->pci_tag, sym_intr, np)) {
9602 		kprintf("%s: failed to map interrupt\n", sym_name(np));
9603 		goto fail;
9604 	}
9605 #endif
9606 
9607 	/*
9608 	 *  Create the device queue for our sym SIM.
9609 	 */
9610 	devq = cam_simq_alloc(SYM_CONF_MAX_START);
9611 	if (devq == NULL) {
9612 		goto fail;
9613 	}
9614 
9615 	/*
9616 	 *  Construct our SIM entry.
9617 	 */
9618 	sim = cam_sim_alloc(sym_action, sym_poll, "sym", np, np->unit,
9619 			    1, SYM_SETUP_MAX_TAG, devq);
9620 	cam_simq_release(devq);
9621 	if (sim == NULL)
9622 		goto fail;
9623 
9624 	if (xpt_bus_register(sim, 0) != CAM_SUCCESS)
9625 		goto fail;
9626 	np->sim = sim;
9627 	sim = 0;
9628 
9629 	if (xpt_create_path(&path, 0,
9630 			    cam_sim_path(np->sim), CAM_TARGET_WILDCARD,
9631 			    CAM_LUN_WILDCARD) != CAM_REQ_CMP) {
9632 		goto fail;
9633 	}
9634 	np->path = path;
9635 
9636 	/*
9637 	 *  Establish our async notification handler.
9638 	 */
9639 	xpt_setup_ccb(&csa.ccb_h, np->path, 5);
9640 	csa.ccb_h.func_code = XPT_SASYNC_CB;
9641 	csa.event_enable    = AC_LOST_DEVICE;
9642 	csa.callback	    = sym_async;
9643 	csa.callback_arg    = np->sim;
9644 	xpt_action((union ccb *)&csa);
9645 
9646 	/*
9647 	 *  Start the chip now, without resetting the BUS, since
9648 	 *  it seems that this must stay under control of CAM.
9649 	 *  With LVD/SE capable chips and BUS in SE mode, we may
9650 	 *  get a spurious SMBC interrupt.
9651 	 */
9652 	sym_init (np, 0);
9653 
9654 	crit_exit();
9655 	return 1;
9656 fail:
9657 	if (sim)
9658 		cam_sim_free(sim);
9659 
9660 	sym_cam_free(np);
9661 
9662 	crit_exit();
9663 	return 0;
9664 }
9665 
9666 /*
9667  *  Free everything that deals with CAM.
9668  */
9669 void sym_cam_free(hcb_p np)
9670 {
9671 #ifdef FreeBSD_Bus_Io_Abstraction
9672 	if (np->intr)
9673 		bus_teardown_intr(np->device, np->irq_res, np->intr);
9674 #else
9675 	/* pci_unmap_int(np->pci_tag); */	/* Does nothing */
9676 #endif
9677 
9678 	if (np->sim) {
9679 		xpt_bus_deregister(cam_sim_path(np->sim));
9680 		cam_sim_free(np->sim);
9681 	}
9682 	if (np->path)
9683 		xpt_free_path(np->path);
9684 }
9685 
9686 /*============ OPTIONNAL NVRAM SUPPORT =================*/
9687 
9688 /*
9689  *  Get host setup from NVRAM.
9690  */
9691 static void sym_nvram_setup_host (hcb_p np, struct sym_nvram *nvram)
9692 {
9693 #ifdef SYM_CONF_NVRAM_SUPPORT
9694 	/*
9695 	 *  Get parity checking, host ID, verbose mode
9696 	 *  and miscellaneous host flags from NVRAM.
9697 	 */
9698 	switch(nvram->type) {
9699 	case SYM_SYMBIOS_NVRAM:
9700 		if (!(nvram->data.Symbios.flags & SYMBIOS_PARITY_ENABLE))
9701 			np->rv_scntl0  &= ~0x0a;
9702 		np->myaddr = nvram->data.Symbios.host_id & 0x0f;
9703 		if (nvram->data.Symbios.flags & SYMBIOS_VERBOSE_MSGS)
9704 			np->verbose += 1;
9705 		if (nvram->data.Symbios.flags1 & SYMBIOS_SCAN_HI_LO)
9706 			np->usrflags |= SYM_SCAN_TARGETS_HILO;
9707 		if (nvram->data.Symbios.flags2 & SYMBIOS_AVOID_BUS_RESET)
9708 			np->usrflags |= SYM_AVOID_BUS_RESET;
9709 		break;
9710 	case SYM_TEKRAM_NVRAM:
9711 		np->myaddr = nvram->data.Tekram.host_id & 0x0f;
9712 		break;
9713 	default:
9714 		break;
9715 	}
9716 #endif
9717 }
9718 
9719 /*
9720  *  Get target setup from NVRAM.
9721  */
9722 #ifdef SYM_CONF_NVRAM_SUPPORT
9723 static void sym_Symbios_setup_target(hcb_p np,int target, Symbios_nvram *nvram);
9724 static void sym_Tekram_setup_target(hcb_p np,int target, Tekram_nvram *nvram);
9725 #endif
9726 
9727 static void
9728 sym_nvram_setup_target (hcb_p np, int target, struct sym_nvram *nvp)
9729 {
9730 #ifdef SYM_CONF_NVRAM_SUPPORT
9731 	switch(nvp->type) {
9732 	case SYM_SYMBIOS_NVRAM:
9733 		sym_Symbios_setup_target (np, target, &nvp->data.Symbios);
9734 		break;
9735 	case SYM_TEKRAM_NVRAM:
9736 		sym_Tekram_setup_target (np, target, &nvp->data.Tekram);
9737 		break;
9738 	default:
9739 		break;
9740 	}
9741 #endif
9742 }
9743 
9744 #ifdef SYM_CONF_NVRAM_SUPPORT
9745 /*
9746  *  Get target set-up from Symbios format NVRAM.
9747  */
9748 static void
9749 sym_Symbios_setup_target(hcb_p np, int target, Symbios_nvram *nvram)
9750 {
9751 	tcb_p tp = &np->target[target];
9752 	Symbios_target *tn = &nvram->target[target];
9753 
9754 	tp->tinfo.user.period = tn->sync_period ? (tn->sync_period + 3) / 4 : 0;
9755 	tp->tinfo.user.width  = tn->bus_width == 0x10 ? BUS_16_BIT : BUS_8_BIT;
9756 	tp->usrtags =
9757 		(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? SYM_SETUP_MAX_TAG : 0;
9758 
9759 	if (!(tn->flags & SYMBIOS_DISCONNECT_ENABLE))
9760 		tp->usrflags &= ~SYM_DISC_ENABLED;
9761 	if (!(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME))
9762 		tp->usrflags |= SYM_SCAN_BOOT_DISABLED;
9763 	if (!(tn->flags & SYMBIOS_SCAN_LUNS))
9764 		tp->usrflags |= SYM_SCAN_LUNS_DISABLED;
9765 }
9766 
9767 /*
9768  *  Get target set-up from Tekram format NVRAM.
9769  */
9770 static void
9771 sym_Tekram_setup_target(hcb_p np, int target, Tekram_nvram *nvram)
9772 {
9773 	tcb_p tp = &np->target[target];
9774 	struct Tekram_target *tn = &nvram->target[target];
9775 	int i;
9776 
9777 	if (tn->flags & TEKRAM_SYNC_NEGO) {
9778 		i = tn->sync_index & 0xf;
9779 		tp->tinfo.user.period = Tekram_sync[i];
9780 	}
9781 
9782 	tp->tinfo.user.width =
9783 		(tn->flags & TEKRAM_WIDE_NEGO) ? BUS_16_BIT : BUS_8_BIT;
9784 
9785 	if (tn->flags & TEKRAM_TAGGED_COMMANDS) {
9786 		tp->usrtags = 2 << nvram->max_tags_index;
9787 	}
9788 
9789 	if (tn->flags & TEKRAM_DISCONNECT_ENABLE)
9790 		tp->usrflags |= SYM_DISC_ENABLED;
9791 
9792 	/* If any device does not support parity, we will not use this option */
9793 	if (!(tn->flags & TEKRAM_PARITY_CHECK))
9794 		np->rv_scntl0  &= ~0x0a; /* SCSI parity checking disabled */
9795 }
9796 
9797 #ifdef	SYM_CONF_DEBUG_NVRAM
9798 /*
9799  *  Dump Symbios format NVRAM for debugging purpose.
9800  */
9801 static void sym_display_Symbios_nvram(hcb_p np, Symbios_nvram *nvram)
9802 {
9803 	int i;
9804 
9805 	/* display Symbios nvram host data */
9806 	kprintf("%s: HOST ID=%d%s%s%s%s%s%s\n",
9807 		sym_name(np), nvram->host_id & 0x0f,
9808 		(nvram->flags  & SYMBIOS_SCAM_ENABLE)	? " SCAM"	:"",
9809 		(nvram->flags  & SYMBIOS_PARITY_ENABLE)	? " PARITY"	:"",
9810 		(nvram->flags  & SYMBIOS_VERBOSE_MSGS)	? " VERBOSE"	:"",
9811 		(nvram->flags  & SYMBIOS_CHS_MAPPING)	? " CHS_ALT"	:"",
9812 		(nvram->flags2 & SYMBIOS_AVOID_BUS_RESET)?" NO_RESET"	:"",
9813 		(nvram->flags1 & SYMBIOS_SCAN_HI_LO)	? " HI_LO"	:"");
9814 
9815 	/* display Symbios nvram drive data */
9816 	for (i = 0 ; i < 15 ; i++) {
9817 		struct Symbios_target *tn = &nvram->target[i];
9818 		kprintf("%s-%d:%s%s%s%s WIDTH=%d SYNC=%d TMO=%d\n",
9819 		sym_name(np), i,
9820 		(tn->flags & SYMBIOS_DISCONNECT_ENABLE)	? " DISC"	: "",
9821 		(tn->flags & SYMBIOS_SCAN_AT_BOOT_TIME)	? " SCAN_BOOT"	: "",
9822 		(tn->flags & SYMBIOS_SCAN_LUNS)		? " SCAN_LUNS"	: "",
9823 		(tn->flags & SYMBIOS_QUEUE_TAGS_ENABLED)? " TCQ"	: "",
9824 		tn->bus_width,
9825 		tn->sync_period / 4,
9826 		tn->timeout);
9827 	}
9828 }
9829 
9830 /*
9831  *  Dump TEKRAM format NVRAM for debugging purpose.
9832  */
9833 static u_char Tekram_boot_delay[7] = {3, 5, 10, 20, 30, 60, 120};
9834 static void sym_display_Tekram_nvram(hcb_p np, Tekram_nvram *nvram)
9835 {
9836 	int i, tags, boot_delay;
9837 	char *rem;
9838 
9839 	/* display Tekram nvram host data */
9840 	tags = 2 << nvram->max_tags_index;
9841 	boot_delay = 0;
9842 	if (nvram->boot_delay_index < 6)
9843 		boot_delay = Tekram_boot_delay[nvram->boot_delay_index];
9844 	switch((nvram->flags & TEKRAM_REMOVABLE_FLAGS) >> 6) {
9845 	default:
9846 	case 0:	rem = "";			break;
9847 	case 1: rem = " REMOVABLE=boot device";	break;
9848 	case 2: rem = " REMOVABLE=all";		break;
9849 	}
9850 
9851 	kprintf("%s: HOST ID=%d%s%s%s%s%s%s%s%s%s BOOT DELAY=%d tags=%d\n",
9852 		sym_name(np), nvram->host_id & 0x0f,
9853 		(nvram->flags1 & SYMBIOS_SCAM_ENABLE)	? " SCAM"	:"",
9854 		(nvram->flags & TEKRAM_MORE_THAN_2_DRIVES) ? " >2DRIVES"	:"",
9855 		(nvram->flags & TEKRAM_DRIVES_SUP_1GB)	? " >1GB"	:"",
9856 		(nvram->flags & TEKRAM_RESET_ON_POWER_ON) ? " RESET"	:"",
9857 		(nvram->flags & TEKRAM_ACTIVE_NEGATION)	? " ACT_NEG"	:"",
9858 		(nvram->flags & TEKRAM_IMMEDIATE_SEEK)	? " IMM_SEEK"	:"",
9859 		(nvram->flags & TEKRAM_SCAN_LUNS)	? " SCAN_LUNS"	:"",
9860 		(nvram->flags1 & TEKRAM_F2_F6_ENABLED)	? " F2_F6"	:"",
9861 		rem, boot_delay, tags);
9862 
9863 	/* display Tekram nvram drive data */
9864 	for (i = 0; i <= 15; i++) {
9865 		int sync, j;
9866 		struct Tekram_target *tn = &nvram->target[i];
9867 		j = tn->sync_index & 0xf;
9868 		sync = Tekram_sync[j];
9869 		kprintf("%s-%d:%s%s%s%s%s%s PERIOD=%d\n",
9870 		sym_name(np), i,
9871 		(tn->flags & TEKRAM_PARITY_CHECK)	? " PARITY"	: "",
9872 		(tn->flags & TEKRAM_SYNC_NEGO)		? " SYNC"	: "",
9873 		(tn->flags & TEKRAM_DISCONNECT_ENABLE)	? " DISC"	: "",
9874 		(tn->flags & TEKRAM_START_CMD)		? " START"	: "",
9875 		(tn->flags & TEKRAM_TAGGED_COMMANDS)	? " TCQ"	: "",
9876 		(tn->flags & TEKRAM_WIDE_NEGO)		? " WIDE"	: "",
9877 		sync);
9878 	}
9879 }
9880 #endif	/* SYM_CONF_DEBUG_NVRAM */
9881 #endif	/* SYM_CONF_NVRAM_SUPPORT */
9882 
9883 
9884 /*
9885  *  Try reading Symbios or Tekram NVRAM
9886  */
9887 #ifdef SYM_CONF_NVRAM_SUPPORT
9888 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram);
9889 static int sym_read_Tekram_nvram  (hcb_p np, Tekram_nvram *nvram);
9890 #endif
9891 
9892 int sym_read_nvram(hcb_p np, struct sym_nvram *nvp)
9893 {
9894 #ifdef SYM_CONF_NVRAM_SUPPORT
9895 	/*
9896 	 *  Try to read SYMBIOS nvram.
9897 	 *  Try to read TEKRAM nvram if Symbios nvram not found.
9898 	 */
9899 	if	(SYM_SETUP_SYMBIOS_NVRAM &&
9900 		 !sym_read_Symbios_nvram (np, &nvp->data.Symbios)) {
9901 		nvp->type = SYM_SYMBIOS_NVRAM;
9902 #ifdef SYM_CONF_DEBUG_NVRAM
9903 		sym_display_Symbios_nvram(np, &nvp->data.Symbios);
9904 #endif
9905 	}
9906 	else if	(SYM_SETUP_TEKRAM_NVRAM &&
9907 		 !sym_read_Tekram_nvram (np, &nvp->data.Tekram)) {
9908 		nvp->type = SYM_TEKRAM_NVRAM;
9909 #ifdef SYM_CONF_DEBUG_NVRAM
9910 		sym_display_Tekram_nvram(np, &nvp->data.Tekram);
9911 #endif
9912 	}
9913 	else
9914 		nvp->type = 0;
9915 #else
9916 	nvp->type = 0;
9917 #endif
9918 	return nvp->type;
9919 }
9920 
9921 
9922 #ifdef SYM_CONF_NVRAM_SUPPORT
9923 /*
9924  *  24C16 EEPROM reading.
9925  *
9926  *  GPOI0 - data in/data out
9927  *  GPIO1 - clock
9928  *  Symbios NVRAM wiring now also used by Tekram.
9929  */
9930 
9931 #define SET_BIT 0
9932 #define CLR_BIT 1
9933 #define SET_CLK 2
9934 #define CLR_CLK 3
9935 
9936 /*
9937  *  Set/clear data/clock bit in GPIO0
9938  */
9939 static void S24C16_set_bit(hcb_p np, u_char write_bit, u_char *gpreg,
9940 			  int bit_mode)
9941 {
9942 	UDELAY (5);
9943 	switch (bit_mode){
9944 	case SET_BIT:
9945 		*gpreg |= write_bit;
9946 		break;
9947 	case CLR_BIT:
9948 		*gpreg &= 0xfe;
9949 		break;
9950 	case SET_CLK:
9951 		*gpreg |= 0x02;
9952 		break;
9953 	case CLR_CLK:
9954 		*gpreg &= 0xfd;
9955 		break;
9956 
9957 	}
9958 	OUTB (nc_gpreg, *gpreg);
9959 	UDELAY (5);
9960 }
9961 
9962 /*
9963  *  Send START condition to NVRAM to wake it up.
9964  */
9965 static void S24C16_start(hcb_p np, u_char *gpreg)
9966 {
9967 	S24C16_set_bit(np, 1, gpreg, SET_BIT);
9968 	S24C16_set_bit(np, 0, gpreg, SET_CLK);
9969 	S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9970 	S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9971 }
9972 
9973 /*
9974  *  Send STOP condition to NVRAM - puts NVRAM to sleep... ZZzzzz!!
9975  */
9976 static void S24C16_stop(hcb_p np, u_char *gpreg)
9977 {
9978 	S24C16_set_bit(np, 0, gpreg, SET_CLK);
9979 	S24C16_set_bit(np, 1, gpreg, SET_BIT);
9980 }
9981 
9982 /*
9983  *  Read or write a bit to the NVRAM,
9984  *  read if GPIO0 input else write if GPIO0 output
9985  */
9986 static void S24C16_do_bit(hcb_p np, u_char *read_bit, u_char write_bit,
9987 			 u_char *gpreg)
9988 {
9989 	S24C16_set_bit(np, write_bit, gpreg, SET_BIT);
9990 	S24C16_set_bit(np, 0, gpreg, SET_CLK);
9991 	if (read_bit)
9992 		*read_bit = INB (nc_gpreg);
9993 	S24C16_set_bit(np, 0, gpreg, CLR_CLK);
9994 	S24C16_set_bit(np, 0, gpreg, CLR_BIT);
9995 }
9996 
9997 /*
9998  *  Output an ACK to the NVRAM after reading,
9999  *  change GPIO0 to output and when done back to an input
10000  */
10001 static void S24C16_write_ack(hcb_p np, u_char write_bit, u_char *gpreg,
10002 			    u_char *gpcntl)
10003 {
10004 	OUTB (nc_gpcntl, *gpcntl & 0xfe);
10005 	S24C16_do_bit(np, 0, write_bit, gpreg);
10006 	OUTB (nc_gpcntl, *gpcntl);
10007 }
10008 
10009 /*
10010  *  Input an ACK from NVRAM after writing,
10011  *  change GPIO0 to input and when done back to an output
10012  */
10013 static void S24C16_read_ack(hcb_p np, u_char *read_bit, u_char *gpreg,
10014 			   u_char *gpcntl)
10015 {
10016 	OUTB (nc_gpcntl, *gpcntl | 0x01);
10017 	S24C16_do_bit(np, read_bit, 1, gpreg);
10018 	OUTB (nc_gpcntl, *gpcntl);
10019 }
10020 
10021 /*
10022  *  WRITE a byte to the NVRAM and then get an ACK to see it was accepted OK,
10023  *  GPIO0 must already be set as an output
10024  */
10025 static void S24C16_write_byte(hcb_p np, u_char *ack_data, u_char write_data,
10026 			     u_char *gpreg, u_char *gpcntl)
10027 {
10028 	int x;
10029 
10030 	for (x = 0; x < 8; x++)
10031 		S24C16_do_bit(np, 0, (write_data >> (7 - x)) & 0x01, gpreg);
10032 
10033 	S24C16_read_ack(np, ack_data, gpreg, gpcntl);
10034 }
10035 
10036 /*
10037  *  READ a byte from the NVRAM and then send an ACK to say we have got it,
10038  *  GPIO0 must already be set as an input
10039  */
10040 static void S24C16_read_byte(hcb_p np, u_char *read_data, u_char ack_data,
10041 			    u_char *gpreg, u_char *gpcntl)
10042 {
10043 	int x;
10044 	u_char read_bit;
10045 
10046 	*read_data = 0;
10047 	for (x = 0; x < 8; x++) {
10048 		S24C16_do_bit(np, &read_bit, 1, gpreg);
10049 		*read_data |= ((read_bit & 0x01) << (7 - x));
10050 	}
10051 
10052 	S24C16_write_ack(np, ack_data, gpreg, gpcntl);
10053 }
10054 
10055 /*
10056  *  Read 'len' bytes starting at 'offset'.
10057  */
10058 static int sym_read_S24C16_nvram (hcb_p np, int offset, u_char *data, int len)
10059 {
10060 	u_char	gpcntl, gpreg;
10061 	u_char	old_gpcntl, old_gpreg;
10062 	u_char	ack_data;
10063 	int	retv = 1;
10064 	int	x;
10065 
10066 	/* save current state of GPCNTL and GPREG */
10067 	old_gpreg	= INB (nc_gpreg);
10068 	old_gpcntl	= INB (nc_gpcntl);
10069 	gpcntl		= old_gpcntl & 0x1c;
10070 
10071 	/* set up GPREG & GPCNTL to set GPIO0 and GPIO1 in to known state */
10072 	OUTB (nc_gpreg,  old_gpreg);
10073 	OUTB (nc_gpcntl, gpcntl);
10074 
10075 	/* this is to set NVRAM into a known state with GPIO0/1 both low */
10076 	gpreg = old_gpreg;
10077 	S24C16_set_bit(np, 0, &gpreg, CLR_CLK);
10078 	S24C16_set_bit(np, 0, &gpreg, CLR_BIT);
10079 
10080 	/* now set NVRAM inactive with GPIO0/1 both high */
10081 	S24C16_stop(np, &gpreg);
10082 
10083 	/* activate NVRAM */
10084 	S24C16_start(np, &gpreg);
10085 
10086 	/* write device code and random address MSB */
10087 	S24C16_write_byte(np, &ack_data,
10088 		0xa0 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10089 	if (ack_data & 0x01)
10090 		goto out;
10091 
10092 	/* write random address LSB */
10093 	S24C16_write_byte(np, &ack_data,
10094 		offset & 0xff, &gpreg, &gpcntl);
10095 	if (ack_data & 0x01)
10096 		goto out;
10097 
10098 	/* regenerate START state to set up for reading */
10099 	S24C16_start(np, &gpreg);
10100 
10101 	/* rewrite device code and address MSB with read bit set (lsb = 0x01) */
10102 	S24C16_write_byte(np, &ack_data,
10103 		0xa1 | ((offset >> 7) & 0x0e), &gpreg, &gpcntl);
10104 	if (ack_data & 0x01)
10105 		goto out;
10106 
10107 	/* now set up GPIO0 for inputting data */
10108 	gpcntl |= 0x01;
10109 	OUTB (nc_gpcntl, gpcntl);
10110 
10111 	/* input all requested data - only part of total NVRAM */
10112 	for (x = 0; x < len; x++)
10113 		S24C16_read_byte(np, &data[x], (x == (len-1)), &gpreg, &gpcntl);
10114 
10115 	/* finally put NVRAM back in inactive mode */
10116 	gpcntl &= 0xfe;
10117 	OUTB (nc_gpcntl, gpcntl);
10118 	S24C16_stop(np, &gpreg);
10119 	retv = 0;
10120 out:
10121 	/* return GPIO0/1 to original states after having accessed NVRAM */
10122 	OUTB (nc_gpcntl, old_gpcntl);
10123 	OUTB (nc_gpreg,  old_gpreg);
10124 
10125 	return retv;
10126 }
10127 
10128 #undef SET_BIT
10129 #undef CLR_BIT
10130 #undef SET_CLK
10131 #undef CLR_CLK
10132 
10133 /*
10134  *  Try reading Symbios NVRAM.
10135  *  Return 0 if OK.
10136  */
10137 static int sym_read_Symbios_nvram (hcb_p np, Symbios_nvram *nvram)
10138 {
10139 	static u_char Symbios_trailer[6] = {0xfe, 0xfe, 0, 0, 0, 0};
10140 	u_char *data = (u_char *) nvram;
10141 	int len  = sizeof(*nvram);
10142 	u_short	csum;
10143 	int x;
10144 
10145 	/* probe the 24c16 and read the SYMBIOS 24c16 area */
10146 	if (sym_read_S24C16_nvram (np, SYMBIOS_NVRAM_ADDRESS, data, len))
10147 		return 1;
10148 
10149 	/* check valid NVRAM signature, verify byte count and checksum */
10150 	if (nvram->type != 0 ||
10151 	    bcmp(nvram->trailer, Symbios_trailer, 6) ||
10152 	    nvram->byte_count != len - 12)
10153 		return 1;
10154 
10155 	/* verify checksum */
10156 	for (x = 6, csum = 0; x < len - 6; x++)
10157 		csum += data[x];
10158 	if (csum != nvram->checksum)
10159 		return 1;
10160 
10161 	return 0;
10162 }
10163 
10164 /*
10165  *  93C46 EEPROM reading.
10166  *
10167  *  GPOI0 - data in
10168  *  GPIO1 - data out
10169  *  GPIO2 - clock
10170  *  GPIO4 - chip select
10171  *
10172  *  Used by Tekram.
10173  */
10174 
10175 /*
10176  *  Pulse clock bit in GPIO0
10177  */
10178 static void T93C46_Clk(hcb_p np, u_char *gpreg)
10179 {
10180 	OUTB (nc_gpreg, *gpreg | 0x04);
10181 	UDELAY (2);
10182 	OUTB (nc_gpreg, *gpreg);
10183 }
10184 
10185 /*
10186  *  Read bit from NVRAM
10187  */
10188 static void T93C46_Read_Bit(hcb_p np, u_char *read_bit, u_char *gpreg)
10189 {
10190 	UDELAY (2);
10191 	T93C46_Clk(np, gpreg);
10192 	*read_bit = INB (nc_gpreg);
10193 }
10194 
10195 /*
10196  *  Write bit to GPIO0
10197  */
10198 static void T93C46_Write_Bit(hcb_p np, u_char write_bit, u_char *gpreg)
10199 {
10200 	if (write_bit & 0x01)
10201 		*gpreg |= 0x02;
10202 	else
10203 		*gpreg &= 0xfd;
10204 
10205 	*gpreg |= 0x10;
10206 
10207 	OUTB (nc_gpreg, *gpreg);
10208 	UDELAY (2);
10209 
10210 	T93C46_Clk(np, gpreg);
10211 }
10212 
10213 /*
10214  *  Send STOP condition to NVRAM - puts NVRAM to sleep... ZZZzzz!!
10215  */
10216 static void T93C46_Stop(hcb_p np, u_char *gpreg)
10217 {
10218 	*gpreg &= 0xef;
10219 	OUTB (nc_gpreg, *gpreg);
10220 	UDELAY (2);
10221 
10222 	T93C46_Clk(np, gpreg);
10223 }
10224 
10225 /*
10226  *  Send read command and address to NVRAM
10227  */
10228 static void T93C46_Send_Command(hcb_p np, u_short write_data,
10229 				u_char *read_bit, u_char *gpreg)
10230 {
10231 	int x;
10232 
10233 	/* send 9 bits, start bit (1), command (2), address (6)  */
10234 	for (x = 0; x < 9; x++)
10235 		T93C46_Write_Bit(np, (u_char) (write_data >> (8 - x)), gpreg);
10236 
10237 	*read_bit = INB (nc_gpreg);
10238 }
10239 
10240 /*
10241  *  READ 2 bytes from the NVRAM
10242  */
10243 static void T93C46_Read_Word(hcb_p np, u_short *nvram_data, u_char *gpreg)
10244 {
10245 	int x;
10246 	u_char read_bit;
10247 
10248 	*nvram_data = 0;
10249 	for (x = 0; x < 16; x++) {
10250 		T93C46_Read_Bit(np, &read_bit, gpreg);
10251 
10252 		if (read_bit & 0x01)
10253 			*nvram_data |=  (0x01 << (15 - x));
10254 		else
10255 			*nvram_data &= ~(0x01 << (15 - x));
10256 	}
10257 }
10258 
10259 /*
10260  *  Read Tekram NvRAM data.
10261  */
10262 static int T93C46_Read_Data(hcb_p np, u_short *data,int len,u_char *gpreg)
10263 {
10264 	u_char	read_bit;
10265 	int	x;
10266 
10267 	for (x = 0; x < len; x++)  {
10268 
10269 		/* output read command and address */
10270 		T93C46_Send_Command(np, 0x180 | x, &read_bit, gpreg);
10271 		if (read_bit & 0x01)
10272 			return 1; /* Bad */
10273 		T93C46_Read_Word(np, &data[x], gpreg);
10274 		T93C46_Stop(np, gpreg);
10275 	}
10276 
10277 	return 0;
10278 }
10279 
10280 /*
10281  *  Try reading 93C46 Tekram NVRAM.
10282  */
10283 static int sym_read_T93C46_nvram (hcb_p np, Tekram_nvram *nvram)
10284 {
10285 	u_char gpcntl, gpreg;
10286 	u_char old_gpcntl, old_gpreg;
10287 	int retv = 1;
10288 
10289 	/* save current state of GPCNTL and GPREG */
10290 	old_gpreg	= INB (nc_gpreg);
10291 	old_gpcntl	= INB (nc_gpcntl);
10292 
10293 	/* set up GPREG & GPCNTL to set GPIO0/1/2/4 in to known state, 0 in,
10294 	   1/2/4 out */
10295 	gpreg = old_gpreg & 0xe9;
10296 	OUTB (nc_gpreg, gpreg);
10297 	gpcntl = (old_gpcntl & 0xe9) | 0x09;
10298 	OUTB (nc_gpcntl, gpcntl);
10299 
10300 	/* input all of NVRAM, 64 words */
10301 	retv = T93C46_Read_Data(np, (u_short *) nvram,
10302 				sizeof(*nvram) / sizeof(short), &gpreg);
10303 
10304 	/* return GPIO0/1/2/4 to original states after having accessed NVRAM */
10305 	OUTB (nc_gpcntl, old_gpcntl);
10306 	OUTB (nc_gpreg,  old_gpreg);
10307 
10308 	return retv;
10309 }
10310 
10311 /*
10312  *  Try reading Tekram NVRAM.
10313  *  Return 0 if OK.
10314  */
10315 static int sym_read_Tekram_nvram (hcb_p np, Tekram_nvram *nvram)
10316 {
10317 	u_char *data = (u_char *) nvram;
10318 	int len = sizeof(*nvram);
10319 	u_short	csum;
10320 	int x;
10321 
10322 	switch (np->device_id) {
10323 	case PCI_ID_SYM53C885:
10324 	case PCI_ID_SYM53C895:
10325 	case PCI_ID_SYM53C896:
10326 		x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10327 					  data, len);
10328 		break;
10329 	case PCI_ID_SYM53C875:
10330 		x = sym_read_S24C16_nvram(np, TEKRAM_24C16_NVRAM_ADDRESS,
10331 					  data, len);
10332 		if (!x)
10333 			break;
10334 	default:
10335 		x = sym_read_T93C46_nvram(np, nvram);
10336 		break;
10337 	}
10338 	if (x)
10339 		return 1;
10340 
10341 	/* verify checksum */
10342 	for (x = 0, csum = 0; x < len - 1; x += 2)
10343 		csum += data[x] + (data[x+1] << 8);
10344 	if (csum != 0x1234)
10345 		return 1;
10346 
10347 	return 0;
10348 }
10349 
10350 #endif	/* SYM_CONF_NVRAM_SUPPORT */
10351