1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include <drm/drm_crtc.h>
27 
28 #include "amdgpu.h"
29 #include "amdgpu_dm.h"
30 #include "dc.h"
31 
32 enum amdgpu_dm_pipe_crc_source {
33 	AMDGPU_DM_PIPE_CRC_SOURCE_NONE = 0,
34 	AMDGPU_DM_PIPE_CRC_SOURCE_AUTO,
35 	AMDGPU_DM_PIPE_CRC_SOURCE_MAX,
36 	AMDGPU_DM_PIPE_CRC_SOURCE_INVALID = -1,
37 };
38 
39 static enum amdgpu_dm_pipe_crc_source dm_parse_crc_source(const char *source)
40 {
41 	if (!source || !strcmp(source, "none"))
42 		return AMDGPU_DM_PIPE_CRC_SOURCE_NONE;
43 	if (!strcmp(source, "auto"))
44 		return AMDGPU_DM_PIPE_CRC_SOURCE_AUTO;
45 
46 	return AMDGPU_DM_PIPE_CRC_SOURCE_INVALID;
47 }
48 
49 int amdgpu_dm_crtc_set_crc_source(struct drm_crtc *crtc, const char *src_name,
50 			   size_t *values_cnt)
51 {
52 	struct dm_crtc_state *crtc_state = to_dm_crtc_state(crtc->state);
53 	struct dc_stream_state *stream_state = crtc_state->stream;
54 	bool enable;
55 
56 	enum amdgpu_dm_pipe_crc_source source = dm_parse_crc_source(src_name);
57 
58 	if (source < 0) {
59 		DRM_DEBUG_DRIVER("Unknown CRC source %s for CRTC%d\n",
60 				 src_name, crtc->index);
61 		return -EINVAL;
62 	}
63 
64 	if (!stream_state) {
65 		DRM_ERROR("No stream state for CRTC%d\n", crtc->index);
66 		return -EINVAL;
67 	}
68 
69 	enable = (source == AMDGPU_DM_PIPE_CRC_SOURCE_AUTO);
70 
71 	if (!dc_stream_configure_crc(stream_state->ctx->dc, stream_state,
72 				     enable, enable))
73 		return -EINVAL;
74 
75 	/* When enabling CRC, we should also disable dithering. */
76 	dc_stream_set_dither_option(stream_state,
77 				    enable ? DITHER_OPTION_TRUN8
78 					   : DITHER_OPTION_DEFAULT);
79 
80 	/*
81 	 * Reading the CRC requires the vblank interrupt handler to be
82 	 * enabled. Keep a reference until CRC capture stops.
83 	 */
84 	if (!crtc_state->crc_enabled && enable)
85 		drm_crtc_vblank_get(crtc);
86 	else if (crtc_state->crc_enabled && !enable)
87 		drm_crtc_vblank_put(crtc);
88 
89 	crtc_state->crc_enabled = enable;
90 
91 	*values_cnt = 3;
92 	/* Reset crc_skipped on dm state */
93 	crtc_state->crc_skip_count = 0;
94 	return 0;
95 }
96 
97 /**
98  * amdgpu_dm_crtc_handle_crc_irq: Report to DRM the CRC on given CRTC.
99  * @crtc: DRM CRTC object.
100  *
101  * This function should be called at the end of a vblank, when the fb has been
102  * fully processed through the pipe.
103  */
104 void amdgpu_dm_crtc_handle_crc_irq(struct drm_crtc *crtc)
105 {
106 	struct dm_crtc_state *crtc_state;
107 	struct dc_stream_state *stream_state;
108 	uint32_t crcs[3];
109 
110 	if (crtc == NULL)
111 		return;
112 
113 	crtc_state = to_dm_crtc_state(crtc->state);
114 	stream_state = crtc_state->stream;
115 
116 	/* Early return if CRC capture is not enabled. */
117 	if (!crtc_state->crc_enabled)
118 		return;
119 
120 	/*
121 	 * Since flipping and crc enablement happen asynchronously, we - more
122 	 * often than not - will be returning an 'uncooked' crc on first frame.
123 	 * Probably because hw isn't ready yet. For added security, skip the
124 	 * first two CRC values.
125 	 */
126 	if (crtc_state->crc_skip_count < 2) {
127 		crtc_state->crc_skip_count += 1;
128 		return;
129 	}
130 
131 	if (!dc_stream_get_crc(stream_state->ctx->dc, stream_state,
132 			       &crcs[0], &crcs[1], &crcs[2]))
133 		return;
134 
135 	drm_crtc_add_crc_entry(crtc, true,
136 			       drm_crtc_accurate_vblank_count(crtc), crcs);
137 }
138