1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #if 0 27 #include <linux/version.h> 28 #endif 29 #include <drm/drm_atomic_helper.h> 30 #include "dm_services.h" 31 #include "amdgpu.h" 32 #include "amdgpu_dm.h" 33 #include "amdgpu_dm_mst_types.h" 34 35 #include "dc.h" 36 #include "dm_helpers.h" 37 38 #include "dc_link_ddc.h" 39 40 /* #define TRACE_DPCD */ 41 42 #ifdef TRACE_DPCD 43 #define SIDE_BAND_MSG(address) (address >= DP_SIDEBAND_MSG_DOWN_REQ_BASE && address < DP_SINK_COUNT_ESI) 44 45 static inline char *side_band_msg_type_to_str(uint32_t address) 46 { 47 static char str[10] = {0}; 48 49 if (address < DP_SIDEBAND_MSG_UP_REP_BASE) 50 strcpy(str, "DOWN_REQ"); 51 else if (address < DP_SIDEBAND_MSG_DOWN_REP_BASE) 52 strcpy(str, "UP_REP"); 53 else if (address < DP_SIDEBAND_MSG_UP_REQ_BASE) 54 strcpy(str, "DOWN_REP"); 55 else 56 strcpy(str, "UP_REQ"); 57 58 return str; 59 } 60 61 static void log_dpcd(uint8_t type, 62 uint32_t address, 63 uint8_t *data, 64 uint32_t size, 65 bool res) 66 { 67 DRM_DEBUG_KMS("Op: %s, addr: %04x, SideBand Msg: %s, Op res: %s\n", 68 (type == DP_AUX_NATIVE_READ) || 69 (type == DP_AUX_I2C_READ) ? 70 "Read" : "Write", 71 address, 72 SIDE_BAND_MSG(address) ? 73 side_band_msg_type_to_str(address) : "Nop", 74 res ? "OK" : "Fail"); 75 76 if (res) { 77 print_hex_dump(KERN_INFO, "Body: ", DUMP_PREFIX_NONE, 16, 1, data, size, false); 78 } 79 } 80 #endif 81 82 static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, 83 struct drm_dp_aux_msg *msg) 84 { 85 ssize_t result = 0; 86 enum i2caux_transaction_action action; 87 enum aux_transaction_type type; 88 89 if (WARN_ON(msg->size > 16)) 90 return -E2BIG; 91 92 switch (msg->request & ~DP_AUX_I2C_MOT) { 93 case DP_AUX_NATIVE_READ: 94 type = AUX_TRANSACTION_TYPE_DP; 95 action = I2CAUX_TRANSACTION_ACTION_DP_READ; 96 97 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service, 98 msg->address, 99 &msg->reply, 100 msg->buffer, 101 msg->size, 102 type, 103 action); 104 break; 105 case DP_AUX_NATIVE_WRITE: 106 type = AUX_TRANSACTION_TYPE_DP; 107 action = I2CAUX_TRANSACTION_ACTION_DP_WRITE; 108 109 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service, 110 msg->address, 111 &msg->reply, 112 msg->buffer, 113 msg->size, 114 type, 115 action); 116 result = msg->size; 117 break; 118 case DP_AUX_I2C_READ: 119 type = AUX_TRANSACTION_TYPE_I2C; 120 if (msg->request & DP_AUX_I2C_MOT) 121 action = I2CAUX_TRANSACTION_ACTION_I2C_READ_MOT; 122 else 123 action = I2CAUX_TRANSACTION_ACTION_I2C_READ; 124 125 result = dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service, 126 msg->address, 127 &msg->reply, 128 msg->buffer, 129 msg->size, 130 type, 131 action); 132 break; 133 case DP_AUX_I2C_WRITE: 134 type = AUX_TRANSACTION_TYPE_I2C; 135 if (msg->request & DP_AUX_I2C_MOT) 136 action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE_MOT; 137 else 138 action = I2CAUX_TRANSACTION_ACTION_I2C_WRITE; 139 140 dc_link_aux_transfer(TO_DM_AUX(aux)->ddc_service, 141 msg->address, 142 &msg->reply, 143 msg->buffer, 144 msg->size, 145 type, 146 action); 147 result = msg->size; 148 break; 149 default: 150 return -EINVAL; 151 } 152 153 #ifdef TRACE_DPCD 154 log_dpcd(msg->request, 155 msg->address, 156 msg->buffer, 157 msg->size, 158 r == DDC_RESULT_SUCESSFULL); 159 #endif 160 161 if (result < 0) /* DC doesn't know about kernel error codes */ 162 result = -EIO; 163 164 return result; 165 } 166 167 static enum drm_connector_status 168 dm_dp_mst_detect(struct drm_connector *connector, bool force) 169 { 170 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); 171 struct amdgpu_dm_connector *master = aconnector->mst_port; 172 173 enum drm_connector_status status = 174 drm_dp_mst_detect_port( 175 connector, 176 &master->mst_mgr, 177 aconnector->port); 178 179 return status; 180 } 181 182 static void 183 dm_dp_mst_connector_destroy(struct drm_connector *connector) 184 { 185 struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); 186 struct amdgpu_encoder *amdgpu_encoder = amdgpu_dm_connector->mst_encoder; 187 188 if (amdgpu_dm_connector->edid) { 189 kfree(amdgpu_dm_connector->edid); 190 amdgpu_dm_connector->edid = NULL; 191 } 192 193 drm_encoder_cleanup(&amdgpu_encoder->base); 194 kfree(amdgpu_encoder); 195 drm_connector_cleanup(connector); 196 kfree(amdgpu_dm_connector); 197 } 198 199 static const struct drm_connector_funcs dm_dp_mst_connector_funcs = { 200 .detect = dm_dp_mst_detect, 201 .fill_modes = drm_helper_probe_single_connector_modes, 202 .destroy = dm_dp_mst_connector_destroy, 203 .reset = amdgpu_dm_connector_funcs_reset, 204 .atomic_duplicate_state = amdgpu_dm_connector_atomic_duplicate_state, 205 .atomic_destroy_state = drm_atomic_helper_connector_destroy_state, 206 .atomic_set_property = amdgpu_dm_connector_atomic_set_property, 207 .atomic_get_property = amdgpu_dm_connector_atomic_get_property 208 }; 209 210 void dm_dp_mst_dc_sink_create(struct drm_connector *connector) 211 { 212 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); 213 struct dc_sink *dc_sink; 214 struct dc_sink_init_data init_params = { 215 .link = aconnector->dc_link, 216 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST }; 217 218 /* FIXME none of this is safe. we shouldn't touch aconnector here in 219 * atomic_check 220 */ 221 222 /* 223 * TODO: Need to further figure out why ddc.algo is NULL while MST port exists 224 */ 225 if (!aconnector->port || !aconnector->port->aux.ddc.algo) 226 return; 227 228 ASSERT(aconnector->edid); 229 230 dc_sink = dc_link_add_remote_sink( 231 aconnector->dc_link, 232 (uint8_t *)aconnector->edid, 233 (aconnector->edid->extensions + 1) * EDID_LENGTH, 234 &init_params); 235 236 dc_sink->priv = aconnector; 237 aconnector->dc_sink = dc_sink; 238 239 amdgpu_dm_add_sink_to_freesync_module( 240 connector, aconnector->edid); 241 } 242 243 static int dm_dp_mst_get_modes(struct drm_connector *connector) 244 { 245 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); 246 int ret = 0; 247 248 if (!aconnector) 249 return drm_add_edid_modes(connector, NULL); 250 251 if (!aconnector->edid) { 252 struct edid *edid; 253 edid = drm_dp_mst_get_edid(connector, &aconnector->mst_port->mst_mgr, aconnector->port); 254 255 if (!edid) { 256 drm_connector_update_edid_property( 257 &aconnector->base, 258 NULL); 259 return ret; 260 } 261 262 aconnector->edid = edid; 263 } 264 265 if (!aconnector->dc_sink) { 266 struct dc_sink *dc_sink; 267 struct dc_sink_init_data init_params = { 268 .link = aconnector->dc_link, 269 .sink_signal = SIGNAL_TYPE_DISPLAY_PORT_MST }; 270 dc_sink = dc_link_add_remote_sink( 271 aconnector->dc_link, 272 (uint8_t *)aconnector->edid, 273 (aconnector->edid->extensions + 1) * EDID_LENGTH, 274 &init_params); 275 276 dc_sink->priv = aconnector; 277 aconnector->dc_sink = dc_sink; 278 279 if (aconnector->dc_sink) 280 amdgpu_dm_add_sink_to_freesync_module( 281 connector, aconnector->edid); 282 } 283 284 drm_connector_update_edid_property( 285 &aconnector->base, aconnector->edid); 286 287 ret = drm_add_edid_modes(connector, aconnector->edid); 288 289 return ret; 290 } 291 292 static struct drm_encoder *dm_mst_best_encoder(struct drm_connector *connector) 293 { 294 struct amdgpu_dm_connector *amdgpu_dm_connector = to_amdgpu_dm_connector(connector); 295 296 return &amdgpu_dm_connector->mst_encoder->base; 297 } 298 299 static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = { 300 .get_modes = dm_dp_mst_get_modes, 301 .mode_valid = amdgpu_dm_connector_mode_valid, 302 .best_encoder = dm_mst_best_encoder, 303 }; 304 305 static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder) 306 { 307 drm_encoder_cleanup(encoder); 308 kfree(encoder); 309 } 310 311 static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = { 312 .destroy = amdgpu_dm_encoder_destroy, 313 }; 314 315 static struct amdgpu_encoder * 316 dm_dp_create_fake_mst_encoder(struct amdgpu_dm_connector *connector) 317 { 318 struct drm_device *dev = connector->base.dev; 319 struct amdgpu_device *adev = dev->dev_private; 320 struct amdgpu_encoder *amdgpu_encoder; 321 struct drm_encoder *encoder; 322 323 amdgpu_encoder = kzalloc(sizeof(*amdgpu_encoder), GFP_KERNEL); 324 if (!amdgpu_encoder) 325 return NULL; 326 327 encoder = &amdgpu_encoder->base; 328 encoder->possible_crtcs = amdgpu_dm_get_encoder_crtc_mask(adev); 329 330 drm_encoder_init( 331 dev, 332 &amdgpu_encoder->base, 333 &amdgpu_dm_encoder_funcs, 334 DRM_MODE_ENCODER_DPMST, 335 NULL); 336 337 drm_encoder_helper_add(encoder, &amdgpu_dm_encoder_helper_funcs); 338 339 return amdgpu_encoder; 340 } 341 342 static struct drm_connector * 343 dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 344 struct drm_dp_mst_port *port, 345 const char *pathprop) 346 { 347 struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr); 348 struct drm_device *dev = master->base.dev; 349 struct amdgpu_device *adev = dev->dev_private; 350 struct amdgpu_dm_connector *aconnector; 351 struct drm_connector *connector; 352 353 aconnector = kzalloc(sizeof(*aconnector), GFP_KERNEL); 354 if (!aconnector) 355 return NULL; 356 357 connector = &aconnector->base; 358 aconnector->port = port; 359 aconnector->mst_port = master; 360 361 if (drm_connector_init( 362 dev, 363 connector, 364 &dm_dp_mst_connector_funcs, 365 DRM_MODE_CONNECTOR_DisplayPort)) { 366 kfree(aconnector); 367 return NULL; 368 } 369 drm_connector_helper_add(connector, &dm_dp_mst_connector_helper_funcs); 370 371 amdgpu_dm_connector_init_helper( 372 &adev->dm, 373 aconnector, 374 DRM_MODE_CONNECTOR_DisplayPort, 375 master->dc_link, 376 master->connector_id); 377 378 aconnector->mst_encoder = dm_dp_create_fake_mst_encoder(master); 379 drm_mode_connector_attach_encoder(&aconnector->base, 380 &aconnector->mst_encoder->base); 381 382 drm_object_attach_property( 383 &connector->base, 384 dev->mode_config.path_property, 385 0); 386 drm_object_attach_property( 387 &connector->base, 388 dev->mode_config.tile_property, 389 0); 390 391 drm_mode_connector_set_path_property(connector, pathprop); 392 393 /* 394 * Initialize connector state before adding the connectror to drm and 395 * framebuffer lists 396 */ 397 amdgpu_dm_connector_funcs_reset(connector); 398 399 DRM_INFO("DM_MST: added connector: %p [id: %d] [master: %p]\n", 400 aconnector, connector->base.id, aconnector->mst_port); 401 402 DRM_DEBUG_KMS(":%d\n", connector->base.id); 403 404 return connector; 405 } 406 407 static void dm_dp_destroy_mst_connector(struct drm_dp_mst_topology_mgr *mgr, 408 struct drm_connector *connector) 409 { 410 struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr); 411 struct drm_device *dev = master->base.dev; 412 struct amdgpu_device *adev = dev->dev_private; 413 struct amdgpu_dm_connector *aconnector = to_amdgpu_dm_connector(connector); 414 415 DRM_INFO("DM_MST: Disabling connector: %p [id: %d] [master: %p]\n", 416 aconnector, connector->base.id, aconnector->mst_port); 417 418 aconnector->port = NULL; 419 if (aconnector->dc_sink) { 420 amdgpu_dm_remove_sink_from_freesync_module(connector); 421 dc_link_remove_remote_sink(aconnector->dc_link, aconnector->dc_sink); 422 dc_sink_release(aconnector->dc_sink); 423 aconnector->dc_sink = NULL; 424 aconnector->dc_link->cur_link_settings.lane_count = 0; 425 } 426 427 drm_connector_unregister(connector); 428 if (adev->mode_info.rfbdev) 429 drm_fb_helper_remove_one_connector(&adev->mode_info.rfbdev->helper, connector); 430 drm_connector_put(connector); 431 } 432 433 static void dm_dp_mst_hotplug(struct drm_dp_mst_topology_mgr *mgr) 434 { 435 struct amdgpu_dm_connector *master = container_of(mgr, struct amdgpu_dm_connector, mst_mgr); 436 struct drm_device *dev = master->base.dev; 437 438 drm_kms_helper_hotplug_event(dev); 439 } 440 441 static void dm_dp_mst_register_connector(struct drm_connector *connector) 442 { 443 struct drm_device *dev = connector->dev; 444 struct amdgpu_device *adev = dev->dev_private; 445 446 if (adev->mode_info.rfbdev) 447 drm_fb_helper_add_one_connector(&adev->mode_info.rfbdev->helper, connector); 448 else 449 DRM_ERROR("adev->mode_info.rfbdev is NULL\n"); 450 451 drm_connector_register(connector); 452 } 453 454 static const struct drm_dp_mst_topology_cbs dm_mst_cbs = { 455 .add_connector = dm_dp_add_mst_connector, 456 .destroy_connector = dm_dp_destroy_mst_connector, 457 .hotplug = dm_dp_mst_hotplug, 458 .register_connector = dm_dp_mst_register_connector 459 }; 460 461 void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, 462 struct amdgpu_dm_connector *aconnector) 463 { 464 aconnector->dm_dp_aux.aux.name = "dmdc"; 465 aconnector->dm_dp_aux.aux.dev = dm->adev->dev; 466 aconnector->dm_dp_aux.aux.transfer = dm_dp_aux_transfer; 467 aconnector->dm_dp_aux.ddc_service = aconnector->dc_link->ddc; 468 469 drm_dp_aux_register(&aconnector->dm_dp_aux.aux); 470 aconnector->mst_mgr.cbs = &dm_mst_cbs; 471 drm_dp_mst_topology_mgr_init( 472 &aconnector->mst_mgr, 473 dm->adev->ddev, 474 &aconnector->dm_dp_aux.aux, 475 16, 476 4, 477 aconnector->connector_id); 478 } 479 480