1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #include "dm_services.h" 27 28 #include "ObjectID.h" 29 #include "atomfirmware.h" 30 31 #include "include/bios_parser_types.h" 32 33 #include "command_table_helper2.h" 34 35 bool dal_bios_parser_init_cmd_tbl_helper2( 36 const struct command_table_helper **h, 37 enum dce_version dce) 38 { 39 switch (dce) { 40 case DCE_VERSION_8_0: 41 case DCE_VERSION_8_1: 42 case DCE_VERSION_8_3: 43 *h = dal_cmd_tbl_helper_dce80_get_table(); 44 return true; 45 46 case DCE_VERSION_10_0: 47 *h = dal_cmd_tbl_helper_dce110_get_table(); 48 return true; 49 50 case DCE_VERSION_11_0: 51 *h = dal_cmd_tbl_helper_dce110_get_table(); 52 return true; 53 54 case DCE_VERSION_11_2: 55 case DCE_VERSION_11_22: 56 *h = dal_cmd_tbl_helper_dce112_get_table2(); 57 return true; 58 #if defined(CONFIG_DRM_AMD_DC_DCN1_0) 59 case DCN_VERSION_1_0: 60 *h = dal_cmd_tbl_helper_dce112_get_table2(); 61 return true; 62 #endif 63 64 case DCE_VERSION_12_0: 65 *h = dal_cmd_tbl_helper_dce112_get_table2(); 66 return true; 67 68 default: 69 /* Unsupported DCE */ 70 BREAK_TO_DEBUGGER(); 71 return false; 72 } 73 } 74 75 /* real implementations */ 76 77 bool dal_cmd_table_helper_controller_id_to_atom2( 78 enum controller_id id, 79 uint8_t *atom_id) 80 { 81 if (atom_id == NULL) { 82 BREAK_TO_DEBUGGER(); 83 return false; 84 } 85 86 switch (id) { 87 case CONTROLLER_ID_D0: 88 *atom_id = ATOM_CRTC1; 89 return true; 90 case CONTROLLER_ID_D1: 91 *atom_id = ATOM_CRTC2; 92 return true; 93 case CONTROLLER_ID_D2: 94 *atom_id = ATOM_CRTC3; 95 return true; 96 case CONTROLLER_ID_D3: 97 *atom_id = ATOM_CRTC4; 98 return true; 99 case CONTROLLER_ID_D4: 100 *atom_id = ATOM_CRTC5; 101 return true; 102 case CONTROLLER_ID_D5: 103 *atom_id = ATOM_CRTC6; 104 return true; 105 /* TODO :case CONTROLLER_ID_UNDERLAY0: 106 *atom_id = ATOM_UNDERLAY_PIPE0; 107 return true; 108 */ 109 case CONTROLLER_ID_UNDEFINED: 110 *atom_id = ATOM_CRTC_INVALID; 111 return true; 112 default: 113 /* Wrong controller id */ 114 BREAK_TO_DEBUGGER(); 115 return false; 116 } 117 } 118 119 /** 120 * translate_transmitter_bp_to_atom 121 * 122 * @brief 123 * Translate the Transmitter to the corresponding ATOM BIOS value 124 * 125 * @param 126 * input transmitter 127 * output digitalTransmitter 128 * // =00: Digital Transmitter1 ( UNIPHY linkAB ) 129 * // =01: Digital Transmitter2 ( UNIPHY linkCD ) 130 * // =02: Digital Transmitter3 ( UNIPHY linkEF ) 131 */ 132 uint8_t dal_cmd_table_helper_transmitter_bp_to_atom2( 133 enum transmitter t) 134 { 135 switch (t) { 136 case TRANSMITTER_UNIPHY_A: 137 case TRANSMITTER_UNIPHY_B: 138 case TRANSMITTER_TRAVIS_LCD: 139 return 0; 140 case TRANSMITTER_UNIPHY_C: 141 case TRANSMITTER_UNIPHY_D: 142 return 1; 143 case TRANSMITTER_UNIPHY_E: 144 case TRANSMITTER_UNIPHY_F: 145 return 2; 146 default: 147 /* Invalid Transmitter Type! */ 148 BREAK_TO_DEBUGGER(); 149 return 0; 150 } 151 } 152 153 uint32_t dal_cmd_table_helper_encoder_mode_bp_to_atom2( 154 enum signal_type s, 155 bool enable_dp_audio) 156 { 157 switch (s) { 158 case SIGNAL_TYPE_DVI_SINGLE_LINK: 159 case SIGNAL_TYPE_DVI_DUAL_LINK: 160 return ATOM_ENCODER_MODE_DVI; 161 case SIGNAL_TYPE_HDMI_TYPE_A: 162 return ATOM_ENCODER_MODE_HDMI; 163 case SIGNAL_TYPE_LVDS: 164 return ATOM_ENCODER_MODE_LVDS; 165 case SIGNAL_TYPE_EDP: 166 case SIGNAL_TYPE_DISPLAY_PORT_MST: 167 case SIGNAL_TYPE_DISPLAY_PORT: 168 case SIGNAL_TYPE_VIRTUAL: 169 if (enable_dp_audio) 170 return ATOM_ENCODER_MODE_DP_AUDIO; 171 else 172 return ATOM_ENCODER_MODE_DP; 173 case SIGNAL_TYPE_RGB: 174 return ATOM_ENCODER_MODE_CRT; 175 default: 176 return ATOM_ENCODER_MODE_CRT; 177 } 178 } 179 180 bool dal_cmd_table_helper_clock_source_id_to_ref_clk_src2( 181 enum clock_source_id id, 182 uint32_t *ref_clk_src_id) 183 { 184 if (ref_clk_src_id == NULL) { 185 BREAK_TO_DEBUGGER(); 186 return false; 187 } 188 189 switch (id) { 190 case CLOCK_SOURCE_ID_PLL1: 191 *ref_clk_src_id = ENCODER_REFCLK_SRC_P1PLL; 192 return true; 193 case CLOCK_SOURCE_ID_PLL2: 194 *ref_clk_src_id = ENCODER_REFCLK_SRC_P2PLL; 195 return true; 196 /*TODO:case CLOCK_SOURCE_ID_DCPLL: 197 *ref_clk_src_id = ENCODER_REFCLK_SRC_DCPLL; 198 return true; 199 */ 200 case CLOCK_SOURCE_ID_EXTERNAL: 201 *ref_clk_src_id = ENCODER_REFCLK_SRC_EXTCLK; 202 return true; 203 case CLOCK_SOURCE_ID_UNDEFINED: 204 *ref_clk_src_id = ENCODER_REFCLK_SRC_INVALID; 205 return true; 206 default: 207 /* Unsupported clock source id */ 208 BREAK_TO_DEBUGGER(); 209 return false; 210 } 211 } 212 213 uint8_t dal_cmd_table_helper_encoder_id_to_atom2( 214 enum encoder_id id) 215 { 216 switch (id) { 217 case ENCODER_ID_INTERNAL_LVDS: 218 return ENCODER_OBJECT_ID_INTERNAL_LVDS; 219 case ENCODER_ID_INTERNAL_TMDS1: 220 return ENCODER_OBJECT_ID_INTERNAL_TMDS1; 221 case ENCODER_ID_INTERNAL_TMDS2: 222 return ENCODER_OBJECT_ID_INTERNAL_TMDS2; 223 case ENCODER_ID_INTERNAL_DAC1: 224 return ENCODER_OBJECT_ID_INTERNAL_DAC1; 225 case ENCODER_ID_INTERNAL_DAC2: 226 return ENCODER_OBJECT_ID_INTERNAL_DAC2; 227 case ENCODER_ID_INTERNAL_LVTM1: 228 return ENCODER_OBJECT_ID_INTERNAL_LVTM1; 229 case ENCODER_ID_INTERNAL_HDMI: 230 return ENCODER_OBJECT_ID_HDMI_INTERNAL; 231 case ENCODER_ID_EXTERNAL_TRAVIS: 232 return ENCODER_OBJECT_ID_TRAVIS; 233 case ENCODER_ID_EXTERNAL_NUTMEG: 234 return ENCODER_OBJECT_ID_NUTMEG; 235 case ENCODER_ID_INTERNAL_KLDSCP_TMDS1: 236 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1; 237 case ENCODER_ID_INTERNAL_KLDSCP_DAC1: 238 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1; 239 case ENCODER_ID_INTERNAL_KLDSCP_DAC2: 240 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2; 241 case ENCODER_ID_EXTERNAL_MVPU_FPGA: 242 return ENCODER_OBJECT_ID_MVPU_FPGA; 243 case ENCODER_ID_INTERNAL_DDI: 244 return ENCODER_OBJECT_ID_INTERNAL_DDI; 245 case ENCODER_ID_INTERNAL_UNIPHY: 246 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY; 247 case ENCODER_ID_INTERNAL_KLDSCP_LVTMA: 248 return ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA; 249 case ENCODER_ID_INTERNAL_UNIPHY1: 250 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY1; 251 case ENCODER_ID_INTERNAL_UNIPHY2: 252 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY2; 253 case ENCODER_ID_INTERNAL_UNIPHY3: 254 return ENCODER_OBJECT_ID_INTERNAL_UNIPHY3; 255 case ENCODER_ID_INTERNAL_WIRELESS: 256 return ENCODER_OBJECT_ID_INTERNAL_VCE; 257 case ENCODER_ID_INTERNAL_VIRTUAL: 258 return ENCODER_OBJECT_ID_NONE; 259 case ENCODER_ID_UNKNOWN: 260 return ENCODER_OBJECT_ID_NONE; 261 default: 262 /* Invalid encoder id */ 263 BREAK_TO_DEBUGGER(); 264 return ENCODER_OBJECT_ID_NONE; 265 } 266 } 267