xref: /dragonfly/sys/dev/drm/amd/display/dc/gpio/hpd_regs.h (revision 7d3e9a5b)
1 /*
2  * Copyright 2012-16 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_
27 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_
28 
29 #include "gpio_regs.h"
30 
31 #define ONE_MORE_0 1
32 #define ONE_MORE_1 2
33 #define ONE_MORE_2 3
34 #define ONE_MORE_3 4
35 #define ONE_MORE_4 5
36 #define ONE_MORE_5 6
37 
38 
39 #define HPD_GPIO_REG_LIST_ENTRY(type,cd,id) \
40 	.type ## _reg =  REG(DC_GPIO_HPD_## type),\
41 	.type ## _mask =  DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## _MASK,\
42 	.type ## _shift = DC_GPIO_HPD_ ## type ## __DC_GPIO_HPD ## id ## _ ## type ## __SHIFT
43 
44 #define HPD_GPIO_REG_LIST(id) \
45 	{\
46 	HPD_GPIO_REG_LIST_ENTRY(MASK,cd,id),\
47 	HPD_GPIO_REG_LIST_ENTRY(A,cd,id),\
48 	HPD_GPIO_REG_LIST_ENTRY(EN,cd,id),\
49 	HPD_GPIO_REG_LIST_ENTRY(Y,cd,id)\
50 	}
51 
52 #define HPD_REG_LIST(id) \
53 	HPD_GPIO_REG_LIST(ONE_MORE_ ## id), \
54 	.int_status = REGI(DC_HPD_INT_STATUS, HPD, id),\
55 	.toggle_filt_cntl = REGI(DC_HPD_TOGGLE_FILT_CNTL, HPD, id)
56 
57  #define HPD_MASK_SH_LIST(mask_sh) \
58 		SF_HPD(DC_HPD_INT_STATUS, DC_HPD_SENSE_DELAYED, mask_sh),\
59 		SF_HPD(DC_HPD_INT_STATUS, DC_HPD_SENSE, mask_sh),\
60 		SF_HPD(DC_HPD_TOGGLE_FILT_CNTL, DC_HPD_CONNECT_INT_DELAY, mask_sh),\
61 		SF_HPD(DC_HPD_TOGGLE_FILT_CNTL, DC_HPD_DISCONNECT_INT_DELAY, mask_sh)
62 
63 struct hpd_registers {
64 	struct gpio_registers gpio;
65 	uint32_t int_status;
66 	uint32_t toggle_filt_cntl;
67 };
68 
69 struct hpd_sh_mask {
70 	/* int_status */
71 	uint32_t DC_HPD_SENSE_DELAYED;
72 	uint32_t DC_HPD_SENSE;
73 	/* toggle_filt_cntl */
74 	uint32_t DC_HPD_CONNECT_INT_DELAY;
75 	uint32_t DC_HPD_DISCONNECT_INT_DELAY;
76 };
77 
78 
79 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_GPIO_HPD_REGS_H_ */
80