1 /*
2  * Copyright 2012-16 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #include "dm_services.h"
27 
28 #include "include/i2caux_interface.h"
29 #include "../i2caux.h"
30 #include "../engine.h"
31 #include "../i2c_engine.h"
32 #include "../i2c_sw_engine.h"
33 #include "../i2c_hw_engine.h"
34 
35 #include "../dce110/i2c_hw_engine_dce110.h"
36 #include "../dce110/aux_engine_dce110.h"
37 #include "../dce110/i2caux_dce110.h"
38 
39 #include "dce/dce_12_0_offset.h"
40 #include "dce/dce_12_0_sh_mask.h"
41 #include "soc15_hw_ip.h"
42 #include "vega10_ip_offset.h"
43 
44 #include "i2caux_dce120.h"
45 
46 /* begin *********************
47  * macros to expend register list macro defined in HW object header file */
48 
49 #define BASE_INNER(seg) \
50 	DCE_BASE__INST0_SEG ## seg
51 
52 /* compile time expand base address. */
53 #define BASE(seg) \
54 	BASE_INNER(seg)
55 
56 #define SR(reg_name)\
57 		.reg_name = BASE(mm ## reg_name ## _BASE_IDX) +  \
58 					mm ## reg_name
59 
60 #define SRI(reg_name, block, id)\
61 	.reg_name = BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
62 					mm ## block ## id ## _ ## reg_name
63 /* macros to expend register list macro defined in HW object header file
64  * end *********************/
65 
66 #define aux_regs(id)\
67 [id] = {\
68 	AUX_COMMON_REG_LIST(id), \
69 	.AUX_RESET_MASK = DP_AUX0_AUX_CONTROL__AUX_RESET_MASK \
70 }
71 
72 static const struct dce110_aux_registers dce120_aux_regs[] = {
73 		aux_regs(0),
74 		aux_regs(1),
75 		aux_regs(2),
76 		aux_regs(3),
77 		aux_regs(4),
78 		aux_regs(5),
79 };
80 
81 #define hw_engine_regs(id)\
82 {\
83 		I2C_HW_ENGINE_COMMON_REG_LIST(id) \
84 }
85 
86 static const struct dce110_i2c_hw_engine_registers dce120_hw_engine_regs[] = {
87 		hw_engine_regs(1),
88 		hw_engine_regs(2),
89 		hw_engine_regs(3),
90 		hw_engine_regs(4),
91 		hw_engine_regs(5),
92 		hw_engine_regs(6)
93 };
94 
95 static const struct dce110_i2c_hw_engine_shift i2c_shift = {
96 		I2C_COMMON_MASK_SH_LIST_DCE110(__SHIFT)
97 };
98 
99 static const struct dce110_i2c_hw_engine_mask i2c_mask = {
100 		I2C_COMMON_MASK_SH_LIST_DCE110(_MASK)
101 };
102 
103 struct i2caux *dal_i2caux_dce120_create(
104 	struct dc_context *ctx)
105 {
106 	struct i2caux_dce110 *i2caux_dce110 =
107 		kzalloc(sizeof(struct i2caux_dce110), GFP_KERNEL);
108 
109 	if (!i2caux_dce110) {
110 		ASSERT_CRITICAL(false);
111 		return NULL;
112 	}
113 
114 	dal_i2caux_dce110_construct(i2caux_dce110,
115 				    ctx,
116 				    ARRAY_SIZE(dce120_aux_regs),
117 				    dce120_aux_regs,
118 				    dce120_hw_engine_regs,
119 				    &i2c_shift,
120 				    &i2c_mask);
121 	return &i2caux_dce110->base;
122 }
123