1 /* 2 * Copyright 2012-15 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25 26 #ifndef __DAL_I2C_AUX_H__ 27 #define __DAL_I2C_AUX_H__ 28 29 uint32_t dal_i2caux_get_reference_clock( 30 struct dc_bios *bios); 31 32 struct i2caux; 33 34 struct engine; 35 36 struct i2caux_funcs { 37 void (*destroy)(struct i2caux **ptr); 38 struct i2c_engine * (*acquire_i2c_sw_engine)( 39 struct i2caux *i2caux, 40 struct ddc *ddc); 41 struct i2c_engine * (*acquire_i2c_hw_engine)( 42 struct i2caux *i2caux, 43 struct ddc *ddc); 44 struct aux_engine * (*acquire_aux_engine)( 45 struct i2caux *i2caux, 46 struct ddc *ddc); 47 void (*release_engine)( 48 struct i2caux *i2caux, 49 struct engine *engine); 50 }; 51 52 struct i2c_engine; 53 struct aux_engine; 54 55 struct i2caux { 56 struct dc_context *ctx; 57 const struct i2caux_funcs *funcs; 58 /* On ASIC we have certain amount of lines with HW DDC engine 59 * (4, 6, or maybe more in the future). 60 * For every such line, we create separate HW DDC engine 61 * (since we have these engines in HW) and separate SW DDC engine 62 * (to allow concurrent use of few lines). 63 * In similar way we have AUX engines. */ 64 65 /* I2C SW engines, per DDC line. 66 * Only lines with HW DDC support will be initialized */ 67 struct i2c_engine *i2c_sw_engines[GPIO_DDC_LINE_COUNT]; 68 69 /* I2C HW engines, per DDC line. 70 * Only lines with HW DDC support will be initialized */ 71 struct i2c_engine *i2c_hw_engines[GPIO_DDC_LINE_COUNT]; 72 73 /* AUX engines, per DDC line. 74 * Only lines with HW AUX support will be initialized */ 75 struct aux_engine *aux_engines[GPIO_DDC_LINE_COUNT]; 76 77 /* For all other lines, we can use 78 * single instance of generic I2C HW engine 79 * (since in HW, there is single instance of it) 80 * or single instance of generic I2C SW engine. 81 * AUX is not supported for other lines. */ 82 83 /* General-purpose I2C SW engine. 84 * Can be assigned dynamically to any line per transaction */ 85 struct i2c_engine *i2c_generic_sw_engine; 86 87 /* General-purpose I2C generic HW engine. 88 * Can be assigned dynamically to almost any line per transaction */ 89 struct i2c_engine *i2c_generic_hw_engine; 90 91 /* [anaumov] in DAL2, there is a Mutex */ 92 93 uint32_t aux_timeout_period; 94 95 /* expressed in KHz */ 96 uint32_t default_i2c_sw_speed; 97 uint32_t default_i2c_hw_speed; 98 }; 99 100 void dal_i2caux_construct( 101 struct i2caux *i2caux, 102 struct dc_context *ctx); 103 104 void dal_i2caux_release_engine( 105 struct i2caux *i2caux, 106 struct engine *engine); 107 108 void dal_i2caux_destruct( 109 struct i2caux *i2caux); 110 111 struct i2c_engine *dal_i2caux_acquire_i2c_sw_engine( 112 struct i2caux *i2caux, 113 struct ddc *ddc); 114 115 struct aux_engine *dal_i2caux_acquire_aux_engine( 116 struct i2caux *i2caux, 117 struct ddc *ddc); 118 119 #endif 120