1 /*
2  * Copyright 2012-15 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  *
24  */
25 
26 #ifndef __DAL_TIMING_GENERATOR_TYPES_H__
27 #define __DAL_TIMING_GENERATOR_TYPES_H__
28 
29 #include "hw_shared.h"
30 
31 struct dc_bios;
32 
33 /* Contains CRTC vertical/horizontal pixel counters */
34 struct crtc_position {
35 	int32_t vertical_count;
36 	int32_t horizontal_count;
37 	int32_t nominal_vcount;
38 };
39 
40 struct dcp_gsl_params {
41 	int gsl_group;
42 	int gsl_master;
43 };
44 
45 struct gsl_params {
46 	int gsl0_en;
47 	int gsl1_en;
48 	int gsl2_en;
49 	int gsl_master_en;
50 	int gsl_master_mode;
51 	int master_update_lock_gsl_en;
52 	int gsl_window_start_x;
53 	int gsl_window_end_x;
54 	int gsl_window_start_y;
55 	int gsl_window_end_y;
56 };
57 
58 /* define the structure of Dynamic Refresh Mode */
59 struct drr_params {
60 	uint32_t vertical_total_min;
61 	uint32_t vertical_total_max;
62 	bool immediate_flip;
63 };
64 
65 #define LEFT_EYE_3D_PRIMARY_SURFACE 1
66 #define RIGHT_EYE_3D_PRIMARY_SURFACE 0
67 
68 enum crtc_state {
69 	CRTC_STATE_VBLANK = 0,
70 	CRTC_STATE_VACTIVE
71 };
72 
73 struct _dlg_otg_param {
74 	int vstartup_start;
75 	int vupdate_offset;
76 	int vupdate_width;
77 	int vready_offset;
78 	enum signal_type signal;
79 };
80 
81 struct vupdate_keepout_params {
82 	int start_offset;
83 	int end_offset;
84 	int enable;
85 };
86 
87 struct crtc_stereo_flags {
88 	uint8_t PROGRAM_STEREO         : 1;
89 	uint8_t PROGRAM_POLARITY       : 1;
90 	uint8_t RIGHT_EYE_POLARITY     : 1;
91 	uint8_t FRAME_PACKED           : 1;
92 	uint8_t DISABLE_STEREO_DP_SYNC : 1;
93 };
94 
95 enum crc_selection {
96 	/* Order must match values expected by hardware */
97 	UNION_WINDOW_A_B = 0,
98 	UNION_WINDOW_A_NOT_B,
99 	UNION_WINDOW_NOT_A_B,
100 	UNION_WINDOW_NOT_A_NOT_B,
101 	INTERSECT_WINDOW_A_B,
102 	INTERSECT_WINDOW_A_NOT_B,
103 	INTERSECT_WINDOW_NOT_A_B,
104 	INTERSECT_WINDOW_NOT_A_NOT_B,
105 };
106 
107 struct crc_params {
108 	/* Regions used to calculate CRC*/
109 	uint16_t windowa_x_start;
110 	uint16_t windowa_x_end;
111 	uint16_t windowa_y_start;
112 	uint16_t windowa_y_end;
113 
114 	uint16_t windowb_x_start;
115 	uint16_t windowb_x_end;
116 	uint16_t windowb_y_start;
117 	uint16_t windowb_y_end;
118 
119 	enum crc_selection selection;
120 
121 	bool continuous_mode;
122 	bool enable;
123 };
124 
125 struct timing_generator {
126 	const struct timing_generator_funcs *funcs;
127 	struct dc_bios *bp;
128 	struct dc_context *ctx;
129 	struct _dlg_otg_param dlg_otg_param;
130 	int inst;
131 };
132 
133 struct dc_crtc_timing;
134 
135 struct drr_params;
136 
137 struct timing_generator_funcs {
138 	bool (*validate_timing)(struct timing_generator *tg,
139 							const struct dc_crtc_timing *timing);
140 	void (*program_timing)(struct timing_generator *tg,
141 							const struct dc_crtc_timing *timing,
142 							bool use_vbios);
143 	void (*program_vline_interrupt)(struct timing_generator *optc,
144 			const struct dc_crtc_timing *dc_crtc_timing,
145 			unsigned long long vsync_delta);
146 	bool (*enable_crtc)(struct timing_generator *tg);
147 	bool (*disable_crtc)(struct timing_generator *tg);
148 	bool (*is_counter_moving)(struct timing_generator *tg);
149 	void (*get_position)(struct timing_generator *tg,
150 				struct crtc_position *position);
151 
152 	uint32_t (*get_frame_count)(struct timing_generator *tg);
153 	void (*get_scanoutpos)(
154 		struct timing_generator *tg,
155 		uint32_t *v_blank_start,
156 		uint32_t *v_blank_end,
157 		uint32_t *h_position,
158 		uint32_t *v_position);
159 	bool (*get_otg_active_size)(struct timing_generator *optc,
160 			uint32_t *otg_active_width,
161 			uint32_t *otg_active_height);
162 	void (*set_early_control)(struct timing_generator *tg,
163 							   uint32_t early_cntl);
164 	void (*wait_for_state)(struct timing_generator *tg,
165 							enum crtc_state state);
166 	void (*set_blank)(struct timing_generator *tg,
167 					bool enable_blanking);
168 	bool (*is_blanked)(struct timing_generator *tg);
169 	void (*set_overscan_blank_color) (struct timing_generator *tg, const struct tg_color *color);
170 	void (*set_blank_color)(struct timing_generator *tg, const struct tg_color *color);
171 	void (*set_colors)(struct timing_generator *tg,
172 						const struct tg_color *blank_color,
173 						const struct tg_color *overscan_color);
174 
175 	void (*disable_vga)(struct timing_generator *tg);
176 	bool (*did_triggered_reset_occur)(struct timing_generator *tg);
177 	void (*setup_global_swap_lock)(struct timing_generator *tg,
178 							const struct dcp_gsl_params *gsl_params);
179 	void (*unlock)(struct timing_generator *tg);
180 	void (*lock)(struct timing_generator *tg);
181 	void (*enable_reset_trigger)(struct timing_generator *tg,
182 				     int source_tg_inst);
183 	void (*enable_crtc_reset)(struct timing_generator *tg,
184 				  int source_tg_inst,
185 				  struct crtc_trigger_info *crtc_tp);
186 	void (*disable_reset_trigger)(struct timing_generator *tg);
187 	void (*tear_down_global_swap_lock)(struct timing_generator *tg);
188 	void (*enable_advanced_request)(struct timing_generator *tg,
189 					bool enable, const struct dc_crtc_timing *timing);
190 	void (*set_drr)(struct timing_generator *tg, const struct drr_params *params);
191 	void (*set_static_screen_control)(struct timing_generator *tg,
192 							uint32_t value);
193 	void (*set_test_pattern)(
194 		struct timing_generator *tg,
195 		enum controller_dp_test_pattern test_pattern,
196 		enum dc_color_depth color_depth);
197 
198 	bool (*arm_vert_intr)(struct timing_generator *tg, uint8_t width);
199 
200 	void (*program_global_sync)(struct timing_generator *tg);
201 	void (*enable_optc_clock)(struct timing_generator *tg, bool enable);
202 	void (*program_stereo)(struct timing_generator *tg,
203 		const struct dc_crtc_timing *timing, struct crtc_stereo_flags *flags);
204 	bool (*is_stereo_left_eye)(struct timing_generator *tg);
205 
206 	void (*set_blank_data_double_buffer)(struct timing_generator *tg, bool enable);
207 
208 	void (*tg_init)(struct timing_generator *tg);
209 	bool (*is_tg_enabled)(struct timing_generator *tg);
210 	bool (*is_optc_underflow_occurred)(struct timing_generator *tg);
211 	void (*clear_optc_underflow)(struct timing_generator *tg);
212 
213 	/**
214 	 * Configure CRCs for the given timing generator. Return false if TG is
215 	 * not on.
216 	 */
217 	bool (*configure_crc)(struct timing_generator *tg,
218 			       const struct crc_params *params);
219 
220 	/**
221 	 * Get CRCs for the given timing generator. Return false if CRCs are
222 	 * not enabled (via configure_crc).
223 	 */
224 	bool (*get_crc)(struct timing_generator *tg,
225 			uint32_t *r_cr, uint32_t *g_y, uint32_t *b_cb);
226 
227 };
228 
229 #endif
230