xref: /dragonfly/sys/dev/drm/amd/display/dc/inc/resource.h (revision 7d3e9a5b)
1 /*
2  * Copyright 2015 Advanced Micro Devices, Inc.
3  *
4  * Permission is hereby granted, free of charge, to any person obtaining a
5  * copy of this software and associated documentation files (the "Software"),
6  * to deal in the Software without restriction, including without limitation
7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8  * and/or sell copies of the Software, and to permit persons to whom the
9  * Software is furnished to do so, subject to the following conditions:
10  *
11  * The above copyright notice and this permission notice shall be included in
12  * all copies or substantial portions of the Software.
13  *
14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20  * OTHER DEALINGS IN THE SOFTWARE.
21  *
22  * Authors: AMD
23  */
24 
25 #ifndef DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
26 #define DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_
27 
28 #include "core_types.h"
29 #include "core_status.h"
30 #include "dal_asic_id.h"
31 #include "dm_pp_smu.h"
32 
33 /* TODO unhardcode, 4 for CZ*/
34 #define MEMORY_TYPE_MULTIPLIER 4
35 
36 enum dce_version resource_parse_asic_id(
37 		struct hw_asic_id asic_id);
38 
39 struct resource_caps {
40 	int num_timing_generator;
41 	int num_opp;
42 	int num_video_plane;
43 	int num_audio;
44 	int num_stream_encoder;
45 	int num_pll;
46 	int num_dwb;
47 };
48 
49 struct resource_straps {
50 	uint32_t hdmi_disable;
51 	uint32_t dc_pinstraps_audio;
52 	uint32_t audio_stream_number;
53 };
54 
55 struct resource_create_funcs {
56 	void (*read_dce_straps)(
57 			struct dc_context *ctx, struct resource_straps *straps);
58 
59 	struct audio *(*create_audio)(
60 			struct dc_context *ctx, unsigned int inst);
61 
62 	struct stream_encoder *(*create_stream_encoder)(
63 			enum engine_id eng_id, struct dc_context *ctx);
64 
65 	struct dce_hwseq *(*create_hwseq)(
66 			struct dc_context *ctx);
67 };
68 
69 bool resource_construct(
70 	unsigned int num_virtual_links,
71 	struct dc *dc,
72 	struct resource_pool *pool,
73 	const struct resource_create_funcs *create_funcs);
74 
75 struct resource_pool *dc_create_resource_pool(
76 				struct dc *dc,
77 				int num_virtual_links,
78 				enum dce_version dc_version,
79 				struct hw_asic_id asic_id);
80 
81 void dc_destroy_resource_pool(struct dc *dc);
82 
83 enum dc_status resource_map_pool_resources(
84 		const struct dc *dc,
85 		struct dc_state *context,
86 		struct dc_stream_state *stream);
87 
88 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
89 
90 enum dc_status resource_build_scaling_params_for_context(
91 		const struct dc *dc,
92 		struct dc_state *context);
93 
94 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
95 
96 void resource_unreference_clock_source(
97 		struct resource_context *res_ctx,
98 		const struct resource_pool *pool,
99 		struct clock_source *clock_source);
100 
101 void resource_reference_clock_source(
102 		struct resource_context *res_ctx,
103 		const struct resource_pool *pool,
104 		struct clock_source *clock_source);
105 
106 int resource_get_clock_source_reference(
107 		struct resource_context *res_ctx,
108 		const struct resource_pool *pool,
109 		struct clock_source *clock_source);
110 
111 bool resource_are_streams_timing_synchronizable(
112 		struct dc_stream_state *stream1,
113 		struct dc_stream_state *stream2);
114 
115 struct clock_source *resource_find_used_clk_src_for_sharing(
116 		struct resource_context *res_ctx,
117 		struct pipe_ctx *pipe_ctx);
118 
119 struct clock_source *dc_resource_find_first_free_pll(
120 		struct resource_context *res_ctx,
121 		const struct resource_pool *pool);
122 
123 struct pipe_ctx *resource_get_head_pipe_for_stream(
124 		struct resource_context *res_ctx,
125 		struct dc_stream_state *stream);
126 
127 bool resource_attach_surfaces_to_context(
128 		struct dc_plane_state *const *plane_state,
129 		int surface_count,
130 		struct dc_stream_state *dc_stream,
131 		struct dc_state *context,
132 		const struct resource_pool *pool);
133 
134 struct pipe_ctx *find_idle_secondary_pipe(
135 		struct resource_context *res_ctx,
136 		const struct resource_pool *pool);
137 
138 bool resource_is_stream_unchanged(
139 	struct dc_state *old_context, struct dc_stream_state *stream);
140 
141 bool resource_validate_attach_surfaces(
142 		const struct dc_validation_set set[],
143 		int set_count,
144 		const struct dc_state *old_context,
145 		struct dc_state *context,
146 		const struct resource_pool *pool);
147 
148 void resource_validate_ctx_update_pointer_after_copy(
149 		const struct dc_state *src_ctx,
150 		struct dc_state *dst_ctx);
151 
152 enum dc_status resource_map_clock_resources(
153 		const struct dc *dc,
154 		struct dc_state *context,
155 		struct dc_stream_state *stream);
156 
157 enum dc_status resource_map_phy_clock_resources(
158 		const struct dc *dc,
159 		struct dc_state *context,
160 		struct dc_stream_state *stream);
161 
162 bool pipe_need_reprogram(
163 		struct pipe_ctx *pipe_ctx_old,
164 		struct pipe_ctx *pipe_ctx);
165 
166 void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream,
167 		struct bit_depth_reduction_params *fmt_bit_depth);
168 
169 void update_audio_usage(
170 		struct resource_context *res_ctx,
171 		const struct resource_pool *pool,
172 		struct audio *audio,
173 		bool acquired);
174 #endif /* DRIVERS_GPU_DRM_AMD_DC_DEV_DC_INC_RESOURCE_H_ */
175