1 /*
2  * BIF_5_0 Register documentation
3  *
4  * Copyright (C) 2014  Advanced Micro Devices, Inc.
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a
7  * copy of this software and associated documentation files (the "Software"),
8  * to deal in the Software without restriction, including without limitation
9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10  * and/or sell copies of the Software, and to permit persons to whom the
11  * Software is furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included
14  * in all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
19  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
20  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
22  */
23 
24 #ifndef BIF_5_0_ENUM_H
25 #define BIF_5_0_ENUM_H
26 
27 typedef enum SurfaceEndian {
28 	ENDIAN_NONE                                      = 0x0,
29 	ENDIAN_8IN16                                     = 0x1,
30 	ENDIAN_8IN32                                     = 0x2,
31 	ENDIAN_8IN64                                     = 0x3,
32 } SurfaceEndian;
33 typedef enum ArrayMode {
34 	ARRAY_LINEAR_GENERAL                             = 0x0,
35 	ARRAY_LINEAR_ALIGNED                             = 0x1,
36 	ARRAY_1D_TILED_THIN1                             = 0x2,
37 	ARRAY_1D_TILED_THICK                             = 0x3,
38 	ARRAY_2D_TILED_THIN1                             = 0x4,
39 	ARRAY_PRT_TILED_THIN1                            = 0x5,
40 	ARRAY_PRT_2D_TILED_THIN1                         = 0x6,
41 	ARRAY_2D_TILED_THICK                             = 0x7,
42 	ARRAY_2D_TILED_XTHICK                            = 0x8,
43 	ARRAY_PRT_TILED_THICK                            = 0x9,
44 	ARRAY_PRT_2D_TILED_THICK                         = 0xa,
45 	ARRAY_PRT_3D_TILED_THIN1                         = 0xb,
46 	ARRAY_3D_TILED_THIN1                             = 0xc,
47 	ARRAY_3D_TILED_THICK                             = 0xd,
48 	ARRAY_3D_TILED_XTHICK                            = 0xe,
49 	ARRAY_PRT_3D_TILED_THICK                         = 0xf,
50 } ArrayMode;
51 typedef enum PipeTiling {
52 	CONFIG_1_PIPE                                    = 0x0,
53 	CONFIG_2_PIPE                                    = 0x1,
54 	CONFIG_4_PIPE                                    = 0x2,
55 	CONFIG_8_PIPE                                    = 0x3,
56 } PipeTiling;
57 typedef enum BankTiling {
58 	CONFIG_4_BANK                                    = 0x0,
59 	CONFIG_8_BANK                                    = 0x1,
60 } BankTiling;
61 typedef enum GroupInterleave {
62 	CONFIG_256B_GROUP                                = 0x0,
63 	CONFIG_512B_GROUP                                = 0x1,
64 } GroupInterleave;
65 typedef enum RowTiling {
66 	CONFIG_1KB_ROW                                   = 0x0,
67 	CONFIG_2KB_ROW                                   = 0x1,
68 	CONFIG_4KB_ROW                                   = 0x2,
69 	CONFIG_8KB_ROW                                   = 0x3,
70 	CONFIG_1KB_ROW_OPT                               = 0x4,
71 	CONFIG_2KB_ROW_OPT                               = 0x5,
72 	CONFIG_4KB_ROW_OPT                               = 0x6,
73 	CONFIG_8KB_ROW_OPT                               = 0x7,
74 } RowTiling;
75 typedef enum BankSwapBytes {
76 	CONFIG_128B_SWAPS                                = 0x0,
77 	CONFIG_256B_SWAPS                                = 0x1,
78 	CONFIG_512B_SWAPS                                = 0x2,
79 	CONFIG_1KB_SWAPS                                 = 0x3,
80 } BankSwapBytes;
81 typedef enum SampleSplitBytes {
82 	CONFIG_1KB_SPLIT                                 = 0x0,
83 	CONFIG_2KB_SPLIT                                 = 0x1,
84 	CONFIG_4KB_SPLIT                                 = 0x2,
85 	CONFIG_8KB_SPLIT                                 = 0x3,
86 } SampleSplitBytes;
87 typedef enum NumPipes {
88 	ADDR_CONFIG_1_PIPE                               = 0x0,
89 	ADDR_CONFIG_2_PIPE                               = 0x1,
90 	ADDR_CONFIG_4_PIPE                               = 0x2,
91 	ADDR_CONFIG_8_PIPE                               = 0x3,
92 } NumPipes;
93 typedef enum PipeInterleaveSize {
94 	ADDR_CONFIG_PIPE_INTERLEAVE_256B                 = 0x0,
95 	ADDR_CONFIG_PIPE_INTERLEAVE_512B                 = 0x1,
96 } PipeInterleaveSize;
97 typedef enum BankInterleaveSize {
98 	ADDR_CONFIG_BANK_INTERLEAVE_1                    = 0x0,
99 	ADDR_CONFIG_BANK_INTERLEAVE_2                    = 0x1,
100 	ADDR_CONFIG_BANK_INTERLEAVE_4                    = 0x2,
101 	ADDR_CONFIG_BANK_INTERLEAVE_8                    = 0x3,
102 } BankInterleaveSize;
103 typedef enum NumShaderEngines {
104 	ADDR_CONFIG_1_SHADER_ENGINE                      = 0x0,
105 	ADDR_CONFIG_2_SHADER_ENGINE                      = 0x1,
106 } NumShaderEngines;
107 typedef enum ShaderEngineTileSize {
108 	ADDR_CONFIG_SE_TILE_16                           = 0x0,
109 	ADDR_CONFIG_SE_TILE_32                           = 0x1,
110 } ShaderEngineTileSize;
111 typedef enum NumGPUs {
112 	ADDR_CONFIG_1_GPU                                = 0x0,
113 	ADDR_CONFIG_2_GPU                                = 0x1,
114 	ADDR_CONFIG_4_GPU                                = 0x2,
115 } NumGPUs;
116 typedef enum MultiGPUTileSize {
117 	ADDR_CONFIG_GPU_TILE_16                          = 0x0,
118 	ADDR_CONFIG_GPU_TILE_32                          = 0x1,
119 	ADDR_CONFIG_GPU_TILE_64                          = 0x2,
120 	ADDR_CONFIG_GPU_TILE_128                         = 0x3,
121 } MultiGPUTileSize;
122 typedef enum RowSize {
123 	ADDR_CONFIG_1KB_ROW                              = 0x0,
124 	ADDR_CONFIG_2KB_ROW                              = 0x1,
125 	ADDR_CONFIG_4KB_ROW                              = 0x2,
126 } RowSize;
127 typedef enum NumLowerPipes {
128 	ADDR_CONFIG_1_LOWER_PIPES                        = 0x0,
129 	ADDR_CONFIG_2_LOWER_PIPES                        = 0x1,
130 } NumLowerPipes;
131 typedef enum DebugBlockId {
132 	DBG_CLIENT_BLKID_RESERVED                        = 0x0,
133 	DBG_CLIENT_BLKID_dbg                             = 0x1,
134 	DBG_CLIENT_BLKID_scf2                            = 0x2,
135 	DBG_CLIENT_BLKID_mcd5                            = 0x3,
136 	DBG_CLIENT_BLKID_vmc                             = 0x4,
137 	DBG_CLIENT_BLKID_sx30                            = 0x5,
138 	DBG_CLIENT_BLKID_mcd2                            = 0x6,
139 	DBG_CLIENT_BLKID_bci1                            = 0x7,
140 	DBG_CLIENT_BLKID_xdma_dbg_client_wrapper         = 0x8,
141 	DBG_CLIENT_BLKID_mcc0                            = 0x9,
142 	DBG_CLIENT_BLKID_uvdf_0                          = 0xa,
143 	DBG_CLIENT_BLKID_uvdf_1                          = 0xb,
144 	DBG_CLIENT_BLKID_uvdf_2                          = 0xc,
145 	DBG_CLIENT_BLKID_uvdi_0                          = 0xd,
146 	DBG_CLIENT_BLKID_bci0                            = 0xe,
147 	DBG_CLIENT_BLKID_vcec0_0                         = 0xf,
148 	DBG_CLIENT_BLKID_cb100                           = 0x10,
149 	DBG_CLIENT_BLKID_cb001                           = 0x11,
150 	DBG_CLIENT_BLKID_mcd4                            = 0x12,
151 	DBG_CLIENT_BLKID_tmonw00                         = 0x13,
152 	DBG_CLIENT_BLKID_cb101                           = 0x14,
153 	DBG_CLIENT_BLKID_sx10                            = 0x15,
154 	DBG_CLIENT_BLKID_cb301                           = 0x16,
155 	DBG_CLIENT_BLKID_tmonw01                         = 0x17,
156 	DBG_CLIENT_BLKID_vcea0_0                         = 0x18,
157 	DBG_CLIENT_BLKID_vcea0_1                         = 0x19,
158 	DBG_CLIENT_BLKID_vcea0_2                         = 0x1a,
159 	DBG_CLIENT_BLKID_vcea0_3                         = 0x1b,
160 	DBG_CLIENT_BLKID_scf1                            = 0x1c,
161 	DBG_CLIENT_BLKID_sx20                            = 0x1d,
162 	DBG_CLIENT_BLKID_spim1                           = 0x1e,
163 	DBG_CLIENT_BLKID_pa10                            = 0x1f,
164 	DBG_CLIENT_BLKID_pa00                            = 0x20,
165 	DBG_CLIENT_BLKID_gmcon                           = 0x21,
166 	DBG_CLIENT_BLKID_mcb                             = 0x22,
167 	DBG_CLIENT_BLKID_vgt0                            = 0x23,
168 	DBG_CLIENT_BLKID_pc0                             = 0x24,
169 	DBG_CLIENT_BLKID_bci2                            = 0x25,
170 	DBG_CLIENT_BLKID_uvdb_0                          = 0x26,
171 	DBG_CLIENT_BLKID_spim3                           = 0x27,
172 	DBG_CLIENT_BLKID_cpc_0                           = 0x28,
173 	DBG_CLIENT_BLKID_cpc_1                           = 0x29,
174 	DBG_CLIENT_BLKID_uvdm_0                          = 0x2a,
175 	DBG_CLIENT_BLKID_uvdm_1                          = 0x2b,
176 	DBG_CLIENT_BLKID_uvdm_2                          = 0x2c,
177 	DBG_CLIENT_BLKID_uvdm_3                          = 0x2d,
178 	DBG_CLIENT_BLKID_cb000                           = 0x2e,
179 	DBG_CLIENT_BLKID_spim0                           = 0x2f,
180 	DBG_CLIENT_BLKID_mcc2                            = 0x30,
181 	DBG_CLIENT_BLKID_ds0                             = 0x31,
182 	DBG_CLIENT_BLKID_srbm                            = 0x32,
183 	DBG_CLIENT_BLKID_ih                              = 0x33,
184 	DBG_CLIENT_BLKID_sem                             = 0x34,
185 	DBG_CLIENT_BLKID_sdma_0                          = 0x35,
186 	DBG_CLIENT_BLKID_sdma_1                          = 0x36,
187 	DBG_CLIENT_BLKID_hdp                             = 0x37,
188 	DBG_CLIENT_BLKID_acp_0                           = 0x38,
189 	DBG_CLIENT_BLKID_acp_1                           = 0x39,
190 	DBG_CLIENT_BLKID_cb200                           = 0x3a,
191 	DBG_CLIENT_BLKID_scf3                            = 0x3b,
192 	DBG_CLIENT_BLKID_vceb1_0                         = 0x3c,
193 	DBG_CLIENT_BLKID_vcea1_0                         = 0x3d,
194 	DBG_CLIENT_BLKID_vcea1_1                         = 0x3e,
195 	DBG_CLIENT_BLKID_vcea1_2                         = 0x3f,
196 	DBG_CLIENT_BLKID_vcea1_3                         = 0x40,
197 	DBG_CLIENT_BLKID_bci3                            = 0x41,
198 	DBG_CLIENT_BLKID_mcd0                            = 0x42,
199 	DBG_CLIENT_BLKID_pa11                            = 0x43,
200 	DBG_CLIENT_BLKID_pa01                            = 0x44,
201 	DBG_CLIENT_BLKID_cb201                           = 0x45,
202 	DBG_CLIENT_BLKID_spim2                           = 0x46,
203 	DBG_CLIENT_BLKID_vgt2                            = 0x47,
204 	DBG_CLIENT_BLKID_pc2                             = 0x48,
205 	DBG_CLIENT_BLKID_smu_0                           = 0x49,
206 	DBG_CLIENT_BLKID_smu_1                           = 0x4a,
207 	DBG_CLIENT_BLKID_smu_2                           = 0x4b,
208 	DBG_CLIENT_BLKID_cb1                             = 0x4c,
209 	DBG_CLIENT_BLKID_ia0                             = 0x4d,
210 	DBG_CLIENT_BLKID_wd                              = 0x4e,
211 	DBG_CLIENT_BLKID_ia1                             = 0x4f,
212 	DBG_CLIENT_BLKID_vcec1_0                         = 0x50,
213 	DBG_CLIENT_BLKID_scf0                            = 0x51,
214 	DBG_CLIENT_BLKID_vgt1                            = 0x52,
215 	DBG_CLIENT_BLKID_pc1                             = 0x53,
216 	DBG_CLIENT_BLKID_cb0                             = 0x54,
217 	DBG_CLIENT_BLKID_gdc_one_0                       = 0x55,
218 	DBG_CLIENT_BLKID_gdc_one_1                       = 0x56,
219 	DBG_CLIENT_BLKID_gdc_one_2                       = 0x57,
220 	DBG_CLIENT_BLKID_gdc_one_3                       = 0x58,
221 	DBG_CLIENT_BLKID_gdc_one_4                       = 0x59,
222 	DBG_CLIENT_BLKID_gdc_one_5                       = 0x5a,
223 	DBG_CLIENT_BLKID_gdc_one_6                       = 0x5b,
224 	DBG_CLIENT_BLKID_gdc_one_7                       = 0x5c,
225 	DBG_CLIENT_BLKID_gdc_one_8                       = 0x5d,
226 	DBG_CLIENT_BLKID_gdc_one_9                       = 0x5e,
227 	DBG_CLIENT_BLKID_gdc_one_10                      = 0x5f,
228 	DBG_CLIENT_BLKID_gdc_one_11                      = 0x60,
229 	DBG_CLIENT_BLKID_gdc_one_12                      = 0x61,
230 	DBG_CLIENT_BLKID_gdc_one_13                      = 0x62,
231 	DBG_CLIENT_BLKID_gdc_one_14                      = 0x63,
232 	DBG_CLIENT_BLKID_gdc_one_15                      = 0x64,
233 	DBG_CLIENT_BLKID_gdc_one_16                      = 0x65,
234 	DBG_CLIENT_BLKID_gdc_one_17                      = 0x66,
235 	DBG_CLIENT_BLKID_gdc_one_18                      = 0x67,
236 	DBG_CLIENT_BLKID_gdc_one_19                      = 0x68,
237 	DBG_CLIENT_BLKID_gdc_one_20                      = 0x69,
238 	DBG_CLIENT_BLKID_gdc_one_21                      = 0x6a,
239 	DBG_CLIENT_BLKID_gdc_one_22                      = 0x6b,
240 	DBG_CLIENT_BLKID_gdc_one_23                      = 0x6c,
241 	DBG_CLIENT_BLKID_gdc_one_24                      = 0x6d,
242 	DBG_CLIENT_BLKID_gdc_one_25                      = 0x6e,
243 	DBG_CLIENT_BLKID_gdc_one_26                      = 0x6f,
244 	DBG_CLIENT_BLKID_gdc_one_27                      = 0x70,
245 	DBG_CLIENT_BLKID_gdc_one_28                      = 0x71,
246 	DBG_CLIENT_BLKID_gdc_one_29                      = 0x72,
247 	DBG_CLIENT_BLKID_gdc_one_30                      = 0x73,
248 	DBG_CLIENT_BLKID_gdc_one_31                      = 0x74,
249 	DBG_CLIENT_BLKID_gdc_one_32                      = 0x75,
250 	DBG_CLIENT_BLKID_gdc_one_33                      = 0x76,
251 	DBG_CLIENT_BLKID_gdc_one_34                      = 0x77,
252 	DBG_CLIENT_BLKID_gdc_one_35                      = 0x78,
253 	DBG_CLIENT_BLKID_vceb0_0                         = 0x79,
254 	DBG_CLIENT_BLKID_vgt3                            = 0x7a,
255 	DBG_CLIENT_BLKID_pc3                             = 0x7b,
256 	DBG_CLIENT_BLKID_mcd3                            = 0x7c,
257 	DBG_CLIENT_BLKID_uvdu_0                          = 0x7d,
258 	DBG_CLIENT_BLKID_uvdu_1                          = 0x7e,
259 	DBG_CLIENT_BLKID_uvdu_2                          = 0x7f,
260 	DBG_CLIENT_BLKID_uvdu_3                          = 0x80,
261 	DBG_CLIENT_BLKID_uvdu_4                          = 0x81,
262 	DBG_CLIENT_BLKID_uvdu_5                          = 0x82,
263 	DBG_CLIENT_BLKID_uvdu_6                          = 0x83,
264 	DBG_CLIENT_BLKID_cb300                           = 0x84,
265 	DBG_CLIENT_BLKID_mcd1                            = 0x85,
266 	DBG_CLIENT_BLKID_sx00                            = 0x86,
267 	DBG_CLIENT_BLKID_uvdc_0                          = 0x87,
268 	DBG_CLIENT_BLKID_uvdc_1                          = 0x88,
269 	DBG_CLIENT_BLKID_mcc3                            = 0x89,
270 	DBG_CLIENT_BLKID_cpg_0                           = 0x8a,
271 	DBG_CLIENT_BLKID_cpg_1                           = 0x8b,
272 	DBG_CLIENT_BLKID_gck                             = 0x8c,
273 	DBG_CLIENT_BLKID_mcc1                            = 0x8d,
274 	DBG_CLIENT_BLKID_cpf_0                           = 0x8e,
275 	DBG_CLIENT_BLKID_cpf_1                           = 0x8f,
276 	DBG_CLIENT_BLKID_rlc                             = 0x90,
277 	DBG_CLIENT_BLKID_grbm                            = 0x91,
278 	DBG_CLIENT_BLKID_sammsp                          = 0x92,
279 	DBG_CLIENT_BLKID_dci_pg                          = 0x93,
280 	DBG_CLIENT_BLKID_dci_0                           = 0x94,
281 	DBG_CLIENT_BLKID_dccg0_0                         = 0x95,
282 	DBG_CLIENT_BLKID_dccg0_1                         = 0x96,
283 	DBG_CLIENT_BLKID_dcfe01_0                        = 0x97,
284 	DBG_CLIENT_BLKID_dcfe02_0                        = 0x98,
285 	DBG_CLIENT_BLKID_dcfe03_0                        = 0x99,
286 	DBG_CLIENT_BLKID_dcfe04_0                        = 0x9a,
287 	DBG_CLIENT_BLKID_dcfe05_0                        = 0x9b,
288 	DBG_CLIENT_BLKID_dcfe06_0                        = 0x9c,
289 	DBG_CLIENT_BLKID_RESERVED_LAST                   = 0x9d,
290 } DebugBlockId;
291 typedef enum DebugBlockId_OLD {
292 	DBG_BLOCK_ID_RESERVED                            = 0x0,
293 	DBG_BLOCK_ID_DBG                                 = 0x1,
294 	DBG_BLOCK_ID_VMC                                 = 0x2,
295 	DBG_BLOCK_ID_PDMA                                = 0x3,
296 	DBG_BLOCK_ID_CG                                  = 0x4,
297 	DBG_BLOCK_ID_SRBM                                = 0x5,
298 	DBG_BLOCK_ID_GRBM                                = 0x6,
299 	DBG_BLOCK_ID_RLC                                 = 0x7,
300 	DBG_BLOCK_ID_CSC                                 = 0x8,
301 	DBG_BLOCK_ID_SEM                                 = 0x9,
302 	DBG_BLOCK_ID_IH                                  = 0xa,
303 	DBG_BLOCK_ID_SC                                  = 0xb,
304 	DBG_BLOCK_ID_SQ                                  = 0xc,
305 	DBG_BLOCK_ID_AVP                                 = 0xd,
306 	DBG_BLOCK_ID_GMCON                               = 0xe,
307 	DBG_BLOCK_ID_SMU                                 = 0xf,
308 	DBG_BLOCK_ID_DMA0                                = 0x10,
309 	DBG_BLOCK_ID_DMA1                                = 0x11,
310 	DBG_BLOCK_ID_SPIM                                = 0x12,
311 	DBG_BLOCK_ID_GDS                                 = 0x13,
312 	DBG_BLOCK_ID_SPIS                                = 0x14,
313 	DBG_BLOCK_ID_UNUSED0                             = 0x15,
314 	DBG_BLOCK_ID_PA0                                 = 0x16,
315 	DBG_BLOCK_ID_PA1                                 = 0x17,
316 	DBG_BLOCK_ID_CP0                                 = 0x18,
317 	DBG_BLOCK_ID_CP1                                 = 0x19,
318 	DBG_BLOCK_ID_CP2                                 = 0x1a,
319 	DBG_BLOCK_ID_UNUSED1                             = 0x1b,
320 	DBG_BLOCK_ID_UVDU                                = 0x1c,
321 	DBG_BLOCK_ID_UVDM                                = 0x1d,
322 	DBG_BLOCK_ID_VCE                                 = 0x1e,
323 	DBG_BLOCK_ID_UNUSED2                             = 0x1f,
324 	DBG_BLOCK_ID_VGT0                                = 0x20,
325 	DBG_BLOCK_ID_VGT1                                = 0x21,
326 	DBG_BLOCK_ID_IA                                  = 0x22,
327 	DBG_BLOCK_ID_UNUSED3                             = 0x23,
328 	DBG_BLOCK_ID_SCT0                                = 0x24,
329 	DBG_BLOCK_ID_SCT1                                = 0x25,
330 	DBG_BLOCK_ID_SPM0                                = 0x26,
331 	DBG_BLOCK_ID_SPM1                                = 0x27,
332 	DBG_BLOCK_ID_TCAA                                = 0x28,
333 	DBG_BLOCK_ID_TCAB                                = 0x29,
334 	DBG_BLOCK_ID_TCCA                                = 0x2a,
335 	DBG_BLOCK_ID_TCCB                                = 0x2b,
336 	DBG_BLOCK_ID_MCC0                                = 0x2c,
337 	DBG_BLOCK_ID_MCC1                                = 0x2d,
338 	DBG_BLOCK_ID_MCC2                                = 0x2e,
339 	DBG_BLOCK_ID_MCC3                                = 0x2f,
340 	DBG_BLOCK_ID_SX0                                 = 0x30,
341 	DBG_BLOCK_ID_SX1                                 = 0x31,
342 	DBG_BLOCK_ID_SX2                                 = 0x32,
343 	DBG_BLOCK_ID_SX3                                 = 0x33,
344 	DBG_BLOCK_ID_UNUSED4                             = 0x34,
345 	DBG_BLOCK_ID_UNUSED5                             = 0x35,
346 	DBG_BLOCK_ID_UNUSED6                             = 0x36,
347 	DBG_BLOCK_ID_UNUSED7                             = 0x37,
348 	DBG_BLOCK_ID_PC0                                 = 0x38,
349 	DBG_BLOCK_ID_PC1                                 = 0x39,
350 	DBG_BLOCK_ID_UNUSED8                             = 0x3a,
351 	DBG_BLOCK_ID_UNUSED9                             = 0x3b,
352 	DBG_BLOCK_ID_UNUSED10                            = 0x3c,
353 	DBG_BLOCK_ID_UNUSED11                            = 0x3d,
354 	DBG_BLOCK_ID_MCB                                 = 0x3e,
355 	DBG_BLOCK_ID_UNUSED12                            = 0x3f,
356 	DBG_BLOCK_ID_SCB0                                = 0x40,
357 	DBG_BLOCK_ID_SCB1                                = 0x41,
358 	DBG_BLOCK_ID_UNUSED13                            = 0x42,
359 	DBG_BLOCK_ID_UNUSED14                            = 0x43,
360 	DBG_BLOCK_ID_SCF0                                = 0x44,
361 	DBG_BLOCK_ID_SCF1                                = 0x45,
362 	DBG_BLOCK_ID_UNUSED15                            = 0x46,
363 	DBG_BLOCK_ID_UNUSED16                            = 0x47,
364 	DBG_BLOCK_ID_BCI0                                = 0x48,
365 	DBG_BLOCK_ID_BCI1                                = 0x49,
366 	DBG_BLOCK_ID_BCI2                                = 0x4a,
367 	DBG_BLOCK_ID_BCI3                                = 0x4b,
368 	DBG_BLOCK_ID_UNUSED17                            = 0x4c,
369 	DBG_BLOCK_ID_UNUSED18                            = 0x4d,
370 	DBG_BLOCK_ID_UNUSED19                            = 0x4e,
371 	DBG_BLOCK_ID_UNUSED20                            = 0x4f,
372 	DBG_BLOCK_ID_CB00                                = 0x50,
373 	DBG_BLOCK_ID_CB01                                = 0x51,
374 	DBG_BLOCK_ID_CB02                                = 0x52,
375 	DBG_BLOCK_ID_CB03                                = 0x53,
376 	DBG_BLOCK_ID_CB04                                = 0x54,
377 	DBG_BLOCK_ID_UNUSED21                            = 0x55,
378 	DBG_BLOCK_ID_UNUSED22                            = 0x56,
379 	DBG_BLOCK_ID_UNUSED23                            = 0x57,
380 	DBG_BLOCK_ID_CB10                                = 0x58,
381 	DBG_BLOCK_ID_CB11                                = 0x59,
382 	DBG_BLOCK_ID_CB12                                = 0x5a,
383 	DBG_BLOCK_ID_CB13                                = 0x5b,
384 	DBG_BLOCK_ID_CB14                                = 0x5c,
385 	DBG_BLOCK_ID_UNUSED24                            = 0x5d,
386 	DBG_BLOCK_ID_UNUSED25                            = 0x5e,
387 	DBG_BLOCK_ID_UNUSED26                            = 0x5f,
388 	DBG_BLOCK_ID_TCP0                                = 0x60,
389 	DBG_BLOCK_ID_TCP1                                = 0x61,
390 	DBG_BLOCK_ID_TCP2                                = 0x62,
391 	DBG_BLOCK_ID_TCP3                                = 0x63,
392 	DBG_BLOCK_ID_TCP4                                = 0x64,
393 	DBG_BLOCK_ID_TCP5                                = 0x65,
394 	DBG_BLOCK_ID_TCP6                                = 0x66,
395 	DBG_BLOCK_ID_TCP7                                = 0x67,
396 	DBG_BLOCK_ID_TCP8                                = 0x68,
397 	DBG_BLOCK_ID_TCP9                                = 0x69,
398 	DBG_BLOCK_ID_TCP10                               = 0x6a,
399 	DBG_BLOCK_ID_TCP11                               = 0x6b,
400 	DBG_BLOCK_ID_TCP12                               = 0x6c,
401 	DBG_BLOCK_ID_TCP13                               = 0x6d,
402 	DBG_BLOCK_ID_TCP14                               = 0x6e,
403 	DBG_BLOCK_ID_TCP15                               = 0x6f,
404 	DBG_BLOCK_ID_TCP16                               = 0x70,
405 	DBG_BLOCK_ID_TCP17                               = 0x71,
406 	DBG_BLOCK_ID_TCP18                               = 0x72,
407 	DBG_BLOCK_ID_TCP19                               = 0x73,
408 	DBG_BLOCK_ID_TCP20                               = 0x74,
409 	DBG_BLOCK_ID_TCP21                               = 0x75,
410 	DBG_BLOCK_ID_TCP22                               = 0x76,
411 	DBG_BLOCK_ID_TCP23                               = 0x77,
412 	DBG_BLOCK_ID_TCP_RESERVED0                       = 0x78,
413 	DBG_BLOCK_ID_TCP_RESERVED1                       = 0x79,
414 	DBG_BLOCK_ID_TCP_RESERVED2                       = 0x7a,
415 	DBG_BLOCK_ID_TCP_RESERVED3                       = 0x7b,
416 	DBG_BLOCK_ID_TCP_RESERVED4                       = 0x7c,
417 	DBG_BLOCK_ID_TCP_RESERVED5                       = 0x7d,
418 	DBG_BLOCK_ID_TCP_RESERVED6                       = 0x7e,
419 	DBG_BLOCK_ID_TCP_RESERVED7                       = 0x7f,
420 	DBG_BLOCK_ID_DB00                                = 0x80,
421 	DBG_BLOCK_ID_DB01                                = 0x81,
422 	DBG_BLOCK_ID_DB02                                = 0x82,
423 	DBG_BLOCK_ID_DB03                                = 0x83,
424 	DBG_BLOCK_ID_DB04                                = 0x84,
425 	DBG_BLOCK_ID_UNUSED27                            = 0x85,
426 	DBG_BLOCK_ID_UNUSED28                            = 0x86,
427 	DBG_BLOCK_ID_UNUSED29                            = 0x87,
428 	DBG_BLOCK_ID_DB10                                = 0x88,
429 	DBG_BLOCK_ID_DB11                                = 0x89,
430 	DBG_BLOCK_ID_DB12                                = 0x8a,
431 	DBG_BLOCK_ID_DB13                                = 0x8b,
432 	DBG_BLOCK_ID_DB14                                = 0x8c,
433 	DBG_BLOCK_ID_UNUSED30                            = 0x8d,
434 	DBG_BLOCK_ID_UNUSED31                            = 0x8e,
435 	DBG_BLOCK_ID_UNUSED32                            = 0x8f,
436 	DBG_BLOCK_ID_TCC0                                = 0x90,
437 	DBG_BLOCK_ID_TCC1                                = 0x91,
438 	DBG_BLOCK_ID_TCC2                                = 0x92,
439 	DBG_BLOCK_ID_TCC3                                = 0x93,
440 	DBG_BLOCK_ID_TCC4                                = 0x94,
441 	DBG_BLOCK_ID_TCC5                                = 0x95,
442 	DBG_BLOCK_ID_TCC6                                = 0x96,
443 	DBG_BLOCK_ID_TCC7                                = 0x97,
444 	DBG_BLOCK_ID_SPS00                               = 0x98,
445 	DBG_BLOCK_ID_SPS01                               = 0x99,
446 	DBG_BLOCK_ID_SPS02                               = 0x9a,
447 	DBG_BLOCK_ID_SPS10                               = 0x9b,
448 	DBG_BLOCK_ID_SPS11                               = 0x9c,
449 	DBG_BLOCK_ID_SPS12                               = 0x9d,
450 	DBG_BLOCK_ID_UNUSED33                            = 0x9e,
451 	DBG_BLOCK_ID_UNUSED34                            = 0x9f,
452 	DBG_BLOCK_ID_TA00                                = 0xa0,
453 	DBG_BLOCK_ID_TA01                                = 0xa1,
454 	DBG_BLOCK_ID_TA02                                = 0xa2,
455 	DBG_BLOCK_ID_TA03                                = 0xa3,
456 	DBG_BLOCK_ID_TA04                                = 0xa4,
457 	DBG_BLOCK_ID_TA05                                = 0xa5,
458 	DBG_BLOCK_ID_TA06                                = 0xa6,
459 	DBG_BLOCK_ID_TA07                                = 0xa7,
460 	DBG_BLOCK_ID_TA08                                = 0xa8,
461 	DBG_BLOCK_ID_TA09                                = 0xa9,
462 	DBG_BLOCK_ID_TA0A                                = 0xaa,
463 	DBG_BLOCK_ID_TA0B                                = 0xab,
464 	DBG_BLOCK_ID_UNUSED35                            = 0xac,
465 	DBG_BLOCK_ID_UNUSED36                            = 0xad,
466 	DBG_BLOCK_ID_UNUSED37                            = 0xae,
467 	DBG_BLOCK_ID_UNUSED38                            = 0xaf,
468 	DBG_BLOCK_ID_TA10                                = 0xb0,
469 	DBG_BLOCK_ID_TA11                                = 0xb1,
470 	DBG_BLOCK_ID_TA12                                = 0xb2,
471 	DBG_BLOCK_ID_TA13                                = 0xb3,
472 	DBG_BLOCK_ID_TA14                                = 0xb4,
473 	DBG_BLOCK_ID_TA15                                = 0xb5,
474 	DBG_BLOCK_ID_TA16                                = 0xb6,
475 	DBG_BLOCK_ID_TA17                                = 0xb7,
476 	DBG_BLOCK_ID_TA18                                = 0xb8,
477 	DBG_BLOCK_ID_TA19                                = 0xb9,
478 	DBG_BLOCK_ID_TA1A                                = 0xba,
479 	DBG_BLOCK_ID_TA1B                                = 0xbb,
480 	DBG_BLOCK_ID_UNUSED39                            = 0xbc,
481 	DBG_BLOCK_ID_UNUSED40                            = 0xbd,
482 	DBG_BLOCK_ID_UNUSED41                            = 0xbe,
483 	DBG_BLOCK_ID_UNUSED42                            = 0xbf,
484 	DBG_BLOCK_ID_TD00                                = 0xc0,
485 	DBG_BLOCK_ID_TD01                                = 0xc1,
486 	DBG_BLOCK_ID_TD02                                = 0xc2,
487 	DBG_BLOCK_ID_TD03                                = 0xc3,
488 	DBG_BLOCK_ID_TD04                                = 0xc4,
489 	DBG_BLOCK_ID_TD05                                = 0xc5,
490 	DBG_BLOCK_ID_TD06                                = 0xc6,
491 	DBG_BLOCK_ID_TD07                                = 0xc7,
492 	DBG_BLOCK_ID_TD08                                = 0xc8,
493 	DBG_BLOCK_ID_TD09                                = 0xc9,
494 	DBG_BLOCK_ID_TD0A                                = 0xca,
495 	DBG_BLOCK_ID_TD0B                                = 0xcb,
496 	DBG_BLOCK_ID_UNUSED43                            = 0xcc,
497 	DBG_BLOCK_ID_UNUSED44                            = 0xcd,
498 	DBG_BLOCK_ID_UNUSED45                            = 0xce,
499 	DBG_BLOCK_ID_UNUSED46                            = 0xcf,
500 	DBG_BLOCK_ID_TD10                                = 0xd0,
501 	DBG_BLOCK_ID_TD11                                = 0xd1,
502 	DBG_BLOCK_ID_TD12                                = 0xd2,
503 	DBG_BLOCK_ID_TD13                                = 0xd3,
504 	DBG_BLOCK_ID_TD14                                = 0xd4,
505 	DBG_BLOCK_ID_TD15                                = 0xd5,
506 	DBG_BLOCK_ID_TD16                                = 0xd6,
507 	DBG_BLOCK_ID_TD17                                = 0xd7,
508 	DBG_BLOCK_ID_TD18                                = 0xd8,
509 	DBG_BLOCK_ID_TD19                                = 0xd9,
510 	DBG_BLOCK_ID_TD1A                                = 0xda,
511 	DBG_BLOCK_ID_TD1B                                = 0xdb,
512 	DBG_BLOCK_ID_UNUSED47                            = 0xdc,
513 	DBG_BLOCK_ID_UNUSED48                            = 0xdd,
514 	DBG_BLOCK_ID_UNUSED49                            = 0xde,
515 	DBG_BLOCK_ID_UNUSED50                            = 0xdf,
516 	DBG_BLOCK_ID_MCD0                                = 0xe0,
517 	DBG_BLOCK_ID_MCD1                                = 0xe1,
518 	DBG_BLOCK_ID_MCD2                                = 0xe2,
519 	DBG_BLOCK_ID_MCD3                                = 0xe3,
520 	DBG_BLOCK_ID_MCD4                                = 0xe4,
521 	DBG_BLOCK_ID_MCD5                                = 0xe5,
522 	DBG_BLOCK_ID_UNUSED51                            = 0xe6,
523 	DBG_BLOCK_ID_UNUSED52                            = 0xe7,
524 } DebugBlockId_OLD;
525 typedef enum DebugBlockId_BY2 {
526 	DBG_BLOCK_ID_RESERVED_BY2                        = 0x0,
527 	DBG_BLOCK_ID_VMC_BY2                             = 0x1,
528 	DBG_BLOCK_ID_CG_BY2                              = 0x2,
529 	DBG_BLOCK_ID_GRBM_BY2                            = 0x3,
530 	DBG_BLOCK_ID_CSC_BY2                             = 0x4,
531 	DBG_BLOCK_ID_IH_BY2                              = 0x5,
532 	DBG_BLOCK_ID_SQ_BY2                              = 0x6,
533 	DBG_BLOCK_ID_GMCON_BY2                           = 0x7,
534 	DBG_BLOCK_ID_DMA0_BY2                            = 0x8,
535 	DBG_BLOCK_ID_SPIM_BY2                            = 0x9,
536 	DBG_BLOCK_ID_SPIS_BY2                            = 0xa,
537 	DBG_BLOCK_ID_PA0_BY2                             = 0xb,
538 	DBG_BLOCK_ID_CP0_BY2                             = 0xc,
539 	DBG_BLOCK_ID_CP2_BY2                             = 0xd,
540 	DBG_BLOCK_ID_UVDU_BY2                            = 0xe,
541 	DBG_BLOCK_ID_VCE_BY2                             = 0xf,
542 	DBG_BLOCK_ID_VGT0_BY2                            = 0x10,
543 	DBG_BLOCK_ID_IA_BY2                              = 0x11,
544 	DBG_BLOCK_ID_SCT0_BY2                            = 0x12,
545 	DBG_BLOCK_ID_SPM0_BY2                            = 0x13,
546 	DBG_BLOCK_ID_TCAA_BY2                            = 0x14,
547 	DBG_BLOCK_ID_TCCA_BY2                            = 0x15,
548 	DBG_BLOCK_ID_MCC0_BY2                            = 0x16,
549 	DBG_BLOCK_ID_MCC2_BY2                            = 0x17,
550 	DBG_BLOCK_ID_SX0_BY2                             = 0x18,
551 	DBG_BLOCK_ID_SX2_BY2                             = 0x19,
552 	DBG_BLOCK_ID_UNUSED4_BY2                         = 0x1a,
553 	DBG_BLOCK_ID_UNUSED6_BY2                         = 0x1b,
554 	DBG_BLOCK_ID_PC0_BY2                             = 0x1c,
555 	DBG_BLOCK_ID_UNUSED8_BY2                         = 0x1d,
556 	DBG_BLOCK_ID_UNUSED10_BY2                        = 0x1e,
557 	DBG_BLOCK_ID_MCB_BY2                             = 0x1f,
558 	DBG_BLOCK_ID_SCB0_BY2                            = 0x20,
559 	DBG_BLOCK_ID_UNUSED13_BY2                        = 0x21,
560 	DBG_BLOCK_ID_SCF0_BY2                            = 0x22,
561 	DBG_BLOCK_ID_UNUSED15_BY2                        = 0x23,
562 	DBG_BLOCK_ID_BCI0_BY2                            = 0x24,
563 	DBG_BLOCK_ID_BCI2_BY2                            = 0x25,
564 	DBG_BLOCK_ID_UNUSED17_BY2                        = 0x26,
565 	DBG_BLOCK_ID_UNUSED19_BY2                        = 0x27,
566 	DBG_BLOCK_ID_CB00_BY2                            = 0x28,
567 	DBG_BLOCK_ID_CB02_BY2                            = 0x29,
568 	DBG_BLOCK_ID_CB04_BY2                            = 0x2a,
569 	DBG_BLOCK_ID_UNUSED22_BY2                        = 0x2b,
570 	DBG_BLOCK_ID_CB10_BY2                            = 0x2c,
571 	DBG_BLOCK_ID_CB12_BY2                            = 0x2d,
572 	DBG_BLOCK_ID_CB14_BY2                            = 0x2e,
573 	DBG_BLOCK_ID_UNUSED25_BY2                        = 0x2f,
574 	DBG_BLOCK_ID_TCP0_BY2                            = 0x30,
575 	DBG_BLOCK_ID_TCP2_BY2                            = 0x31,
576 	DBG_BLOCK_ID_TCP4_BY2                            = 0x32,
577 	DBG_BLOCK_ID_TCP6_BY2                            = 0x33,
578 	DBG_BLOCK_ID_TCP8_BY2                            = 0x34,
579 	DBG_BLOCK_ID_TCP10_BY2                           = 0x35,
580 	DBG_BLOCK_ID_TCP12_BY2                           = 0x36,
581 	DBG_BLOCK_ID_TCP14_BY2                           = 0x37,
582 	DBG_BLOCK_ID_TCP16_BY2                           = 0x38,
583 	DBG_BLOCK_ID_TCP18_BY2                           = 0x39,
584 	DBG_BLOCK_ID_TCP20_BY2                           = 0x3a,
585 	DBG_BLOCK_ID_TCP22_BY2                           = 0x3b,
586 	DBG_BLOCK_ID_TCP_RESERVED0_BY2                   = 0x3c,
587 	DBG_BLOCK_ID_TCP_RESERVED2_BY2                   = 0x3d,
588 	DBG_BLOCK_ID_TCP_RESERVED4_BY2                   = 0x3e,
589 	DBG_BLOCK_ID_TCP_RESERVED6_BY2                   = 0x3f,
590 	DBG_BLOCK_ID_DB00_BY2                            = 0x40,
591 	DBG_BLOCK_ID_DB02_BY2                            = 0x41,
592 	DBG_BLOCK_ID_DB04_BY2                            = 0x42,
593 	DBG_BLOCK_ID_UNUSED28_BY2                        = 0x43,
594 	DBG_BLOCK_ID_DB10_BY2                            = 0x44,
595 	DBG_BLOCK_ID_DB12_BY2                            = 0x45,
596 	DBG_BLOCK_ID_DB14_BY2                            = 0x46,
597 	DBG_BLOCK_ID_UNUSED31_BY2                        = 0x47,
598 	DBG_BLOCK_ID_TCC0_BY2                            = 0x48,
599 	DBG_BLOCK_ID_TCC2_BY2                            = 0x49,
600 	DBG_BLOCK_ID_TCC4_BY2                            = 0x4a,
601 	DBG_BLOCK_ID_TCC6_BY2                            = 0x4b,
602 	DBG_BLOCK_ID_SPS00_BY2                           = 0x4c,
603 	DBG_BLOCK_ID_SPS02_BY2                           = 0x4d,
604 	DBG_BLOCK_ID_SPS11_BY2                           = 0x4e,
605 	DBG_BLOCK_ID_UNUSED33_BY2                        = 0x4f,
606 	DBG_BLOCK_ID_TA00_BY2                            = 0x50,
607 	DBG_BLOCK_ID_TA02_BY2                            = 0x51,
608 	DBG_BLOCK_ID_TA04_BY2                            = 0x52,
609 	DBG_BLOCK_ID_TA06_BY2                            = 0x53,
610 	DBG_BLOCK_ID_TA08_BY2                            = 0x54,
611 	DBG_BLOCK_ID_TA0A_BY2                            = 0x55,
612 	DBG_BLOCK_ID_UNUSED35_BY2                        = 0x56,
613 	DBG_BLOCK_ID_UNUSED37_BY2                        = 0x57,
614 	DBG_BLOCK_ID_TA10_BY2                            = 0x58,
615 	DBG_BLOCK_ID_TA12_BY2                            = 0x59,
616 	DBG_BLOCK_ID_TA14_BY2                            = 0x5a,
617 	DBG_BLOCK_ID_TA16_BY2                            = 0x5b,
618 	DBG_BLOCK_ID_TA18_BY2                            = 0x5c,
619 	DBG_BLOCK_ID_TA1A_BY2                            = 0x5d,
620 	DBG_BLOCK_ID_UNUSED39_BY2                        = 0x5e,
621 	DBG_BLOCK_ID_UNUSED41_BY2                        = 0x5f,
622 	DBG_BLOCK_ID_TD00_BY2                            = 0x60,
623 	DBG_BLOCK_ID_TD02_BY2                            = 0x61,
624 	DBG_BLOCK_ID_TD04_BY2                            = 0x62,
625 	DBG_BLOCK_ID_TD06_BY2                            = 0x63,
626 	DBG_BLOCK_ID_TD08_BY2                            = 0x64,
627 	DBG_BLOCK_ID_TD0A_BY2                            = 0x65,
628 	DBG_BLOCK_ID_UNUSED43_BY2                        = 0x66,
629 	DBG_BLOCK_ID_UNUSED45_BY2                        = 0x67,
630 	DBG_BLOCK_ID_TD10_BY2                            = 0x68,
631 	DBG_BLOCK_ID_TD12_BY2                            = 0x69,
632 	DBG_BLOCK_ID_TD14_BY2                            = 0x6a,
633 	DBG_BLOCK_ID_TD16_BY2                            = 0x6b,
634 	DBG_BLOCK_ID_TD18_BY2                            = 0x6c,
635 	DBG_BLOCK_ID_TD1A_BY2                            = 0x6d,
636 	DBG_BLOCK_ID_UNUSED47_BY2                        = 0x6e,
637 	DBG_BLOCK_ID_UNUSED49_BY2                        = 0x6f,
638 	DBG_BLOCK_ID_MCD0_BY2                            = 0x70,
639 	DBG_BLOCK_ID_MCD2_BY2                            = 0x71,
640 	DBG_BLOCK_ID_MCD4_BY2                            = 0x72,
641 	DBG_BLOCK_ID_UNUSED51_BY2                        = 0x73,
642 } DebugBlockId_BY2;
643 typedef enum DebugBlockId_BY4 {
644 	DBG_BLOCK_ID_RESERVED_BY4                        = 0x0,
645 	DBG_BLOCK_ID_CG_BY4                              = 0x1,
646 	DBG_BLOCK_ID_CSC_BY4                             = 0x2,
647 	DBG_BLOCK_ID_SQ_BY4                              = 0x3,
648 	DBG_BLOCK_ID_DMA0_BY4                            = 0x4,
649 	DBG_BLOCK_ID_SPIS_BY4                            = 0x5,
650 	DBG_BLOCK_ID_CP0_BY4                             = 0x6,
651 	DBG_BLOCK_ID_UVDU_BY4                            = 0x7,
652 	DBG_BLOCK_ID_VGT0_BY4                            = 0x8,
653 	DBG_BLOCK_ID_SCT0_BY4                            = 0x9,
654 	DBG_BLOCK_ID_TCAA_BY4                            = 0xa,
655 	DBG_BLOCK_ID_MCC0_BY4                            = 0xb,
656 	DBG_BLOCK_ID_SX0_BY4                             = 0xc,
657 	DBG_BLOCK_ID_UNUSED4_BY4                         = 0xd,
658 	DBG_BLOCK_ID_PC0_BY4                             = 0xe,
659 	DBG_BLOCK_ID_UNUSED10_BY4                        = 0xf,
660 	DBG_BLOCK_ID_SCB0_BY4                            = 0x10,
661 	DBG_BLOCK_ID_SCF0_BY4                            = 0x11,
662 	DBG_BLOCK_ID_BCI0_BY4                            = 0x12,
663 	DBG_BLOCK_ID_UNUSED17_BY4                        = 0x13,
664 	DBG_BLOCK_ID_CB00_BY4                            = 0x14,
665 	DBG_BLOCK_ID_CB04_BY4                            = 0x15,
666 	DBG_BLOCK_ID_CB10_BY4                            = 0x16,
667 	DBG_BLOCK_ID_CB14_BY4                            = 0x17,
668 	DBG_BLOCK_ID_TCP0_BY4                            = 0x18,
669 	DBG_BLOCK_ID_TCP4_BY4                            = 0x19,
670 	DBG_BLOCK_ID_TCP8_BY4                            = 0x1a,
671 	DBG_BLOCK_ID_TCP12_BY4                           = 0x1b,
672 	DBG_BLOCK_ID_TCP16_BY4                           = 0x1c,
673 	DBG_BLOCK_ID_TCP20_BY4                           = 0x1d,
674 	DBG_BLOCK_ID_TCP_RESERVED0_BY4                   = 0x1e,
675 	DBG_BLOCK_ID_TCP_RESERVED4_BY4                   = 0x1f,
676 	DBG_BLOCK_ID_DB_BY4                              = 0x20,
677 	DBG_BLOCK_ID_DB04_BY4                            = 0x21,
678 	DBG_BLOCK_ID_DB10_BY4                            = 0x22,
679 	DBG_BLOCK_ID_DB14_BY4                            = 0x23,
680 	DBG_BLOCK_ID_TCC0_BY4                            = 0x24,
681 	DBG_BLOCK_ID_TCC4_BY4                            = 0x25,
682 	DBG_BLOCK_ID_SPS00_BY4                           = 0x26,
683 	DBG_BLOCK_ID_SPS11_BY4                           = 0x27,
684 	DBG_BLOCK_ID_TA00_BY4                            = 0x28,
685 	DBG_BLOCK_ID_TA04_BY4                            = 0x29,
686 	DBG_BLOCK_ID_TA08_BY4                            = 0x2a,
687 	DBG_BLOCK_ID_UNUSED35_BY4                        = 0x2b,
688 	DBG_BLOCK_ID_TA10_BY4                            = 0x2c,
689 	DBG_BLOCK_ID_TA14_BY4                            = 0x2d,
690 	DBG_BLOCK_ID_TA18_BY4                            = 0x2e,
691 	DBG_BLOCK_ID_UNUSED39_BY4                        = 0x2f,
692 	DBG_BLOCK_ID_TD00_BY4                            = 0x30,
693 	DBG_BLOCK_ID_TD04_BY4                            = 0x31,
694 	DBG_BLOCK_ID_TD08_BY4                            = 0x32,
695 	DBG_BLOCK_ID_UNUSED43_BY4                        = 0x33,
696 	DBG_BLOCK_ID_TD10_BY4                            = 0x34,
697 	DBG_BLOCK_ID_TD14_BY4                            = 0x35,
698 	DBG_BLOCK_ID_TD18_BY4                            = 0x36,
699 	DBG_BLOCK_ID_UNUSED47_BY4                        = 0x37,
700 	DBG_BLOCK_ID_MCD0_BY4                            = 0x38,
701 	DBG_BLOCK_ID_MCD4_BY4                            = 0x39,
702 } DebugBlockId_BY4;
703 typedef enum DebugBlockId_BY8 {
704 	DBG_BLOCK_ID_RESERVED_BY8                        = 0x0,
705 	DBG_BLOCK_ID_CSC_BY8                             = 0x1,
706 	DBG_BLOCK_ID_DMA0_BY8                            = 0x2,
707 	DBG_BLOCK_ID_CP0_BY8                             = 0x3,
708 	DBG_BLOCK_ID_VGT0_BY8                            = 0x4,
709 	DBG_BLOCK_ID_TCAA_BY8                            = 0x5,
710 	DBG_BLOCK_ID_SX0_BY8                             = 0x6,
711 	DBG_BLOCK_ID_PC0_BY8                             = 0x7,
712 	DBG_BLOCK_ID_SCB0_BY8                            = 0x8,
713 	DBG_BLOCK_ID_BCI0_BY8                            = 0x9,
714 	DBG_BLOCK_ID_CB00_BY8                            = 0xa,
715 	DBG_BLOCK_ID_CB10_BY8                            = 0xb,
716 	DBG_BLOCK_ID_TCP0_BY8                            = 0xc,
717 	DBG_BLOCK_ID_TCP8_BY8                            = 0xd,
718 	DBG_BLOCK_ID_TCP16_BY8                           = 0xe,
719 	DBG_BLOCK_ID_TCP_RESERVED0_BY8                   = 0xf,
720 	DBG_BLOCK_ID_DB00_BY8                            = 0x10,
721 	DBG_BLOCK_ID_DB10_BY8                            = 0x11,
722 	DBG_BLOCK_ID_TCC0_BY8                            = 0x12,
723 	DBG_BLOCK_ID_SPS00_BY8                           = 0x13,
724 	DBG_BLOCK_ID_TA00_BY8                            = 0x14,
725 	DBG_BLOCK_ID_TA08_BY8                            = 0x15,
726 	DBG_BLOCK_ID_TA10_BY8                            = 0x16,
727 	DBG_BLOCK_ID_TA18_BY8                            = 0x17,
728 	DBG_BLOCK_ID_TD00_BY8                            = 0x18,
729 	DBG_BLOCK_ID_TD08_BY8                            = 0x19,
730 	DBG_BLOCK_ID_TD10_BY8                            = 0x1a,
731 	DBG_BLOCK_ID_TD18_BY8                            = 0x1b,
732 	DBG_BLOCK_ID_MCD0_BY8                            = 0x1c,
733 } DebugBlockId_BY8;
734 typedef enum DebugBlockId_BY16 {
735 	DBG_BLOCK_ID_RESERVED_BY16                       = 0x0,
736 	DBG_BLOCK_ID_DMA0_BY16                           = 0x1,
737 	DBG_BLOCK_ID_VGT0_BY16                           = 0x2,
738 	DBG_BLOCK_ID_SX0_BY16                            = 0x3,
739 	DBG_BLOCK_ID_SCB0_BY16                           = 0x4,
740 	DBG_BLOCK_ID_CB00_BY16                           = 0x5,
741 	DBG_BLOCK_ID_TCP0_BY16                           = 0x6,
742 	DBG_BLOCK_ID_TCP16_BY16                          = 0x7,
743 	DBG_BLOCK_ID_DB00_BY16                           = 0x8,
744 	DBG_BLOCK_ID_TCC0_BY16                           = 0x9,
745 	DBG_BLOCK_ID_TA00_BY16                           = 0xa,
746 	DBG_BLOCK_ID_TA10_BY16                           = 0xb,
747 	DBG_BLOCK_ID_TD00_BY16                           = 0xc,
748 	DBG_BLOCK_ID_TD10_BY16                           = 0xd,
749 	DBG_BLOCK_ID_MCD0_BY16                           = 0xe,
750 } DebugBlockId_BY16;
751 typedef enum ColorTransform {
752 	DCC_CT_AUTO                                      = 0x0,
753 	DCC_CT_NONE                                      = 0x1,
754 	ABGR_TO_A_BG_G_RB                                = 0x2,
755 	BGRA_TO_BG_G_RB_A                                = 0x3,
756 } ColorTransform;
757 typedef enum CompareRef {
758 	REF_NEVER                                        = 0x0,
759 	REF_LESS                                         = 0x1,
760 	REF_EQUAL                                        = 0x2,
761 	REF_LEQUAL                                       = 0x3,
762 	REF_GREATER                                      = 0x4,
763 	REF_NOTEQUAL                                     = 0x5,
764 	REF_GEQUAL                                       = 0x6,
765 	REF_ALWAYS                                       = 0x7,
766 } CompareRef;
767 typedef enum ReadSize {
768 	READ_256_BITS                                    = 0x0,
769 	READ_512_BITS                                    = 0x1,
770 } ReadSize;
771 typedef enum DepthFormat {
772 	DEPTH_INVALID                                    = 0x0,
773 	DEPTH_16                                         = 0x1,
774 	DEPTH_X8_24                                      = 0x2,
775 	DEPTH_8_24                                       = 0x3,
776 	DEPTH_X8_24_FLOAT                                = 0x4,
777 	DEPTH_8_24_FLOAT                                 = 0x5,
778 	DEPTH_32_FLOAT                                   = 0x6,
779 	DEPTH_X24_8_32_FLOAT                             = 0x7,
780 } DepthFormat;
781 typedef enum ZFormat {
782 	Z_INVALID                                        = 0x0,
783 	Z_16                                             = 0x1,
784 	Z_24                                             = 0x2,
785 	Z_32_FLOAT                                       = 0x3,
786 } ZFormat;
787 typedef enum StencilFormat {
788 	STENCIL_INVALID                                  = 0x0,
789 	STENCIL_8                                        = 0x1,
790 } StencilFormat;
791 typedef enum CmaskMode {
792 	CMASK_CLEAR_NONE                                 = 0x0,
793 	CMASK_CLEAR_ONE                                  = 0x1,
794 	CMASK_CLEAR_ALL                                  = 0x2,
795 	CMASK_ANY_EXPANDED                               = 0x3,
796 	CMASK_ALPHA0_FRAG1                               = 0x4,
797 	CMASK_ALPHA0_FRAG2                               = 0x5,
798 	CMASK_ALPHA0_FRAG4                               = 0x6,
799 	CMASK_ALPHA0_FRAGS                               = 0x7,
800 	CMASK_ALPHA1_FRAG1                               = 0x8,
801 	CMASK_ALPHA1_FRAG2                               = 0x9,
802 	CMASK_ALPHA1_FRAG4                               = 0xa,
803 	CMASK_ALPHA1_FRAGS                               = 0xb,
804 	CMASK_ALPHAX_FRAG1                               = 0xc,
805 	CMASK_ALPHAX_FRAG2                               = 0xd,
806 	CMASK_ALPHAX_FRAG4                               = 0xe,
807 	CMASK_ALPHAX_FRAGS                               = 0xf,
808 } CmaskMode;
809 typedef enum QuadExportFormat {
810 	EXPORT_UNUSED                                    = 0x0,
811 	EXPORT_32_R                                      = 0x1,
812 	EXPORT_32_GR                                     = 0x2,
813 	EXPORT_32_AR                                     = 0x3,
814 	EXPORT_FP16_ABGR                                 = 0x4,
815 	EXPORT_UNSIGNED16_ABGR                           = 0x5,
816 	EXPORT_SIGNED16_ABGR                             = 0x6,
817 	EXPORT_32_ABGR                                   = 0x7,
818 } QuadExportFormat;
819 typedef enum QuadExportFormatOld {
820 	EXPORT_4P_32BPC_ABGR                             = 0x0,
821 	EXPORT_4P_16BPC_ABGR                             = 0x1,
822 	EXPORT_4P_32BPC_GR                               = 0x2,
823 	EXPORT_4P_32BPC_AR                               = 0x3,
824 	EXPORT_2P_32BPC_ABGR                             = 0x4,
825 	EXPORT_8P_32BPC_R                                = 0x5,
826 } QuadExportFormatOld;
827 typedef enum ColorFormat {
828 	COLOR_INVALID                                    = 0x0,
829 	COLOR_8                                          = 0x1,
830 	COLOR_16                                         = 0x2,
831 	COLOR_8_8                                        = 0x3,
832 	COLOR_32                                         = 0x4,
833 	COLOR_16_16                                      = 0x5,
834 	COLOR_10_11_11                                   = 0x6,
835 	COLOR_11_11_10                                   = 0x7,
836 	COLOR_10_10_10_2                                 = 0x8,
837 	COLOR_2_10_10_10                                 = 0x9,
838 	COLOR_8_8_8_8                                    = 0xa,
839 	COLOR_32_32                                      = 0xb,
840 	COLOR_16_16_16_16                                = 0xc,
841 	COLOR_RESERVED_13                                = 0xd,
842 	COLOR_32_32_32_32                                = 0xe,
843 	COLOR_RESERVED_15                                = 0xf,
844 	COLOR_5_6_5                                      = 0x10,
845 	COLOR_1_5_5_5                                    = 0x11,
846 	COLOR_5_5_5_1                                    = 0x12,
847 	COLOR_4_4_4_4                                    = 0x13,
848 	COLOR_8_24                                       = 0x14,
849 	COLOR_24_8                                       = 0x15,
850 	COLOR_X24_8_32_FLOAT                             = 0x16,
851 	COLOR_RESERVED_23                                = 0x17,
852 } ColorFormat;
853 typedef enum SurfaceFormat {
854 	FMT_INVALID                                      = 0x0,
855 	FMT_8                                            = 0x1,
856 	FMT_16                                           = 0x2,
857 	FMT_8_8                                          = 0x3,
858 	FMT_32                                           = 0x4,
859 	FMT_16_16                                        = 0x5,
860 	FMT_10_11_11                                     = 0x6,
861 	FMT_11_11_10                                     = 0x7,
862 	FMT_10_10_10_2                                   = 0x8,
863 	FMT_2_10_10_10                                   = 0x9,
864 	FMT_8_8_8_8                                      = 0xa,
865 	FMT_32_32                                        = 0xb,
866 	FMT_16_16_16_16                                  = 0xc,
867 	FMT_32_32_32                                     = 0xd,
868 	FMT_32_32_32_32                                  = 0xe,
869 	FMT_RESERVED_4                                   = 0xf,
870 	FMT_5_6_5                                        = 0x10,
871 	FMT_1_5_5_5                                      = 0x11,
872 	FMT_5_5_5_1                                      = 0x12,
873 	FMT_4_4_4_4                                      = 0x13,
874 	FMT_8_24                                         = 0x14,
875 	FMT_24_8                                         = 0x15,
876 	FMT_X24_8_32_FLOAT                               = 0x16,
877 	FMT_RESERVED_33                                  = 0x17,
878 	FMT_11_11_10_FLOAT                               = 0x18,
879 	FMT_16_FLOAT                                     = 0x19,
880 	FMT_32_FLOAT                                     = 0x1a,
881 	FMT_16_16_FLOAT                                  = 0x1b,
882 	FMT_8_24_FLOAT                                   = 0x1c,
883 	FMT_24_8_FLOAT                                   = 0x1d,
884 	FMT_32_32_FLOAT                                  = 0x1e,
885 	FMT_10_11_11_FLOAT                               = 0x1f,
886 	FMT_16_16_16_16_FLOAT                            = 0x20,
887 	FMT_3_3_2                                        = 0x21,
888 	FMT_6_5_5                                        = 0x22,
889 	FMT_32_32_32_32_FLOAT                            = 0x23,
890 	FMT_RESERVED_36                                  = 0x24,
891 	FMT_1                                            = 0x25,
892 	FMT_1_REVERSED                                   = 0x26,
893 	FMT_GB_GR                                        = 0x27,
894 	FMT_BG_RG                                        = 0x28,
895 	FMT_32_AS_8                                      = 0x29,
896 	FMT_32_AS_8_8                                    = 0x2a,
897 	FMT_5_9_9_9_SHAREDEXP                            = 0x2b,
898 	FMT_8_8_8                                        = 0x2c,
899 	FMT_16_16_16                                     = 0x2d,
900 	FMT_16_16_16_FLOAT                               = 0x2e,
901 	FMT_4_4                                          = 0x2f,
902 	FMT_32_32_32_FLOAT                               = 0x30,
903 	FMT_BC1                                          = 0x31,
904 	FMT_BC2                                          = 0x32,
905 	FMT_BC3                                          = 0x33,
906 	FMT_BC4                                          = 0x34,
907 	FMT_BC5                                          = 0x35,
908 	FMT_BC6                                          = 0x36,
909 	FMT_BC7                                          = 0x37,
910 	FMT_32_AS_32_32_32_32                            = 0x38,
911 	FMT_APC3                                         = 0x39,
912 	FMT_APC4                                         = 0x3a,
913 	FMT_APC5                                         = 0x3b,
914 	FMT_APC6                                         = 0x3c,
915 	FMT_APC7                                         = 0x3d,
916 	FMT_CTX1                                         = 0x3e,
917 	FMT_RESERVED_63                                  = 0x3f,
918 } SurfaceFormat;
919 typedef enum BUF_DATA_FORMAT {
920 	BUF_DATA_FORMAT_INVALID                          = 0x0,
921 	BUF_DATA_FORMAT_8                                = 0x1,
922 	BUF_DATA_FORMAT_16                               = 0x2,
923 	BUF_DATA_FORMAT_8_8                              = 0x3,
924 	BUF_DATA_FORMAT_32                               = 0x4,
925 	BUF_DATA_FORMAT_16_16                            = 0x5,
926 	BUF_DATA_FORMAT_10_11_11                         = 0x6,
927 	BUF_DATA_FORMAT_11_11_10                         = 0x7,
928 	BUF_DATA_FORMAT_10_10_10_2                       = 0x8,
929 	BUF_DATA_FORMAT_2_10_10_10                       = 0x9,
930 	BUF_DATA_FORMAT_8_8_8_8                          = 0xa,
931 	BUF_DATA_FORMAT_32_32                            = 0xb,
932 	BUF_DATA_FORMAT_16_16_16_16                      = 0xc,
933 	BUF_DATA_FORMAT_32_32_32                         = 0xd,
934 	BUF_DATA_FORMAT_32_32_32_32                      = 0xe,
935 	BUF_DATA_FORMAT_RESERVED_15                      = 0xf,
936 } BUF_DATA_FORMAT;
937 typedef enum IMG_DATA_FORMAT {
938 	IMG_DATA_FORMAT_INVALID                          = 0x0,
939 	IMG_DATA_FORMAT_8                                = 0x1,
940 	IMG_DATA_FORMAT_16                               = 0x2,
941 	IMG_DATA_FORMAT_8_8                              = 0x3,
942 	IMG_DATA_FORMAT_32                               = 0x4,
943 	IMG_DATA_FORMAT_16_16                            = 0x5,
944 	IMG_DATA_FORMAT_10_11_11                         = 0x6,
945 	IMG_DATA_FORMAT_11_11_10                         = 0x7,
946 	IMG_DATA_FORMAT_10_10_10_2                       = 0x8,
947 	IMG_DATA_FORMAT_2_10_10_10                       = 0x9,
948 	IMG_DATA_FORMAT_8_8_8_8                          = 0xa,
949 	IMG_DATA_FORMAT_32_32                            = 0xb,
950 	IMG_DATA_FORMAT_16_16_16_16                      = 0xc,
951 	IMG_DATA_FORMAT_32_32_32                         = 0xd,
952 	IMG_DATA_FORMAT_32_32_32_32                      = 0xe,
953 	IMG_DATA_FORMAT_RESERVED_15                      = 0xf,
954 	IMG_DATA_FORMAT_5_6_5                            = 0x10,
955 	IMG_DATA_FORMAT_1_5_5_5                          = 0x11,
956 	IMG_DATA_FORMAT_5_5_5_1                          = 0x12,
957 	IMG_DATA_FORMAT_4_4_4_4                          = 0x13,
958 	IMG_DATA_FORMAT_8_24                             = 0x14,
959 	IMG_DATA_FORMAT_24_8                             = 0x15,
960 	IMG_DATA_FORMAT_X24_8_32                         = 0x16,
961 	IMG_DATA_FORMAT_RESERVED_23                      = 0x17,
962 	IMG_DATA_FORMAT_RESERVED_24                      = 0x18,
963 	IMG_DATA_FORMAT_RESERVED_25                      = 0x19,
964 	IMG_DATA_FORMAT_RESERVED_26                      = 0x1a,
965 	IMG_DATA_FORMAT_RESERVED_27                      = 0x1b,
966 	IMG_DATA_FORMAT_RESERVED_28                      = 0x1c,
967 	IMG_DATA_FORMAT_RESERVED_29                      = 0x1d,
968 	IMG_DATA_FORMAT_RESERVED_30                      = 0x1e,
969 	IMG_DATA_FORMAT_RESERVED_31                      = 0x1f,
970 	IMG_DATA_FORMAT_GB_GR                            = 0x20,
971 	IMG_DATA_FORMAT_BG_RG                            = 0x21,
972 	IMG_DATA_FORMAT_5_9_9_9                          = 0x22,
973 	IMG_DATA_FORMAT_BC1                              = 0x23,
974 	IMG_DATA_FORMAT_BC2                              = 0x24,
975 	IMG_DATA_FORMAT_BC3                              = 0x25,
976 	IMG_DATA_FORMAT_BC4                              = 0x26,
977 	IMG_DATA_FORMAT_BC5                              = 0x27,
978 	IMG_DATA_FORMAT_BC6                              = 0x28,
979 	IMG_DATA_FORMAT_BC7                              = 0x29,
980 	IMG_DATA_FORMAT_RESERVED_42                      = 0x2a,
981 	IMG_DATA_FORMAT_RESERVED_43                      = 0x2b,
982 	IMG_DATA_FORMAT_FMASK8_S2_F1                     = 0x2c,
983 	IMG_DATA_FORMAT_FMASK8_S4_F1                     = 0x2d,
984 	IMG_DATA_FORMAT_FMASK8_S8_F1                     = 0x2e,
985 	IMG_DATA_FORMAT_FMASK8_S2_F2                     = 0x2f,
986 	IMG_DATA_FORMAT_FMASK8_S4_F2                     = 0x30,
987 	IMG_DATA_FORMAT_FMASK8_S4_F4                     = 0x31,
988 	IMG_DATA_FORMAT_FMASK16_S16_F1                   = 0x32,
989 	IMG_DATA_FORMAT_FMASK16_S8_F2                    = 0x33,
990 	IMG_DATA_FORMAT_FMASK32_S16_F2                   = 0x34,
991 	IMG_DATA_FORMAT_FMASK32_S8_F4                    = 0x35,
992 	IMG_DATA_FORMAT_FMASK32_S8_F8                    = 0x36,
993 	IMG_DATA_FORMAT_FMASK64_S16_F4                   = 0x37,
994 	IMG_DATA_FORMAT_FMASK64_S16_F8                   = 0x38,
995 	IMG_DATA_FORMAT_4_4                              = 0x39,
996 	IMG_DATA_FORMAT_6_5_5                            = 0x3a,
997 	IMG_DATA_FORMAT_1                                = 0x3b,
998 	IMG_DATA_FORMAT_1_REVERSED                       = 0x3c,
999 	IMG_DATA_FORMAT_32_AS_8                          = 0x3d,
1000 	IMG_DATA_FORMAT_32_AS_8_8                        = 0x3e,
1001 	IMG_DATA_FORMAT_32_AS_32_32_32_32                = 0x3f,
1002 } IMG_DATA_FORMAT;
1003 typedef enum BUF_NUM_FORMAT {
1004 	BUF_NUM_FORMAT_UNORM                             = 0x0,
1005 	BUF_NUM_FORMAT_SNORM                             = 0x1,
1006 	BUF_NUM_FORMAT_USCALED                           = 0x2,
1007 	BUF_NUM_FORMAT_SSCALED                           = 0x3,
1008 	BUF_NUM_FORMAT_UINT                              = 0x4,
1009 	BUF_NUM_FORMAT_SINT                              = 0x5,
1010 	BUF_NUM_FORMAT_RESERVED_6                        = 0x6,
1011 	BUF_NUM_FORMAT_FLOAT                             = 0x7,
1012 } BUF_NUM_FORMAT;
1013 typedef enum IMG_NUM_FORMAT {
1014 	IMG_NUM_FORMAT_UNORM                             = 0x0,
1015 	IMG_NUM_FORMAT_SNORM                             = 0x1,
1016 	IMG_NUM_FORMAT_USCALED                           = 0x2,
1017 	IMG_NUM_FORMAT_SSCALED                           = 0x3,
1018 	IMG_NUM_FORMAT_UINT                              = 0x4,
1019 	IMG_NUM_FORMAT_SINT                              = 0x5,
1020 	IMG_NUM_FORMAT_RESERVED_6                        = 0x6,
1021 	IMG_NUM_FORMAT_FLOAT                             = 0x7,
1022 	IMG_NUM_FORMAT_RESERVED_8                        = 0x8,
1023 	IMG_NUM_FORMAT_SRGB                              = 0x9,
1024 	IMG_NUM_FORMAT_RESERVED_10                       = 0xa,
1025 	IMG_NUM_FORMAT_RESERVED_11                       = 0xb,
1026 	IMG_NUM_FORMAT_RESERVED_12                       = 0xc,
1027 	IMG_NUM_FORMAT_RESERVED_13                       = 0xd,
1028 	IMG_NUM_FORMAT_RESERVED_14                       = 0xe,
1029 	IMG_NUM_FORMAT_RESERVED_15                       = 0xf,
1030 } IMG_NUM_FORMAT;
1031 typedef enum TileType {
1032 	ARRAY_COLOR_TILE                                 = 0x0,
1033 	ARRAY_DEPTH_TILE                                 = 0x1,
1034 } TileType;
1035 typedef enum NonDispTilingOrder {
1036 	ADDR_SURF_MICRO_TILING_DISPLAY                   = 0x0,
1037 	ADDR_SURF_MICRO_TILING_NON_DISPLAY               = 0x1,
1038 } NonDispTilingOrder;
1039 typedef enum MicroTileMode {
1040 	ADDR_SURF_DISPLAY_MICRO_TILING                   = 0x0,
1041 	ADDR_SURF_THIN_MICRO_TILING                      = 0x1,
1042 	ADDR_SURF_DEPTH_MICRO_TILING                     = 0x2,
1043 	ADDR_SURF_ROTATED_MICRO_TILING                   = 0x3,
1044 	ADDR_SURF_THICK_MICRO_TILING                     = 0x4,
1045 } MicroTileMode;
1046 typedef enum TileSplit {
1047 	ADDR_SURF_TILE_SPLIT_64B                         = 0x0,
1048 	ADDR_SURF_TILE_SPLIT_128B                        = 0x1,
1049 	ADDR_SURF_TILE_SPLIT_256B                        = 0x2,
1050 	ADDR_SURF_TILE_SPLIT_512B                        = 0x3,
1051 	ADDR_SURF_TILE_SPLIT_1KB                         = 0x4,
1052 	ADDR_SURF_TILE_SPLIT_2KB                         = 0x5,
1053 	ADDR_SURF_TILE_SPLIT_4KB                         = 0x6,
1054 } TileSplit;
1055 typedef enum SampleSplit {
1056 	ADDR_SURF_SAMPLE_SPLIT_1                         = 0x0,
1057 	ADDR_SURF_SAMPLE_SPLIT_2                         = 0x1,
1058 	ADDR_SURF_SAMPLE_SPLIT_4                         = 0x2,
1059 	ADDR_SURF_SAMPLE_SPLIT_8                         = 0x3,
1060 } SampleSplit;
1061 typedef enum PipeConfig {
1062 	ADDR_SURF_P2                                     = 0x0,
1063 	ADDR_SURF_P2_RESERVED0                           = 0x1,
1064 	ADDR_SURF_P2_RESERVED1                           = 0x2,
1065 	ADDR_SURF_P2_RESERVED2                           = 0x3,
1066 	ADDR_SURF_P4_8x16                                = 0x4,
1067 	ADDR_SURF_P4_16x16                               = 0x5,
1068 	ADDR_SURF_P4_16x32                               = 0x6,
1069 	ADDR_SURF_P4_32x32                               = 0x7,
1070 	ADDR_SURF_P8_16x16_8x16                          = 0x8,
1071 	ADDR_SURF_P8_16x32_8x16                          = 0x9,
1072 	ADDR_SURF_P8_32x32_8x16                          = 0xa,
1073 	ADDR_SURF_P8_16x32_16x16                         = 0xb,
1074 	ADDR_SURF_P8_32x32_16x16                         = 0xc,
1075 	ADDR_SURF_P8_32x32_16x32                         = 0xd,
1076 	ADDR_SURF_P8_32x64_32x32                         = 0xe,
1077 	ADDR_SURF_P8_RESERVED0                           = 0xf,
1078 	ADDR_SURF_P16_32x32_8x16                         = 0x10,
1079 	ADDR_SURF_P16_32x32_16x16                        = 0x11,
1080 } PipeConfig;
1081 typedef enum NumBanks {
1082 	ADDR_SURF_2_BANK                                 = 0x0,
1083 	ADDR_SURF_4_BANK                                 = 0x1,
1084 	ADDR_SURF_8_BANK                                 = 0x2,
1085 	ADDR_SURF_16_BANK                                = 0x3,
1086 } NumBanks;
1087 typedef enum BankWidth {
1088 	ADDR_SURF_BANK_WIDTH_1                           = 0x0,
1089 	ADDR_SURF_BANK_WIDTH_2                           = 0x1,
1090 	ADDR_SURF_BANK_WIDTH_4                           = 0x2,
1091 	ADDR_SURF_BANK_WIDTH_8                           = 0x3,
1092 } BankWidth;
1093 typedef enum BankHeight {
1094 	ADDR_SURF_BANK_HEIGHT_1                          = 0x0,
1095 	ADDR_SURF_BANK_HEIGHT_2                          = 0x1,
1096 	ADDR_SURF_BANK_HEIGHT_4                          = 0x2,
1097 	ADDR_SURF_BANK_HEIGHT_8                          = 0x3,
1098 } BankHeight;
1099 typedef enum BankWidthHeight {
1100 	ADDR_SURF_BANK_WH_1                              = 0x0,
1101 	ADDR_SURF_BANK_WH_2                              = 0x1,
1102 	ADDR_SURF_BANK_WH_4                              = 0x2,
1103 	ADDR_SURF_BANK_WH_8                              = 0x3,
1104 } BankWidthHeight;
1105 typedef enum MacroTileAspect {
1106 	ADDR_SURF_MACRO_ASPECT_1                         = 0x0,
1107 	ADDR_SURF_MACRO_ASPECT_2                         = 0x1,
1108 	ADDR_SURF_MACRO_ASPECT_4                         = 0x2,
1109 	ADDR_SURF_MACRO_ASPECT_8                         = 0x3,
1110 } MacroTileAspect;
1111 typedef enum GATCL1RequestType {
1112 	GATCL1_TYPE_NORMAL                               = 0x0,
1113 	GATCL1_TYPE_SHOOTDOWN                            = 0x1,
1114 	GATCL1_TYPE_BYPASS                               = 0x2,
1115 } GATCL1RequestType;
1116 typedef enum TCC_CACHE_POLICIES {
1117 	TCC_CACHE_POLICY_LRU                             = 0x0,
1118 	TCC_CACHE_POLICY_STREAM                          = 0x1,
1119 } TCC_CACHE_POLICIES;
1120 typedef enum MTYPE {
1121 	MTYPE_NC_NV                                      = 0x0,
1122 	MTYPE_NC                                         = 0x1,
1123 	MTYPE_CC                                         = 0x2,
1124 	MTYPE_UC                                         = 0x3,
1125 } MTYPE;
1126 typedef enum PERFMON_COUNTER_MODE {
1127 	PERFMON_COUNTER_MODE_ACCUM                       = 0x0,
1128 	PERFMON_COUNTER_MODE_ACTIVE_CYCLES               = 0x1,
1129 	PERFMON_COUNTER_MODE_MAX                         = 0x2,
1130 	PERFMON_COUNTER_MODE_DIRTY                       = 0x3,
1131 	PERFMON_COUNTER_MODE_SAMPLE                      = 0x4,
1132 	PERFMON_COUNTER_MODE_CYCLES_SINCE_FIRST_EVENT    = 0x5,
1133 	PERFMON_COUNTER_MODE_CYCLES_SINCE_LAST_EVENT     = 0x6,
1134 	PERFMON_COUNTER_MODE_CYCLES_GE_HI                = 0x7,
1135 	PERFMON_COUNTER_MODE_CYCLES_EQ_HI                = 0x8,
1136 	PERFMON_COUNTER_MODE_INACTIVE_CYCLES             = 0x9,
1137 	PERFMON_COUNTER_MODE_RESERVED                    = 0xf,
1138 } PERFMON_COUNTER_MODE;
1139 typedef enum PERFMON_SPM_MODE {
1140 	PERFMON_SPM_MODE_OFF                             = 0x0,
1141 	PERFMON_SPM_MODE_16BIT_CLAMP                     = 0x1,
1142 	PERFMON_SPM_MODE_16BIT_NO_CLAMP                  = 0x2,
1143 	PERFMON_SPM_MODE_32BIT_CLAMP                     = 0x3,
1144 	PERFMON_SPM_MODE_32BIT_NO_CLAMP                  = 0x4,
1145 	PERFMON_SPM_MODE_RESERVED_5                      = 0x5,
1146 	PERFMON_SPM_MODE_RESERVED_6                      = 0x6,
1147 	PERFMON_SPM_MODE_RESERVED_7                      = 0x7,
1148 	PERFMON_SPM_MODE_TEST_MODE_0                     = 0x8,
1149 	PERFMON_SPM_MODE_TEST_MODE_1                     = 0x9,
1150 	PERFMON_SPM_MODE_TEST_MODE_2                     = 0xa,
1151 } PERFMON_SPM_MODE;
1152 typedef enum SurfaceTiling {
1153 	ARRAY_LINEAR                                     = 0x0,
1154 	ARRAY_TILED                                      = 0x1,
1155 } SurfaceTiling;
1156 typedef enum SurfaceArray {
1157 	ARRAY_1D                                         = 0x0,
1158 	ARRAY_2D                                         = 0x1,
1159 	ARRAY_3D                                         = 0x2,
1160 	ARRAY_3D_SLICE                                   = 0x3,
1161 } SurfaceArray;
1162 typedef enum ColorArray {
1163 	ARRAY_2D_ALT_COLOR                               = 0x0,
1164 	ARRAY_2D_COLOR                                   = 0x1,
1165 	ARRAY_3D_SLICE_COLOR                             = 0x3,
1166 } ColorArray;
1167 typedef enum DepthArray {
1168 	ARRAY_2D_ALT_DEPTH                               = 0x0,
1169 	ARRAY_2D_DEPTH                                   = 0x1,
1170 } DepthArray;
1171 typedef enum ENUM_NUM_SIMD_PER_CU {
1172 	NUM_SIMD_PER_CU                                  = 0x4,
1173 } ENUM_NUM_SIMD_PER_CU;
1174 typedef enum MEM_PWR_FORCE_CTRL {
1175 	NO_FORCE_REQUEST                                 = 0x0,
1176 	FORCE_LIGHT_SLEEP_REQUEST                        = 0x1,
1177 	FORCE_DEEP_SLEEP_REQUEST                         = 0x2,
1178 	FORCE_SHUT_DOWN_REQUEST                          = 0x3,
1179 } MEM_PWR_FORCE_CTRL;
1180 typedef enum MEM_PWR_FORCE_CTRL2 {
1181 	NO_FORCE_REQ                                     = 0x0,
1182 	FORCE_LIGHT_SLEEP_REQ                            = 0x1,
1183 } MEM_PWR_FORCE_CTRL2;
1184 typedef enum MEM_PWR_DIS_CTRL {
1185 	ENABLE_MEM_PWR_CTRL                              = 0x0,
1186 	DISABLE_MEM_PWR_CTRL                             = 0x1,
1187 } MEM_PWR_DIS_CTRL;
1188 typedef enum MEM_PWR_SEL_CTRL {
1189 	DYNAMIC_SHUT_DOWN_ENABLE                         = 0x0,
1190 	DYNAMIC_DEEP_SLEEP_ENABLE                        = 0x1,
1191 	DYNAMIC_LIGHT_SLEEP_ENABLE                       = 0x2,
1192 } MEM_PWR_SEL_CTRL;
1193 typedef enum MEM_PWR_SEL_CTRL2 {
1194 	DYNAMIC_DEEP_SLEEP_EN                            = 0x0,
1195 	DYNAMIC_LIGHT_SLEEP_EN                           = 0x1,
1196 } MEM_PWR_SEL_CTRL2;
1197 
1198 #endif /* BIF_5_0_ENUM_H */
1199