1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * 3*b843c749SSergey Zigachev * Copyright (C) 2016 Advanced Micro Devices, Inc. 4*b843c749SSergey Zigachev * 5*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 6*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 7*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 8*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 10*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 11*b843c749SSergey Zigachev * 12*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included 13*b843c749SSergey Zigachev * in all copies or substantial portions of the Software. 14*b843c749SSergey Zigachev * 15*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 16*b843c749SSergey Zigachev * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 19*b843c749SSergey Zigachev * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 20*b843c749SSergey Zigachev * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev */ 22*b843c749SSergey Zigachev 23*b843c749SSergey Zigachev #ifndef DCE_6_0_D_H 24*b843c749SSergey Zigachev #define DCE_6_0_D_H 25*b843c749SSergey Zigachev 26*b843c749SSergey Zigachev #define ixATTR00 0x0000 27*b843c749SSergey Zigachev #define ixATTR01 0x0001 28*b843c749SSergey Zigachev #define ixATTR02 0x0002 29*b843c749SSergey Zigachev #define ixATTR03 0x0003 30*b843c749SSergey Zigachev #define ixATTR04 0x0004 31*b843c749SSergey Zigachev #define ixATTR05 0x0005 32*b843c749SSergey Zigachev #define ixATTR06 0x0006 33*b843c749SSergey Zigachev #define ixATTR07 0x0007 34*b843c749SSergey Zigachev #define ixATTR08 0x0008 35*b843c749SSergey Zigachev #define ixATTR09 0x0009 36*b843c749SSergey Zigachev #define ixATTR0A 0x000A 37*b843c749SSergey Zigachev #define ixATTR0B 0x000B 38*b843c749SSergey Zigachev #define ixATTR0C 0x000C 39*b843c749SSergey Zigachev #define ixATTR0D 0x000D 40*b843c749SSergey Zigachev #define ixATTR0E 0x000E 41*b843c749SSergey Zigachev #define ixATTR0F 0x000F 42*b843c749SSergey Zigachev #define ixATTR10 0x0010 43*b843c749SSergey Zigachev #define ixATTR11 0x0011 44*b843c749SSergey Zigachev #define ixATTR12 0x0012 45*b843c749SSergey Zigachev #define ixATTR13 0x0013 46*b843c749SSergey Zigachev #define ixATTR14 0x0014 47*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR0 0x0001 48*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR10 0x000B 49*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR1 0x0002 50*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR11 0x000C 51*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR12 0x000D 52*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR13 0x000E 53*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR2 0x0003 54*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR3 0x0004 55*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR4 0x0005 56*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR5 0x0006 57*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR6 0x0007 58*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR7 0x0008 59*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR8 0x0009 60*b843c749SSergey Zigachev #define ixAUDIO_DESCRIPTOR9 0x000A 61*b843c749SSergey Zigachev #define ixAZALIA_CUMULATIVE_LATENCY_COUNT 0x0003 62*b843c749SSergey Zigachev #define ixAZALIA_CUMULATIVE_REQUEST_COUNT 0x0004 63*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_CONTROL_CHANNEL_STREAM_ID 0x0003 64*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_CONTROL_CONVERTER_FORMAT 0x0002 65*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER 0x0004 66*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_CONTROL_GTC_EMBEDDING 0x0009 67*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_CONTROL_RAMP_RATE 0x0008 68*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 0x0001 69*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_STREAM_FORMATS 0x0005 70*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 0x0006 71*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_PIN_DEBUG 0x0000 72*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_CONVERTER_STRIPE_CONTROL 0x0007 73*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_ASSOCIATION_INFO 0x0062 74*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR0 0x0028 75*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR10 0x0032 76*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR1 0x0029 77*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR11 0x0033 78*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR12 0x0034 79*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR13 0x0035 80*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR2 0x002A 81*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR3 0x002B 82*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR4 0x002C 83*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR5 0x002D 84*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR6 0x002E 85*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR7 0x002F 86*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR8 0x0030 87*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR9 0x0031 88*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_CHANNEL_SPEAKER 0x0025 89*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_HOT_PLUG_CONTROL 0x0054 90*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_ENABLE 0x0036 91*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_ENABLE2 0x0057 92*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_MULTICHANNEL_MODE 0x0058 93*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 0x0056 94*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_HBR 0x0038 95*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_LIPSYNC 0x0037 96*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x0023 97*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO0 0x003A 98*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO1 0x003B 99*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO2 0x003C 100*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO3 0x003D 101*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO4 0x003E 102*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO5 0x003F 103*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO6 0x0040 104*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO7 0x0041 105*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_SINK_INFO8 0x0042 106*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE 0x0022 107*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE_FORCE 0x0055 108*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_CONTROL_WIDGET_CONTROL 0x0024 109*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 0x0020 110*b843c749SSergey Zigachev #define ixAZALIA_F0_CODEC_PIN_PARAMETER_CAPABILITIES 0x0021 111*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_0 0x0059 112*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_1 0x005A 113*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_2 0x005B 114*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_3 0x005C 115*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_4 0x005D 116*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_5 0x005E 117*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_6 0x005F 118*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_7 0x0060 119*b843c749SSergey Zigachev #define ixAZALIA_F0_PIN_CONTROL_CODEC_CS_OVERRIDE_8 0x0061 120*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_CHANNEL_STREAM_ID 0x2706 121*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_CONVERTER_FORMAT 0x2200 122*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER 0x270D 123*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER_2 0x270E 124*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_DIGITAL_CONVERTER_3 0x273E 125*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_CONTROL_RAMP_RATE 0x2770 126*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_AUDIO_WIDGET_CAPABILITIES 0x2F09 127*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_STREAM_FORMATS 0x2F0B 128*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_PARAMETER_SUPPORTED_SIZE_RATES 0x2F0A 129*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_CONVERTER_STRIPE_CONTROL 0x2724 130*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION 0x1770 131*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_POWER_STATE 0x1705 132*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESET 0x17FF 133*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID 0x1720 134*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_2 0x1721 135*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_3 0x1722 136*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID_4 0x1723 137*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 0x1F05 138*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_POWER_STATES 0x1F0F 139*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 0x1F0B 140*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_SUBORDINATE_NODE_COUNT 0x1F04 141*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES 0x1F0A 142*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_ASSOCIATION_INFO 0x3793 143*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR 0x3776 144*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_DESCRIPTOR_DATA 0x3776 145*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_SINK_INFO_DATA 0x3781 146*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_AUDIO_SINK_INFO_INDEX 0x3780 147*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_CHANNEL_ALLOCATION 0x3771 148*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_DOWN_MIX_INFO 0x3772 149*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_HBR 0x377C 150*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_LIPSYNC 0x377B 151*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MANUFACTURER_ID 0x0000 152*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL01_ENABLE 0x3777 153*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL1_ENABLE 0x3785 154*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL23_ENABLE 0x3778 155*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL3_ENABLE 0x3786 156*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL45_ENABLE 0x3779 157*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL5_ENABLE 0x3787 158*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL67_ENABLE 0x377A 159*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL7_ENABLE 0x3788 160*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_MULTICHANNEL_MODE 0x3789 161*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID0 0x0003 162*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_PORTID1 0x0004 163*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_PRODUCT_ID 0x0001 164*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT 0x371C 165*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_2 0x371D 166*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_3 0x371E 167*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONFIGURATION_DEFAULT_4 0x371F 168*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_CONNECTION_LIST_ENTRY 0x3702 169*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_PIN_SENSE 0x3709 170*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_RESPONSE_SPEAKER_ALLOCATION 0x3770 171*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_SINK_DESCRIPTION_LEN 0x0002 172*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_UNSOLICITED_RESPONSE 0x3708 173*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_CONTROL_WIDGET_CONTROL 0x3707 174*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_PARAMETER_AUDIO_WIDGET_CAPABILITIES 0x3F09 175*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_PARAMETER_CAPABILITIES 0x3F0C 176*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_PIN_PARAMETER_CONNECTION_LIST_LENGTH 0x3F0E 177*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_ROOT_PARAMETER_REVISION_ID 0x0F02 178*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_ROOT_PARAMETER_SUBORDINATE_NODE_COUNT 0x0F04 179*b843c749SSergey Zigachev #define ixAZALIA_F2_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 0x0F00 180*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_0 0x378A 181*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_1 0x378B 182*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_2 0x378C 183*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_3 0x378D 184*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_4 0x378E 185*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_5 0x378F 186*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_6 0x3790 187*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_7 0x3791 188*b843c749SSergey Zigachev #define ixAZALIA_F2_PIN_CONTROL_CODEC_CS_OVERRIDE_8 0x3792 189*b843c749SSergey Zigachev #define ixAZALIA_FIFO_SIZE_CONTROL 0x0000 190*b843c749SSergey Zigachev #define ixAZALIA_LATENCY_COUNTER_CONTROL 0x0001 191*b843c749SSergey Zigachev #define ixAZALIA_STREAM_DEBUG 0x0005 192*b843c749SSergey Zigachev #define ixAZALIA_WORSTCASE_LATENCY_COUNT 0x0002 193*b843c749SSergey Zigachev #define ixCRT00 0x0000 194*b843c749SSergey Zigachev #define ixCRT01 0x0001 195*b843c749SSergey Zigachev #define ixCRT02 0x0002 196*b843c749SSergey Zigachev #define ixCRT03 0x0003 197*b843c749SSergey Zigachev #define ixCRT04 0x0004 198*b843c749SSergey Zigachev #define ixCRT05 0x0005 199*b843c749SSergey Zigachev #define ixCRT06 0x0006 200*b843c749SSergey Zigachev #define ixCRT07 0x0007 201*b843c749SSergey Zigachev #define ixCRT08 0x0008 202*b843c749SSergey Zigachev #define ixCRT09 0x0009 203*b843c749SSergey Zigachev #define ixCRT0A 0x000A 204*b843c749SSergey Zigachev #define ixCRT0B 0x000B 205*b843c749SSergey Zigachev #define ixCRT0C 0x000C 206*b843c749SSergey Zigachev #define ixCRT0D 0x000D 207*b843c749SSergey Zigachev #define ixCRT0E 0x000E 208*b843c749SSergey Zigachev #define ixCRT0F 0x000F 209*b843c749SSergey Zigachev #define ixCRT10 0x0010 210*b843c749SSergey Zigachev #define ixCRT11 0x0011 211*b843c749SSergey Zigachev #define ixCRT12 0x0012 212*b843c749SSergey Zigachev #define ixCRT13 0x0013 213*b843c749SSergey Zigachev #define ixCRT14 0x0014 214*b843c749SSergey Zigachev #define ixCRT15 0x0015 215*b843c749SSergey Zigachev #define ixCRT16 0x0016 216*b843c749SSergey Zigachev #define ixCRT17 0x0017 217*b843c749SSergey Zigachev #define ixCRT18 0x0018 218*b843c749SSergey Zigachev #define ixCRT1E 0x001E 219*b843c749SSergey Zigachev #define ixCRT1F 0x001F 220*b843c749SSergey Zigachev #define ixCRT22 0x0022 221*b843c749SSergey Zigachev #define ixDCIO_DEBUG10 0x0010 222*b843c749SSergey Zigachev #define ixDCIO_DEBUG1 0x0001 223*b843c749SSergey Zigachev #define ixDCIO_DEBUG11 0x0011 224*b843c749SSergey Zigachev #define ixDCIO_DEBUG12 0x0012 225*b843c749SSergey Zigachev #define ixDCIO_DEBUG13 0x0013 226*b843c749SSergey Zigachev #define ixDCIO_DEBUG2 0x0002 227*b843c749SSergey Zigachev #define ixDCIO_DEBUG3 0x0003 228*b843c749SSergey Zigachev #define ixDCIO_DEBUG4 0x0004 229*b843c749SSergey Zigachev #define ixDCIO_DEBUG5 0x0005 230*b843c749SSergey Zigachev #define ixDCIO_DEBUG6 0x0006 231*b843c749SSergey Zigachev #define ixDCIO_DEBUG7 0x0007 232*b843c749SSergey Zigachev #define ixDCIO_DEBUG8 0x0008 233*b843c749SSergey Zigachev #define ixDCIO_DEBUG9 0x0009 234*b843c749SSergey Zigachev #define ixDCIO_DEBUGA 0x000A 235*b843c749SSergey Zigachev #define ixDCIO_DEBUGB 0x000B 236*b843c749SSergey Zigachev #define ixDCIO_DEBUGC 0x000C 237*b843c749SSergey Zigachev #define ixDCIO_DEBUGD 0x000D 238*b843c749SSergey Zigachev #define ixDCIO_DEBUGE 0x000E 239*b843c749SSergey Zigachev #define ixDCIO_DEBUGF 0x000F 240*b843c749SSergey Zigachev #define ixDCIO_DEBUG_ID 0x0000 241*b843c749SSergey Zigachev #define ixDMIF_DEBUG02_CORE0 0x0002 242*b843c749SSergey Zigachev #define ixDMIF_DEBUG02_CORE1 0x000A 243*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_A 0x0010 244*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_B 0x0011 245*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_C 0x0012 246*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_D 0x0013 247*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_E 0x0014 248*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_F 0x0015 249*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_G 0x0016 250*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_H 0x0017 251*b843c749SSergey Zigachev #define ixDP_AUX1_DEBUG_I 0x0018 252*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_A 0x0020 253*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_B 0x0021 254*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_C 0x0022 255*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_D 0x0023 256*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_E 0x0024 257*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_F 0x0025 258*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_G 0x0026 259*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_H 0x0027 260*b843c749SSergey Zigachev #define ixDP_AUX2_DEBUG_I 0x0028 261*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_A 0x0030 262*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_B 0x0031 263*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_C 0x0032 264*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_D 0x0033 265*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_E 0x0034 266*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_F 0x0035 267*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_G 0x0036 268*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_H 0x0037 269*b843c749SSergey Zigachev #define ixDP_AUX3_DEBUG_I 0x0038 270*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_A 0x0040 271*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_B 0x0041 272*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_C 0x0042 273*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_D 0x0043 274*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_E 0x0044 275*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_F 0x0045 276*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_G 0x0046 277*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_H 0x0047 278*b843c749SSergey Zigachev #define ixDP_AUX4_DEBUG_I 0x0048 279*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_A 0x0070 280*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_B 0x0071 281*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_C 0x0072 282*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_D 0x0073 283*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_E 0x0074 284*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_F 0x0075 285*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_G 0x0076 286*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_H 0x0077 287*b843c749SSergey Zigachev #define ixDP_AUX5_DEBUG_I 0x0078 288*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_A 0x0080 289*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_B 0x0081 290*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_C 0x0082 291*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_D 0x0083 292*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_E 0x0084 293*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_F 0x0085 294*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_G 0x0086 295*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_H 0x0087 296*b843c749SSergey Zigachev #define ixDP_AUX6_DEBUG_I 0x0088 297*b843c749SSergey Zigachev #define ixFMT_DEBUG0 0x0001 298*b843c749SSergey Zigachev #define ixFMT_DEBUG1 0x0002 299*b843c749SSergey Zigachev #define ixFMT_DEBUG2 0x0003 300*b843c749SSergey Zigachev #define ixFMT_DEBUG_ID 0x0000 301*b843c749SSergey Zigachev #define ixGRA00 0x0000 302*b843c749SSergey Zigachev #define ixGRA01 0x0001 303*b843c749SSergey Zigachev #define ixGRA02 0x0002 304*b843c749SSergey Zigachev #define ixGRA03 0x0003 305*b843c749SSergey Zigachev #define ixGRA04 0x0004 306*b843c749SSergey Zigachev #define ixGRA05 0x0005 307*b843c749SSergey Zigachev #define ixGRA06 0x0006 308*b843c749SSergey Zigachev #define ixGRA07 0x0007 309*b843c749SSergey Zigachev #define ixGRA08 0x0008 310*b843c749SSergey Zigachev #define ixIDDCCIF02_DBG_DCCIF_C 0x0009 311*b843c749SSergey Zigachev #define ixIDDCCIF04_DBG_DCCIF_E 0x000B 312*b843c749SSergey Zigachev #define ixIDDCCIF05_DBG_DCCIF_F 0x000C 313*b843c749SSergey Zigachev #define ixMVP_DEBUG_12 0x000C 314*b843c749SSergey Zigachev #define ixMVP_DEBUG_13 0x000D 315*b843c749SSergey Zigachev #define ixMVP_DEBUG_14 0x000E 316*b843c749SSergey Zigachev #define ixMVP_DEBUG_15 0x000F 317*b843c749SSergey Zigachev #define ixMVP_DEBUG_16 0x0010 318*b843c749SSergey Zigachev #define ixMVP_DEBUG_17 0x0011 319*b843c749SSergey Zigachev #define ixSEQ00 0x0000 320*b843c749SSergey Zigachev #define ixSEQ01 0x0001 321*b843c749SSergey Zigachev #define ixSEQ02 0x0002 322*b843c749SSergey Zigachev #define ixSEQ03 0x0003 323*b843c749SSergey Zigachev #define ixSEQ04 0x0004 324*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION0 0x0005 325*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION10 0x000F 326*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION1 0x0006 327*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION11 0x0010 328*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION12 0x0011 329*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION13 0x0012 330*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION14 0x0013 331*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION15 0x0014 332*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION16 0x0015 333*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION17 0x0016 334*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION2 0x0007 335*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION3 0x0008 336*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION4 0x0009 337*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION5 0x000A 338*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION6 0x000B 339*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION7 0x000C 340*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION8 0x000D 341*b843c749SSergey Zigachev #define ixSINK_DESCRIPTION9 0x000E 342*b843c749SSergey Zigachev #define ixVGADCC_DBG_DCCIF_C 0x007E 343*b843c749SSergey Zigachev #define mmABM_TEST_DEBUG_DATA 0x169F 344*b843c749SSergey Zigachev #define mmABM_TEST_DEBUG_INDEX 0x169E 345*b843c749SSergey Zigachev #define mmAFMT_60958_0 0x1C41 346*b843c749SSergey Zigachev #define mmAFMT_60958_1 0x1C42 347*b843c749SSergey Zigachev #define mmAFMT_60958_2 0x1C48 348*b843c749SSergey Zigachev #define mmAFMT_AUDIO_CRC_CONTROL 0x1C43 349*b843c749SSergey Zigachev #define mmAFMT_AUDIO_CRC_RESULT 0x1C49 350*b843c749SSergey Zigachev #define mmAFMT_AUDIO_DBG_DTO_CNTL 0x1C52 351*b843c749SSergey Zigachev #define mmAFMT_AUDIO_INFO0 0x1C3F 352*b843c749SSergey Zigachev #define mmAFMT_AUDIO_INFO1 0x1C40 353*b843c749SSergey Zigachev #define mmAFMT_AUDIO_PACKET_CONTROL 0x1C4B 354*b843c749SSergey Zigachev #define mmAFMT_AUDIO_PACKET_CONTROL2 0x1C17 355*b843c749SSergey Zigachev #define mmAFMT_AUDIO_SRC_CONTROL 0x1C4F 356*b843c749SSergey Zigachev #define mmAFMT_AVI_INFO0 0x1C21 357*b843c749SSergey Zigachev #define mmAFMT_AVI_INFO1 0x1C22 358*b843c749SSergey Zigachev #define mmAFMT_AVI_INFO2 0x1C23 359*b843c749SSergey Zigachev #define mmAFMT_AVI_INFO3 0x1C24 360*b843c749SSergey Zigachev #define mmAFMT_GENERIC_0 0x1C28 361*b843c749SSergey Zigachev #define mmAFMT_GENERIC_1 0x1C29 362*b843c749SSergey Zigachev #define mmAFMT_GENERIC_2 0x1C2A 363*b843c749SSergey Zigachev #define mmAFMT_GENERIC_3 0x1C2B 364*b843c749SSergey Zigachev #define mmAFMT_GENERIC_4 0x1C2C 365*b843c749SSergey Zigachev #define mmAFMT_GENERIC_5 0x1C2D 366*b843c749SSergey Zigachev #define mmAFMT_GENERIC_6 0x1C2E 367*b843c749SSergey Zigachev #define mmAFMT_GENERIC_7 0x1C2F 368*b843c749SSergey Zigachev #define mmAFMT_GENERIC_HDR 0x1C27 369*b843c749SSergey Zigachev #define mmAFMT_INFOFRAME_CONTROL0 0x1C4D 370*b843c749SSergey Zigachev #define mmAFMT_INTERRUPT_STATUS 0x1C14 371*b843c749SSergey Zigachev #define mmAFMT_ISRC1_0 0x1C18 372*b843c749SSergey Zigachev #define mmAFMT_ISRC1_1 0x1C19 373*b843c749SSergey Zigachev #define mmAFMT_ISRC1_2 0x1C1A 374*b843c749SSergey Zigachev #define mmAFMT_ISRC1_3 0x1C1B 375*b843c749SSergey Zigachev #define mmAFMT_ISRC1_4 0x1C1C 376*b843c749SSergey Zigachev #define mmAFMT_ISRC2_0 0x1C1D 377*b843c749SSergey Zigachev #define mmAFMT_ISRC2_1 0x1C1E 378*b843c749SSergey Zigachev #define mmAFMT_ISRC2_2 0x1C1F 379*b843c749SSergey Zigachev #define mmAFMT_ISRC2_3 0x1C20 380*b843c749SSergey Zigachev #define mmAFMT_MPEG_INFO0 0x1C25 381*b843c749SSergey Zigachev #define mmAFMT_MPEG_INFO1 0x1C26 382*b843c749SSergey Zigachev #define mmAFMT_RAMP_CONTROL0 0x1C44 383*b843c749SSergey Zigachev #define mmAFMT_RAMP_CONTROL1 0x1C45 384*b843c749SSergey Zigachev #define mmAFMT_RAMP_CONTROL2 0x1C46 385*b843c749SSergey Zigachev #define mmAFMT_RAMP_CONTROL3 0x1C47 386*b843c749SSergey Zigachev #define mmAFMT_STATUS 0x1C4A 387*b843c749SSergey Zigachev #define mmAFMT_VBI_PACKET_CONTROL 0x1C4C 388*b843c749SSergey Zigachev #define mmATTRDR 0x00F0 389*b843c749SSergey Zigachev #define mmATTRDW 0x00F0 390*b843c749SSergey Zigachev #define mmATTRX 0x00F0 391*b843c749SSergey Zigachev #define mmAUX_ARB_CONTROL 0x1882 392*b843c749SSergey Zigachev #define mmAUX_CONTROL 0x1880 393*b843c749SSergey Zigachev #define mmAUX_DPHY_RX_CONTROL0 0x188A 394*b843c749SSergey Zigachev #define mmAUX_DPHY_RX_CONTROL1 0x188B 395*b843c749SSergey Zigachev #define mmAUX_DPHY_RX_STATUS 0x188D 396*b843c749SSergey Zigachev #define mmAUX_DPHY_TX_CONTROL 0x1889 397*b843c749SSergey Zigachev #define mmAUX_DPHY_TX_REF_CONTROL 0x1888 398*b843c749SSergey Zigachev #define mmAUX_DPHY_TX_STATUS 0x188C 399*b843c749SSergey Zigachev #define mmAUX_GTC_SYNC_CONTROL 0x188E 400*b843c749SSergey Zigachev #define mmAUX_GTC_SYNC_DATA 0x1890 401*b843c749SSergey Zigachev #define mmAUX_INTERRUPT_CONTROL 0x1883 402*b843c749SSergey Zigachev #define mmAUX_LS_DATA 0x1887 403*b843c749SSergey Zigachev #define mmAUX_LS_STATUS 0x1885 404*b843c749SSergey Zigachev #define mmAUXN_IMPCAL 0x190C 405*b843c749SSergey Zigachev #define mmAUXP_IMPCAL 0x190B 406*b843c749SSergey Zigachev #define mmAUX_SW_CONTROL 0x1881 407*b843c749SSergey Zigachev #define mmAUX_SW_DATA 0x1886 408*b843c749SSergey Zigachev #define mmAUX_SW_STATUS 0x1884 409*b843c749SSergey Zigachev #define mmAZALIA_APPLICATION_POSITION_IN_CYCLIC_BUFFER 0x17C9 410*b843c749SSergey Zigachev #define mmAZALIA_AUDIO_DTO 0x17BA 411*b843c749SSergey Zigachev #define mmAZALIA_AUDIO_DTO_CONTROL 0x17BB 412*b843c749SSergey Zigachev #define mmAZALIA_BDL_DMA_CONTROL 0x17BF 413*b843c749SSergey Zigachev #define mmAZALIA_CONTROLLER_DEBUG 0x17CF 414*b843c749SSergey Zigachev #define mmAZALIA_CORB_DMA_CONTROL 0x17C1 415*b843c749SSergey Zigachev #define mmAZALIA_CYCLIC_BUFFER_SYNC 0x17CA 416*b843c749SSergey Zigachev #define mmAZALIA_DATA_DMA_CONTROL 0x17BE 417*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_CHANNEL_COUNT_CONTROL 0x17D5 418*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_DEBUG 0x17DF 419*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_ENDPOINT_DATA 0x1781 420*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_ENDPOINT_INDEX 0x1780 421*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_CONVERTER_SYNCHRONIZATION 0x17DE 422*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_POWER_STATE 0x17DB 423*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESET 0x17DC 424*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_CONTROL_RESPONSE_SUBSYSTEM_ID 0x17DD 425*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_GROUP_TYPE 0x17D7 426*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_POWER_STATES 0x17DA 427*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_STREAM_FORMATS 0x17D9 428*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_FUNCTION_PARAMETER_SUPPORTED_SIZE_RATES 0x17D8 429*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_RESYNC_FIFO_CONTROL 0x17D6 430*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_ROOT_PARAMETER_REVISION_ID 0x17D3 431*b843c749SSergey Zigachev #define mmAZALIA_F0_CODEC_ROOT_PARAMETER_VENDOR_AND_DEVICE_ID 0x17D2 432*b843c749SSergey Zigachev #define mmAZALIA_GLOBAL_CAPABILITIES 0x17CB 433*b843c749SSergey Zigachev #define mmAZALIA_OUTPUT_PAYLOAD_CAPABILITY 0x17CC 434*b843c749SSergey Zigachev #define mmAZALIA_OUTPUT_STREAM_ARBITER_CONTROL 0x17CD 435*b843c749SSergey Zigachev #define mmAZALIA_RIRB_AND_DP_CONTROL 0x17C0 436*b843c749SSergey Zigachev #define mmAZALIA_SCLK_CONTROL 0x17BC 437*b843c749SSergey Zigachev #define mmAZALIA_STREAM_DATA 0x17E9 438*b843c749SSergey Zigachev #define mmAZALIA_STREAM_INDEX 0x17E8 439*b843c749SSergey Zigachev #define mmAZALIA_UNDERFLOW_FILLER_SAMPLE 0x17BD 440*b843c749SSergey Zigachev #define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_DATA 0x1781 441*b843c749SSergey Zigachev #define mmAZF0ENDPOINT0_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x1780 442*b843c749SSergey Zigachev #define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_DATA 0x1787 443*b843c749SSergey Zigachev #define mmAZF0ENDPOINT1_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x1786 444*b843c749SSergey Zigachev #define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_DATA 0x178D 445*b843c749SSergey Zigachev #define mmAZF0ENDPOINT2_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x178C 446*b843c749SSergey Zigachev #define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_DATA 0x1793 447*b843c749SSergey Zigachev #define mmAZF0ENDPOINT3_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x1792 448*b843c749SSergey Zigachev #define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_DATA 0x1799 449*b843c749SSergey Zigachev #define mmAZF0ENDPOINT4_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x1798 450*b843c749SSergey Zigachev #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_DATA 0x179F 451*b843c749SSergey Zigachev #define mmAZF0ENDPOINT5_AZALIA_F0_CODEC_ENDPOINT_INDEX 0x179E 452*b843c749SSergey Zigachev #define mmAZF0STREAM0_AZALIA_STREAM_DATA 0x17E9 453*b843c749SSergey Zigachev #define mmAZF0STREAM0_AZALIA_STREAM_INDEX 0x17E8 454*b843c749SSergey Zigachev #define mmAZF0STREAM1_AZALIA_STREAM_DATA 0x17ED 455*b843c749SSergey Zigachev #define mmAZF0STREAM1_AZALIA_STREAM_INDEX 0x17EC 456*b843c749SSergey Zigachev #define mmAZF0STREAM2_AZALIA_STREAM_DATA 0x17F1 457*b843c749SSergey Zigachev #define mmAZF0STREAM2_AZALIA_STREAM_INDEX 0x17F0 458*b843c749SSergey Zigachev #define mmAZF0STREAM3_AZALIA_STREAM_DATA 0x17F5 459*b843c749SSergey Zigachev #define mmAZF0STREAM3_AZALIA_STREAM_INDEX 0x17F4 460*b843c749SSergey Zigachev #define mmAZF0STREAM4_AZALIA_STREAM_DATA 0x17F9 461*b843c749SSergey Zigachev #define mmAZF0STREAM4_AZALIA_STREAM_INDEX 0x17F8 462*b843c749SSergey Zigachev #define mmAZF0STREAM5_AZALIA_STREAM_DATA 0x17FD 463*b843c749SSergey Zigachev #define mmAZF0STREAM5_AZALIA_STREAM_INDEX 0x17FC 464*b843c749SSergey Zigachev #define mmAZ_TEST_DEBUG_DATA 0x17D1 465*b843c749SSergey Zigachev #define mmAZ_TEST_DEBUG_INDEX 0x17D0 466*b843c749SSergey Zigachev #define mmBL1_PWM_ABM_CNTL 0x162E 467*b843c749SSergey Zigachev #define mmBL1_PWM_AMBIENT_LIGHT_LEVEL 0x1628 468*b843c749SSergey Zigachev #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162F 469*b843c749SSergey Zigachev #define mmBL1_PWM_CURRENT_ABM_LEVEL 0x162B 470*b843c749SSergey Zigachev #define mmBL1_PWM_FINAL_DUTY_CYCLE 0x162C 471*b843c749SSergey Zigachev #define mmBL1_PWM_GRP2_REG_LOCK 0x1630 472*b843c749SSergey Zigachev #define mmBL1_PWM_MINIMUM_DUTY_CYCLE 0x162D 473*b843c749SSergey Zigachev #define mmBL1_PWM_TARGET_ABM_LEVEL 0x162A 474*b843c749SSergey Zigachev #define mmBL1_PWM_USER_LEVEL 0x1629 475*b843c749SSergey Zigachev #define mmBL_PWM_CNTL 0x191E 476*b843c749SSergey Zigachev #define mmBL_PWM_CNTL2 0x191F 477*b843c749SSergey Zigachev #define mmBL_PWM_GRP1_REG_LOCK 0x1921 478*b843c749SSergey Zigachev #define mmBL_PWM_PERIOD_CNTL 0x1920 479*b843c749SSergey Zigachev #define mmBPHYC_DAC_AUTO_CALIB_CONTROL 0x19FE 480*b843c749SSergey Zigachev #define mmBPHYC_DAC_MACRO_CNTL 0x19FD 481*b843c749SSergey Zigachev #define mmCC_DC_PIPE_DIS 0x177F 482*b843c749SSergey Zigachev #define mmCC_RCU_DC_AUDIO_PORT_CONNECTIVITY 0x17D4 483*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C11_C12 0x1A43 484*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C13_C14 0x1A44 485*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C21_C22 0x1A45 486*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C23_C24 0x1A46 487*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C31_C32 0x1A47 488*b843c749SSergey Zigachev #define mmCOMM_MATRIXA_TRANS_C33_C34 0x1A48 489*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C11_C12 0x1A49 490*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C13_C14 0x1A4A 491*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C21_C22 0x1A4B 492*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C23_C24 0x1A4C 493*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C31_C32 0x1A4D 494*b843c749SSergey Zigachev #define mmCOMM_MATRIXB_TRANS_C33_C34 0x1A4E 495*b843c749SSergey Zigachev #define mmCRTC0_CRTC_3D_STRUCTURE_CONTROL 0x1B78 496*b843c749SSergey Zigachev #define mmCRTC0_CRTC_ALLOW_STOP_OFF_V_CNT 0x1BC3 497*b843c749SSergey Zigachev #define mmCRTC0_CRTC_BLACK_COLOR 0x1BA2 498*b843c749SSergey Zigachev #define mmCRTC0_CRTC_BLANK_CONTROL 0x1B9D 499*b843c749SSergey Zigachev #define mmCRTC0_CRTC_BLANK_DATA_COLOR 0x1BA1 500*b843c749SSergey Zigachev #define mmCRTC0_CRTC_CONTROL 0x1B9C 501*b843c749SSergey Zigachev #define mmCRTC0_CRTC_COUNT_CONTROL 0x1BA9 502*b843c749SSergey Zigachev #define mmCRTC0_CRTC_COUNT_RESET 0x1BAA 503*b843c749SSergey Zigachev #define mmCRTC0_CRTC_DCFE_CLOCK_CONTROL 0x1B7C 504*b843c749SSergey Zigachev #define mmCRTC0_CRTC_DOUBLE_BUFFER_CONTROL 0x1BB6 505*b843c749SSergey Zigachev #define mmCRTC0_CRTC_DTMTEST_CNTL 0x1B92 506*b843c749SSergey Zigachev #define mmCRTC0_CRTC_DTMTEST_STATUS_POSITION 0x1B93 507*b843c749SSergey Zigachev #define mmCRTC0_CRTC_FLOW_CONTROL 0x1B99 508*b843c749SSergey Zigachev #define mmCRTC0_CRTC_FORCE_COUNT_NOW_CNTL 0x1B98 509*b843c749SSergey Zigachev #define mmCRTC0_CRTC_GSL_CONTROL 0x1B7B 510*b843c749SSergey Zigachev #define mmCRTC0_CRTC_GSL_VSYNC_GAP 0x1B79 511*b843c749SSergey Zigachev #define mmCRTC0_CRTC_GSL_WINDOW 0x1B7A 512*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_BLANK_EARLY_NUM 0x1B7D 513*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_BLANK_START_END 0x1B81 514*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_SYNC_A 0x1B82 515*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_SYNC_A_CNTL 0x1B83 516*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_SYNC_B 0x1B84 517*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_SYNC_B_CNTL 0x1B85 518*b843c749SSergey Zigachev #define mmCRTC0_CRTC_H_TOTAL 0x1B80 519*b843c749SSergey Zigachev #define mmCRTC0_CRTC_INTERLACE_CONTROL 0x1B9E 520*b843c749SSergey Zigachev #define mmCRTC0_CRTC_INTERLACE_STATUS 0x1B9F 521*b843c749SSergey Zigachev #define mmCRTC0_CRTC_INTERRUPT_CONTROL 0x1BB4 522*b843c749SSergey Zigachev #define mmCRTC0_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1BAB 523*b843c749SSergey Zigachev #define mmCRTC0_CRTC_MASTER_EN 0x1BC2 524*b843c749SSergey Zigachev #define mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT 0x1BBF 525*b843c749SSergey Zigachev #define mmCRTC0_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1BC0 526*b843c749SSergey Zigachev #define mmCRTC0_CRTC_MVP_STATUS 0x1BC1 527*b843c749SSergey Zigachev #define mmCRTC0_CRTC_NOM_VERT_POSITION 0x1BA5 528*b843c749SSergey Zigachev #define mmCRTC0_CRTC_OVERSCAN_COLOR 0x1BA0 529*b843c749SSergey Zigachev #define mmCRTC0_CRTC_SNAPSHOT_CONTROL 0x1BB0 530*b843c749SSergey Zigachev #define mmCRTC0_CRTC_SNAPSHOT_FRAME 0x1BB2 531*b843c749SSergey Zigachev #define mmCRTC0_CRTC_SNAPSHOT_POSITION 0x1BB1 532*b843c749SSergey Zigachev #define mmCRTC0_CRTC_SNAPSHOT_STATUS 0x1BAF 533*b843c749SSergey Zigachev #define mmCRTC0_CRTC_START_LINE_CONTROL 0x1BB3 534*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STATUS 0x1BA3 535*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STATUS_FRAME_COUNT 0x1BA6 536*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STATUS_HV_COUNT 0x1BA8 537*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STATUS_POSITION 0x1BA4 538*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STATUS_VF_COUNT 0x1BA7 539*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STEREO_CONTROL 0x1BAE 540*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STEREO_FORCE_NEXT_EYE 0x1B9B 541*b843c749SSergey Zigachev #define mmCRTC0_CRTC_STEREO_STATUS 0x1BAD 542*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TEST_DEBUG_DATA 0x1BC7 543*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TEST_DEBUG_INDEX 0x1BC6 544*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TEST_PATTERN_COLOR 0x1BBC 545*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TEST_PATTERN_CONTROL 0x1BBA 546*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TEST_PATTERN_PARAMETERS 0x1BBB 547*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TRIGA_CNTL 0x1B94 548*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TRIGA_MANUAL_TRIG 0x1B95 549*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TRIGB_CNTL 0x1B96 550*b843c749SSergey Zigachev #define mmCRTC0_CRTC_TRIGB_MANUAL_TRIG 0x1B97 551*b843c749SSergey Zigachev #define mmCRTC0_CRTC_UPDATE_LOCK 0x1BB5 552*b843c749SSergey Zigachev #define mmCRTC0_CRTC_VBI_END 0x1B86 553*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_BLANK_START_END 0x1B8D 554*b843c749SSergey Zigachev #define mmCRTC0_CRTC_VERT_SYNC_CONTROL 0x1BAC 555*b843c749SSergey Zigachev #define mmCRTC0_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x1BB7 556*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_SYNC_A 0x1B8E 557*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_SYNC_A_CNTL 0x1B8F 558*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_SYNC_B 0x1B90 559*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_SYNC_B_CNTL 0x1B91 560*b843c749SSergey Zigachev #define mmCRTC0_CRTC_VSYNC_NOM_INT_STATUS 0x1B8C 561*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_TOTAL 0x1B87 562*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_TOTAL_CONTROL 0x1B8A 563*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_TOTAL_INT_STATUS 0x1B8B 564*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_TOTAL_MAX 0x1B89 565*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_TOTAL_MIN 0x1B88 566*b843c749SSergey Zigachev #define mmCRTC0_CRTC_V_UPDATE_INT_STATUS 0x1BC4 567*b843c749SSergey Zigachev #define mmCRTC0_DCFE_DBG_SEL 0x1B7E 568*b843c749SSergey Zigachev #define mmCRTC0_DCFE_MEM_LIGHT_SLEEP_CNTL 0x1B7F 569*b843c749SSergey Zigachev #define mmCRTC0_MASTER_UPDATE_LOCK 0x1BBD 570*b843c749SSergey Zigachev #define mmCRTC0_MASTER_UPDATE_MODE 0x1BBE 571*b843c749SSergey Zigachev #define mmCRTC0_PIXEL_RATE_CNTL 0x0140 572*b843c749SSergey Zigachev #define mmCRTC1_CRTC_3D_STRUCTURE_CONTROL 0x1E78 573*b843c749SSergey Zigachev #define mmCRTC1_CRTC_ALLOW_STOP_OFF_V_CNT 0x1EC3 574*b843c749SSergey Zigachev #define mmCRTC1_CRTC_BLACK_COLOR 0x1EA2 575*b843c749SSergey Zigachev #define mmCRTC1_CRTC_BLANK_CONTROL 0x1E9D 576*b843c749SSergey Zigachev #define mmCRTC1_CRTC_BLANK_DATA_COLOR 0x1EA1 577*b843c749SSergey Zigachev #define mmCRTC1_CRTC_CONTROL 0x1E9C 578*b843c749SSergey Zigachev #define mmCRTC1_CRTC_COUNT_CONTROL 0x1EA9 579*b843c749SSergey Zigachev #define mmCRTC1_CRTC_COUNT_RESET 0x1EAA 580*b843c749SSergey Zigachev #define mmCRTC1_CRTC_DCFE_CLOCK_CONTROL 0x1E7C 581*b843c749SSergey Zigachev #define mmCRTC1_CRTC_DOUBLE_BUFFER_CONTROL 0x1EB6 582*b843c749SSergey Zigachev #define mmCRTC1_CRTC_DTMTEST_CNTL 0x1E92 583*b843c749SSergey Zigachev #define mmCRTC1_CRTC_DTMTEST_STATUS_POSITION 0x1E93 584*b843c749SSergey Zigachev #define mmCRTC1_CRTC_FLOW_CONTROL 0x1E99 585*b843c749SSergey Zigachev #define mmCRTC1_CRTC_FORCE_COUNT_NOW_CNTL 0x1E98 586*b843c749SSergey Zigachev #define mmCRTC1_CRTC_GSL_CONTROL 0x1E7B 587*b843c749SSergey Zigachev #define mmCRTC1_CRTC_GSL_VSYNC_GAP 0x1E79 588*b843c749SSergey Zigachev #define mmCRTC1_CRTC_GSL_WINDOW 0x1E7A 589*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_BLANK_EARLY_NUM 0x1E7D 590*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_BLANK_START_END 0x1E81 591*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_SYNC_A 0x1E82 592*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_SYNC_A_CNTL 0x1E83 593*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_SYNC_B 0x1E84 594*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_SYNC_B_CNTL 0x1E85 595*b843c749SSergey Zigachev #define mmCRTC1_CRTC_H_TOTAL 0x1E80 596*b843c749SSergey Zigachev #define mmCRTC1_CRTC_INTERLACE_CONTROL 0x1E9E 597*b843c749SSergey Zigachev #define mmCRTC1_CRTC_INTERLACE_STATUS 0x1E9F 598*b843c749SSergey Zigachev #define mmCRTC1_CRTC_INTERRUPT_CONTROL 0x1EB4 599*b843c749SSergey Zigachev #define mmCRTC1_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1EAB 600*b843c749SSergey Zigachev #define mmCRTC1_CRTC_MASTER_EN 0x1EC2 601*b843c749SSergey Zigachev #define mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT 0x1EBF 602*b843c749SSergey Zigachev #define mmCRTC1_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1EC0 603*b843c749SSergey Zigachev #define mmCRTC1_CRTC_MVP_STATUS 0x1EC1 604*b843c749SSergey Zigachev #define mmCRTC1_CRTC_NOM_VERT_POSITION 0x1EA5 605*b843c749SSergey Zigachev #define mmCRTC1_CRTC_OVERSCAN_COLOR 0x1EA0 606*b843c749SSergey Zigachev #define mmCRTC1_CRTC_SNAPSHOT_CONTROL 0x1EB0 607*b843c749SSergey Zigachev #define mmCRTC1_CRTC_SNAPSHOT_FRAME 0x1EB2 608*b843c749SSergey Zigachev #define mmCRTC1_CRTC_SNAPSHOT_POSITION 0x1EB1 609*b843c749SSergey Zigachev #define mmCRTC1_CRTC_SNAPSHOT_STATUS 0x1EAF 610*b843c749SSergey Zigachev #define mmCRTC1_CRTC_START_LINE_CONTROL 0x1EB3 611*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STATUS 0x1EA3 612*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STATUS_FRAME_COUNT 0x1EA6 613*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STATUS_HV_COUNT 0x1EA8 614*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STATUS_POSITION 0x1EA4 615*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STATUS_VF_COUNT 0x1EA7 616*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STEREO_CONTROL 0x1EAE 617*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STEREO_FORCE_NEXT_EYE 0x1E9B 618*b843c749SSergey Zigachev #define mmCRTC1_CRTC_STEREO_STATUS 0x1EAD 619*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TEST_DEBUG_DATA 0x1EC7 620*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TEST_DEBUG_INDEX 0x1EC6 621*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TEST_PATTERN_COLOR 0x1EBC 622*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TEST_PATTERN_CONTROL 0x1EBA 623*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TEST_PATTERN_PARAMETERS 0x1EBB 624*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TRIGA_CNTL 0x1E94 625*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TRIGA_MANUAL_TRIG 0x1E95 626*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TRIGB_CNTL 0x1E96 627*b843c749SSergey Zigachev #define mmCRTC1_CRTC_TRIGB_MANUAL_TRIG 0x1E97 628*b843c749SSergey Zigachev #define mmCRTC1_CRTC_UPDATE_LOCK 0x1EB5 629*b843c749SSergey Zigachev #define mmCRTC1_CRTC_VBI_END 0x1E86 630*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_BLANK_START_END 0x1E8D 631*b843c749SSergey Zigachev #define mmCRTC1_CRTC_VERT_SYNC_CONTROL 0x1EAC 632*b843c749SSergey Zigachev #define mmCRTC1_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x1EB7 633*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_SYNC_A 0x1E8E 634*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_SYNC_A_CNTL 0x1E8F 635*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_SYNC_B 0x1E90 636*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_SYNC_B_CNTL 0x1E91 637*b843c749SSergey Zigachev #define mmCRTC1_CRTC_VSYNC_NOM_INT_STATUS 0x1E8C 638*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_TOTAL 0x1E87 639*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_TOTAL_CONTROL 0x1E8A 640*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_TOTAL_INT_STATUS 0x1E8B 641*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_TOTAL_MAX 0x1E89 642*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_TOTAL_MIN 0x1E88 643*b843c749SSergey Zigachev #define mmCRTC1_CRTC_V_UPDATE_INT_STATUS 0x1EC4 644*b843c749SSergey Zigachev #define mmCRTC1_DCFE_DBG_SEL 0x1E7E 645*b843c749SSergey Zigachev #define mmCRTC1_DCFE_MEM_LIGHT_SLEEP_CNTL 0x1E7F 646*b843c749SSergey Zigachev #define mmCRTC1_MASTER_UPDATE_LOCK 0x1EBD 647*b843c749SSergey Zigachev #define mmCRTC1_MASTER_UPDATE_MODE 0x1EBE 648*b843c749SSergey Zigachev #define mmCRTC1_PIXEL_RATE_CNTL 0x0144 649*b843c749SSergey Zigachev #define mmCRTC2_CRTC_3D_STRUCTURE_CONTROL 0x4178 650*b843c749SSergey Zigachev #define mmCRTC2_CRTC_ALLOW_STOP_OFF_V_CNT 0x41C3 651*b843c749SSergey Zigachev #define mmCRTC2_CRTC_BLACK_COLOR 0x41A2 652*b843c749SSergey Zigachev #define mmCRTC2_CRTC_BLANK_CONTROL 0x419D 653*b843c749SSergey Zigachev #define mmCRTC2_CRTC_BLANK_DATA_COLOR 0x41A1 654*b843c749SSergey Zigachev #define mmCRTC2_CRTC_CONTROL 0x419C 655*b843c749SSergey Zigachev #define mmCRTC2_CRTC_COUNT_CONTROL 0x41A9 656*b843c749SSergey Zigachev #define mmCRTC2_CRTC_COUNT_RESET 0x41AA 657*b843c749SSergey Zigachev #define mmCRTC2_CRTC_DCFE_CLOCK_CONTROL 0x417C 658*b843c749SSergey Zigachev #define mmCRTC2_CRTC_DOUBLE_BUFFER_CONTROL 0x41B6 659*b843c749SSergey Zigachev #define mmCRTC2_CRTC_DTMTEST_CNTL 0x4192 660*b843c749SSergey Zigachev #define mmCRTC2_CRTC_DTMTEST_STATUS_POSITION 0x4193 661*b843c749SSergey Zigachev #define mmCRTC2_CRTC_FLOW_CONTROL 0x4199 662*b843c749SSergey Zigachev #define mmCRTC2_CRTC_FORCE_COUNT_NOW_CNTL 0x4198 663*b843c749SSergey Zigachev #define mmCRTC2_CRTC_GSL_CONTROL 0x417B 664*b843c749SSergey Zigachev #define mmCRTC2_CRTC_GSL_VSYNC_GAP 0x4179 665*b843c749SSergey Zigachev #define mmCRTC2_CRTC_GSL_WINDOW 0x417A 666*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_BLANK_EARLY_NUM 0x417D 667*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_BLANK_START_END 0x4181 668*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_SYNC_A 0x4182 669*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_SYNC_A_CNTL 0x4183 670*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_SYNC_B 0x4184 671*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_SYNC_B_CNTL 0x4185 672*b843c749SSergey Zigachev #define mmCRTC2_CRTC_H_TOTAL 0x4180 673*b843c749SSergey Zigachev #define mmCRTC2_CRTC_INTERLACE_CONTROL 0x419E 674*b843c749SSergey Zigachev #define mmCRTC2_CRTC_INTERLACE_STATUS 0x419F 675*b843c749SSergey Zigachev #define mmCRTC2_CRTC_INTERRUPT_CONTROL 0x41B4 676*b843c749SSergey Zigachev #define mmCRTC2_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x41AB 677*b843c749SSergey Zigachev #define mmCRTC2_CRTC_MASTER_EN 0x41C2 678*b843c749SSergey Zigachev #define mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT 0x41BF 679*b843c749SSergey Zigachev #define mmCRTC2_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x41C0 680*b843c749SSergey Zigachev #define mmCRTC2_CRTC_MVP_STATUS 0x41C1 681*b843c749SSergey Zigachev #define mmCRTC2_CRTC_NOM_VERT_POSITION 0x41A5 682*b843c749SSergey Zigachev #define mmCRTC2_CRTC_OVERSCAN_COLOR 0x41A0 683*b843c749SSergey Zigachev #define mmCRTC2_CRTC_SNAPSHOT_CONTROL 0x41B0 684*b843c749SSergey Zigachev #define mmCRTC2_CRTC_SNAPSHOT_FRAME 0x41B2 685*b843c749SSergey Zigachev #define mmCRTC2_CRTC_SNAPSHOT_POSITION 0x41B1 686*b843c749SSergey Zigachev #define mmCRTC2_CRTC_SNAPSHOT_STATUS 0x41AF 687*b843c749SSergey Zigachev #define mmCRTC2_CRTC_START_LINE_CONTROL 0x41B3 688*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STATUS 0x41A3 689*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STATUS_FRAME_COUNT 0x41A6 690*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STATUS_HV_COUNT 0x41A8 691*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STATUS_POSITION 0x41A4 692*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STATUS_VF_COUNT 0x41A7 693*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STEREO_CONTROL 0x41AE 694*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STEREO_FORCE_NEXT_EYE 0x419B 695*b843c749SSergey Zigachev #define mmCRTC2_CRTC_STEREO_STATUS 0x41AD 696*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TEST_DEBUG_DATA 0x41C7 697*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TEST_DEBUG_INDEX 0x41C6 698*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TEST_PATTERN_COLOR 0x41BC 699*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TEST_PATTERN_CONTROL 0x41BA 700*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TEST_PATTERN_PARAMETERS 0x41BB 701*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TRIGA_CNTL 0x4194 702*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TRIGA_MANUAL_TRIG 0x4195 703*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TRIGB_CNTL 0x4196 704*b843c749SSergey Zigachev #define mmCRTC2_CRTC_TRIGB_MANUAL_TRIG 0x4197 705*b843c749SSergey Zigachev #define mmCRTC2_CRTC_UPDATE_LOCK 0x41B5 706*b843c749SSergey Zigachev #define mmCRTC2_CRTC_VBI_END 0x4186 707*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_BLANK_START_END 0x418D 708*b843c749SSergey Zigachev #define mmCRTC2_CRTC_VERT_SYNC_CONTROL 0x41AC 709*b843c749SSergey Zigachev #define mmCRTC2_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x41B7 710*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_SYNC_A 0x418E 711*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_SYNC_A_CNTL 0x418F 712*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_SYNC_B 0x4190 713*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_SYNC_B_CNTL 0x4191 714*b843c749SSergey Zigachev #define mmCRTC2_CRTC_VSYNC_NOM_INT_STATUS 0x418C 715*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_TOTAL 0x4187 716*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_TOTAL_CONTROL 0x418A 717*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_TOTAL_INT_STATUS 0x418B 718*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_TOTAL_MAX 0x4189 719*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_TOTAL_MIN 0x4188 720*b843c749SSergey Zigachev #define mmCRTC2_CRTC_V_UPDATE_INT_STATUS 0x41C4 721*b843c749SSergey Zigachev #define mmCRTC2_DCFE_DBG_SEL 0x417E 722*b843c749SSergey Zigachev #define mmCRTC2_DCFE_MEM_LIGHT_SLEEP_CNTL 0x417F 723*b843c749SSergey Zigachev #define mmCRTC2_MASTER_UPDATE_LOCK 0x41BD 724*b843c749SSergey Zigachev #define mmCRTC2_MASTER_UPDATE_MODE 0x41BE 725*b843c749SSergey Zigachev #define mmCRTC2_PIXEL_RATE_CNTL 0x0148 726*b843c749SSergey Zigachev #define mmCRTC3_CRTC_3D_STRUCTURE_CONTROL 0x4478 727*b843c749SSergey Zigachev #define mmCRTC3_CRTC_ALLOW_STOP_OFF_V_CNT 0x44C3 728*b843c749SSergey Zigachev #define mmCRTC3_CRTC_BLACK_COLOR 0x44A2 729*b843c749SSergey Zigachev #define mmCRTC3_CRTC_BLANK_CONTROL 0x449D 730*b843c749SSergey Zigachev #define mmCRTC3_CRTC_BLANK_DATA_COLOR 0x44A1 731*b843c749SSergey Zigachev #define mmCRTC3_CRTC_CONTROL 0x449C 732*b843c749SSergey Zigachev #define mmCRTC3_CRTC_COUNT_CONTROL 0x44A9 733*b843c749SSergey Zigachev #define mmCRTC3_CRTC_COUNT_RESET 0x44AA 734*b843c749SSergey Zigachev #define mmCRTC3_CRTC_DCFE_CLOCK_CONTROL 0x447C 735*b843c749SSergey Zigachev #define mmCRTC3_CRTC_DOUBLE_BUFFER_CONTROL 0x44B6 736*b843c749SSergey Zigachev #define mmCRTC3_CRTC_DTMTEST_CNTL 0x4492 737*b843c749SSergey Zigachev #define mmCRTC3_CRTC_DTMTEST_STATUS_POSITION 0x4493 738*b843c749SSergey Zigachev #define mmCRTC3_CRTC_FLOW_CONTROL 0x4499 739*b843c749SSergey Zigachev #define mmCRTC3_CRTC_FORCE_COUNT_NOW_CNTL 0x4498 740*b843c749SSergey Zigachev #define mmCRTC3_CRTC_GSL_CONTROL 0x447B 741*b843c749SSergey Zigachev #define mmCRTC3_CRTC_GSL_VSYNC_GAP 0x4479 742*b843c749SSergey Zigachev #define mmCRTC3_CRTC_GSL_WINDOW 0x447A 743*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_BLANK_EARLY_NUM 0x447D 744*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_BLANK_START_END 0x4481 745*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_SYNC_A 0x4482 746*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_SYNC_A_CNTL 0x4483 747*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_SYNC_B 0x4484 748*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_SYNC_B_CNTL 0x4485 749*b843c749SSergey Zigachev #define mmCRTC3_CRTC_H_TOTAL 0x4480 750*b843c749SSergey Zigachev #define mmCRTC3_CRTC_INTERLACE_CONTROL 0x449E 751*b843c749SSergey Zigachev #define mmCRTC3_CRTC_INTERLACE_STATUS 0x449F 752*b843c749SSergey Zigachev #define mmCRTC3_CRTC_INTERRUPT_CONTROL 0x44B4 753*b843c749SSergey Zigachev #define mmCRTC3_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x44AB 754*b843c749SSergey Zigachev #define mmCRTC3_CRTC_MASTER_EN 0x44C2 755*b843c749SSergey Zigachev #define mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT 0x44BF 756*b843c749SSergey Zigachev #define mmCRTC3_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x44C0 757*b843c749SSergey Zigachev #define mmCRTC3_CRTC_MVP_STATUS 0x44C1 758*b843c749SSergey Zigachev #define mmCRTC3_CRTC_NOM_VERT_POSITION 0x44A5 759*b843c749SSergey Zigachev #define mmCRTC3_CRTC_OVERSCAN_COLOR 0x44A0 760*b843c749SSergey Zigachev #define mmCRTC3_CRTC_SNAPSHOT_CONTROL 0x44B0 761*b843c749SSergey Zigachev #define mmCRTC3_CRTC_SNAPSHOT_FRAME 0x44B2 762*b843c749SSergey Zigachev #define mmCRTC3_CRTC_SNAPSHOT_POSITION 0x44B1 763*b843c749SSergey Zigachev #define mmCRTC3_CRTC_SNAPSHOT_STATUS 0x44AF 764*b843c749SSergey Zigachev #define mmCRTC3_CRTC_START_LINE_CONTROL 0x44B3 765*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STATUS 0x44A3 766*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STATUS_FRAME_COUNT 0x44A6 767*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STATUS_HV_COUNT 0x44A8 768*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STATUS_POSITION 0x44A4 769*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STATUS_VF_COUNT 0x44A7 770*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STEREO_CONTROL 0x44AE 771*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STEREO_FORCE_NEXT_EYE 0x449B 772*b843c749SSergey Zigachev #define mmCRTC3_CRTC_STEREO_STATUS 0x44AD 773*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TEST_DEBUG_DATA 0x44C7 774*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TEST_DEBUG_INDEX 0x44C6 775*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TEST_PATTERN_COLOR 0x44BC 776*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TEST_PATTERN_CONTROL 0x44BA 777*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TEST_PATTERN_PARAMETERS 0x44BB 778*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TRIGA_CNTL 0x4494 779*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TRIGA_MANUAL_TRIG 0x4495 780*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TRIGB_CNTL 0x4496 781*b843c749SSergey Zigachev #define mmCRTC3_CRTC_TRIGB_MANUAL_TRIG 0x4497 782*b843c749SSergey Zigachev #define mmCRTC3_CRTC_UPDATE_LOCK 0x44B5 783*b843c749SSergey Zigachev #define mmCRTC3_CRTC_VBI_END 0x4486 784*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_BLANK_START_END 0x448D 785*b843c749SSergey Zigachev #define mmCRTC3_CRTC_VERT_SYNC_CONTROL 0x44AC 786*b843c749SSergey Zigachev #define mmCRTC3_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x44B7 787*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_SYNC_A 0x448E 788*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_SYNC_A_CNTL 0x448F 789*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_SYNC_B 0x4490 790*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_SYNC_B_CNTL 0x4491 791*b843c749SSergey Zigachev #define mmCRTC3_CRTC_VSYNC_NOM_INT_STATUS 0x448C 792*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_TOTAL 0x4487 793*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_TOTAL_CONTROL 0x448A 794*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_TOTAL_INT_STATUS 0x448B 795*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_TOTAL_MAX 0x4489 796*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_TOTAL_MIN 0x4488 797*b843c749SSergey Zigachev #define mmCRTC3_CRTC_V_UPDATE_INT_STATUS 0x44C4 798*b843c749SSergey Zigachev #define mmCRTC3_DCFE_DBG_SEL 0x447E 799*b843c749SSergey Zigachev #define mmCRTC3_DCFE_MEM_LIGHT_SLEEP_CNTL 0x447F 800*b843c749SSergey Zigachev #define mmCRTC_3D_STRUCTURE_CONTROL 0x1B78 801*b843c749SSergey Zigachev #define mmCRTC3_MASTER_UPDATE_LOCK 0x44BD 802*b843c749SSergey Zigachev #define mmCRTC3_MASTER_UPDATE_MODE 0x44BE 803*b843c749SSergey Zigachev #define mmCRTC3_PIXEL_RATE_CNTL 0x014C 804*b843c749SSergey Zigachev #define mmCRTC4_CRTC_3D_STRUCTURE_CONTROL 0x4778 805*b843c749SSergey Zigachev #define mmCRTC4_CRTC_ALLOW_STOP_OFF_V_CNT 0x47C3 806*b843c749SSergey Zigachev #define mmCRTC4_CRTC_BLACK_COLOR 0x47A2 807*b843c749SSergey Zigachev #define mmCRTC4_CRTC_BLANK_CONTROL 0x479D 808*b843c749SSergey Zigachev #define mmCRTC4_CRTC_BLANK_DATA_COLOR 0x47A1 809*b843c749SSergey Zigachev #define mmCRTC4_CRTC_CONTROL 0x479C 810*b843c749SSergey Zigachev #define mmCRTC4_CRTC_COUNT_CONTROL 0x47A9 811*b843c749SSergey Zigachev #define mmCRTC4_CRTC_COUNT_RESET 0x47AA 812*b843c749SSergey Zigachev #define mmCRTC4_CRTC_DCFE_CLOCK_CONTROL 0x477C 813*b843c749SSergey Zigachev #define mmCRTC4_CRTC_DOUBLE_BUFFER_CONTROL 0x47B6 814*b843c749SSergey Zigachev #define mmCRTC4_CRTC_DTMTEST_CNTL 0x4792 815*b843c749SSergey Zigachev #define mmCRTC4_CRTC_DTMTEST_STATUS_POSITION 0x4793 816*b843c749SSergey Zigachev #define mmCRTC4_CRTC_FLOW_CONTROL 0x4799 817*b843c749SSergey Zigachev #define mmCRTC4_CRTC_FORCE_COUNT_NOW_CNTL 0x4798 818*b843c749SSergey Zigachev #define mmCRTC4_CRTC_GSL_CONTROL 0x477B 819*b843c749SSergey Zigachev #define mmCRTC4_CRTC_GSL_VSYNC_GAP 0x4779 820*b843c749SSergey Zigachev #define mmCRTC4_CRTC_GSL_WINDOW 0x477A 821*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_BLANK_EARLY_NUM 0x477D 822*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_BLANK_START_END 0x4781 823*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_SYNC_A 0x4782 824*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_SYNC_A_CNTL 0x4783 825*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_SYNC_B 0x4784 826*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_SYNC_B_CNTL 0x4785 827*b843c749SSergey Zigachev #define mmCRTC4_CRTC_H_TOTAL 0x4780 828*b843c749SSergey Zigachev #define mmCRTC4_CRTC_INTERLACE_CONTROL 0x479E 829*b843c749SSergey Zigachev #define mmCRTC4_CRTC_INTERLACE_STATUS 0x479F 830*b843c749SSergey Zigachev #define mmCRTC4_CRTC_INTERRUPT_CONTROL 0x47B4 831*b843c749SSergey Zigachev #define mmCRTC4_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x47AB 832*b843c749SSergey Zigachev #define mmCRTC4_CRTC_MASTER_EN 0x47C2 833*b843c749SSergey Zigachev #define mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT 0x47BF 834*b843c749SSergey Zigachev #define mmCRTC4_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x47C0 835*b843c749SSergey Zigachev #define mmCRTC4_CRTC_MVP_STATUS 0x47C1 836*b843c749SSergey Zigachev #define mmCRTC4_CRTC_NOM_VERT_POSITION 0x47A5 837*b843c749SSergey Zigachev #define mmCRTC4_CRTC_OVERSCAN_COLOR 0x47A0 838*b843c749SSergey Zigachev #define mmCRTC4_CRTC_SNAPSHOT_CONTROL 0x47B0 839*b843c749SSergey Zigachev #define mmCRTC4_CRTC_SNAPSHOT_FRAME 0x47B2 840*b843c749SSergey Zigachev #define mmCRTC4_CRTC_SNAPSHOT_POSITION 0x47B1 841*b843c749SSergey Zigachev #define mmCRTC4_CRTC_SNAPSHOT_STATUS 0x47AF 842*b843c749SSergey Zigachev #define mmCRTC4_CRTC_START_LINE_CONTROL 0x47B3 843*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STATUS 0x47A3 844*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STATUS_FRAME_COUNT 0x47A6 845*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STATUS_HV_COUNT 0x47A8 846*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STATUS_POSITION 0x47A4 847*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STATUS_VF_COUNT 0x47A7 848*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STEREO_CONTROL 0x47AE 849*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STEREO_FORCE_NEXT_EYE 0x479B 850*b843c749SSergey Zigachev #define mmCRTC4_CRTC_STEREO_STATUS 0x47AD 851*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TEST_DEBUG_DATA 0x47C7 852*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TEST_DEBUG_INDEX 0x47C6 853*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TEST_PATTERN_COLOR 0x47BC 854*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TEST_PATTERN_CONTROL 0x47BA 855*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TEST_PATTERN_PARAMETERS 0x47BB 856*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TRIGA_CNTL 0x4794 857*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TRIGA_MANUAL_TRIG 0x4795 858*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TRIGB_CNTL 0x4796 859*b843c749SSergey Zigachev #define mmCRTC4_CRTC_TRIGB_MANUAL_TRIG 0x4797 860*b843c749SSergey Zigachev #define mmCRTC4_CRTC_UPDATE_LOCK 0x47B5 861*b843c749SSergey Zigachev #define mmCRTC4_CRTC_VBI_END 0x4786 862*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_BLANK_START_END 0x478D 863*b843c749SSergey Zigachev #define mmCRTC4_CRTC_VERT_SYNC_CONTROL 0x47AC 864*b843c749SSergey Zigachev #define mmCRTC4_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x47B7 865*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_SYNC_A 0x478E 866*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_SYNC_A_CNTL 0x478F 867*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_SYNC_B 0x4790 868*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_SYNC_B_CNTL 0x4791 869*b843c749SSergey Zigachev #define mmCRTC4_CRTC_VSYNC_NOM_INT_STATUS 0x478C 870*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_TOTAL 0x4787 871*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_TOTAL_CONTROL 0x478A 872*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_TOTAL_INT_STATUS 0x478B 873*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_TOTAL_MAX 0x4789 874*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_TOTAL_MIN 0x4788 875*b843c749SSergey Zigachev #define mmCRTC4_CRTC_V_UPDATE_INT_STATUS 0x47C4 876*b843c749SSergey Zigachev #define mmCRTC4_DCFE_DBG_SEL 0x477E 877*b843c749SSergey Zigachev #define mmCRTC4_DCFE_MEM_LIGHT_SLEEP_CNTL 0x477F 878*b843c749SSergey Zigachev #define mmCRTC4_MASTER_UPDATE_LOCK 0x47BD 879*b843c749SSergey Zigachev #define mmCRTC4_MASTER_UPDATE_MODE 0x47BE 880*b843c749SSergey Zigachev #define mmCRTC4_PIXEL_RATE_CNTL 0x0150 881*b843c749SSergey Zigachev #define mmCRTC5_CRTC_3D_STRUCTURE_CONTROL 0x4A78 882*b843c749SSergey Zigachev #define mmCRTC5_CRTC_ALLOW_STOP_OFF_V_CNT 0x4AC3 883*b843c749SSergey Zigachev #define mmCRTC5_CRTC_BLACK_COLOR 0x4AA2 884*b843c749SSergey Zigachev #define mmCRTC5_CRTC_BLANK_CONTROL 0x4A9D 885*b843c749SSergey Zigachev #define mmCRTC5_CRTC_BLANK_DATA_COLOR 0x4AA1 886*b843c749SSergey Zigachev #define mmCRTC5_CRTC_CONTROL 0x4A9C 887*b843c749SSergey Zigachev #define mmCRTC5_CRTC_COUNT_CONTROL 0x4AA9 888*b843c749SSergey Zigachev #define mmCRTC5_CRTC_COUNT_RESET 0x4AAA 889*b843c749SSergey Zigachev #define mmCRTC5_CRTC_DCFE_CLOCK_CONTROL 0x4A7C 890*b843c749SSergey Zigachev #define mmCRTC5_CRTC_DOUBLE_BUFFER_CONTROL 0x4AB6 891*b843c749SSergey Zigachev #define mmCRTC5_CRTC_DTMTEST_CNTL 0x4A92 892*b843c749SSergey Zigachev #define mmCRTC5_CRTC_DTMTEST_STATUS_POSITION 0x4A93 893*b843c749SSergey Zigachev #define mmCRTC5_CRTC_FLOW_CONTROL 0x4A99 894*b843c749SSergey Zigachev #define mmCRTC5_CRTC_FORCE_COUNT_NOW_CNTL 0x4A98 895*b843c749SSergey Zigachev #define mmCRTC5_CRTC_GSL_CONTROL 0x4A7B 896*b843c749SSergey Zigachev #define mmCRTC5_CRTC_GSL_VSYNC_GAP 0x4A79 897*b843c749SSergey Zigachev #define mmCRTC5_CRTC_GSL_WINDOW 0x4A7A 898*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_BLANK_EARLY_NUM 0x4A7D 899*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_BLANK_START_END 0x4A81 900*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_SYNC_A 0x4A82 901*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_SYNC_A_CNTL 0x4A83 902*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_SYNC_B 0x4A84 903*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_SYNC_B_CNTL 0x4A85 904*b843c749SSergey Zigachev #define mmCRTC5_CRTC_H_TOTAL 0x4A80 905*b843c749SSergey Zigachev #define mmCRTC5_CRTC_INTERLACE_CONTROL 0x4A9E 906*b843c749SSergey Zigachev #define mmCRTC5_CRTC_INTERLACE_STATUS 0x4A9F 907*b843c749SSergey Zigachev #define mmCRTC5_CRTC_INTERRUPT_CONTROL 0x4AB4 908*b843c749SSergey Zigachev #define mmCRTC5_CRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x4AAB 909*b843c749SSergey Zigachev #define mmCRTC5_CRTC_MASTER_EN 0x4AC2 910*b843c749SSergey Zigachev #define mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT 0x4ABF 911*b843c749SSergey Zigachev #define mmCRTC5_CRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x4AC0 912*b843c749SSergey Zigachev #define mmCRTC5_CRTC_MVP_STATUS 0x4AC1 913*b843c749SSergey Zigachev #define mmCRTC5_CRTC_NOM_VERT_POSITION 0x4AA5 914*b843c749SSergey Zigachev #define mmCRTC5_CRTC_OVERSCAN_COLOR 0x4AA0 915*b843c749SSergey Zigachev #define mmCRTC5_CRTC_SNAPSHOT_CONTROL 0x4AB0 916*b843c749SSergey Zigachev #define mmCRTC5_CRTC_SNAPSHOT_FRAME 0x4AB2 917*b843c749SSergey Zigachev #define mmCRTC5_CRTC_SNAPSHOT_POSITION 0x4AB1 918*b843c749SSergey Zigachev #define mmCRTC5_CRTC_SNAPSHOT_STATUS 0x4AAF 919*b843c749SSergey Zigachev #define mmCRTC5_CRTC_START_LINE_CONTROL 0x4AB3 920*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STATUS 0x4AA3 921*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STATUS_FRAME_COUNT 0x4AA6 922*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STATUS_HV_COUNT 0x4AA8 923*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STATUS_POSITION 0x4AA4 924*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STATUS_VF_COUNT 0x4AA7 925*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STEREO_CONTROL 0x4AAE 926*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STEREO_FORCE_NEXT_EYE 0x4A9B 927*b843c749SSergey Zigachev #define mmCRTC5_CRTC_STEREO_STATUS 0x4AAD 928*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TEST_DEBUG_DATA 0x4AC7 929*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TEST_DEBUG_INDEX 0x4AC6 930*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TEST_PATTERN_COLOR 0x4ABC 931*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TEST_PATTERN_CONTROL 0x4ABA 932*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TEST_PATTERN_PARAMETERS 0x4ABB 933*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TRIGA_CNTL 0x4A94 934*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TRIGA_MANUAL_TRIG 0x4A95 935*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TRIGB_CNTL 0x4A96 936*b843c749SSergey Zigachev #define mmCRTC5_CRTC_TRIGB_MANUAL_TRIG 0x4A97 937*b843c749SSergey Zigachev #define mmCRTC5_CRTC_UPDATE_LOCK 0x4AB5 938*b843c749SSergey Zigachev #define mmCRTC5_CRTC_VBI_END 0x4A86 939*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_BLANK_START_END 0x4A8D 940*b843c749SSergey Zigachev #define mmCRTC5_CRTC_VERT_SYNC_CONTROL 0x4AAC 941*b843c749SSergey Zigachev #define mmCRTC5_CRTC_VGA_PARAMETER_CAPTURE_MODE 0x4AB7 942*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_SYNC_A 0x4A8E 943*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_SYNC_A_CNTL 0x4A8F 944*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_SYNC_B 0x4A90 945*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_SYNC_B_CNTL 0x4A91 946*b843c749SSergey Zigachev #define mmCRTC5_CRTC_VSYNC_NOM_INT_STATUS 0x4A8C 947*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_TOTAL 0x4A87 948*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_TOTAL_CONTROL 0x4A8A 949*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_TOTAL_INT_STATUS 0x4A8B 950*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_TOTAL_MAX 0x4A89 951*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_TOTAL_MIN 0x4A88 952*b843c749SSergey Zigachev #define mmCRTC5_CRTC_V_UPDATE_INT_STATUS 0x4AC4 953*b843c749SSergey Zigachev #define mmCRTC5_DCFE_DBG_SEL 0x4A7E 954*b843c749SSergey Zigachev #define mmCRTC5_DCFE_MEM_LIGHT_SLEEP_CNTL 0x4A7F 955*b843c749SSergey Zigachev #define mmCRTC5_MASTER_UPDATE_LOCK 0x4ABD 956*b843c749SSergey Zigachev #define mmCRTC5_MASTER_UPDATE_MODE 0x4ABE 957*b843c749SSergey Zigachev #define mmCRTC5_PIXEL_RATE_CNTL 0x0154 958*b843c749SSergey Zigachev #define mmCRTC8_DATA 0x00ED 959*b843c749SSergey Zigachev #define mmCRTC8_IDX 0x00ED 960*b843c749SSergey Zigachev #define mmCRTC_ALLOW_STOP_OFF_V_CNT 0x1BC3 961*b843c749SSergey Zigachev #define mmCRTC_BLACK_COLOR 0x1BA2 962*b843c749SSergey Zigachev #define mmCRTC_BLANK_CONTROL 0x1B9D 963*b843c749SSergey Zigachev #define mmCRTC_BLANK_DATA_COLOR 0x1BA1 964*b843c749SSergey Zigachev #define mmCRTC_CONTROL 0x1B9C 965*b843c749SSergey Zigachev #define mmCRTC_COUNT_CONTROL 0x1BA9 966*b843c749SSergey Zigachev #define mmCRTC_COUNT_RESET 0x1BAA 967*b843c749SSergey Zigachev #define mmCRTC_DCFE_CLOCK_CONTROL 0x1B7C 968*b843c749SSergey Zigachev #define mmCRTC_DOUBLE_BUFFER_CONTROL 0x1BB6 969*b843c749SSergey Zigachev #define mmCRTC_DTMTEST_CNTL 0x1B92 970*b843c749SSergey Zigachev #define mmCRTC_DTMTEST_STATUS_POSITION 0x1B93 971*b843c749SSergey Zigachev #define mmCRTC_FLOW_CONTROL 0x1B99 972*b843c749SSergey Zigachev #define mmCRTC_FORCE_COUNT_NOW_CNTL 0x1B98 973*b843c749SSergey Zigachev #define mmCRTC_GSL_CONTROL 0x1B7B 974*b843c749SSergey Zigachev #define mmCRTC_GSL_VSYNC_GAP 0x1B79 975*b843c749SSergey Zigachev #define mmCRTC_GSL_WINDOW 0x1B7A 976*b843c749SSergey Zigachev #define mmCRTC_H_BLANK_EARLY_NUM 0x1B7D 977*b843c749SSergey Zigachev #define mmCRTC_H_BLANK_START_END 0x1B81 978*b843c749SSergey Zigachev #define mmCRTC_H_SYNC_A 0x1B82 979*b843c749SSergey Zigachev #define mmCRTC_H_SYNC_A_CNTL 0x1B83 980*b843c749SSergey Zigachev #define mmCRTC_H_SYNC_B 0x1B84 981*b843c749SSergey Zigachev #define mmCRTC_H_SYNC_B_CNTL 0x1B85 982*b843c749SSergey Zigachev #define mmCRTC_H_TOTAL 0x1B80 983*b843c749SSergey Zigachev #define mmCRTC_INTERLACE_CONTROL 0x1B9E 984*b843c749SSergey Zigachev #define mmCRTC_INTERLACE_STATUS 0x1B9F 985*b843c749SSergey Zigachev #define mmCRTC_INTERRUPT_CONTROL 0x1BB4 986*b843c749SSergey Zigachev #define mmCRTC_MANUAL_FORCE_VSYNC_NEXT_LINE 0x1BAB 987*b843c749SSergey Zigachev #define mmCRTC_MASTER_EN 0x1BC2 988*b843c749SSergey Zigachev #define mmCRTC_MVP_INBAND_CNTL_INSERT 0x1BBF 989*b843c749SSergey Zigachev #define mmCRTC_MVP_INBAND_CNTL_INSERT_TIMER 0x1BC0 990*b843c749SSergey Zigachev #define mmCRTC_MVP_STATUS 0x1BC1 991*b843c749SSergey Zigachev #define mmCRTC_NOM_VERT_POSITION 0x1BA5 992*b843c749SSergey Zigachev #define mmCRTC_OVERSCAN_COLOR 0x1BA0 993*b843c749SSergey Zigachev #define mmCRTC_SNAPSHOT_CONTROL 0x1BB0 994*b843c749SSergey Zigachev #define mmCRTC_SNAPSHOT_FRAME 0x1BB2 995*b843c749SSergey Zigachev #define mmCRTC_SNAPSHOT_POSITION 0x1BB1 996*b843c749SSergey Zigachev #define mmCRTC_SNAPSHOT_STATUS 0x1BAF 997*b843c749SSergey Zigachev #define mmCRTC_START_LINE_CONTROL 0x1BB3 998*b843c749SSergey Zigachev #define mmCRTC_STATUS 0x1BA3 999*b843c749SSergey Zigachev #define mmCRTC_STATUS_FRAME_COUNT 0x1BA6 1000*b843c749SSergey Zigachev #define mmCRTC_STATUS_HV_COUNT 0x1BA8 1001*b843c749SSergey Zigachev #define mmCRTC_STATUS_POSITION 0x1BA4 1002*b843c749SSergey Zigachev #define mmCRTC_STATUS_VF_COUNT 0x1BA7 1003*b843c749SSergey Zigachev #define mmCRTC_STEREO_CONTROL 0x1BAE 1004*b843c749SSergey Zigachev #define mmCRTC_STEREO_FORCE_NEXT_EYE 0x1B9B 1005*b843c749SSergey Zigachev #define mmCRTC_STEREO_STATUS 0x1BAD 1006*b843c749SSergey Zigachev #define mmCRTC_TEST_DEBUG_DATA 0x1BC7 1007*b843c749SSergey Zigachev #define mmCRTC_TEST_DEBUG_INDEX 0x1BC6 1008*b843c749SSergey Zigachev #define mmCRTC_TEST_PATTERN_COLOR 0x1BBC 1009*b843c749SSergey Zigachev #define mmCRTC_TEST_PATTERN_CONTROL 0x1BBA 1010*b843c749SSergey Zigachev #define mmCRTC_TEST_PATTERN_PARAMETERS 0x1BBB 1011*b843c749SSergey Zigachev #define mmCRTC_TRIGA_CNTL 0x1B94 1012*b843c749SSergey Zigachev #define mmCRTC_TRIGA_MANUAL_TRIG 0x1B95 1013*b843c749SSergey Zigachev #define mmCRTC_TRIGB_CNTL 0x1B96 1014*b843c749SSergey Zigachev #define mmCRTC_TRIGB_MANUAL_TRIG 0x1B97 1015*b843c749SSergey Zigachev #define mmCRTC_UPDATE_LOCK 0x1BB5 1016*b843c749SSergey Zigachev #define mmCRTC_VBI_END 0x1B86 1017*b843c749SSergey Zigachev #define mmCRTC_V_BLANK_START_END 0x1B8D 1018*b843c749SSergey Zigachev #define mmCRTC_VERT_SYNC_CONTROL 0x1BAC 1019*b843c749SSergey Zigachev #define mmCRTC_VGA_PARAMETER_CAPTURE_MODE 0x1BB7 1020*b843c749SSergey Zigachev #define mmCRTC_V_SYNC_A 0x1B8E 1021*b843c749SSergey Zigachev #define mmCRTC_V_SYNC_A_CNTL 0x1B8F 1022*b843c749SSergey Zigachev #define mmCRTC_V_SYNC_B 0x1B90 1023*b843c749SSergey Zigachev #define mmCRTC_V_SYNC_B_CNTL 0x1B91 1024*b843c749SSergey Zigachev #define mmCRTC_VSYNC_NOM_INT_STATUS 0x1B8C 1025*b843c749SSergey Zigachev #define mmCRTC_V_TOTAL 0x1B87 1026*b843c749SSergey Zigachev #define mmCRTC_V_TOTAL_CONTROL 0x1B8A 1027*b843c749SSergey Zigachev #define mmCRTC_V_TOTAL_INT_STATUS 0x1B8B 1028*b843c749SSergey Zigachev #define mmCRTC_V_TOTAL_MAX 0x1B89 1029*b843c749SSergey Zigachev #define mmCRTC_V_TOTAL_MIN 0x1B88 1030*b843c749SSergey Zigachev #define mmCRTC_V_UPDATE_INT_STATUS 0x1BC4 1031*b843c749SSergey Zigachev #define mmCUR_COLOR1 0x1A6C 1032*b843c749SSergey Zigachev #define mmCUR_COLOR2 0x1A6D 1033*b843c749SSergey Zigachev #define mmCUR_CONTROL 0x1A66 1034*b843c749SSergey Zigachev #define mmCUR_HOT_SPOT 0x1A6B 1035*b843c749SSergey Zigachev #define mmCUR_POSITION 0x1A6A 1036*b843c749SSergey Zigachev #define mmCUR_REQUEST_FILTER_CNTL 0x1A99 1037*b843c749SSergey Zigachev #define mmCUR_SIZE 0x1A68 1038*b843c749SSergey Zigachev #define mmCUR_SURFACE_ADDRESS 0x1A67 1039*b843c749SSergey Zigachev #define mmCUR_SURFACE_ADDRESS_HIGH 0x1A69 1040*b843c749SSergey Zigachev #define mmCUR_UPDATE 0x1A6E 1041*b843c749SSergey Zigachev #define mmD1VGA_CONTROL 0x00CC 1042*b843c749SSergey Zigachev #define mmD2VGA_CONTROL 0x00CE 1043*b843c749SSergey Zigachev #define mmD3VGA_CONTROL 0x00F8 1044*b843c749SSergey Zigachev #define mmD4VGA_CONTROL 0x00F9 1045*b843c749SSergey Zigachev #define mmD5VGA_CONTROL 0x00FA 1046*b843c749SSergey Zigachev #define mmD6VGA_CONTROL 0x00FB 1047*b843c749SSergey Zigachev #define mmDAC_AUTODETECT_CONTROL 0x19EE 1048*b843c749SSergey Zigachev #define mmDAC_AUTODETECT_CONTROL2 0x19EF 1049*b843c749SSergey Zigachev #define mmDAC_AUTODETECT_CONTROL3 0x19F0 1050*b843c749SSergey Zigachev #define mmDAC_AUTODETECT_INT_CONTROL 0x19F2 1051*b843c749SSergey Zigachev #define mmDAC_AUTODETECT_STATUS 0x19F1 1052*b843c749SSergey Zigachev #define mmDAC_CLK_ENABLE 0x0128 1053*b843c749SSergey Zigachev #define mmDAC_COMPARATOR_ENABLE 0x19F7 1054*b843c749SSergey Zigachev #define mmDAC_COMPARATOR_OUTPUT 0x19F8 1055*b843c749SSergey Zigachev #define mmDAC_CONTROL 0x19F6 1056*b843c749SSergey Zigachev #define mmDAC_CRC_CONTROL 0x19E7 1057*b843c749SSergey Zigachev #define mmDAC_CRC_EN 0x19E6 1058*b843c749SSergey Zigachev #define mmDAC_CRC_SIG_CONTROL 0x19EB 1059*b843c749SSergey Zigachev #define mmDAC_CRC_SIG_CONTROL_MASK 0x19E9 1060*b843c749SSergey Zigachev #define mmDAC_CRC_SIG_RGB 0x19EA 1061*b843c749SSergey Zigachev #define mmDAC_CRC_SIG_RGB_MASK 0x19E8 1062*b843c749SSergey Zigachev #define mmDAC_DATA 0x00F2 1063*b843c749SSergey Zigachev #define mmDAC_DFT_CONFIG 0x19FA 1064*b843c749SSergey Zigachev #define mmDAC_ENABLE 0x19E4 1065*b843c749SSergey Zigachev #define mmDAC_FIFO_STATUS 0x19FB 1066*b843c749SSergey Zigachev #define mmDAC_FORCE_DATA 0x19F4 1067*b843c749SSergey Zigachev #define mmDAC_FORCE_OUTPUT_CNTL 0x19F3 1068*b843c749SSergey Zigachev #define mmDAC_MACRO_CNTL_RESERVED0 0x19FC 1069*b843c749SSergey Zigachev #define mmDAC_MACRO_CNTL_RESERVED1 0x19FD 1070*b843c749SSergey Zigachev #define mmDAC_MACRO_CNTL_RESERVED2 0x19FE 1071*b843c749SSergey Zigachev #define mmDAC_MACRO_CNTL_RESERVED3 0x19FF 1072*b843c749SSergey Zigachev #define mmDAC_MASK 0x00F1 1073*b843c749SSergey Zigachev #define mmDAC_POWERDOWN 0x19F5 1074*b843c749SSergey Zigachev #define mmDAC_PWR_CNTL 0x19F9 1075*b843c749SSergey Zigachev #define mmDAC_R_INDEX 0x00F1 1076*b843c749SSergey Zigachev #define mmDAC_SOURCE_SELECT 0x19E5 1077*b843c749SSergey Zigachev #define mmDAC_STEREOSYNC_SELECT 0x19ED 1078*b843c749SSergey Zigachev #define mmDAC_SYNC_TRISTATE_CONTROL 0x19EC 1079*b843c749SSergey Zigachev #define mmDAC_W_INDEX 0x00F2 1080*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_CNTL_MISC 0x1641 1081*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_OFFSET_SLOPE_0 0x163A 1082*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_OFFSET_SLOPE_1 0x163B 1083*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_OFFSET_SLOPE_2 0x163C 1084*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_OFFSET_SLOPE_3 0x163D 1085*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_OFFSET_SLOPE_4 0x163E 1086*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_THRES_12 0x163F 1087*b843c749SSergey Zigachev #define mmDC_ABM1_ACE_THRES_34 0x1640 1088*b843c749SSergey Zigachev #define mmDC_ABM1_BL_MASTER_LOCK 0x169C 1089*b843c749SSergey Zigachev #define mmDC_ABM1_CNTL 0x1638 1090*b843c749SSergey Zigachev #define mmDC_ABM1_DEBUG_MISC 0x1649 1091*b843c749SSergey Zigachev #define mmDC_ABM1_HG_BIN_1_32_SHIFT_FLAG 0x1656 1092*b843c749SSergey Zigachev #define mmDC_ABM1_HG_BIN_17_24_SHIFT_INDEX 0x1659 1093*b843c749SSergey Zigachev #define mmDC_ABM1_HG_BIN_1_8_SHIFT_INDEX 0x1657 1094*b843c749SSergey Zigachev #define mmDC_ABM1_HG_BIN_25_32_SHIFT_INDEX 0x165A 1095*b843c749SSergey Zigachev #define mmDC_ABM1_HG_BIN_9_16_SHIFT_INDEX 0x1658 1096*b843c749SSergey Zigachev #define mmDC_ABM1_HGLS_REG_READ_PROGRESS 0x164A 1097*b843c749SSergey Zigachev #define mmDC_ABM1_HG_MISC_CTRL 0x164B 1098*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_10 0x1664 1099*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_1 0x165B 1100*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_11 0x1665 1101*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_12 0x1666 1102*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_13 0x1667 1103*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_14 0x1668 1104*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_15 0x1669 1105*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_16 0x166A 1106*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_17 0x166B 1107*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_18 0x166C 1108*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_19 0x166D 1109*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_20 0x166E 1110*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_2 0x165C 1111*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_21 0x166F 1112*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_22 0x1670 1113*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_23 0x1671 1114*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_24 0x1672 1115*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_3 0x165D 1116*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_4 0x165E 1117*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_5 0x165F 1118*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_6 0x1660 1119*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_7 0x1661 1120*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_8 0x1662 1121*b843c749SSergey Zigachev #define mmDC_ABM1_HG_RESULT_9 0x1663 1122*b843c749SSergey Zigachev #define mmDC_ABM1_HG_SAMPLE_RATE 0x1654 1123*b843c749SSergey Zigachev #define mmDC_ABM1_IPCSC_COEFF_SEL 0x1639 1124*b843c749SSergey Zigachev #define mmDC_ABM1_LS_FILTERED_MIN_MAX_LUMA 0x164E 1125*b843c749SSergey Zigachev #define mmDC_ABM1_LS_MAX_PIXEL_VALUE_COUNT 0x1653 1126*b843c749SSergey Zigachev #define mmDC_ABM1_LS_MIN_MAX_LUMA 0x164D 1127*b843c749SSergey Zigachev #define mmDC_ABM1_LS_MIN_MAX_PIXEL_VALUE_THRES 0x1651 1128*b843c749SSergey Zigachev #define mmDC_ABM1_LS_MIN_PIXEL_VALUE_COUNT 0x1652 1129*b843c749SSergey Zigachev #define mmDC_ABM1_LS_OVR_SCAN_BIN 0x1650 1130*b843c749SSergey Zigachev #define mmDC_ABM1_LS_PIXEL_COUNT 0x164F 1131*b843c749SSergey Zigachev #define mmDC_ABM1_LS_SAMPLE_RATE 0x1655 1132*b843c749SSergey Zigachev #define mmDC_ABM1_LS_SUM_OF_LUMA 0x164C 1133*b843c749SSergey Zigachev #define mmDC_ABM1_OVERSCAN_PIXEL_VALUE 0x169B 1134*b843c749SSergey Zigachev #define mmDCCG_AUDIO_DTO0_MODULE 0x016D 1135*b843c749SSergey Zigachev #define mmDCCG_AUDIO_DTO0_PHASE 0x016C 1136*b843c749SSergey Zigachev #define mmDCCG_AUDIO_DTO1_MODULE 0x0171 1137*b843c749SSergey Zigachev #define mmDCCG_AUDIO_DTO1_PHASE 0x0170 1138*b843c749SSergey Zigachev #define mmDCCG_AUDIO_DTO_SOURCE 0x016B 1139*b843c749SSergey Zigachev #define mmDCCG_CAC_STATUS 0x0137 1140*b843c749SSergey Zigachev #define mmDCCG_GATE_DISABLE_CNTL 0x0134 1141*b843c749SSergey Zigachev #define mmDCCG_GTC_CNTL 0x0120 1142*b843c749SSergey Zigachev #define mmDCCG_GTC_CURRENT 0x0123 1143*b843c749SSergey Zigachev #define mmDCCG_GTC_DTO_MODULO 0x0122 1144*b843c749SSergey Zigachev #define mmDCCG_PERFMON_CNTL 0x0133 1145*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_ANALOG 0x1708 1146*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_CNTL 0x1707 1147*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_DEBUG_CNTL 0x170B 1148*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_DISPCLK_CURRENT_DTO_PHASE 0x170F 1149*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_DISPCLK_DTO_CNTL 0x170E 1150*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_DS_CNTL 0x1705 1151*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_FB_DIV 0x1701 1152*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_IDCLK_CNTL 0x1706 1153*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_POST_DIV 0x1702 1154*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_REF_DIV 0x1700 1155*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_SS_AMOUNT_DSFRAC 0x1703 1156*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_SS_CNTL 0x1704 1157*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_UNLOCK_DETECT_CNTL 0x170A 1158*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_UPDATE_CNTL 0x170D 1159*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_UPDATE_LOCK 0x170C 1160*b843c749SSergey Zigachev #define mmDCCG_PLL0_PLL_VREG_CNTL 0x1709 1161*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_ANALOG 0x1718 1162*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_CNTL 0x1717 1163*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_DEBUG_CNTL 0x171B 1164*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_DISPCLK_CURRENT_DTO_PHASE 0x171F 1165*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_DISPCLK_DTO_CNTL 0x171E 1166*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_DS_CNTL 0x1715 1167*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_FB_DIV 0x1711 1168*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_IDCLK_CNTL 0x1716 1169*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_POST_DIV 0x1712 1170*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_REF_DIV 0x1710 1171*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_SS_AMOUNT_DSFRAC 0x1713 1172*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_SS_CNTL 0x1714 1173*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_UNLOCK_DETECT_CNTL 0x171A 1174*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_UPDATE_CNTL 0x171D 1175*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_UPDATE_LOCK 0x171C 1176*b843c749SSergey Zigachev #define mmDCCG_PLL1_PLL_VREG_CNTL 0x1719 1177*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_ANALOG 0x1728 1178*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_CNTL 0x1727 1179*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_DEBUG_CNTL 0x172B 1180*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_DISPCLK_CURRENT_DTO_PHASE 0x172F 1181*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_DISPCLK_DTO_CNTL 0x172E 1182*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_DS_CNTL 0x1725 1183*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_FB_DIV 0x1721 1184*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_IDCLK_CNTL 0x1726 1185*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_POST_DIV 0x1722 1186*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_REF_DIV 0x1720 1187*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_SS_AMOUNT_DSFRAC 0x1723 1188*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_SS_CNTL 0x1724 1189*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_UNLOCK_DETECT_CNTL 0x172A 1190*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_UPDATE_CNTL 0x172D 1191*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_UPDATE_LOCK 0x172C 1192*b843c749SSergey Zigachev #define mmDCCG_PLL2_PLL_VREG_CNTL 0x1729 1193*b843c749SSergey Zigachev #define mmDCCG_SOFT_RESET 0x015F 1194*b843c749SSergey Zigachev #define mmDCCG_TEST_CLK_SEL 0x017E 1195*b843c749SSergey Zigachev #define mmDCCG_TEST_DEBUG_DATA 0x017D 1196*b843c749SSergey Zigachev #define mmDCCG_TEST_DEBUG_INDEX 0x017C 1197*b843c749SSergey Zigachev #define mmDCCG_VPCLK_CNTL 0x031F 1198*b843c749SSergey Zigachev #define mmDCDEBUG_BUS_CLK1_SEL 0x1860 1199*b843c749SSergey Zigachev #define mmDCDEBUG_BUS_CLK2_SEL 0x1861 1200*b843c749SSergey Zigachev #define mmDCDEBUG_BUS_CLK3_SEL 0x1862 1201*b843c749SSergey Zigachev #define mmDCDEBUG_BUS_CLK4_SEL 0x1863 1202*b843c749SSergey Zigachev #define mmDCDEBUG_OUT_CNTL 0x186B 1203*b843c749SSergey Zigachev #define mmDCDEBUG_OUT_DATA 0x186E 1204*b843c749SSergey Zigachev #define mmDCDEBUG_OUT_PIN_OVERRIDE 0x186A 1205*b843c749SSergey Zigachev #define mmDC_DMCU_SCRATCH 0x1618 1206*b843c749SSergey Zigachev #define mmDC_DVODATA_CONFIG 0x1905 1207*b843c749SSergey Zigachev #define mmDCFE0_SOFT_RESET 0x0158 1208*b843c749SSergey Zigachev #define mmDCFE1_SOFT_RESET 0x0159 1209*b843c749SSergey Zigachev #define mmDCFE2_SOFT_RESET 0x015A 1210*b843c749SSergey Zigachev #define mmDCFE3_SOFT_RESET 0x015B 1211*b843c749SSergey Zigachev #define mmDCFE4_SOFT_RESET 0x015C 1212*b843c749SSergey Zigachev #define mmDCFE5_SOFT_RESET 0x015D 1213*b843c749SSergey Zigachev #define mmDCFE_DBG_SEL 0x1B7E 1214*b843c749SSergey Zigachev #define mmDCFE_MEM_LIGHT_SLEEP_CNTL 0x1B7F 1215*b843c749SSergey Zigachev #define mmDC_GENERICA 0x1900 1216*b843c749SSergey Zigachev #define mmDC_GENERICB 0x1901 1217*b843c749SSergey Zigachev #define mmDC_GPIO_DDC1_A 0x194D 1218*b843c749SSergey Zigachev #define mmDC_GPIO_DDC1_EN 0x194E 1219*b843c749SSergey Zigachev #define mmDC_GPIO_DDC1_MASK 0x194C 1220*b843c749SSergey Zigachev #define mmDC_GPIO_DDC1_Y 0x194F 1221*b843c749SSergey Zigachev #define mmDC_GPIO_DDC2_A 0x1951 1222*b843c749SSergey Zigachev #define mmDC_GPIO_DDC2_EN 0x1952 1223*b843c749SSergey Zigachev #define mmDC_GPIO_DDC2_MASK 0x1950 1224*b843c749SSergey Zigachev #define mmDC_GPIO_DDC2_Y 0x1953 1225*b843c749SSergey Zigachev #define mmDC_GPIO_DDC3_A 0x1955 1226*b843c749SSergey Zigachev #define mmDC_GPIO_DDC3_EN 0x1956 1227*b843c749SSergey Zigachev #define mmDC_GPIO_DDC3_MASK 0x1954 1228*b843c749SSergey Zigachev #define mmDC_GPIO_DDC3_Y 0x1957 1229*b843c749SSergey Zigachev #define mmDC_GPIO_DDC4_A 0x1959 1230*b843c749SSergey Zigachev #define mmDC_GPIO_DDC4_EN 0x195A 1231*b843c749SSergey Zigachev #define mmDC_GPIO_DDC4_MASK 0x1958 1232*b843c749SSergey Zigachev #define mmDC_GPIO_DDC4_Y 0x195B 1233*b843c749SSergey Zigachev #define mmDC_GPIO_DDC5_A 0x195D 1234*b843c749SSergey Zigachev #define mmDC_GPIO_DDC5_EN 0x195E 1235*b843c749SSergey Zigachev #define mmDC_GPIO_DDC5_MASK 0x195C 1236*b843c749SSergey Zigachev #define mmDC_GPIO_DDC5_Y 0x195F 1237*b843c749SSergey Zigachev #define mmDC_GPIO_DDC6_A 0x1961 1238*b843c749SSergey Zigachev #define mmDC_GPIO_DDC6_EN 0x1962 1239*b843c749SSergey Zigachev #define mmDC_GPIO_DDC6_MASK 0x1960 1240*b843c749SSergey Zigachev #define mmDC_GPIO_DDC6_Y 0x1963 1241*b843c749SSergey Zigachev #define mmDC_GPIO_DDCVGA_A 0x1971 1242*b843c749SSergey Zigachev #define mmDC_GPIO_DDCVGA_EN 0x1972 1243*b843c749SSergey Zigachev #define mmDC_GPIO_DDCVGA_MASK 0x1970 1244*b843c749SSergey Zigachev #define mmDC_GPIO_DDCVGA_Y 0x1973 1245*b843c749SSergey Zigachev #define mmDC_GPIO_DEBUG 0x1904 1246*b843c749SSergey Zigachev #define mmDC_GPIO_DVODATA_A 0x1949 1247*b843c749SSergey Zigachev #define mmDC_GPIO_DVODATA_EN 0x194A 1248*b843c749SSergey Zigachev #define mmDC_GPIO_DVODATA_MASK 0x1948 1249*b843c749SSergey Zigachev #define mmDC_GPIO_DVODATA_Y 0x194B 1250*b843c749SSergey Zigachev #define mmDC_GPIO_GENERIC_A 0x1945 1251*b843c749SSergey Zigachev #define mmDC_GPIO_GENERIC_EN 0x1946 1252*b843c749SSergey Zigachev #define mmDC_GPIO_GENERIC_MASK 0x1944 1253*b843c749SSergey Zigachev #define mmDC_GPIO_GENERIC_Y 0x1947 1254*b843c749SSergey Zigachev #define mmDC_GPIO_GENLK_A 0x1969 1255*b843c749SSergey Zigachev #define mmDC_GPIO_GENLK_EN 0x196A 1256*b843c749SSergey Zigachev #define mmDC_GPIO_GENLK_MASK 0x1968 1257*b843c749SSergey Zigachev #define mmDC_GPIO_GENLK_Y 0x196B 1258*b843c749SSergey Zigachev #define mmDC_GPIO_HPD_A 0x196D 1259*b843c749SSergey Zigachev #define mmDC_GPIO_HPD_EN 0x196E 1260*b843c749SSergey Zigachev #define mmDC_GPIO_HPD_MASK 0x196C 1261*b843c749SSergey Zigachev #define mmDC_GPIO_HPD_Y 0x196F 1262*b843c749SSergey Zigachev #define mmDC_GPIO_I2CPAD_A 0x1975 1263*b843c749SSergey Zigachev #define mmDC_GPIO_I2CPAD_EN 0x1976 1264*b843c749SSergey Zigachev #define mmDC_GPIO_I2CPAD_MASK 0x1974 1265*b843c749SSergey Zigachev #define mmDC_GPIO_I2CPAD_STRENGTH 0x197A 1266*b843c749SSergey Zigachev #define mmDC_GPIO_I2CPAD_Y 0x1977 1267*b843c749SSergey Zigachev #define mmDC_GPIO_PAD_STRENGTH_1 0x1978 1268*b843c749SSergey Zigachev #define mmDC_GPIO_PAD_STRENGTH_2 0x1979 1269*b843c749SSergey Zigachev #define mmDC_GPIO_PWRSEQ_A 0x1941 1270*b843c749SSergey Zigachev #define mmDC_GPIO_PWRSEQ_EN 0x1942 1271*b843c749SSergey Zigachev #define mmDC_GPIO_PWRSEQ_MASK 0x1940 1272*b843c749SSergey Zigachev #define mmDC_GPIO_PWRSEQ_Y 0x1943 1273*b843c749SSergey Zigachev #define mmDC_GPIO_SYNCA_A 0x1965 1274*b843c749SSergey Zigachev #define mmDC_GPIO_SYNCA_EN 0x1966 1275*b843c749SSergey Zigachev #define mmDC_GPIO_SYNCA_MASK 0x1964 1276*b843c749SSergey Zigachev #define mmDC_GPIO_SYNCA_Y 0x1967 1277*b843c749SSergey Zigachev #define mmDC_GPU_TIMER_READ 0x1929 1278*b843c749SSergey Zigachev #define mmDC_GPU_TIMER_READ_CNTL 0x192A 1279*b843c749SSergey Zigachev #define mmDC_GPU_TIMER_START_POSITION_P_FLIP 0x1928 1280*b843c749SSergey Zigachev #define mmDC_GPU_TIMER_START_POSITION_V_UPDATE 0x1927 1281*b843c749SSergey Zigachev #define mmDC_HPD1_CONTROL 0x1809 1282*b843c749SSergey Zigachev #define mmDC_HPD1_FAST_TRAIN_CNTL 0x1864 1283*b843c749SSergey Zigachev #define mmDC_HPD1_INT_CONTROL 0x1808 1284*b843c749SSergey Zigachev #define mmDC_HPD1_INT_STATUS 0x1807 1285*b843c749SSergey Zigachev #define mmDC_HPD1_TOGGLE_FILT_CNTL 0x18BC 1286*b843c749SSergey Zigachev #define mmDC_HPD2_CONTROL 0x180C 1287*b843c749SSergey Zigachev #define mmDC_HPD2_FAST_TRAIN_CNTL 0x1865 1288*b843c749SSergey Zigachev #define mmDC_HPD2_INT_CONTROL 0x180B 1289*b843c749SSergey Zigachev #define mmDC_HPD2_INT_STATUS 0x180A 1290*b843c749SSergey Zigachev #define mmDC_HPD2_TOGGLE_FILT_CNTL 0x18BD 1291*b843c749SSergey Zigachev #define mmDC_HPD3_CONTROL 0x180F 1292*b843c749SSergey Zigachev #define mmDC_HPD3_FAST_TRAIN_CNTL 0x1866 1293*b843c749SSergey Zigachev #define mmDC_HPD3_INT_CONTROL 0x180E 1294*b843c749SSergey Zigachev #define mmDC_HPD3_INT_STATUS 0x180D 1295*b843c749SSergey Zigachev #define mmDC_HPD3_TOGGLE_FILT_CNTL 0x18BE 1296*b843c749SSergey Zigachev #define mmDC_HPD4_CONTROL 0x1812 1297*b843c749SSergey Zigachev #define mmDC_HPD4_FAST_TRAIN_CNTL 0x1867 1298*b843c749SSergey Zigachev #define mmDC_HPD4_INT_CONTROL 0x1811 1299*b843c749SSergey Zigachev #define mmDC_HPD4_INT_STATUS 0x1810 1300*b843c749SSergey Zigachev #define mmDC_HPD4_TOGGLE_FILT_CNTL 0x18FC 1301*b843c749SSergey Zigachev #define mmDC_HPD5_CONTROL 0x1815 1302*b843c749SSergey Zigachev #define mmDC_HPD5_FAST_TRAIN_CNTL 0x1868 1303*b843c749SSergey Zigachev #define mmDC_HPD5_INT_CONTROL 0x1814 1304*b843c749SSergey Zigachev #define mmDC_HPD5_INT_STATUS 0x1813 1305*b843c749SSergey Zigachev #define mmDC_HPD5_TOGGLE_FILT_CNTL 0x18FD 1306*b843c749SSergey Zigachev #define mmDC_HPD6_CONTROL 0x1818 1307*b843c749SSergey Zigachev #define mmDC_HPD6_FAST_TRAIN_CNTL 0x1869 1308*b843c749SSergey Zigachev #define mmDC_HPD6_INT_CONTROL 0x1817 1309*b843c749SSergey Zigachev #define mmDC_HPD6_INT_STATUS 0x1816 1310*b843c749SSergey Zigachev #define mmDC_HPD6_TOGGLE_FILT_CNTL 0x18FE 1311*b843c749SSergey Zigachev #define mmDC_I2C_ARBITRATION 0x181A 1312*b843c749SSergey Zigachev #define mmDC_I2C_CONTROL 0x1819 1313*b843c749SSergey Zigachev #define mmDC_I2C_DATA 0x1833 1314*b843c749SSergey Zigachev #define mmDC_I2C_DDC1_HW_STATUS 0x181D 1315*b843c749SSergey Zigachev #define mmDC_I2C_DDC1_SETUP 0x1824 1316*b843c749SSergey Zigachev #define mmDC_I2C_DDC1_SPEED 0x1823 1317*b843c749SSergey Zigachev #define mmDC_I2C_DDC2_HW_STATUS 0x181E 1318*b843c749SSergey Zigachev #define mmDC_I2C_DDC2_SETUP 0x1826 1319*b843c749SSergey Zigachev #define mmDC_I2C_DDC2_SPEED 0x1825 1320*b843c749SSergey Zigachev #define mmDC_I2C_DDC3_HW_STATUS 0x181F 1321*b843c749SSergey Zigachev #define mmDC_I2C_DDC3_SETUP 0x1828 1322*b843c749SSergey Zigachev #define mmDC_I2C_DDC3_SPEED 0x1827 1323*b843c749SSergey Zigachev #define mmDC_I2C_DDC4_HW_STATUS 0x1820 1324*b843c749SSergey Zigachev #define mmDC_I2C_DDC4_SETUP 0x182A 1325*b843c749SSergey Zigachev #define mmDC_I2C_DDC4_SPEED 0x1829 1326*b843c749SSergey Zigachev #define mmDC_I2C_DDC5_HW_STATUS 0x1821 1327*b843c749SSergey Zigachev #define mmDC_I2C_DDC5_SETUP 0x182C 1328*b843c749SSergey Zigachev #define mmDC_I2C_DDC5_SPEED 0x182B 1329*b843c749SSergey Zigachev #define mmDC_I2C_DDC6_HW_STATUS 0x1822 1330*b843c749SSergey Zigachev #define mmDC_I2C_DDC6_SETUP 0x182E 1331*b843c749SSergey Zigachev #define mmDC_I2C_DDC6_SPEED 0x182D 1332*b843c749SSergey Zigachev #define mmDC_I2C_DDCVGA_HW_STATUS 0x1855 1333*b843c749SSergey Zigachev #define mmDC_I2C_DDCVGA_SETUP 0x1857 1334*b843c749SSergey Zigachev #define mmDC_I2C_DDCVGA_SPEED 0x1856 1335*b843c749SSergey Zigachev #define mmDC_I2C_EDID_DETECT_CTRL 0x186F 1336*b843c749SSergey Zigachev #define mmDC_I2C_INTERRUPT_CONTROL 0x181B 1337*b843c749SSergey Zigachev #define mmDC_I2C_SW_STATUS 0x181C 1338*b843c749SSergey Zigachev #define mmDC_I2C_TRANSACTION0 0x182F 1339*b843c749SSergey Zigachev #define mmDC_I2C_TRANSACTION1 0x1830 1340*b843c749SSergey Zigachev #define mmDC_I2C_TRANSACTION2 0x1831 1341*b843c749SSergey Zigachev #define mmDC_I2C_TRANSACTION3 0x1832 1342*b843c749SSergey Zigachev #define mmDCI_CLK_CNTL 0x031E 1343*b843c749SSergey Zigachev #define mmDCI_CLK_RAMP_CNTL 0x0324 1344*b843c749SSergey Zigachev #define mmDCI_DEBUG_CONFIG 0x0323 1345*b843c749SSergey Zigachev #define mmDCI_MEM_PWR_CNTL 0x0326 1346*b843c749SSergey Zigachev #define mmDCI_MEM_PWR_STATE 0x031B 1347*b843c749SSergey Zigachev #define mmDCI_MEM_PWR_STATE2 0x0322 1348*b843c749SSergey Zigachev #define mmDCIO_DEBUG 0x192E 1349*b843c749SSergey Zigachev #define mmDCIO_GSL0_CNTL 0x1924 1350*b843c749SSergey Zigachev #define mmDCIO_GSL1_CNTL 0x1925 1351*b843c749SSergey Zigachev #define mmDCIO_GSL2_CNTL 0x1926 1352*b843c749SSergey Zigachev #define mmDCIO_GSL_GENLK_PAD_CNTL 0x1922 1353*b843c749SSergey Zigachev #define mmDCIO_GSL_SWAPLOCK_PAD_CNTL 0x1923 1354*b843c749SSergey Zigachev #define mmDCIO_IMPCAL_CNTL_AB 0x190D 1355*b843c749SSergey Zigachev #define mmDCIO_IMPCAL_CNTL_CD 0x1911 1356*b843c749SSergey Zigachev #define mmDCIO_IMPCAL_CNTL_EF 0x1915 1357*b843c749SSergey Zigachev #define mmDCIO_TEST_DEBUG_DATA 0x1930 1358*b843c749SSergey Zigachev #define mmDCIO_TEST_DEBUG_INDEX 0x192F 1359*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_ANG_BIST_CNTL 0x198C 1360*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_CHANNEL_XBAR_CNTL 0x198E 1361*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_DATA_SYNCHRONIZATION 0x198A 1362*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_LINK_CNTL 0x198D 1363*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_PLL_CONTROL1 0x1986 1364*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_PLL_CONTROL2 0x1987 1365*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_PLL_FBDIV 0x1985 1366*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_PLL_SS_CNTL 0x1989 1367*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_PLL_SS_STEP_SIZE 0x1988 1368*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_POWER_CONTROL 0x1984 1369*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_REG_TEST_OUTPUT 0x198B 1370*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_TX_CONTROL1 0x1980 1371*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_TX_CONTROL2 0x1981 1372*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_TX_CONTROL3 0x1982 1373*b843c749SSergey Zigachev #define mmDCIO_UNIPHY0_UNIPHY_TX_CONTROL4 0x1983 1374*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_ANG_BIST_CNTL 0x199C 1375*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_CHANNEL_XBAR_CNTL 0x199E 1376*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_DATA_SYNCHRONIZATION 0x199A 1377*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_LINK_CNTL 0x199D 1378*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_PLL_CONTROL1 0x1996 1379*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_PLL_CONTROL2 0x1997 1380*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_PLL_FBDIV 0x1995 1381*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_PLL_SS_CNTL 0x1999 1382*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_PLL_SS_STEP_SIZE 0x1998 1383*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_POWER_CONTROL 0x1994 1384*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_REG_TEST_OUTPUT 0x199B 1385*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_TX_CONTROL1 0x1990 1386*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_TX_CONTROL2 0x1991 1387*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_TX_CONTROL3 0x1992 1388*b843c749SSergey Zigachev #define mmDCIO_UNIPHY1_UNIPHY_TX_CONTROL4 0x1993 1389*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_ANG_BIST_CNTL 0x19AC 1390*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_CHANNEL_XBAR_CNTL 0x19AE 1391*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_DATA_SYNCHRONIZATION 0x19AA 1392*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_LINK_CNTL 0x19AD 1393*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_PLL_CONTROL1 0x19A6 1394*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_PLL_CONTROL2 0x19A7 1395*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_PLL_FBDIV 0x19A5 1396*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_PLL_SS_CNTL 0x19A9 1397*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_PLL_SS_STEP_SIZE 0x19A8 1398*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_POWER_CONTROL 0x19A4 1399*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_REG_TEST_OUTPUT 0x19AB 1400*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_TX_CONTROL1 0x19A0 1401*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_TX_CONTROL2 0x19A1 1402*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_TX_CONTROL3 0x19A2 1403*b843c749SSergey Zigachev #define mmDCIO_UNIPHY2_UNIPHY_TX_CONTROL4 0x19A3 1404*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_ANG_BIST_CNTL 0x19BC 1405*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_CHANNEL_XBAR_CNTL 0x19BE 1406*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_DATA_SYNCHRONIZATION 0x19BA 1407*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_LINK_CNTL 0x19BD 1408*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_PLL_CONTROL1 0x19B6 1409*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_PLL_CONTROL2 0x19B7 1410*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_PLL_FBDIV 0x19B5 1411*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_PLL_SS_CNTL 0x19B9 1412*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_PLL_SS_STEP_SIZE 0x19B8 1413*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_POWER_CONTROL 0x19B4 1414*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_REG_TEST_OUTPUT 0x19BB 1415*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_TX_CONTROL1 0x19B0 1416*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_TX_CONTROL2 0x19B1 1417*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_TX_CONTROL3 0x19B2 1418*b843c749SSergey Zigachev #define mmDCIO_UNIPHY3_UNIPHY_TX_CONTROL4 0x19B3 1419*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_ANG_BIST_CNTL 0x19CC 1420*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_CHANNEL_XBAR_CNTL 0x19CE 1421*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_DATA_SYNCHRONIZATION 0x19CA 1422*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_LINK_CNTL 0x19CD 1423*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_PLL_CONTROL1 0x19C6 1424*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_PLL_CONTROL2 0x19C7 1425*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_PLL_FBDIV 0x19C5 1426*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_PLL_SS_CNTL 0x19C9 1427*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_PLL_SS_STEP_SIZE 0x19C8 1428*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_POWER_CONTROL 0x19C4 1429*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_REG_TEST_OUTPUT 0x19CB 1430*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_TX_CONTROL1 0x19C0 1431*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_TX_CONTROL2 0x19C1 1432*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_TX_CONTROL3 0x19C2 1433*b843c749SSergey Zigachev #define mmDCIO_UNIPHY4_UNIPHY_TX_CONTROL4 0x19C3 1434*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_ANG_BIST_CNTL 0x19DC 1435*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_CHANNEL_XBAR_CNTL 0x19DE 1436*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_DATA_SYNCHRONIZATION 0x19DA 1437*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_LINK_CNTL 0x19DD 1438*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_PLL_CONTROL1 0x19D6 1439*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_PLL_CONTROL2 0x19D7 1440*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_PLL_FBDIV 0x19D5 1441*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_PLL_SS_CNTL 0x19D9 1442*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_PLL_SS_STEP_SIZE 0x19D8 1443*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_POWER_CONTROL 0x19D4 1444*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_REG_TEST_OUTPUT 0x19DB 1445*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_TX_CONTROL1 0x19D0 1446*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_TX_CONTROL2 0x19D1 1447*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_TX_CONTROL3 0x19D2 1448*b843c749SSergey Zigachev #define mmDCIO_UNIPHY5_UNIPHY_TX_CONTROL4 0x19D3 1449*b843c749SSergey Zigachev #define mmDCI_SOFT_RESET 0x015E 1450*b843c749SSergey Zigachev #define mmDCI_TEST_DEBUG_DATA 0x0321 1451*b843c749SSergey Zigachev #define mmDCI_TEST_DEBUG_INDEX 0x0320 1452*b843c749SSergey Zigachev #define mmDC_LUT_30_COLOR 0x1A7C 1453*b843c749SSergey Zigachev #define mmDC_LUT_AUTOFILL 0x1A7F 1454*b843c749SSergey Zigachev #define mmDC_LUT_BLACK_OFFSET_BLUE 0x1A81 1455*b843c749SSergey Zigachev #define mmDC_LUT_BLACK_OFFSET_GREEN 0x1A82 1456*b843c749SSergey Zigachev #define mmDC_LUT_BLACK_OFFSET_RED 0x1A83 1457*b843c749SSergey Zigachev #define mmDC_LUT_CONTROL 0x1A80 1458*b843c749SSergey Zigachev #define mmDC_LUT_PWL_DATA 0x1A7B 1459*b843c749SSergey Zigachev #define mmDC_LUT_RW_INDEX 0x1A79 1460*b843c749SSergey Zigachev #define mmDC_LUT_RW_MODE 0x1A78 1461*b843c749SSergey Zigachev #define mmDC_LUT_SEQ_COLOR 0x1A7A 1462*b843c749SSergey Zigachev #define mmDC_LUT_VGA_ACCESS_ENABLE 0x1A7D 1463*b843c749SSergey Zigachev #define mmDC_LUT_WHITE_OFFSET_BLUE 0x1A84 1464*b843c749SSergey Zigachev #define mmDC_LUT_WHITE_OFFSET_GREEN 0x1A85 1465*b843c749SSergey Zigachev #define mmDC_LUT_WHITE_OFFSET_RED 0x1A86 1466*b843c749SSergey Zigachev #define mmDC_LUT_WRITE_EN_MASK 0x1A7E 1467*b843c749SSergey Zigachev #define mmDC_MVP_LB_CONTROL 0x1ADB 1468*b843c749SSergey Zigachev #define mmDCO_CLK_CNTL 0x192B 1469*b843c749SSergey Zigachev #define mmDCO_CLK_RAMP_CNTL 0x192C 1470*b843c749SSergey Zigachev #define mmDCO_LIGHT_SLEEP_DIS 0x1907 1471*b843c749SSergey Zigachev #define mmDCO_MEM_POWER_STATE 0x1906 1472*b843c749SSergey Zigachev #define mmDCO_SOFT_RESET 0x0167 1473*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C11_C12 0x1A43 1474*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C13_C14 0x1A44 1475*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C21_C22 0x1A45 1476*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C23_C24 0x1A46 1477*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C31_C32 0x1A47 1478*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXA_TRANS_C33_C34 0x1A48 1479*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C11_C12 0x1A49 1480*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C13_C14 0x1A4A 1481*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C21_C22 0x1A4B 1482*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C23_C24 0x1A4C 1483*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C31_C32 0x1A4D 1484*b843c749SSergey Zigachev #define mmDCP0_COMM_MATRIXB_TRANS_C33_C34 0x1A4E 1485*b843c749SSergey Zigachev #define mmDCP0_CUR_COLOR1 0x1A6C 1486*b843c749SSergey Zigachev #define mmDCP0_CUR_COLOR2 0x1A6D 1487*b843c749SSergey Zigachev #define mmDCP0_CUR_CONTROL 0x1A66 1488*b843c749SSergey Zigachev #define mmDCP0_CUR_HOT_SPOT 0x1A6B 1489*b843c749SSergey Zigachev #define mmDCP0_CUR_POSITION 0x1A6A 1490*b843c749SSergey Zigachev #define mmDCP0_CUR_REQUEST_FILTER_CNTL 0x1A99 1491*b843c749SSergey Zigachev #define mmDCP0_CUR_SIZE 0x1A68 1492*b843c749SSergey Zigachev #define mmDCP0_CUR_SURFACE_ADDRESS 0x1A67 1493*b843c749SSergey Zigachev #define mmDCP0_CUR_SURFACE_ADDRESS_HIGH 0x1A69 1494*b843c749SSergey Zigachev #define mmDCP0_CUR_UPDATE 0x1A6E 1495*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_30_COLOR 0x1A7C 1496*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_AUTOFILL 0x1A7F 1497*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_BLACK_OFFSET_BLUE 0x1A81 1498*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_BLACK_OFFSET_GREEN 0x1A82 1499*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_BLACK_OFFSET_RED 0x1A83 1500*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_CONTROL 0x1A80 1501*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_PWL_DATA 0x1A7B 1502*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_RW_INDEX 0x1A79 1503*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_RW_MODE 0x1A78 1504*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_SEQ_COLOR 0x1A7A 1505*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_VGA_ACCESS_ENABLE 0x1A7D 1506*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_WHITE_OFFSET_BLUE 0x1A84 1507*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_WHITE_OFFSET_GREEN 0x1A85 1508*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_WHITE_OFFSET_RED 0x1A86 1509*b843c749SSergey Zigachev #define mmDCP0_DC_LUT_WRITE_EN_MASK 0x1A7E 1510*b843c749SSergey Zigachev #define mmDCP0_DCP_CRC_CONTROL 0x1A87 1511*b843c749SSergey Zigachev #define mmDCP0_DCP_CRC_CURRENT 0x1A89 1512*b843c749SSergey Zigachev #define mmDCP0_DCP_CRC_LAST 0x1A8B 1513*b843c749SSergey Zigachev #define mmDCP0_DCP_CRC_MASK 0x1A88 1514*b843c749SSergey Zigachev #define mmDCP0_DCP_DEBUG 0x1A8D 1515*b843c749SSergey Zigachev #define mmDCP0_DCP_DEBUG2 0x1A98 1516*b843c749SSergey Zigachev #define mmDCP0_DCP_FP_CONVERTED_FIELD 0x1A65 1517*b843c749SSergey Zigachev #define mmDCP0_DCP_GSL_CONTROL 0x1A90 1518*b843c749SSergey Zigachev #define mmDCP0_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x1A91 1519*b843c749SSergey Zigachev #define mmDCP0_DCP_RANDOM_SEEDS 0x1A61 1520*b843c749SSergey Zigachev #define mmDCP0_DCP_SPATIAL_DITHER_CNTL 0x1A60 1521*b843c749SSergey Zigachev #define mmDCP0_DCP_TEST_DEBUG_DATA 0x1A96 1522*b843c749SSergey Zigachev #define mmDCP0_DCP_TEST_DEBUG_INDEX 0x1A95 1523*b843c749SSergey Zigachev #define mmDCP0_DEGAMMA_CONTROL 0x1A58 1524*b843c749SSergey Zigachev #define mmDCP0_DENORM_CONTROL 0x1A50 1525*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C11_C12 0x1A5A 1526*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C13_C14 0x1A5B 1527*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C21_C22 0x1A5C 1528*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C23_C24 0x1A5D 1529*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C31_C32 0x1A5E 1530*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_C33_C34 0x1A5F 1531*b843c749SSergey Zigachev #define mmDCP0_GAMUT_REMAP_CONTROL 0x1A59 1532*b843c749SSergey Zigachev #define mmDCP0_GRPH_COMPRESS_PITCH 0x1A1A 1533*b843c749SSergey Zigachev #define mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS 0x1A19 1534*b843c749SSergey Zigachev #define mmDCP0_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1A1B 1535*b843c749SSergey Zigachev #define mmDCP0_GRPH_CONTROL 0x1A01 1536*b843c749SSergey Zigachev #define mmDCP0_GRPH_DFQ_CONTROL 0x1A14 1537*b843c749SSergey Zigachev #define mmDCP0_GRPH_DFQ_STATUS 0x1A15 1538*b843c749SSergey Zigachev #define mmDCP0_GRPH_ENABLE 0x1A00 1539*b843c749SSergey Zigachev #define mmDCP0_GRPH_FLIP_CONTROL 0x1A12 1540*b843c749SSergey Zigachev #define mmDCP0_GRPH_INTERRUPT_CONTROL 0x1A17 1541*b843c749SSergey Zigachev #define mmDCP0_GRPH_INTERRUPT_STATUS 0x1A16 1542*b843c749SSergey Zigachev #define mmDCP0_GRPH_LUT_10BIT_BYPASS 0x1A02 1543*b843c749SSergey Zigachev #define mmDCP0_GRPH_PITCH 0x1A06 1544*b843c749SSergey Zigachev #define mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS 0x1A04 1545*b843c749SSergey Zigachev #define mmDCP0_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1A07 1546*b843c749SSergey Zigachev #define mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS 0x1A05 1547*b843c749SSergey Zigachev #define mmDCP0_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1A08 1548*b843c749SSergey Zigachev #define mmDCP0_GRPH_STEREOSYNC_FLIP 0x1A97 1549*b843c749SSergey Zigachev #define mmDCP0_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1A18 1550*b843c749SSergey Zigachev #define mmDCP0_GRPH_SURFACE_ADDRESS_INUSE 0x1A13 1551*b843c749SSergey Zigachev #define mmDCP0_GRPH_SURFACE_OFFSET_X 0x1A09 1552*b843c749SSergey Zigachev #define mmDCP0_GRPH_SURFACE_OFFSET_Y 0x1A0A 1553*b843c749SSergey Zigachev #define mmDCP0_GRPH_SWAP_CNTL 0x1A03 1554*b843c749SSergey Zigachev #define mmDCP0_GRPH_UPDATE 0x1A11 1555*b843c749SSergey Zigachev #define mmDCP0_GRPH_X_END 0x1A0D 1556*b843c749SSergey Zigachev #define mmDCP0_GRPH_X_START 0x1A0B 1557*b843c749SSergey Zigachev #define mmDCP0_GRPH_Y_END 0x1A0E 1558*b843c749SSergey Zigachev #define mmDCP0_GRPH_Y_START 0x1A0C 1559*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C11_C12 0x1A36 1560*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C13_C14 0x1A37 1561*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C21_C22 0x1A38 1562*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C23_C24 0x1A39 1563*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C31_C32 0x1A3A 1564*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_C33_C34 0x1A3B 1565*b843c749SSergey Zigachev #define mmDCP0_INPUT_CSC_CONTROL 0x1A35 1566*b843c749SSergey Zigachev #define mmDCP0_INPUT_GAMMA_CONTROL 0x1A10 1567*b843c749SSergey Zigachev #define mmDCP0_KEY_CONTROL 0x1A53 1568*b843c749SSergey Zigachev #define mmDCP0_KEY_RANGE_ALPHA 0x1A54 1569*b843c749SSergey Zigachev #define mmDCP0_KEY_RANGE_BLUE 0x1A57 1570*b843c749SSergey Zigachev #define mmDCP0_KEY_RANGE_GREEN 0x1A56 1571*b843c749SSergey Zigachev #define mmDCP0_KEY_RANGE_RED 0x1A55 1572*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C11_C12 0x1A3D 1573*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C13_C14 0x1A3E 1574*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C21_C22 0x1A3F 1575*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C23_C24 0x1A40 1576*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C31_C32 0x1A41 1577*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_C33_C34 0x1A42 1578*b843c749SSergey Zigachev #define mmDCP0_OUTPUT_CSC_CONTROL 0x1A3C 1579*b843c749SSergey Zigachev #define mmDCP0_OUT_ROUND_CONTROL 0x1A51 1580*b843c749SSergey Zigachev #define mmDCP0_OVL_CONTROL1 0x1A1D 1581*b843c749SSergey Zigachev #define mmDCP0_OVL_CONTROL2 0x1A1E 1582*b843c749SSergey Zigachev #define mmDCP0_OVL_DFQ_CONTROL 0x1A29 1583*b843c749SSergey Zigachev #define mmDCP0_OVL_DFQ_STATUS 0x1A2A 1584*b843c749SSergey Zigachev #define mmDCP0_OVL_ENABLE 0x1A1C 1585*b843c749SSergey Zigachev #define mmDCP0_OVL_END 0x1A26 1586*b843c749SSergey Zigachev #define mmDCP0_OVL_PITCH 0x1A21 1587*b843c749SSergey Zigachev #define mmDCP0_OVLSCL_EDGE_PIXEL_CNTL 0x1A2C 1588*b843c749SSergey Zigachev #define mmDCP0_OVL_SECONDARY_SURFACE_ADDRESS 0x1A92 1589*b843c749SSergey Zigachev #define mmDCP0_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x1A94 1590*b843c749SSergey Zigachev #define mmDCP0_OVL_START 0x1A25 1591*b843c749SSergey Zigachev #define mmDCP0_OVL_STEREOSYNC_FLIP 0x1A93 1592*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_ADDRESS 0x1A20 1593*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_ADDRESS_HIGH 0x1A22 1594*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x1A2B 1595*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_ADDRESS_INUSE 0x1A28 1596*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_OFFSET_X 0x1A23 1597*b843c749SSergey Zigachev #define mmDCP0_OVL_SURFACE_OFFSET_Y 0x1A24 1598*b843c749SSergey Zigachev #define mmDCP0_OVL_SWAP_CNTL 0x1A1F 1599*b843c749SSergey Zigachev #define mmDCP0_OVL_UPDATE 0x1A27 1600*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_GRPH_CONTROL 0x1A2D 1601*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_OVL_CONTROL 0x1A31 1602*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_GRPH_B 0x1A30 1603*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_GRPH_G 0x1A2F 1604*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_GRPH_R 0x1A2E 1605*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_OVL_CB 0x1A32 1606*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_OVL_CR 0x1A34 1607*b843c749SSergey Zigachev #define mmDCP0_PRESCALE_VALUES_OVL_Y 0x1A33 1608*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_END_CNTL1 0x1AA6 1609*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_END_CNTL2 0x1AA7 1610*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_0_1 0x1AA8 1611*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_10_11 0x1AAD 1612*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_12_13 0x1AAE 1613*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_14_15 0x1AAF 1614*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_2_3 0x1AA9 1615*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_4_5 0x1AAA 1616*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_6_7 0x1AAB 1617*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_REGION_8_9 0x1AAC 1618*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_SLOPE_CNTL 0x1AA5 1619*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLA_START_CNTL 0x1AA4 1620*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_END_CNTL1 0x1AB2 1621*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_END_CNTL2 0x1AB3 1622*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_0_1 0x1AB4 1623*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_10_11 0x1AB9 1624*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_12_13 0x1ABA 1625*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_14_15 0x1ABB 1626*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_2_3 0x1AB5 1627*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_4_5 0x1AB6 1628*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_6_7 0x1AB7 1629*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_REGION_8_9 0x1AB8 1630*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_SLOPE_CNTL 0x1AB1 1631*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CNTLB_START_CNTL 0x1AB0 1632*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_CONTROL 0x1AA0 1633*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_LUT_DATA 0x1AA2 1634*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_LUT_INDEX 0x1AA1 1635*b843c749SSergey Zigachev #define mmDCP0_REGAMMA_LUT_WRITE_EN_MASK 0x1AA3 1636*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C11_C12 0x1D43 1637*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C13_C14 0x1D44 1638*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C21_C22 0x1D45 1639*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C23_C24 0x1D46 1640*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C31_C32 0x1D47 1641*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXA_TRANS_C33_C34 0x1D48 1642*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C11_C12 0x1D49 1643*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C13_C14 0x1D4A 1644*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C21_C22 0x1D4B 1645*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C23_C24 0x1D4C 1646*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C31_C32 0x1D4D 1647*b843c749SSergey Zigachev #define mmDCP1_COMM_MATRIXB_TRANS_C33_C34 0x1D4E 1648*b843c749SSergey Zigachev #define mmDCP1_CUR_COLOR1 0x1D6C 1649*b843c749SSergey Zigachev #define mmDCP1_CUR_COLOR2 0x1D6D 1650*b843c749SSergey Zigachev #define mmDCP1_CUR_CONTROL 0x1D66 1651*b843c749SSergey Zigachev #define mmDCP1_CUR_HOT_SPOT 0x1D6B 1652*b843c749SSergey Zigachev #define mmDCP1_CUR_POSITION 0x1D6A 1653*b843c749SSergey Zigachev #define mmDCP1_CUR_REQUEST_FILTER_CNTL 0x1D99 1654*b843c749SSergey Zigachev #define mmDCP1_CUR_SIZE 0x1D68 1655*b843c749SSergey Zigachev #define mmDCP1_CUR_SURFACE_ADDRESS 0x1D67 1656*b843c749SSergey Zigachev #define mmDCP1_CUR_SURFACE_ADDRESS_HIGH 0x1D69 1657*b843c749SSergey Zigachev #define mmDCP1_CUR_UPDATE 0x1D6E 1658*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_30_COLOR 0x1D7C 1659*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_AUTOFILL 0x1D7F 1660*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_BLACK_OFFSET_BLUE 0x1D81 1661*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_BLACK_OFFSET_GREEN 0x1D82 1662*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_BLACK_OFFSET_RED 0x1D83 1663*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_CONTROL 0x1D80 1664*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_PWL_DATA 0x1D7B 1665*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_RW_INDEX 0x1D79 1666*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_RW_MODE 0x1D78 1667*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_SEQ_COLOR 0x1D7A 1668*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_VGA_ACCESS_ENABLE 0x1D7D 1669*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_WHITE_OFFSET_BLUE 0x1D84 1670*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_WHITE_OFFSET_GREEN 0x1D85 1671*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_WHITE_OFFSET_RED 0x1D86 1672*b843c749SSergey Zigachev #define mmDCP1_DC_LUT_WRITE_EN_MASK 0x1D7E 1673*b843c749SSergey Zigachev #define mmDCP1_DCP_CRC_CONTROL 0x1D87 1674*b843c749SSergey Zigachev #define mmDCP1_DCP_CRC_CURRENT 0x1D89 1675*b843c749SSergey Zigachev #define mmDCP1_DCP_CRC_LAST 0x1D8B 1676*b843c749SSergey Zigachev #define mmDCP1_DCP_CRC_MASK 0x1D88 1677*b843c749SSergey Zigachev #define mmDCP1_DCP_DEBUG 0x1D8D 1678*b843c749SSergey Zigachev #define mmDCP1_DCP_DEBUG2 0x1D98 1679*b843c749SSergey Zigachev #define mmDCP1_DCP_FP_CONVERTED_FIELD 0x1D65 1680*b843c749SSergey Zigachev #define mmDCP1_DCP_GSL_CONTROL 0x1D90 1681*b843c749SSergey Zigachev #define mmDCP1_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x1D91 1682*b843c749SSergey Zigachev #define mmDCP1_DCP_RANDOM_SEEDS 0x1D61 1683*b843c749SSergey Zigachev #define mmDCP1_DCP_SPATIAL_DITHER_CNTL 0x1D60 1684*b843c749SSergey Zigachev #define mmDCP1_DCP_TEST_DEBUG_DATA 0x1D96 1685*b843c749SSergey Zigachev #define mmDCP1_DCP_TEST_DEBUG_INDEX 0x1D95 1686*b843c749SSergey Zigachev #define mmDCP1_DEGAMMA_CONTROL 0x1D58 1687*b843c749SSergey Zigachev #define mmDCP1_DENORM_CONTROL 0x1D50 1688*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C11_C12 0x1D5A 1689*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C13_C14 0x1D5B 1690*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C21_C22 0x1D5C 1691*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C23_C24 0x1D5D 1692*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C31_C32 0x1D5E 1693*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_C33_C34 0x1D5F 1694*b843c749SSergey Zigachev #define mmDCP1_GAMUT_REMAP_CONTROL 0x1D59 1695*b843c749SSergey Zigachev #define mmDCP1_GRPH_COMPRESS_PITCH 0x1D1A 1696*b843c749SSergey Zigachev #define mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS 0x1D19 1697*b843c749SSergey Zigachev #define mmDCP1_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1D1B 1698*b843c749SSergey Zigachev #define mmDCP1_GRPH_CONTROL 0x1D01 1699*b843c749SSergey Zigachev #define mmDCP1_GRPH_DFQ_CONTROL 0x1D14 1700*b843c749SSergey Zigachev #define mmDCP1_GRPH_DFQ_STATUS 0x1D15 1701*b843c749SSergey Zigachev #define mmDCP1_GRPH_ENABLE 0x1D00 1702*b843c749SSergey Zigachev #define mmDCP1_GRPH_FLIP_CONTROL 0x1D12 1703*b843c749SSergey Zigachev #define mmDCP1_GRPH_INTERRUPT_CONTROL 0x1D17 1704*b843c749SSergey Zigachev #define mmDCP1_GRPH_INTERRUPT_STATUS 0x1D16 1705*b843c749SSergey Zigachev #define mmDCP1_GRPH_LUT_10BIT_BYPASS 0x1D02 1706*b843c749SSergey Zigachev #define mmDCP1_GRPH_PITCH 0x1D06 1707*b843c749SSergey Zigachev #define mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS 0x1D04 1708*b843c749SSergey Zigachev #define mmDCP1_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1D07 1709*b843c749SSergey Zigachev #define mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS 0x1D05 1710*b843c749SSergey Zigachev #define mmDCP1_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1D08 1711*b843c749SSergey Zigachev #define mmDCP1_GRPH_STEREOSYNC_FLIP 0x1D97 1712*b843c749SSergey Zigachev #define mmDCP1_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1D18 1713*b843c749SSergey Zigachev #define mmDCP1_GRPH_SURFACE_ADDRESS_INUSE 0x1D13 1714*b843c749SSergey Zigachev #define mmDCP1_GRPH_SURFACE_OFFSET_X 0x1D09 1715*b843c749SSergey Zigachev #define mmDCP1_GRPH_SURFACE_OFFSET_Y 0x1D0A 1716*b843c749SSergey Zigachev #define mmDCP1_GRPH_SWAP_CNTL 0x1D03 1717*b843c749SSergey Zigachev #define mmDCP1_GRPH_UPDATE 0x1D11 1718*b843c749SSergey Zigachev #define mmDCP1_GRPH_X_END 0x1D0D 1719*b843c749SSergey Zigachev #define mmDCP1_GRPH_X_START 0x1D0B 1720*b843c749SSergey Zigachev #define mmDCP1_GRPH_Y_END 0x1D0E 1721*b843c749SSergey Zigachev #define mmDCP1_GRPH_Y_START 0x1D0C 1722*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C11_C12 0x1D36 1723*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C13_C14 0x1D37 1724*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C21_C22 0x1D38 1725*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C23_C24 0x1D39 1726*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C31_C32 0x1D3A 1727*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_C33_C34 0x1D3B 1728*b843c749SSergey Zigachev #define mmDCP1_INPUT_CSC_CONTROL 0x1D35 1729*b843c749SSergey Zigachev #define mmDCP1_INPUT_GAMMA_CONTROL 0x1D10 1730*b843c749SSergey Zigachev #define mmDCP1_KEY_CONTROL 0x1D53 1731*b843c749SSergey Zigachev #define mmDCP1_KEY_RANGE_ALPHA 0x1D54 1732*b843c749SSergey Zigachev #define mmDCP1_KEY_RANGE_BLUE 0x1D57 1733*b843c749SSergey Zigachev #define mmDCP1_KEY_RANGE_GREEN 0x1D56 1734*b843c749SSergey Zigachev #define mmDCP1_KEY_RANGE_RED 0x1D55 1735*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C11_C12 0x1D3D 1736*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C13_C14 0x1D3E 1737*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C21_C22 0x1D3F 1738*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C23_C24 0x1D40 1739*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C31_C32 0x1D41 1740*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_C33_C34 0x1D42 1741*b843c749SSergey Zigachev #define mmDCP1_OUTPUT_CSC_CONTROL 0x1D3C 1742*b843c749SSergey Zigachev #define mmDCP1_OUT_ROUND_CONTROL 0x1D51 1743*b843c749SSergey Zigachev #define mmDCP1_OVL_CONTROL1 0x1D1D 1744*b843c749SSergey Zigachev #define mmDCP1_OVL_CONTROL2 0x1D1E 1745*b843c749SSergey Zigachev #define mmDCP1_OVL_DFQ_CONTROL 0x1D29 1746*b843c749SSergey Zigachev #define mmDCP1_OVL_DFQ_STATUS 0x1D2A 1747*b843c749SSergey Zigachev #define mmDCP1_OVL_ENABLE 0x1D1C 1748*b843c749SSergey Zigachev #define mmDCP1_OVL_END 0x1D26 1749*b843c749SSergey Zigachev #define mmDCP1_OVL_PITCH 0x1D21 1750*b843c749SSergey Zigachev #define mmDCP1_OVLSCL_EDGE_PIXEL_CNTL 0x1D2C 1751*b843c749SSergey Zigachev #define mmDCP1_OVL_SECONDARY_SURFACE_ADDRESS 0x1D92 1752*b843c749SSergey Zigachev #define mmDCP1_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x1D94 1753*b843c749SSergey Zigachev #define mmDCP1_OVL_START 0x1D25 1754*b843c749SSergey Zigachev #define mmDCP1_OVL_STEREOSYNC_FLIP 0x1D93 1755*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_ADDRESS 0x1D20 1756*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_ADDRESS_HIGH 0x1D22 1757*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x1D2B 1758*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_ADDRESS_INUSE 0x1D28 1759*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_OFFSET_X 0x1D23 1760*b843c749SSergey Zigachev #define mmDCP1_OVL_SURFACE_OFFSET_Y 0x1D24 1761*b843c749SSergey Zigachev #define mmDCP1_OVL_SWAP_CNTL 0x1D1F 1762*b843c749SSergey Zigachev #define mmDCP1_OVL_UPDATE 0x1D27 1763*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_GRPH_CONTROL 0x1D2D 1764*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_OVL_CONTROL 0x1D31 1765*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_GRPH_B 0x1D30 1766*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_GRPH_G 0x1D2F 1767*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_GRPH_R 0x1D2E 1768*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_OVL_CB 0x1D32 1769*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_OVL_CR 0x1D34 1770*b843c749SSergey Zigachev #define mmDCP1_PRESCALE_VALUES_OVL_Y 0x1D33 1771*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_END_CNTL1 0x1DA6 1772*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_END_CNTL2 0x1DA7 1773*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_0_1 0x1DA8 1774*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_10_11 0x1DAD 1775*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_12_13 0x1DAE 1776*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_14_15 0x1DAF 1777*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_2_3 0x1DA9 1778*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_4_5 0x1DAA 1779*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_6_7 0x1DAB 1780*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_REGION_8_9 0x1DAC 1781*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_SLOPE_CNTL 0x1DA5 1782*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLA_START_CNTL 0x1DA4 1783*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_END_CNTL1 0x1DB2 1784*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_END_CNTL2 0x1DB3 1785*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_0_1 0x1DB4 1786*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_10_11 0x1DB9 1787*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_12_13 0x1DBA 1788*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_14_15 0x1DBB 1789*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_2_3 0x1DB5 1790*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_4_5 0x1DB6 1791*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_6_7 0x1DB7 1792*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_REGION_8_9 0x1DB8 1793*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_SLOPE_CNTL 0x1DB1 1794*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CNTLB_START_CNTL 0x1DB0 1795*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_CONTROL 0x1DA0 1796*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_LUT_DATA 0x1DA2 1797*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_LUT_INDEX 0x1DA1 1798*b843c749SSergey Zigachev #define mmDCP1_REGAMMA_LUT_WRITE_EN_MASK 0x1DA3 1799*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C11_C12 0x4043 1800*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C13_C14 0x4044 1801*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C21_C22 0x4045 1802*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C23_C24 0x4046 1803*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C31_C32 0x4047 1804*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXA_TRANS_C33_C34 0x4048 1805*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C11_C12 0x4049 1806*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C13_C14 0x404A 1807*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C21_C22 0x404B 1808*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C23_C24 0x404C 1809*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C31_C32 0x404D 1810*b843c749SSergey Zigachev #define mmDCP2_COMM_MATRIXB_TRANS_C33_C34 0x404E 1811*b843c749SSergey Zigachev #define mmDCP2_CUR_COLOR1 0x406C 1812*b843c749SSergey Zigachev #define mmDCP2_CUR_COLOR2 0x406D 1813*b843c749SSergey Zigachev #define mmDCP2_CUR_CONTROL 0x4066 1814*b843c749SSergey Zigachev #define mmDCP2_CUR_HOT_SPOT 0x406B 1815*b843c749SSergey Zigachev #define mmDCP2_CUR_POSITION 0x406A 1816*b843c749SSergey Zigachev #define mmDCP2_CUR_REQUEST_FILTER_CNTL 0x4099 1817*b843c749SSergey Zigachev #define mmDCP2_CUR_SIZE 0x4068 1818*b843c749SSergey Zigachev #define mmDCP2_CUR_SURFACE_ADDRESS 0x4067 1819*b843c749SSergey Zigachev #define mmDCP2_CUR_SURFACE_ADDRESS_HIGH 0x4069 1820*b843c749SSergey Zigachev #define mmDCP2_CUR_UPDATE 0x406E 1821*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_30_COLOR 0x407C 1822*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_AUTOFILL 0x407F 1823*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_BLACK_OFFSET_BLUE 0x4081 1824*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_BLACK_OFFSET_GREEN 0x4082 1825*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_BLACK_OFFSET_RED 0x4083 1826*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_CONTROL 0x4080 1827*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_PWL_DATA 0x407B 1828*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_RW_INDEX 0x4079 1829*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_RW_MODE 0x4078 1830*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_SEQ_COLOR 0x407A 1831*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_VGA_ACCESS_ENABLE 0x407D 1832*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_WHITE_OFFSET_BLUE 0x4084 1833*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_WHITE_OFFSET_GREEN 0x4085 1834*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_WHITE_OFFSET_RED 0x4086 1835*b843c749SSergey Zigachev #define mmDCP2_DC_LUT_WRITE_EN_MASK 0x407E 1836*b843c749SSergey Zigachev #define mmDCP2_DCP_CRC_CONTROL 0x4087 1837*b843c749SSergey Zigachev #define mmDCP2_DCP_CRC_CURRENT 0x4089 1838*b843c749SSergey Zigachev #define mmDCP2_DCP_CRC_LAST 0x408B 1839*b843c749SSergey Zigachev #define mmDCP2_DCP_CRC_MASK 0x4088 1840*b843c749SSergey Zigachev #define mmDCP2_DCP_DEBUG 0x408D 1841*b843c749SSergey Zigachev #define mmDCP2_DCP_DEBUG2 0x4098 1842*b843c749SSergey Zigachev #define mmDCP2_DCP_FP_CONVERTED_FIELD 0x4065 1843*b843c749SSergey Zigachev #define mmDCP2_DCP_GSL_CONTROL 0x4090 1844*b843c749SSergey Zigachev #define mmDCP2_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4091 1845*b843c749SSergey Zigachev #define mmDCP2_DCP_RANDOM_SEEDS 0x4061 1846*b843c749SSergey Zigachev #define mmDCP2_DCP_SPATIAL_DITHER_CNTL 0x4060 1847*b843c749SSergey Zigachev #define mmDCP2_DCP_TEST_DEBUG_DATA 0x4096 1848*b843c749SSergey Zigachev #define mmDCP2_DCP_TEST_DEBUG_INDEX 0x4095 1849*b843c749SSergey Zigachev #define mmDCP2_DEGAMMA_CONTROL 0x4058 1850*b843c749SSergey Zigachev #define mmDCP2_DENORM_CONTROL 0x4050 1851*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C11_C12 0x405A 1852*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C13_C14 0x405B 1853*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C21_C22 0x405C 1854*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C23_C24 0x405D 1855*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C31_C32 0x405E 1856*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_C33_C34 0x405F 1857*b843c749SSergey Zigachev #define mmDCP2_GAMUT_REMAP_CONTROL 0x4059 1858*b843c749SSergey Zigachev #define mmDCP2_GRPH_COMPRESS_PITCH 0x401A 1859*b843c749SSergey Zigachev #define mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS 0x4019 1860*b843c749SSergey Zigachev #define mmDCP2_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x401B 1861*b843c749SSergey Zigachev #define mmDCP2_GRPH_CONTROL 0x4001 1862*b843c749SSergey Zigachev #define mmDCP2_GRPH_DFQ_CONTROL 0x4014 1863*b843c749SSergey Zigachev #define mmDCP2_GRPH_DFQ_STATUS 0x4015 1864*b843c749SSergey Zigachev #define mmDCP2_GRPH_ENABLE 0x4000 1865*b843c749SSergey Zigachev #define mmDCP2_GRPH_FLIP_CONTROL 0x4012 1866*b843c749SSergey Zigachev #define mmDCP2_GRPH_INTERRUPT_CONTROL 0x4017 1867*b843c749SSergey Zigachev #define mmDCP2_GRPH_INTERRUPT_STATUS 0x4016 1868*b843c749SSergey Zigachev #define mmDCP2_GRPH_LUT_10BIT_BYPASS 0x4002 1869*b843c749SSergey Zigachev #define mmDCP2_GRPH_PITCH 0x4006 1870*b843c749SSergey Zigachev #define mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS 0x4004 1871*b843c749SSergey Zigachev #define mmDCP2_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4007 1872*b843c749SSergey Zigachev #define mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS 0x4005 1873*b843c749SSergey Zigachev #define mmDCP2_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4008 1874*b843c749SSergey Zigachev #define mmDCP2_GRPH_STEREOSYNC_FLIP 0x4097 1875*b843c749SSergey Zigachev #define mmDCP2_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4018 1876*b843c749SSergey Zigachev #define mmDCP2_GRPH_SURFACE_ADDRESS_INUSE 0x4013 1877*b843c749SSergey Zigachev #define mmDCP2_GRPH_SURFACE_OFFSET_X 0x4009 1878*b843c749SSergey Zigachev #define mmDCP2_GRPH_SURFACE_OFFSET_Y 0x400A 1879*b843c749SSergey Zigachev #define mmDCP2_GRPH_SWAP_CNTL 0x4003 1880*b843c749SSergey Zigachev #define mmDCP2_GRPH_UPDATE 0x4011 1881*b843c749SSergey Zigachev #define mmDCP2_GRPH_X_END 0x400D 1882*b843c749SSergey Zigachev #define mmDCP2_GRPH_X_START 0x400B 1883*b843c749SSergey Zigachev #define mmDCP2_GRPH_Y_END 0x400E 1884*b843c749SSergey Zigachev #define mmDCP2_GRPH_Y_START 0x400C 1885*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C11_C12 0x4036 1886*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C13_C14 0x4037 1887*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C21_C22 0x4038 1888*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C23_C24 0x4039 1889*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C31_C32 0x403A 1890*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_C33_C34 0x403B 1891*b843c749SSergey Zigachev #define mmDCP2_INPUT_CSC_CONTROL 0x4035 1892*b843c749SSergey Zigachev #define mmDCP2_INPUT_GAMMA_CONTROL 0x4010 1893*b843c749SSergey Zigachev #define mmDCP2_KEY_CONTROL 0x4053 1894*b843c749SSergey Zigachev #define mmDCP2_KEY_RANGE_ALPHA 0x4054 1895*b843c749SSergey Zigachev #define mmDCP2_KEY_RANGE_BLUE 0x4057 1896*b843c749SSergey Zigachev #define mmDCP2_KEY_RANGE_GREEN 0x4056 1897*b843c749SSergey Zigachev #define mmDCP2_KEY_RANGE_RED 0x4055 1898*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C11_C12 0x403D 1899*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C13_C14 0x403E 1900*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C21_C22 0x403F 1901*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C23_C24 0x4040 1902*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C31_C32 0x4041 1903*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_C33_C34 0x4042 1904*b843c749SSergey Zigachev #define mmDCP2_OUTPUT_CSC_CONTROL 0x403C 1905*b843c749SSergey Zigachev #define mmDCP2_OUT_ROUND_CONTROL 0x4051 1906*b843c749SSergey Zigachev #define mmDCP2_OVL_CONTROL1 0x401D 1907*b843c749SSergey Zigachev #define mmDCP2_OVL_CONTROL2 0x401E 1908*b843c749SSergey Zigachev #define mmDCP2_OVL_DFQ_CONTROL 0x4029 1909*b843c749SSergey Zigachev #define mmDCP2_OVL_DFQ_STATUS 0x402A 1910*b843c749SSergey Zigachev #define mmDCP2_OVL_ENABLE 0x401C 1911*b843c749SSergey Zigachev #define mmDCP2_OVL_END 0x4026 1912*b843c749SSergey Zigachev #define mmDCP2_OVL_PITCH 0x4021 1913*b843c749SSergey Zigachev #define mmDCP2_OVLSCL_EDGE_PIXEL_CNTL 0x402C 1914*b843c749SSergey Zigachev #define mmDCP2_OVL_SECONDARY_SURFACE_ADDRESS 0x4092 1915*b843c749SSergey Zigachev #define mmDCP2_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x4094 1916*b843c749SSergey Zigachev #define mmDCP2_OVL_START 0x4025 1917*b843c749SSergey Zigachev #define mmDCP2_OVL_STEREOSYNC_FLIP 0x4093 1918*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_ADDRESS 0x4020 1919*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_ADDRESS_HIGH 0x4022 1920*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x402B 1921*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_ADDRESS_INUSE 0x4028 1922*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_OFFSET_X 0x4023 1923*b843c749SSergey Zigachev #define mmDCP2_OVL_SURFACE_OFFSET_Y 0x4024 1924*b843c749SSergey Zigachev #define mmDCP2_OVL_SWAP_CNTL 0x401F 1925*b843c749SSergey Zigachev #define mmDCP2_OVL_UPDATE 0x4027 1926*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_GRPH_CONTROL 0x402D 1927*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_OVL_CONTROL 0x4031 1928*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_GRPH_B 0x4030 1929*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_GRPH_G 0x402F 1930*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_GRPH_R 0x402E 1931*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_OVL_CB 0x4032 1932*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_OVL_CR 0x4034 1933*b843c749SSergey Zigachev #define mmDCP2_PRESCALE_VALUES_OVL_Y 0x4033 1934*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_END_CNTL1 0x40A6 1935*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_END_CNTL2 0x40A7 1936*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_0_1 0x40A8 1937*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_10_11 0x40AD 1938*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_12_13 0x40AE 1939*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_14_15 0x40AF 1940*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_2_3 0x40A9 1941*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_4_5 0x40AA 1942*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_6_7 0x40AB 1943*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_REGION_8_9 0x40AC 1944*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_SLOPE_CNTL 0x40A5 1945*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLA_START_CNTL 0x40A4 1946*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_END_CNTL1 0x40B2 1947*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_END_CNTL2 0x40B3 1948*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_0_1 0x40B4 1949*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_10_11 0x40B9 1950*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_12_13 0x40BA 1951*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_14_15 0x40BB 1952*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_2_3 0x40B5 1953*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_4_5 0x40B6 1954*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_6_7 0x40B7 1955*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_REGION_8_9 0x40B8 1956*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_SLOPE_CNTL 0x40B1 1957*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CNTLB_START_CNTL 0x40B0 1958*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_CONTROL 0x40A0 1959*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_LUT_DATA 0x40A2 1960*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_LUT_INDEX 0x40A1 1961*b843c749SSergey Zigachev #define mmDCP2_REGAMMA_LUT_WRITE_EN_MASK 0x40A3 1962*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C11_C12 0x4343 1963*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C13_C14 0x4344 1964*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C21_C22 0x4345 1965*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C23_C24 0x4346 1966*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C31_C32 0x4347 1967*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXA_TRANS_C33_C34 0x4348 1968*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C11_C12 0x4349 1969*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C13_C14 0x434A 1970*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C21_C22 0x434B 1971*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C23_C24 0x434C 1972*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C31_C32 0x434D 1973*b843c749SSergey Zigachev #define mmDCP3_COMM_MATRIXB_TRANS_C33_C34 0x434E 1974*b843c749SSergey Zigachev #define mmDCP3_CUR_COLOR1 0x436C 1975*b843c749SSergey Zigachev #define mmDCP3_CUR_COLOR2 0x436D 1976*b843c749SSergey Zigachev #define mmDCP3_CUR_CONTROL 0x4366 1977*b843c749SSergey Zigachev #define mmDCP3_CUR_HOT_SPOT 0x436B 1978*b843c749SSergey Zigachev #define mmDCP3_CUR_POSITION 0x436A 1979*b843c749SSergey Zigachev #define mmDCP3_CUR_REQUEST_FILTER_CNTL 0x4399 1980*b843c749SSergey Zigachev #define mmDCP3_CUR_SIZE 0x4368 1981*b843c749SSergey Zigachev #define mmDCP3_CUR_SURFACE_ADDRESS 0x4367 1982*b843c749SSergey Zigachev #define mmDCP3_CUR_SURFACE_ADDRESS_HIGH 0x4369 1983*b843c749SSergey Zigachev #define mmDCP3_CUR_UPDATE 0x436E 1984*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_30_COLOR 0x437C 1985*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_AUTOFILL 0x437F 1986*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_BLACK_OFFSET_BLUE 0x4381 1987*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_BLACK_OFFSET_GREEN 0x4382 1988*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_BLACK_OFFSET_RED 0x4383 1989*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_CONTROL 0x4380 1990*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_PWL_DATA 0x437B 1991*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_RW_INDEX 0x4379 1992*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_RW_MODE 0x4378 1993*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_SEQ_COLOR 0x437A 1994*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_VGA_ACCESS_ENABLE 0x437D 1995*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_WHITE_OFFSET_BLUE 0x4384 1996*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_WHITE_OFFSET_GREEN 0x4385 1997*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_WHITE_OFFSET_RED 0x4386 1998*b843c749SSergey Zigachev #define mmDCP3_DC_LUT_WRITE_EN_MASK 0x437E 1999*b843c749SSergey Zigachev #define mmDCP3_DCP_CRC_CONTROL 0x4387 2000*b843c749SSergey Zigachev #define mmDCP3_DCP_CRC_CURRENT 0x4389 2001*b843c749SSergey Zigachev #define mmDCP3_DCP_CRC_LAST 0x438B 2002*b843c749SSergey Zigachev #define mmDCP3_DCP_CRC_MASK 0x4388 2003*b843c749SSergey Zigachev #define mmDCP3_DCP_DEBUG 0x438D 2004*b843c749SSergey Zigachev #define mmDCP3_DCP_DEBUG2 0x4398 2005*b843c749SSergey Zigachev #define mmDCP3_DCP_FP_CONVERTED_FIELD 0x4365 2006*b843c749SSergey Zigachev #define mmDCP3_DCP_GSL_CONTROL 0x4390 2007*b843c749SSergey Zigachev #define mmDCP3_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4391 2008*b843c749SSergey Zigachev #define mmDCP3_DCP_RANDOM_SEEDS 0x4361 2009*b843c749SSergey Zigachev #define mmDCP3_DCP_SPATIAL_DITHER_CNTL 0x4360 2010*b843c749SSergey Zigachev #define mmDCP3_DCP_TEST_DEBUG_DATA 0x4396 2011*b843c749SSergey Zigachev #define mmDCP3_DCP_TEST_DEBUG_INDEX 0x4395 2012*b843c749SSergey Zigachev #define mmDCP3_DEGAMMA_CONTROL 0x4358 2013*b843c749SSergey Zigachev #define mmDCP3_DENORM_CONTROL 0x4350 2014*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C11_C12 0x435A 2015*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C13_C14 0x435B 2016*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C21_C22 0x435C 2017*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C23_C24 0x435D 2018*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C31_C32 0x435E 2019*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_C33_C34 0x435F 2020*b843c749SSergey Zigachev #define mmDCP3_GAMUT_REMAP_CONTROL 0x4359 2021*b843c749SSergey Zigachev #define mmDCP3_GRPH_COMPRESS_PITCH 0x431A 2022*b843c749SSergey Zigachev #define mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS 0x4319 2023*b843c749SSergey Zigachev #define mmDCP3_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x431B 2024*b843c749SSergey Zigachev #define mmDCP3_GRPH_CONTROL 0x4301 2025*b843c749SSergey Zigachev #define mmDCP3_GRPH_DFQ_CONTROL 0x4314 2026*b843c749SSergey Zigachev #define mmDCP3_GRPH_DFQ_STATUS 0x4315 2027*b843c749SSergey Zigachev #define mmDCP3_GRPH_ENABLE 0x4300 2028*b843c749SSergey Zigachev #define mmDCP3_GRPH_FLIP_CONTROL 0x4312 2029*b843c749SSergey Zigachev #define mmDCP3_GRPH_INTERRUPT_CONTROL 0x4317 2030*b843c749SSergey Zigachev #define mmDCP3_GRPH_INTERRUPT_STATUS 0x4316 2031*b843c749SSergey Zigachev #define mmDCP3_GRPH_LUT_10BIT_BYPASS 0x4302 2032*b843c749SSergey Zigachev #define mmDCP3_GRPH_PITCH 0x4306 2033*b843c749SSergey Zigachev #define mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS 0x4304 2034*b843c749SSergey Zigachev #define mmDCP3_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4307 2035*b843c749SSergey Zigachev #define mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS 0x4305 2036*b843c749SSergey Zigachev #define mmDCP3_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4308 2037*b843c749SSergey Zigachev #define mmDCP3_GRPH_STEREOSYNC_FLIP 0x4397 2038*b843c749SSergey Zigachev #define mmDCP3_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4318 2039*b843c749SSergey Zigachev #define mmDCP3_GRPH_SURFACE_ADDRESS_INUSE 0x4313 2040*b843c749SSergey Zigachev #define mmDCP3_GRPH_SURFACE_OFFSET_X 0x4309 2041*b843c749SSergey Zigachev #define mmDCP3_GRPH_SURFACE_OFFSET_Y 0x430A 2042*b843c749SSergey Zigachev #define mmDCP3_GRPH_SWAP_CNTL 0x4303 2043*b843c749SSergey Zigachev #define mmDCP3_GRPH_UPDATE 0x4311 2044*b843c749SSergey Zigachev #define mmDCP3_GRPH_X_END 0x430D 2045*b843c749SSergey Zigachev #define mmDCP3_GRPH_X_START 0x430B 2046*b843c749SSergey Zigachev #define mmDCP3_GRPH_Y_END 0x430E 2047*b843c749SSergey Zigachev #define mmDCP3_GRPH_Y_START 0x430C 2048*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C11_C12 0x4336 2049*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C13_C14 0x4337 2050*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C21_C22 0x4338 2051*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C23_C24 0x4339 2052*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C31_C32 0x433A 2053*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_C33_C34 0x433B 2054*b843c749SSergey Zigachev #define mmDCP3_INPUT_CSC_CONTROL 0x4335 2055*b843c749SSergey Zigachev #define mmDCP3_INPUT_GAMMA_CONTROL 0x4310 2056*b843c749SSergey Zigachev #define mmDCP3_KEY_CONTROL 0x4353 2057*b843c749SSergey Zigachev #define mmDCP3_KEY_RANGE_ALPHA 0x4354 2058*b843c749SSergey Zigachev #define mmDCP3_KEY_RANGE_BLUE 0x4357 2059*b843c749SSergey Zigachev #define mmDCP3_KEY_RANGE_GREEN 0x4356 2060*b843c749SSergey Zigachev #define mmDCP3_KEY_RANGE_RED 0x4355 2061*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C11_C12 0x433D 2062*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C13_C14 0x433E 2063*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C21_C22 0x433F 2064*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C23_C24 0x4340 2065*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C31_C32 0x4341 2066*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_C33_C34 0x4342 2067*b843c749SSergey Zigachev #define mmDCP3_OUTPUT_CSC_CONTROL 0x433C 2068*b843c749SSergey Zigachev #define mmDCP3_OUT_ROUND_CONTROL 0x4351 2069*b843c749SSergey Zigachev #define mmDCP3_OVL_CONTROL1 0x431D 2070*b843c749SSergey Zigachev #define mmDCP3_OVL_CONTROL2 0x431E 2071*b843c749SSergey Zigachev #define mmDCP3_OVL_DFQ_CONTROL 0x4329 2072*b843c749SSergey Zigachev #define mmDCP3_OVL_DFQ_STATUS 0x432A 2073*b843c749SSergey Zigachev #define mmDCP3_OVL_ENABLE 0x431C 2074*b843c749SSergey Zigachev #define mmDCP3_OVL_END 0x4326 2075*b843c749SSergey Zigachev #define mmDCP3_OVL_PITCH 0x4321 2076*b843c749SSergey Zigachev #define mmDCP3_OVLSCL_EDGE_PIXEL_CNTL 0x432C 2077*b843c749SSergey Zigachev #define mmDCP3_OVL_SECONDARY_SURFACE_ADDRESS 0x4392 2078*b843c749SSergey Zigachev #define mmDCP3_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x4394 2079*b843c749SSergey Zigachev #define mmDCP3_OVL_START 0x4325 2080*b843c749SSergey Zigachev #define mmDCP3_OVL_STEREOSYNC_FLIP 0x4393 2081*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_ADDRESS 0x4320 2082*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_ADDRESS_HIGH 0x4322 2083*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x432B 2084*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_ADDRESS_INUSE 0x4328 2085*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_OFFSET_X 0x4323 2086*b843c749SSergey Zigachev #define mmDCP3_OVL_SURFACE_OFFSET_Y 0x4324 2087*b843c749SSergey Zigachev #define mmDCP3_OVL_SWAP_CNTL 0x431F 2088*b843c749SSergey Zigachev #define mmDCP3_OVL_UPDATE 0x4327 2089*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_GRPH_CONTROL 0x432D 2090*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_OVL_CONTROL 0x4331 2091*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_GRPH_B 0x4330 2092*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_GRPH_G 0x432F 2093*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_GRPH_R 0x432E 2094*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_OVL_CB 0x4332 2095*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_OVL_CR 0x4334 2096*b843c749SSergey Zigachev #define mmDCP3_PRESCALE_VALUES_OVL_Y 0x4333 2097*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_END_CNTL1 0x43A6 2098*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_END_CNTL2 0x43A7 2099*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_0_1 0x43A8 2100*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_10_11 0x43AD 2101*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_12_13 0x43AE 2102*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_14_15 0x43AF 2103*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_2_3 0x43A9 2104*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_4_5 0x43AA 2105*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_6_7 0x43AB 2106*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_REGION_8_9 0x43AC 2107*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_SLOPE_CNTL 0x43A5 2108*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLA_START_CNTL 0x43A4 2109*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_END_CNTL1 0x43B2 2110*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_END_CNTL2 0x43B3 2111*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_0_1 0x43B4 2112*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_10_11 0x43B9 2113*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_12_13 0x43BA 2114*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_14_15 0x43BB 2115*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_2_3 0x43B5 2116*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_4_5 0x43B6 2117*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_6_7 0x43B7 2118*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_REGION_8_9 0x43B8 2119*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_SLOPE_CNTL 0x43B1 2120*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CNTLB_START_CNTL 0x43B0 2121*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_CONTROL 0x43A0 2122*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_LUT_DATA 0x43A2 2123*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_LUT_INDEX 0x43A1 2124*b843c749SSergey Zigachev #define mmDCP3_REGAMMA_LUT_WRITE_EN_MASK 0x43A3 2125*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C11_C12 0x4643 2126*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C13_C14 0x4644 2127*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C21_C22 0x4645 2128*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C23_C24 0x4646 2129*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C31_C32 0x4647 2130*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXA_TRANS_C33_C34 0x4648 2131*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C11_C12 0x4649 2132*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C13_C14 0x464A 2133*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C21_C22 0x464B 2134*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C23_C24 0x464C 2135*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C31_C32 0x464D 2136*b843c749SSergey Zigachev #define mmDCP4_COMM_MATRIXB_TRANS_C33_C34 0x464E 2137*b843c749SSergey Zigachev #define mmDCP4_CUR_COLOR1 0x466C 2138*b843c749SSergey Zigachev #define mmDCP4_CUR_COLOR2 0x466D 2139*b843c749SSergey Zigachev #define mmDCP4_CUR_CONTROL 0x4666 2140*b843c749SSergey Zigachev #define mmDCP4_CUR_HOT_SPOT 0x466B 2141*b843c749SSergey Zigachev #define mmDCP4_CUR_POSITION 0x466A 2142*b843c749SSergey Zigachev #define mmDCP4_CUR_REQUEST_FILTER_CNTL 0x4699 2143*b843c749SSergey Zigachev #define mmDCP4_CUR_SIZE 0x4668 2144*b843c749SSergey Zigachev #define mmDCP4_CUR_SURFACE_ADDRESS 0x4667 2145*b843c749SSergey Zigachev #define mmDCP4_CUR_SURFACE_ADDRESS_HIGH 0x4669 2146*b843c749SSergey Zigachev #define mmDCP4_CUR_UPDATE 0x466E 2147*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_30_COLOR 0x467C 2148*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_AUTOFILL 0x467F 2149*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_BLACK_OFFSET_BLUE 0x4681 2150*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_BLACK_OFFSET_GREEN 0x4682 2151*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_BLACK_OFFSET_RED 0x4683 2152*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_CONTROL 0x4680 2153*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_PWL_DATA 0x467B 2154*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_RW_INDEX 0x4679 2155*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_RW_MODE 0x4678 2156*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_SEQ_COLOR 0x467A 2157*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_VGA_ACCESS_ENABLE 0x467D 2158*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_WHITE_OFFSET_BLUE 0x4684 2159*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_WHITE_OFFSET_GREEN 0x4685 2160*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_WHITE_OFFSET_RED 0x4686 2161*b843c749SSergey Zigachev #define mmDCP4_DC_LUT_WRITE_EN_MASK 0x467E 2162*b843c749SSergey Zigachev #define mmDCP4_DCP_CRC_CONTROL 0x4687 2163*b843c749SSergey Zigachev #define mmDCP4_DCP_CRC_CURRENT 0x4689 2164*b843c749SSergey Zigachev #define mmDCP4_DCP_CRC_LAST 0x468B 2165*b843c749SSergey Zigachev #define mmDCP4_DCP_CRC_MASK 0x4688 2166*b843c749SSergey Zigachev #define mmDCP4_DCP_DEBUG 0x468D 2167*b843c749SSergey Zigachev #define mmDCP4_DCP_DEBUG2 0x4698 2168*b843c749SSergey Zigachev #define mmDCP4_DCP_FP_CONVERTED_FIELD 0x4665 2169*b843c749SSergey Zigachev #define mmDCP4_DCP_GSL_CONTROL 0x4690 2170*b843c749SSergey Zigachev #define mmDCP4_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4691 2171*b843c749SSergey Zigachev #define mmDCP4_DCP_RANDOM_SEEDS 0x4661 2172*b843c749SSergey Zigachev #define mmDCP4_DCP_SPATIAL_DITHER_CNTL 0x4660 2173*b843c749SSergey Zigachev #define mmDCP4_DCP_TEST_DEBUG_DATA 0x4696 2174*b843c749SSergey Zigachev #define mmDCP4_DCP_TEST_DEBUG_INDEX 0x4695 2175*b843c749SSergey Zigachev #define mmDCP4_DEGAMMA_CONTROL 0x4658 2176*b843c749SSergey Zigachev #define mmDCP4_DENORM_CONTROL 0x4650 2177*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C11_C12 0x465A 2178*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C13_C14 0x465B 2179*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C21_C22 0x465C 2180*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C23_C24 0x465D 2181*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C31_C32 0x465E 2182*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_C33_C34 0x465F 2183*b843c749SSergey Zigachev #define mmDCP4_GAMUT_REMAP_CONTROL 0x4659 2184*b843c749SSergey Zigachev #define mmDCP4_GRPH_COMPRESS_PITCH 0x461A 2185*b843c749SSergey Zigachev #define mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS 0x4619 2186*b843c749SSergey Zigachev #define mmDCP4_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x461B 2187*b843c749SSergey Zigachev #define mmDCP4_GRPH_CONTROL 0x4601 2188*b843c749SSergey Zigachev #define mmDCP4_GRPH_DFQ_CONTROL 0x4614 2189*b843c749SSergey Zigachev #define mmDCP4_GRPH_DFQ_STATUS 0x4615 2190*b843c749SSergey Zigachev #define mmDCP4_GRPH_ENABLE 0x4600 2191*b843c749SSergey Zigachev #define mmDCP4_GRPH_FLIP_CONTROL 0x4612 2192*b843c749SSergey Zigachev #define mmDCP4_GRPH_INTERRUPT_CONTROL 0x4617 2193*b843c749SSergey Zigachev #define mmDCP4_GRPH_INTERRUPT_STATUS 0x4616 2194*b843c749SSergey Zigachev #define mmDCP4_GRPH_LUT_10BIT_BYPASS 0x4602 2195*b843c749SSergey Zigachev #define mmDCP4_GRPH_PITCH 0x4606 2196*b843c749SSergey Zigachev #define mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS 0x4604 2197*b843c749SSergey Zigachev #define mmDCP4_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4607 2198*b843c749SSergey Zigachev #define mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS 0x4605 2199*b843c749SSergey Zigachev #define mmDCP4_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4608 2200*b843c749SSergey Zigachev #define mmDCP4_GRPH_STEREOSYNC_FLIP 0x4697 2201*b843c749SSergey Zigachev #define mmDCP4_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4618 2202*b843c749SSergey Zigachev #define mmDCP4_GRPH_SURFACE_ADDRESS_INUSE 0x4613 2203*b843c749SSergey Zigachev #define mmDCP4_GRPH_SURFACE_OFFSET_X 0x4609 2204*b843c749SSergey Zigachev #define mmDCP4_GRPH_SURFACE_OFFSET_Y 0x460A 2205*b843c749SSergey Zigachev #define mmDCP4_GRPH_SWAP_CNTL 0x4603 2206*b843c749SSergey Zigachev #define mmDCP4_GRPH_UPDATE 0x4611 2207*b843c749SSergey Zigachev #define mmDCP4_GRPH_X_END 0x460D 2208*b843c749SSergey Zigachev #define mmDCP4_GRPH_X_START 0x460B 2209*b843c749SSergey Zigachev #define mmDCP4_GRPH_Y_END 0x460E 2210*b843c749SSergey Zigachev #define mmDCP4_GRPH_Y_START 0x460C 2211*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C11_C12 0x4636 2212*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C13_C14 0x4637 2213*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C21_C22 0x4638 2214*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C23_C24 0x4639 2215*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C31_C32 0x463A 2216*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_C33_C34 0x463B 2217*b843c749SSergey Zigachev #define mmDCP4_INPUT_CSC_CONTROL 0x4635 2218*b843c749SSergey Zigachev #define mmDCP4_INPUT_GAMMA_CONTROL 0x4610 2219*b843c749SSergey Zigachev #define mmDCP4_KEY_CONTROL 0x4653 2220*b843c749SSergey Zigachev #define mmDCP4_KEY_RANGE_ALPHA 0x4654 2221*b843c749SSergey Zigachev #define mmDCP4_KEY_RANGE_BLUE 0x4657 2222*b843c749SSergey Zigachev #define mmDCP4_KEY_RANGE_GREEN 0x4656 2223*b843c749SSergey Zigachev #define mmDCP4_KEY_RANGE_RED 0x4655 2224*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C11_C12 0x463D 2225*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C13_C14 0x463E 2226*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C21_C22 0x463F 2227*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C23_C24 0x4640 2228*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C31_C32 0x4641 2229*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_C33_C34 0x4642 2230*b843c749SSergey Zigachev #define mmDCP4_OUTPUT_CSC_CONTROL 0x463C 2231*b843c749SSergey Zigachev #define mmDCP4_OUT_ROUND_CONTROL 0x4651 2232*b843c749SSergey Zigachev #define mmDCP4_OVL_CONTROL1 0x461D 2233*b843c749SSergey Zigachev #define mmDCP4_OVL_CONTROL2 0x461E 2234*b843c749SSergey Zigachev #define mmDCP4_OVL_DFQ_CONTROL 0x4629 2235*b843c749SSergey Zigachev #define mmDCP4_OVL_DFQ_STATUS 0x462A 2236*b843c749SSergey Zigachev #define mmDCP4_OVL_ENABLE 0x461C 2237*b843c749SSergey Zigachev #define mmDCP4_OVL_END 0x4626 2238*b843c749SSergey Zigachev #define mmDCP4_OVL_PITCH 0x4621 2239*b843c749SSergey Zigachev #define mmDCP4_OVLSCL_EDGE_PIXEL_CNTL 0x462C 2240*b843c749SSergey Zigachev #define mmDCP4_OVL_SECONDARY_SURFACE_ADDRESS 0x4692 2241*b843c749SSergey Zigachev #define mmDCP4_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x4694 2242*b843c749SSergey Zigachev #define mmDCP4_OVL_START 0x4625 2243*b843c749SSergey Zigachev #define mmDCP4_OVL_STEREOSYNC_FLIP 0x4693 2244*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_ADDRESS 0x4620 2245*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_ADDRESS_HIGH 0x4622 2246*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x462B 2247*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_ADDRESS_INUSE 0x4628 2248*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_OFFSET_X 0x4623 2249*b843c749SSergey Zigachev #define mmDCP4_OVL_SURFACE_OFFSET_Y 0x4624 2250*b843c749SSergey Zigachev #define mmDCP4_OVL_SWAP_CNTL 0x461F 2251*b843c749SSergey Zigachev #define mmDCP4_OVL_UPDATE 0x4627 2252*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_GRPH_CONTROL 0x462D 2253*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_OVL_CONTROL 0x4631 2254*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_GRPH_B 0x4630 2255*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_GRPH_G 0x462F 2256*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_GRPH_R 0x462E 2257*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_OVL_CB 0x4632 2258*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_OVL_CR 0x4634 2259*b843c749SSergey Zigachev #define mmDCP4_PRESCALE_VALUES_OVL_Y 0x4633 2260*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_END_CNTL1 0x46A6 2261*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_END_CNTL2 0x46A7 2262*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_0_1 0x46A8 2263*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_10_11 0x46AD 2264*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_12_13 0x46AE 2265*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_14_15 0x46AF 2266*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_2_3 0x46A9 2267*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_4_5 0x46AA 2268*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_6_7 0x46AB 2269*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_REGION_8_9 0x46AC 2270*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_SLOPE_CNTL 0x46A5 2271*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLA_START_CNTL 0x46A4 2272*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_END_CNTL1 0x46B2 2273*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_END_CNTL2 0x46B3 2274*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_0_1 0x46B4 2275*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_10_11 0x46B9 2276*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_12_13 0x46BA 2277*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_14_15 0x46BB 2278*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_2_3 0x46B5 2279*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_4_5 0x46B6 2280*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_6_7 0x46B7 2281*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_REGION_8_9 0x46B8 2282*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_SLOPE_CNTL 0x46B1 2283*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CNTLB_START_CNTL 0x46B0 2284*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_CONTROL 0x46A0 2285*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_LUT_DATA 0x46A2 2286*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_LUT_INDEX 0x46A1 2287*b843c749SSergey Zigachev #define mmDCP4_REGAMMA_LUT_WRITE_EN_MASK 0x46A3 2288*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C11_C12 0x4943 2289*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C13_C14 0x4944 2290*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C21_C22 0x4945 2291*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C23_C24 0x4946 2292*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C31_C32 0x4947 2293*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXA_TRANS_C33_C34 0x4948 2294*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C11_C12 0x4949 2295*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C13_C14 0x494A 2296*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C21_C22 0x494B 2297*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C23_C24 0x494C 2298*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C31_C32 0x494D 2299*b843c749SSergey Zigachev #define mmDCP5_COMM_MATRIXB_TRANS_C33_C34 0x494E 2300*b843c749SSergey Zigachev #define mmDCP5_CUR_COLOR1 0x496C 2301*b843c749SSergey Zigachev #define mmDCP5_CUR_COLOR2 0x496D 2302*b843c749SSergey Zigachev #define mmDCP5_CUR_CONTROL 0x4966 2303*b843c749SSergey Zigachev #define mmDCP5_CUR_HOT_SPOT 0x496B 2304*b843c749SSergey Zigachev #define mmDCP5_CUR_POSITION 0x496A 2305*b843c749SSergey Zigachev #define mmDCP5_CUR_REQUEST_FILTER_CNTL 0x4999 2306*b843c749SSergey Zigachev #define mmDCP5_CUR_SIZE 0x4968 2307*b843c749SSergey Zigachev #define mmDCP5_CUR_SURFACE_ADDRESS 0x4967 2308*b843c749SSergey Zigachev #define mmDCP5_CUR_SURFACE_ADDRESS_HIGH 0x4969 2309*b843c749SSergey Zigachev #define mmDCP5_CUR_UPDATE 0x496E 2310*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_30_COLOR 0x497C 2311*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_AUTOFILL 0x497F 2312*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_BLACK_OFFSET_BLUE 0x4981 2313*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_BLACK_OFFSET_GREEN 0x4982 2314*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_BLACK_OFFSET_RED 0x4983 2315*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_CONTROL 0x4980 2316*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_PWL_DATA 0x497B 2317*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_RW_INDEX 0x4979 2318*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_RW_MODE 0x4978 2319*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_SEQ_COLOR 0x497A 2320*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_VGA_ACCESS_ENABLE 0x497D 2321*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_WHITE_OFFSET_BLUE 0x4984 2322*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_WHITE_OFFSET_GREEN 0x4985 2323*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_WHITE_OFFSET_RED 0x4986 2324*b843c749SSergey Zigachev #define mmDCP5_DC_LUT_WRITE_EN_MASK 0x497E 2325*b843c749SSergey Zigachev #define mmDCP5_DCP_CRC_CONTROL 0x4987 2326*b843c749SSergey Zigachev #define mmDCP5_DCP_CRC_CURRENT 0x4989 2327*b843c749SSergey Zigachev #define mmDCP5_DCP_CRC_LAST 0x498B 2328*b843c749SSergey Zigachev #define mmDCP5_DCP_CRC_MASK 0x4988 2329*b843c749SSergey Zigachev #define mmDCP5_DCP_DEBUG 0x498D 2330*b843c749SSergey Zigachev #define mmDCP5_DCP_DEBUG2 0x4998 2331*b843c749SSergey Zigachev #define mmDCP5_DCP_FP_CONVERTED_FIELD 0x4965 2332*b843c749SSergey Zigachev #define mmDCP5_DCP_GSL_CONTROL 0x4990 2333*b843c749SSergey Zigachev #define mmDCP5_DCP_LB_DATA_GAP_BETWEEN_CHUNK 0x4991 2334*b843c749SSergey Zigachev #define mmDCP5_DCP_RANDOM_SEEDS 0x4961 2335*b843c749SSergey Zigachev #define mmDCP5_DCP_SPATIAL_DITHER_CNTL 0x4960 2336*b843c749SSergey Zigachev #define mmDCP5_DCP_TEST_DEBUG_DATA 0x4996 2337*b843c749SSergey Zigachev #define mmDCP5_DCP_TEST_DEBUG_INDEX 0x4995 2338*b843c749SSergey Zigachev #define mmDCP5_DEGAMMA_CONTROL 0x4958 2339*b843c749SSergey Zigachev #define mmDCP5_DENORM_CONTROL 0x4950 2340*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C11_C12 0x495A 2341*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C13_C14 0x495B 2342*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C21_C22 0x495C 2343*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C23_C24 0x495D 2344*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C31_C32 0x495E 2345*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_C33_C34 0x495F 2346*b843c749SSergey Zigachev #define mmDCP5_GAMUT_REMAP_CONTROL 0x4959 2347*b843c749SSergey Zigachev #define mmDCP5_GRPH_COMPRESS_PITCH 0x491A 2348*b843c749SSergey Zigachev #define mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS 0x4919 2349*b843c749SSergey Zigachev #define mmDCP5_GRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x491B 2350*b843c749SSergey Zigachev #define mmDCP5_GRPH_CONTROL 0x4901 2351*b843c749SSergey Zigachev #define mmDCP5_GRPH_DFQ_CONTROL 0x4914 2352*b843c749SSergey Zigachev #define mmDCP5_GRPH_DFQ_STATUS 0x4915 2353*b843c749SSergey Zigachev #define mmDCP5_GRPH_ENABLE 0x4900 2354*b843c749SSergey Zigachev #define mmDCP5_GRPH_FLIP_CONTROL 0x4912 2355*b843c749SSergey Zigachev #define mmDCP5_GRPH_INTERRUPT_CONTROL 0x4917 2356*b843c749SSergey Zigachev #define mmDCP5_GRPH_INTERRUPT_STATUS 0x4916 2357*b843c749SSergey Zigachev #define mmDCP5_GRPH_LUT_10BIT_BYPASS 0x4902 2358*b843c749SSergey Zigachev #define mmDCP5_GRPH_PITCH 0x4906 2359*b843c749SSergey Zigachev #define mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS 0x4904 2360*b843c749SSergey Zigachev #define mmDCP5_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x4907 2361*b843c749SSergey Zigachev #define mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS 0x4905 2362*b843c749SSergey Zigachev #define mmDCP5_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x4908 2363*b843c749SSergey Zigachev #define mmDCP5_GRPH_STEREOSYNC_FLIP 0x4997 2364*b843c749SSergey Zigachev #define mmDCP5_GRPH_SURFACE_ADDRESS_HIGH_INUSE 0x4918 2365*b843c749SSergey Zigachev #define mmDCP5_GRPH_SURFACE_ADDRESS_INUSE 0x4913 2366*b843c749SSergey Zigachev #define mmDCP5_GRPH_SURFACE_OFFSET_X 0x4909 2367*b843c749SSergey Zigachev #define mmDCP5_GRPH_SURFACE_OFFSET_Y 0x490A 2368*b843c749SSergey Zigachev #define mmDCP5_GRPH_SWAP_CNTL 0x4903 2369*b843c749SSergey Zigachev #define mmDCP5_GRPH_UPDATE 0x4911 2370*b843c749SSergey Zigachev #define mmDCP5_GRPH_X_END 0x490D 2371*b843c749SSergey Zigachev #define mmDCP5_GRPH_X_START 0x490B 2372*b843c749SSergey Zigachev #define mmDCP5_GRPH_Y_END 0x490E 2373*b843c749SSergey Zigachev #define mmDCP5_GRPH_Y_START 0x490C 2374*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C11_C12 0x4936 2375*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C13_C14 0x4937 2376*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C21_C22 0x4938 2377*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C23_C24 0x4939 2378*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C31_C32 0x493A 2379*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_C33_C34 0x493B 2380*b843c749SSergey Zigachev #define mmDCP5_INPUT_CSC_CONTROL 0x4935 2381*b843c749SSergey Zigachev #define mmDCP5_INPUT_GAMMA_CONTROL 0x4910 2382*b843c749SSergey Zigachev #define mmDCP5_KEY_CONTROL 0x4953 2383*b843c749SSergey Zigachev #define mmDCP5_KEY_RANGE_ALPHA 0x4954 2384*b843c749SSergey Zigachev #define mmDCP5_KEY_RANGE_BLUE 0x4957 2385*b843c749SSergey Zigachev #define mmDCP5_KEY_RANGE_GREEN 0x4956 2386*b843c749SSergey Zigachev #define mmDCP5_KEY_RANGE_RED 0x4955 2387*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C11_C12 0x493D 2388*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C13_C14 0x493E 2389*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C21_C22 0x493F 2390*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C23_C24 0x4940 2391*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C31_C32 0x4941 2392*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_C33_C34 0x4942 2393*b843c749SSergey Zigachev #define mmDCP5_OUTPUT_CSC_CONTROL 0x493C 2394*b843c749SSergey Zigachev #define mmDCP5_OUT_ROUND_CONTROL 0x4951 2395*b843c749SSergey Zigachev #define mmDCP5_OVL_CONTROL1 0x491D 2396*b843c749SSergey Zigachev #define mmDCP5_OVL_CONTROL2 0x491E 2397*b843c749SSergey Zigachev #define mmDCP5_OVL_DFQ_CONTROL 0x4929 2398*b843c749SSergey Zigachev #define mmDCP5_OVL_DFQ_STATUS 0x492A 2399*b843c749SSergey Zigachev #define mmDCP5_OVL_ENABLE 0x491C 2400*b843c749SSergey Zigachev #define mmDCP5_OVL_END 0x4926 2401*b843c749SSergey Zigachev #define mmDCP5_OVL_PITCH 0x4921 2402*b843c749SSergey Zigachev #define mmDCP5_OVLSCL_EDGE_PIXEL_CNTL 0x492C 2403*b843c749SSergey Zigachev #define mmDCP5_OVL_SECONDARY_SURFACE_ADDRESS 0x4992 2404*b843c749SSergey Zigachev #define mmDCP5_OVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x4994 2405*b843c749SSergey Zigachev #define mmDCP5_OVL_START 0x4925 2406*b843c749SSergey Zigachev #define mmDCP5_OVL_STEREOSYNC_FLIP 0x4993 2407*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_ADDRESS 0x4920 2408*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_ADDRESS_HIGH 0x4922 2409*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_ADDRESS_HIGH_INUSE 0x492B 2410*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_ADDRESS_INUSE 0x4928 2411*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_OFFSET_X 0x4923 2412*b843c749SSergey Zigachev #define mmDCP5_OVL_SURFACE_OFFSET_Y 0x4924 2413*b843c749SSergey Zigachev #define mmDCP5_OVL_SWAP_CNTL 0x491F 2414*b843c749SSergey Zigachev #define mmDCP5_OVL_UPDATE 0x4927 2415*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_GRPH_CONTROL 0x492D 2416*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_OVL_CONTROL 0x4931 2417*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_GRPH_B 0x4930 2418*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_GRPH_G 0x492F 2419*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_GRPH_R 0x492E 2420*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_OVL_CB 0x4932 2421*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_OVL_CR 0x4934 2422*b843c749SSergey Zigachev #define mmDCP5_PRESCALE_VALUES_OVL_Y 0x4933 2423*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_END_CNTL1 0x49A6 2424*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_END_CNTL2 0x49A7 2425*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_0_1 0x49A8 2426*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_10_11 0x49AD 2427*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_12_13 0x49AE 2428*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_14_15 0x49AF 2429*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_2_3 0x49A9 2430*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_4_5 0x49AA 2431*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_6_7 0x49AB 2432*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_REGION_8_9 0x49AC 2433*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_SLOPE_CNTL 0x49A5 2434*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLA_START_CNTL 0x49A4 2435*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_END_CNTL1 0x49B2 2436*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_END_CNTL2 0x49B3 2437*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_0_1 0x49B4 2438*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_10_11 0x49B9 2439*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_12_13 0x49BA 2440*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_14_15 0x49BB 2441*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_2_3 0x49B5 2442*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_4_5 0x49B6 2443*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_6_7 0x49B7 2444*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_REGION_8_9 0x49B8 2445*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_SLOPE_CNTL 0x49B1 2446*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CNTLB_START_CNTL 0x49B0 2447*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_CONTROL 0x49A0 2448*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_LUT_DATA 0x49A2 2449*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_LUT_INDEX 0x49A1 2450*b843c749SSergey Zigachev #define mmDCP5_REGAMMA_LUT_WRITE_EN_MASK 0x49A3 2451*b843c749SSergey Zigachev #define mmDC_PAD_EXTERN_SIG 0x1902 2452*b843c749SSergey Zigachev #define mmDCP_CRC_CONTROL 0x1A87 2453*b843c749SSergey Zigachev #define mmDCP_CRC_CURRENT 0x1A89 2454*b843c749SSergey Zigachev #define mmDCP_CRC_LAST 0x1A8B 2455*b843c749SSergey Zigachev #define mmDCP_CRC_MASK 0x1A88 2456*b843c749SSergey Zigachev #define mmDCP_DEBUG 0x1A8D 2457*b843c749SSergey Zigachev #define mmDCP_DEBUG2 0x1A98 2458*b843c749SSergey Zigachev #define mmDCP_FP_CONVERTED_FIELD 0x1A65 2459*b843c749SSergey Zigachev #define mmDC_PGCNTL_STATUS_REG 0x177E 2460*b843c749SSergey Zigachev #define mmDC_PGFSM_CONFIG_REG 0x177C 2461*b843c749SSergey Zigachev #define mmDC_PGFSM_WRITE_REG 0x177D 2462*b843c749SSergey Zigachev #define mmDCP_GSL_CONTROL 0x1A90 2463*b843c749SSergey Zigachev #define mmDCPG_TEST_DEBUG_DATA 0x177B 2464*b843c749SSergey Zigachev #define mmDCPG_TEST_DEBUG_INDEX 0x1779 2465*b843c749SSergey Zigachev #define mmDC_PINSTRAPS 0x1917 2466*b843c749SSergey Zigachev #define mmDCP_LB_DATA_GAP_BETWEEN_CHUNK 0x1A91 2467*b843c749SSergey Zigachev #define mmDCP_RANDOM_SEEDS 0x1A61 2468*b843c749SSergey Zigachev #define mmDCP_SPATIAL_DITHER_CNTL 0x1A60 2469*b843c749SSergey Zigachev #define mmDCP_TEST_DEBUG_DATA 0x1A96 2470*b843c749SSergey Zigachev #define mmDCP_TEST_DEBUG_INDEX 0x1A95 2471*b843c749SSergey Zigachev #define mmDC_RBBMIF_RDWR_CNTL1 0x031A 2472*b843c749SSergey Zigachev #define mmDC_RBBMIF_RDWR_CNTL2 0x031D 2473*b843c749SSergey Zigachev #define mmDC_REF_CLK_CNTL 0x1903 2474*b843c749SSergey Zigachev #define mmDC_XDMA_INTERFACE_CNTL 0x0327 2475*b843c749SSergey Zigachev #define mmDEGAMMA_CONTROL 0x1A58 2476*b843c749SSergey Zigachev #define mmDENORM_CONTROL 0x1A50 2477*b843c749SSergey Zigachev #define mmDENTIST_DISPCLK_CNTL 0x0124 2478*b843c749SSergey Zigachev #define mmDIG0_AFMT_60958_0 0x1C41 2479*b843c749SSergey Zigachev #define mmDIG0_AFMT_60958_1 0x1C42 2480*b843c749SSergey Zigachev #define mmDIG0_AFMT_60958_2 0x1C48 2481*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_CRC_CONTROL 0x1C43 2482*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_CRC_RESULT 0x1C49 2483*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_DBG_DTO_CNTL 0x1C52 2484*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_INFO0 0x1C3F 2485*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_INFO1 0x1C40 2486*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_PACKET_CONTROL 0x1C4B 2487*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_PACKET_CONTROL2 0x1C17 2488*b843c749SSergey Zigachev #define mmDIG0_AFMT_AUDIO_SRC_CONTROL 0x1C4F 2489*b843c749SSergey Zigachev #define mmDIG0_AFMT_AVI_INFO0 0x1C21 2490*b843c749SSergey Zigachev #define mmDIG0_AFMT_AVI_INFO1 0x1C22 2491*b843c749SSergey Zigachev #define mmDIG0_AFMT_AVI_INFO2 0x1C23 2492*b843c749SSergey Zigachev #define mmDIG0_AFMT_AVI_INFO3 0x1C24 2493*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_0 0x1C28 2494*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_1 0x1C29 2495*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_2 0x1C2A 2496*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_3 0x1C2B 2497*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_4 0x1C2C 2498*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_5 0x1C2D 2499*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_6 0x1C2E 2500*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_7 0x1C2F 2501*b843c749SSergey Zigachev #define mmDIG0_AFMT_GENERIC_HDR 0x1C27 2502*b843c749SSergey Zigachev #define mmDIG0_AFMT_INFOFRAME_CONTROL0 0x1C4D 2503*b843c749SSergey Zigachev #define mmDIG0_AFMT_INTERRUPT_STATUS 0x1C14 2504*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC1_0 0x1C18 2505*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC1_1 0x1C19 2506*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC1_2 0x1C1A 2507*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC1_3 0x1C1B 2508*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC1_4 0x1C1C 2509*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC2_0 0x1C1D 2510*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC2_1 0x1C1E 2511*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC2_2 0x1C1F 2512*b843c749SSergey Zigachev #define mmDIG0_AFMT_ISRC2_3 0x1C20 2513*b843c749SSergey Zigachev #define mmDIG0_AFMT_MPEG_INFO0 0x1C25 2514*b843c749SSergey Zigachev #define mmDIG0_AFMT_MPEG_INFO1 0x1C26 2515*b843c749SSergey Zigachev #define mmDIG0_AFMT_RAMP_CONTROL0 0x1C44 2516*b843c749SSergey Zigachev #define mmDIG0_AFMT_RAMP_CONTROL1 0x1C45 2517*b843c749SSergey Zigachev #define mmDIG0_AFMT_RAMP_CONTROL2 0x1C46 2518*b843c749SSergey Zigachev #define mmDIG0_AFMT_RAMP_CONTROL3 0x1C47 2519*b843c749SSergey Zigachev #define mmDIG0_AFMT_STATUS 0x1C4A 2520*b843c749SSergey Zigachev #define mmDIG0_AFMT_VBI_PACKET_CONTROL 0x1C4C 2521*b843c749SSergey Zigachev #define mmDIG0_DIG_BE_CNTL 0x1C50 2522*b843c749SSergey Zigachev #define mmDIG0_DIG_BE_EN_CNTL 0x1C51 2523*b843c749SSergey Zigachev #define mmDIG0_DIG_CLOCK_PATTERN 0x1C03 2524*b843c749SSergey Zigachev #define mmDIG0_DIG_DISPCLK_SWITCH_CNTL 0x1C08 2525*b843c749SSergey Zigachev #define mmDIG0_DIG_DISPCLK_SWITCH_STATUS 0x1C09 2526*b843c749SSergey Zigachev #define mmDIG0_DIG_FE_CNTL 0x1C00 2527*b843c749SSergey Zigachev #define mmDIG0_DIG_FIFO_STATUS 0x1C0A 2528*b843c749SSergey Zigachev #define mmDIG0_DIG_LANE_ENABLE 0x1C8D 2529*b843c749SSergey Zigachev #define mmDIG0_DIG_OUTPUT_CRC_CNTL 0x1C01 2530*b843c749SSergey Zigachev #define mmDIG0_DIG_OUTPUT_CRC_RESULT 0x1C02 2531*b843c749SSergey Zigachev #define mmDIG0_DIG_RANDOM_PATTERN_SEED 0x1C05 2532*b843c749SSergey Zigachev #define mmDIG0_DIG_TEST_PATTERN 0x1C04 2533*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_32_0 0x1C37 2534*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_32_1 0x1C38 2535*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_44_0 0x1C39 2536*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_44_1 0x1C3A 2537*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_48_0 0x1C3B 2538*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_48_1 0x1C3C 2539*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_PACKET_CONTROL 0x1C0F 2540*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_STATUS_0 0x1C3D 2541*b843c749SSergey Zigachev #define mmDIG0_HDMI_ACR_STATUS_1 0x1C3E 2542*b843c749SSergey Zigachev #define mmDIG0_HDMI_AUDIO_PACKET_CONTROL 0x1C0E 2543*b843c749SSergey Zigachev #define mmDIG0_HDMI_CONTROL 0x1C0C 2544*b843c749SSergey Zigachev #define mmDIG0_HDMI_GC 0x1C16 2545*b843c749SSergey Zigachev #define mmDIG0_HDMI_GENERIC_PACKET_CONTROL0 0x1C13 2546*b843c749SSergey Zigachev #define mmDIG0_HDMI_GENERIC_PACKET_CONTROL1 0x1C30 2547*b843c749SSergey Zigachev #define mmDIG0_HDMI_INFOFRAME_CONTROL0 0x1C11 2548*b843c749SSergey Zigachev #define mmDIG0_HDMI_INFOFRAME_CONTROL1 0x1C12 2549*b843c749SSergey Zigachev #define mmDIG0_HDMI_STATUS 0x1C0D 2550*b843c749SSergey Zigachev #define mmDIG0_HDMI_VBI_PACKET_CONTROL 0x1C10 2551*b843c749SSergey Zigachev #define mmDIG0_LVDS_DATA_CNTL 0x1C8C 2552*b843c749SSergey Zigachev #define mmDIG0_TMDS_CNTL 0x1C7C 2553*b843c749SSergey Zigachev #define mmDIG0_TMDS_CONTROL0_FEEDBACK 0x1C7E 2554*b843c749SSergey Zigachev #define mmDIG0_TMDS_CONTROL_CHAR 0x1C7D 2555*b843c749SSergey Zigachev #define mmDIG0_TMDS_CTL0_1_GEN_CNTL 0x1C86 2556*b843c749SSergey Zigachev #define mmDIG0_TMDS_CTL2_3_GEN_CNTL 0x1C87 2557*b843c749SSergey Zigachev #define mmDIG0_TMDS_CTL_BITS 0x1C83 2558*b843c749SSergey Zigachev #define mmDIG0_TMDS_DCBALANCER_CONTROL 0x1C84 2559*b843c749SSergey Zigachev #define mmDIG0_TMDS_DEBUG 0x1C82 2560*b843c749SSergey Zigachev #define mmDIG0_TMDS_STEREOSYNC_CTL_SEL 0x1C7F 2561*b843c749SSergey Zigachev #define mmDIG0_TMDS_SYNC_CHAR_PATTERN_0_1 0x1C80 2562*b843c749SSergey Zigachev #define mmDIG0_TMDS_SYNC_CHAR_PATTERN_2_3 0x1C81 2563*b843c749SSergey Zigachev #define mmDIG1_AFMT_60958_0 0x1F41 2564*b843c749SSergey Zigachev #define mmDIG1_AFMT_60958_1 0x1F42 2565*b843c749SSergey Zigachev #define mmDIG1_AFMT_60958_2 0x1F48 2566*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_CRC_CONTROL 0x1F43 2567*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_CRC_RESULT 0x1F49 2568*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_DBG_DTO_CNTL 0x1F52 2569*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_INFO0 0x1F3F 2570*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_INFO1 0x1F40 2571*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_PACKET_CONTROL 0x1F4B 2572*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_PACKET_CONTROL2 0x1F17 2573*b843c749SSergey Zigachev #define mmDIG1_AFMT_AUDIO_SRC_CONTROL 0x1F4F 2574*b843c749SSergey Zigachev #define mmDIG1_AFMT_AVI_INFO0 0x1F21 2575*b843c749SSergey Zigachev #define mmDIG1_AFMT_AVI_INFO1 0x1F22 2576*b843c749SSergey Zigachev #define mmDIG1_AFMT_AVI_INFO2 0x1F23 2577*b843c749SSergey Zigachev #define mmDIG1_AFMT_AVI_INFO3 0x1F24 2578*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_0 0x1F28 2579*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_1 0x1F29 2580*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_2 0x1F2A 2581*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_3 0x1F2B 2582*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_4 0x1F2C 2583*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_5 0x1F2D 2584*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_6 0x1F2E 2585*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_7 0x1F2F 2586*b843c749SSergey Zigachev #define mmDIG1_AFMT_GENERIC_HDR 0x1F27 2587*b843c749SSergey Zigachev #define mmDIG1_AFMT_INFOFRAME_CONTROL0 0x1F4D 2588*b843c749SSergey Zigachev #define mmDIG1_AFMT_INTERRUPT_STATUS 0x1F14 2589*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC1_0 0x1F18 2590*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC1_1 0x1F19 2591*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC1_2 0x1F1A 2592*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC1_3 0x1F1B 2593*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC1_4 0x1F1C 2594*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC2_0 0x1F1D 2595*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC2_1 0x1F1E 2596*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC2_2 0x1F1F 2597*b843c749SSergey Zigachev #define mmDIG1_AFMT_ISRC2_3 0x1F20 2598*b843c749SSergey Zigachev #define mmDIG1_AFMT_MPEG_INFO0 0x1F25 2599*b843c749SSergey Zigachev #define mmDIG1_AFMT_MPEG_INFO1 0x1F26 2600*b843c749SSergey Zigachev #define mmDIG1_AFMT_RAMP_CONTROL0 0x1F44 2601*b843c749SSergey Zigachev #define mmDIG1_AFMT_RAMP_CONTROL1 0x1F45 2602*b843c749SSergey Zigachev #define mmDIG1_AFMT_RAMP_CONTROL2 0x1F46 2603*b843c749SSergey Zigachev #define mmDIG1_AFMT_RAMP_CONTROL3 0x1F47 2604*b843c749SSergey Zigachev #define mmDIG1_AFMT_STATUS 0x1F4A 2605*b843c749SSergey Zigachev #define mmDIG1_AFMT_VBI_PACKET_CONTROL 0x1F4C 2606*b843c749SSergey Zigachev #define mmDIG1_DIG_BE_CNTL 0x1F50 2607*b843c749SSergey Zigachev #define mmDIG1_DIG_BE_EN_CNTL 0x1F51 2608*b843c749SSergey Zigachev #define mmDIG1_DIG_CLOCK_PATTERN 0x1F03 2609*b843c749SSergey Zigachev #define mmDIG1_DIG_DISPCLK_SWITCH_CNTL 0x1F08 2610*b843c749SSergey Zigachev #define mmDIG1_DIG_DISPCLK_SWITCH_STATUS 0x1F09 2611*b843c749SSergey Zigachev #define mmDIG1_DIG_FE_CNTL 0x1F00 2612*b843c749SSergey Zigachev #define mmDIG1_DIG_FIFO_STATUS 0x1F0A 2613*b843c749SSergey Zigachev #define mmDIG1_DIG_LANE_ENABLE 0x1F8D 2614*b843c749SSergey Zigachev #define mmDIG1_DIG_OUTPUT_CRC_CNTL 0x1F01 2615*b843c749SSergey Zigachev #define mmDIG1_DIG_OUTPUT_CRC_RESULT 0x1F02 2616*b843c749SSergey Zigachev #define mmDIG1_DIG_RANDOM_PATTERN_SEED 0x1F05 2617*b843c749SSergey Zigachev #define mmDIG1_DIG_TEST_PATTERN 0x1F04 2618*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_32_0 0x1F37 2619*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_32_1 0x1F38 2620*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_44_0 0x1F39 2621*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_44_1 0x1F3A 2622*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_48_0 0x1F3B 2623*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_48_1 0x1F3C 2624*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_PACKET_CONTROL 0x1F0F 2625*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_STATUS_0 0x1F3D 2626*b843c749SSergey Zigachev #define mmDIG1_HDMI_ACR_STATUS_1 0x1F3E 2627*b843c749SSergey Zigachev #define mmDIG1_HDMI_AUDIO_PACKET_CONTROL 0x1F0E 2628*b843c749SSergey Zigachev #define mmDIG1_HDMI_CONTROL 0x1F0C 2629*b843c749SSergey Zigachev #define mmDIG1_HDMI_GC 0x1F16 2630*b843c749SSergey Zigachev #define mmDIG1_HDMI_GENERIC_PACKET_CONTROL0 0x1F13 2631*b843c749SSergey Zigachev #define mmDIG1_HDMI_GENERIC_PACKET_CONTROL1 0x1F30 2632*b843c749SSergey Zigachev #define mmDIG1_HDMI_INFOFRAME_CONTROL0 0x1F11 2633*b843c749SSergey Zigachev #define mmDIG1_HDMI_INFOFRAME_CONTROL1 0x1F12 2634*b843c749SSergey Zigachev #define mmDIG1_HDMI_STATUS 0x1F0D 2635*b843c749SSergey Zigachev #define mmDIG1_HDMI_VBI_PACKET_CONTROL 0x1F10 2636*b843c749SSergey Zigachev #define mmDIG1_LVDS_DATA_CNTL 0x1F8C 2637*b843c749SSergey Zigachev #define mmDIG1_TMDS_CNTL 0x1F7C 2638*b843c749SSergey Zigachev #define mmDIG1_TMDS_CONTROL0_FEEDBACK 0x1F7E 2639*b843c749SSergey Zigachev #define mmDIG1_TMDS_CONTROL_CHAR 0x1F7D 2640*b843c749SSergey Zigachev #define mmDIG1_TMDS_CTL0_1_GEN_CNTL 0x1F86 2641*b843c749SSergey Zigachev #define mmDIG1_TMDS_CTL2_3_GEN_CNTL 0x1F87 2642*b843c749SSergey Zigachev #define mmDIG1_TMDS_CTL_BITS 0x1F83 2643*b843c749SSergey Zigachev #define mmDIG1_TMDS_DCBALANCER_CONTROL 0x1F84 2644*b843c749SSergey Zigachev #define mmDIG1_TMDS_DEBUG 0x1F82 2645*b843c749SSergey Zigachev #define mmDIG1_TMDS_STEREOSYNC_CTL_SEL 0x1F7F 2646*b843c749SSergey Zigachev #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_0_1 0x1F80 2647*b843c749SSergey Zigachev #define mmDIG1_TMDS_SYNC_CHAR_PATTERN_2_3 0x1F81 2648*b843c749SSergey Zigachev #define mmDIG2_AFMT_60958_0 0x4241 2649*b843c749SSergey Zigachev #define mmDIG2_AFMT_60958_1 0x4242 2650*b843c749SSergey Zigachev #define mmDIG2_AFMT_60958_2 0x4248 2651*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_CRC_CONTROL 0x4243 2652*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_CRC_RESULT 0x4249 2653*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_DBG_DTO_CNTL 0x4252 2654*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_INFO0 0x423F 2655*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_INFO1 0x4240 2656*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_PACKET_CONTROL 0x424B 2657*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_PACKET_CONTROL2 0x4217 2658*b843c749SSergey Zigachev #define mmDIG2_AFMT_AUDIO_SRC_CONTROL 0x424F 2659*b843c749SSergey Zigachev #define mmDIG2_AFMT_AVI_INFO0 0x4221 2660*b843c749SSergey Zigachev #define mmDIG2_AFMT_AVI_INFO1 0x4222 2661*b843c749SSergey Zigachev #define mmDIG2_AFMT_AVI_INFO2 0x4223 2662*b843c749SSergey Zigachev #define mmDIG2_AFMT_AVI_INFO3 0x4224 2663*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_0 0x4228 2664*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_1 0x4229 2665*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_2 0x422A 2666*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_3 0x422B 2667*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_4 0x422C 2668*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_5 0x422D 2669*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_6 0x422E 2670*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_7 0x422F 2671*b843c749SSergey Zigachev #define mmDIG2_AFMT_GENERIC_HDR 0x4227 2672*b843c749SSergey Zigachev #define mmDIG2_AFMT_INFOFRAME_CONTROL0 0x424D 2673*b843c749SSergey Zigachev #define mmDIG2_AFMT_INTERRUPT_STATUS 0x4214 2674*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC1_0 0x4218 2675*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC1_1 0x4219 2676*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC1_2 0x421A 2677*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC1_3 0x421B 2678*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC1_4 0x421C 2679*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC2_0 0x421D 2680*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC2_1 0x421E 2681*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC2_2 0x421F 2682*b843c749SSergey Zigachev #define mmDIG2_AFMT_ISRC2_3 0x4220 2683*b843c749SSergey Zigachev #define mmDIG2_AFMT_MPEG_INFO0 0x4225 2684*b843c749SSergey Zigachev #define mmDIG2_AFMT_MPEG_INFO1 0x4226 2685*b843c749SSergey Zigachev #define mmDIG2_AFMT_RAMP_CONTROL0 0x4244 2686*b843c749SSergey Zigachev #define mmDIG2_AFMT_RAMP_CONTROL1 0x4245 2687*b843c749SSergey Zigachev #define mmDIG2_AFMT_RAMP_CONTROL2 0x4246 2688*b843c749SSergey Zigachev #define mmDIG2_AFMT_RAMP_CONTROL3 0x4247 2689*b843c749SSergey Zigachev #define mmDIG2_AFMT_STATUS 0x424A 2690*b843c749SSergey Zigachev #define mmDIG2_AFMT_VBI_PACKET_CONTROL 0x424C 2691*b843c749SSergey Zigachev #define mmDIG2_DIG_BE_CNTL 0x4250 2692*b843c749SSergey Zigachev #define mmDIG2_DIG_BE_EN_CNTL 0x4251 2693*b843c749SSergey Zigachev #define mmDIG2_DIG_CLOCK_PATTERN 0x4203 2694*b843c749SSergey Zigachev #define mmDIG2_DIG_DISPCLK_SWITCH_CNTL 0x4208 2695*b843c749SSergey Zigachev #define mmDIG2_DIG_DISPCLK_SWITCH_STATUS 0x4209 2696*b843c749SSergey Zigachev #define mmDIG2_DIG_FE_CNTL 0x4200 2697*b843c749SSergey Zigachev #define mmDIG2_DIG_FIFO_STATUS 0x420A 2698*b843c749SSergey Zigachev #define mmDIG2_DIG_LANE_ENABLE 0x428D 2699*b843c749SSergey Zigachev #define mmDIG2_DIG_OUTPUT_CRC_CNTL 0x4201 2700*b843c749SSergey Zigachev #define mmDIG2_DIG_OUTPUT_CRC_RESULT 0x4202 2701*b843c749SSergey Zigachev #define mmDIG2_DIG_RANDOM_PATTERN_SEED 0x4205 2702*b843c749SSergey Zigachev #define mmDIG2_DIG_TEST_PATTERN 0x4204 2703*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_32_0 0x4237 2704*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_32_1 0x4238 2705*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_44_0 0x4239 2706*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_44_1 0x423A 2707*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_48_0 0x423B 2708*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_48_1 0x423C 2709*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_PACKET_CONTROL 0x420F 2710*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_STATUS_0 0x423D 2711*b843c749SSergey Zigachev #define mmDIG2_HDMI_ACR_STATUS_1 0x423E 2712*b843c749SSergey Zigachev #define mmDIG2_HDMI_AUDIO_PACKET_CONTROL 0x420E 2713*b843c749SSergey Zigachev #define mmDIG2_HDMI_CONTROL 0x420C 2714*b843c749SSergey Zigachev #define mmDIG2_HDMI_GC 0x4216 2715*b843c749SSergey Zigachev #define mmDIG2_HDMI_GENERIC_PACKET_CONTROL0 0x4213 2716*b843c749SSergey Zigachev #define mmDIG2_HDMI_GENERIC_PACKET_CONTROL1 0x4230 2717*b843c749SSergey Zigachev #define mmDIG2_HDMI_INFOFRAME_CONTROL0 0x4211 2718*b843c749SSergey Zigachev #define mmDIG2_HDMI_INFOFRAME_CONTROL1 0x4212 2719*b843c749SSergey Zigachev #define mmDIG2_HDMI_STATUS 0x420D 2720*b843c749SSergey Zigachev #define mmDIG2_HDMI_VBI_PACKET_CONTROL 0x4210 2721*b843c749SSergey Zigachev #define mmDIG2_LVDS_DATA_CNTL 0x428C 2722*b843c749SSergey Zigachev #define mmDIG2_TMDS_CNTL 0x427C 2723*b843c749SSergey Zigachev #define mmDIG2_TMDS_CONTROL0_FEEDBACK 0x427E 2724*b843c749SSergey Zigachev #define mmDIG2_TMDS_CONTROL_CHAR 0x427D 2725*b843c749SSergey Zigachev #define mmDIG2_TMDS_CTL0_1_GEN_CNTL 0x4286 2726*b843c749SSergey Zigachev #define mmDIG2_TMDS_CTL2_3_GEN_CNTL 0x4287 2727*b843c749SSergey Zigachev #define mmDIG2_TMDS_CTL_BITS 0x4283 2728*b843c749SSergey Zigachev #define mmDIG2_TMDS_DCBALANCER_CONTROL 0x4284 2729*b843c749SSergey Zigachev #define mmDIG2_TMDS_DEBUG 0x4282 2730*b843c749SSergey Zigachev #define mmDIG2_TMDS_STEREOSYNC_CTL_SEL 0x427F 2731*b843c749SSergey Zigachev #define mmDIG2_TMDS_SYNC_CHAR_PATTERN_0_1 0x4280 2732*b843c749SSergey Zigachev #define mmDIG2_TMDS_SYNC_CHAR_PATTERN_2_3 0x4281 2733*b843c749SSergey Zigachev #define mmDIG3_AFMT_60958_0 0x4541 2734*b843c749SSergey Zigachev #define mmDIG3_AFMT_60958_1 0x4542 2735*b843c749SSergey Zigachev #define mmDIG3_AFMT_60958_2 0x4548 2736*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_CRC_CONTROL 0x4543 2737*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_CRC_RESULT 0x4549 2738*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_DBG_DTO_CNTL 0x4552 2739*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_INFO0 0x453F 2740*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_INFO1 0x4540 2741*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_PACKET_CONTROL 0x454B 2742*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_PACKET_CONTROL2 0x4517 2743*b843c749SSergey Zigachev #define mmDIG3_AFMT_AUDIO_SRC_CONTROL 0x454F 2744*b843c749SSergey Zigachev #define mmDIG3_AFMT_AVI_INFO0 0x4521 2745*b843c749SSergey Zigachev #define mmDIG3_AFMT_AVI_INFO1 0x4522 2746*b843c749SSergey Zigachev #define mmDIG3_AFMT_AVI_INFO2 0x4523 2747*b843c749SSergey Zigachev #define mmDIG3_AFMT_AVI_INFO3 0x4524 2748*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_0 0x4528 2749*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_1 0x4529 2750*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_2 0x452A 2751*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_3 0x452B 2752*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_4 0x452C 2753*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_5 0x452D 2754*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_6 0x452E 2755*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_7 0x452F 2756*b843c749SSergey Zigachev #define mmDIG3_AFMT_GENERIC_HDR 0x4527 2757*b843c749SSergey Zigachev #define mmDIG3_AFMT_INFOFRAME_CONTROL0 0x454D 2758*b843c749SSergey Zigachev #define mmDIG3_AFMT_INTERRUPT_STATUS 0x4514 2759*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC1_0 0x4518 2760*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC1_1 0x4519 2761*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC1_2 0x451A 2762*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC1_3 0x451B 2763*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC1_4 0x451C 2764*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC2_0 0x451D 2765*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC2_1 0x451E 2766*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC2_2 0x451F 2767*b843c749SSergey Zigachev #define mmDIG3_AFMT_ISRC2_3 0x4520 2768*b843c749SSergey Zigachev #define mmDIG3_AFMT_MPEG_INFO0 0x4525 2769*b843c749SSergey Zigachev #define mmDIG3_AFMT_MPEG_INFO1 0x4526 2770*b843c749SSergey Zigachev #define mmDIG3_AFMT_RAMP_CONTROL0 0x4544 2771*b843c749SSergey Zigachev #define mmDIG3_AFMT_RAMP_CONTROL1 0x4545 2772*b843c749SSergey Zigachev #define mmDIG3_AFMT_RAMP_CONTROL2 0x4546 2773*b843c749SSergey Zigachev #define mmDIG3_AFMT_RAMP_CONTROL3 0x4547 2774*b843c749SSergey Zigachev #define mmDIG3_AFMT_STATUS 0x454A 2775*b843c749SSergey Zigachev #define mmDIG3_AFMT_VBI_PACKET_CONTROL 0x454C 2776*b843c749SSergey Zigachev #define mmDIG3_DIG_BE_CNTL 0x4550 2777*b843c749SSergey Zigachev #define mmDIG3_DIG_BE_EN_CNTL 0x4551 2778*b843c749SSergey Zigachev #define mmDIG3_DIG_CLOCK_PATTERN 0x4503 2779*b843c749SSergey Zigachev #define mmDIG3_DIG_DISPCLK_SWITCH_CNTL 0x4508 2780*b843c749SSergey Zigachev #define mmDIG3_DIG_DISPCLK_SWITCH_STATUS 0x4509 2781*b843c749SSergey Zigachev #define mmDIG3_DIG_FE_CNTL 0x4500 2782*b843c749SSergey Zigachev #define mmDIG3_DIG_FIFO_STATUS 0x450A 2783*b843c749SSergey Zigachev #define mmDIG3_DIG_LANE_ENABLE 0x458D 2784*b843c749SSergey Zigachev #define mmDIG3_DIG_OUTPUT_CRC_CNTL 0x4501 2785*b843c749SSergey Zigachev #define mmDIG3_DIG_OUTPUT_CRC_RESULT 0x4502 2786*b843c749SSergey Zigachev #define mmDIG3_DIG_RANDOM_PATTERN_SEED 0x4505 2787*b843c749SSergey Zigachev #define mmDIG3_DIG_TEST_PATTERN 0x4504 2788*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_32_0 0x4537 2789*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_32_1 0x4538 2790*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_44_0 0x4539 2791*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_44_1 0x453A 2792*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_48_0 0x453B 2793*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_48_1 0x453C 2794*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_PACKET_CONTROL 0x450F 2795*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_STATUS_0 0x453D 2796*b843c749SSergey Zigachev #define mmDIG3_HDMI_ACR_STATUS_1 0x453E 2797*b843c749SSergey Zigachev #define mmDIG3_HDMI_AUDIO_PACKET_CONTROL 0x450E 2798*b843c749SSergey Zigachev #define mmDIG3_HDMI_CONTROL 0x450C 2799*b843c749SSergey Zigachev #define mmDIG3_HDMI_GC 0x4516 2800*b843c749SSergey Zigachev #define mmDIG3_HDMI_GENERIC_PACKET_CONTROL0 0x4513 2801*b843c749SSergey Zigachev #define mmDIG3_HDMI_GENERIC_PACKET_CONTROL1 0x4530 2802*b843c749SSergey Zigachev #define mmDIG3_HDMI_INFOFRAME_CONTROL0 0x4511 2803*b843c749SSergey Zigachev #define mmDIG3_HDMI_INFOFRAME_CONTROL1 0x4512 2804*b843c749SSergey Zigachev #define mmDIG3_HDMI_STATUS 0x450D 2805*b843c749SSergey Zigachev #define mmDIG3_HDMI_VBI_PACKET_CONTROL 0x4510 2806*b843c749SSergey Zigachev #define mmDIG3_LVDS_DATA_CNTL 0x458C 2807*b843c749SSergey Zigachev #define mmDIG3_TMDS_CNTL 0x457C 2808*b843c749SSergey Zigachev #define mmDIG3_TMDS_CONTROL0_FEEDBACK 0x457E 2809*b843c749SSergey Zigachev #define mmDIG3_TMDS_CONTROL_CHAR 0x457D 2810*b843c749SSergey Zigachev #define mmDIG3_TMDS_CTL0_1_GEN_CNTL 0x4586 2811*b843c749SSergey Zigachev #define mmDIG3_TMDS_CTL2_3_GEN_CNTL 0x4587 2812*b843c749SSergey Zigachev #define mmDIG3_TMDS_CTL_BITS 0x4583 2813*b843c749SSergey Zigachev #define mmDIG3_TMDS_DCBALANCER_CONTROL 0x4584 2814*b843c749SSergey Zigachev #define mmDIG3_TMDS_DEBUG 0x4582 2815*b843c749SSergey Zigachev #define mmDIG3_TMDS_STEREOSYNC_CTL_SEL 0x457F 2816*b843c749SSergey Zigachev #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_0_1 0x4580 2817*b843c749SSergey Zigachev #define mmDIG3_TMDS_SYNC_CHAR_PATTERN_2_3 0x4581 2818*b843c749SSergey Zigachev #define mmDIG4_AFMT_60958_0 0x4841 2819*b843c749SSergey Zigachev #define mmDIG4_AFMT_60958_1 0x4842 2820*b843c749SSergey Zigachev #define mmDIG4_AFMT_60958_2 0x4848 2821*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_CRC_CONTROL 0x4843 2822*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_CRC_RESULT 0x4849 2823*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_DBG_DTO_CNTL 0x4852 2824*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_INFO0 0x483F 2825*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_INFO1 0x4840 2826*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_PACKET_CONTROL 0x484B 2827*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_PACKET_CONTROL2 0x4817 2828*b843c749SSergey Zigachev #define mmDIG4_AFMT_AUDIO_SRC_CONTROL 0x484F 2829*b843c749SSergey Zigachev #define mmDIG4_AFMT_AVI_INFO0 0x4821 2830*b843c749SSergey Zigachev #define mmDIG4_AFMT_AVI_INFO1 0x4822 2831*b843c749SSergey Zigachev #define mmDIG4_AFMT_AVI_INFO2 0x4823 2832*b843c749SSergey Zigachev #define mmDIG4_AFMT_AVI_INFO3 0x4824 2833*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_0 0x4828 2834*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_1 0x4829 2835*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_2 0x482A 2836*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_3 0x482B 2837*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_4 0x482C 2838*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_5 0x482D 2839*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_6 0x482E 2840*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_7 0x482F 2841*b843c749SSergey Zigachev #define mmDIG4_AFMT_GENERIC_HDR 0x4827 2842*b843c749SSergey Zigachev #define mmDIG4_AFMT_INFOFRAME_CONTROL0 0x484D 2843*b843c749SSergey Zigachev #define mmDIG4_AFMT_INTERRUPT_STATUS 0x4814 2844*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC1_0 0x4818 2845*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC1_1 0x4819 2846*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC1_2 0x481A 2847*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC1_3 0x481B 2848*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC1_4 0x481C 2849*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC2_0 0x481D 2850*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC2_1 0x481E 2851*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC2_2 0x481F 2852*b843c749SSergey Zigachev #define mmDIG4_AFMT_ISRC2_3 0x4820 2853*b843c749SSergey Zigachev #define mmDIG4_AFMT_MPEG_INFO0 0x4825 2854*b843c749SSergey Zigachev #define mmDIG4_AFMT_MPEG_INFO1 0x4826 2855*b843c749SSergey Zigachev #define mmDIG4_AFMT_RAMP_CONTROL0 0x4844 2856*b843c749SSergey Zigachev #define mmDIG4_AFMT_RAMP_CONTROL1 0x4845 2857*b843c749SSergey Zigachev #define mmDIG4_AFMT_RAMP_CONTROL2 0x4846 2858*b843c749SSergey Zigachev #define mmDIG4_AFMT_RAMP_CONTROL3 0x4847 2859*b843c749SSergey Zigachev #define mmDIG4_AFMT_STATUS 0x484A 2860*b843c749SSergey Zigachev #define mmDIG4_AFMT_VBI_PACKET_CONTROL 0x484C 2861*b843c749SSergey Zigachev #define mmDIG4_DIG_BE_CNTL 0x4850 2862*b843c749SSergey Zigachev #define mmDIG4_DIG_BE_EN_CNTL 0x4851 2863*b843c749SSergey Zigachev #define mmDIG4_DIG_CLOCK_PATTERN 0x4803 2864*b843c749SSergey Zigachev #define mmDIG4_DIG_DISPCLK_SWITCH_CNTL 0x4808 2865*b843c749SSergey Zigachev #define mmDIG4_DIG_DISPCLK_SWITCH_STATUS 0x4809 2866*b843c749SSergey Zigachev #define mmDIG4_DIG_FE_CNTL 0x4800 2867*b843c749SSergey Zigachev #define mmDIG4_DIG_FIFO_STATUS 0x480A 2868*b843c749SSergey Zigachev #define mmDIG4_DIG_LANE_ENABLE 0x488D 2869*b843c749SSergey Zigachev #define mmDIG4_DIG_OUTPUT_CRC_CNTL 0x4801 2870*b843c749SSergey Zigachev #define mmDIG4_DIG_OUTPUT_CRC_RESULT 0x4802 2871*b843c749SSergey Zigachev #define mmDIG4_DIG_RANDOM_PATTERN_SEED 0x4805 2872*b843c749SSergey Zigachev #define mmDIG4_DIG_TEST_PATTERN 0x4804 2873*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_32_0 0x4837 2874*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_32_1 0x4838 2875*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_44_0 0x4839 2876*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_44_1 0x483A 2877*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_48_0 0x483B 2878*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_48_1 0x483C 2879*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_PACKET_CONTROL 0x480F 2880*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_STATUS_0 0x483D 2881*b843c749SSergey Zigachev #define mmDIG4_HDMI_ACR_STATUS_1 0x483E 2882*b843c749SSergey Zigachev #define mmDIG4_HDMI_AUDIO_PACKET_CONTROL 0x480E 2883*b843c749SSergey Zigachev #define mmDIG4_HDMI_CONTROL 0x480C 2884*b843c749SSergey Zigachev #define mmDIG4_HDMI_GC 0x4816 2885*b843c749SSergey Zigachev #define mmDIG4_HDMI_GENERIC_PACKET_CONTROL0 0x4813 2886*b843c749SSergey Zigachev #define mmDIG4_HDMI_GENERIC_PACKET_CONTROL1 0x4830 2887*b843c749SSergey Zigachev #define mmDIG4_HDMI_INFOFRAME_CONTROL0 0x4811 2888*b843c749SSergey Zigachev #define mmDIG4_HDMI_INFOFRAME_CONTROL1 0x4812 2889*b843c749SSergey Zigachev #define mmDIG4_HDMI_STATUS 0x480D 2890*b843c749SSergey Zigachev #define mmDIG4_HDMI_VBI_PACKET_CONTROL 0x4810 2891*b843c749SSergey Zigachev #define mmDIG4_LVDS_DATA_CNTL 0x488C 2892*b843c749SSergey Zigachev #define mmDIG4_TMDS_CNTL 0x487C 2893*b843c749SSergey Zigachev #define mmDIG4_TMDS_CONTROL0_FEEDBACK 0x487E 2894*b843c749SSergey Zigachev #define mmDIG4_TMDS_CONTROL_CHAR 0x487D 2895*b843c749SSergey Zigachev #define mmDIG4_TMDS_CTL0_1_GEN_CNTL 0x4886 2896*b843c749SSergey Zigachev #define mmDIG4_TMDS_CTL2_3_GEN_CNTL 0x4887 2897*b843c749SSergey Zigachev #define mmDIG4_TMDS_CTL_BITS 0x4883 2898*b843c749SSergey Zigachev #define mmDIG4_TMDS_DCBALANCER_CONTROL 0x4884 2899*b843c749SSergey Zigachev #define mmDIG4_TMDS_DEBUG 0x4882 2900*b843c749SSergey Zigachev #define mmDIG4_TMDS_STEREOSYNC_CTL_SEL 0x487F 2901*b843c749SSergey Zigachev #define mmDIG4_TMDS_SYNC_CHAR_PATTERN_0_1 0x4880 2902*b843c749SSergey Zigachev #define mmDIG4_TMDS_SYNC_CHAR_PATTERN_2_3 0x4881 2903*b843c749SSergey Zigachev #define mmDIG5_AFMT_60958_0 0x4B41 2904*b843c749SSergey Zigachev #define mmDIG5_AFMT_60958_1 0x4B42 2905*b843c749SSergey Zigachev #define mmDIG5_AFMT_60958_2 0x4B48 2906*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_CRC_CONTROL 0x4B43 2907*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_CRC_RESULT 0x4B49 2908*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_DBG_DTO_CNTL 0x4B52 2909*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_INFO0 0x4B3F 2910*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_INFO1 0x4B40 2911*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_PACKET_CONTROL 0x4B4B 2912*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_PACKET_CONTROL2 0x4B17 2913*b843c749SSergey Zigachev #define mmDIG5_AFMT_AUDIO_SRC_CONTROL 0x4B4F 2914*b843c749SSergey Zigachev #define mmDIG5_AFMT_AVI_INFO0 0x4B21 2915*b843c749SSergey Zigachev #define mmDIG5_AFMT_AVI_INFO1 0x4B22 2916*b843c749SSergey Zigachev #define mmDIG5_AFMT_AVI_INFO2 0x4B23 2917*b843c749SSergey Zigachev #define mmDIG5_AFMT_AVI_INFO3 0x4B24 2918*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_0 0x4B28 2919*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_1 0x4B29 2920*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_2 0x4B2A 2921*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_3 0x4B2B 2922*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_4 0x4B2C 2923*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_5 0x4B2D 2924*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_6 0x4B2E 2925*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_7 0x4B2F 2926*b843c749SSergey Zigachev #define mmDIG5_AFMT_GENERIC_HDR 0x4B27 2927*b843c749SSergey Zigachev #define mmDIG5_AFMT_INFOFRAME_CONTROL0 0x4B4D 2928*b843c749SSergey Zigachev #define mmDIG5_AFMT_INTERRUPT_STATUS 0x4B14 2929*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC1_0 0x4B18 2930*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC1_1 0x4B19 2931*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC1_2 0x4B1A 2932*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC1_3 0x4B1B 2933*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC1_4 0x4B1C 2934*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC2_0 0x4B1D 2935*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC2_1 0x4B1E 2936*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC2_2 0x4B1F 2937*b843c749SSergey Zigachev #define mmDIG5_AFMT_ISRC2_3 0x4B20 2938*b843c749SSergey Zigachev #define mmDIG5_AFMT_MPEG_INFO0 0x4B25 2939*b843c749SSergey Zigachev #define mmDIG5_AFMT_MPEG_INFO1 0x4B26 2940*b843c749SSergey Zigachev #define mmDIG5_AFMT_RAMP_CONTROL0 0x4B44 2941*b843c749SSergey Zigachev #define mmDIG5_AFMT_RAMP_CONTROL1 0x4B45 2942*b843c749SSergey Zigachev #define mmDIG5_AFMT_RAMP_CONTROL2 0x4B46 2943*b843c749SSergey Zigachev #define mmDIG5_AFMT_RAMP_CONTROL3 0x4B47 2944*b843c749SSergey Zigachev #define mmDIG5_AFMT_STATUS 0x4B4A 2945*b843c749SSergey Zigachev #define mmDIG5_AFMT_VBI_PACKET_CONTROL 0x4B4C 2946*b843c749SSergey Zigachev #define mmDIG5_DIG_BE_CNTL 0x4B50 2947*b843c749SSergey Zigachev #define mmDIG5_DIG_BE_EN_CNTL 0x4B51 2948*b843c749SSergey Zigachev #define mmDIG5_DIG_CLOCK_PATTERN 0x4B03 2949*b843c749SSergey Zigachev #define mmDIG5_DIG_DISPCLK_SWITCH_CNTL 0x4B08 2950*b843c749SSergey Zigachev #define mmDIG5_DIG_DISPCLK_SWITCH_STATUS 0x4B09 2951*b843c749SSergey Zigachev #define mmDIG5_DIG_FE_CNTL 0x4B00 2952*b843c749SSergey Zigachev #define mmDIG5_DIG_FIFO_STATUS 0x4B0A 2953*b843c749SSergey Zigachev #define mmDIG5_DIG_LANE_ENABLE 0x4B8D 2954*b843c749SSergey Zigachev #define mmDIG5_DIG_OUTPUT_CRC_CNTL 0x4B01 2955*b843c749SSergey Zigachev #define mmDIG5_DIG_OUTPUT_CRC_RESULT 0x4B02 2956*b843c749SSergey Zigachev #define mmDIG5_DIG_RANDOM_PATTERN_SEED 0x4B05 2957*b843c749SSergey Zigachev #define mmDIG5_DIG_TEST_PATTERN 0x4B04 2958*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_32_0 0x4B37 2959*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_32_1 0x4B38 2960*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_44_0 0x4B39 2961*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_44_1 0x4B3A 2962*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_48_0 0x4B3B 2963*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_48_1 0x4B3C 2964*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_PACKET_CONTROL 0x4B0F 2965*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_STATUS_0 0x4B3D 2966*b843c749SSergey Zigachev #define mmDIG5_HDMI_ACR_STATUS_1 0x4B3E 2967*b843c749SSergey Zigachev #define mmDIG5_HDMI_AUDIO_PACKET_CONTROL 0x4B0E 2968*b843c749SSergey Zigachev #define mmDIG5_HDMI_CONTROL 0x4B0C 2969*b843c749SSergey Zigachev #define mmDIG5_HDMI_GC 0x4B16 2970*b843c749SSergey Zigachev #define mmDIG5_HDMI_GENERIC_PACKET_CONTROL0 0x4B13 2971*b843c749SSergey Zigachev #define mmDIG5_HDMI_GENERIC_PACKET_CONTROL1 0x4B30 2972*b843c749SSergey Zigachev #define mmDIG5_HDMI_INFOFRAME_CONTROL0 0x4B11 2973*b843c749SSergey Zigachev #define mmDIG5_HDMI_INFOFRAME_CONTROL1 0x4B12 2974*b843c749SSergey Zigachev #define mmDIG5_HDMI_STATUS 0x4B0D 2975*b843c749SSergey Zigachev #define mmDIG5_HDMI_VBI_PACKET_CONTROL 0x4B10 2976*b843c749SSergey Zigachev #define mmDIG5_LVDS_DATA_CNTL 0x4B8C 2977*b843c749SSergey Zigachev #define mmDIG5_TMDS_CNTL 0x4B7C 2978*b843c749SSergey Zigachev #define mmDIG5_TMDS_CONTROL0_FEEDBACK 0x4B7E 2979*b843c749SSergey Zigachev #define mmDIG5_TMDS_CONTROL_CHAR 0x4B7D 2980*b843c749SSergey Zigachev #define mmDIG5_TMDS_CTL0_1_GEN_CNTL 0x4B86 2981*b843c749SSergey Zigachev #define mmDIG5_TMDS_CTL2_3_GEN_CNTL 0x4B87 2982*b843c749SSergey Zigachev #define mmDIG5_TMDS_CTL_BITS 0x4B83 2983*b843c749SSergey Zigachev #define mmDIG5_TMDS_DCBALANCER_CONTROL 0x4B84 2984*b843c749SSergey Zigachev #define mmDIG5_TMDS_DEBUG 0x4B82 2985*b843c749SSergey Zigachev #define mmDIG5_TMDS_STEREOSYNC_CTL_SEL 0x4B7F 2986*b843c749SSergey Zigachev #define mmDIG5_TMDS_SYNC_CHAR_PATTERN_0_1 0x4B80 2987*b843c749SSergey Zigachev #define mmDIG5_TMDS_SYNC_CHAR_PATTERN_2_3 0x4B81 2988*b843c749SSergey Zigachev #define mmDIG_BE_CNTL 0x1C50 2989*b843c749SSergey Zigachev #define mmDIG_BE_EN_CNTL 0x1C51 2990*b843c749SSergey Zigachev #define mmDIG_CLOCK_PATTERN 0x1C03 2991*b843c749SSergey Zigachev #define mmDIG_DISPCLK_SWITCH_CNTL 0x1C08 2992*b843c749SSergey Zigachev #define mmDIG_DISPCLK_SWITCH_STATUS 0x1C09 2993*b843c749SSergey Zigachev #define mmDIG_FE_CNTL 0x1C00 2994*b843c749SSergey Zigachev #define mmDIG_FIFO_STATUS 0x1C0A 2995*b843c749SSergey Zigachev #define mmDIG_LANE_ENABLE 0x1C8D 2996*b843c749SSergey Zigachev #define mmDIG_OUTPUT_CRC_CNTL 0x1C01 2997*b843c749SSergey Zigachev #define mmDIG_OUTPUT_CRC_RESULT 0x1C02 2998*b843c749SSergey Zigachev #define mmDIG_RANDOM_PATTERN_SEED 0x1C05 2999*b843c749SSergey Zigachev #define mmDIG_SOFT_RESET 0x013D 3000*b843c749SSergey Zigachev #define mmDIG_TEST_PATTERN 0x1C04 3001*b843c749SSergey Zigachev #define mmDISPCLK_CGTT_BLK_CTRL_REG 0x0135 3002*b843c749SSergey Zigachev #define mmDISPCLK_FREQ_CHANGE_CNTL 0x0131 3003*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS 0x183D 3004*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS_CONTINUE 0x183E 3005*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS_CONTINUE2 0x183F 3006*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS_CONTINUE3 0x1840 3007*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS_CONTINUE4 0x1853 3008*b843c749SSergey Zigachev #define mmDISP_INTERRUPT_STATUS_CONTINUE5 0x1854 3009*b843c749SSergey Zigachev #define mmDISPOUT_STEREOSYNC_SEL 0x18BF 3010*b843c749SSergey Zigachev #define mmDISPPLL_BG_CNTL 0x013C 3011*b843c749SSergey Zigachev #define mmDISP_TIMER_CONTROL 0x1842 3012*b843c749SSergey Zigachev #define mmDMCU_CTRL 0x1600 3013*b843c749SSergey Zigachev #define mmDMCU_ERAM_RD_CTRL 0x160B 3014*b843c749SSergey Zigachev #define mmDMCU_ERAM_RD_DATA 0x160C 3015*b843c749SSergey Zigachev #define mmDMCU_ERAM_WR_CTRL 0x1609 3016*b843c749SSergey Zigachev #define mmDMCU_ERAM_WR_DATA 0x160A 3017*b843c749SSergey Zigachev #define mmDMCU_EVENT_TRIGGER 0x1611 3018*b843c749SSergey Zigachev #define mmDMCU_FW_CHECKSUM_SMPL_BYTE_POS 0x161A 3019*b843c749SSergey Zigachev #define mmDMCU_FW_CS_HI 0x1606 3020*b843c749SSergey Zigachev #define mmDMCU_FW_CS_LO 0x1607 3021*b843c749SSergey Zigachev #define mmDMCU_FW_END_ADDR 0x1604 3022*b843c749SSergey Zigachev #define mmDMCU_FW_ISR_START_ADDR 0x1605 3023*b843c749SSergey Zigachev #define mmDMCU_FW_START_ADDR 0x1603 3024*b843c749SSergey Zigachev #define mmDMCU_INT_CNT 0x1619 3025*b843c749SSergey Zigachev #define mmDMCU_INTERRUPT_STATUS 0x1614 3026*b843c749SSergey Zigachev #define mmDMCU_INTERRUPT_TO_HOST_EN_MASK 0x1615 3027*b843c749SSergey Zigachev #define mmDMCU_INTERRUPT_TO_UC_EN_MASK 0x1616 3028*b843c749SSergey Zigachev #define mmDMCU_INTERRUPT_TO_UC_XIRQ_IRQ_SEL 0x1617 3029*b843c749SSergey Zigachev #define mmDMCU_IRAM_RD_CTRL 0x160F 3030*b843c749SSergey Zigachev #define mmDMCU_IRAM_RD_DATA 0x1610 3031*b843c749SSergey Zigachev #define mmDMCU_IRAM_WR_CTRL 0x160D 3032*b843c749SSergey Zigachev #define mmDMCU_IRAM_WR_DATA 0x160E 3033*b843c749SSergey Zigachev #define mmDMCU_PC_START_ADDR 0x1602 3034*b843c749SSergey Zigachev #define mmDMCU_RAM_ACCESS_CTRL 0x1608 3035*b843c749SSergey Zigachev #define mmDMCU_STATUS 0x1601 3036*b843c749SSergey Zigachev #define mmDMCU_TEST_DEBUG_DATA 0x1627 3037*b843c749SSergey Zigachev #define mmDMCU_TEST_DEBUG_INDEX 0x1626 3038*b843c749SSergey Zigachev #define mmDMCU_UC_CLK_GATING_CNTL 0x161B 3039*b843c749SSergey Zigachev #define mmDMCU_UC_INTERNAL_INT_STATUS 0x1612 3040*b843c749SSergey Zigachev #define mmDMIF_ADDR_CALC 0x0300 3041*b843c749SSergey Zigachev #define mmDMIF_ADDR_CONFIG 0x02F5 3042*b843c749SSergey Zigachev #define mmDMIF_ARBITRATION_CONTROL 0x02F9 3043*b843c749SSergey Zigachev #define mmDMIF_CONTROL 0x02F6 3044*b843c749SSergey Zigachev #define mmDMIF_HW_DEBUG 0x02F8 3045*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL1 0x1B30 3046*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_ARBITRATION_CONTROL2 0x1B31 3047*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_DPM_CONTROL 0x1B34 3048*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x1B36 3049*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL 0x1B35 3050*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x1B37 3051*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_PIPE_URGENCY_CONTROL 0x1B33 3052*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_TEST_DEBUG_DATA 0x1B39 3053*b843c749SSergey Zigachev #define mmDMIF_PG0_DPG_TEST_DEBUG_INDEX 0x1B38 3054*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL1 0x1E30 3055*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_ARBITRATION_CONTROL2 0x1E31 3056*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_DPM_CONTROL 0x1E34 3057*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x1E36 3058*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL 0x1E35 3059*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x1E37 3060*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_PIPE_URGENCY_CONTROL 0x1E33 3061*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_TEST_DEBUG_DATA 0x1E39 3062*b843c749SSergey Zigachev #define mmDMIF_PG1_DPG_TEST_DEBUG_INDEX 0x1E38 3063*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL1 0x4130 3064*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_ARBITRATION_CONTROL2 0x4131 3065*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_DPM_CONTROL 0x4134 3066*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x4136 3067*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL 0x4135 3068*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x4137 3069*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_PIPE_URGENCY_CONTROL 0x4133 3070*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_TEST_DEBUG_DATA 0x4139 3071*b843c749SSergey Zigachev #define mmDMIF_PG2_DPG_TEST_DEBUG_INDEX 0x4138 3072*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL1 0x4430 3073*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_ARBITRATION_CONTROL2 0x4431 3074*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_DPM_CONTROL 0x4434 3075*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x4436 3076*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL 0x4435 3077*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x4437 3078*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_PIPE_URGENCY_CONTROL 0x4433 3079*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_TEST_DEBUG_DATA 0x4439 3080*b843c749SSergey Zigachev #define mmDMIF_PG3_DPG_TEST_DEBUG_INDEX 0x4438 3081*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL1 0x4730 3082*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_ARBITRATION_CONTROL2 0x4731 3083*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_DPM_CONTROL 0x4734 3084*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x4736 3085*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL 0x4735 3086*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x4737 3087*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_PIPE_URGENCY_CONTROL 0x4733 3088*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_TEST_DEBUG_DATA 0x4739 3089*b843c749SSergey Zigachev #define mmDMIF_PG4_DPG_TEST_DEBUG_INDEX 0x4738 3090*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL1 0x4A30 3091*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_ARBITRATION_CONTROL2 0x4A31 3092*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_DPM_CONTROL 0x4A34 3093*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x4A36 3094*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL 0x4A35 3095*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x4A37 3096*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_PIPE_URGENCY_CONTROL 0x4A33 3097*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_TEST_DEBUG_DATA 0x4A39 3098*b843c749SSergey Zigachev #define mmDMIF_PG5_DPG_TEST_DEBUG_INDEX 0x4A38 3099*b843c749SSergey Zigachev #define mmDMIF_STATUS 0x02F7 3100*b843c749SSergey Zigachev #define mmDMIF_STATUS2 0x0301 3101*b843c749SSergey Zigachev #define mmDMIF_TEST_DEBUG_DATA 0x0313 3102*b843c749SSergey Zigachev #define mmDMIF_TEST_DEBUG_INDEX 0x0312 3103*b843c749SSergey Zigachev #define mmDOUT_DCE_VCE_CONTROL 0x18FF 3104*b843c749SSergey Zigachev #define mmDOUT_POWER_MANAGEMENT_CNTL 0x1841 3105*b843c749SSergey Zigachev #define mmDOUT_SCRATCH0 0x1844 3106*b843c749SSergey Zigachev #define mmDOUT_SCRATCH1 0x1845 3107*b843c749SSergey Zigachev #define mmDOUT_SCRATCH2 0x1846 3108*b843c749SSergey Zigachev #define mmDOUT_SCRATCH3 0x1847 3109*b843c749SSergey Zigachev #define mmDOUT_SCRATCH4 0x1848 3110*b843c749SSergey Zigachev #define mmDOUT_SCRATCH5 0x1849 3111*b843c749SSergey Zigachev #define mmDOUT_SCRATCH6 0x184A 3112*b843c749SSergey Zigachev #define mmDOUT_SCRATCH7 0x184B 3113*b843c749SSergey Zigachev #define mmDOUT_TEST_DEBUG_DATA 0x184E 3114*b843c749SSergey Zigachev #define mmDOUT_TEST_DEBUG_INDEX 0x184D 3115*b843c749SSergey Zigachev #define mmDP0_DP_CONFIG 0x1CC2 3116*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_8B10B_CNTL 0x1CD3 3117*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CNTL 0x1CD0 3118*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CRC_CNTL 0x1CD7 3119*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CRC_EN 0x1CD6 3120*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CRC_MST_CNTL 0x1CC6 3121*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CRC_MST_STATUS 0x1CC7 3122*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_CRC_RESULT 0x1CD8 3123*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_FAST_TRAINING 0x1CCE 3124*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_FAST_TRAINING_STATUS 0x1CE9 3125*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_PRBS_CNTL 0x1CD4 3126*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_SYM0 0x1CD2 3127*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_SYM1 0x1CE0 3128*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_SYM2 0x1CDF 3129*b843c749SSergey Zigachev #define mmDP0_DP_DPHY_TRAINING_PATTERN_SEL 0x1CD1 3130*b843c749SSergey Zigachev #define mmDP0_DP_HBR2_EYE_PATTERN 0x1CC8 3131*b843c749SSergey Zigachev #define mmDP0_DP_LINK_CNTL 0x1CC0 3132*b843c749SSergey Zigachev #define mmDP0_DP_LINK_FRAMING_CNTL 0x1CCC 3133*b843c749SSergey Zigachev #define mmDP0_DP_MSA_COLORIMETRY 0x1CDA 3134*b843c749SSergey Zigachev #define mmDP0_DP_MSA_MISC 0x1CC5 3135*b843c749SSergey Zigachev #define mmDP0_DP_MSA_V_TIMING_OVERRIDE1 0x1CEA 3136*b843c749SSergey Zigachev #define mmDP0_DP_MSA_V_TIMING_OVERRIDE2 0x1CEB 3137*b843c749SSergey Zigachev #define mmDP0_DP_MSE_LINK_TIMING 0x1CE8 3138*b843c749SSergey Zigachev #define mmDP0_DP_MSE_MISC_CNTL 0x1CDB 3139*b843c749SSergey Zigachev #define mmDP0_DP_MSE_RATE_CNTL 0x1CE1 3140*b843c749SSergey Zigachev #define mmDP0_DP_MSE_RATE_UPDATE 0x1CE3 3141*b843c749SSergey Zigachev #define mmDP0_DP_MSE_SAT0 0x1CE4 3142*b843c749SSergey Zigachev #define mmDP0_DP_MSE_SAT1 0x1CE5 3143*b843c749SSergey Zigachev #define mmDP0_DP_MSE_SAT2 0x1CE6 3144*b843c749SSergey Zigachev #define mmDP0_DP_MSE_SAT_UPDATE 0x1CE7 3145*b843c749SSergey Zigachev #define mmDP0_DP_PIXEL_FORMAT 0x1CC1 3146*b843c749SSergey Zigachev #define mmDP0_DP_SEC_AUD_M 0x1CA7 3147*b843c749SSergey Zigachev #define mmDP0_DP_SEC_AUD_M_READBACK 0x1CA8 3148*b843c749SSergey Zigachev #define mmDP0_DP_SEC_AUD_N 0x1CA5 3149*b843c749SSergey Zigachev #define mmDP0_DP_SEC_AUD_N_READBACK 0x1CA6 3150*b843c749SSergey Zigachev #define mmDP0_DP_SEC_CNTL 0x1CA0 3151*b843c749SSergey Zigachev #define mmDP0_DP_SEC_CNTL1 0x1CAB 3152*b843c749SSergey Zigachev #define mmDP0_DP_SEC_FRAMING1 0x1CA1 3153*b843c749SSergey Zigachev #define mmDP0_DP_SEC_FRAMING2 0x1CA2 3154*b843c749SSergey Zigachev #define mmDP0_DP_SEC_FRAMING3 0x1CA3 3155*b843c749SSergey Zigachev #define mmDP0_DP_SEC_FRAMING4 0x1CA4 3156*b843c749SSergey Zigachev #define mmDP0_DP_SEC_PACKET_CNTL 0x1CAA 3157*b843c749SSergey Zigachev #define mmDP0_DP_SEC_TIMESTAMP 0x1CA9 3158*b843c749SSergey Zigachev #define mmDP0_DP_STEER_FIFO 0x1CC4 3159*b843c749SSergey Zigachev #define mmDP0_DP_TEST_DEBUG_DATA 0x1CFD 3160*b843c749SSergey Zigachev #define mmDP0_DP_TEST_DEBUG_INDEX 0x1CFC 3161*b843c749SSergey Zigachev #define mmDP0_DP_VID_INTERRUPT_CNTL 0x1CCF 3162*b843c749SSergey Zigachev #define mmDP0_DP_VID_M 0x1CCB 3163*b843c749SSergey Zigachev #define mmDP0_DP_VID_MSA_VBID 0x1CCD 3164*b843c749SSergey Zigachev #define mmDP0_DP_VID_N 0x1CCA 3165*b843c749SSergey Zigachev #define mmDP0_DP_VID_STREAM_CNTL 0x1CC3 3166*b843c749SSergey Zigachev #define mmDP0_DP_VID_TIMING 0x1CC9 3167*b843c749SSergey Zigachev #define mmDP1_DP_CONFIG 0x1FC2 3168*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_8B10B_CNTL 0x1FD3 3169*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CNTL 0x1FD0 3170*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CRC_CNTL 0x1FD7 3171*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CRC_EN 0x1FD6 3172*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CRC_MST_CNTL 0x1FC6 3173*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CRC_MST_STATUS 0x1FC7 3174*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_CRC_RESULT 0x1FD8 3175*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_FAST_TRAINING 0x1FCE 3176*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_FAST_TRAINING_STATUS 0x1FE9 3177*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_PRBS_CNTL 0x1FD4 3178*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_SYM0 0x1FD2 3179*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_SYM1 0x1FE0 3180*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_SYM2 0x1FDF 3181*b843c749SSergey Zigachev #define mmDP1_DP_DPHY_TRAINING_PATTERN_SEL 0x1FD1 3182*b843c749SSergey Zigachev #define mmDP1_DP_HBR2_EYE_PATTERN 0x1FC8 3183*b843c749SSergey Zigachev #define mmDP1_DP_LINK_CNTL 0x1FC0 3184*b843c749SSergey Zigachev #define mmDP1_DP_LINK_FRAMING_CNTL 0x1FCC 3185*b843c749SSergey Zigachev #define mmDP1_DP_MSA_COLORIMETRY 0x1FDA 3186*b843c749SSergey Zigachev #define mmDP1_DP_MSA_MISC 0x1FC5 3187*b843c749SSergey Zigachev #define mmDP1_DP_MSA_V_TIMING_OVERRIDE1 0x1FEA 3188*b843c749SSergey Zigachev #define mmDP1_DP_MSA_V_TIMING_OVERRIDE2 0x1FEB 3189*b843c749SSergey Zigachev #define mmDP1_DP_MSE_LINK_TIMING 0x1FE8 3190*b843c749SSergey Zigachev #define mmDP1_DP_MSE_MISC_CNTL 0x1FDB 3191*b843c749SSergey Zigachev #define mmDP1_DP_MSE_RATE_CNTL 0x1FE1 3192*b843c749SSergey Zigachev #define mmDP1_DP_MSE_RATE_UPDATE 0x1FE3 3193*b843c749SSergey Zigachev #define mmDP1_DP_MSE_SAT0 0x1FE4 3194*b843c749SSergey Zigachev #define mmDP1_DP_MSE_SAT1 0x1FE5 3195*b843c749SSergey Zigachev #define mmDP1_DP_MSE_SAT2 0x1FE6 3196*b843c749SSergey Zigachev #define mmDP1_DP_MSE_SAT_UPDATE 0x1FE7 3197*b843c749SSergey Zigachev #define mmDP1_DP_PIXEL_FORMAT 0x1FC1 3198*b843c749SSergey Zigachev #define mmDP1_DP_SEC_AUD_M 0x1FA7 3199*b843c749SSergey Zigachev #define mmDP1_DP_SEC_AUD_M_READBACK 0x1FA8 3200*b843c749SSergey Zigachev #define mmDP1_DP_SEC_AUD_N 0x1FA5 3201*b843c749SSergey Zigachev #define mmDP1_DP_SEC_AUD_N_READBACK 0x1FA6 3202*b843c749SSergey Zigachev #define mmDP1_DP_SEC_CNTL 0x1FA0 3203*b843c749SSergey Zigachev #define mmDP1_DP_SEC_CNTL1 0x1FAB 3204*b843c749SSergey Zigachev #define mmDP1_DP_SEC_FRAMING1 0x1FA1 3205*b843c749SSergey Zigachev #define mmDP1_DP_SEC_FRAMING2 0x1FA2 3206*b843c749SSergey Zigachev #define mmDP1_DP_SEC_FRAMING3 0x1FA3 3207*b843c749SSergey Zigachev #define mmDP1_DP_SEC_FRAMING4 0x1FA4 3208*b843c749SSergey Zigachev #define mmDP1_DP_SEC_PACKET_CNTL 0x1FAA 3209*b843c749SSergey Zigachev #define mmDP1_DP_SEC_TIMESTAMP 0x1FA9 3210*b843c749SSergey Zigachev #define mmDP1_DP_STEER_FIFO 0x1FC4 3211*b843c749SSergey Zigachev #define mmDP1_DP_TEST_DEBUG_DATA 0x1FFD 3212*b843c749SSergey Zigachev #define mmDP1_DP_TEST_DEBUG_INDEX 0x1FFC 3213*b843c749SSergey Zigachev #define mmDP1_DP_VID_INTERRUPT_CNTL 0x1FCF 3214*b843c749SSergey Zigachev #define mmDP1_DP_VID_M 0x1FCB 3215*b843c749SSergey Zigachev #define mmDP1_DP_VID_MSA_VBID 0x1FCD 3216*b843c749SSergey Zigachev #define mmDP1_DP_VID_N 0x1FCA 3217*b843c749SSergey Zigachev #define mmDP1_DP_VID_STREAM_CNTL 0x1FC3 3218*b843c749SSergey Zigachev #define mmDP1_DP_VID_TIMING 0x1FC9 3219*b843c749SSergey Zigachev #define mmDP2_DP_CONFIG 0x42C2 3220*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_8B10B_CNTL 0x42D3 3221*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CNTL 0x42D0 3222*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CRC_CNTL 0x42D7 3223*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CRC_EN 0x42D6 3224*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CRC_MST_CNTL 0x42C6 3225*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CRC_MST_STATUS 0x42C7 3226*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_CRC_RESULT 0x42D8 3227*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_FAST_TRAINING 0x42CE 3228*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_FAST_TRAINING_STATUS 0x42E9 3229*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_PRBS_CNTL 0x42D4 3230*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_SYM0 0x42D2 3231*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_SYM1 0x42E0 3232*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_SYM2 0x42DF 3233*b843c749SSergey Zigachev #define mmDP2_DP_DPHY_TRAINING_PATTERN_SEL 0x42D1 3234*b843c749SSergey Zigachev #define mmDP2_DP_HBR2_EYE_PATTERN 0x42C8 3235*b843c749SSergey Zigachev #define mmDP2_DP_LINK_CNTL 0x42C0 3236*b843c749SSergey Zigachev #define mmDP2_DP_LINK_FRAMING_CNTL 0x42CC 3237*b843c749SSergey Zigachev #define mmDP2_DP_MSA_COLORIMETRY 0x42DA 3238*b843c749SSergey Zigachev #define mmDP2_DP_MSA_MISC 0x42C5 3239*b843c749SSergey Zigachev #define mmDP2_DP_MSA_V_TIMING_OVERRIDE1 0x42EA 3240*b843c749SSergey Zigachev #define mmDP2_DP_MSA_V_TIMING_OVERRIDE2 0x42EB 3241*b843c749SSergey Zigachev #define mmDP2_DP_MSE_LINK_TIMING 0x42E8 3242*b843c749SSergey Zigachev #define mmDP2_DP_MSE_MISC_CNTL 0x42DB 3243*b843c749SSergey Zigachev #define mmDP2_DP_MSE_RATE_CNTL 0x42E1 3244*b843c749SSergey Zigachev #define mmDP2_DP_MSE_RATE_UPDATE 0x42E3 3245*b843c749SSergey Zigachev #define mmDP2_DP_MSE_SAT0 0x42E4 3246*b843c749SSergey Zigachev #define mmDP2_DP_MSE_SAT1 0x42E5 3247*b843c749SSergey Zigachev #define mmDP2_DP_MSE_SAT2 0x42E6 3248*b843c749SSergey Zigachev #define mmDP2_DP_MSE_SAT_UPDATE 0x42E7 3249*b843c749SSergey Zigachev #define mmDP2_DP_PIXEL_FORMAT 0x42C1 3250*b843c749SSergey Zigachev #define mmDP2_DP_SEC_AUD_M 0x42A7 3251*b843c749SSergey Zigachev #define mmDP2_DP_SEC_AUD_M_READBACK 0x42A8 3252*b843c749SSergey Zigachev #define mmDP2_DP_SEC_AUD_N 0x42A5 3253*b843c749SSergey Zigachev #define mmDP2_DP_SEC_AUD_N_READBACK 0x42A6 3254*b843c749SSergey Zigachev #define mmDP2_DP_SEC_CNTL 0x42A0 3255*b843c749SSergey Zigachev #define mmDP2_DP_SEC_CNTL1 0x42AB 3256*b843c749SSergey Zigachev #define mmDP2_DP_SEC_FRAMING1 0x42A1 3257*b843c749SSergey Zigachev #define mmDP2_DP_SEC_FRAMING2 0x42A2 3258*b843c749SSergey Zigachev #define mmDP2_DP_SEC_FRAMING3 0x42A3 3259*b843c749SSergey Zigachev #define mmDP2_DP_SEC_FRAMING4 0x42A4 3260*b843c749SSergey Zigachev #define mmDP2_DP_SEC_PACKET_CNTL 0x42AA 3261*b843c749SSergey Zigachev #define mmDP2_DP_SEC_TIMESTAMP 0x42A9 3262*b843c749SSergey Zigachev #define mmDP2_DP_STEER_FIFO 0x42C4 3263*b843c749SSergey Zigachev #define mmDP2_DP_TEST_DEBUG_DATA 0x42FD 3264*b843c749SSergey Zigachev #define mmDP2_DP_TEST_DEBUG_INDEX 0x42FC 3265*b843c749SSergey Zigachev #define mmDP2_DP_VID_INTERRUPT_CNTL 0x42CF 3266*b843c749SSergey Zigachev #define mmDP2_DP_VID_M 0x42CB 3267*b843c749SSergey Zigachev #define mmDP2_DP_VID_MSA_VBID 0x42CD 3268*b843c749SSergey Zigachev #define mmDP2_DP_VID_N 0x42CA 3269*b843c749SSergey Zigachev #define mmDP2_DP_VID_STREAM_CNTL 0x42C3 3270*b843c749SSergey Zigachev #define mmDP2_DP_VID_TIMING 0x42C9 3271*b843c749SSergey Zigachev #define mmDP3_DP_CONFIG 0x45C2 3272*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_8B10B_CNTL 0x45D3 3273*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CNTL 0x45D0 3274*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CRC_CNTL 0x45D7 3275*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CRC_EN 0x45D6 3276*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CRC_MST_CNTL 0x45C6 3277*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CRC_MST_STATUS 0x45C7 3278*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_CRC_RESULT 0x45D8 3279*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_FAST_TRAINING 0x45CE 3280*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_FAST_TRAINING_STATUS 0x45E9 3281*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_PRBS_CNTL 0x45D4 3282*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_SYM0 0x45D2 3283*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_SYM1 0x45E0 3284*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_SYM2 0x45DF 3285*b843c749SSergey Zigachev #define mmDP3_DP_DPHY_TRAINING_PATTERN_SEL 0x45D1 3286*b843c749SSergey Zigachev #define mmDP3_DP_HBR2_EYE_PATTERN 0x45C8 3287*b843c749SSergey Zigachev #define mmDP3_DP_LINK_CNTL 0x45C0 3288*b843c749SSergey Zigachev #define mmDP3_DP_LINK_FRAMING_CNTL 0x45CC 3289*b843c749SSergey Zigachev #define mmDP3_DP_MSA_COLORIMETRY 0x45DA 3290*b843c749SSergey Zigachev #define mmDP3_DP_MSA_MISC 0x45C5 3291*b843c749SSergey Zigachev #define mmDP3_DP_MSA_V_TIMING_OVERRIDE1 0x45EA 3292*b843c749SSergey Zigachev #define mmDP3_DP_MSA_V_TIMING_OVERRIDE2 0x45EB 3293*b843c749SSergey Zigachev #define mmDP3_DP_MSE_LINK_TIMING 0x45E8 3294*b843c749SSergey Zigachev #define mmDP3_DP_MSE_MISC_CNTL 0x45DB 3295*b843c749SSergey Zigachev #define mmDP3_DP_MSE_RATE_CNTL 0x45E1 3296*b843c749SSergey Zigachev #define mmDP3_DP_MSE_RATE_UPDATE 0x45E3 3297*b843c749SSergey Zigachev #define mmDP3_DP_MSE_SAT0 0x45E4 3298*b843c749SSergey Zigachev #define mmDP3_DP_MSE_SAT1 0x45E5 3299*b843c749SSergey Zigachev #define mmDP3_DP_MSE_SAT2 0x45E6 3300*b843c749SSergey Zigachev #define mmDP3_DP_MSE_SAT_UPDATE 0x45E7 3301*b843c749SSergey Zigachev #define mmDP3_DP_PIXEL_FORMAT 0x45C1 3302*b843c749SSergey Zigachev #define mmDP3_DP_SEC_AUD_M 0x45A7 3303*b843c749SSergey Zigachev #define mmDP3_DP_SEC_AUD_M_READBACK 0x45A8 3304*b843c749SSergey Zigachev #define mmDP3_DP_SEC_AUD_N 0x45A5 3305*b843c749SSergey Zigachev #define mmDP3_DP_SEC_AUD_N_READBACK 0x45A6 3306*b843c749SSergey Zigachev #define mmDP3_DP_SEC_CNTL 0x45A0 3307*b843c749SSergey Zigachev #define mmDP3_DP_SEC_CNTL1 0x45AB 3308*b843c749SSergey Zigachev #define mmDP3_DP_SEC_FRAMING1 0x45A1 3309*b843c749SSergey Zigachev #define mmDP3_DP_SEC_FRAMING2 0x45A2 3310*b843c749SSergey Zigachev #define mmDP3_DP_SEC_FRAMING3 0x45A3 3311*b843c749SSergey Zigachev #define mmDP3_DP_SEC_FRAMING4 0x45A4 3312*b843c749SSergey Zigachev #define mmDP3_DP_SEC_PACKET_CNTL 0x45AA 3313*b843c749SSergey Zigachev #define mmDP3_DP_SEC_TIMESTAMP 0x45A9 3314*b843c749SSergey Zigachev #define mmDP3_DP_STEER_FIFO 0x45C4 3315*b843c749SSergey Zigachev #define mmDP3_DP_TEST_DEBUG_DATA 0x45FD 3316*b843c749SSergey Zigachev #define mmDP3_DP_TEST_DEBUG_INDEX 0x45FC 3317*b843c749SSergey Zigachev #define mmDP3_DP_VID_INTERRUPT_CNTL 0x45CF 3318*b843c749SSergey Zigachev #define mmDP3_DP_VID_M 0x45CB 3319*b843c749SSergey Zigachev #define mmDP3_DP_VID_MSA_VBID 0x45CD 3320*b843c749SSergey Zigachev #define mmDP3_DP_VID_N 0x45CA 3321*b843c749SSergey Zigachev #define mmDP3_DP_VID_STREAM_CNTL 0x45C3 3322*b843c749SSergey Zigachev #define mmDP3_DP_VID_TIMING 0x45C9 3323*b843c749SSergey Zigachev #define mmDP4_DP_CONFIG 0x48C2 3324*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_8B10B_CNTL 0x48D3 3325*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CNTL 0x48D0 3326*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CRC_CNTL 0x48D7 3327*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CRC_EN 0x48D6 3328*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CRC_MST_CNTL 0x48C6 3329*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CRC_MST_STATUS 0x48C7 3330*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_CRC_RESULT 0x48D8 3331*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_FAST_TRAINING 0x48CE 3332*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_FAST_TRAINING_STATUS 0x48E9 3333*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_PRBS_CNTL 0x48D4 3334*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_SYM0 0x48D2 3335*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_SYM1 0x48E0 3336*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_SYM2 0x48DF 3337*b843c749SSergey Zigachev #define mmDP4_DP_DPHY_TRAINING_PATTERN_SEL 0x48D1 3338*b843c749SSergey Zigachev #define mmDP4_DP_HBR2_EYE_PATTERN 0x48C8 3339*b843c749SSergey Zigachev #define mmDP4_DP_LINK_CNTL 0x48C0 3340*b843c749SSergey Zigachev #define mmDP4_DP_LINK_FRAMING_CNTL 0x48CC 3341*b843c749SSergey Zigachev #define mmDP4_DP_MSA_COLORIMETRY 0x48DA 3342*b843c749SSergey Zigachev #define mmDP4_DP_MSA_MISC 0x48C5 3343*b843c749SSergey Zigachev #define mmDP4_DP_MSA_V_TIMING_OVERRIDE1 0x48EA 3344*b843c749SSergey Zigachev #define mmDP4_DP_MSA_V_TIMING_OVERRIDE2 0x48EB 3345*b843c749SSergey Zigachev #define mmDP4_DP_MSE_LINK_TIMING 0x48E8 3346*b843c749SSergey Zigachev #define mmDP4_DP_MSE_MISC_CNTL 0x48DB 3347*b843c749SSergey Zigachev #define mmDP4_DP_MSE_RATE_CNTL 0x48E1 3348*b843c749SSergey Zigachev #define mmDP4_DP_MSE_RATE_UPDATE 0x48E3 3349*b843c749SSergey Zigachev #define mmDP4_DP_MSE_SAT0 0x48E4 3350*b843c749SSergey Zigachev #define mmDP4_DP_MSE_SAT1 0x48E5 3351*b843c749SSergey Zigachev #define mmDP4_DP_MSE_SAT2 0x48E6 3352*b843c749SSergey Zigachev #define mmDP4_DP_MSE_SAT_UPDATE 0x48E7 3353*b843c749SSergey Zigachev #define mmDP4_DP_PIXEL_FORMAT 0x48C1 3354*b843c749SSergey Zigachev #define mmDP4_DP_SEC_AUD_M 0x48A7 3355*b843c749SSergey Zigachev #define mmDP4_DP_SEC_AUD_M_READBACK 0x48A8 3356*b843c749SSergey Zigachev #define mmDP4_DP_SEC_AUD_N 0x48A5 3357*b843c749SSergey Zigachev #define mmDP4_DP_SEC_AUD_N_READBACK 0x48A6 3358*b843c749SSergey Zigachev #define mmDP4_DP_SEC_CNTL 0x48A0 3359*b843c749SSergey Zigachev #define mmDP4_DP_SEC_CNTL1 0x48AB 3360*b843c749SSergey Zigachev #define mmDP4_DP_SEC_FRAMING1 0x48A1 3361*b843c749SSergey Zigachev #define mmDP4_DP_SEC_FRAMING2 0x48A2 3362*b843c749SSergey Zigachev #define mmDP4_DP_SEC_FRAMING3 0x48A3 3363*b843c749SSergey Zigachev #define mmDP4_DP_SEC_FRAMING4 0x48A4 3364*b843c749SSergey Zigachev #define mmDP4_DP_SEC_PACKET_CNTL 0x48AA 3365*b843c749SSergey Zigachev #define mmDP4_DP_SEC_TIMESTAMP 0x48A9 3366*b843c749SSergey Zigachev #define mmDP4_DP_STEER_FIFO 0x48C4 3367*b843c749SSergey Zigachev #define mmDP4_DP_TEST_DEBUG_DATA 0x48FD 3368*b843c749SSergey Zigachev #define mmDP4_DP_TEST_DEBUG_INDEX 0x48FC 3369*b843c749SSergey Zigachev #define mmDP4_DP_VID_INTERRUPT_CNTL 0x48CF 3370*b843c749SSergey Zigachev #define mmDP4_DP_VID_M 0x48CB 3371*b843c749SSergey Zigachev #define mmDP4_DP_VID_MSA_VBID 0x48CD 3372*b843c749SSergey Zigachev #define mmDP4_DP_VID_N 0x48CA 3373*b843c749SSergey Zigachev #define mmDP4_DP_VID_STREAM_CNTL 0x48C3 3374*b843c749SSergey Zigachev #define mmDP4_DP_VID_TIMING 0x48C9 3375*b843c749SSergey Zigachev #define mmDP5_DP_CONFIG 0x4BC2 3376*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_8B10B_CNTL 0x4BD3 3377*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CNTL 0x4BD0 3378*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CRC_CNTL 0x4BD7 3379*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CRC_EN 0x4BD6 3380*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CRC_MST_CNTL 0x4BC6 3381*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CRC_MST_STATUS 0x4BC7 3382*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_CRC_RESULT 0x4BD8 3383*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_FAST_TRAINING 0x4BCE 3384*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_FAST_TRAINING_STATUS 0x4BE9 3385*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_PRBS_CNTL 0x4BD4 3386*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_SYM0 0x4BD2 3387*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_SYM1 0x4BE0 3388*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_SYM2 0x4BDF 3389*b843c749SSergey Zigachev #define mmDP5_DP_DPHY_TRAINING_PATTERN_SEL 0x4BD1 3390*b843c749SSergey Zigachev #define mmDP5_DP_HBR2_EYE_PATTERN 0x4BC8 3391*b843c749SSergey Zigachev #define mmDP5_DP_LINK_CNTL 0x4BC0 3392*b843c749SSergey Zigachev #define mmDP5_DP_LINK_FRAMING_CNTL 0x4BCC 3393*b843c749SSergey Zigachev #define mmDP5_DP_MSA_COLORIMETRY 0x4BDA 3394*b843c749SSergey Zigachev #define mmDP5_DP_MSA_MISC 0x4BC5 3395*b843c749SSergey Zigachev #define mmDP5_DP_MSA_V_TIMING_OVERRIDE1 0x4BEA 3396*b843c749SSergey Zigachev #define mmDP5_DP_MSA_V_TIMING_OVERRIDE2 0x4BEB 3397*b843c749SSergey Zigachev #define mmDP5_DP_MSE_LINK_TIMING 0x4BE8 3398*b843c749SSergey Zigachev #define mmDP5_DP_MSE_MISC_CNTL 0x4BDB 3399*b843c749SSergey Zigachev #define mmDP5_DP_MSE_RATE_CNTL 0x4BE1 3400*b843c749SSergey Zigachev #define mmDP5_DP_MSE_RATE_UPDATE 0x4BE3 3401*b843c749SSergey Zigachev #define mmDP5_DP_MSE_SAT0 0x4BE4 3402*b843c749SSergey Zigachev #define mmDP5_DP_MSE_SAT1 0x4BE5 3403*b843c749SSergey Zigachev #define mmDP5_DP_MSE_SAT2 0x4BE6 3404*b843c749SSergey Zigachev #define mmDP5_DP_MSE_SAT_UPDATE 0x4BE7 3405*b843c749SSergey Zigachev #define mmDP5_DP_PIXEL_FORMAT 0x4BC1 3406*b843c749SSergey Zigachev #define mmDP5_DP_SEC_AUD_M 0x4BA7 3407*b843c749SSergey Zigachev #define mmDP5_DP_SEC_AUD_M_READBACK 0x4BA8 3408*b843c749SSergey Zigachev #define mmDP5_DP_SEC_AUD_N 0x4BA5 3409*b843c749SSergey Zigachev #define mmDP5_DP_SEC_AUD_N_READBACK 0x4BA6 3410*b843c749SSergey Zigachev #define mmDP5_DP_SEC_CNTL 0x4BA0 3411*b843c749SSergey Zigachev #define mmDP5_DP_SEC_CNTL1 0x4BAB 3412*b843c749SSergey Zigachev #define mmDP5_DP_SEC_FRAMING1 0x4BA1 3413*b843c749SSergey Zigachev #define mmDP5_DP_SEC_FRAMING2 0x4BA2 3414*b843c749SSergey Zigachev #define mmDP5_DP_SEC_FRAMING3 0x4BA3 3415*b843c749SSergey Zigachev #define mmDP5_DP_SEC_FRAMING4 0x4BA4 3416*b843c749SSergey Zigachev #define mmDP5_DP_SEC_PACKET_CNTL 0x4BAA 3417*b843c749SSergey Zigachev #define mmDP5_DP_SEC_TIMESTAMP 0x4BA9 3418*b843c749SSergey Zigachev #define mmDP5_DP_STEER_FIFO 0x4BC4 3419*b843c749SSergey Zigachev #define mmDP5_DP_TEST_DEBUG_DATA 0x4BFD 3420*b843c749SSergey Zigachev #define mmDP5_DP_TEST_DEBUG_INDEX 0x4BFC 3421*b843c749SSergey Zigachev #define mmDP5_DP_VID_INTERRUPT_CNTL 0x4BCF 3422*b843c749SSergey Zigachev #define mmDP5_DP_VID_M 0x4BCB 3423*b843c749SSergey Zigachev #define mmDP5_DP_VID_MSA_VBID 0x4BCD 3424*b843c749SSergey Zigachev #define mmDP5_DP_VID_N 0x4BCA 3425*b843c749SSergey Zigachev #define mmDP5_DP_VID_STREAM_CNTL 0x4BC3 3426*b843c749SSergey Zigachev #define mmDP5_DP_VID_TIMING 0x4BC9 3427*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_ARB_CONTROL 0x1882 3428*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_CONTROL 0x1880 3429*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_RX_CONTROL0 0x188A 3430*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_RX_CONTROL1 0x188B 3431*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_RX_STATUS 0x188D 3432*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_TX_CONTROL 0x1889 3433*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_TX_REF_CONTROL 0x1888 3434*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_DPHY_TX_STATUS 0x188C 3435*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_GTC_SYNC_CONTROL 0x188E 3436*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_GTC_SYNC_DATA 0x1890 3437*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_INTERRUPT_CONTROL 0x1883 3438*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_LS_DATA 0x1887 3439*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_LS_STATUS 0x1885 3440*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_SW_CONTROL 0x1881 3441*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_SW_DATA 0x1886 3442*b843c749SSergey Zigachev #define mmDP_AUX0_AUX_SW_STATUS 0x1884 3443*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_ARB_CONTROL 0x1896 3444*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_CONTROL 0x1894 3445*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_RX_CONTROL0 0x189E 3446*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_RX_CONTROL1 0x189F 3447*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_RX_STATUS 0x18A1 3448*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_TX_CONTROL 0x189D 3449*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_TX_REF_CONTROL 0x189C 3450*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_DPHY_TX_STATUS 0x18A0 3451*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_GTC_SYNC_CONTROL 0x18A2 3452*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_GTC_SYNC_DATA 0x18A4 3453*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_INTERRUPT_CONTROL 0x1897 3454*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_LS_DATA 0x189B 3455*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_LS_STATUS 0x1899 3456*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_SW_CONTROL 0x1895 3457*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_SW_DATA 0x189A 3458*b843c749SSergey Zigachev #define mmDP_AUX1_AUX_SW_STATUS 0x1898 3459*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_ARB_CONTROL 0x18AA 3460*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_CONTROL 0x18A8 3461*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_RX_CONTROL0 0x18B2 3462*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_RX_CONTROL1 0x18B3 3463*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_RX_STATUS 0x18B5 3464*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_TX_CONTROL 0x18B1 3465*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_TX_REF_CONTROL 0x18B0 3466*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_DPHY_TX_STATUS 0x18B4 3467*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_GTC_SYNC_CONTROL 0x18B6 3468*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_GTC_SYNC_DATA 0x18B8 3469*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_INTERRUPT_CONTROL 0x18AB 3470*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_LS_DATA 0x18AF 3471*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_LS_STATUS 0x18AD 3472*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_SW_CONTROL 0x18A9 3473*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_SW_DATA 0x18AE 3474*b843c749SSergey Zigachev #define mmDP_AUX2_AUX_SW_STATUS 0x18AC 3475*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_ARB_CONTROL 0x18C2 3476*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_CONTROL 0x18C0 3477*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_RX_CONTROL0 0x18CA 3478*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_RX_CONTROL1 0x18CB 3479*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_RX_STATUS 0x18CD 3480*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_TX_CONTROL 0x18C9 3481*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_TX_REF_CONTROL 0x18C8 3482*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_DPHY_TX_STATUS 0x18CC 3483*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_GTC_SYNC_CONTROL 0x18CE 3484*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_GTC_SYNC_DATA 0x18D0 3485*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_INTERRUPT_CONTROL 0x18C3 3486*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_LS_DATA 0x18C7 3487*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_LS_STATUS 0x18C5 3488*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_SW_CONTROL 0x18C1 3489*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_SW_DATA 0x18C6 3490*b843c749SSergey Zigachev #define mmDP_AUX3_AUX_SW_STATUS 0x18C4 3491*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_ARB_CONTROL 0x18D6 3492*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_CONTROL 0x18D4 3493*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_RX_CONTROL0 0x18DE 3494*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_RX_CONTROL1 0x18DF 3495*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_RX_STATUS 0x18E1 3496*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_TX_CONTROL 0x18DD 3497*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_TX_REF_CONTROL 0x18DC 3498*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_DPHY_TX_STATUS 0x18E0 3499*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_GTC_SYNC_CONTROL 0x18E2 3500*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_GTC_SYNC_DATA 0x18E4 3501*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_INTERRUPT_CONTROL 0x18D7 3502*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_LS_DATA 0x18DB 3503*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_LS_STATUS 0x18D9 3504*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_SW_CONTROL 0x18D5 3505*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_SW_DATA 0x18DA 3506*b843c749SSergey Zigachev #define mmDP_AUX4_AUX_SW_STATUS 0x18D8 3507*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_ARB_CONTROL 0x18EA 3508*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_CONTROL 0x18E8 3509*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_RX_CONTROL0 0x18F2 3510*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_RX_CONTROL1 0x18F3 3511*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_RX_STATUS 0x18F5 3512*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_TX_CONTROL 0x18F1 3513*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_TX_REF_CONTROL 0x18F0 3514*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_DPHY_TX_STATUS 0x18F4 3515*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_GTC_SYNC_CONTROL 0x18F6 3516*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_GTC_SYNC_DATA 0x18F8 3517*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_INTERRUPT_CONTROL 0x18EB 3518*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_LS_DATA 0x18EF 3519*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_LS_STATUS 0x18ED 3520*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_SW_CONTROL 0x18E9 3521*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_SW_DATA 0x18EE 3522*b843c749SSergey Zigachev #define mmDP_AUX5_AUX_SW_STATUS 0x18EC 3523*b843c749SSergey Zigachev #define mmDP_CONFIG 0x1CC2 3524*b843c749SSergey Zigachev #define mmDP_DPHY_8B10B_CNTL 0x1CD3 3525*b843c749SSergey Zigachev #define mmDP_DPHY_CNTL 0x1CD0 3526*b843c749SSergey Zigachev #define mmDP_DPHY_CRC_CNTL 0x1CD7 3527*b843c749SSergey Zigachev #define mmDP_DPHY_CRC_EN 0x1CD6 3528*b843c749SSergey Zigachev #define mmDP_DPHY_CRC_MST_CNTL 0x1CC6 3529*b843c749SSergey Zigachev #define mmDP_DPHY_CRC_MST_STATUS 0x1CC7 3530*b843c749SSergey Zigachev #define mmDP_DPHY_CRC_RESULT 0x1CD8 3531*b843c749SSergey Zigachev #define mmDP_DPHY_FAST_TRAINING 0x1CCE 3532*b843c749SSergey Zigachev #define mmDP_DPHY_FAST_TRAINING_STATUS 0x1CE9 3533*b843c749SSergey Zigachev #define mmDP_DPHY_PRBS_CNTL 0x1CD4 3534*b843c749SSergey Zigachev #define mmDP_DPHY_SYM0 0x1CD2 3535*b843c749SSergey Zigachev #define mmDP_DPHY_SYM1 0x1CE0 3536*b843c749SSergey Zigachev #define mmDP_DPHY_SYM2 0x1CDF 3537*b843c749SSergey Zigachev #define mmDP_DPHY_TRAINING_PATTERN_SEL 0x1CD1 3538*b843c749SSergey Zigachev #define mmDP_DTO0_MODULO 0x0142 3539*b843c749SSergey Zigachev #define mmDP_DTO0_PHASE 0x0141 3540*b843c749SSergey Zigachev #define mmDP_DTO1_MODULO 0x0146 3541*b843c749SSergey Zigachev #define mmDP_DTO1_PHASE 0x0145 3542*b843c749SSergey Zigachev #define mmDP_DTO2_MODULO 0x014A 3543*b843c749SSergey Zigachev #define mmDP_DTO2_PHASE 0x0149 3544*b843c749SSergey Zigachev #define mmDP_DTO3_MODULO 0x014E 3545*b843c749SSergey Zigachev #define mmDP_DTO3_PHASE 0x014D 3546*b843c749SSergey Zigachev #define mmDP_DTO4_MODULO 0x0152 3547*b843c749SSergey Zigachev #define mmDP_DTO4_PHASE 0x0151 3548*b843c749SSergey Zigachev #define mmDP_DTO5_MODULO 0x0156 3549*b843c749SSergey Zigachev #define mmDP_DTO5_PHASE 0x0155 3550*b843c749SSergey Zigachev #define mmDPG_PIPE_ARBITRATION_CONTROL1 0x1B30 3551*b843c749SSergey Zigachev #define mmDPG_PIPE_ARBITRATION_CONTROL2 0x1B31 3552*b843c749SSergey Zigachev #define mmDPG_PIPE_DPM_CONTROL 0x1B34 3553*b843c749SSergey Zigachev #define mmDPG_PIPE_NB_PSTATE_CHANGE_CONTROL 0x1B36 3554*b843c749SSergey Zigachev #define mmDPG_PIPE_STUTTER_CONTROL 0x1B35 3555*b843c749SSergey Zigachev #define mmDPG_PIPE_STUTTER_CONTROL_NONLPTCH 0x1B37 3556*b843c749SSergey Zigachev #define mmDPG_PIPE_URGENCY_CONTROL 0x1B33 3557*b843c749SSergey Zigachev #define mmDPG_TEST_DEBUG_DATA 0x1B39 3558*b843c749SSergey Zigachev #define mmDPG_TEST_DEBUG_INDEX 0x1B38 3559*b843c749SSergey Zigachev #define mmDP_HBR2_EYE_PATTERN 0x1CC8 3560*b843c749SSergey Zigachev #define mmDP_LINK_CNTL 0x1CC0 3561*b843c749SSergey Zigachev #define mmDP_LINK_FRAMING_CNTL 0x1CCC 3562*b843c749SSergey Zigachev #define mmDP_MSA_COLORIMETRY 0x1CDA 3563*b843c749SSergey Zigachev #define mmDP_MSA_MISC 0x1CC5 3564*b843c749SSergey Zigachev #define mmDP_MSA_V_TIMING_OVERRIDE1 0x1CEA 3565*b843c749SSergey Zigachev #define mmDP_MSA_V_TIMING_OVERRIDE2 0x1CEB 3566*b843c749SSergey Zigachev #define mmDP_MSE_LINK_TIMING 0x1CE8 3567*b843c749SSergey Zigachev #define mmDP_MSE_MISC_CNTL 0x1CDB 3568*b843c749SSergey Zigachev #define mmDP_MSE_RATE_CNTL 0x1CE1 3569*b843c749SSergey Zigachev #define mmDP_MSE_RATE_UPDATE 0x1CE3 3570*b843c749SSergey Zigachev #define mmDP_MSE_SAT0 0x1CE4 3571*b843c749SSergey Zigachev #define mmDP_MSE_SAT1 0x1CE5 3572*b843c749SSergey Zigachev #define mmDP_MSE_SAT2 0x1CE6 3573*b843c749SSergey Zigachev #define mmDP_MSE_SAT_UPDATE 0x1CE7 3574*b843c749SSergey Zigachev #define mmDP_PIXEL_FORMAT 0x1CC1 3575*b843c749SSergey Zigachev #define mmDP_SEC_AUD_M 0x1CA7 3576*b843c749SSergey Zigachev #define mmDP_SEC_AUD_M_READBACK 0x1CA8 3577*b843c749SSergey Zigachev #define mmDP_SEC_AUD_N 0x1CA5 3578*b843c749SSergey Zigachev #define mmDP_SEC_AUD_N_READBACK 0x1CA6 3579*b843c749SSergey Zigachev #define mmDP_SEC_CNTL 0x1CA0 3580*b843c749SSergey Zigachev #define mmDP_SEC_CNTL1 0x1CAB 3581*b843c749SSergey Zigachev #define mmDP_SEC_FRAMING1 0x1CA1 3582*b843c749SSergey Zigachev #define mmDP_SEC_FRAMING2 0x1CA2 3583*b843c749SSergey Zigachev #define mmDP_SEC_FRAMING3 0x1CA3 3584*b843c749SSergey Zigachev #define mmDP_SEC_FRAMING4 0x1CA4 3585*b843c749SSergey Zigachev #define mmDP_SEC_PACKET_CNTL 0x1CAA 3586*b843c749SSergey Zigachev #define mmDP_SEC_TIMESTAMP 0x1CA9 3587*b843c749SSergey Zigachev #define mmDP_STEER_FIFO 0x1CC4 3588*b843c749SSergey Zigachev #define mmDP_TEST_DEBUG_DATA 0x1CFD 3589*b843c749SSergey Zigachev #define mmDP_TEST_DEBUG_INDEX 0x1CFC 3590*b843c749SSergey Zigachev #define mmDP_VID_INTERRUPT_CNTL 0x1CCF 3591*b843c749SSergey Zigachev #define mmDP_VID_M 0x1CCB 3592*b843c749SSergey Zigachev #define mmDP_VID_MSA_VBID 0x1CCD 3593*b843c749SSergey Zigachev #define mmDP_VID_N 0x1CCA 3594*b843c749SSergey Zigachev #define mmDP_VID_STREAM_CNTL 0x1CC3 3595*b843c749SSergey Zigachev #define mmDP_VID_TIMING 0x1CC9 3596*b843c749SSergey Zigachev #define mmDVOACLKC_CNTL 0x016A 3597*b843c749SSergey Zigachev #define mmDVOACLKC_MVP_CNTL 0x0169 3598*b843c749SSergey Zigachev #define mmDVOACLKD_CNTL 0x0168 3599*b843c749SSergey Zigachev #define mmDVO_CLK_ENABLE 0x0129 3600*b843c749SSergey Zigachev #define mmDVO_CONTROL 0x185B 3601*b843c749SSergey Zigachev #define mmDVO_CRC2_SIG_MASK 0x185D 3602*b843c749SSergey Zigachev #define mmDVO_CRC2_SIG_RESULT 0x185E 3603*b843c749SSergey Zigachev #define mmDVO_CRC_EN 0x185C 3604*b843c749SSergey Zigachev #define mmDVO_ENABLE 0x1858 3605*b843c749SSergey Zigachev #define mmDVO_FIFO_ERROR_STATUS 0x185F 3606*b843c749SSergey Zigachev #define mmDVO_OUTPUT 0x185A 3607*b843c749SSergey Zigachev #define mmDVO_SKEW_ADJUST 0x197D 3608*b843c749SSergey Zigachev #define mmDVO_SOURCE_SELECT 0x1859 3609*b843c749SSergey Zigachev #define mmDVO_STRENGTH_CONTROL 0x197B 3610*b843c749SSergey Zigachev #define mmDVO_VREF_CONTROL 0x197C 3611*b843c749SSergey Zigachev #define mmEXT_OVERSCAN_LEFT_RIGHT 0x1B5E 3612*b843c749SSergey Zigachev #define mmEXT_OVERSCAN_TOP_BOTTOM 0x1B5F 3613*b843c749SSergey Zigachev #define mmFBC_CLIENT_REGION_MASK 0x16EB 3614*b843c749SSergey Zigachev #define mmFBC_CNTL 0x16D0 3615*b843c749SSergey Zigachev #define mmFBC_COMP_CNTL 0x16D4 3616*b843c749SSergey Zigachev #define mmFBC_COMP_MODE 0x16D5 3617*b843c749SSergey Zigachev #define mmFBC_CSM_REGION_OFFSET_01 0x16E9 3618*b843c749SSergey Zigachev #define mmFBC_CSM_REGION_OFFSET_23 0x16EA 3619*b843c749SSergey Zigachev #define mmFBC_DEBUG0 0x16D6 3620*b843c749SSergey Zigachev #define mmFBC_DEBUG1 0x16D7 3621*b843c749SSergey Zigachev #define mmFBC_DEBUG2 0x16D8 3622*b843c749SSergey Zigachev #define mmFBC_DEBUG_COMP 0x16EC 3623*b843c749SSergey Zigachev #define mmFBC_DEBUG_CSR 0x16ED 3624*b843c749SSergey Zigachev #define mmFBC_DEBUG_CSR_RDATA 0x16EE 3625*b843c749SSergey Zigachev #define mmFBC_DEBUG_CSR_RDATA_HI 0x16F6 3626*b843c749SSergey Zigachev #define mmFBC_DEBUG_CSR_WDATA 0x16EF 3627*b843c749SSergey Zigachev #define mmFBC_DEBUG_CSR_WDATA_HI 0x16F7 3628*b843c749SSergey Zigachev #define mmFBC_IDLE_FORCE_CLEAR_MASK 0x16D2 3629*b843c749SSergey Zigachev #define mmFBC_IDLE_MASK 0x16D1 3630*b843c749SSergey Zigachev #define mmFBC_IND_LUT0 0x16D9 3631*b843c749SSergey Zigachev #define mmFBC_IND_LUT10 0x16E3 3632*b843c749SSergey Zigachev #define mmFBC_IND_LUT1 0x16DA 3633*b843c749SSergey Zigachev #define mmFBC_IND_LUT11 0x16E4 3634*b843c749SSergey Zigachev #define mmFBC_IND_LUT12 0x16E5 3635*b843c749SSergey Zigachev #define mmFBC_IND_LUT13 0x16E6 3636*b843c749SSergey Zigachev #define mmFBC_IND_LUT14 0x16E7 3637*b843c749SSergey Zigachev #define mmFBC_IND_LUT15 0x16E8 3638*b843c749SSergey Zigachev #define mmFBC_IND_LUT2 0x16DB 3639*b843c749SSergey Zigachev #define mmFBC_IND_LUT3 0x16DC 3640*b843c749SSergey Zigachev #define mmFBC_IND_LUT4 0x16DD 3641*b843c749SSergey Zigachev #define mmFBC_IND_LUT5 0x16DE 3642*b843c749SSergey Zigachev #define mmFBC_IND_LUT6 0x16DF 3643*b843c749SSergey Zigachev #define mmFBC_IND_LUT7 0x16E0 3644*b843c749SSergey Zigachev #define mmFBC_IND_LUT8 0x16E1 3645*b843c749SSergey Zigachev #define mmFBC_IND_LUT9 0x16E2 3646*b843c749SSergey Zigachev #define mmFBC_MISC 0x16F0 3647*b843c749SSergey Zigachev #define mmFBC_START_STOP_DELAY 0x16D3 3648*b843c749SSergey Zigachev #define mmFBC_STATUS 0x16F1 3649*b843c749SSergey Zigachev #define mmFBC_TEST_DEBUG_DATA 0x16F5 3650*b843c749SSergey Zigachev #define mmFBC_TEST_DEBUG_INDEX 0x16F4 3651*b843c749SSergey Zigachev #define mmFMT0_FMT_BIT_DEPTH_CONTROL 0x1BF2 3652*b843c749SSergey Zigachev #define mmFMT0_FMT_CLAMP_CNTL 0x1BF9 3653*b843c749SSergey Zigachev #define mmFMT0_FMT_CONTROL 0x1BEE 3654*b843c749SSergey Zigachev #define mmFMT0_FMT_CRC_CNTL 0x1BFA 3655*b843c749SSergey Zigachev #define mmFMT0_FMT_CRC_SIG_BLUE_CONTROL 0x1BFE 3656*b843c749SSergey Zigachev #define mmFMT0_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x1BFC 3657*b843c749SSergey Zigachev #define mmFMT0_FMT_CRC_SIG_RED_GREEN 0x1BFD 3658*b843c749SSergey Zigachev #define mmFMT0_FMT_CRC_SIG_RED_GREEN_MASK 0x1BFB 3659*b843c749SSergey Zigachev #define mmFMT0_FMT_DEBUG_CNTL 0x1BFF 3660*b843c749SSergey Zigachev #define mmFMT0_FMT_DITHER_RAND_B_SEED 0x1BF5 3661*b843c749SSergey Zigachev #define mmFMT0_FMT_DITHER_RAND_G_SEED 0x1BF4 3662*b843c749SSergey Zigachev #define mmFMT0_FMT_DITHER_RAND_R_SEED 0x1BF3 3663*b843c749SSergey Zigachev #define mmFMT0_FMT_DYNAMIC_EXP_CNTL 0x1BED 3664*b843c749SSergey Zigachev #define mmFMT0_FMT_FORCE_DATA_0_1 0x1BF0 3665*b843c749SSergey Zigachev #define mmFMT0_FMT_FORCE_DATA_2_3 0x1BF1 3666*b843c749SSergey Zigachev #define mmFMT0_FMT_FORCE_OUTPUT_CNTL 0x1BEF 3667*b843c749SSergey Zigachev #define mmFMT0_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x1BF6 3668*b843c749SSergey Zigachev #define mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x1BF7 3669*b843c749SSergey Zigachev #define mmFMT0_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x1BF8 3670*b843c749SSergey Zigachev #define mmFMT0_FMT_TEST_DEBUG_DATA 0x1BEC 3671*b843c749SSergey Zigachev #define mmFMT0_FMT_TEST_DEBUG_INDEX 0x1BEB 3672*b843c749SSergey Zigachev #define mmFMT1_FMT_BIT_DEPTH_CONTROL 0x1EF2 3673*b843c749SSergey Zigachev #define mmFMT1_FMT_CLAMP_CNTL 0x1EF9 3674*b843c749SSergey Zigachev #define mmFMT1_FMT_CONTROL 0x1EEE 3675*b843c749SSergey Zigachev #define mmFMT1_FMT_CRC_CNTL 0x1EFA 3676*b843c749SSergey Zigachev #define mmFMT1_FMT_CRC_SIG_BLUE_CONTROL 0x1EFE 3677*b843c749SSergey Zigachev #define mmFMT1_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x1EFC 3678*b843c749SSergey Zigachev #define mmFMT1_FMT_CRC_SIG_RED_GREEN 0x1EFD 3679*b843c749SSergey Zigachev #define mmFMT1_FMT_CRC_SIG_RED_GREEN_MASK 0x1EFB 3680*b843c749SSergey Zigachev #define mmFMT1_FMT_DEBUG_CNTL 0x1EFF 3681*b843c749SSergey Zigachev #define mmFMT1_FMT_DITHER_RAND_B_SEED 0x1EF5 3682*b843c749SSergey Zigachev #define mmFMT1_FMT_DITHER_RAND_G_SEED 0x1EF4 3683*b843c749SSergey Zigachev #define mmFMT1_FMT_DITHER_RAND_R_SEED 0x1EF3 3684*b843c749SSergey Zigachev #define mmFMT1_FMT_DYNAMIC_EXP_CNTL 0x1EED 3685*b843c749SSergey Zigachev #define mmFMT1_FMT_FORCE_DATA_0_1 0x1EF0 3686*b843c749SSergey Zigachev #define mmFMT1_FMT_FORCE_DATA_2_3 0x1EF1 3687*b843c749SSergey Zigachev #define mmFMT1_FMT_FORCE_OUTPUT_CNTL 0x1EEF 3688*b843c749SSergey Zigachev #define mmFMT1_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x1EF6 3689*b843c749SSergey Zigachev #define mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x1EF7 3690*b843c749SSergey Zigachev #define mmFMT1_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x1EF8 3691*b843c749SSergey Zigachev #define mmFMT1_FMT_TEST_DEBUG_DATA 0x1EEC 3692*b843c749SSergey Zigachev #define mmFMT1_FMT_TEST_DEBUG_INDEX 0x1EEB 3693*b843c749SSergey Zigachev #define mmFMT2_FMT_BIT_DEPTH_CONTROL 0x41F2 3694*b843c749SSergey Zigachev #define mmFMT2_FMT_CLAMP_CNTL 0x41F9 3695*b843c749SSergey Zigachev #define mmFMT2_FMT_CONTROL 0x41EE 3696*b843c749SSergey Zigachev #define mmFMT2_FMT_CRC_CNTL 0x41FA 3697*b843c749SSergey Zigachev #define mmFMT2_FMT_CRC_SIG_BLUE_CONTROL 0x41FE 3698*b843c749SSergey Zigachev #define mmFMT2_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x41FC 3699*b843c749SSergey Zigachev #define mmFMT2_FMT_CRC_SIG_RED_GREEN 0x41FD 3700*b843c749SSergey Zigachev #define mmFMT2_FMT_CRC_SIG_RED_GREEN_MASK 0x41FB 3701*b843c749SSergey Zigachev #define mmFMT2_FMT_DEBUG_CNTL 0x41FF 3702*b843c749SSergey Zigachev #define mmFMT2_FMT_DITHER_RAND_B_SEED 0x41F5 3703*b843c749SSergey Zigachev #define mmFMT2_FMT_DITHER_RAND_G_SEED 0x41F4 3704*b843c749SSergey Zigachev #define mmFMT2_FMT_DITHER_RAND_R_SEED 0x41F3 3705*b843c749SSergey Zigachev #define mmFMT2_FMT_DYNAMIC_EXP_CNTL 0x41ED 3706*b843c749SSergey Zigachev #define mmFMT2_FMT_FORCE_DATA_0_1 0x41F0 3707*b843c749SSergey Zigachev #define mmFMT2_FMT_FORCE_DATA_2_3 0x41F1 3708*b843c749SSergey Zigachev #define mmFMT2_FMT_FORCE_OUTPUT_CNTL 0x41EF 3709*b843c749SSergey Zigachev #define mmFMT2_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x41F6 3710*b843c749SSergey Zigachev #define mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x41F7 3711*b843c749SSergey Zigachev #define mmFMT2_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x41F8 3712*b843c749SSergey Zigachev #define mmFMT2_FMT_TEST_DEBUG_DATA 0x41EC 3713*b843c749SSergey Zigachev #define mmFMT2_FMT_TEST_DEBUG_INDEX 0x41EB 3714*b843c749SSergey Zigachev #define mmFMT3_FMT_BIT_DEPTH_CONTROL 0x44F2 3715*b843c749SSergey Zigachev #define mmFMT3_FMT_CLAMP_CNTL 0x44F9 3716*b843c749SSergey Zigachev #define mmFMT3_FMT_CONTROL 0x44EE 3717*b843c749SSergey Zigachev #define mmFMT3_FMT_CRC_CNTL 0x44FA 3718*b843c749SSergey Zigachev #define mmFMT3_FMT_CRC_SIG_BLUE_CONTROL 0x44FE 3719*b843c749SSergey Zigachev #define mmFMT3_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x44FC 3720*b843c749SSergey Zigachev #define mmFMT3_FMT_CRC_SIG_RED_GREEN 0x44FD 3721*b843c749SSergey Zigachev #define mmFMT3_FMT_CRC_SIG_RED_GREEN_MASK 0x44FB 3722*b843c749SSergey Zigachev #define mmFMT3_FMT_DEBUG_CNTL 0x44FF 3723*b843c749SSergey Zigachev #define mmFMT3_FMT_DITHER_RAND_B_SEED 0x44F5 3724*b843c749SSergey Zigachev #define mmFMT3_FMT_DITHER_RAND_G_SEED 0x44F4 3725*b843c749SSergey Zigachev #define mmFMT3_FMT_DITHER_RAND_R_SEED 0x44F3 3726*b843c749SSergey Zigachev #define mmFMT3_FMT_DYNAMIC_EXP_CNTL 0x44ED 3727*b843c749SSergey Zigachev #define mmFMT3_FMT_FORCE_DATA_0_1 0x44F0 3728*b843c749SSergey Zigachev #define mmFMT3_FMT_FORCE_DATA_2_3 0x44F1 3729*b843c749SSergey Zigachev #define mmFMT3_FMT_FORCE_OUTPUT_CNTL 0x44EF 3730*b843c749SSergey Zigachev #define mmFMT3_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x44F6 3731*b843c749SSergey Zigachev #define mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x44F7 3732*b843c749SSergey Zigachev #define mmFMT3_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x44F8 3733*b843c749SSergey Zigachev #define mmFMT3_FMT_TEST_DEBUG_DATA 0x44EC 3734*b843c749SSergey Zigachev #define mmFMT3_FMT_TEST_DEBUG_INDEX 0x44EB 3735*b843c749SSergey Zigachev #define mmFMT4_FMT_BIT_DEPTH_CONTROL 0x47F2 3736*b843c749SSergey Zigachev #define mmFMT4_FMT_CLAMP_CNTL 0x47F9 3737*b843c749SSergey Zigachev #define mmFMT4_FMT_CONTROL 0x47EE 3738*b843c749SSergey Zigachev #define mmFMT4_FMT_CRC_CNTL 0x47FA 3739*b843c749SSergey Zigachev #define mmFMT4_FMT_CRC_SIG_BLUE_CONTROL 0x47FE 3740*b843c749SSergey Zigachev #define mmFMT4_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x47FC 3741*b843c749SSergey Zigachev #define mmFMT4_FMT_CRC_SIG_RED_GREEN 0x47FD 3742*b843c749SSergey Zigachev #define mmFMT4_FMT_CRC_SIG_RED_GREEN_MASK 0x47FB 3743*b843c749SSergey Zigachev #define mmFMT4_FMT_DEBUG_CNTL 0x47FF 3744*b843c749SSergey Zigachev #define mmFMT4_FMT_DITHER_RAND_B_SEED 0x47F5 3745*b843c749SSergey Zigachev #define mmFMT4_FMT_DITHER_RAND_G_SEED 0x47F4 3746*b843c749SSergey Zigachev #define mmFMT4_FMT_DITHER_RAND_R_SEED 0x47F3 3747*b843c749SSergey Zigachev #define mmFMT4_FMT_DYNAMIC_EXP_CNTL 0x47ED 3748*b843c749SSergey Zigachev #define mmFMT4_FMT_FORCE_DATA_0_1 0x47F0 3749*b843c749SSergey Zigachev #define mmFMT4_FMT_FORCE_DATA_2_3 0x47F1 3750*b843c749SSergey Zigachev #define mmFMT4_FMT_FORCE_OUTPUT_CNTL 0x47EF 3751*b843c749SSergey Zigachev #define mmFMT4_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x47F6 3752*b843c749SSergey Zigachev #define mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x47F7 3753*b843c749SSergey Zigachev #define mmFMT4_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x47F8 3754*b843c749SSergey Zigachev #define mmFMT4_FMT_TEST_DEBUG_DATA 0x47EC 3755*b843c749SSergey Zigachev #define mmFMT4_FMT_TEST_DEBUG_INDEX 0x47EB 3756*b843c749SSergey Zigachev #define mmFMT5_FMT_BIT_DEPTH_CONTROL 0x4AF2 3757*b843c749SSergey Zigachev #define mmFMT5_FMT_CLAMP_CNTL 0x4AF9 3758*b843c749SSergey Zigachev #define mmFMT5_FMT_CONTROL 0x4AEE 3759*b843c749SSergey Zigachev #define mmFMT5_FMT_CRC_CNTL 0x4AFA 3760*b843c749SSergey Zigachev #define mmFMT5_FMT_CRC_SIG_BLUE_CONTROL 0x4AFE 3761*b843c749SSergey Zigachev #define mmFMT5_FMT_CRC_SIG_BLUE_CONTROL_MASK 0x4AFC 3762*b843c749SSergey Zigachev #define mmFMT5_FMT_CRC_SIG_RED_GREEN 0x4AFD 3763*b843c749SSergey Zigachev #define mmFMT5_FMT_CRC_SIG_RED_GREEN_MASK 0x4AFB 3764*b843c749SSergey Zigachev #define mmFMT5_FMT_DEBUG_CNTL 0x4AFF 3765*b843c749SSergey Zigachev #define mmFMT5_FMT_DITHER_RAND_B_SEED 0x4AF5 3766*b843c749SSergey Zigachev #define mmFMT5_FMT_DITHER_RAND_G_SEED 0x4AF4 3767*b843c749SSergey Zigachev #define mmFMT5_FMT_DITHER_RAND_R_SEED 0x4AF3 3768*b843c749SSergey Zigachev #define mmFMT5_FMT_DYNAMIC_EXP_CNTL 0x4AED 3769*b843c749SSergey Zigachev #define mmFMT5_FMT_FORCE_DATA_0_1 0x4AF0 3770*b843c749SSergey Zigachev #define mmFMT5_FMT_FORCE_DATA_2_3 0x4AF1 3771*b843c749SSergey Zigachev #define mmFMT5_FMT_FORCE_OUTPUT_CNTL 0x4AEF 3772*b843c749SSergey Zigachev #define mmFMT5_FMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x4AF6 3773*b843c749SSergey Zigachev #define mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x4AF7 3774*b843c749SSergey Zigachev #define mmFMT5_FMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x4AF8 3775*b843c749SSergey Zigachev #define mmFMT5_FMT_TEST_DEBUG_DATA 0x4AEC 3776*b843c749SSergey Zigachev #define mmFMT5_FMT_TEST_DEBUG_INDEX 0x4AEB 3777*b843c749SSergey Zigachev #define mmFMT_BIT_DEPTH_CONTROL 0x1BF2 3778*b843c749SSergey Zigachev #define mmFMT_CLAMP_CNTL 0x1BF9 3779*b843c749SSergey Zigachev #define mmFMT_CONTROL 0x1BEE 3780*b843c749SSergey Zigachev #define mmFMT_CRC_CNTL 0x1BFA 3781*b843c749SSergey Zigachev #define mmFMT_CRC_SIG_BLUE_CONTROL 0x1BFE 3782*b843c749SSergey Zigachev #define mmFMT_CRC_SIG_BLUE_CONTROL_MASK 0x1BFC 3783*b843c749SSergey Zigachev #define mmFMT_CRC_SIG_RED_GREEN 0x1BFD 3784*b843c749SSergey Zigachev #define mmFMT_CRC_SIG_RED_GREEN_MASK 0x1BFB 3785*b843c749SSergey Zigachev #define mmFMT_DEBUG_CNTL 0x1BFF 3786*b843c749SSergey Zigachev #define mmFMT_DITHER_RAND_B_SEED 0x1BF5 3787*b843c749SSergey Zigachev #define mmFMT_DITHER_RAND_G_SEED 0x1BF4 3788*b843c749SSergey Zigachev #define mmFMT_DITHER_RAND_R_SEED 0x1BF3 3789*b843c749SSergey Zigachev #define mmFMT_DYNAMIC_EXP_CNTL 0x1BED 3790*b843c749SSergey Zigachev #define mmFMT_FORCE_DATA_0_1 0x1BF0 3791*b843c749SSergey Zigachev #define mmFMT_FORCE_DATA_2_3 0x1BF1 3792*b843c749SSergey Zigachev #define mmFMT_FORCE_OUTPUT_CNTL 0x1BEF 3793*b843c749SSergey Zigachev #define mmFMT_TEMPORAL_DITHER_PATTERN_CONTROL 0x1BF6 3794*b843c749SSergey Zigachev #define mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_S_MATRIX 0x1BF7 3795*b843c749SSergey Zigachev #define mmFMT_TEMPORAL_DITHER_PROGRAMMABLE_PATTERN_T_MATRIX 0x1BF8 3796*b843c749SSergey Zigachev #define mmFMT_TEST_DEBUG_DATA 0x1BEC 3797*b843c749SSergey Zigachev #define mmFMT_TEST_DEBUG_INDEX 0x1BEB 3798*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C11_C12 0x1A5A 3799*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C13_C14 0x1A5B 3800*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C21_C22 0x1A5C 3801*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C23_C24 0x1A5D 3802*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C31_C32 0x1A5E 3803*b843c749SSergey Zigachev #define mmGAMUT_REMAP_C33_C34 0x1A5F 3804*b843c749SSergey Zigachev #define mmGAMUT_REMAP_CONTROL 0x1A59 3805*b843c749SSergey Zigachev #define mmGENENB 0x00F0 3806*b843c749SSergey Zigachev #define mmGENERIC_I2C_CONTROL 0x1834 3807*b843c749SSergey Zigachev #define mmGENERIC_I2C_DATA 0x183A 3808*b843c749SSergey Zigachev #define mmGENERIC_I2C_INTERRUPT_CONTROL 0x1835 3809*b843c749SSergey Zigachev #define mmGENERIC_I2C_PIN_DEBUG 0x183C 3810*b843c749SSergey Zigachev #define mmGENERIC_I2C_PIN_SELECTION 0x183B 3811*b843c749SSergey Zigachev #define mmGENERIC_I2C_SETUP 0x1838 3812*b843c749SSergey Zigachev #define mmGENERIC_I2C_SPEED 0x1837 3813*b843c749SSergey Zigachev #define mmGENERIC_I2C_STATUS 0x1836 3814*b843c749SSergey Zigachev #define mmGENERIC_I2C_TRANSACTION 0x1839 3815*b843c749SSergey Zigachev #define mmGENFC_RD 0x00F2 3816*b843c749SSergey Zigachev #define mmGENFC_WT 0x00EE 3817*b843c749SSergey Zigachev #define mmGENMO_RD 0x00F3 3818*b843c749SSergey Zigachev #define mmGENMO_WT 0x00F0 3819*b843c749SSergey Zigachev #define mmGENS0 0x00F0 3820*b843c749SSergey Zigachev #define mmGENS1 0x00EE 3821*b843c749SSergey Zigachev #define mmGRPH8_DATA 0x00F3 3822*b843c749SSergey Zigachev #define mmGRPH8_IDX 0x00F3 3823*b843c749SSergey Zigachev #define mmGRPH_COMPRESS_PITCH 0x1A1A 3824*b843c749SSergey Zigachev #define mmGRPH_COMPRESS_SURFACE_ADDRESS 0x1A19 3825*b843c749SSergey Zigachev #define mmGRPH_COMPRESS_SURFACE_ADDRESS_HIGH 0x1A1B 3826*b843c749SSergey Zigachev #define mmGRPH_CONTROL 0x1A01 3827*b843c749SSergey Zigachev #define mmGRPH_DFQ_CONTROL 0x1A14 3828*b843c749SSergey Zigachev #define mmGRPH_DFQ_STATUS 0x1A15 3829*b843c749SSergey Zigachev #define mmGRPH_ENABLE 0x1A00 3830*b843c749SSergey Zigachev #define mmGRPH_FLIP_CONTROL 0x1A12 3831*b843c749SSergey Zigachev #define mmGRPH_INTERRUPT_CONTROL 0x1A17 3832*b843c749SSergey Zigachev #define mmGRPH_INTERRUPT_STATUS 0x1A16 3833*b843c749SSergey Zigachev #define mmGRPH_LUT_10BIT_BYPASS 0x1A02 3834*b843c749SSergey Zigachev #define mmGRPH_PITCH 0x1A06 3835*b843c749SSergey Zigachev #define mmGRPH_PRIMARY_SURFACE_ADDRESS 0x1A04 3836*b843c749SSergey Zigachev #define mmGRPH_PRIMARY_SURFACE_ADDRESS_HIGH 0x1A07 3837*b843c749SSergey Zigachev #define mmGRPH_SECONDARY_SURFACE_ADDRESS 0x1A05 3838*b843c749SSergey Zigachev #define mmGRPH_SECONDARY_SURFACE_ADDRESS_HIGH 0x1A08 3839*b843c749SSergey Zigachev #define mmGRPH_STEREOSYNC_FLIP 0x1A97 3840*b843c749SSergey Zigachev #define mmGRPH_SURFACE_ADDRESS_HIGH_INUSE 0x1A18 3841*b843c749SSergey Zigachev #define mmGRPH_SURFACE_ADDRESS_INUSE 0x1A13 3842*b843c749SSergey Zigachev #define mmGRPH_SURFACE_OFFSET_X 0x1A09 3843*b843c749SSergey Zigachev #define mmGRPH_SURFACE_OFFSET_Y 0x1A0A 3844*b843c749SSergey Zigachev #define mmGRPH_SWAP_CNTL 0x1A03 3845*b843c749SSergey Zigachev #define mmGRPH_UPDATE 0x1A11 3846*b843c749SSergey Zigachev #define mmGRPH_X_END 0x1A0D 3847*b843c749SSergey Zigachev #define mmGRPH_X_START 0x1A0B 3848*b843c749SSergey Zigachev #define mmGRPH_Y_END 0x1A0E 3849*b843c749SSergey Zigachev #define mmGRPH_Y_START 0x1A0C 3850*b843c749SSergey Zigachev #define mmHDMI_ACR_32_0 0x1C37 3851*b843c749SSergey Zigachev #define mmHDMI_ACR_32_1 0x1C38 3852*b843c749SSergey Zigachev #define mmHDMI_ACR_44_0 0x1C39 3853*b843c749SSergey Zigachev #define mmHDMI_ACR_44_1 0x1C3A 3854*b843c749SSergey Zigachev #define mmHDMI_ACR_48_0 0x1C3B 3855*b843c749SSergey Zigachev #define mmHDMI_ACR_48_1 0x1C3C 3856*b843c749SSergey Zigachev #define mmHDMI_ACR_PACKET_CONTROL 0x1C0F 3857*b843c749SSergey Zigachev #define mmHDMI_ACR_STATUS_0 0x1C3D 3858*b843c749SSergey Zigachev #define mmHDMI_ACR_STATUS_1 0x1C3E 3859*b843c749SSergey Zigachev #define mmHDMI_AUDIO_PACKET_CONTROL 0x1C0E 3860*b843c749SSergey Zigachev #define mmHDMI_CONTROL 0x1C0C 3861*b843c749SSergey Zigachev #define mmHDMI_GC 0x1C16 3862*b843c749SSergey Zigachev #define mmHDMI_GENERIC_PACKET_CONTROL0 0x1C13 3863*b843c749SSergey Zigachev #define mmHDMI_GENERIC_PACKET_CONTROL1 0x1C30 3864*b843c749SSergey Zigachev #define mmHDMI_INFOFRAME_CONTROL0 0x1C11 3865*b843c749SSergey Zigachev #define mmHDMI_INFOFRAME_CONTROL1 0x1C12 3866*b843c749SSergey Zigachev #define mmHDMI_STATUS 0x1C0D 3867*b843c749SSergey Zigachev #define mmHDMI_VBI_PACKET_CONTROL 0x1C10 3868*b843c749SSergey Zigachev #define mmINPUT_CSC_C11_C12 0x1A36 3869*b843c749SSergey Zigachev #define mmINPUT_CSC_C13_C14 0x1A37 3870*b843c749SSergey Zigachev #define mmINPUT_CSC_C21_C22 0x1A38 3871*b843c749SSergey Zigachev #define mmINPUT_CSC_C23_C24 0x1A39 3872*b843c749SSergey Zigachev #define mmINPUT_CSC_C31_C32 0x1A3A 3873*b843c749SSergey Zigachev #define mmINPUT_CSC_C33_C34 0x1A3B 3874*b843c749SSergey Zigachev #define mmINPUT_CSC_CONTROL 0x1A35 3875*b843c749SSergey Zigachev #define mmINPUT_GAMMA_CONTROL 0x1A10 3876*b843c749SSergey Zigachev #define mmKEY_CONTROL 0x1A53 3877*b843c749SSergey Zigachev #define mmKEY_RANGE_ALPHA 0x1A54 3878*b843c749SSergey Zigachev #define mmKEY_RANGE_BLUE 0x1A57 3879*b843c749SSergey Zigachev #define mmKEY_RANGE_GREEN 0x1A56 3880*b843c749SSergey Zigachev #define mmKEY_RANGE_RED 0x1A55 3881*b843c749SSergey Zigachev #define mmLB0_DC_MVP_LB_CONTROL 0x1ADB 3882*b843c749SSergey Zigachev #define mmLB0_LB_DEBUG 0x1AFC 3883*b843c749SSergey Zigachev #define mmLB0_LB_DEBUG2 0x1AC9 3884*b843c749SSergey Zigachev #define mmLB0_LB_NO_OUTSTANDING_REQ_STATUS 0x1AC8 3885*b843c749SSergey Zigachev #define mmLB0_LB_SYNC_RESET_SEL 0x1ACA 3886*b843c749SSergey Zigachev #define mmLB0_LB_TEST_DEBUG_DATA 0x1AFF 3887*b843c749SSergey Zigachev #define mmLB0_LB_TEST_DEBUG_INDEX 0x1AFE 3888*b843c749SSergey Zigachev #define mmLB0_MVP_AFR_FLIP_FIFO_CNTL 0x1AD9 3889*b843c749SSergey Zigachev #define mmLB0_MVP_AFR_FLIP_MODE 0x1AD8 3890*b843c749SSergey Zigachev #define mmLB0_MVP_FLIP_LINE_NUM_INSERT 0x1ADA 3891*b843c749SSergey Zigachev #define mmLB1_DC_MVP_LB_CONTROL 0x1DDB 3892*b843c749SSergey Zigachev #define mmLB1_LB_DEBUG 0x1DFC 3893*b843c749SSergey Zigachev #define mmLB1_LB_DEBUG2 0x1DC9 3894*b843c749SSergey Zigachev #define mmLB1_LB_NO_OUTSTANDING_REQ_STATUS 0x1DC8 3895*b843c749SSergey Zigachev #define mmLB1_LB_SYNC_RESET_SEL 0x1DCA 3896*b843c749SSergey Zigachev #define mmLB1_LB_TEST_DEBUG_DATA 0x1DFF 3897*b843c749SSergey Zigachev #define mmLB1_LB_TEST_DEBUG_INDEX 0x1DFE 3898*b843c749SSergey Zigachev #define mmLB1_MVP_AFR_FLIP_FIFO_CNTL 0x1DD9 3899*b843c749SSergey Zigachev #define mmLB1_MVP_AFR_FLIP_MODE 0x1DD8 3900*b843c749SSergey Zigachev #define mmLB1_MVP_FLIP_LINE_NUM_INSERT 0x1DDA 3901*b843c749SSergey Zigachev #define mmLB2_DC_MVP_LB_CONTROL 0x40DB 3902*b843c749SSergey Zigachev #define mmLB2_LB_DEBUG 0x40FC 3903*b843c749SSergey Zigachev #define mmLB2_LB_DEBUG2 0x40C9 3904*b843c749SSergey Zigachev #define mmLB2_LB_NO_OUTSTANDING_REQ_STATUS 0x40C8 3905*b843c749SSergey Zigachev #define mmLB2_LB_SYNC_RESET_SEL 0x40CA 3906*b843c749SSergey Zigachev #define mmLB2_LB_TEST_DEBUG_DATA 0x40FF 3907*b843c749SSergey Zigachev #define mmLB2_LB_TEST_DEBUG_INDEX 0x40FE 3908*b843c749SSergey Zigachev #define mmLB2_MVP_AFR_FLIP_FIFO_CNTL 0x40D9 3909*b843c749SSergey Zigachev #define mmLB2_MVP_AFR_FLIP_MODE 0x40D8 3910*b843c749SSergey Zigachev #define mmLB2_MVP_FLIP_LINE_NUM_INSERT 0x40DA 3911*b843c749SSergey Zigachev #define mmLB3_DC_MVP_LB_CONTROL 0x43DB 3912*b843c749SSergey Zigachev #define mmLB3_LB_DEBUG 0x43FC 3913*b843c749SSergey Zigachev #define mmLB3_LB_DEBUG2 0x43C9 3914*b843c749SSergey Zigachev #define mmLB3_LB_NO_OUTSTANDING_REQ_STATUS 0x43C8 3915*b843c749SSergey Zigachev #define mmLB3_LB_SYNC_RESET_SEL 0x43CA 3916*b843c749SSergey Zigachev #define mmLB3_LB_TEST_DEBUG_DATA 0x43FF 3917*b843c749SSergey Zigachev #define mmLB3_LB_TEST_DEBUG_INDEX 0x43FE 3918*b843c749SSergey Zigachev #define mmLB3_MVP_AFR_FLIP_FIFO_CNTL 0x43D9 3919*b843c749SSergey Zigachev #define mmLB3_MVP_AFR_FLIP_MODE 0x43D8 3920*b843c749SSergey Zigachev #define mmLB3_MVP_FLIP_LINE_NUM_INSERT 0x43DA 3921*b843c749SSergey Zigachev #define mmLB4_DC_MVP_LB_CONTROL 0x46DB 3922*b843c749SSergey Zigachev #define mmLB4_LB_DEBUG 0x46FC 3923*b843c749SSergey Zigachev #define mmLB4_LB_DEBUG2 0x46C9 3924*b843c749SSergey Zigachev #define mmLB4_LB_NO_OUTSTANDING_REQ_STATUS 0x46C8 3925*b843c749SSergey Zigachev #define mmLB4_LB_SYNC_RESET_SEL 0x46CA 3926*b843c749SSergey Zigachev #define mmLB4_LB_TEST_DEBUG_DATA 0x46FF 3927*b843c749SSergey Zigachev #define mmLB4_LB_TEST_DEBUG_INDEX 0x46FE 3928*b843c749SSergey Zigachev #define mmLB4_MVP_AFR_FLIP_FIFO_CNTL 0x46D9 3929*b843c749SSergey Zigachev #define mmLB4_MVP_AFR_FLIP_MODE 0x46D8 3930*b843c749SSergey Zigachev #define mmLB4_MVP_FLIP_LINE_NUM_INSERT 0x46DA 3931*b843c749SSergey Zigachev #define mmLB5_DC_MVP_LB_CONTROL 0x49DB 3932*b843c749SSergey Zigachev #define mmLB5_LB_DEBUG 0x49FC 3933*b843c749SSergey Zigachev #define mmLB5_LB_DEBUG2 0x49C9 3934*b843c749SSergey Zigachev #define mmLB5_LB_NO_OUTSTANDING_REQ_STATUS 0x49C8 3935*b843c749SSergey Zigachev #define mmLB5_LB_SYNC_RESET_SEL 0x49CA 3936*b843c749SSergey Zigachev #define mmLB5_LB_TEST_DEBUG_DATA 0x49FF 3937*b843c749SSergey Zigachev #define mmLB5_LB_TEST_DEBUG_INDEX 0x49FE 3938*b843c749SSergey Zigachev #define mmLB5_MVP_AFR_FLIP_FIFO_CNTL 0x49D9 3939*b843c749SSergey Zigachev #define mmLB5_MVP_AFR_FLIP_MODE 0x49D8 3940*b843c749SSergey Zigachev #define mmLB5_MVP_FLIP_LINE_NUM_INSERT 0x49DA 3941*b843c749SSergey Zigachev #define mmLB_DEBUG 0x1AFC 3942*b843c749SSergey Zigachev #define mmLB_DEBUG2 0x1AC9 3943*b843c749SSergey Zigachev #define mmLB_NO_OUTSTANDING_REQ_STATUS 0x1AC8 3944*b843c749SSergey Zigachev #define mmLB_SYNC_RESET_SEL 0x1ACA 3945*b843c749SSergey Zigachev #define mmLB_TEST_DEBUG_DATA 0x1AFF 3946*b843c749SSergey Zigachev #define mmLB_TEST_DEBUG_INDEX 0x1AFE 3947*b843c749SSergey Zigachev #define mmLIGHT_SLEEP_CNTL 0x0132 3948*b843c749SSergey Zigachev #define mmLOW_POWER_TILING_CONTROL 0x0325 3949*b843c749SSergey Zigachev #define mmLVDS_DATA_CNTL 0x1C8C 3950*b843c749SSergey Zigachev #define mmLVTMA_PWRSEQ_CNTL 0x1919 3951*b843c749SSergey Zigachev #define mmLVTMA_PWRSEQ_DELAY1 0x191C 3952*b843c749SSergey Zigachev #define mmLVTMA_PWRSEQ_DELAY2 0x191D 3953*b843c749SSergey Zigachev #define mmLVTMA_PWRSEQ_REF_DIV 0x191B 3954*b843c749SSergey Zigachev #define mmLVTMA_PWRSEQ_STATE 0x191A 3955*b843c749SSergey Zigachev #define mmMASTER_COMM_CMD_REG 0x161F 3956*b843c749SSergey Zigachev #define mmMASTER_COMM_CNTL_REG 0x1620 3957*b843c749SSergey Zigachev #define mmMASTER_COMM_DATA_REG1 0x161C 3958*b843c749SSergey Zigachev #define mmMASTER_COMM_DATA_REG2 0x161D 3959*b843c749SSergey Zigachev #define mmMASTER_COMM_DATA_REG3 0x161E 3960*b843c749SSergey Zigachev #define mmMASTER_UPDATE_LOCK 0x1BBD 3961*b843c749SSergey Zigachev #define mmMASTER_UPDATE_MODE 0x1BBE 3962*b843c749SSergey Zigachev #define mmMC_DC_INTERFACE_NACK_STATUS 0x031C 3963*b843c749SSergey Zigachev #define mmMCIF_CONTROL 0x0314 3964*b843c749SSergey Zigachev #define mmMCIF_MEM_CONTROL 0x0319 3965*b843c749SSergey Zigachev #define mmMCIF_TEST_DEBUG_DATA 0x0317 3966*b843c749SSergey Zigachev #define mmMCIF_TEST_DEBUG_INDEX 0x0316 3967*b843c749SSergey Zigachev #define mmMCIF_VMID 0x0318 3968*b843c749SSergey Zigachev #define mmMCIF_WRITE_COMBINE_CONTROL 0x0315 3969*b843c749SSergey Zigachev #define mmMICROSECOND_TIME_BASE_DIV 0x013B 3970*b843c749SSergey Zigachev #define mmMILLISECOND_TIME_BASE_DIV 0x0130 3971*b843c749SSergey Zigachev #define mmMVP_AFR_FLIP_FIFO_CNTL 0x1AD9 3972*b843c749SSergey Zigachev #define mmMVP_AFR_FLIP_MODE 0x1AD8 3973*b843c749SSergey Zigachev #define mmMVP_BLACK_KEYER 0x1686 3974*b843c749SSergey Zigachev #define mmMVP_CONTROL1 0x1680 3975*b843c749SSergey Zigachev #define mmMVP_CONTROL2 0x1681 3976*b843c749SSergey Zigachev #define mmMVP_CONTROL3 0x168A 3977*b843c749SSergey Zigachev #define mmMVP_CRC_CNTL 0x1687 3978*b843c749SSergey Zigachev #define mmMVP_CRC_RESULT_BLUE_GREEN 0x1688 3979*b843c749SSergey Zigachev #define mmMVP_CRC_RESULT_RED 0x1689 3980*b843c749SSergey Zigachev #define mmMVP_DEBUG 0x168F 3981*b843c749SSergey Zigachev #define mmMVP_FIFO_CONTROL 0x1682 3982*b843c749SSergey Zigachev #define mmMVP_FIFO_STATUS 0x1683 3983*b843c749SSergey Zigachev #define mmMVP_FLIP_LINE_NUM_INSERT 0x1ADA 3984*b843c749SSergey Zigachev #define mmMVP_INBAND_CNTL_CAP 0x1685 3985*b843c749SSergey Zigachev #define mmMVP_RECEIVE_CNT_CNTL1 0x168B 3986*b843c749SSergey Zigachev #define mmMVP_RECEIVE_CNT_CNTL2 0x168C 3987*b843c749SSergey Zigachev #define mmMVP_SLAVE_STATUS 0x1684 3988*b843c749SSergey Zigachev #define mmMVP_TEST_DEBUG_DATA 0x168E 3989*b843c749SSergey Zigachev #define mmMVP_TEST_DEBUG_INDEX 0x168D 3990*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C11_C12 0x1A3D 3991*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C13_C14 0x1A3E 3992*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C21_C22 0x1A3F 3993*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C23_C24 0x1A40 3994*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C31_C32 0x1A41 3995*b843c749SSergey Zigachev #define mmOUTPUT_CSC_C33_C34 0x1A42 3996*b843c749SSergey Zigachev #define mmOUTPUT_CSC_CONTROL 0x1A3C 3997*b843c749SSergey Zigachev #define mmOUT_ROUND_CONTROL 0x1A51 3998*b843c749SSergey Zigachev #define mmOVL_CONTROL1 0x1A1D 3999*b843c749SSergey Zigachev #define mmOVL_CONTROL2 0x1A1E 4000*b843c749SSergey Zigachev #define mmOVL_DFQ_CONTROL 0x1A29 4001*b843c749SSergey Zigachev #define mmOVL_DFQ_STATUS 0x1A2A 4002*b843c749SSergey Zigachev #define mmOVL_ENABLE 0x1A1C 4003*b843c749SSergey Zigachev #define mmOVL_END 0x1A26 4004*b843c749SSergey Zigachev #define mmOVL_PITCH 0x1A21 4005*b843c749SSergey Zigachev #define mmOVLSCL_EDGE_PIXEL_CNTL 0x1A2C 4006*b843c749SSergey Zigachev #define mmOVL_SECONDARY_SURFACE_ADDRESS 0x1A92 4007*b843c749SSergey Zigachev #define mmOVL_SECONDARY_SURFACE_ADDRESS_HIGH 0x1A94 4008*b843c749SSergey Zigachev #define mmOVL_START 0x1A25 4009*b843c749SSergey Zigachev #define mmOVL_STEREOSYNC_FLIP 0x1A93 4010*b843c749SSergey Zigachev #define mmOVL_SURFACE_ADDRESS 0x1A20 4011*b843c749SSergey Zigachev #define mmOVL_SURFACE_ADDRESS_HIGH 0x1A22 4012*b843c749SSergey Zigachev #define mmOVL_SURFACE_ADDRESS_HIGH_INUSE 0x1A2B 4013*b843c749SSergey Zigachev #define mmOVL_SURFACE_ADDRESS_INUSE 0x1A28 4014*b843c749SSergey Zigachev #define mmOVL_SURFACE_OFFSET_X 0x1A23 4015*b843c749SSergey Zigachev #define mmOVL_SURFACE_OFFSET_Y 0x1A24 4016*b843c749SSergey Zigachev #define mmOVL_SWAP_CNTL 0x1A1F 4017*b843c749SSergey Zigachev #define mmOVL_UPDATE 0x1A27 4018*b843c749SSergey Zigachev #define mmPHY_AUX_CNTL 0x197F 4019*b843c749SSergey Zigachev #define mmPIPE0_ARBITRATION_CONTROL3 0x02FA 4020*b843c749SSergey Zigachev #define mmPIPE0_DMIF_BUFFER_CONTROL 0x0328 4021*b843c749SSergey Zigachev #define mmPIPE0_MAX_REQUESTS 0x0302 4022*b843c749SSergey Zigachev #define mmPIPE0_PG_CONFIG 0x1760 4023*b843c749SSergey Zigachev #define mmPIPE0_PG_ENABLE 0x1761 4024*b843c749SSergey Zigachev #define mmPIPE0_PG_STATUS 0x1762 4025*b843c749SSergey Zigachev #define mmPIPE1_ARBITRATION_CONTROL3 0x02FB 4026*b843c749SSergey Zigachev #define mmPIPE1_DMIF_BUFFER_CONTROL 0x0330 4027*b843c749SSergey Zigachev #define mmPIPE1_MAX_REQUESTS 0x0303 4028*b843c749SSergey Zigachev #define mmPIPE1_PG_CONFIG 0x1764 4029*b843c749SSergey Zigachev #define mmPIPE1_PG_ENABLE 0x1765 4030*b843c749SSergey Zigachev #define mmPIPE1_PG_STATUS 0x1766 4031*b843c749SSergey Zigachev #define mmPIPE2_ARBITRATION_CONTROL3 0x02FC 4032*b843c749SSergey Zigachev #define mmPIPE2_DMIF_BUFFER_CONTROL 0x0338 4033*b843c749SSergey Zigachev #define mmPIPE2_MAX_REQUESTS 0x0304 4034*b843c749SSergey Zigachev #define mmPIPE2_PG_CONFIG 0x1768 4035*b843c749SSergey Zigachev #define mmPIPE2_PG_ENABLE 0x1769 4036*b843c749SSergey Zigachev #define mmPIPE2_PG_STATUS 0x176A 4037*b843c749SSergey Zigachev #define mmPIPE3_ARBITRATION_CONTROL3 0x02FD 4038*b843c749SSergey Zigachev #define mmPIPE3_DMIF_BUFFER_CONTROL 0x0340 4039*b843c749SSergey Zigachev #define mmPIPE3_MAX_REQUESTS 0x0305 4040*b843c749SSergey Zigachev #define mmPIPE3_PG_CONFIG 0x176C 4041*b843c749SSergey Zigachev #define mmPIPE3_PG_ENABLE 0x176D 4042*b843c749SSergey Zigachev #define mmPIPE3_PG_STATUS 0x176E 4043*b843c749SSergey Zigachev #define mmPIPE4_ARBITRATION_CONTROL3 0x02FE 4044*b843c749SSergey Zigachev #define mmPIPE4_DMIF_BUFFER_CONTROL 0x0348 4045*b843c749SSergey Zigachev #define mmPIPE4_MAX_REQUESTS 0x0306 4046*b843c749SSergey Zigachev #define mmPIPE4_PG_CONFIG 0x1770 4047*b843c749SSergey Zigachev #define mmPIPE4_PG_ENABLE 0x1771 4048*b843c749SSergey Zigachev #define mmPIPE4_PG_STATUS 0x1772 4049*b843c749SSergey Zigachev #define mmPIPE5_ARBITRATION_CONTROL3 0x02FF 4050*b843c749SSergey Zigachev #define mmPIPE5_DMIF_BUFFER_CONTROL 0x0350 4051*b843c749SSergey Zigachev #define mmPIPE5_MAX_REQUESTS 0x0307 4052*b843c749SSergey Zigachev #define mmPIPE5_PG_CONFIG 0x1774 4053*b843c749SSergey Zigachev #define mmPIPE5_PG_ENABLE 0x1775 4054*b843c749SSergey Zigachev #define mmPIPE5_PG_STATUS 0x1776 4055*b843c749SSergey Zigachev #define mmPIXCLK0_RESYNC_CNTL 0x013A 4056*b843c749SSergey Zigachev #define mmPIXCLK1_RESYNC_CNTL 0x0138 4057*b843c749SSergey Zigachev #define mmPIXCLK2_RESYNC_CNTL 0x0139 4058*b843c749SSergey Zigachev #define mmPLL_ANALOG 0x1708 4059*b843c749SSergey Zigachev #define mmPLL_CNTL 0x1707 4060*b843c749SSergey Zigachev #define mmPLL_DEBUG_CNTL 0x170B 4061*b843c749SSergey Zigachev #define mmPLL_DISPCLK_CURRENT_DTO_PHASE 0x170F 4062*b843c749SSergey Zigachev #define mmPLL_DISPCLK_DTO_CNTL 0x170E 4063*b843c749SSergey Zigachev #define mmPLL_DS_CNTL 0x1705 4064*b843c749SSergey Zigachev #define mmPLL_FB_DIV 0x1701 4065*b843c749SSergey Zigachev #define mmPLL_IDCLK_CNTL 0x1706 4066*b843c749SSergey Zigachev #define mmPLL_POST_DIV 0x1702 4067*b843c749SSergey Zigachev #define mmPLL_REF_DIV 0x1700 4068*b843c749SSergey Zigachev #define mmPLL_SS_AMOUNT_DSFRAC 0x1703 4069*b843c749SSergey Zigachev #define mmPLL_SS_CNTL 0x1704 4070*b843c749SSergey Zigachev #define mmPLL_UNLOCK_DETECT_CNTL 0x170A 4071*b843c749SSergey Zigachev #define mmPLL_UPDATE_CNTL 0x170D 4072*b843c749SSergey Zigachev #define mmPLL_UPDATE_LOCK 0x170C 4073*b843c749SSergey Zigachev #define mmPLL_VREG_CNTL 0x1709 4074*b843c749SSergey Zigachev #define mmPRESCALE_GRPH_CONTROL 0x1A2D 4075*b843c749SSergey Zigachev #define mmPRESCALE_OVL_CONTROL 0x1A31 4076*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_GRPH_B 0x1A30 4077*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_GRPH_G 0x1A2F 4078*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_GRPH_R 0x1A2E 4079*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_OVL_CB 0x1A32 4080*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_OVL_CR 0x1A34 4081*b843c749SSergey Zigachev #define mmPRESCALE_VALUES_OVL_Y 0x1A33 4082*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_END_CNTL1 0x1AA6 4083*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_END_CNTL2 0x1AA7 4084*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_0_1 0x1AA8 4085*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_10_11 0x1AAD 4086*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_12_13 0x1AAE 4087*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_14_15 0x1AAF 4088*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_2_3 0x1AA9 4089*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_4_5 0x1AAA 4090*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_6_7 0x1AAB 4091*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_REGION_8_9 0x1AAC 4092*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_SLOPE_CNTL 0x1AA5 4093*b843c749SSergey Zigachev #define mmREGAMMA_CNTLA_START_CNTL 0x1AA4 4094*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_END_CNTL1 0x1AB2 4095*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_END_CNTL2 0x1AB3 4096*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_0_1 0x1AB4 4097*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_10_11 0x1AB9 4098*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_12_13 0x1ABA 4099*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_14_15 0x1ABB 4100*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_2_3 0x1AB5 4101*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_4_5 0x1AB6 4102*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_6_7 0x1AB7 4103*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_REGION_8_9 0x1AB8 4104*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_SLOPE_CNTL 0x1AB1 4105*b843c749SSergey Zigachev #define mmREGAMMA_CNTLB_START_CNTL 0x1AB0 4106*b843c749SSergey Zigachev #define mmREGAMMA_CONTROL 0x1AA0 4107*b843c749SSergey Zigachev #define mmREGAMMA_LUT_DATA 0x1AA2 4108*b843c749SSergey Zigachev #define mmREGAMMA_LUT_INDEX 0x1AA1 4109*b843c749SSergey Zigachev #define mmREGAMMA_LUT_WRITE_EN_MASK 0x1AA3 4110*b843c749SSergey Zigachev #define mmSCL0_EXT_OVERSCAN_LEFT_RIGHT 0x1B5E 4111*b843c749SSergey Zigachev #define mmSCL0_EXT_OVERSCAN_TOP_BOTTOM 0x1B5F 4112*b843c749SSergey Zigachev #define mmSCL0_SCL_ALU_CONTROL 0x1B54 4113*b843c749SSergey Zigachev #define mmSCL0_SCL_AUTOMATIC_MODE_CONTROL 0x1B47 4114*b843c749SSergey Zigachev #define mmSCL0_SCL_BYPASS_CONTROL 0x1B45 4115*b843c749SSergey Zigachev #define mmSCL0_SCL_COEF_RAM_CONFLICT_STATUS 0x1B55 4116*b843c749SSergey Zigachev #define mmSCL0_SCL_COEF_RAM_SELECT 0x1B40 4117*b843c749SSergey Zigachev #define mmSCL0_SCL_COEF_RAM_TAP_DATA 0x1B41 4118*b843c749SSergey Zigachev #define mmSCL0_SCL_CONTROL 0x1B44 4119*b843c749SSergey Zigachev #define mmSCL0_SCL_DEBUG 0x1B6A 4120*b843c749SSergey Zigachev #define mmSCL0_SCL_DEBUG2 0x1B69 4121*b843c749SSergey Zigachev #define mmSCL0_SCL_F_SHARP_CONTROL 0x1B53 4122*b843c749SSergey Zigachev #define mmSCL0_SCL_HORZ_FILTER_CONTROL 0x1B4A 4123*b843c749SSergey Zigachev #define mmSCL0_SCL_HORZ_FILTER_SCALE_RATIO 0x1B4B 4124*b843c749SSergey Zigachev #define mmSCL0_SCL_MANUAL_REPLICATE_CONTROL 0x1B46 4125*b843c749SSergey Zigachev #define mmSCL0_SCL_MODE_CHANGE_DET1 0x1B60 4126*b843c749SSergey Zigachev #define mmSCL0_SCL_MODE_CHANGE_DET2 0x1B61 4127*b843c749SSergey Zigachev #define mmSCL0_SCL_MODE_CHANGE_DET3 0x1B62 4128*b843c749SSergey Zigachev #define mmSCL0_SCL_MODE_CHANGE_MASK 0x1B63 4129*b843c749SSergey Zigachev #define mmSCL0_SCL_TAP_CONTROL 0x1B43 4130*b843c749SSergey Zigachev #define mmSCL0_SCL_TEST_DEBUG_DATA 0x1B6C 4131*b843c749SSergey Zigachev #define mmSCL0_SCL_TEST_DEBUG_INDEX 0x1B6B 4132*b843c749SSergey Zigachev #define mmSCL0_SCL_UPDATE 0x1B51 4133*b843c749SSergey Zigachev #define mmSCL0_SCL_VERT_FILTER_CONTROL 0x1B4E 4134*b843c749SSergey Zigachev #define mmSCL0_SCL_VERT_FILTER_INIT 0x1B50 4135*b843c749SSergey Zigachev #define mmSCL0_SCL_VERT_FILTER_INIT_BOT 0x1B57 4136*b843c749SSergey Zigachev #define mmSCL0_SCL_VERT_FILTER_SCALE_RATIO 0x1B4F 4137*b843c749SSergey Zigachev #define mmSCL0_VIEWPORT_SIZE 0x1B5D 4138*b843c749SSergey Zigachev #define mmSCL0_VIEWPORT_START 0x1B5C 4139*b843c749SSergey Zigachev #define mmSCL1_EXT_OVERSCAN_LEFT_RIGHT 0x1E5E 4140*b843c749SSergey Zigachev #define mmSCL1_EXT_OVERSCAN_TOP_BOTTOM 0x1E5F 4141*b843c749SSergey Zigachev #define mmSCL1_SCL_ALU_CONTROL 0x1E54 4142*b843c749SSergey Zigachev #define mmSCL1_SCL_AUTOMATIC_MODE_CONTROL 0x1E47 4143*b843c749SSergey Zigachev #define mmSCL1_SCL_BYPASS_CONTROL 0x1E45 4144*b843c749SSergey Zigachev #define mmSCL1_SCL_COEF_RAM_CONFLICT_STATUS 0x1E55 4145*b843c749SSergey Zigachev #define mmSCL1_SCL_COEF_RAM_SELECT 0x1E40 4146*b843c749SSergey Zigachev #define mmSCL1_SCL_COEF_RAM_TAP_DATA 0x1E41 4147*b843c749SSergey Zigachev #define mmSCL1_SCL_CONTROL 0x1E44 4148*b843c749SSergey Zigachev #define mmSCL1_SCL_DEBUG 0x1E6A 4149*b843c749SSergey Zigachev #define mmSCL1_SCL_DEBUG2 0x1E69 4150*b843c749SSergey Zigachev #define mmSCL1_SCL_F_SHARP_CONTROL 0x1E53 4151*b843c749SSergey Zigachev #define mmSCL1_SCL_HORZ_FILTER_CONTROL 0x1E4A 4152*b843c749SSergey Zigachev #define mmSCL1_SCL_HORZ_FILTER_SCALE_RATIO 0x1E4B 4153*b843c749SSergey Zigachev #define mmSCL1_SCL_MANUAL_REPLICATE_CONTROL 0x1E46 4154*b843c749SSergey Zigachev #define mmSCL1_SCL_MODE_CHANGE_DET1 0x1E60 4155*b843c749SSergey Zigachev #define mmSCL1_SCL_MODE_CHANGE_DET2 0x1E61 4156*b843c749SSergey Zigachev #define mmSCL1_SCL_MODE_CHANGE_DET3 0x1E62 4157*b843c749SSergey Zigachev #define mmSCL1_SCL_MODE_CHANGE_MASK 0x1E63 4158*b843c749SSergey Zigachev #define mmSCL1_SCL_TAP_CONTROL 0x1E43 4159*b843c749SSergey Zigachev #define mmSCL1_SCL_TEST_DEBUG_DATA 0x1E6C 4160*b843c749SSergey Zigachev #define mmSCL1_SCL_TEST_DEBUG_INDEX 0x1E6B 4161*b843c749SSergey Zigachev #define mmSCL1_SCL_UPDATE 0x1E51 4162*b843c749SSergey Zigachev #define mmSCL1_SCL_VERT_FILTER_CONTROL 0x1E4E 4163*b843c749SSergey Zigachev #define mmSCL1_SCL_VERT_FILTER_INIT 0x1E50 4164*b843c749SSergey Zigachev #define mmSCL1_SCL_VERT_FILTER_INIT_BOT 0x1E57 4165*b843c749SSergey Zigachev #define mmSCL1_SCL_VERT_FILTER_SCALE_RATIO 0x1E4F 4166*b843c749SSergey Zigachev #define mmSCL1_VIEWPORT_SIZE 0x1E5D 4167*b843c749SSergey Zigachev #define mmSCL1_VIEWPORT_START 0x1E5C 4168*b843c749SSergey Zigachev #define mmSCL2_EXT_OVERSCAN_LEFT_RIGHT 0x415E 4169*b843c749SSergey Zigachev #define mmSCL2_EXT_OVERSCAN_TOP_BOTTOM 0x415F 4170*b843c749SSergey Zigachev #define mmSCL2_SCL_ALU_CONTROL 0x4154 4171*b843c749SSergey Zigachev #define mmSCL2_SCL_AUTOMATIC_MODE_CONTROL 0x4147 4172*b843c749SSergey Zigachev #define mmSCL2_SCL_BYPASS_CONTROL 0x4145 4173*b843c749SSergey Zigachev #define mmSCL2_SCL_COEF_RAM_CONFLICT_STATUS 0x4155 4174*b843c749SSergey Zigachev #define mmSCL2_SCL_COEF_RAM_SELECT 0x4140 4175*b843c749SSergey Zigachev #define mmSCL2_SCL_COEF_RAM_TAP_DATA 0x4141 4176*b843c749SSergey Zigachev #define mmSCL2_SCL_CONTROL 0x4144 4177*b843c749SSergey Zigachev #define mmSCL2_SCL_DEBUG 0x416A 4178*b843c749SSergey Zigachev #define mmSCL2_SCL_DEBUG2 0x4169 4179*b843c749SSergey Zigachev #define mmSCL2_SCL_F_SHARP_CONTROL 0x4153 4180*b843c749SSergey Zigachev #define mmSCL2_SCL_HORZ_FILTER_CONTROL 0x414A 4181*b843c749SSergey Zigachev #define mmSCL2_SCL_HORZ_FILTER_SCALE_RATIO 0x414B 4182*b843c749SSergey Zigachev #define mmSCL2_SCL_MANUAL_REPLICATE_CONTROL 0x4146 4183*b843c749SSergey Zigachev #define mmSCL2_SCL_MODE_CHANGE_DET1 0x4160 4184*b843c749SSergey Zigachev #define mmSCL2_SCL_MODE_CHANGE_DET2 0x4161 4185*b843c749SSergey Zigachev #define mmSCL2_SCL_MODE_CHANGE_DET3 0x4162 4186*b843c749SSergey Zigachev #define mmSCL2_SCL_MODE_CHANGE_MASK 0x4163 4187*b843c749SSergey Zigachev #define mmSCL2_SCL_TAP_CONTROL 0x4143 4188*b843c749SSergey Zigachev #define mmSCL2_SCL_TEST_DEBUG_DATA 0x416C 4189*b843c749SSergey Zigachev #define mmSCL2_SCL_TEST_DEBUG_INDEX 0x416B 4190*b843c749SSergey Zigachev #define mmSCL2_SCL_UPDATE 0x4151 4191*b843c749SSergey Zigachev #define mmSCL2_SCL_VERT_FILTER_CONTROL 0x414E 4192*b843c749SSergey Zigachev #define mmSCL2_SCL_VERT_FILTER_INIT 0x4150 4193*b843c749SSergey Zigachev #define mmSCL2_SCL_VERT_FILTER_INIT_BOT 0x4157 4194*b843c749SSergey Zigachev #define mmSCL2_SCL_VERT_FILTER_SCALE_RATIO 0x414F 4195*b843c749SSergey Zigachev #define mmSCL2_VIEWPORT_SIZE 0x415D 4196*b843c749SSergey Zigachev #define mmSCL2_VIEWPORT_START 0x415C 4197*b843c749SSergey Zigachev #define mmSCL3_EXT_OVERSCAN_LEFT_RIGHT 0x445E 4198*b843c749SSergey Zigachev #define mmSCL3_EXT_OVERSCAN_TOP_BOTTOM 0x445F 4199*b843c749SSergey Zigachev #define mmSCL3_SCL_ALU_CONTROL 0x4454 4200*b843c749SSergey Zigachev #define mmSCL3_SCL_AUTOMATIC_MODE_CONTROL 0x4447 4201*b843c749SSergey Zigachev #define mmSCL3_SCL_BYPASS_CONTROL 0x4445 4202*b843c749SSergey Zigachev #define mmSCL3_SCL_COEF_RAM_CONFLICT_STATUS 0x4455 4203*b843c749SSergey Zigachev #define mmSCL3_SCL_COEF_RAM_SELECT 0x4440 4204*b843c749SSergey Zigachev #define mmSCL3_SCL_COEF_RAM_TAP_DATA 0x4441 4205*b843c749SSergey Zigachev #define mmSCL3_SCL_CONTROL 0x4444 4206*b843c749SSergey Zigachev #define mmSCL3_SCL_DEBUG 0x446A 4207*b843c749SSergey Zigachev #define mmSCL3_SCL_DEBUG2 0x4469 4208*b843c749SSergey Zigachev #define mmSCL3_SCL_F_SHARP_CONTROL 0x4453 4209*b843c749SSergey Zigachev #define mmSCL3_SCL_HORZ_FILTER_CONTROL 0x444A 4210*b843c749SSergey Zigachev #define mmSCL3_SCL_HORZ_FILTER_SCALE_RATIO 0x444B 4211*b843c749SSergey Zigachev #define mmSCL3_SCL_MANUAL_REPLICATE_CONTROL 0x4446 4212*b843c749SSergey Zigachev #define mmSCL3_SCL_MODE_CHANGE_DET1 0x4460 4213*b843c749SSergey Zigachev #define mmSCL3_SCL_MODE_CHANGE_DET2 0x4461 4214*b843c749SSergey Zigachev #define mmSCL3_SCL_MODE_CHANGE_DET3 0x4462 4215*b843c749SSergey Zigachev #define mmSCL3_SCL_MODE_CHANGE_MASK 0x4463 4216*b843c749SSergey Zigachev #define mmSCL3_SCL_TAP_CONTROL 0x4443 4217*b843c749SSergey Zigachev #define mmSCL3_SCL_TEST_DEBUG_DATA 0x446C 4218*b843c749SSergey Zigachev #define mmSCL3_SCL_TEST_DEBUG_INDEX 0x446B 4219*b843c749SSergey Zigachev #define mmSCL3_SCL_UPDATE 0x4451 4220*b843c749SSergey Zigachev #define mmSCL3_SCL_VERT_FILTER_CONTROL 0x444E 4221*b843c749SSergey Zigachev #define mmSCL3_SCL_VERT_FILTER_INIT 0x4450 4222*b843c749SSergey Zigachev #define mmSCL3_SCL_VERT_FILTER_INIT_BOT 0x4457 4223*b843c749SSergey Zigachev #define mmSCL3_SCL_VERT_FILTER_SCALE_RATIO 0x444F 4224*b843c749SSergey Zigachev #define mmSCL3_VIEWPORT_SIZE 0x445D 4225*b843c749SSergey Zigachev #define mmSCL3_VIEWPORT_START 0x445C 4226*b843c749SSergey Zigachev #define mmSCL4_EXT_OVERSCAN_LEFT_RIGHT 0x475E 4227*b843c749SSergey Zigachev #define mmSCL4_EXT_OVERSCAN_TOP_BOTTOM 0x475F 4228*b843c749SSergey Zigachev #define mmSCL4_SCL_ALU_CONTROL 0x4754 4229*b843c749SSergey Zigachev #define mmSCL4_SCL_AUTOMATIC_MODE_CONTROL 0x4747 4230*b843c749SSergey Zigachev #define mmSCL4_SCL_BYPASS_CONTROL 0x4745 4231*b843c749SSergey Zigachev #define mmSCL4_SCL_COEF_RAM_CONFLICT_STATUS 0x4755 4232*b843c749SSergey Zigachev #define mmSCL4_SCL_COEF_RAM_SELECT 0x4740 4233*b843c749SSergey Zigachev #define mmSCL4_SCL_COEF_RAM_TAP_DATA 0x4741 4234*b843c749SSergey Zigachev #define mmSCL4_SCL_CONTROL 0x4744 4235*b843c749SSergey Zigachev #define mmSCL4_SCL_DEBUG 0x476A 4236*b843c749SSergey Zigachev #define mmSCL4_SCL_DEBUG2 0x4769 4237*b843c749SSergey Zigachev #define mmSCL4_SCL_F_SHARP_CONTROL 0x4753 4238*b843c749SSergey Zigachev #define mmSCL4_SCL_HORZ_FILTER_CONTROL 0x474A 4239*b843c749SSergey Zigachev #define mmSCL4_SCL_HORZ_FILTER_SCALE_RATIO 0x474B 4240*b843c749SSergey Zigachev #define mmSCL4_SCL_MANUAL_REPLICATE_CONTROL 0x4746 4241*b843c749SSergey Zigachev #define mmSCL4_SCL_MODE_CHANGE_DET1 0x4760 4242*b843c749SSergey Zigachev #define mmSCL4_SCL_MODE_CHANGE_DET2 0x4761 4243*b843c749SSergey Zigachev #define mmSCL4_SCL_MODE_CHANGE_DET3 0x4762 4244*b843c749SSergey Zigachev #define mmSCL4_SCL_MODE_CHANGE_MASK 0x4763 4245*b843c749SSergey Zigachev #define mmSCL4_SCL_TAP_CONTROL 0x4743 4246*b843c749SSergey Zigachev #define mmSCL4_SCL_TEST_DEBUG_DATA 0x476C 4247*b843c749SSergey Zigachev #define mmSCL4_SCL_TEST_DEBUG_INDEX 0x476B 4248*b843c749SSergey Zigachev #define mmSCL4_SCL_UPDATE 0x4751 4249*b843c749SSergey Zigachev #define mmSCL4_SCL_VERT_FILTER_CONTROL 0x474E 4250*b843c749SSergey Zigachev #define mmSCL4_SCL_VERT_FILTER_INIT 0x4750 4251*b843c749SSergey Zigachev #define mmSCL4_SCL_VERT_FILTER_INIT_BOT 0x4757 4252*b843c749SSergey Zigachev #define mmSCL4_SCL_VERT_FILTER_SCALE_RATIO 0x474F 4253*b843c749SSergey Zigachev #define mmSCL4_VIEWPORT_SIZE 0x475D 4254*b843c749SSergey Zigachev #define mmSCL4_VIEWPORT_START 0x475C 4255*b843c749SSergey Zigachev #define mmSCL5_EXT_OVERSCAN_LEFT_RIGHT 0x4A5E 4256*b843c749SSergey Zigachev #define mmSCL5_EXT_OVERSCAN_TOP_BOTTOM 0x4A5F 4257*b843c749SSergey Zigachev #define mmSCL5_SCL_ALU_CONTROL 0x4A54 4258*b843c749SSergey Zigachev #define mmSCL5_SCL_AUTOMATIC_MODE_CONTROL 0x4A47 4259*b843c749SSergey Zigachev #define mmSCL5_SCL_BYPASS_CONTROL 0x4A45 4260*b843c749SSergey Zigachev #define mmSCL5_SCL_COEF_RAM_CONFLICT_STATUS 0x4A55 4261*b843c749SSergey Zigachev #define mmSCL5_SCL_COEF_RAM_SELECT 0x4A40 4262*b843c749SSergey Zigachev #define mmSCL5_SCL_COEF_RAM_TAP_DATA 0x4A41 4263*b843c749SSergey Zigachev #define mmSCL5_SCL_CONTROL 0x4A44 4264*b843c749SSergey Zigachev #define mmSCL5_SCL_DEBUG 0x4A6A 4265*b843c749SSergey Zigachev #define mmSCL5_SCL_DEBUG2 0x4A69 4266*b843c749SSergey Zigachev #define mmSCL5_SCL_F_SHARP_CONTROL 0x4A53 4267*b843c749SSergey Zigachev #define mmSCL5_SCL_HORZ_FILTER_CONTROL 0x4A4A 4268*b843c749SSergey Zigachev #define mmSCL5_SCL_HORZ_FILTER_SCALE_RATIO 0x4A4B 4269*b843c749SSergey Zigachev #define mmSCL5_SCL_MANUAL_REPLICATE_CONTROL 0x4A46 4270*b843c749SSergey Zigachev #define mmSCL5_SCL_MODE_CHANGE_DET1 0x4A60 4271*b843c749SSergey Zigachev #define mmSCL5_SCL_MODE_CHANGE_DET2 0x4A61 4272*b843c749SSergey Zigachev #define mmSCL5_SCL_MODE_CHANGE_DET3 0x4A62 4273*b843c749SSergey Zigachev #define mmSCL5_SCL_MODE_CHANGE_MASK 0x4A63 4274*b843c749SSergey Zigachev #define mmSCL5_SCL_TAP_CONTROL 0x4A43 4275*b843c749SSergey Zigachev #define mmSCL5_SCL_TEST_DEBUG_DATA 0x4A6C 4276*b843c749SSergey Zigachev #define mmSCL5_SCL_TEST_DEBUG_INDEX 0x4A6B 4277*b843c749SSergey Zigachev #define mmSCL5_SCL_UPDATE 0x4A51 4278*b843c749SSergey Zigachev #define mmSCL5_SCL_VERT_FILTER_CONTROL 0x4A4E 4279*b843c749SSergey Zigachev #define mmSCL5_SCL_VERT_FILTER_INIT 0x4A50 4280*b843c749SSergey Zigachev #define mmSCL5_SCL_VERT_FILTER_INIT_BOT 0x4A57 4281*b843c749SSergey Zigachev #define mmSCL5_SCL_VERT_FILTER_SCALE_RATIO 0x4A4F 4282*b843c749SSergey Zigachev #define mmSCL5_VIEWPORT_SIZE 0x4A5D 4283*b843c749SSergey Zigachev #define mmSCL5_VIEWPORT_START 0x4A5C 4284*b843c749SSergey Zigachev #define mmSCL_ALU_CONTROL 0x1B54 4285*b843c749SSergey Zigachev #define mmSCL_AUTOMATIC_MODE_CONTROL 0x1B47 4286*b843c749SSergey Zigachev #define mmSCL_BYPASS_CONTROL 0x1B45 4287*b843c749SSergey Zigachev #define mmSCL_COEF_RAM_CONFLICT_STATUS 0x1B55 4288*b843c749SSergey Zigachev #define mmSCL_COEF_RAM_SELECT 0x1B40 4289*b843c749SSergey Zigachev #define mmSCL_COEF_RAM_TAP_DATA 0x1B41 4290*b843c749SSergey Zigachev #define mmSCL_CONTROL 0x1B44 4291*b843c749SSergey Zigachev #define mmSCL_DEBUG 0x1B6A 4292*b843c749SSergey Zigachev #define mmSCL_DEBUG2 0x1B69 4293*b843c749SSergey Zigachev #define mmSCL_F_SHARP_CONTROL 0x1B53 4294*b843c749SSergey Zigachev #define mmSCL_HORZ_FILTER_CONTROL 0x1B4A 4295*b843c749SSergey Zigachev #define mmSCL_HORZ_FILTER_SCALE_RATIO 0x1B4B 4296*b843c749SSergey Zigachev #define mmSCLK_CGTT_BLK_CTRL_REG 0x0136 4297*b843c749SSergey Zigachev #define mmSCL_MANUAL_REPLICATE_CONTROL 0x1B46 4298*b843c749SSergey Zigachev #define mmSCL_MODE_CHANGE_DET1 0x1B60 4299*b843c749SSergey Zigachev #define mmSCL_MODE_CHANGE_DET2 0x1B61 4300*b843c749SSergey Zigachev #define mmSCL_MODE_CHANGE_DET3 0x1B62 4301*b843c749SSergey Zigachev #define mmSCL_MODE_CHANGE_MASK 0x1B63 4302*b843c749SSergey Zigachev #define mmSCL_TAP_CONTROL 0x1B43 4303*b843c749SSergey Zigachev #define mmSCL_TEST_DEBUG_DATA 0x1B6C 4304*b843c749SSergey Zigachev #define mmSCL_TEST_DEBUG_INDEX 0x1B6B 4305*b843c749SSergey Zigachev #define mmSCL_UPDATE 0x1B51 4306*b843c749SSergey Zigachev #define mmSCL_VERT_FILTER_CONTROL 0x1B4E 4307*b843c749SSergey Zigachev #define mmSCL_VERT_FILTER_INIT 0x1B50 4308*b843c749SSergey Zigachev #define mmSCL_VERT_FILTER_INIT_BOT 0x1B57 4309*b843c749SSergey Zigachev #define mmSCL_VERT_FILTER_SCALE_RATIO 0x1B4F 4310*b843c749SSergey Zigachev #define mmSEQ8_DATA 0x00F1 4311*b843c749SSergey Zigachev #define mmSEQ8_IDX 0x00F1 4312*b843c749SSergey Zigachev #define mmSLAVE_COMM_CMD_REG 0x1624 4313*b843c749SSergey Zigachev #define mmSLAVE_COMM_CNTL_REG 0x1625 4314*b843c749SSergey Zigachev #define mmSLAVE_COMM_DATA_REG1 0x1621 4315*b843c749SSergey Zigachev #define mmSLAVE_COMM_DATA_REG2 0x1622 4316*b843c749SSergey Zigachev #define mmSLAVE_COMM_DATA_REG3 0x1623 4317*b843c749SSergey Zigachev #define mmSYMCLKA_CLOCK_ENABLE 0x0160 4318*b843c749SSergey Zigachev #define mmSYMCLKB_CLOCK_ENABLE 0x0161 4319*b843c749SSergey Zigachev #define mmSYMCLKC_CLOCK_ENABLE 0x0162 4320*b843c749SSergey Zigachev #define mmSYMCLKD_CLOCK_ENABLE 0x0163 4321*b843c749SSergey Zigachev #define mmSYMCLKE_CLOCK_ENABLE 0x0164 4322*b843c749SSergey Zigachev #define mmSYMCLKF_CLOCK_ENABLE 0x0165 4323*b843c749SSergey Zigachev #define mmTMDS_CNTL 0x1C7C 4324*b843c749SSergey Zigachev #define mmTMDS_CONTROL0_FEEDBACK 0x1C7E 4325*b843c749SSergey Zigachev #define mmTMDS_CONTROL_CHAR 0x1C7D 4326*b843c749SSergey Zigachev #define mmTMDS_CTL0_1_GEN_CNTL 0x1C86 4327*b843c749SSergey Zigachev #define mmTMDS_CTL2_3_GEN_CNTL 0x1C87 4328*b843c749SSergey Zigachev #define mmTMDS_CTL_BITS 0x1C83 4329*b843c749SSergey Zigachev #define mmTMDS_DCBALANCER_CONTROL 0x1C84 4330*b843c749SSergey Zigachev #define mmTMDS_DEBUG 0x1C82 4331*b843c749SSergey Zigachev #define mmTMDS_STEREOSYNC_CTL_SEL 0x1C7F 4332*b843c749SSergey Zigachev #define mmTMDS_SYNC_CHAR_PATTERN_0_1 0x1C80 4333*b843c749SSergey Zigachev #define mmTMDS_SYNC_CHAR_PATTERN_2_3 0x1C81 4334*b843c749SSergey Zigachev #define mmUNIPHYAB_TPG_CONTROL 0x1931 4335*b843c749SSergey Zigachev #define mmUNIPHYAB_TPG_SEED 0x1932 4336*b843c749SSergey Zigachev #define mmUNIPHY_ANG_BIST_CNTL 0x198C 4337*b843c749SSergey Zigachev #define mmUNIPHYCD_TPG_CONTROL 0x1933 4338*b843c749SSergey Zigachev #define mmUNIPHYCD_TPG_SEED 0x1934 4339*b843c749SSergey Zigachev #define mmUNIPHY_CHANNEL_XBAR_CNTL 0x198E 4340*b843c749SSergey Zigachev #define mmUNIPHY_DATA_SYNCHRONIZATION 0x198A 4341*b843c749SSergey Zigachev #define mmUNIPHYEF_TPG_CONTROL 0x1935 4342*b843c749SSergey Zigachev #define mmUNIPHYEF_TPG_SEED 0x1936 4343*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKA 0x1908 4344*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKB 0x1909 4345*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKC 0x190F 4346*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKD 0x1910 4347*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKE 0x1913 4348*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_LINKF 0x1914 4349*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_PERIOD 0x190A 4350*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_PSW_AB 0x190E 4351*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_PSW_CD 0x1912 4352*b843c749SSergey Zigachev #define mmUNIPHY_IMPCAL_PSW_EF 0x1916 4353*b843c749SSergey Zigachev #define mmUNIPHY_LINK_CNTL 0x198D 4354*b843c749SSergey Zigachev #define mmUNIPHY_PLL_CONTROL1 0x1986 4355*b843c749SSergey Zigachev #define mmUNIPHY_PLL_CONTROL2 0x1987 4356*b843c749SSergey Zigachev #define mmUNIPHY_PLL_FBDIV 0x1985 4357*b843c749SSergey Zigachev #define mmUNIPHY_PLL_SS_CNTL 0x1989 4358*b843c749SSergey Zigachev #define mmUNIPHY_PLL_SS_STEP_SIZE 0x1988 4359*b843c749SSergey Zigachev #define mmUNIPHY_POWER_CONTROL 0x1984 4360*b843c749SSergey Zigachev #define mmUNIPHY_REG_TEST_OUTPUT 0x198B 4361*b843c749SSergey Zigachev #define mmUNIPHY_SOFT_RESET 0x0166 4362*b843c749SSergey Zigachev #define mmUNIPHY_TX_CONTROL1 0x1980 4363*b843c749SSergey Zigachev #define mmUNIPHY_TX_CONTROL2 0x1981 4364*b843c749SSergey Zigachev #define mmUNIPHY_TX_CONTROL3 0x1982 4365*b843c749SSergey Zigachev #define mmUNIPHY_TX_CONTROL4 0x1983 4366*b843c749SSergey Zigachev #define mmVGA25_PPLL_ANALOG 0x00E4 4367*b843c749SSergey Zigachev #define mmVGA25_PPLL_FB_DIV 0x00DC 4368*b843c749SSergey Zigachev #define mmVGA25_PPLL_POST_DIV 0x00E0 4369*b843c749SSergey Zigachev #define mmVGA25_PPLL_REF_DIV 0x00D8 4370*b843c749SSergey Zigachev #define mmVGA28_PPLL_ANALOG 0x00E5 4371*b843c749SSergey Zigachev #define mmVGA28_PPLL_FB_DIV 0x00DD 4372*b843c749SSergey Zigachev #define mmVGA28_PPLL_POST_DIV 0x00E1 4373*b843c749SSergey Zigachev #define mmVGA28_PPLL_REF_DIV 0x00D9 4374*b843c749SSergey Zigachev #define mmVGA41_PPLL_ANALOG 0x00E6 4375*b843c749SSergey Zigachev #define mmVGA41_PPLL_FB_DIV 0x00DE 4376*b843c749SSergey Zigachev #define mmVGA41_PPLL_POST_DIV 0x00E2 4377*b843c749SSergey Zigachev #define mmVGA41_PPLL_REF_DIV 0x00DA 4378*b843c749SSergey Zigachev #define mmVGA_CACHE_CONTROL 0x00CB 4379*b843c749SSergey Zigachev #define mmVGA_DEBUG_READBACK_DATA 0x00D7 4380*b843c749SSergey Zigachev #define mmVGA_DEBUG_READBACK_INDEX 0x00D6 4381*b843c749SSergey Zigachev #define mmVGA_DISPBUF1_SURFACE_ADDR 0x00C6 4382*b843c749SSergey Zigachev #define mmVGA_DISPBUF2_SURFACE_ADDR 0x00C8 4383*b843c749SSergey Zigachev #define mmVGA_HDP_CONTROL 0x00CA 4384*b843c749SSergey Zigachev #define mmVGA_HW_DEBUG 0x00CF 4385*b843c749SSergey Zigachev #define mmVGA_INTERRUPT_CONTROL 0x00D1 4386*b843c749SSergey Zigachev #define mmVGA_INTERRUPT_STATUS 0x00D3 4387*b843c749SSergey Zigachev #define mmVGA_MAIN_CONTROL 0x00D4 4388*b843c749SSergey Zigachev #define mmVGA_MEMORY_BASE_ADDRESS 0x00C4 4389*b843c749SSergey Zigachev #define mmVGA_MEMORY_BASE_ADDRESS_HIGH 0x00C9 4390*b843c749SSergey Zigachev #define mmVGA_MEM_READ_PAGE_ADDR 0x0013 4391*b843c749SSergey Zigachev #define mmVGA_MEM_WRITE_PAGE_ADDR 0x0012 4392*b843c749SSergey Zigachev #define mmVGA_MODE_CONTROL 0x00C2 4393*b843c749SSergey Zigachev #define mmVGA_RENDER_CONTROL 0x00C0 4394*b843c749SSergey Zigachev #define mmVGA_SEQUENCER_RESET_CONTROL 0x00C1 4395*b843c749SSergey Zigachev #define mmVGA_SOURCE_SELECT 0x00FC 4396*b843c749SSergey Zigachev #define mmVGA_STATUS 0x00D0 4397*b843c749SSergey Zigachev #define mmVGA_STATUS_CLEAR 0x00D2 4398*b843c749SSergey Zigachev #define mmVGA_SURFACE_PITCH_SELECT 0x00C3 4399*b843c749SSergey Zigachev #define mmVGA_TEST_CONTROL 0x00D5 4400*b843c749SSergey Zigachev #define mmVGA_TEST_DEBUG_DATA 0x00C7 4401*b843c749SSergey Zigachev #define mmVGA_TEST_DEBUG_INDEX 0x00C5 4402*b843c749SSergey Zigachev #define mmVIEWPORT_SIZE 0x1B5D 4403*b843c749SSergey Zigachev #define mmVIEWPORT_START 0x1B5C 4404*b843c749SSergey Zigachev #define mmXDMA_CLOCK_GATING_CNTL 0x0409 4405*b843c749SSergey Zigachev #define mmXDMA_IF_BIF_STATUS 0x0418 4406*b843c749SSergey Zigachev #define mmXDMA_INTERRUPT 0x0406 4407*b843c749SSergey Zigachev #define mmXDMA_LOCAL_SURFACE_TILING1 0x03F4 4408*b843c749SSergey Zigachev #define mmXDMA_LOCAL_SURFACE_TILING2 0x03F5 4409*b843c749SSergey Zigachev #define mmXDMA_MC_PCIE_CLIENT_CONFIG 0x03E9 4410*b843c749SSergey Zigachev #define mmXDMA_MEM_POWER_CNTL 0x040B 4411*b843c749SSergey Zigachev #define mmXDMA_MSTR_CMD_URGENT_CNTL 0x03F6 4412*b843c749SSergey Zigachev #define mmXDMA_MSTR_CNTL 0x03E0 4413*b843c749SSergey Zigachev #define mmXDMA_MSTR_HEIGHT 0x03E3 4414*b843c749SSergey Zigachev #define mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR 0x03F1 4415*b843c749SSergey Zigachev #define mmXDMA_MSTR_LOCAL_SURFACE_BASE_ADDR_HIGH 0x03F2 4416*b843c749SSergey Zigachev #define mmXDMA_MSTR_LOCAL_SURFACE_PITCH 0x03F3 4417*b843c749SSergey Zigachev #define mmXDMA_MSTR_MEM_CLIENT_CONFIG 0x03EA 4418*b843c749SSergey Zigachev #define mmXDMA_MSTR_MEM_NACK_STATUS 0x040D 4419*b843c749SSergey Zigachev #define mmXDMA_MSTR_MEM_URGENT_CNTL 0x03F7 4420*b843c749SSergey Zigachev #define mmXDMA_MSTR_PCIE_NACK_STATUS 0x040C 4421*b843c749SSergey Zigachev #define mmXDMA_MSTR_READ_COMMAND 0x03E1 4422*b843c749SSergey Zigachev #define mmXDMA_MSTR_REMOTE_GPU_ADDRESS 0x03E6 4423*b843c749SSergey Zigachev #define mmXDMA_MSTR_REMOTE_GPU_ADDRESS_HIGH 0x03E7 4424*b843c749SSergey Zigachev #define mmXDMA_MSTR_REMOTE_SURFACE_BASE 0x03E4 4425*b843c749SSergey Zigachev #define mmXDMA_MSTR_REMOTE_SURFACE_BASE_HIGH 0x03E5 4426*b843c749SSergey Zigachev #define mmXDMA_MSTR_STATUS 0x03E8 4427*b843c749SSergey Zigachev #define mmXDMA_RBBMIF_RDWR_CNTL 0x040A 4428*b843c749SSergey Zigachev #define mmXDMA_SLV_CNTL 0x03FB 4429*b843c749SSergey Zigachev #define mmXDMA_SLV_FLIP_PENDING 0x0407 4430*b843c749SSergey Zigachev #define mmXDMA_SLV_MEM_CLIENT_CONFIG 0x03FD 4431*b843c749SSergey Zigachev #define mmXDMA_SLV_MEM_NACK_STATUS 0x040F 4432*b843c749SSergey Zigachev #define mmXDMA_SLV_PCIE_NACK_STATUS 0x040E 4433*b843c749SSergey Zigachev #define mmXDMA_SLV_READ_LATENCY_AVE 0x0405 4434*b843c749SSergey Zigachev #define mmXDMA_SLV_READ_LATENCY_MINMAX 0x0404 4435*b843c749SSergey Zigachev #define mmXDMA_SLV_READ_LATENCY_TIMER 0x0412 4436*b843c749SSergey Zigachev #define mmXDMA_SLV_READ_URGENT_CNTL 0x03FF 4437*b843c749SSergey Zigachev #define mmXDMA_SLV_REMOTE_GPU_ADDRESS 0x0402 4438*b843c749SSergey Zigachev #define mmXDMA_SLV_REMOTE_GPU_ADDRESS_HIGH 0x0403 4439*b843c749SSergey Zigachev #define mmXDMA_SLV_SLS_PITCH 0x03FE 4440*b843c749SSergey Zigachev #define mmXDMA_SLV_WB_RATE_CNTL 0x0401 4441*b843c749SSergey Zigachev #define mmXDMA_SLV_WRITE_URGENT_CNTL 0x0400 4442*b843c749SSergey Zigachev #define mmXDMA_TEST_DEBUG_DATA 0x041D 4443*b843c749SSergey Zigachev #define mmXDMA_TEST_DEBUG_INDEX 0x041C 4444*b843c749SSergey Zigachev 4445*b843c749SSergey Zigachev /* Registers that spilled out of sid.h */ 4446*b843c749SSergey Zigachev #define mmDATA_FORMAT 0x1AC0 4447*b843c749SSergey Zigachev #define mmDESKTOP_HEIGHT 0x1AC1 4448*b843c749SSergey Zigachev #define mmDC_LB_MEMORY_SPLIT 0x1AC3 4449*b843c749SSergey Zigachev #define mmPRIORITY_A_CNT 0x1AC6 4450*b843c749SSergey Zigachev #define mmPRIORITY_B_CNT 0x1AC7 4451*b843c749SSergey Zigachev #define mmDPG_PIPE_ARBITRATION_CONTROL3 0x1B32 4452*b843c749SSergey Zigachev #define mmINT_MASK 0x1AD0 4453*b843c749SSergey Zigachev #define mmVLINE_STATUS 0x1AEE 4454*b843c749SSergey Zigachev #define mmVBLANK_STATUS 0x1AEF 4455*b843c749SSergey Zigachev 4456*b843c749SSergey Zigachev 4457*b843c749SSergey Zigachev #endif 4458