1*c59a5c48SFrançois Tigeot /* 2*c59a5c48SFrançois Tigeot * SMU_8_0 Register documentation 3*c59a5c48SFrançois Tigeot * 4*c59a5c48SFrançois Tigeot * Copyright (C) 2014 Advanced Micro Devices, Inc. 5*c59a5c48SFrançois Tigeot * 6*c59a5c48SFrançois Tigeot * Permission is hereby granted, free of charge, to any person obtaining a 7*c59a5c48SFrançois Tigeot * copy of this software and associated documentation files (the "Software"), 8*c59a5c48SFrançois Tigeot * to deal in the Software without restriction, including without limitation 9*c59a5c48SFrançois Tigeot * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10*c59a5c48SFrançois Tigeot * and/or sell copies of the Software, and to permit persons to whom the 11*c59a5c48SFrançois Tigeot * Software is furnished to do so, subject to the following conditions: 12*c59a5c48SFrançois Tigeot * 13*c59a5c48SFrançois Tigeot * The above copyright notice and this permission notice shall be included 14*c59a5c48SFrançois Tigeot * in all copies or substantial portions of the Software. 15*c59a5c48SFrançois Tigeot * 16*c59a5c48SFrançois Tigeot * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 17*c59a5c48SFrançois Tigeot * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18*c59a5c48SFrançois Tigeot * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19*c59a5c48SFrançois Tigeot * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 20*c59a5c48SFrançois Tigeot * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 21*c59a5c48SFrançois Tigeot * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22*c59a5c48SFrançois Tigeot */ 23*c59a5c48SFrançois Tigeot 24*c59a5c48SFrançois Tigeot #ifndef SMU_8_0_SH_MASK_H 25*c59a5c48SFrançois Tigeot #define SMU_8_0_SH_MASK_H 26*c59a5c48SFrançois Tigeot 27*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_CONFIG__TCC_ADDR_MASK 0x3ff 28*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_CONFIG__TCC_ADDR__SHIFT 0x0 29*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_CONFIG__TCC_READ_OP_MASK 0x400 30*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_CONFIG__TCC_READ_OP__SHIFT 0xa 31*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_DATA__TCC_DATA_MASK 0xfff 32*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_DATA__TCC_DATA__SHIFT 0x0 33*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_DATA__TCC_REQ_DONE_MASK 0x1000 34*c59a5c48SFrançois Tigeot #define THM_TCON_CSR_DATA__TCC_REQ_DONE__SHIFT 0xc 35*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_EN_MASK 0x1 36*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_EN__SHIFT 0x0 37*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD0_MASK 0x2 38*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD0__SHIFT 0x1 39*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_P_STATE_EN_MASK 0x4 40*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_P_STATE_EN__SHIFT 0x2 41*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD1_MASK 0x8 42*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD1__SHIFT 0x3 43*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_ACTIVE_MASK 0x10 44*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_ACTIVE__SHIFT 0x4 45*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_ACTIVE_LOG_MASK 0x20 46*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_ACTIVE_LOG__SHIFT 0x5 47*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_APIC_HI_EN_MASK 0x40 48*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_APIC_HI_EN__SHIFT 0x6 49*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_APIC_LO_EN_MASK 0x80 50*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_APIC_LO_EN__SHIFT 0x7 51*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_DIAG_MASK 0x100 52*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_DIAG__SHIFT 0x8 53*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__DIS_PROCHOT_PIN_MASK 0x200 54*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__DIS_PROCHOT_PIN__SHIFT 0x9 55*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_TO_GNB_EN_MASK 0x400 56*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_TO_GNB_EN__SHIFT 0xa 57*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__PROCHOT_TO_GNB_EN_MASK 0x800 58*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__PROCHOT_TO_GNB_EN__SHIFT 0xb 59*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD2_MASK 0xf000 60*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__RSVD2__SHIFT 0xc 61*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_TMP_LMT_MASK 0x7f0000 62*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_TMP_LMT__SHIFT 0x10 63*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_SLEW_SEL_MASK 0x800000 64*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_SLEW_SEL__SHIFT 0x17 65*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_HYST_LMT_MASK 0xf000000 66*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_HYST_LMT__SHIFT 0x18 67*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_PSTATE_LIMIT_MASK 0x70000000 68*c59a5c48SFrançois Tigeot #define THM_TCON_HTC__HTC_PSTATE_LIMIT__SHIFT 0x1c 69*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__PER_STEP_TIME_UP_MASK 0x1f 70*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__PER_STEP_TIME_UP__SHIFT 0x0 71*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__TMP_MAX_DIFF_UP_MASK 0x60 72*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__TMP_MAX_DIFF_UP__SHIFT 0x5 73*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__TMP_SLEW_DN_EN_MASK 0x80 74*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__TMP_SLEW_DN_EN__SHIFT 0x7 75*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__PER_STEP_TIME_DN_MASK 0x1f00 76*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__PER_STEP_TIME_DN__SHIFT 0x8 77*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SEL_MASK 0x30000 78*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SEL__SHIFT 0x10 79*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SLEW_SEL_MASK 0x40000 80*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_TJ_SLEW_SEL__SHIFT 0x12 81*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_RANGE_SEL_MASK 0x80000 82*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_RANGE_SEL__SHIFT 0x13 83*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP_MASK 0xffe00000 84*c59a5c48SFrançois Tigeot #define THM_TCON_CUR_TMP__CUR_TEMP__SHIFT 0x15 85*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD0_MASK 0x1 86*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD0__SHIFT 0x0 87*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP_MASK 0x2 88*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP__SHIFT 0x1 89*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD1_MASK 0x4 90*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD1__SHIFT 0x2 91*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP_SENSE_MASK 0x8 92*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP_SENSE__SHIFT 0x3 93*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD2_MASK 0x10 94*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD2__SHIFT 0x4 95*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP_EN_MASK 0x20 96*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__THERM_TP_EN__SHIFT 0x5 97*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD3_MASK 0x7fffffc0 98*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__RSVD3__SHIFT 0x6 99*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__SW_THERM_TP_MASK 0x80000000 100*c59a5c48SFrançois Tigeot #define THM_TCON_THERM_TRIP__SW_THERM_TP__SHIFT 0x1f 101*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__TX12_EN_MASK 0x1 102*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__TX12_EN__SHIFT 0x0 103*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__PD_MASK 0x2 104*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__PD__SHIFT 0x1 105*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__PU_MASK 0x4 106*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__PU__SHIFT 0x2 107*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__SCHMEN_MASK 0x8 108*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__SCHMEN__SHIFT 0x3 109*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__SN_MASK 0x10 110*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__SN__SHIFT 0x4 111*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__OE_OVERRIDE_MASK 0x100 112*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__OE_OVERRIDE__SHIFT 0x8 113*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__OE_MASK 0x200 114*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__OE__SHIFT 0x9 115*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__A_OVERRIDE_MASK 0x400 116*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__A_OVERRIDE__SHIFT 0xa 117*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__A_MASK 0x800 118*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__A__SHIFT 0xb 119*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__Y_MASK 0x1000 120*c59a5c48SFrançois Tigeot #define THM_GPIO_PROCHOT_CTRL__Y__SHIFT 0xc 121*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__TX12_EN_MASK 0x1 122*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__TX12_EN__SHIFT 0x0 123*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__PD_MASK 0x2 124*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__PD__SHIFT 0x1 125*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__PU_MASK 0x4 126*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__PU__SHIFT 0x2 127*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__SCHMEN_MASK 0x8 128*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__SCHMEN__SHIFT 0x3 129*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__SN_MASK 0x10 130*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__SN__SHIFT 0x4 131*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__OE_OVERRIDE_MASK 0x100 132*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__OE_OVERRIDE__SHIFT 0x8 133*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__OE_MASK 0x200 134*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__OE__SHIFT 0x9 135*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__A_OVERRIDE_MASK 0x400 136*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__A_OVERRIDE__SHIFT 0xa 137*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__A_MASK 0x800 138*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__A__SHIFT 0xb 139*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__Y_MASK 0x1000 140*c59a5c48SFrançois Tigeot #define THM_GPIO_THERMTRIP_CTRL__Y__SHIFT 0xc 141*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTH_SET_MASK 0x1 142*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTH_SET__SHIFT 0x0 143*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTL_SET_MASK 0x2 144*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTL_SET__SHIFT 0x1 145*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_TRIGGER_SET_MASK 0x4 146*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_TRIGGER_SET__SHIFT 0x2 147*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTH_CLR_MASK 0x8 148*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT 0x3 149*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTL_CLR_MASK 0x10 150*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT 0x4 151*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR_MASK 0x20 152*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT 0x5 153*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__DIG_THERM_INTH_MASK 0xff 154*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__DIG_THERM_INTH__SHIFT 0x0 155*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__DIG_THERM_INTL_MASK 0xff00 156*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__DIG_THERM_INTL__SHIFT 0x8 157*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__GNB_TEMP_THRESHOLD_MASK 0xff0000 158*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__GNB_TEMP_THRESHOLD__SHIFT 0x10 159*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_INTH_MASK_MASK 0x1000000 160*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_INTH_MASK__SHIFT 0x18 161*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_INTL_MASK_MASK 0x2000000 162*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_INTL_MASK__SHIFT 0x19 163*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK 0x4000000 164*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK__SHIFT 0x1a 165*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_TRIGGER_CNB_MASK_MASK 0x8000000 166*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_TRIGGER_CNB_MASK__SHIFT 0x1b 167*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_GNB_HW_ENA_MASK 0x10000000 168*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_CTRL__THERM_GNB_HW_ENA__SHIFT 0x1c 169*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_INTH_DETECT_MASK 0x1 170*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_INTH_DETECT__SHIFT 0x0 171*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_INTL_DETECT_MASK 0x2 172*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_INTL_DETECT__SHIFT 0x1 173*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_TRIGGER_DETECT_MASK 0x4 174*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_TRIGGER_DETECT__SHIFT 0x2 175*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_TRIGGER_CNB_DETECT_MASK 0x8 176*c59a5c48SFrançois Tigeot #define THM_THERMAL_INT_STATUS__THERM_TRIGGER_CNB_DETECT__SHIFT 0x3 177*c59a5c48SFrançois Tigeot #define TMON0_RDIL0_DATA__TEMP_Z_DATA_MASK 0xfff 178*c59a5c48SFrançois Tigeot #define TMON0_RDIL0_DATA__TEMP_Z_DATA__SHIFT 0x0 179*c59a5c48SFrançois Tigeot #define TMON0_RDIL1_DATA__TEMP_Z_DATA_MASK 0xfff 180*c59a5c48SFrançois Tigeot #define TMON0_RDIL1_DATA__TEMP_Z_DATA__SHIFT 0x0 181*c59a5c48SFrançois Tigeot #define TMON0_RDIL2_DATA__TEMP_Z_DATA_MASK 0xfff 182*c59a5c48SFrançois Tigeot #define TMON0_RDIL2_DATA__TEMP_Z_DATA__SHIFT 0x0 183*c59a5c48SFrançois Tigeot #define TMON0_RDIL3_DATA__TEMP_Z_DATA_MASK 0xfff 184*c59a5c48SFrançois Tigeot #define TMON0_RDIL3_DATA__TEMP_Z_DATA__SHIFT 0x0 185*c59a5c48SFrançois Tigeot #define TMON0_RDIL4_DATA__TEMP_Z_DATA_MASK 0xfff 186*c59a5c48SFrançois Tigeot #define TMON0_RDIL4_DATA__TEMP_Z_DATA__SHIFT 0x0 187*c59a5c48SFrançois Tigeot #define TMON0_RDIL5_DATA__TEMP_Z_DATA_MASK 0xfff 188*c59a5c48SFrançois Tigeot #define TMON0_RDIL5_DATA__TEMP_Z_DATA__SHIFT 0x0 189*c59a5c48SFrançois Tigeot #define TMON0_RDIL6_DATA__TEMP_Z_DATA_MASK 0xfff 190*c59a5c48SFrançois Tigeot #define TMON0_RDIL6_DATA__TEMP_Z_DATA__SHIFT 0x0 191*c59a5c48SFrançois Tigeot #define TMON0_RDIL7_DATA__TEMP_Z_DATA_MASK 0xfff 192*c59a5c48SFrançois Tigeot #define TMON0_RDIL7_DATA__TEMP_Z_DATA__SHIFT 0x0 193*c59a5c48SFrançois Tigeot #define TMON0_RDIL8_DATA__TEMP_Z_DATA_MASK 0xfff 194*c59a5c48SFrançois Tigeot #define TMON0_RDIL8_DATA__TEMP_Z_DATA__SHIFT 0x0 195*c59a5c48SFrançois Tigeot #define TMON0_RDIL9_DATA__TEMP_Z_DATA_MASK 0xfff 196*c59a5c48SFrançois Tigeot #define TMON0_RDIL9_DATA__TEMP_Z_DATA__SHIFT 0x0 197*c59a5c48SFrançois Tigeot #define TMON0_RDIL10_DATA__TEMP_Z_DATA_MASK 0xfff 198*c59a5c48SFrançois Tigeot #define TMON0_RDIL10_DATA__TEMP_Z_DATA__SHIFT 0x0 199*c59a5c48SFrançois Tigeot #define TMON0_RDIL11_DATA__TEMP_Z_DATA_MASK 0xfff 200*c59a5c48SFrançois Tigeot #define TMON0_RDIL11_DATA__TEMP_Z_DATA__SHIFT 0x0 201*c59a5c48SFrançois Tigeot #define TMON0_RDIL12_DATA__TEMP_Z_DATA_MASK 0xfff 202*c59a5c48SFrançois Tigeot #define TMON0_RDIL12_DATA__TEMP_Z_DATA__SHIFT 0x0 203*c59a5c48SFrançois Tigeot #define TMON0_RDIL13_DATA__TEMP_Z_DATA_MASK 0xfff 204*c59a5c48SFrançois Tigeot #define TMON0_RDIL13_DATA__TEMP_Z_DATA__SHIFT 0x0 205*c59a5c48SFrançois Tigeot #define TMON0_RDIL14_DATA__TEMP_Z_DATA_MASK 0xfff 206*c59a5c48SFrançois Tigeot #define TMON0_RDIL14_DATA__TEMP_Z_DATA__SHIFT 0x0 207*c59a5c48SFrançois Tigeot #define TMON0_RDIL15_DATA__TEMP_Z_DATA_MASK 0xfff 208*c59a5c48SFrançois Tigeot #define TMON0_RDIL15_DATA__TEMP_Z_DATA__SHIFT 0x0 209*c59a5c48SFrançois Tigeot #define TMON0_RDIR0_DATA__TEMP_Z_DATA_MASK 0xfff 210*c59a5c48SFrançois Tigeot #define TMON0_RDIR0_DATA__TEMP_Z_DATA__SHIFT 0x0 211*c59a5c48SFrançois Tigeot #define TMON0_RDIR1_DATA__TEMP_Z_DATA_MASK 0xfff 212*c59a5c48SFrançois Tigeot #define TMON0_RDIR1_DATA__TEMP_Z_DATA__SHIFT 0x0 213*c59a5c48SFrançois Tigeot #define TMON0_RDIR2_DATA__TEMP_Z_DATA_MASK 0xfff 214*c59a5c48SFrançois Tigeot #define TMON0_RDIR2_DATA__TEMP_Z_DATA__SHIFT 0x0 215*c59a5c48SFrançois Tigeot #define TMON0_RDIR3_DATA__TEMP_Z_DATA_MASK 0xfff 216*c59a5c48SFrançois Tigeot #define TMON0_RDIR3_DATA__TEMP_Z_DATA__SHIFT 0x0 217*c59a5c48SFrançois Tigeot #define TMON0_RDIR4_DATA__TEMP_Z_DATA_MASK 0xfff 218*c59a5c48SFrançois Tigeot #define TMON0_RDIR4_DATA__TEMP_Z_DATA__SHIFT 0x0 219*c59a5c48SFrançois Tigeot #define TMON0_RDIR5_DATA__TEMP_Z_DATA_MASK 0xfff 220*c59a5c48SFrançois Tigeot #define TMON0_RDIR5_DATA__TEMP_Z_DATA__SHIFT 0x0 221*c59a5c48SFrançois Tigeot #define TMON0_RDIR6_DATA__TEMP_Z_DATA_MASK 0xfff 222*c59a5c48SFrançois Tigeot #define TMON0_RDIR6_DATA__TEMP_Z_DATA__SHIFT 0x0 223*c59a5c48SFrançois Tigeot #define TMON0_RDIR7_DATA__TEMP_Z_DATA_MASK 0xfff 224*c59a5c48SFrançois Tigeot #define TMON0_RDIR7_DATA__TEMP_Z_DATA__SHIFT 0x0 225*c59a5c48SFrançois Tigeot #define TMON0_RDIR8_DATA__TEMP_Z_DATA_MASK 0xfff 226*c59a5c48SFrançois Tigeot #define TMON0_RDIR8_DATA__TEMP_Z_DATA__SHIFT 0x0 227*c59a5c48SFrançois Tigeot #define TMON0_RDIR9_DATA__TEMP_Z_DATA_MASK 0xfff 228*c59a5c48SFrançois Tigeot #define TMON0_RDIR9_DATA__TEMP_Z_DATA__SHIFT 0x0 229*c59a5c48SFrançois Tigeot #define TMON0_RDIR10_DATA__TEMP_Z_DATA_MASK 0xfff 230*c59a5c48SFrançois Tigeot #define TMON0_RDIR10_DATA__TEMP_Z_DATA__SHIFT 0x0 231*c59a5c48SFrançois Tigeot #define TMON0_RDIR11_DATA__TEMP_Z_DATA_MASK 0xfff 232*c59a5c48SFrançois Tigeot #define TMON0_RDIR11_DATA__TEMP_Z_DATA__SHIFT 0x0 233*c59a5c48SFrançois Tigeot #define TMON0_RDIR12_DATA__TEMP_Z_DATA_MASK 0xfff 234*c59a5c48SFrançois Tigeot #define TMON0_RDIR12_DATA__TEMP_Z_DATA__SHIFT 0x0 235*c59a5c48SFrançois Tigeot #define TMON0_RDIR13_DATA__TEMP_Z_DATA_MASK 0xfff 236*c59a5c48SFrançois Tigeot #define TMON0_RDIR13_DATA__TEMP_Z_DATA__SHIFT 0x0 237*c59a5c48SFrançois Tigeot #define TMON0_RDIR14_DATA__TEMP_Z_DATA_MASK 0xfff 238*c59a5c48SFrançois Tigeot #define TMON0_RDIR14_DATA__TEMP_Z_DATA__SHIFT 0x0 239*c59a5c48SFrançois Tigeot #define TMON0_RDIR15_DATA__TEMP_Z_DATA_MASK 0xfff 240*c59a5c48SFrançois Tigeot #define TMON0_RDIR15_DATA__TEMP_Z_DATA__SHIFT 0x0 241*c59a5c48SFrançois Tigeot #define TMON0_INT_DATA__TEMP_Z_DATA_MASK 0xfff 242*c59a5c48SFrançois Tigeot #define TMON0_INT_DATA__TEMP_Z_DATA__SHIFT 0x0 243*c59a5c48SFrançois Tigeot #define TMON0_RDIL_PRESENT0__RDIL_PRESENT_7_0_MASK 0xff 244*c59a5c48SFrançois Tigeot #define TMON0_RDIL_PRESENT0__RDIL_PRESENT_7_0__SHIFT 0x0 245*c59a5c48SFrançois Tigeot #define TMON0_RDIL_PRESENT1__RDIL_PRESENT_15_8_MASK 0xff 246*c59a5c48SFrançois Tigeot #define TMON0_RDIL_PRESENT1__RDIL_PRESENT_15_8__SHIFT 0x0 247*c59a5c48SFrançois Tigeot #define TMON0_RDIR_PRESENT0__RDIR_PRESENT_7_0_MASK 0xff 248*c59a5c48SFrançois Tigeot #define TMON0_RDIR_PRESENT0__RDIR_PRESENT_7_0__SHIFT 0x0 249*c59a5c48SFrançois Tigeot #define TMON0_RDIR_PRESENT1__RDIR_PRESENT_15_8_MASK 0xff 250*c59a5c48SFrançois Tigeot #define TMON0_RDIR_PRESENT1__RDIR_PRESENT_15_8__SHIFT 0x0 251*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__NUM_ACQ_MASK 0x7 252*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__NUM_ACQ__SHIFT 0x0 253*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__FORCE_MAX_ACQ_MASK 0x8 254*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__FORCE_MAX_ACQ__SHIFT 0x3 255*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__RDI_INTERLEAVE_MASK 0x10 256*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__RDI_INTERLEAVE__SHIFT 0x4 257*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__RE_CALIB_EN_MASK 0x40 258*c59a5c48SFrançois Tigeot #define TMON0_CONFIG__RE_CALIB_EN__SHIFT 0x6 259*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF0__Z_MASK 0x7ff 260*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF0__Z__SHIFT 0x0 261*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF1__A_MASK 0xfff 262*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF1__A__SHIFT 0x0 263*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF2__B_MASK 0x3f 264*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF2__B__SHIFT 0x0 265*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF3__C_MASK 0x7ff 266*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF3__C__SHIFT 0x0 267*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF4__K_MASK 0x1 268*c59a5c48SFrançois Tigeot #define TMON0_TEMP_CALC_COEFF4__K__SHIFT 0x0 269*c59a5c48SFrançois Tigeot #define TMON0_DEBUG0__DEBUG_Z_MASK 0x7ff 270*c59a5c48SFrançois Tigeot #define TMON0_DEBUG0__DEBUG_Z__SHIFT 0x0 271*c59a5c48SFrançois Tigeot #define TMON0_DEBUG0__DEBUG_Z_EN_MASK 0x800 272*c59a5c48SFrançois Tigeot #define TMON0_DEBUG0__DEBUG_Z_EN__SHIFT 0xb 273*c59a5c48SFrançois Tigeot #define TMON0_DEBUG1__DEBUG_RDI_MASK 0x1f 274*c59a5c48SFrançois Tigeot #define TMON0_DEBUG1__DEBUG_RDI__SHIFT 0x0 275*c59a5c48SFrançois Tigeot #define TMON1_RDIL0_DATA__TEMP_Z_DATA_MASK 0xfff 276*c59a5c48SFrançois Tigeot #define TMON1_RDIL0_DATA__TEMP_Z_DATA__SHIFT 0x0 277*c59a5c48SFrançois Tigeot #define TMON1_RDIL1_DATA__TEMP_Z_DATA_MASK 0xfff 278*c59a5c48SFrançois Tigeot #define TMON1_RDIL1_DATA__TEMP_Z_DATA__SHIFT 0x0 279*c59a5c48SFrançois Tigeot #define TMON1_RDIL2_DATA__TEMP_Z_DATA_MASK 0xfff 280*c59a5c48SFrançois Tigeot #define TMON1_RDIL2_DATA__TEMP_Z_DATA__SHIFT 0x0 281*c59a5c48SFrançois Tigeot #define TMON1_RDIL3_DATA__TEMP_Z_DATA_MASK 0xfff 282*c59a5c48SFrançois Tigeot #define TMON1_RDIL3_DATA__TEMP_Z_DATA__SHIFT 0x0 283*c59a5c48SFrançois Tigeot #define TMON1_RDIL4_DATA__TEMP_Z_DATA_MASK 0xfff 284*c59a5c48SFrançois Tigeot #define TMON1_RDIL4_DATA__TEMP_Z_DATA__SHIFT 0x0 285*c59a5c48SFrançois Tigeot #define TMON1_RDIL5_DATA__TEMP_Z_DATA_MASK 0xfff 286*c59a5c48SFrançois Tigeot #define TMON1_RDIL5_DATA__TEMP_Z_DATA__SHIFT 0x0 287*c59a5c48SFrançois Tigeot #define TMON1_RDIL6_DATA__TEMP_Z_DATA_MASK 0xfff 288*c59a5c48SFrançois Tigeot #define TMON1_RDIL6_DATA__TEMP_Z_DATA__SHIFT 0x0 289*c59a5c48SFrançois Tigeot #define TMON1_RDIL7_DATA__TEMP_Z_DATA_MASK 0xfff 290*c59a5c48SFrançois Tigeot #define TMON1_RDIL7_DATA__TEMP_Z_DATA__SHIFT 0x0 291*c59a5c48SFrançois Tigeot #define TMON1_RDIL8_DATA__TEMP_Z_DATA_MASK 0xfff 292*c59a5c48SFrançois Tigeot #define TMON1_RDIL8_DATA__TEMP_Z_DATA__SHIFT 0x0 293*c59a5c48SFrançois Tigeot #define TMON1_RDIL9_DATA__TEMP_Z_DATA_MASK 0xfff 294*c59a5c48SFrançois Tigeot #define TMON1_RDIL9_DATA__TEMP_Z_DATA__SHIFT 0x0 295*c59a5c48SFrançois Tigeot #define TMON1_RDIL10_DATA__TEMP_Z_DATA_MASK 0xfff 296*c59a5c48SFrançois Tigeot #define TMON1_RDIL10_DATA__TEMP_Z_DATA__SHIFT 0x0 297*c59a5c48SFrançois Tigeot #define TMON1_RDIL11_DATA__TEMP_Z_DATA_MASK 0xfff 298*c59a5c48SFrançois Tigeot #define TMON1_RDIL11_DATA__TEMP_Z_DATA__SHIFT 0x0 299*c59a5c48SFrançois Tigeot #define TMON1_RDIL12_DATA__TEMP_Z_DATA_MASK 0xfff 300*c59a5c48SFrançois Tigeot #define TMON1_RDIL12_DATA__TEMP_Z_DATA__SHIFT 0x0 301*c59a5c48SFrançois Tigeot #define TMON1_RDIL13_DATA__TEMP_Z_DATA_MASK 0xfff 302*c59a5c48SFrançois Tigeot #define TMON1_RDIL13_DATA__TEMP_Z_DATA__SHIFT 0x0 303*c59a5c48SFrançois Tigeot #define TMON1_RDIL14_DATA__TEMP_Z_DATA_MASK 0xfff 304*c59a5c48SFrançois Tigeot #define TMON1_RDIL14_DATA__TEMP_Z_DATA__SHIFT 0x0 305*c59a5c48SFrançois Tigeot #define TMON1_RDIL15_DATA__TEMP_Z_DATA_MASK 0xfff 306*c59a5c48SFrançois Tigeot #define TMON1_RDIL15_DATA__TEMP_Z_DATA__SHIFT 0x0 307*c59a5c48SFrançois Tigeot #define TMON1_RDIR0_DATA__TEMP_Z_DATA_MASK 0xfff 308*c59a5c48SFrançois Tigeot #define TMON1_RDIR0_DATA__TEMP_Z_DATA__SHIFT 0x0 309*c59a5c48SFrançois Tigeot #define TMON1_RDIR1_DATA__TEMP_Z_DATA_MASK 0xfff 310*c59a5c48SFrançois Tigeot #define TMON1_RDIR1_DATA__TEMP_Z_DATA__SHIFT 0x0 311*c59a5c48SFrançois Tigeot #define TMON1_RDIR2_DATA__TEMP_Z_DATA_MASK 0xfff 312*c59a5c48SFrançois Tigeot #define TMON1_RDIR2_DATA__TEMP_Z_DATA__SHIFT 0x0 313*c59a5c48SFrançois Tigeot #define TMON1_RDIR3_DATA__TEMP_Z_DATA_MASK 0xfff 314*c59a5c48SFrançois Tigeot #define TMON1_RDIR3_DATA__TEMP_Z_DATA__SHIFT 0x0 315*c59a5c48SFrançois Tigeot #define TMON1_RDIR4_DATA__TEMP_Z_DATA_MASK 0xfff 316*c59a5c48SFrançois Tigeot #define TMON1_RDIR4_DATA__TEMP_Z_DATA__SHIFT 0x0 317*c59a5c48SFrançois Tigeot #define TMON1_RDIR5_DATA__TEMP_Z_DATA_MASK 0xfff 318*c59a5c48SFrançois Tigeot #define TMON1_RDIR5_DATA__TEMP_Z_DATA__SHIFT 0x0 319*c59a5c48SFrançois Tigeot #define TMON1_RDIR6_DATA__TEMP_Z_DATA_MASK 0xfff 320*c59a5c48SFrançois Tigeot #define TMON1_RDIR6_DATA__TEMP_Z_DATA__SHIFT 0x0 321*c59a5c48SFrançois Tigeot #define TMON1_RDIR7_DATA__TEMP_Z_DATA_MASK 0xfff 322*c59a5c48SFrançois Tigeot #define TMON1_RDIR7_DATA__TEMP_Z_DATA__SHIFT 0x0 323*c59a5c48SFrançois Tigeot #define TMON1_RDIR8_DATA__TEMP_Z_DATA_MASK 0xfff 324*c59a5c48SFrançois Tigeot #define TMON1_RDIR8_DATA__TEMP_Z_DATA__SHIFT 0x0 325*c59a5c48SFrançois Tigeot #define TMON1_RDIR9_DATA__TEMP_Z_DATA_MASK 0xfff 326*c59a5c48SFrançois Tigeot #define TMON1_RDIR9_DATA__TEMP_Z_DATA__SHIFT 0x0 327*c59a5c48SFrançois Tigeot #define TMON1_RDIR10_DATA__TEMP_Z_DATA_MASK 0xfff 328*c59a5c48SFrançois Tigeot #define TMON1_RDIR10_DATA__TEMP_Z_DATA__SHIFT 0x0 329*c59a5c48SFrançois Tigeot #define TMON1_RDIR11_DATA__TEMP_Z_DATA_MASK 0xfff 330*c59a5c48SFrançois Tigeot #define TMON1_RDIR11_DATA__TEMP_Z_DATA__SHIFT 0x0 331*c59a5c48SFrançois Tigeot #define TMON1_RDIR12_DATA__TEMP_Z_DATA_MASK 0xfff 332*c59a5c48SFrançois Tigeot #define TMON1_RDIR12_DATA__TEMP_Z_DATA__SHIFT 0x0 333*c59a5c48SFrançois Tigeot #define TMON1_RDIR13_DATA__TEMP_Z_DATA_MASK 0xfff 334*c59a5c48SFrançois Tigeot #define TMON1_RDIR13_DATA__TEMP_Z_DATA__SHIFT 0x0 335*c59a5c48SFrançois Tigeot #define TMON1_RDIR14_DATA__TEMP_Z_DATA_MASK 0xfff 336*c59a5c48SFrançois Tigeot #define TMON1_RDIR14_DATA__TEMP_Z_DATA__SHIFT 0x0 337*c59a5c48SFrançois Tigeot #define TMON1_RDIR15_DATA__TEMP_Z_DATA_MASK 0xfff 338*c59a5c48SFrançois Tigeot #define TMON1_RDIR15_DATA__TEMP_Z_DATA__SHIFT 0x0 339*c59a5c48SFrançois Tigeot #define TMON1_INT_DATA__TEMP_Z_DATA_MASK 0xfff 340*c59a5c48SFrançois Tigeot #define TMON1_INT_DATA__TEMP_Z_DATA__SHIFT 0x0 341*c59a5c48SFrançois Tigeot #define TMON1_RDIL_PRESENT0__RDIL_PRESENT_7_0_MASK 0xff 342*c59a5c48SFrançois Tigeot #define TMON1_RDIL_PRESENT0__RDIL_PRESENT_7_0__SHIFT 0x0 343*c59a5c48SFrançois Tigeot #define TMON1_RDIL_PRESENT1__RDIL_PRESENT_15_8_MASK 0xff 344*c59a5c48SFrançois Tigeot #define TMON1_RDIL_PRESENT1__RDIL_PRESENT_15_8__SHIFT 0x0 345*c59a5c48SFrançois Tigeot #define TMON1_RDIR_PRESENT0__RDIR_PRESENT_7_0_MASK 0xff 346*c59a5c48SFrançois Tigeot #define TMON1_RDIR_PRESENT0__RDIR_PRESENT_7_0__SHIFT 0x0 347*c59a5c48SFrançois Tigeot #define TMON1_RDIR_PRESENT1__RDIR_PRESENT_15_8_MASK 0xff 348*c59a5c48SFrançois Tigeot #define TMON1_RDIR_PRESENT1__RDIR_PRESENT_15_8__SHIFT 0x0 349*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__NUM_ACQ_MASK 0x7 350*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__NUM_ACQ__SHIFT 0x0 351*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__FORCE_MAX_ACQ_MASK 0x8 352*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__FORCE_MAX_ACQ__SHIFT 0x3 353*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__RDI_INTERLEAVE_MASK 0x10 354*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__RDI_INTERLEAVE__SHIFT 0x4 355*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__RE_CALIB_EN_MASK 0x40 356*c59a5c48SFrançois Tigeot #define TMON1_CONFIG__RE_CALIB_EN__SHIFT 0x6 357*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF0__Z_MASK 0x7ff 358*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF0__Z__SHIFT 0x0 359*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF1__A_MASK 0xfff 360*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF1__A__SHIFT 0x0 361*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF2__B_MASK 0x3f 362*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF2__B__SHIFT 0x0 363*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF3__C_MASK 0x7ff 364*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF3__C__SHIFT 0x0 365*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF4__K_MASK 0x1 366*c59a5c48SFrançois Tigeot #define TMON1_TEMP_CALC_COEFF4__K__SHIFT 0x0 367*c59a5c48SFrançois Tigeot #define TMON1_DEBUG0__DEBUG_Z_MASK 0x7ff 368*c59a5c48SFrançois Tigeot #define TMON1_DEBUG0__DEBUG_Z__SHIFT 0x0 369*c59a5c48SFrançois Tigeot #define TMON1_DEBUG0__DEBUG_Z_EN_MASK 0x800 370*c59a5c48SFrançois Tigeot #define TMON1_DEBUG0__DEBUG_Z_EN__SHIFT 0xb 371*c59a5c48SFrançois Tigeot #define TMON1_DEBUG1__DEBUG_RDI_MASK 0x1f 372*c59a5c48SFrançois Tigeot #define TMON1_DEBUG1__DEBUG_RDI__SHIFT 0x0 373*c59a5c48SFrançois Tigeot #define THM_TMON0_REMOTE_START__DATA_MASK 0xffffffff 374*c59a5c48SFrançois Tigeot #define THM_TMON0_REMOTE_START__DATA__SHIFT 0x0 375*c59a5c48SFrançois Tigeot #define THM_TMON0_REMOTE_END__DATA_MASK 0xffffffff 376*c59a5c48SFrançois Tigeot #define THM_TMON0_REMOTE_END__DATA__SHIFT 0x0 377*c59a5c48SFrançois Tigeot #define THM_TMON1_REMOTE_START__DATA_MASK 0xffffffff 378*c59a5c48SFrançois Tigeot #define THM_TMON1_REMOTE_START__DATA__SHIFT 0x0 379*c59a5c48SFrançois Tigeot #define THM_TMON1_REMOTE_END__DATA_MASK 0xffffffff 380*c59a5c48SFrançois Tigeot #define THM_TMON1_REMOTE_END__DATA__SHIFT 0x0 381*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__HaltPolling_MASK 0x1 382*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__HaltPolling__SHIFT 0x0 383*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__TMON0_PwrDn_Dis_MASK 0x2 384*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__TMON0_PwrDn_Dis__SHIFT 0x1 385*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__TMON1_PwrDn_Dis_MASK 0x4 386*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL0__TMON1_PwrDn_Dis__SHIFT 0x2 387*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_Limit_Temp_MASK 0x7 388*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_Limit_Temp__SHIFT 0x0 389*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_DelaySlope_MASK 0x38 390*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_DelaySlope__SHIFT 0x3 391*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_MinDelay_MASK 0x1c0 392*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL1__PwrDn_MinDelay__SHIFT 0x6 393*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__PwrDn_MaxDlyMult_MASK 0x3 394*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__PwrDn_MaxDlyMult__SHIFT 0x0 395*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__PwrDn_NumSensors_MASK 0xc 396*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__PwrDn_NumSensors__SHIFT 0x2 397*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__start_mission_polling_MASK 0x10 398*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__start_mission_polling__SHIFT 0x4 399*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__short_stagger_count_MASK 0x20 400*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__short_stagger_count__SHIFT 0x5 401*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__sbtsi_use_corrected_MASK 0x40 402*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__sbtsi_use_corrected__SHIFT 0x6 403*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__csrslave_use_corrected_MASK 0x80 404*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__csrslave_use_corrected__SHIFT 0x7 405*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__smu_use_corrected_MASK 0x100 406*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__smu_use_corrected__SHIFT 0x8 407*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__skip_scale_correction_MASK 0x800 408*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL2__skip_scale_correction__SHIFT 0xb 409*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL3__Global_TMAX_MASK 0x7ff 410*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL3__Global_TMAX__SHIFT 0x0 411*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL4__Global_TMAX_ID_MASK 0xff 412*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL4__Global_TMAX_ID__SHIFT 0x0 413*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL5__Global_TMIN_MASK 0x7ff 414*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL5__Global_TMIN__SHIFT 0x0 415*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL6__Global_TMIN_ID_MASK 0xff 416*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL6__Global_TMIN_ID__SHIFT 0x0 417*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL7__THERMID_MASK 0xff 418*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL7__THERMID__SHIFT 0x0 419*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL8__THERMMAX_MASK 0x7ff 420*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL8__THERMMAX__SHIFT 0x0 421*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL9__Tj_Max_TMON0_MASK 0x7ff 422*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL9__Tj_Max_TMON0__SHIFT 0x0 423*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL10__TMON0_Tj_Max_RS_ID_MASK 0xf 424*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL10__TMON0_Tj_Max_RS_ID__SHIFT 0x0 425*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL11__Tj_Max_TMON1_MASK 0x7ff 426*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL11__Tj_Max_TMON1__SHIFT 0x0 427*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL12__TMON1_Tj_Max_RS_ID_MASK 0xf 428*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL12__TMON1_Tj_Max_RS_ID__SHIFT 0x0 429*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL13__PowerDownTmon0_MASK 0x1 430*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL13__PowerDownTmon0__SHIFT 0x0 431*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL13__PowerDownTmon1_MASK 0x2 432*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL13__PowerDownTmon1__SHIFT 0x1 433*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL14__boot_done_MASK 0x1 434*c59a5c48SFrançois Tigeot #define THM_TCON_LOCAL14__boot_done__SHIFT 0x0 435*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonRsInterleave_MASK 0x1 436*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonRsInterleave__SHIFT 0x0 437*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonNumAcq_MASK 0xe 438*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonNumAcq__SHIFT 0x1 439*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonForceMaxAcq_MASK 0x10 440*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonForceMaxAcq__SHIFT 0x4 441*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonClkDiv_MASK 0x60 442*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonClkDiv__SHIFT 0x5 443*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonBGAdj1_MASK 0x7f80 444*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonBGAdj1__SHIFT 0x7 445*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonBGAdj0_MASK 0x7f8000 446*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TmonBGAdj0__SHIFT 0xf 447*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TconZtValue_MASK 0xff800000 448*c59a5c48SFrançois Tigeot #define THM_FUSE0__FUSE_TconZtValue__SHIFT 0x17 449*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconZtValue_MASK 0x3 450*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconZtValue__SHIFT 0x0 451*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconUseSecondary_MASK 0xc 452*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconUseSecondary__SHIFT 0x2 453*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconTmpAdjLoRes_MASK 0x10 454*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconTmpAdjLoRes__SHIFT 0x4 455*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrUpStaggerTime_MASK 0x60 456*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrUpStaggerTime__SHIFT 0x5 457*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnTmpLmt_MASK 0x380 458*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnTmpLmt__SHIFT 0x7 459*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnNumSensors_MASK 0xc00 460*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnNumSensors__SHIFT 0xa 461*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnMinDelay_MASK 0x7000 462*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnMinDelay__SHIFT 0xc 463*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnMaxDelayMult_MASK 0x18000 464*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnMaxDelayMult__SHIFT 0xf 465*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnDelaySlope_MASK 0xe0000 466*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconPwrDnDelaySlope__SHIFT 0x11 467*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconKValue_MASK 0x100000 468*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconKValue__SHIFT 0x14 469*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconDtValue31_MASK 0x7e00000 470*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconDtValue31__SHIFT 0x15 471*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconDtValue30_MASK 0xf8000000 472*c59a5c48SFrançois Tigeot #define THM_FUSE1__FUSE_TconDtValue30__SHIFT 0x1b 473*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue30_MASK 0x1 474*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue30__SHIFT 0x0 475*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue29_MASK 0x7e 476*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue29__SHIFT 0x1 477*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue28_MASK 0x1f80 478*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue28__SHIFT 0x7 479*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue27_MASK 0x7e000 480*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue27__SHIFT 0xd 481*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue26_MASK 0x1f80000 482*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue26__SHIFT 0x13 483*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue25_MASK 0x7e000000 484*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue25__SHIFT 0x19 485*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue24_MASK 0x80000000 486*c59a5c48SFrançois Tigeot #define THM_FUSE2__FUSE_TconDtValue24__SHIFT 0x1f 487*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue24_MASK 0x1f 488*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue24__SHIFT 0x0 489*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue23_MASK 0x7e0 490*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue23__SHIFT 0x5 491*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue22_MASK 0x1f800 492*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue22__SHIFT 0xb 493*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue21_MASK 0x7e0000 494*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue21__SHIFT 0x11 495*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue20_MASK 0x1f800000 496*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue20__SHIFT 0x17 497*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue19_MASK 0xe0000000 498*c59a5c48SFrançois Tigeot #define THM_FUSE3__FUSE_TconDtValue19__SHIFT 0x1d 499*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue19_MASK 0x7 500*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue19__SHIFT 0x0 501*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue18_MASK 0x1f8 502*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue18__SHIFT 0x3 503*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue17_MASK 0x7e00 504*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue17__SHIFT 0x9 505*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue16_MASK 0x1f8000 506*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue16__SHIFT 0xf 507*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue15_MASK 0x7e00000 508*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue15__SHIFT 0x15 509*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue14_MASK 0xf8000000 510*c59a5c48SFrançois Tigeot #define THM_FUSE4__FUSE_TconDtValue14__SHIFT 0x1b 511*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue14_MASK 0x1 512*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue14__SHIFT 0x0 513*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue13_MASK 0x7e 514*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue13__SHIFT 0x1 515*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue12_MASK 0x1f80 516*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue12__SHIFT 0x7 517*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue11_MASK 0x7e000 518*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue11__SHIFT 0xd 519*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue10_MASK 0x1f80000 520*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue10__SHIFT 0x13 521*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue9_MASK 0x7e000000 522*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue9__SHIFT 0x19 523*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue8_MASK 0x80000000 524*c59a5c48SFrançois Tigeot #define THM_FUSE5__FUSE_TconDtValue8__SHIFT 0x1f 525*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue8_MASK 0x1f 526*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue8__SHIFT 0x0 527*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue7_MASK 0x7e0 528*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue7__SHIFT 0x5 529*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue6_MASK 0x1f800 530*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue6__SHIFT 0xb 531*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue5_MASK 0x7e0000 532*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue5__SHIFT 0x11 533*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue4_MASK 0x1f800000 534*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue4__SHIFT 0x17 535*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue3_MASK 0xe0000000 536*c59a5c48SFrançois Tigeot #define THM_FUSE6__FUSE_TconDtValue3__SHIFT 0x1d 537*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue3_MASK 0x7 538*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue3__SHIFT 0x0 539*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue2_MASK 0x1f8 540*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue2__SHIFT 0x3 541*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue1_MASK 0x7e00 542*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue1__SHIFT 0x9 543*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue0_MASK 0x1f8000 544*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconDtValue0__SHIFT 0xf 545*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconCtValue1_MASK 0xffe00000 546*c59a5c48SFrançois Tigeot #define THM_FUSE7__FUSE_TconCtValue1__SHIFT 0x15 547*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconCtValue0_MASK 0x7ff 548*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconCtValue0__SHIFT 0x0 549*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconBtValue_MASK 0x1f800 550*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconBtValue__SHIFT 0xb 551*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconBootDelay_MASK 0x60000 552*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconBootDelay__SHIFT 0x11 553*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconAtValue1_MASK 0x7ff80000 554*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconAtValue1__SHIFT 0x13 555*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconAtValue0_MASK 0x80000000 556*c59a5c48SFrançois Tigeot #define THM_FUSE8__FUSE_TconAtValue0__SHIFT 0x1f 557*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_TconAtValue0_MASK 0x7ff 558*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_TconAtValue0__SHIFT 0x0 559*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_ThermTripLimit_MASK 0x7f800 560*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_ThermTripLimit__SHIFT 0xb 561*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_ThermTripEn_MASK 0x80000 562*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_ThermTripEn__SHIFT 0x13 563*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcTmpLmt_MASK 0x7f00000 564*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcTmpLmt__SHIFT 0x14 565*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcMsrLock_MASK 0x8000000 566*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcMsrLock__SHIFT 0x1b 567*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcHystLmt_MASK 0xf0000000 568*c59a5c48SFrançois Tigeot #define THM_FUSE9__FUSE_HtcHystLmt__SHIFT 0x1c 569*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcDis_MASK 0x1 570*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcDis__SHIFT 0x0 571*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcClkInact_MASK 0xe 572*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcClkInact__SHIFT 0x1 573*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcClkAct_MASK 0x70 574*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_HtcClkAct__SHIFT 0x4 575*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_UnusedBits_MASK 0xffffff80 576*c59a5c48SFrançois Tigeot #define THM_FUSE10__FUSE_UnusedBits__SHIFT 0x7 577*c59a5c48SFrançois Tigeot #define THM_FUSE11__PA_SPARE_MASK 0xff 578*c59a5c48SFrançois Tigeot #define THM_FUSE11__PA_SPARE__SHIFT 0x0 579*c59a5c48SFrançois Tigeot #define THM_FUSE12__FusesValid_MASK 0x1 580*c59a5c48SFrançois Tigeot #define THM_FUSE12__FusesValid__SHIFT 0x0 581*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX__MP0PUB_IND_ADDR_MASK 0xffffffff 582*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX__MP0PUB_IND_ADDR__SHIFT 0x0 583*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA__MP0PUB_IND_DATA_MASK 0xffffffff 584*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA__MP0PUB_IND_DATA__SHIFT 0x0 585*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_0__MP0PUB_IND_ADDR_MASK 0xffffffff 586*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_0__MP0PUB_IND_ADDR__SHIFT 0x0 587*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_0__MP0PUB_IND_DATA_MASK 0xffffffff 588*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_0__MP0PUB_IND_DATA__SHIFT 0x0 589*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_1__MP0PUB_IND_ADDR_MASK 0xffffffff 590*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_1__MP0PUB_IND_ADDR__SHIFT 0x0 591*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_1__MP0PUB_IND_DATA_MASK 0xffffffff 592*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_1__MP0PUB_IND_DATA__SHIFT 0x0 593*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_2__MP0PUB_IND_ADDR_MASK 0xffffffff 594*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_2__MP0PUB_IND_ADDR__SHIFT 0x0 595*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_2__MP0PUB_IND_DATA_MASK 0xffffffff 596*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_2__MP0PUB_IND_DATA__SHIFT 0x0 597*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_3__MP0PUB_IND_ADDR_MASK 0xffffffff 598*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_3__MP0PUB_IND_ADDR__SHIFT 0x0 599*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_3__MP0PUB_IND_DATA_MASK 0xffffffff 600*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_3__MP0PUB_IND_DATA__SHIFT 0x0 601*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_4__MP0PUB_IND_ADDR_MASK 0xffffffff 602*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_4__MP0PUB_IND_ADDR__SHIFT 0x0 603*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_4__MP0PUB_IND_DATA_MASK 0xffffffff 604*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_4__MP0PUB_IND_DATA__SHIFT 0x0 605*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_5__MP0PUB_IND_ADDR_MASK 0xffffffff 606*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_5__MP0PUB_IND_ADDR__SHIFT 0x0 607*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_5__MP0PUB_IND_DATA_MASK 0xffffffff 608*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_5__MP0PUB_IND_DATA__SHIFT 0x0 609*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_6__MP0PUB_IND_ADDR_MASK 0xffffffff 610*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_6__MP0PUB_IND_ADDR__SHIFT 0x0 611*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_6__MP0PUB_IND_DATA_MASK 0xffffffff 612*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_6__MP0PUB_IND_DATA__SHIFT 0x0 613*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_7__MP0PUB_IND_ADDR_MASK 0xffffffff 614*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_7__MP0PUB_IND_ADDR__SHIFT 0x0 615*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_7__MP0PUB_IND_DATA_MASK 0xffffffff 616*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_7__MP0PUB_IND_DATA__SHIFT 0x0 617*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_8__MP0PUB_IND_ADDR_MASK 0xffffffff 618*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_8__MP0PUB_IND_ADDR__SHIFT 0x0 619*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_8__MP0PUB_IND_DATA_MASK 0xffffffff 620*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_8__MP0PUB_IND_DATA__SHIFT 0x0 621*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_9__MP0PUB_IND_ADDR_MASK 0xffffffff 622*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_9__MP0PUB_IND_ADDR__SHIFT 0x0 623*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_9__MP0PUB_IND_DATA_MASK 0xffffffff 624*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_9__MP0PUB_IND_DATA__SHIFT 0x0 625*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_10__MP0PUB_IND_ADDR_MASK 0xffffffff 626*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_10__MP0PUB_IND_ADDR__SHIFT 0x0 627*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_10__MP0PUB_IND_DATA_MASK 0xffffffff 628*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_10__MP0PUB_IND_DATA__SHIFT 0x0 629*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_11__MP0PUB_IND_ADDR_MASK 0xffffffff 630*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_11__MP0PUB_IND_ADDR__SHIFT 0x0 631*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_11__MP0PUB_IND_DATA_MASK 0xffffffff 632*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_11__MP0PUB_IND_DATA__SHIFT 0x0 633*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_12__MP0PUB_IND_ADDR_MASK 0xffffffff 634*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_12__MP0PUB_IND_ADDR__SHIFT 0x0 635*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_12__MP0PUB_IND_DATA_MASK 0xffffffff 636*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_12__MP0PUB_IND_DATA__SHIFT 0x0 637*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_13__MP0PUB_IND_ADDR_MASK 0xffffffff 638*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_13__MP0PUB_IND_ADDR__SHIFT 0x0 639*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_13__MP0PUB_IND_DATA_MASK 0xffffffff 640*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_13__MP0PUB_IND_DATA__SHIFT 0x0 641*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_14__MP0PUB_IND_ADDR_MASK 0xffffffff 642*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_14__MP0PUB_IND_ADDR__SHIFT 0x0 643*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_14__MP0PUB_IND_DATA_MASK 0xffffffff 644*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_14__MP0PUB_IND_DATA__SHIFT 0x0 645*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_15__MP0PUB_IND_ADDR_MASK 0xffffffff 646*c59a5c48SFrançois Tigeot #define MP0PUB_IND_INDEX_15__MP0PUB_IND_ADDR__SHIFT 0x0 647*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_15__MP0PUB_IND_DATA_MASK 0xffffffff 648*c59a5c48SFrançois Tigeot #define MP0PUB_IND_DATA_15__MP0PUB_IND_DATA__SHIFT 0x0 649*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_0_MASK 0x1 650*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_0__SHIFT 0x0 651*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_1_MASK 0x2 652*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_1__SHIFT 0x1 653*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_2_MASK 0x4 654*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_2__SHIFT 0x2 655*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_3_MASK 0x8 656*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_3__SHIFT 0x3 657*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_4_MASK 0x10 658*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_4__SHIFT 0x4 659*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_5_MASK 0x20 660*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_5__SHIFT 0x5 661*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_6_MASK 0x40 662*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_6__SHIFT 0x6 663*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_7_MASK 0x80 664*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_7__SHIFT 0x7 665*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_8_MASK 0x100 666*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_8__SHIFT 0x8 667*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_9_MASK 0x200 668*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_9__SHIFT 0x9 669*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_10_MASK 0x400 670*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_10__SHIFT 0xa 671*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_11_MASK 0x800 672*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_11__SHIFT 0xb 673*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_12_MASK 0x1000 674*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_12__SHIFT 0xc 675*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_13_MASK 0x2000 676*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_13__SHIFT 0xd 677*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_14_MASK 0x4000 678*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_14__SHIFT 0xe 679*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_15_MASK 0x8000 680*c59a5c48SFrançois Tigeot #define MP0_IND_ACCESS_CNTL__AUTO_INCREMENT_IND_15__SHIFT 0xf 681*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_0__MP0_MSP_MSG_MASK 0xffffffff 682*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_0__MP0_MSP_MSG__SHIFT 0x0 683*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_1__MP0_MSP_MSG_MASK 0xffffffff 684*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_1__MP0_MSP_MSG__SHIFT 0x0 685*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_2__MP0_MSP_MSG_MASK 0xffffffff 686*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_2__MP0_MSP_MSG__SHIFT 0x0 687*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_3__MP0_MSP_MSG_MASK 0xffffffff 688*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_3__MP0_MSP_MSG__SHIFT 0x0 689*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_4__MP0_MSP_MSG_MASK 0xffffffff 690*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_4__MP0_MSP_MSG__SHIFT 0x0 691*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_5__MP0_MSP_MSG_MASK 0xffffffff 692*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_5__MP0_MSP_MSG__SHIFT 0x0 693*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_6__MP0_MSP_MSG_MASK 0xffffffff 694*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_6__MP0_MSP_MSG__SHIFT 0x0 695*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_7__MP0_MSP_MSG_MASK 0xffffffff 696*c59a5c48SFrançois Tigeot #define MP0_MSP_MESSAGE_7__MP0_MSP_MSG__SHIFT 0x0 697*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__UVD_MASK 0x1 698*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__UVD__SHIFT 0x0 699*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__VCE_MASK 0x2 700*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__VCE__SHIFT 0x1 701*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__ISP_MASK 0x4 702*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__ISP__SHIFT 0x2 703*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__RESERVED_MASK 0xfffffff8 704*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR__RESERVED__SHIFT 0x3 705*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__UVD_MASK 0x1 706*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__UVD__SHIFT 0x0 707*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__VCE_MASK 0x2 708*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__VCE__SHIFT 0x1 709*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__ISP_MASK 0x4 710*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__ISP__SHIFT 0x2 711*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__RESERVED_MASK 0xfffffff8 712*c59a5c48SFrançois Tigeot #define SAM_IH_EXT_ERR_INTR_STATUS__RESERVED__SHIFT 0x3 713*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__START_MASK 0x1 714*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__START__SHIFT 0x0 715*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__CLEAR_MASK 0x100 716*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__CLEAR__SHIFT 0x8 717*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__DEC_MASK 0x10000 718*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__DEC__SHIFT 0x10 719*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__PULSE_COUNT_MODE_MASK 0x1000000 720*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL0__PULSE_COUNT_MODE__SHIFT 0x18 721*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__PWM_OUTPUT_EN_MASK 0x1 722*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__PWM_OUTPUT_EN__SHIFT 0x0 723*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__TIME_SLICE_MODE_EN_MASK 0x100 724*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__TIME_SLICE_MODE_EN__SHIFT 0x8 725*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__TIMER_SATURATION_EN_MASK 0x10000 726*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__TIMER_SATURATION_EN__SHIFT 0x10 727*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__RESERVED_MASK 0xff000000 728*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CTRL1__RESERVED__SHIFT 0x18 729*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CMP_AUTOINC__AUTOINC_MASK 0xf 730*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CMP_AUTOINC__AUTOINC__SHIFT 0x0 731*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CMP_AUTOINC__RESERVED_MASK 0xfffffff0 732*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CMP_AUTOINC__RESERVED__SHIFT 0x4 733*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_INTEN__INTEN_MASK 0xf 734*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_INTEN__INTEN__SHIFT 0x0 735*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_INTEN__RESERVED_MASK 0xfffffff0 736*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_INTEN__RESERVED__SHIFT 0x4 737*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_OCMP_0_0__OCMP_MASK 0xffffffff 738*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_OCMP_0_0__OCMP__SHIFT 0x0 739*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_OCMP_0_1__OCMP_MASK 0xffffffff 740*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_OCMP_0_1__OCMP__SHIFT 0x0 741*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CNT__COUNT_MASK 0xffffffff 742*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER0_CNT__COUNT__SHIFT 0x0 743*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__START_MASK 0x1 744*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__START__SHIFT 0x0 745*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__CLEAR_MASK 0x100 746*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__CLEAR__SHIFT 0x8 747*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__DEC_MASK 0x10000 748*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__DEC__SHIFT 0x10 749*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__PULSE_COUNT_MODE_MASK 0x1000000 750*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL0__PULSE_COUNT_MODE__SHIFT 0x18 751*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__PWM_OUTPUT_EN_MASK 0x1 752*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__PWM_OUTPUT_EN__SHIFT 0x0 753*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__TIME_SLICE_MODE_EN_MASK 0x100 754*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__TIME_SLICE_MODE_EN__SHIFT 0x8 755*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__TIMER_SATURATION_EN_MASK 0x10000 756*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__TIMER_SATURATION_EN__SHIFT 0x10 757*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__RESERVED_MASK 0xff000000 758*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CTRL1__RESERVED__SHIFT 0x18 759*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CMP_AUTOINC__AUTOINC_MASK 0xf 760*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CMP_AUTOINC__AUTOINC__SHIFT 0x0 761*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CMP_AUTOINC__RESERVED_MASK 0xfffffff0 762*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CMP_AUTOINC__RESERVED__SHIFT 0x4 763*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_INTEN__INTEN_MASK 0xf 764*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_INTEN__INTEN__SHIFT 0x0 765*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_INTEN__RESERVED_MASK 0xfffffff0 766*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_INTEN__RESERVED__SHIFT 0x4 767*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_OCMP_0_0__OCMP_MASK 0xffffffff 768*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_OCMP_0_0__OCMP__SHIFT 0x0 769*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_OCMP_0_1__OCMP_MASK 0xffffffff 770*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_OCMP_0_1__OCMP__SHIFT 0x0 771*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CNT__COUNT_MASK 0xffffffff 772*c59a5c48SFrançois Tigeot #define MP0_DISP_TIMER1_CNT__COUNT__SHIFT 0x0 773*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_0__CONTENT_MASK 0xffffffff 774*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_0__CONTENT__SHIFT 0x0 775*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_1__CONTENT_MASK 0xffffffff 776*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_1__CONTENT__SHIFT 0x0 777*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_2__CONTENT_MASK 0xffffffff 778*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_2__CONTENT__SHIFT 0x0 779*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_3__CONTENT_MASK 0xffffffff 780*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_3__CONTENT__SHIFT 0x0 781*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_4__CONTENT_MASK 0xffffffff 782*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_4__CONTENT__SHIFT 0x0 783*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_5__CONTENT_MASK 0xffffffff 784*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_5__CONTENT__SHIFT 0x0 785*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_6__CONTENT_MASK 0xffffffff 786*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_6__CONTENT__SHIFT 0x0 787*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_7__CONTENT_MASK 0xffffffff 788*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_7__CONTENT__SHIFT 0x0 789*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_8__CONTENT_MASK 0xffffffff 790*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_8__CONTENT__SHIFT 0x0 791*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_9__CONTENT_MASK 0xffffffff 792*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_9__CONTENT__SHIFT 0x0 793*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_10__CONTENT_MASK 0xffffffff 794*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_10__CONTENT__SHIFT 0x0 795*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_11__CONTENT_MASK 0xffffffff 796*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_11__CONTENT__SHIFT 0x0 797*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_12__CONTENT_MASK 0xffffffff 798*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_12__CONTENT__SHIFT 0x0 799*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_13__CONTENT_MASK 0xffffffff 800*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_13__CONTENT__SHIFT 0x0 801*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_14__CONTENT_MASK 0xffffffff 802*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_14__CONTENT__SHIFT 0x0 803*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_15__CONTENT_MASK 0xffffffff 804*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_MSG_15__CONTENT__SHIFT 0x0 805*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_0__CONTENT_MASK 0xffffffff 806*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_0__CONTENT__SHIFT 0x0 807*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_1__CONTENT_MASK 0xffffffff 808*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_1__CONTENT__SHIFT 0x0 809*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_2__CONTENT_MASK 0xffffffff 810*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_2__CONTENT__SHIFT 0x0 811*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_3__CONTENT_MASK 0xffffffff 812*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_3__CONTENT__SHIFT 0x0 813*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_4__CONTENT_MASK 0xffffffff 814*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_4__CONTENT__SHIFT 0x0 815*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_5__CONTENT_MASK 0xffffffff 816*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_5__CONTENT__SHIFT 0x0 817*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_6__CONTENT_MASK 0xffffffff 818*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_6__CONTENT__SHIFT 0x0 819*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_7__CONTENT_MASK 0xffffffff 820*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_7__CONTENT__SHIFT 0x0 821*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_8__CONTENT_MASK 0xffffffff 822*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_8__CONTENT__SHIFT 0x0 823*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_9__CONTENT_MASK 0xffffffff 824*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_9__CONTENT__SHIFT 0x0 825*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_10__CONTENT_MASK 0xffffffff 826*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_10__CONTENT__SHIFT 0x0 827*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_11__CONTENT_MASK 0xffffffff 828*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_11__CONTENT__SHIFT 0x0 829*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_12__CONTENT_MASK 0xffffffff 830*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_12__CONTENT__SHIFT 0x0 831*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_13__CONTENT_MASK 0xffffffff 832*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_13__CONTENT__SHIFT 0x0 833*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_14__CONTENT_MASK 0xffffffff 834*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_14__CONTENT__SHIFT 0x0 835*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_15__CONTENT_MASK 0xffffffff 836*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_RESP_15__CONTENT__SHIFT 0x0 837*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_0__CONTENT_MASK 0xffffffff 838*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_0__CONTENT__SHIFT 0x0 839*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_1__CONTENT_MASK 0xffffffff 840*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_1__CONTENT__SHIFT 0x0 841*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_2__CONTENT_MASK 0xffffffff 842*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_2__CONTENT__SHIFT 0x0 843*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_3__CONTENT_MASK 0xffffffff 844*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_3__CONTENT__SHIFT 0x0 845*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_4__CONTENT_MASK 0xffffffff 846*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_4__CONTENT__SHIFT 0x0 847*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_5__CONTENT_MASK 0xffffffff 848*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_5__CONTENT__SHIFT 0x0 849*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_6__CONTENT_MASK 0xffffffff 850*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_6__CONTENT__SHIFT 0x0 851*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_7__CONTENT_MASK 0xffffffff 852*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_7__CONTENT__SHIFT 0x0 853*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_8__CONTENT_MASK 0xffffffff 854*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_8__CONTENT__SHIFT 0x0 855*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_9__CONTENT_MASK 0xffffffff 856*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_9__CONTENT__SHIFT 0x0 857*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_10__CONTENT_MASK 0xffffffff 858*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_10__CONTENT__SHIFT 0x0 859*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_11__CONTENT_MASK 0xffffffff 860*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_11__CONTENT__SHIFT 0x0 861*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_12__CONTENT_MASK 0xffffffff 862*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_12__CONTENT__SHIFT 0x0 863*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_13__CONTENT_MASK 0xffffffff 864*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_13__CONTENT__SHIFT 0x0 865*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_14__CONTENT_MASK 0xffffffff 866*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_14__CONTENT__SHIFT 0x0 867*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_15__CONTENT_MASK 0xffffffff 868*c59a5c48SFrançois Tigeot #define SMU_MP1_SRBM2P_ARG_15__CONTENT__SHIFT 0x0 869*c59a5c48SFrançois Tigeot #define SMU_MP1_ACP2MP_RESP__CONTENT_MASK 0xffffffff 870*c59a5c48SFrançois Tigeot #define SMU_MP1_ACP2MP_RESP__CONTENT__SHIFT 0x0 871*c59a5c48SFrançois Tigeot #define SMU_MP1_DC2MP_RESP__CONTENT_MASK 0xffffffff 872*c59a5c48SFrançois Tigeot #define SMU_MP1_DC2MP_RESP__CONTENT__SHIFT 0x0 873*c59a5c48SFrançois Tigeot #define SMU_MP1_UVD2MP_RESP__CONTENT_MASK 0xffffffff 874*c59a5c48SFrançois Tigeot #define SMU_MP1_UVD2MP_RESP__CONTENT__SHIFT 0x0 875*c59a5c48SFrançois Tigeot #define SMU_MP1_VCE2MP_RESP__CONTENT_MASK 0xffffffff 876*c59a5c48SFrançois Tigeot #define SMU_MP1_VCE2MP_RESP__CONTENT__SHIFT 0x0 877*c59a5c48SFrançois Tigeot #define SMU_MP1_RLC2MP_RESP__CONTENT_MASK 0xffffffff 878*c59a5c48SFrançois Tigeot #define SMU_MP1_RLC2MP_RESP__CONTENT__SHIFT 0x0 879*c59a5c48SFrançois Tigeot #define MP_FPS_CNT__FPS_CNT_MASK 0xffffffff 880*c59a5c48SFrançois Tigeot #define MP_FPS_CNT__FPS_CNT__SHIFT 0x0 881*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_STAT_MASK 0x1 882*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_STAT__SHIFT 0x0 883*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_UNMASK_MASK 0x2 884*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_UNMASK__SHIFT 0x1 885*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_TYPE_MASK 0x4 886*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_TYPE__SHIFT 0x2 887*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_ACK_MASK 0x8 888*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__INT_ACK__SHIFT 0x3 889*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__MASK_MASK 0x10 890*c59a5c48SFrançois Tigeot #define SMU_DISP0_TIMER_INT_CONTROL__MASK__SHIFT 0x4 891*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_STAT_MASK 0x1 892*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_STAT__SHIFT 0x0 893*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_UNMASK_MASK 0x2 894*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_UNMASK__SHIFT 0x1 895*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_TYPE_MASK 0x4 896*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_TYPE__SHIFT 0x2 897*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_ACK_MASK 0x8 898*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__INT_ACK__SHIFT 0x3 899*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__MASK_MASK 0x10 900*c59a5c48SFrançois Tigeot #define SMU_DISP1_TIMER_INT_CONTROL__MASK__SHIFT 0x4 901*c59a5c48SFrançois Tigeot #define SMU_SRBM_CONFIG__MSTR_CREDITS_MASK 0x1f 902*c59a5c48SFrançois Tigeot #define SMU_SRBM_CONFIG__MSTR_CREDITS__SHIFT 0x0 903*c59a5c48SFrançois Tigeot #define MP_FPS_CNT_XBAR__FPS_CNT_MASK 0xffffffff 904*c59a5c48SFrançois Tigeot #define MP_FPS_CNT_XBAR__FPS_CNT__SHIFT 0x0 905*c59a5c48SFrançois Tigeot #define MP_SRBM_CONFIG_XBAR__MSTR_CREDITS_MASK 0x1f 906*c59a5c48SFrançois Tigeot #define MP_SRBM_CONFIG_XBAR__MSTR_CREDITS__SHIFT 0x0 907*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__ACC_VIO_EN_MASK 0x1 908*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__ACC_VIO_EN__SHIFT 0x0 909*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__ALLOW_NS_ACC_MASK 0x2 910*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__ALLOW_NS_ACC__SHIFT 0x1 911*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__SOFT_RST_MASK_MASK 0x4 912*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__SOFT_RST_MASK__SHIFT 0x2 913*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__SOFT_RST_STS_MASK 0x8 914*c59a5c48SFrançois Tigeot #define MP_SRBM_CONTROL__SOFT_RST_STS__SHIFT 0x3 915*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_OP_MASK 0x1 916*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_OP__SHIFT 0x0 917*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_SRCID_MASK 0xe 918*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_SRCID__SHIFT 0x1 919*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_VALID_MASK 0x80000000 920*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_LOG__ACC_VIO_VALID__SHIFT 0x1f 921*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_ADDR__ACC_VIO_ADDR_MASK 0xffffffff 922*c59a5c48SFrançois Tigeot #define MP_SRBM_ACCVIO_ADDR__ACC_VIO_ADDR__SHIFT 0x0 923*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__ACC_VIO_EN_MASK 0x1 924*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__ACC_VIO_EN__SHIFT 0x0 925*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__MP0_ACCESS_MASK 0x2 926*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__MP0_ACCESS__SHIFT 0x1 927*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__ALLOW_NS_ACC_MASK 0x4 928*c59a5c48SFrançois Tigeot #define MP_CRBBM_CONTROL__ALLOW_NS_ACC__SHIFT 0x2 929*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_OP_MASK 0x1 930*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_OP__SHIFT 0x0 931*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_INTF_MASK 0x2 932*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_INTF__SHIFT 0x1 933*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_VALID_MASK 0x80000000 934*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_LOG__ACC_VIO_VALID__SHIFT 0x1f 935*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_ADDR__ACC_VIO_ADDR_MASK 0xffffffff 936*c59a5c48SFrançois Tigeot #define MP_CRBBM_ACCVIO_ADDR__ACC_VIO_ADDR__SHIFT 0x0 937*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__tag_MASK 0x1ffff 938*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__tag__SHIFT 0x0 939*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__urg_MASK 0x1e0000 940*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__urg__SHIFT 0x11 941*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__stall_MASK 0x200000 942*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__stall__SHIFT 0x15 943*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__priv_MASK 0x400000 944*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__priv__SHIFT 0x16 945*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__cid_MASK 0xff800000 946*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL__cid__SHIFT 0x17 947*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vf_MASK 0x1 948*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vf__SHIFT 0x0 949*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vfid_MASK 0xfe 950*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vfid__SHIFT 0x1 951*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__physical_MASK 0x100 952*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__physical__SHIFT 0x8 953*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__snoop_MASK 0x200 954*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__snoop__SHIFT 0x9 955*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__inval_MASK 0x400 956*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__inval__SHIFT 0xa 957*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__op_MASK 0x3f800 958*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__op__SHIFT 0xb 959*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__swap_MASK 0x300000 960*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__swap__SHIFT 0x14 961*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vmid_MASK 0x3c00000 962*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__vmid__SHIFT 0x16 963*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__atc_MASK 0x4000000 964*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__atc__SHIFT 0x1a 965*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__fed_MASK 0x8000000 966*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_CNTL_1__fed__SHIFT 0x1b 967*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_LOW_ADDR__addr_MASK 0xffffffff 968*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_LOW_ADDR__addr__SHIFT 0x0 969*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_HIGH_ADDR__addr_47_37_MASK 0x7ff 970*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_HIGH_ADDR__addr_47_37__SHIFT 0x0 971*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_HIGH_ADDR__reserved_MASK 0xfffff800 972*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_HIGH_ADDR__reserved__SHIFT 0xb 973*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_MASK__mask_MASK 0xffffffff 974*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_MASK__mask__SHIFT 0x0 975*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_0__data_MASK 0xffffffff 976*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_0__data__SHIFT 0x0 977*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_1__data_MASK 0xffffffff 978*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_1__data__SHIFT 0x0 979*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_2__data_MASK 0xffffffff 980*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_2__data__SHIFT 0x0 981*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_3__data_MASK 0xffffffff 982*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_3__data__SHIFT 0x0 983*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_4__data_MASK 0xffffffff 984*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_4__data__SHIFT 0x0 985*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_5__data_MASK 0xffffffff 986*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_5__data__SHIFT 0x0 987*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_6__data_MASK 0xffffffff 988*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_6__data__SHIFT 0x0 989*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_7__data_MASK 0xffffffff 990*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_DATA_7__data__SHIFT 0x0 991*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__credit_counter_MASK 0x1f 992*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__credit_counter__SHIFT 0x0 993*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved0_MASK 0xe0 994*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved0__SHIFT 0x5 995*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__fifo_not_empty_MASK 0x100 996*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__fifo_not_empty__SHIFT 0x8 997*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved1_MASK 0xfe00 998*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved1__SHIFT 0x9 999*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__tag_pointer_MASK 0xf0000 1000*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__tag_pointer__SHIFT 0x10 1001*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved2_MASK 0xfff00000 1002*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRREQ_STATUS__reserved2__SHIFT 0x14 1003*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__valid_MASK 0x1 1004*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__valid__SHIFT 0x0 1005*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__nack_MASK 0x6 1006*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__nack__SHIFT 0x1 1007*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__reserved_MASK 0xfff8 1008*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__reserved__SHIFT 0x3 1009*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__tag_MASK 0xffff0000 1010*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_WRRET_STATUS_0__tag__SHIFT 0x10 1011*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_ADDR__addr_MASK 0xffffffff 1012*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_ADDR__addr__SHIFT 0x0 1013*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__tag_MASK 0xffff 1014*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__tag__SHIFT 0x0 1015*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__mask_MASK 0xff0000 1016*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__mask__SHIFT 0x10 1017*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__addr_47_40_MASK 0xff000000 1018*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL__addr_47_40__SHIFT 0x18 1019*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__urg_MASK 0xf 1020*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__urg__SHIFT 0x0 1021*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__stall_MASK 0x10 1022*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__stall__SHIFT 0x4 1023*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__priv_MASK 0x20 1024*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__priv__SHIFT 0x5 1025*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__swap_MASK 0xc0 1026*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__swap__SHIFT 0x6 1027*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__cid_MASK 0x1ff00 1028*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__cid__SHIFT 0x8 1029*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vmid_MASK 0x1e0000 1030*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vmid__SHIFT 0x11 1031*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__atc_MASK 0x200000 1032*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__atc__SHIFT 0x15 1033*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__physical_MASK 0x400000 1034*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__physical__SHIFT 0x16 1035*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__exe_MASK 0x800000 1036*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__exe__SHIFT 0x17 1037*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__snoop_MASK 0x1000000 1038*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__snoop__SHIFT 0x18 1039*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__shared_MASK 0x2000000 1040*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__shared__SHIFT 0x19 1041*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vf_MASK 0x4000000 1042*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vf__SHIFT 0x1a 1043*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vfid_MASK 0xf8000000 1044*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDREQ_CNTL_1__vfid__SHIFT 0x1b 1045*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_0_MASK 0x1 1046*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_0__SHIFT 0x0 1047*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_1_MASK 0x2 1048*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_1__SHIFT 0x1 1049*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_2_MASK 0x4 1050*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_2__SHIFT 0x2 1051*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_3_MASK 0x8 1052*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_3__SHIFT 0x3 1053*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_4_MASK 0x10 1054*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_4__SHIFT 0x4 1055*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_5_MASK 0x20 1056*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_5__SHIFT 0x5 1057*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_6_MASK 0x40 1058*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_6__SHIFT 0x6 1059*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_7_MASK 0x80 1060*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__vld_7__SHIFT 0x7 1061*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__reserved_MASK 0xffff00 1062*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__reserved__SHIFT 0x8 1063*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__atomic_MASK 0xff000000 1064*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_VALID__atomic__SHIFT 0x18 1065*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_0_MASK 0x3 1066*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_0__SHIFT 0x0 1067*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_1_MASK 0xc 1068*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_1__SHIFT 0x2 1069*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_2_MASK 0x30 1070*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_2__SHIFT 0x4 1071*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_3_MASK 0xc0 1072*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_3__SHIFT 0x6 1073*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_4_MASK 0x300 1074*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_4__SHIFT 0x8 1075*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_5_MASK 0xc00 1076*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_5__SHIFT 0xa 1077*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_6_MASK 0x3000 1078*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_6__SHIFT 0xc 1079*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_7_MASK 0xc000 1080*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__nack_7__SHIFT 0xe 1081*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__reserved_MASK 0xffff0000 1082*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_NACK__reserved__SHIFT 0x10 1083*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_0__DATA_MASK 0xffffffff 1084*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_0__DATA__SHIFT 0x0 1085*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_1__DATA_MASK 0xffffffff 1086*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_1__DATA__SHIFT 0x0 1087*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_2__DATA_MASK 0xffffffff 1088*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_2__DATA__SHIFT 0x0 1089*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_3__DATA_MASK 0xffffffff 1090*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_3__DATA__SHIFT 0x0 1091*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_4__DATA_MASK 0xffffffff 1092*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_4__DATA__SHIFT 0x0 1093*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_5__DATA_MASK 0xffffffff 1094*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_5__DATA__SHIFT 0x0 1095*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_6__DATA_MASK 0xffffffff 1096*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_6__DATA__SHIFT 0x0 1097*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_7__DATA_MASK 0xffffffff 1098*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_7__DATA__SHIFT 0x0 1099*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_8__DATA_MASK 0xffffffff 1100*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_8__DATA__SHIFT 0x0 1101*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_9__DATA_MASK 0xffffffff 1102*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_9__DATA__SHIFT 0x0 1103*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_10__DATA_MASK 0xffffffff 1104*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_10__DATA__SHIFT 0x0 1105*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_11__DATA_MASK 0xffffffff 1106*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_11__DATA__SHIFT 0x0 1107*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_12__DATA_MASK 0xffffffff 1108*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_12__DATA__SHIFT 0x0 1109*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_13__DATA_MASK 0xffffffff 1110*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_13__DATA__SHIFT 0x0 1111*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_14__DATA_MASK 0xffffffff 1112*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_14__DATA__SHIFT 0x0 1113*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_15__DATA_MASK 0xffffffff 1114*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_15__DATA__SHIFT 0x0 1115*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_16__DATA_MASK 0xffffffff 1116*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_16__DATA__SHIFT 0x0 1117*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_17__DATA_MASK 0xffffffff 1118*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_17__DATA__SHIFT 0x0 1119*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_18__DATA_MASK 0xffffffff 1120*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_18__DATA__SHIFT 0x0 1121*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_19__DATA_MASK 0xffffffff 1122*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_19__DATA__SHIFT 0x0 1123*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_20__DATA_MASK 0xffffffff 1124*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_20__DATA__SHIFT 0x0 1125*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_21__DATA_MASK 0xffffffff 1126*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_21__DATA__SHIFT 0x0 1127*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_22__DATA_MASK 0xffffffff 1128*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_22__DATA__SHIFT 0x0 1129*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_23__DATA_MASK 0xffffffff 1130*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_23__DATA__SHIFT 0x0 1131*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_24__DATA_MASK 0xffffffff 1132*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_24__DATA__SHIFT 0x0 1133*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_25__DATA_MASK 0xffffffff 1134*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_25__DATA__SHIFT 0x0 1135*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_26__DATA_MASK 0xffffffff 1136*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_26__DATA__SHIFT 0x0 1137*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_27__DATA_MASK 0xffffffff 1138*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_27__DATA__SHIFT 0x0 1139*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_28__DATA_MASK 0xffffffff 1140*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_28__DATA__SHIFT 0x0 1141*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_29__DATA_MASK 0xffffffff 1142*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_29__DATA__SHIFT 0x0 1143*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_30__DATA_MASK 0xffffffff 1144*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_30__DATA__SHIFT 0x0 1145*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_31__DATA_MASK 0xffffffff 1146*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_31__DATA__SHIFT 0x0 1147*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_32__DATA_MASK 0xffffffff 1148*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_32__DATA__SHIFT 0x0 1149*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_33__DATA_MASK 0xffffffff 1150*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_33__DATA__SHIFT 0x0 1151*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_34__DATA_MASK 0xffffffff 1152*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_34__DATA__SHIFT 0x0 1153*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_35__DATA_MASK 0xffffffff 1154*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_35__DATA__SHIFT 0x0 1155*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_36__DATA_MASK 0xffffffff 1156*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_36__DATA__SHIFT 0x0 1157*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_37__DATA_MASK 0xffffffff 1158*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_37__DATA__SHIFT 0x0 1159*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_38__DATA_MASK 0xffffffff 1160*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_38__DATA__SHIFT 0x0 1161*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_39__DATA_MASK 0xffffffff 1162*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_39__DATA__SHIFT 0x0 1163*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_40__DATA_MASK 0xffffffff 1164*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_40__DATA__SHIFT 0x0 1165*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_41__DATA_MASK 0xffffffff 1166*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_41__DATA__SHIFT 0x0 1167*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_42__DATA_MASK 0xffffffff 1168*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_42__DATA__SHIFT 0x0 1169*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_43__DATA_MASK 0xffffffff 1170*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_43__DATA__SHIFT 0x0 1171*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_44__DATA_MASK 0xffffffff 1172*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_44__DATA__SHIFT 0x0 1173*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_45__DATA_MASK 0xffffffff 1174*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_45__DATA__SHIFT 0x0 1175*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_46__DATA_MASK 0xffffffff 1176*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_46__DATA__SHIFT 0x0 1177*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_47__DATA_MASK 0xffffffff 1178*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_47__DATA__SHIFT 0x0 1179*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_48__DATA_MASK 0xffffffff 1180*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_48__DATA__SHIFT 0x0 1181*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_49__DATA_MASK 0xffffffff 1182*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_49__DATA__SHIFT 0x0 1183*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_50__DATA_MASK 0xffffffff 1184*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_50__DATA__SHIFT 0x0 1185*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_51__DATA_MASK 0xffffffff 1186*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_51__DATA__SHIFT 0x0 1187*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_52__DATA_MASK 0xffffffff 1188*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_52__DATA__SHIFT 0x0 1189*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_53__DATA_MASK 0xffffffff 1190*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_53__DATA__SHIFT 0x0 1191*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_54__DATA_MASK 0xffffffff 1192*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_54__DATA__SHIFT 0x0 1193*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_55__DATA_MASK 0xffffffff 1194*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_55__DATA__SHIFT 0x0 1195*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_56__DATA_MASK 0xffffffff 1196*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_56__DATA__SHIFT 0x0 1197*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_57__DATA_MASK 0xffffffff 1198*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_57__DATA__SHIFT 0x0 1199*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_58__DATA_MASK 0xffffffff 1200*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_58__DATA__SHIFT 0x0 1201*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_59__DATA_MASK 0xffffffff 1202*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_59__DATA__SHIFT 0x0 1203*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_60__DATA_MASK 0xffffffff 1204*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_60__DATA__SHIFT 0x0 1205*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_61__DATA_MASK 0xffffffff 1206*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_61__DATA__SHIFT 0x0 1207*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_62__DATA_MASK 0xffffffff 1208*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_62__DATA__SHIFT 0x0 1209*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_63__DATA_MASK 0xffffffff 1210*c59a5c48SFrançois Tigeot #define MP_DRAM_CNTL_RDRET_DATA_63__DATA__SHIFT 0x0 1211*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_send_MASK 0x1 1212*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_send__SHIFT 0x0 1213*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_stop_MASK 0x2 1214*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_stop__SHIFT 0x1 1215*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_force_active_MASK 0x4 1216*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_force_active__SHIFT 0x2 1217*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_rdValid_MASK 0x8 1218*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_rdValid__SHIFT 0x3 1219*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_busy_MASK 0x10 1220*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_busy__SHIFT 0x4 1221*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_disabled_MASK 0x20 1222*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_disabled__SHIFT 0x5 1223*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_debug_rst_MASK 0x40 1224*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_debug_rst__SHIFT 0x6 1225*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_stop_ack_MASK 0x80 1226*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_stop_ack__SHIFT 0x7 1227*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_rderr_MASK 0x300 1228*c59a5c48SFrançois Tigeot #define MP_IOC_CTRL__IOC_mst_rderr__SHIFT 0x8 1229*c59a5c48SFrançois Tigeot #define MP_IOC_RDDATA__IOC_mst_rdData_MASK 0xffffffff 1230*c59a5c48SFrançois Tigeot #define MP_IOC_RDDATA__IOC_mst_rdData__SHIFT 0x0 1231*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AwqReqCommit_MASK 0x2 1232*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AwqReqCommit__SHIFT 0x1 1233*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AltReqRdCmd_MASK 0x4 1234*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AltReqRdCmd__SHIFT 0x2 1235*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AltReqAddrLo_MASK 0xfffffff8 1236*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE1__BiuCqfC_AltReqAddrLo__SHIFT 0x3 1237*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqAddrMid_MASK 0xff 1238*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqAddrMid__SHIFT 0x0 1239*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqMask_MASK 0xff00 1240*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqMask__SHIFT 0x8 1241*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqSize_MASK 0x30000 1242*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqSize__SHIFT 0x10 1243*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqAddrHi_MASK 0xff000000 1244*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE2__BiuCqfC_AltReqAddrHi__SHIFT 0x18 1245*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE3__BiuDbfC_C2aDataOut_MASK 0xffffffff 1246*c59a5c48SFrançois Tigeot #define MP_IOC_PHASE3__BiuDbfC_C2aDataOut__SHIFT 0x0 1247*c59a5c48SFrançois Tigeot #define MP_IOC_READ_0__data_MASK 0xffffffff 1248*c59a5c48SFrançois Tigeot #define MP_IOC_READ_0__data__SHIFT 0x0 1249*c59a5c48SFrançois Tigeot #define MP_IOC_READ_1__data_MASK 0xffffffff 1250*c59a5c48SFrançois Tigeot #define MP_IOC_READ_1__data__SHIFT 0x0 1251*c59a5c48SFrançois Tigeot #define MP_IOC_READ_2__data_MASK 0xffffffff 1252*c59a5c48SFrançois Tigeot #define MP_IOC_READ_2__data__SHIFT 0x0 1253*c59a5c48SFrançois Tigeot #define MP_IOC_READ_3__data_MASK 0xffffffff 1254*c59a5c48SFrançois Tigeot #define MP_IOC_READ_3__data__SHIFT 0x0 1255*c59a5c48SFrançois Tigeot #define MP_IOC_READ_4__data_MASK 0xffffffff 1256*c59a5c48SFrançois Tigeot #define MP_IOC_READ_4__data__SHIFT 0x0 1257*c59a5c48SFrançois Tigeot #define MP_IOC_READ_5__data_MASK 0xffffffff 1258*c59a5c48SFrançois Tigeot #define MP_IOC_READ_5__data__SHIFT 0x0 1259*c59a5c48SFrançois Tigeot #define MP_IOC_READ_6__data_MASK 0xffffffff 1260*c59a5c48SFrançois Tigeot #define MP_IOC_READ_6__data__SHIFT 0x0 1261*c59a5c48SFrançois Tigeot #define MP_IOC_READ_7__data_MASK 0xffffffff 1262*c59a5c48SFrançois Tigeot #define MP_IOC_READ_7__data__SHIFT 0x0 1263*c59a5c48SFrançois Tigeot #define MP_IOC_READ_8__data_MASK 0xffffffff 1264*c59a5c48SFrançois Tigeot #define MP_IOC_READ_8__data__SHIFT 0x0 1265*c59a5c48SFrançois Tigeot #define MP_IOC_READ_9__data_MASK 0xffffffff 1266*c59a5c48SFrançois Tigeot #define MP_IOC_READ_9__data__SHIFT 0x0 1267*c59a5c48SFrançois Tigeot #define MP_IOC_READ_10__data_MASK 0xffffffff 1268*c59a5c48SFrançois Tigeot #define MP_IOC_READ_10__data__SHIFT 0x0 1269*c59a5c48SFrançois Tigeot #define MP_IOC_READ_11__data_MASK 0xffffffff 1270*c59a5c48SFrançois Tigeot #define MP_IOC_READ_11__data__SHIFT 0x0 1271*c59a5c48SFrançois Tigeot #define MP_IOC_READ_12__data_MASK 0xffffffff 1272*c59a5c48SFrançois Tigeot #define MP_IOC_READ_12__data__SHIFT 0x0 1273*c59a5c48SFrançois Tigeot #define MP_IOC_READ_13__data_MASK 0xffffffff 1274*c59a5c48SFrançois Tigeot #define MP_IOC_READ_13__data__SHIFT 0x0 1275*c59a5c48SFrançois Tigeot #define MP_IOC_READ_14__data_MASK 0xffffffff 1276*c59a5c48SFrançois Tigeot #define MP_IOC_READ_14__data__SHIFT 0x0 1277*c59a5c48SFrançois Tigeot #define MP_IOC_READ_15__data_MASK 0xffffffff 1278*c59a5c48SFrançois Tigeot #define MP_IOC_READ_15__data__SHIFT 0x0 1279*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_0__data_MASK 0xffffffff 1280*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_0__data__SHIFT 0x0 1281*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_1__data_MASK 0xffffffff 1282*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_1__data__SHIFT 0x0 1283*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_2__data_MASK 0xffffffff 1284*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_2__data__SHIFT 0x0 1285*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_3__data_MASK 0xffffffff 1286*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_3__data__SHIFT 0x0 1287*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_4__data_MASK 0xffffffff 1288*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_4__data__SHIFT 0x0 1289*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_5__data_MASK 0xffffffff 1290*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_5__data__SHIFT 0x0 1291*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_6__data_MASK 0xffffffff 1292*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_6__data__SHIFT 0x0 1293*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_7__data_MASK 0xffffffff 1294*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_7__data__SHIFT 0x0 1295*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_8__data_MASK 0xffffffff 1296*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_8__data__SHIFT 0x0 1297*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_9__data_MASK 0xffffffff 1298*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_9__data__SHIFT 0x0 1299*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_10__data_MASK 0xffffffff 1300*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_10__data__SHIFT 0x0 1301*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_11__data_MASK 0xffffffff 1302*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_11__data__SHIFT 0x0 1303*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_12__data_MASK 0xffffffff 1304*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_12__data__SHIFT 0x0 1305*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_13__data_MASK 0xffffffff 1306*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_13__data__SHIFT 0x0 1307*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_14__data_MASK 0xffffffff 1308*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_14__data__SHIFT 0x0 1309*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_15__data_MASK 0xffffffff 1310*c59a5c48SFrançois Tigeot #define MP_IOC_WRITE_15__data__SHIFT 0x0 1311*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MAX_CREDIT_VALUE_MASK 0x1f 1312*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MAX_CREDIT_VALUE__SHIFT 0x0 1313*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP0_SW_TRIG_MASK_MASK 0x20 1314*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP0_SW_TRIG_MASK__SHIFT 0x5 1315*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP0_SW_INT_ACK_MASK 0x40 1316*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP0_SW_INT_ACK__SHIFT 0x6 1317*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP1_SW_TRIG_MASK_MASK 0x80 1318*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP1_SW_TRIG_MASK__SHIFT 0x7 1319*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP1_SW_INT_ACK_MASK 0x100 1320*c59a5c48SFrançois Tigeot #define MP_INTERRUPT_CONTROL__MP1_SW_INT_ACK__SHIFT 0x8 1321*c59a5c48SFrançois Tigeot #define MP0_SW_INT__VALID_MASK 0x1 1322*c59a5c48SFrançois Tigeot #define MP0_SW_INT__VALID__SHIFT 0x0 1323*c59a5c48SFrançois Tigeot #define MP0_SW_INT__INT_ID_MASK 0x1fe 1324*c59a5c48SFrançois Tigeot #define MP0_SW_INT__INT_ID__SHIFT 0x1 1325*c59a5c48SFrançois Tigeot #define MP0_SW_INT_CTXID__CTXID_MASK 0xfffffff 1326*c59a5c48SFrançois Tigeot #define MP0_SW_INT_CTXID__CTXID__SHIFT 0x0 1327*c59a5c48SFrançois Tigeot #define MP1_SW_INT__VALID_MASK 0x1 1328*c59a5c48SFrançois Tigeot #define MP1_SW_INT__VALID__SHIFT 0x0 1329*c59a5c48SFrançois Tigeot #define MP1_SW_INT__INT_ID_MASK 0x1fe 1330*c59a5c48SFrançois Tigeot #define MP1_SW_INT__INT_ID__SHIFT 0x1 1331*c59a5c48SFrançois Tigeot #define MP1_SW_INT_CTXID__CTXID_MASK 0xfffffff 1332*c59a5c48SFrançois Tigeot #define MP1_SW_INT_CTXID__CTXID__SHIFT 0x0 1333*c59a5c48SFrançois Tigeot #define DISP_TIMER_ID__DISP_T0_INT_ID_MASK 0xff 1334*c59a5c48SFrançois Tigeot #define DISP_TIMER_ID__DISP_T0_INT_ID__SHIFT 0x0 1335*c59a5c48SFrançois Tigeot #define DISP_TIMER_ID__DISP_T1_INT_ID_MASK 0xff00 1336*c59a5c48SFrançois Tigeot #define DISP_TIMER_ID__DISP_T1_INT_ID__SHIFT 0x8 1337*c59a5c48SFrançois Tigeot #define PWRHW_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff 1338*c59a5c48SFrançois Tigeot #define PWRHW_SMC_IND_INDEX__SMC_IND_ADDR__SHIFT 0x0 1339*c59a5c48SFrançois Tigeot #define PWRHW_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff 1340*c59a5c48SFrançois Tigeot #define PWRHW_SMC_IND_DATA__SMC_IND_DATA__SHIFT 0x0 1341*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_PSTATE_ID_MASK 0x7 1342*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_PSTATE_ID__SHIFT 0x0 1343*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_DID_MASK 0x38 1344*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_DID__SHIFT 0x3 1345*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_FID_MASK 0xfc0 1346*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CURRENT_FID__SHIFT 0x6 1347*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CPU_COF_MASK 0xfff000 1348*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CPU_COF__SHIFT 0xc 1349*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CPU_COF_IND_PROG_MASK 0x7f000000 1350*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU0__CPU_COF_IND_PROG__SHIFT 0x18 1351*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_PSTATE_ID_MASK 0x7 1352*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_PSTATE_ID__SHIFT 0x0 1353*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_DID_MASK 0x38 1354*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_DID__SHIFT 0x3 1355*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_FID_MASK 0xfc0 1356*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CURRENT_FID__SHIFT 0x6 1357*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CPU_COF_MASK 0xfff000 1358*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CPU_COF__SHIFT 0xc 1359*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CPU_COF_IND_PROG_MASK 0x7f000000 1360*c59a5c48SFrançois Tigeot #define CURRENT_STATE_CPU1__CPU_COF_IND_PROG__SHIFT 0x18 1361*c59a5c48SFrançois Tigeot #define CPU_REDUN_DONE0__CPU_REDUN_DONE_MASK 0x1 1362*c59a5c48SFrançois Tigeot #define CPU_REDUN_DONE0__CPU_REDUN_DONE__SHIFT 0x0 1363*c59a5c48SFrançois Tigeot #define CPU_REDUN_DONE1__CPU_REDUN_DONE_MASK 0x1 1364*c59a5c48SFrançois Tigeot #define CPU_REDUN_DONE1__CPU_REDUN_DONE__SHIFT 0x0 1365*c59a5c48SFrançois Tigeot #define CURRENT_VID_CPU0__CURRENT_VID_MASK 0xff 1366*c59a5c48SFrançois Tigeot #define CURRENT_VID_CPU0__CURRENT_VID__SHIFT 0x0 1367*c59a5c48SFrançois Tigeot #define CURRENT_VID_CPU1__CURRENT_VID_MASK 0xff 1368*c59a5c48SFrançois Tigeot #define CURRENT_VID_CPU1__CURRENT_VID__SHIFT 0x0 1369*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUESTOR_CODE_MASK 0x1f 1370*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUESTOR_CODE__SHIFT 0x0 1371*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUEST_ACK_MASK 0x100 1372*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUEST_ACK__SHIFT 0x8 1373*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUEST_NACK_MASK 0x10000 1374*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__REQUEST_NACK__SHIFT 0x10 1375*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__ERROR_CODE_MASK 0xff000000 1376*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_ACK__ERROR_CODE__SHIFT 0x18 1377*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__CURRENT_FID_MASK 0xff 1378*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__CURRENT_FID__SHIFT 0x0 1379*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__CURRENT_DID_MASK 0xff00 1380*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__CURRENT_DID__SHIFT 0x8 1381*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__NB_LOW_POWER_MASK 0xff0000 1382*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__NB_LOW_POWER__SHIFT 0x10 1383*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__NB_STUTTER_MODE_MASK 0xff000000 1384*c59a5c48SFrançois Tigeot #define CURRENT_FREQ_STATE_NB__NB_STUTTER_MODE__SHIFT 0x18 1385*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_PSTATE_ID_MASK 0xff 1386*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_PSTATE_ID__SHIFT 0x0 1387*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_PSTATE_LO_MASK 0x100 1388*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_PSTATE_LO__SHIFT 0x8 1389*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_MEM_PSTATE_ID_MASK 0x200 1390*c59a5c48SFrançois Tigeot #define CURRENT_PSTATE_NB__CURRENT_MEM_PSTATE_ID__SHIFT 0x9 1391*c59a5c48SFrançois Tigeot #define UNBPM_MSG_INT_CONFIG__MSG_REG_TARGET_ADDR_MASK 0xffffffff 1392*c59a5c48SFrançois Tigeot #define UNBPM_MSG_INT_CONFIG__MSG_REG_TARGET_ADDR__SHIFT 0x0 1393*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__TARGET_BLOCK_MASK 0x3 1394*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__TARGET_BLOCK__SHIFT 0x0 1395*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__TARGET_CMD_MASK 0x100 1396*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__TARGET_CMD__SHIFT 0x8 1397*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__DCT_SR_MAP_MASK 0xff0000 1398*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__DCT_SR_MAP__SHIFT 0x10 1399*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__RETURN_NB_ACK_MASK 0x1000000 1400*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__RETURN_NB_ACK__SHIFT 0x18 1401*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__OVERRIDE_PARAMS_MASK 0x2000000 1402*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__OVERRIDE_PARAMS__SHIFT 0x19 1403*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__SET_NB_LOW_POWER_MASK 0x4000000 1404*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__SET_NB_LOW_POWER__SHIFT 0x1a 1405*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__SET_NB_STUTTER_MODE_MASK 0x8000000 1406*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_CMD__SET_NB_STUTTER_MODE__SHIFT 0x1b 1407*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_FSM_CFG__DIS_AUTO_PWRGATE_ON_EXIT_MASK 0x2 1408*c59a5c48SFrançois Tigeot #define UNBPM_NBPWRMGT_FSM_CFG__DIS_AUTO_PWRGATE_ON_EXIT__SHIFT 0x1 1409*c59a5c48SFrançois Tigeot #define DDR0_FUSE_SSB_XFER__START_STATUS_XFER_MASK 0x1 1410*c59a5c48SFrançois Tigeot #define DDR0_FUSE_SSB_XFER__START_STATUS_XFER__SHIFT 0x0 1411*c59a5c48SFrançois Tigeot #define DDR0_FUSE_SSB_XFER_CFG__FUSE_DDR0_LAST_ADDR_MASK 0x7ff 1412*c59a5c48SFrançois Tigeot #define DDR0_FUSE_SSB_XFER_CFG__FUSE_DDR0_LAST_ADDR__SHIFT 0x0 1413*c59a5c48SFrançois Tigeot #define DDR1_FUSE_SSB_XFER__START_STATUS_XFER_MASK 0x1 1414*c59a5c48SFrançois Tigeot #define DDR1_FUSE_SSB_XFER__START_STATUS_XFER__SHIFT 0x0 1415*c59a5c48SFrançois Tigeot #define DDR1_FUSE_SSB_XFER_CFG__FUSE_DDR1_LAST_ADDR_MASK 0x7ff 1416*c59a5c48SFrançois Tigeot #define DDR1_FUSE_SSB_XFER_CFG__FUSE_DDR1_LAST_ADDR__SHIFT 0x0 1417*c59a5c48SFrançois Tigeot #define UNBPM_FUSES_VAL_PWROK__CK_FUSES_VAL_PWROK_MASK 0x1 1418*c59a5c48SFrançois Tigeot #define UNBPM_FUSES_VAL_PWROK__CK_FUSES_VAL_PWROK__SHIFT 0x0 1419*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_CCLK_IS_FASTER0_MASK 0x1 1420*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_CCLK_IS_FASTER0__SHIFT 0x0 1421*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_CCLK_IS_FASTER1_MASK 0x2 1422*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_CCLK_IS_FASTER1__SHIFT 0x1 1423*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_NCLK_IS_FASTER0_MASK 0x4 1424*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_NCLK_IS_FASTER0__SHIFT 0x2 1425*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_NCLK_IS_FASTER1_MASK 0x8 1426*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_NCLK_IS_FASTER1__SHIFT 0x3 1427*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_SYNFIFO_ASYNC_EN0_MASK 0x10 1428*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_SYNFIFO_ASYNC_EN0__SHIFT 0x4 1429*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_SYNFIFO_ASYNC_EN1_MASK 0x20 1430*c59a5c48SFrançois Tigeot #define SYNFIFO_CLK_RATIO__CK_SYNFIFO_ASYNC_EN1__SHIFT 0x5 1431*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG0__TARGET_ADDR_MASK 0xffffffff 1432*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG0__TARGET_ADDR__SHIFT 0x0 1433*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__TIMER_EN_MASK 0x1 1434*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__TIMER_EN__SHIFT 0x0 1435*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__TIMER_INTERVAL_MASK 0x1fffe 1436*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__TIMER_INTERVAL__SHIFT 0x1 1437*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__INT_GEN_EN_MASK 0x20000 1438*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG1__INT_GEN_EN__SHIFT 0x11 1439*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__TIMER_EN_MASK 0x1 1440*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__TIMER_EN__SHIFT 0x0 1441*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__TIMER_INTERVAL_MASK 0x1fffe 1442*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__TIMER_INTERVAL__SHIFT 0x1 1443*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__INT_GEN_EN_MASK 0x20000 1444*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_CFG1__INT_GEN_EN__SHIFT 0x11 1445*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON_INB_WAKE_MASK 0x1 1446*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON_INB_WAKE__SHIFT 0x0 1447*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ALLOW_NB_PSTATES_MASK 0x2 1448*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ALLOW_NB_PSTATES__SHIFT 0x1 1449*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_FLUSH_REQ_TOGGLE_MASK 0x4 1450*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_FLUSH_REQ_TOGGLE__SHIFT 0x2 1451*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_CROSS_TRIGGER_MASK 0x78 1452*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_CROSS_TRIGGER__SHIFT 0x3 1453*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_STOP_CLOCKS_MASK 0x80 1454*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_STOP_CLOCKS__SHIFT 0x7 1455*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON3_CH0LINK_WAKE_MASK 0x100 1456*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON3_CH0LINK_WAKE__SHIFT 0x8 1457*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON3_CH1LINK_WAKE_MASK 0x200 1458*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_DATA__GN_ON3_CH1LINK_WAKE__SHIFT 0x9 1459*c59a5c48SFrançois Tigeot #define GN_GNB_SLOW__GN_GNB_SLOW_DATA_MASK 0x1 1460*c59a5c48SFrançois Tigeot #define GN_GNB_SLOW__GN_GNB_SLOW_DATA__SHIFT 0x0 1461*c59a5c48SFrançois Tigeot #define GN_FORCE_NBPS1__GN_FORCE_NBPS1_DATA_MASK 0x1 1462*c59a5c48SFrançois Tigeot #define GN_FORCE_NBPS1__GN_FORCE_NBPS1_DATA__SHIFT 0x0 1463*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_DATA__NB_NBPS_MASK 0x1 1464*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_DATA__NB_NBPS__SHIFT 0x0 1465*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_DATA__NB_MEMPS_MASK 0x2 1466*c59a5c48SFrançois Tigeot #define MISC_SMU_PWRMGT_DATA__NB_MEMPS__SHIFT 0x1 1467*c59a5c48SFrançois Tigeot #define NB_COF__NB_COF_MASK 0xffff 1468*c59a5c48SFrançois Tigeot #define NB_COF__NB_COF__SHIFT 0x0 1469*c59a5c48SFrançois Tigeot #define UNBPM_CK_IRESET__CK_IRESET_LOCAL_MASK 0x1 1470*c59a5c48SFrançois Tigeot #define UNBPM_CK_IRESET__CK_IRESET_LOCAL__SHIFT 0x0 1471*c59a5c48SFrançois Tigeot #define CURRENT_VID_NB__CURRENT_VID_MASK 0xff 1472*c59a5c48SFrançois Tigeot #define CURRENT_VID_NB__CURRENT_VID__SHIFT 0x0 1473*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue0_MASK 0xff 1474*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue0__SHIFT 0x0 1475*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue1_MASK 0xff00 1476*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue1__SHIFT 0x8 1477*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue2_MASK 0xff0000 1478*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue2__SHIFT 0x10 1479*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue3_MASK 0xff000000 1480*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR1__PwrValue3__SHIFT 0x18 1481*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrValue4_MASK 0xff 1482*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrValue4__SHIFT 0x0 1483*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv0_MASK 0x300 1484*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv0__SHIFT 0x8 1485*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv1_MASK 0xc00 1486*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv1__SHIFT 0xa 1487*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv2_MASK 0x3000 1488*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv2__SHIFT 0xc 1489*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv3_MASK 0xc000 1490*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv3__SHIFT 0xe 1491*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv4_MASK 0x30000 1492*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv4__SHIFT 0x10 1493*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv5_MASK 0xc0000 1494*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv5__SHIFT 0x12 1495*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv6_MASK 0x300000 1496*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv6__SHIFT 0x14 1497*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv7_MASK 0xc00000 1498*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__PwrDiv7__SHIFT 0x16 1499*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__Reserved_MASK 0xff000000 1500*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR2__Reserved__SHIFT 0x18 1501*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue5_MASK 0xff 1502*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue5__SHIFT 0x0 1503*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue6_MASK 0xff00 1504*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue6__SHIFT 0x8 1505*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue7_MASK 0xff0000 1506*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__PwrValue7__SHIFT 0x10 1507*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__Reserved_MASK 0xff000000 1508*c59a5c48SFrançois Tigeot #define SPR_FUSE_PSTATEPWR3__Reserved__SHIFT 0x18 1509*c59a5c48SFrançois Tigeot #define SPR_FUSE_THERMAL_SCRATCH__ThermalScratch_MASK 0xffffffff 1510*c59a5c48SFrançois Tigeot #define SPR_FUSE_THERMAL_SCRATCH__ThermalScratch__SHIFT 0x0 1511*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__BrandId_MASK 0xffff 1512*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__BrandId__SHIFT 0x0 1513*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__Reserved0_MASK 0x70000 1514*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__Reserved0__SHIFT 0x10 1515*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__SerialNumRdDis_MASK 0x80000 1516*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__SerialNumRdDis__SHIFT 0x13 1517*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__Reserved1_MASK 0xfff00000 1518*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO0__Reserved1__SHIFT 0x14 1519*c59a5c48SFrançois Tigeot #define SPR_SERIALNUM_REG1__SPR_SERIALNUM_REG1_MASK 0xffffffff 1520*c59a5c48SFrançois Tigeot #define SPR_SERIALNUM_REG1__SPR_SERIALNUM_REG1__SHIFT 0x0 1521*c59a5c48SFrançois Tigeot #define SPR_SERIALNUM_REG2__SPR_SERIALNUM_REG2_MASK 0xffffffff 1522*c59a5c48SFrançois Tigeot #define SPR_SERIALNUM_REG2__SPR_SERIALNUM_REG2__SHIFT 0x0 1523*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtMode_MASK 0x1 1524*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtMode__SHIFT 0x0 1525*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg0_MASK 0x3e 1526*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg0__SHIFT 0x1 1527*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg1_MASK 0x3fc0 1528*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg1__SHIFT 0x6 1529*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg2_MASK 0xc000 1530*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg2__SHIFT 0xe 1531*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg3_MASK 0x10000 1532*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg3__SHIFT 0x10 1533*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg4_MASK 0x1e0000 1534*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__DiDtCfg4__SHIFT 0x11 1535*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__Reserved_MASK 0xffe00000 1536*c59a5c48SFrançois Tigeot #define SPR_PRODUCT_INFO1__Reserved__SHIFT 0x15 1537*c59a5c48SFrançois Tigeot #define SPR_EXT_PRODUCT_INFO__Reserved_MASK 0xffffffff 1538*c59a5c48SFrançois Tigeot #define SPR_EXT_PRODUCT_INFO__Reserved__SHIFT 0x0 1539*c59a5c48SFrançois Tigeot #define SPR_MSIDFUSE__MSID_MASK 0xffffff 1540*c59a5c48SFrançois Tigeot #define SPR_MSIDFUSE__MSID__SHIFT 0x0 1541*c59a5c48SFrançois Tigeot #define SPR_MSIDFUSE__Reserved_MASK 0xff000000 1542*c59a5c48SFrançois Tigeot #define SPR_MSIDFUSE__Reserved__SHIFT 0x18 1543*c59a5c48SFrançois Tigeot #define SPR_LINK_PRODUCT_INFO__Reserved_MASK 0xffffffff 1544*c59a5c48SFrançois Tigeot #define SPR_LINK_PRODUCT_INFO__Reserved__SHIFT 0x0 1545*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_ADDR__Index_MASK 0xf 1546*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_ADDR__Index__SHIFT 0x0 1547*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_ADDR__Reserved_MASK 0xfffffff0 1548*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_ADDR__Reserved__SHIFT 0x4 1549*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_DATA__DATA_MASK 0xffffffff 1550*c59a5c48SFrançois Tigeot #define SPR_BRAND_NAME_DATA__DATA__SHIFT 0x0 1551*c59a5c48SFrançois Tigeot #define SPR_COMBO_PHY_PRODUCT_INFO__SPR_COMBO_PHY_PRODUCT_INFO_MASK 0xffffffff 1552*c59a5c48SFrançois Tigeot #define SPR_COMBO_PHY_PRODUCT_INFO__SPR_COMBO_PHY_PRODUCT_INFO__SHIFT 0x0 1553*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG0__TARGET_ADDR_MASK 0xffffffff 1554*c59a5c48SFrançois Tigeot #define MISC_GNB_PWRMGT_CFG0__TARGET_ADDR__SHIFT 0x0 1555*c59a5c48SFrançois Tigeot #define UNBPM_EXIT_TO_PSTATE__EXIT_TO_PSTATE_MASK 0x1 1556*c59a5c48SFrançois Tigeot #define UNBPM_EXIT_TO_PSTATE__EXIT_TO_PSTATE__SHIFT 0x0 1557*c59a5c48SFrançois Tigeot #define UNBPM_WARM_RESET_HS_STATUS__NB_CSTATE_ACTIVE_MASK 0x1 1558*c59a5c48SFrançois Tigeot #define UNBPM_WARM_RESET_HS_STATUS__NB_CSTATE_ACTIVE__SHIFT 0x0 1559*c59a5c48SFrançois Tigeot #define UNBPM_WARM_RESET_HS_STATUS__WARM_RESET_HS_DONE_MASK 0x2 1560*c59a5c48SFrançois Tigeot #define UNBPM_WARM_RESET_HS_STATUS__WARM_RESET_HS_DONE__SHIFT 0x1 1561*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_CNTL__VOLTAGE_EN_MASK 0x1 1562*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_CNTL__VOLTAGE_EN__SHIFT 0x0 1563*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_CNTL__VOLTAGE_LEVEL_MASK 0x1fe 1564*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_CNTL__VOLTAGE_LEVEL__SHIFT 0x1 1565*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_STATUS__VOLTAGE_STATUS_MASK 0x1 1566*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_STATUS__VOLTAGE_STATUS__SHIFT 0x0 1567*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_STATUS__VOLTAGE_CURRENT_LEVEL_MASK 0x1fe 1568*c59a5c48SFrançois Tigeot #define UNBPM_VOLTAGE_STATUS__VOLTAGE_CURRENT_LEVEL__SHIFT 0x1 1569*c59a5c48SFrançois Tigeot #define NUM_BOOST_STATES__NUM_BOOST_STATES_MASK 0x7 1570*c59a5c48SFrançois Tigeot #define NUM_BOOST_STATES__NUM_BOOST_STATES__SHIFT 0x0 1571*c59a5c48SFrançois Tigeot #define WARM_RESET_NB_CONTROL__WARM_RESET_CPU_VID_MASK 0xff 1572*c59a5c48SFrançois Tigeot #define WARM_RESET_NB_CONTROL__WARM_RESET_CPU_VID__SHIFT 0x0 1573*c59a5c48SFrançois Tigeot #define WARM_RESET_NB_CONTROL__NB_DISABLE_CORE_MASK 0xff00 1574*c59a5c48SFrançois Tigeot #define WARM_RESET_NB_CONTROL__NB_DISABLE_CORE__SHIFT 0x8 1575*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION_NO_STREAMS_PEND_MASK 0x1 1576*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION_NO_STREAMS_PEND__SHIFT 0x0 1577*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION3_NO_STREAMS_PEND_0_MASK 0x2 1578*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION3_NO_STREAMS_PEND_0__SHIFT 0x1 1579*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION3_NO_STREAMS_PEND_1_MASK 0x4 1580*c59a5c48SFrançois Tigeot #define ONION_NO_STREAMS_PEND__ONION3_NO_STREAMS_PEND_1__SHIFT 0x2 1581*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__PllRegUpTime_MASK 0x3 1582*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__PllRegUpTime__SHIFT 0x0 1583*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__PllVddOutUpTime_MASK 0xc 1584*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__PllVddOutUpTime__SHIFT 0x2 1585*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__ResonanceTime_MASK 0x30 1586*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__ResonanceTime__SHIFT 0x4 1587*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__C6PLLPwrDnReg_MASK 0x40 1588*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__C6PLLPwrDnReg__SHIFT 0x6 1589*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__CC6PLLPwrDnVCO_MASK 0x80 1590*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__CC6PLLPwrDnVCO__SHIFT 0x7 1591*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__CC6PLLPwrDnReg_MASK 0x100 1592*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__CC6PLLPwrDnReg__SHIFT 0x8 1593*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__NbPLLPwrDnReg_MASK 0x200 1594*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__NbPLLPwrDnReg__SHIFT 0x9 1595*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__SOIWait_MASK 0x3c00 1596*c59a5c48SFrançois Tigeot #define SPR_PROGRAMMABLE_CTRL__SOIWait__SHIFT 0xa 1597*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__Spare_MASK 0xff 1598*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__Spare__SHIFT 0x0 1599*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__OverClockRefClkDis_MASK 0x100 1600*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__OverClockRefClkDis__SHIFT 0x8 1601*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__MemPstate_MASK 0x1e00 1602*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__MemPstate__SHIFT 0x9 1603*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__NbPstateHi_MASK 0x6000 1604*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__NbPstateHi__SHIFT 0xd 1605*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__NbPstateLo_MASK 0x18000 1606*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__NbPstateLo__SHIFT 0xf 1607*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__ScanCLK400MHz_MASK 0x20000 1608*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__ScanCLK400MHz__SHIFT 0x11 1609*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__CoreDis_MASK 0x3c0000 1610*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__CoreDis__SHIFT 0x12 1611*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__PHN_FusesValid_MASK 0x80000000 1612*c59a5c48SFrançois Tigeot #define PHN_FUSERX_MISC_FUSES__PHN_FusesValid__SHIFT 0x1f 1613*c59a5c48SFrançois Tigeot #define UNBPM_PWRCTRL_MISC__PWRGATEMASTERDIS_MASK 0x1 1614*c59a5c48SFrançois Tigeot #define UNBPM_PWRCTRL_MISC__PWRGATEMASTERDIS__SHIFT 0x0 1615*c59a5c48SFrançois Tigeot #define CSTATE_ACTIVE_SAMPLER__SAMPLE_TIME_MASK 0x1f 1616*c59a5c48SFrançois Tigeot #define CSTATE_ACTIVE_SAMPLER__SAMPLE_TIME__SHIFT 0x0 1617*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_QOS_MASK 0xf 1618*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_QOS__SHIFT 0x0 1619*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__FIFO_BUFF_FLUSH_MASK 0x10 1620*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__FIFO_BUFF_FLUSH__SHIFT 0x4 1621*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__MASTER_DEBUG_EN_MASK 0x20 1622*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__MASTER_DEBUG_EN__SHIFT 0x5 1623*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_ACTIVE_MASK 0x100 1624*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_ACTIVE__SHIFT 0x8 1625*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_BUSY_MASK 0x200 1626*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__AXI_MASTER_BUSY__SHIFT 0x9 1627*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__FIFO_DATA_COUNT_MASK 0x3c00 1628*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__FIFO_DATA_COUNT__SHIFT 0xa 1629*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__MST_OUTSTANDING_TRANS_MASK 0xff0000 1630*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_CONFIG_STATUS__MST_OUTSTANDING_TRANS__SHIFT 0x10 1631*c59a5c48SFrançois Tigeot #define UNBPM_AXIMST_LAST_CMD__AXI_MASTER_LAST_CMD_MASK 0xffffffff 1632*c59a5c48SFrançois Tigeot #define UNBPM_AXIMST_LAST_CMD__AXI_MASTER_LAST_CMD__SHIFT 0x0 1633*c59a5c48SFrançois Tigeot #define UNB_IF_INTRGEN_LAST_SENT__GNBPM_LAST_DATA_SENT_MASK 0xffff 1634*c59a5c48SFrançois Tigeot #define UNB_IF_INTRGEN_LAST_SENT__GNBPM_LAST_DATA_SENT__SHIFT 0x0 1635*c59a5c48SFrançois Tigeot #define UNB_IF_INTRGEN_LAST_SENT__SMUPM_LAST_DATA_SENT_MASK 0xffff0000 1636*c59a5c48SFrançois Tigeot #define UNB_IF_INTRGEN_LAST_SENT__SMUPM_LAST_DATA_SENT__SHIFT 0x10 1637*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_BUS_CNTL__DEBUG_BUS_LOGGING_EN_MASK 0x1 1638*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_BUS_CNTL__DEBUG_BUS_LOGGING_EN__SHIFT 0x0 1639*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_BUS_CNTL__DEBUG_BUS_CYCLE_NUM_MASK 0x1fe 1640*c59a5c48SFrançois Tigeot #define UNBPM_DEBUG_BUS_CNTL__DEBUG_BUS_CYCLE_NUM__SHIFT 0x1 1641*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNb_MASK 0x1 1642*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNb__SHIFT 0x0 1643*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqDct_MASK 0x6 1644*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqDct__SHIFT 0x1 1645*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpu_MASK 0x38 1646*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpu__SHIFT 0x3 1647*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuPwrTog_MASK 0x40 1648*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuPwrTog__SHIFT 0x6 1649*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNbPstateLo_MASK 0x80 1650*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNbPstateLo__SHIFT 0x7 1651*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNbMemPstate_MASK 0x100 1652*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqNbMemPstate__SHIFT 0x8 1653*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuNbFid_MASK 0x7e00 1654*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuNbFid__SHIFT 0x9 1655*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqDid_MASK 0x38000 1656*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqDid__SHIFT 0xf 1657*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqPstate_MASK 0x40000 1658*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqPstate__SHIFT 0x12 1659*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqPstateId_MASK 0x380000 1660*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqPstateId__SHIFT 0x13 1661*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqGateEn_MASK 0x400000 1662*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqGateEn__SHIFT 0x16 1663*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuPrbEn_MASK 0x800000 1664*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NB_PwrMgtReqCpuPrbEn__SHIFT 0x17 1665*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NbPwrMgtReqOutstanding_MASK 0x7000000 1666*c59a5c48SFrançois Tigeot #define UNBPM_PWRMGT_REQ_DBG_STATUS__NbPwrMgtReqOutstanding__SHIFT 0x18 1667*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidChgZeroVid_MASK 0x1 1668*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidChgZeroVid__SHIFT 0x0 1669*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidPlane_MASK 0x6 1670*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidPlane__SHIFT 0x1 1671*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidChgRamp_MASK 0x8 1672*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VidChgRamp__SHIFT 0x3 1673*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_Vid_MASK 0xff0 1674*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_Vid__SHIFT 0x4 1675*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VSTime_MASK 0x7000 1676*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__NB_VSTime__SHIFT 0xc 1677*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__CK_VidChgBusy_MASK 0x10000 1678*c59a5c48SFrançois Tigeot #define UNBPM_VIDCHG_REQ_DBG_STATUS__CK_VidChgBusy__SHIFT 0x10 1679*c59a5c48SFrançois Tigeot #define UNBPM_SCRATCH_0__DATA_MASK 0xffffffff 1680*c59a5c48SFrançois Tigeot #define UNBPM_SCRATCH_0__DATA__SHIFT 0x0 1681*c59a5c48SFrançois Tigeot #define UNBPM_SCRATCH_1__DATA_MASK 0xffffffff 1682*c59a5c48SFrançois Tigeot #define UNBPM_SCRATCH_1__DATA__SHIFT 0x0 1683*c59a5c48SFrançois Tigeot #define POWERON_CPU_0__POWERON_MASK 0x1 1684*c59a5c48SFrançois Tigeot #define POWERON_CPU_0__POWERON__SHIFT 0x0 1685*c59a5c48SFrançois Tigeot #define POWERREADY_CPU_0__POWERREADY_MASK 0x1 1686*c59a5c48SFrançois Tigeot #define POWERREADY_CPU_0__POWERREADY__SHIFT 0x0 1687*c59a5c48SFrançois Tigeot #define PGRUNFEEDBACK_CPU_0__PG_RUNFEEDBACK_MASK 0x1 1688*c59a5c48SFrançois Tigeot #define PGRUNFEEDBACK_CPU_0__PG_RUNFEEDBACK__SHIFT 0x0 1689*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__CK_RCC3ON_MASK 0x1 1690*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__CK_RCC3ON__SHIFT 0x0 1691*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_PSM_EN_MASK 0x2 1692*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_PSM_EN__SHIFT 0x1 1693*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_PSM_CLK_DIV_MASK 0xc 1694*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_PSM_CLK_DIV__SHIFT 0x2 1695*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_AVG_EN_MASK 0x10 1696*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_AVG_EN__SHIFT 0x4 1697*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_AVG_DIV_MASK 0x7e0 1698*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_AVG_DIV__SHIFT 0x5 1699*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_DIDT_TIMER_MASK 0x1f800 1700*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_DIDT_TIMER__SHIFT 0xb 1701*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_WAKE_MIN_14_0_MASK 0xfffe0000 1702*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_0__RCC3_WAKE_MIN_14_0__SHIFT 0x11 1703*c59a5c48SFrançois Tigeot #define RCC3EXITDONE_CPU_0__RCC3EXITDONE_MASK 0x1 1704*c59a5c48SFrançois Tigeot #define RCC3EXITDONE_CPU_0__RCC3EXITDONE__SHIFT 0x0 1705*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_0__START_STATUS_XFER_MASK 0x1 1706*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_0__START_STATUS_XFER__SHIFT 0x0 1707*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_FUNC_LAST_ADDR_MASK 0x7ff 1708*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_FUNC_LAST_ADDR__SHIFT 0x0 1709*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_LATE_LAST_ADDR_MASK 0x7ff0000 1710*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_0__FUSE_LATE_LAST_ADDR__SHIFT 0x10 1711*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_0__START_STATUS_XFER_MASK 0x1 1712*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_0__START_STATUS_XFER__SHIFT 0x0 1713*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_CFG_0__FUSE_REDUN_LAST_ADDR_MASK 0x7ff 1714*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_CFG_0__FUSE_REDUN_LAST_ADDR__SHIFT 0x0 1715*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_0__START_STATUS_XFER_MASK 0x1 1716*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_0__START_STATUS_XFER__SHIFT 0x0 1717*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_CFG_0__FUSE_APM_LAST_ADDR_MASK 0x7ff 1718*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_CFG_0__FUSE_APM_LAST_ADDR__SHIFT 0x0 1719*c59a5c48SFrançois Tigeot #define COREPM_PWRCTRL_MISC_0__PWRGATEMASTERDIS_MASK 0x1 1720*c59a5c48SFrançois Tigeot #define COREPM_PWRCTRL_MISC_0__PWRGATEMASTERDIS__SHIFT 0x0 1721*c59a5c48SFrançois Tigeot #define LDOIVRON_CPU_0__CK_LDOIVRON_MASK 0x1 1722*c59a5c48SFrançois Tigeot #define LDOIVRON_CPU_0__CK_LDOIVRON__SHIFT 0x0 1723*c59a5c48SFrançois Tigeot #define LDOIVREXITDONE_CPU_0__LDOIVREXITDONE_MASK 0x1 1724*c59a5c48SFrançois Tigeot #define LDOIVREXITDONE_CPU_0__LDOIVREXITDONE__SHIFT 0x0 1725*c59a5c48SFrançois Tigeot #define RCC3_TARGETPSMREF_CPU_0__RCC3_TARGETPSMREF_MASK 0x3fff 1726*c59a5c48SFrançois Tigeot #define RCC3_TARGETPSMREF_CPU_0__RCC3_TARGETPSMREF__SHIFT 0x0 1727*c59a5c48SFrançois Tigeot #define IVR_TARGETPSMREF_CPU_0__IVR_TARGETPSMREF_MASK 0x3fff 1728*c59a5c48SFrançois Tigeot #define IVR_TARGETPSMREF_CPU_0__IVR_TARGETPSMREF__SHIFT 0x0 1729*c59a5c48SFrançois Tigeot #define CK_JTCOOLRESET_LATCHED_CPU_0__CK_JTCOOLRESET_LATCHED_MASK 0x1 1730*c59a5c48SFrançois Tigeot #define CK_JTCOOLRESET_LATCHED_CPU_0__CK_JTCOOLRESET_LATCHED__SHIFT 0x0 1731*c59a5c48SFrançois Tigeot #define CK_DISABLECORE_CPU_0__CK_DISABLECORE_MASK 0x1 1732*c59a5c48SFrançois Tigeot #define CK_DISABLECORE_CPU_0__CK_DISABLECORE__SHIFT 0x0 1733*c59a5c48SFrançois Tigeot #define COREPM_ID_0__COREPM_INDEX_MASK 0x1 1734*c59a5c48SFrançois Tigeot #define COREPM_ID_0__COREPM_INDEX__SHIFT 0x0 1735*c59a5c48SFrançois Tigeot #define COREPM_SCRATCH_0__SCRATCH_DATA_MASK 0xffffffff 1736*c59a5c48SFrançois Tigeot #define COREPM_SCRATCH_0__SCRATCH_DATA__SHIFT 0x0 1737*c59a5c48SFrançois Tigeot #define RCC3_WAKEMIN_CPU_0__RCC3_WAKE_MIN_46_15_MASK 0xffffffff 1738*c59a5c48SFrançois Tigeot #define RCC3_WAKEMIN_CPU_0__RCC3_WAKE_MIN_46_15__SHIFT 0x0 1739*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_ENABLE_MASK 0x1 1740*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_ENABLE__SHIFT 0x0 1741*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_NUM_TIMING_FLOPS_MASK 0x7c 1742*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_NUM_TIMING_FLOPS__SHIFT 0x2 1743*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_SIGNALING_DELAY_CYCLES_MASK 0xf80 1744*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_SIGNALING_DELAY_CYCLES__SHIFT 0x7 1745*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_SIGNALING_HOLD_CYCLES_MASK 0x1f000 1746*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_SIGNALING_HOLD_CYCLES__SHIFT 0xc 1747*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_ENABLE_DELAY_CYCLES_MASK 0x3e0000 1748*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_ENABLE_DELAY_CYCLES__SHIFT 0x11 1749*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_DISABLE_DELAY_CYCLES_MASK 0x7c00000 1750*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_0__SPMI_PATH_DISABLE_DELAY_CYCLES__SHIFT 0x16 1751*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_0__SPMI_SIGNALING_RESET_HOLD_CYCLES_MASK 0x1f 1752*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_0__SPMI_SIGNALING_RESET_HOLD_CYCLES__SHIFT 0x0 1753*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_0__SPMI_CHAIN_SIZE_MASK 0xffe0 1754*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_0__SPMI_CHAIN_SIZE__SHIFT 0x5 1755*c59a5c48SFrançois Tigeot #define SPMI_FSM_READ_TRIGGER_0__FSM_READ_TRIGGER_MASK 0x1 1756*c59a5c48SFrançois Tigeot #define SPMI_FSM_READ_TRIGGER_0__FSM_READ_TRIGGER__SHIFT 0x0 1757*c59a5c48SFrançois Tigeot #define SPMI_FSM_WRITE_TRIGGER_0__FSM_WRITE_TRIGGER_MASK 0x1 1758*c59a5c48SFrançois Tigeot #define SPMI_FSM_WRITE_TRIGGER_0__FSM_WRITE_TRIGGER__SHIFT 0x0 1759*c59a5c48SFrançois Tigeot #define SPMI_FSM_RESET_TRIGGER_0__FSM_RESET_TRIGGER_MASK 0x1 1760*c59a5c48SFrançois Tigeot #define SPMI_FSM_RESET_TRIGGER_0__FSM_RESET_TRIGGER__SHIFT 0x0 1761*c59a5c48SFrançois Tigeot #define SPMI_FSM_BUSY_0__FSM_BUSY_MASK 0x1 1762*c59a5c48SFrançois Tigeot #define SPMI_FSM_BUSY_0__FSM_BUSY__SHIFT 0x0 1763*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_REQ_MASK 0x1 1764*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_REQ__SHIFT 0x0 1765*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_ACK_MASK 0x2 1766*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_ACK__SHIFT 0x1 1767*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_REQ_auto_clear_MASK 0x10 1768*c59a5c48SFrançois Tigeot #define SPMI_PATH_0__PATH_ENABLE_REQ_auto_clear__SHIFT 0x4 1769*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_C6_STATE_ENTERED_MASK 0x1 1770*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_C6_STATE_ENTERED__SHIFT 0x0 1771*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_C6_STATE_ENTERED_WHEN_FSM_BUSY_MASK 0x2 1772*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_C6_STATE_ENTERED_WHEN_FSM_BUSY__SHIFT 0x1 1773*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_COUNTER_ADDRESS_C6_MASK 0xfffc 1774*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_0__SPMI_IF_COUNTER_ADDRESS_C6__SHIFT 0x2 1775*c59a5c48SFrançois Tigeot #define SPMI_JTAG_OVER_0__SPMI_IF_JTAG_OVER_HAPPENED_MASK 0x1 1776*c59a5c48SFrançois Tigeot #define SPMI_JTAG_OVER_0__SPMI_IF_JTAG_OVER_HAPPENED__SHIFT 0x0 1777*c59a5c48SFrançois Tigeot #define SPMI_SRAM_ADDRESS_0__SRAM_ADDRESS_MASK 0xffffffff 1778*c59a5c48SFrançois Tigeot #define SPMI_SRAM_ADDRESS_0__SRAM_ADDRESS__SHIFT 0x0 1779*c59a5c48SFrançois Tigeot #define SPMI_SRAM_DATA_0__SRAM_DATA_MASK 0xffffffff 1780*c59a5c48SFrançois Tigeot #define SPMI_SRAM_DATA_0__SRAM_DATA__SHIFT 0x0 1781*c59a5c48SFrançois Tigeot #define SPMI_RESET_0__ASYNC_RESET_0_MASK 0x1 1782*c59a5c48SFrançois Tigeot #define SPMI_RESET_0__ASYNC_RESET_0__SHIFT 0x0 1783*c59a5c48SFrançois Tigeot #define SPMI_RESET_0__SYNC_RESET_MASK 0x80000000 1784*c59a5c48SFrançois Tigeot #define SPMI_RESET_0__SYNC_RESET__SHIFT 0x1f 1785*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_0__CLOCK_GATER_0_FORCE_MASK 0x1 1786*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_0__CLOCK_GATER_0_FORCE__SHIFT 0x0 1787*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_0__SRAM_CLOCK_GATER_FORCE_MASK 0x100 1788*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_0__SRAM_CLOCK_GATER_FORCE__SHIFT 0x8 1789*c59a5c48SFrançois Tigeot #define SPMI_SPARE_0__SPARE_DATA_MASK 0xffffffff 1790*c59a5c48SFrançois Tigeot #define SPMI_SPARE_0__SPARE_DATA__SHIFT 0x0 1791*c59a5c48SFrançois Tigeot #define SPMI_SPARE_EX_0__SPARE_DATA_EX_MASK 0xffffffff 1792*c59a5c48SFrançois Tigeot #define SPMI_SPARE_EX_0__SPARE_DATA_EX__SHIFT 0x0 1793*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_0__SRAM_CLK_GATER_EN_MASK 0x1 1794*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_0__SRAM_CLK_GATER_EN__SHIFT 0x0 1795*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_0__SRAM_CLK_GATER_TIMER_MASK 0x7fe 1796*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_0__SRAM_CLK_GATER_TIMER__SHIFT 0x1 1797*c59a5c48SFrançois Tigeot #define POWERON_CPU_1__POWERON_MASK 0x1 1798*c59a5c48SFrançois Tigeot #define POWERON_CPU_1__POWERON__SHIFT 0x0 1799*c59a5c48SFrançois Tigeot #define POWERREADY_CPU_1__POWERREADY_MASK 0x1 1800*c59a5c48SFrançois Tigeot #define POWERREADY_CPU_1__POWERREADY__SHIFT 0x0 1801*c59a5c48SFrançois Tigeot #define PGRUNFEEDBACK_CPU_1__PG_RUNFEEDBACK_MASK 0x1 1802*c59a5c48SFrançois Tigeot #define PGRUNFEEDBACK_CPU_1__PG_RUNFEEDBACK__SHIFT 0x0 1803*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__CK_RCC3ON_MASK 0x1 1804*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__CK_RCC3ON__SHIFT 0x0 1805*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_PSM_EN_MASK 0x2 1806*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_PSM_EN__SHIFT 0x1 1807*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_PSM_CLK_DIV_MASK 0xc 1808*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_PSM_CLK_DIV__SHIFT 0x2 1809*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_AVG_EN_MASK 0x10 1810*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_AVG_EN__SHIFT 0x4 1811*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_AVG_DIV_MASK 0x7e0 1812*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_AVG_DIV__SHIFT 0x5 1813*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_DIDT_TIMER_MASK 0x1f800 1814*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_DIDT_TIMER__SHIFT 0xb 1815*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_WAKE_MIN_14_0_MASK 0xfffe0000 1816*c59a5c48SFrançois Tigeot #define RCC3ON_CPU_1__RCC3_WAKE_MIN_14_0__SHIFT 0x11 1817*c59a5c48SFrançois Tigeot #define RCC3EXITDONE_CPU_1__RCC3EXITDONE_MASK 0x1 1818*c59a5c48SFrançois Tigeot #define RCC3EXITDONE_CPU_1__RCC3EXITDONE__SHIFT 0x0 1819*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_1__START_STATUS_XFER_MASK 0x1 1820*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_1__START_STATUS_XFER__SHIFT 0x0 1821*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_FUNC_LAST_ADDR_MASK 0x7ff 1822*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_FUNC_LAST_ADDR__SHIFT 0x0 1823*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_LATE_LAST_ADDR_MASK 0x7ff0000 1824*c59a5c48SFrançois Tigeot #define CORE_FUNC_LATE_SSB_XFER_CFG_1__FUSE_LATE_LAST_ADDR__SHIFT 0x10 1825*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_1__START_STATUS_XFER_MASK 0x1 1826*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_1__START_STATUS_XFER__SHIFT 0x0 1827*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_CFG_1__FUSE_REDUN_LAST_ADDR_MASK 0x7ff 1828*c59a5c48SFrançois Tigeot #define CORE_REDUN_SSB_XFER_CFG_1__FUSE_REDUN_LAST_ADDR__SHIFT 0x0 1829*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_1__START_STATUS_XFER_MASK 0x1 1830*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_1__START_STATUS_XFER__SHIFT 0x0 1831*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_CFG_1__FUSE_APM_LAST_ADDR_MASK 0x7ff 1832*c59a5c48SFrançois Tigeot #define CORE_APM_SSB_XFER_CFG_1__FUSE_APM_LAST_ADDR__SHIFT 0x0 1833*c59a5c48SFrançois Tigeot #define COREPM_PWRCTRL_MISC_1__PWRGATEMASTERDIS_MASK 0x1 1834*c59a5c48SFrançois Tigeot #define COREPM_PWRCTRL_MISC_1__PWRGATEMASTERDIS__SHIFT 0x0 1835*c59a5c48SFrançois Tigeot #define LDOIVRON_CPU_1__CK_LDOIVRON_MASK 0x1 1836*c59a5c48SFrançois Tigeot #define LDOIVRON_CPU_1__CK_LDOIVRON__SHIFT 0x0 1837*c59a5c48SFrançois Tigeot #define LDOIVREXITDONE_CPU_1__LDOIVREXITDONE_MASK 0x1 1838*c59a5c48SFrançois Tigeot #define LDOIVREXITDONE_CPU_1__LDOIVREXITDONE__SHIFT 0x0 1839*c59a5c48SFrançois Tigeot #define RCC3_TARGETPSMREF_CPU_1__RCC3_TARGETPSMREF_MASK 0x3fff 1840*c59a5c48SFrançois Tigeot #define RCC3_TARGETPSMREF_CPU_1__RCC3_TARGETPSMREF__SHIFT 0x0 1841*c59a5c48SFrançois Tigeot #define IVR_TARGETPSMREF_CPU_1__IVR_TARGETPSMREF_MASK 0x3fff 1842*c59a5c48SFrançois Tigeot #define IVR_TARGETPSMREF_CPU_1__IVR_TARGETPSMREF__SHIFT 0x0 1843*c59a5c48SFrançois Tigeot #define CK_JTCOOLRESET_LATCHED_CPU_1__CK_JTCOOLRESET_LATCHED_MASK 0x1 1844*c59a5c48SFrançois Tigeot #define CK_JTCOOLRESET_LATCHED_CPU_1__CK_JTCOOLRESET_LATCHED__SHIFT 0x0 1845*c59a5c48SFrançois Tigeot #define CK_DISABLECORE_CPU_1__CK_DISABLECORE_MASK 0x1 1846*c59a5c48SFrançois Tigeot #define CK_DISABLECORE_CPU_1__CK_DISABLECORE__SHIFT 0x0 1847*c59a5c48SFrançois Tigeot #define COREPM_ID_1__COREPM_INDEX_MASK 0x1 1848*c59a5c48SFrançois Tigeot #define COREPM_ID_1__COREPM_INDEX__SHIFT 0x0 1849*c59a5c48SFrançois Tigeot #define COREPM_SCRATCH_1__SCRATCH_DATA_MASK 0xffffffff 1850*c59a5c48SFrançois Tigeot #define COREPM_SCRATCH_1__SCRATCH_DATA__SHIFT 0x0 1851*c59a5c48SFrançois Tigeot #define RCC3_WAKEMIN_CPU_1__RCC3_WAKE_MIN_46_15_MASK 0xffffffff 1852*c59a5c48SFrançois Tigeot #define RCC3_WAKEMIN_CPU_1__RCC3_WAKE_MIN_46_15__SHIFT 0x0 1853*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_ENABLE_MASK 0x1 1854*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_ENABLE__SHIFT 0x0 1855*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_NUM_TIMING_FLOPS_MASK 0x7c 1856*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_NUM_TIMING_FLOPS__SHIFT 0x2 1857*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_SIGNALING_DELAY_CYCLES_MASK 0xf80 1858*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_SIGNALING_DELAY_CYCLES__SHIFT 0x7 1859*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_SIGNALING_HOLD_CYCLES_MASK 0x1f000 1860*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_SIGNALING_HOLD_CYCLES__SHIFT 0xc 1861*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_ENABLE_DELAY_CYCLES_MASK 0x3e0000 1862*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_ENABLE_DELAY_CYCLES__SHIFT 0x11 1863*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_DISABLE_DELAY_CYCLES_MASK 0x7c00000 1864*c59a5c48SFrançois Tigeot #define SPMI_CONFIG0_1__SPMI_PATH_DISABLE_DELAY_CYCLES__SHIFT 0x16 1865*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_1__SPMI_SIGNALING_RESET_HOLD_CYCLES_MASK 0x1f 1866*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_1__SPMI_SIGNALING_RESET_HOLD_CYCLES__SHIFT 0x0 1867*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_1__SPMI_CHAIN_SIZE_MASK 0xffe0 1868*c59a5c48SFrançois Tigeot #define SPMI_CONFIG1_1__SPMI_CHAIN_SIZE__SHIFT 0x5 1869*c59a5c48SFrançois Tigeot #define SPMI_FSM_READ_TRIGGER_1__FSM_READ_TRIGGER_MASK 0x1 1870*c59a5c48SFrançois Tigeot #define SPMI_FSM_READ_TRIGGER_1__FSM_READ_TRIGGER__SHIFT 0x0 1871*c59a5c48SFrançois Tigeot #define SPMI_FSM_WRITE_TRIGGER_1__FSM_WRITE_TRIGGER_MASK 0x1 1872*c59a5c48SFrançois Tigeot #define SPMI_FSM_WRITE_TRIGGER_1__FSM_WRITE_TRIGGER__SHIFT 0x0 1873*c59a5c48SFrançois Tigeot #define SPMI_FSM_RESET_TRIGGER_1__FSM_RESET_TRIGGER_MASK 0x1 1874*c59a5c48SFrançois Tigeot #define SPMI_FSM_RESET_TRIGGER_1__FSM_RESET_TRIGGER__SHIFT 0x0 1875*c59a5c48SFrançois Tigeot #define SPMI_FSM_BUSY_1__FSM_BUSY_MASK 0x1 1876*c59a5c48SFrançois Tigeot #define SPMI_FSM_BUSY_1__FSM_BUSY__SHIFT 0x0 1877*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_REQ_MASK 0x1 1878*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_REQ__SHIFT 0x0 1879*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_ACK_MASK 0x2 1880*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_ACK__SHIFT 0x1 1881*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_REQ_auto_clear_MASK 0x10 1882*c59a5c48SFrançois Tigeot #define SPMI_PATH_1__PATH_ENABLE_REQ_auto_clear__SHIFT 0x4 1883*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_C6_STATE_ENTERED_MASK 0x1 1884*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_C6_STATE_ENTERED__SHIFT 0x0 1885*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_C6_STATE_ENTERED_WHEN_FSM_BUSY_MASK 0x2 1886*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_C6_STATE_ENTERED_WHEN_FSM_BUSY__SHIFT 0x1 1887*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_COUNTER_ADDRESS_C6_MASK 0xfffc 1888*c59a5c48SFrançois Tigeot #define SPMI_C6_STATE_1__SPMI_IF_COUNTER_ADDRESS_C6__SHIFT 0x2 1889*c59a5c48SFrançois Tigeot #define SPMI_JTAG_OVER_1__SPMI_IF_JTAG_OVER_HAPPENED_MASK 0x1 1890*c59a5c48SFrançois Tigeot #define SPMI_JTAG_OVER_1__SPMI_IF_JTAG_OVER_HAPPENED__SHIFT 0x0 1891*c59a5c48SFrançois Tigeot #define SPMI_SRAM_ADDRESS_1__SRAM_ADDRESS_MASK 0xffffffff 1892*c59a5c48SFrançois Tigeot #define SPMI_SRAM_ADDRESS_1__SRAM_ADDRESS__SHIFT 0x0 1893*c59a5c48SFrançois Tigeot #define SPMI_SRAM_DATA_1__SRAM_DATA_MASK 0xffffffff 1894*c59a5c48SFrançois Tigeot #define SPMI_SRAM_DATA_1__SRAM_DATA__SHIFT 0x0 1895*c59a5c48SFrançois Tigeot #define SPMI_RESET_1__ASYNC_RESET_0_MASK 0x1 1896*c59a5c48SFrançois Tigeot #define SPMI_RESET_1__ASYNC_RESET_0__SHIFT 0x0 1897*c59a5c48SFrançois Tigeot #define SPMI_RESET_1__SYNC_RESET_MASK 0x80000000 1898*c59a5c48SFrançois Tigeot #define SPMI_RESET_1__SYNC_RESET__SHIFT 0x1f 1899*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_1__CLOCK_GATER_0_FORCE_MASK 0x1 1900*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_1__CLOCK_GATER_0_FORCE__SHIFT 0x0 1901*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_1__SRAM_CLOCK_GATER_FORCE_MASK 0x100 1902*c59a5c48SFrançois Tigeot #define SPMI_FORCE_CLOCK_GATERS_1__SRAM_CLOCK_GATER_FORCE__SHIFT 0x8 1903*c59a5c48SFrançois Tigeot #define SPMI_SPARE_1__SPARE_DATA_MASK 0xffffffff 1904*c59a5c48SFrançois Tigeot #define SPMI_SPARE_1__SPARE_DATA__SHIFT 0x0 1905*c59a5c48SFrançois Tigeot #define SPMI_SPARE_EX_1__SPARE_DATA_EX_MASK 0xffffffff 1906*c59a5c48SFrançois Tigeot #define SPMI_SPARE_EX_1__SPARE_DATA_EX__SHIFT 0x0 1907*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_1__SRAM_CLK_GATER_EN_MASK 0x1 1908*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_1__SRAM_CLK_GATER_EN__SHIFT 0x0 1909*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_1__SRAM_CLK_GATER_TIMER_MASK 0x7fe 1910*c59a5c48SFrançois Tigeot #define SPMI_SRAM_CLK_GATER_1__SRAM_CLK_GATER_TIMER__SHIFT 0x1 1911*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GLOBAL_PWRMGT_EN_MASK 0x1 1912*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GLOBAL_PWRMGT_EN__SHIFT 0x0 1913*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__STATIC_PM_EN_MASK 0x2 1914*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__STATIC_PM_EN__SHIFT 0x1 1915*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__THERMAL_PROTECTION_DIS_MASK 0x4 1916*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__THERMAL_PROTECTION_DIS__SHIFT 0x2 1917*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__THERMAL_PROTECTION_TYPE_MASK 0x8 1918*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__THERMAL_PROTECTION_TYPE__SHIFT 0x3 1919*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SW_SMIO_INDEX_MASK 0x40 1920*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SW_SMIO_INDEX__SHIFT 0x6 1921*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__LOW_VOLT_D2_ACPI_MASK 0x100 1922*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__LOW_VOLT_D2_ACPI__SHIFT 0x8 1923*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__LOW_VOLT_D3_ACPI_MASK 0x200 1924*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__LOW_VOLT_D3_ACPI__SHIFT 0x9 1925*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__VOLT_PWRMGT_EN_MASK 0x400 1926*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__VOLT_PWRMGT_EN__SHIFT 0xa 1927*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE11_MASK 0x800 1928*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE11__SHIFT 0xb 1929*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_ACPI_MASK 0x4000 1930*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_ACPI__SHIFT 0xe 1931*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_CLK_MASK 0x8000 1932*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_CLK__SHIFT 0xf 1933*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_OFF_MASK 0x10000 1934*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_OFF__SHIFT 0x10 1935*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_INTF_OFF_MASK 0x20000 1936*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__GPU_COUNTER_INTF_OFF__SHIFT 0x11 1937*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE18_MASK 0x40000 1938*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE18__SHIFT 0x12 1939*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__ACPI_D3_VID_MASK 0x180000 1940*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__ACPI_D3_VID__SHIFT 0x13 1941*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__DYN_SPREAD_SPECTRUM_EN_MASK 0x800000 1942*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__DYN_SPREAD_SPECTRUM_EN__SHIFT 0x17 1943*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE27_MASK 0x8000000 1944*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE27__SHIFT 0x1b 1945*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE_MASK 0xf0000000 1946*c59a5c48SFrançois Tigeot #define GENERAL_PWRMGT__SPARE__SHIFT 0x1c 1947*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__GNB_SLOW_MODE_MASK 0x3 1948*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__GNB_SLOW_MODE__SHIFT 0x0 1949*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__GNB_SLOW_MASK 0x4 1950*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__GNB_SLOW__SHIFT 0x2 1951*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__FORCE_NB_PS1_MASK 0x8 1952*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__FORCE_NB_PS1__SHIFT 0x3 1953*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__DPM_ENABLED_MASK 0x10 1954*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__DPM_ENABLED__SHIFT 0x4 1955*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__SPARE_MASK 0xffffffe0 1956*c59a5c48SFrançois Tigeot #define CNB_PWRMGT_CNTL__SPARE__SHIFT 0x5 1957*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESET_BUSY_CNT_MASK 0x10 1958*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESET_BUSY_CNT__SHIFT 0x4 1959*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESET_SCLK_CNT_MASK 0x20 1960*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESET_SCLK_CNT__SHIFT 0x5 1961*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESERVED_0_MASK 0x40 1962*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESERVED_0__SHIFT 0x6 1963*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESERVED_3_MASK 0x1000000 1964*c59a5c48SFrançois Tigeot #define SCLK_PWRMGT_CNTL__RESERVED_3__SHIFT 0x18 1965*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_ACPI_INDEX_MASK 0xf 1966*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_ACPI_INDEX__SHIFT 0x0 1967*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_ACPI_INDEX_MASK 0xf0 1968*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_ACPI_INDEX__SHIFT 0x4 1969*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_MCLK_INDEX_MASK 0xf00 1970*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_MCLK_INDEX__SHIFT 0x8 1971*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_MCLK_INDEX_MASK 0xf000 1972*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_MCLK_INDEX__SHIFT 0xc 1973*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX_MASK 0x1f0000 1974*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_SCLK_INDEX__SHIFT 0x10 1975*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_SCLK_INDEX_MASK 0x3e00000 1976*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_SCLK_INDEX__SHIFT 0x15 1977*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_LCLK_INDEX_MASK 0x1c000000 1978*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__CURR_LCLK_INDEX__SHIFT 0x1a 1979*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_LCLK_INDEX_MASK 0xe0000000 1980*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX__TARG_LCLK_INDEX__SHIFT 0x1d 1981*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDCI_INDEX_MASK 0xf 1982*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDCI_INDEX__SHIFT 0x0 1983*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_VDDCI_INDEX_MASK 0xf0 1984*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_VDDCI_INDEX__SHIFT 0x4 1985*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_MVDD_INDEX_MASK 0xf00 1986*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_MVDD_INDEX__SHIFT 0x8 1987*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_MVDD_INDEX_MASK 0xf000 1988*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_MVDD_INDEX__SHIFT 0xc 1989*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX_MASK 0xf0000 1990*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_VDDC_INDEX__SHIFT 0x10 1991*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_VDDC_INDEX_MASK 0xf00000 1992*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_VDDC_INDEX__SHIFT 0x14 1993*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX_MASK 0xf000000 1994*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__CURR_PCIE_INDEX__SHIFT 0x18 1995*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_PCIE_INDEX_MASK 0xf0000000 1996*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_1__TARG_PCIE_INDEX__SHIFT 0x1c 1997*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_UVD_INDEX_MASK 0xf 1998*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_UVD_INDEX__SHIFT 0x0 1999*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_UVD_INDEX_MASK 0xf0 2000*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_UVD_INDEX__SHIFT 0x4 2001*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_VCE_INDEX_MASK 0xf00 2002*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_VCE_INDEX__SHIFT 0x8 2003*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_VCE_INDEX_MASK 0xf000 2004*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_VCE_INDEX__SHIFT 0xc 2005*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_ACP_INDEX_MASK 0xf0000 2006*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_ACP_INDEX__SHIFT 0x10 2007*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_ACP_INDEX_MASK 0xf00000 2008*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_ACP_INDEX__SHIFT 0x14 2009*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_SAMU_INDEX_MASK 0xf000000 2010*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__CURR_SAMU_INDEX__SHIFT 0x18 2011*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_SAMU_INDEX_MASK 0xf0000000 2012*c59a5c48SFrançois Tigeot #define TARGET_AND_CURRENT_PROFILE_INDEX_2__TARG_SAMU_INDEX__SHIFT 0x1c 2013*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2014*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2015*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2016*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2017*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2018*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2019*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2020*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2021*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2022*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2023*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2024*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2025*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2026*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2027*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2028*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2029*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2030*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2031*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2032*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2033*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2034*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2035*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2036*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2037*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2038*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2039*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2040*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2041*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2042*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2043*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2044*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2045*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2046*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2047*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2048*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2049*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2050*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2051*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2052*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2053*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2054*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2055*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2056*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2057*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2058*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2059*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2060*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2061*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2062*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2063*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2064*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2065*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2066*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2067*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2068*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2069*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2070*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2071*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2072*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2073*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2074*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_0__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2075*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2076*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2077*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2078*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2079*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2080*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2081*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2082*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2083*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2084*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2085*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2086*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2087*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2088*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2089*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2090*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2091*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2092*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2093*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2094*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2095*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2096*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2097*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2098*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2099*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2100*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2101*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2102*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2103*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2104*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2105*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2106*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2107*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2108*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2109*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2110*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2111*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2112*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2113*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2114*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2115*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2116*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2117*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2118*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2119*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2120*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2121*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2122*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2123*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2124*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2125*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2126*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2127*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2128*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2129*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2130*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2131*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2132*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2133*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2134*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2135*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2136*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_1__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2137*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2138*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2139*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2140*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2141*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2142*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2143*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2144*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2145*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2146*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2147*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2148*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2149*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2150*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2151*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2152*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2153*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2154*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2155*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2156*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2157*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2158*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2159*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2160*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2161*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2162*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2163*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2164*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2165*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2166*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2167*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2168*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2169*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2170*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2171*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2172*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2173*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2174*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2175*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2176*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2177*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2178*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2179*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2180*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2181*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2182*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2183*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2184*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2185*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2186*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2187*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2188*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2189*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2190*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2191*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2192*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2193*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2194*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2195*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2196*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2197*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2198*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_2__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2199*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2200*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2201*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2202*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2203*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2204*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2205*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2206*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2207*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2208*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2209*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2210*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2211*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2212*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2213*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2214*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2215*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2216*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2217*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2218*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2219*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2220*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2221*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2222*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2223*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2224*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2225*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2226*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2227*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2228*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2229*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2230*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2231*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2232*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2233*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2234*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2235*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2236*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2237*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2238*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2239*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2240*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2241*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2242*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2243*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2244*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2245*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2246*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2247*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2248*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2249*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2250*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2251*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2252*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2253*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2254*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2255*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2256*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2257*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2258*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2259*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2260*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_3__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2261*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2262*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2263*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2264*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2265*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2266*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2267*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2268*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2269*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2270*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2271*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2272*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2273*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2274*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2275*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2276*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2277*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2278*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2279*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2280*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2281*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2282*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2283*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2284*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2285*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2286*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2287*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2288*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2289*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2290*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2291*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2292*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2293*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2294*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2295*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2296*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2297*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2298*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2299*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2300*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2301*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2302*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2303*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2304*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2305*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2306*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2307*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2308*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2309*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2310*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2311*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2312*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2313*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2314*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2315*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2316*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2317*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2318*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2319*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2320*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2321*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2322*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_4__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2323*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2324*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2325*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2326*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2327*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2328*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2329*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2330*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2331*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2332*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2333*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2334*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2335*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2336*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2337*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2338*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2339*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2340*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2341*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2342*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2343*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2344*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2345*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2346*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2347*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2348*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2349*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2350*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2351*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2352*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2353*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2354*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2355*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2356*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2357*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2358*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2359*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2360*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2361*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2362*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2363*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2364*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2365*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2366*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2367*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2368*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2369*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2370*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2371*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2372*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2373*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2374*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2375*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2376*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2377*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2378*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2379*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2380*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2381*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2382*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2383*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2384*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_5__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2385*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2386*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2387*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2388*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2389*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2390*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2391*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2392*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2393*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2394*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2395*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2396*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2397*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2398*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2399*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2400*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2401*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2402*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2403*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2404*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2405*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2406*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2407*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2408*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2409*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2410*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2411*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2412*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2413*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2414*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2415*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2416*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2417*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2418*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2419*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2420*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2421*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2422*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2423*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2424*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2425*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2426*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2427*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2428*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2429*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2430*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2431*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2432*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2433*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2434*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2435*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2436*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2437*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2438*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2439*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2440*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2441*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2442*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2443*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2444*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2445*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2446*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_6__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2447*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__BIF_FREQ_THROTTLING_VOTE_EN_MASK 0x1 2448*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__BIF_FREQ_THROTTLING_VOTE_EN__SHIFT 0x0 2449*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__HDP_FREQ_THROTTLING_VOTE_EN_MASK 0x2 2450*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__HDP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1 2451*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__ROM_FREQ_THROTTLING_VOTE_EN_MASK 0x4 2452*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__ROM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x2 2453*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__IH_SEM_FREQ_THROTTLING_VOTE_EN_MASK 0x8 2454*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__IH_SEM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x3 2455*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__PDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x10 2456*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__PDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x4 2457*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__DRM_FREQ_THROTTLING_VOTE_EN_MASK 0x20 2458*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__DRM_FREQ_THROTTLING_VOTE_EN__SHIFT 0x5 2459*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__IDCT_FREQ_THROTTLING_VOTE_EN_MASK 0x40 2460*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__IDCT_FREQ_THROTTLING_VOTE_EN__SHIFT 0x6 2461*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__ACP_FREQ_THROTTLING_VOTE_EN_MASK 0x80 2462*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__ACP_FREQ_THROTTLING_VOTE_EN__SHIFT 0x7 2463*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__SDMA_FREQ_THROTTLING_VOTE_EN_MASK 0x100 2464*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__SDMA_FREQ_THROTTLING_VOTE_EN__SHIFT 0x8 2465*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__UVD_FREQ_THROTTLING_VOTE_EN_MASK 0x200 2466*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__UVD_FREQ_THROTTLING_VOTE_EN__SHIFT 0x9 2467*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__VCE_0_FREQ_THROTTLING_VOTE_EN_MASK 0x400 2468*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__VCE_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xa 2469*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__DC_AZ_FREQ_THROTTLING_VOTE_EN_MASK 0x800 2470*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__DC_AZ_FREQ_THROTTLING_VOTE_EN__SHIFT 0xb 2471*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__AVP_FREQ_THROTTLING_VOTE_EN_MASK 0x2000 2472*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__AVP_FREQ_THROTTLING_VOTE_EN__SHIFT 0xd 2473*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_0_FREQ_THROTTLING_VOTE_EN_MASK 0x4000 2474*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_0_FREQ_THROTTLING_VOTE_EN__SHIFT 0xe 2475*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_1_FREQ_THROTTLING_VOTE_EN_MASK 0x8000 2476*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0xf 2477*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_2_FREQ_THROTTLING_VOTE_EN_MASK 0x10000 2478*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_2_FREQ_THROTTLING_VOTE_EN__SHIFT 0x10 2479*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_3_FREQ_THROTTLING_VOTE_EN_MASK 0x20000 2480*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_3_FREQ_THROTTLING_VOTE_EN__SHIFT 0x11 2481*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_4_FREQ_THROTTLING_VOTE_EN_MASK 0x40000 2482*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_4_FREQ_THROTTLING_VOTE_EN__SHIFT 0x12 2483*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_5_FREQ_THROTTLING_VOTE_EN_MASK 0x80000 2484*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_5_FREQ_THROTTLING_VOTE_EN__SHIFT 0x13 2485*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_6_FREQ_THROTTLING_VOTE_EN_MASK 0x100000 2486*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_6_FREQ_THROTTLING_VOTE_EN__SHIFT 0x14 2487*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_7_FREQ_THROTTLING_VOTE_EN_MASK 0x200000 2488*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_7_FREQ_THROTTLING_VOTE_EN__SHIFT 0x15 2489*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_8_FREQ_THROTTLING_VOTE_EN_MASK 0x400000 2490*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_8_FREQ_THROTTLING_VOTE_EN__SHIFT 0x16 2491*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_9_FREQ_THROTTLING_VOTE_EN_MASK 0x800000 2492*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_9_FREQ_THROTTLING_VOTE_EN__SHIFT 0x17 2493*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_10_FREQ_THROTTLING_VOTE_EN_MASK 0x1000000 2494*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_10_FREQ_THROTTLING_VOTE_EN__SHIFT 0x18 2495*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_11_FREQ_THROTTLING_VOTE_EN_MASK 0x2000000 2496*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_11_FREQ_THROTTLING_VOTE_EN__SHIFT 0x19 2497*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_12_FREQ_THROTTLING_VOTE_EN_MASK 0x4000000 2498*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_12_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1a 2499*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_13_FREQ_THROTTLING_VOTE_EN_MASK 0x8000000 2500*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_13_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1b 2501*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_14_FREQ_THROTTLING_VOTE_EN_MASK 0x10000000 2502*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_14_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1c 2503*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_15_FREQ_THROTTLING_VOTE_EN_MASK 0x20000000 2504*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__GRBM_15_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1d 2505*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__RLC_FREQ_THROTTLING_VOTE_EN_MASK 0x40000000 2506*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__RLC_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1e 2507*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__VCE_1_FREQ_THROTTLING_VOTE_EN_MASK 0x80000000 2508*c59a5c48SFrançois Tigeot #define CG_FREQ_TRAN_VOTING_7__VCE_1_FREQ_THROTTLING_VOTE_EN__SHIFT 0x1f 2509*c59a5c48SFrançois Tigeot #define CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_MASK 0xffff 2510*c59a5c48SFrançois Tigeot #define CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD__SHIFT 0x0 2511*c59a5c48SFrançois Tigeot #define CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_UNIT_MASK 0xf0000 2512*c59a5c48SFrançois Tigeot #define CG_STATIC_SCREEN_PARAMETER__STATIC_SCREEN_THRESHOLD_UNIT__SHIFT 0x10 2513*c59a5c48SFrançois Tigeot #define CG_ACPI_CNTL__SCLK_ACPI_DIV_MASK 0x7f 2514*c59a5c48SFrançois Tigeot #define CG_ACPI_CNTL__SCLK_ACPI_DIV__SHIFT 0x0 2515*c59a5c48SFrançois Tigeot #define CG_ACPI_CNTL__SCLK_CHANGE_SKIP_MASK 0x80 2516*c59a5c48SFrançois Tigeot #define CG_ACPI_CNTL__SCLK_CHANGE_SKIP__SHIFT 0x7 2517*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__DIV_ID_MASK 0x7 2518*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__DIV_ID__SHIFT 0x0 2519*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__RAMP_DIS_MASK 0x8 2520*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__RAMP_DIS__SHIFT 0x3 2521*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__HYSTERESIS_MASK 0xfff0 2522*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__HYSTERESIS__SHIFT 0x4 2523*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SCLK_RUNNING_MASK_MASK 0x10000 2524*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SCLK_RUNNING_MASK__SHIFT 0x10 2525*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SELF_REFRESH_MASK_MASK 0x20000 2526*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SELF_REFRESH_MASK__SHIFT 0x11 2527*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__ALLOW_NBPSTATE_MASK_MASK 0x40000 2528*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__ALLOW_NBPSTATE_MASK__SHIFT 0x12 2529*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__BIF_BUSY_MASK_MASK 0x80000 2530*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__BIF_BUSY_MASK__SHIFT 0x13 2531*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__UVD_BUSY_MASK_MASK 0x100000 2532*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__UVD_BUSY_MASK__SHIFT 0x14 2533*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC0SRBM_BUSY_MASK_MASK 0x200000 2534*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC0SRBM_BUSY_MASK__SHIFT 0x15 2535*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC1SRBM_BUSY_MASK_MASK 0x400000 2536*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC1SRBM_BUSY_MASK__SHIFT 0x16 2537*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC_ALLOW_MASK_MASK 0x800000 2538*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MC_ALLOW_MASK__SHIFT 0x17 2539*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SMU_BUSY_MASK_MASK 0x1000000 2540*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SMU_BUSY_MASK__SHIFT 0x18 2541*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SELF_REFRESH_NLC_MASK_MASK 0x2000000 2542*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__SELF_REFRESH_NLC_MASK__SHIFT 0x19 2543*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__FAST_EXIT_REQ_NBPSTATE_MASK 0x4000000 2544*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__FAST_EXIT_REQ_NBPSTATE__SHIFT 0x1a 2545*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__DEEP_SLEEP_ENTRY_MODE_MASK 0x8000000 2546*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__DEEP_SLEEP_ENTRY_MODE__SHIFT 0x1b 2547*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MBUS2_ACTIVE_MASK_MASK 0x10000000 2548*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__MBUS2_ACTIVE_MASK__SHIFT 0x1c 2549*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__VCE_0_BUSY_MASK_MASK 0x20000000 2550*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__VCE_0_BUSY_MASK__SHIFT 0x1d 2551*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__AZ_BUSY_MASK_MASK 0x40000000 2552*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__AZ_BUSY_MASK__SHIFT 0x1e 2553*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__ENABLE_DS_MASK 0x80000000 2554*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL__ENABLE_DS__SHIFT 0x1f 2555*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__RLC_BUSY_MASK_MASK 0x1 2556*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__RLC_BUSY_MASK__SHIFT 0x0 2557*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__HDP_BUSY_MASK_MASK 0x2 2558*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__HDP_BUSY_MASK__SHIFT 0x1 2559*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__ROM_BUSY_MASK_MASK 0x4 2560*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__ROM_BUSY_MASK__SHIFT 0x2 2561*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__IH_SEM_BUSY_MASK_MASK 0x8 2562*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__IH_SEM_BUSY_MASK__SHIFT 0x3 2563*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__PDMA_BUSY_MASK_MASK 0x10 2564*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__PDMA_BUSY_MASK__SHIFT 0x4 2565*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__IDCT_BUSY_MASK_MASK 0x40 2566*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__IDCT_BUSY_MASK__SHIFT 0x6 2567*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__SDMA_BUSY_MASK_MASK 0x80 2568*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__SDMA_BUSY_MASK__SHIFT 0x7 2569*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__DC_AZ_BUSY_MASK_MASK 0x100 2570*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__DC_AZ_BUSY_MASK__SHIFT 0x8 2571*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__ACP_SMU_ALLOW_DSLEEP_STUTTER_MASK_MASK 0x200 2572*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__ACP_SMU_ALLOW_DSLEEP_STUTTER_MASK__SHIFT 0x9 2573*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__UVD_CG_MC_STAT_BUSY_MASK_MASK 0x400 2574*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__UVD_CG_MC_STAT_BUSY_MASK__SHIFT 0xa 2575*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_0_CG_MC_STAT_BUSY_MASK_MASK 0x800 2576*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_0_CG_MC_STAT_BUSY_MASK__SHIFT 0xb 2577*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_1_BUSY_MASK_MASK 0x200000 2578*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_1_BUSY_MASK__SHIFT 0x15 2579*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_1_CG_MC_STAT_BUSY_MASK_MASK 0x400000 2580*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__VCE_1_CG_MC_STAT_BUSY_MASK__SHIFT 0x16 2581*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__REG_SCLK_DEEP_SLEEP_MASK_MASK 0x800000 2582*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__REG_SCLK_DEEP_SLEEP_MASK__SHIFT 0x17 2583*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__INOUT_CUSHION_MASK 0xff000000 2584*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL2__INOUT_CUSHION__SHIFT 0x18 2585*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_0_SMU_BUSY_MASK_MASK 0x1 2586*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_0_SMU_BUSY_MASK__SHIFT 0x0 2587*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_1_SMU_BUSY_MASK_MASK 0x2 2588*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_1_SMU_BUSY_MASK__SHIFT 0x1 2589*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_2_SMU_BUSY_MASK_MASK 0x4 2590*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_2_SMU_BUSY_MASK__SHIFT 0x2 2591*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_3_SMU_BUSY_MASK_MASK 0x8 2592*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_3_SMU_BUSY_MASK__SHIFT 0x3 2593*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_4_SMU_BUSY_MASK_MASK 0x10 2594*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_4_SMU_BUSY_MASK__SHIFT 0x4 2595*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_5_SMU_BUSY_MASK_MASK 0x20 2596*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_5_SMU_BUSY_MASK__SHIFT 0x5 2597*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_6_SMU_BUSY_MASK_MASK 0x40 2598*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_6_SMU_BUSY_MASK__SHIFT 0x6 2599*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_7_SMU_BUSY_MASK_MASK 0x80 2600*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_7_SMU_BUSY_MASK__SHIFT 0x7 2601*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_8_SMU_BUSY_MASK_MASK 0x100 2602*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_8_SMU_BUSY_MASK__SHIFT 0x8 2603*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_9_SMU_BUSY_MASK_MASK 0x200 2604*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_9_SMU_BUSY_MASK__SHIFT 0x9 2605*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_10_SMU_BUSY_MASK_MASK 0x400 2606*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_10_SMU_BUSY_MASK__SHIFT 0xa 2607*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_11_SMU_BUSY_MASK_MASK 0x800 2608*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_11_SMU_BUSY_MASK__SHIFT 0xb 2609*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_12_SMU_BUSY_MASK_MASK 0x1000 2610*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_12_SMU_BUSY_MASK__SHIFT 0xc 2611*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_13_SMU_BUSY_MASK_MASK 0x2000 2612*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_13_SMU_BUSY_MASK__SHIFT 0xd 2613*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_14_SMU_BUSY_MASK_MASK 0x4000 2614*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_14_SMU_BUSY_MASK__SHIFT 0xe 2615*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_15_SMU_BUSY_MASK_MASK 0x8000 2616*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__GRBM_15_SMU_BUSY_MASK__SHIFT 0xf 2617*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__SMUIF_SLAVE_SCLK_BUSY_MASK_MASK 0x10000 2618*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__SMUIF_SLAVE_SCLK_BUSY_MASK__SHIFT 0x10 2619*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__SMUIF_MASTER_SCLK_BUSY_MASK_MASK 0x20000 2620*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_CNTL3__SMUIF_MASTER_SCLK_BUSY_MASK__SHIFT 0x11 2621*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID_MASK 0x7 2622*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_DS_DIV_ID__SHIFT 0x0 2623*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_SS_DIV_ID_MASK 0x38 2624*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__DPM_SS_DIV_ID__SHIFT 0x3 2625*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_ENABLE_MASK 0x10000 2626*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_ENABLE__SHIFT 0x10 2627*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_DS_DIV_ID_MASK 0xe0000 2628*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_DS_DIV_ID__SHIFT 0x11 2629*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_SS_DIV_ID_MASK 0x700000 2630*c59a5c48SFrançois Tigeot #define SCLK_DEEP_SLEEP_MISC_CNTL__OCP_SS_DIV_ID__SHIFT 0x14 2631*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__DIV_ID_MASK 0x7 2632*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__DIV_ID__SHIFT 0x0 2633*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__RAMP_DIS_MASK 0x8 2634*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__RAMP_DIS__SHIFT 0x3 2635*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__HYSTERESIS_MASK 0xfff0 2636*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__HYSTERESIS__SHIFT 0x4 2637*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__RESERVED_MASK 0x7fff0000 2638*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__RESERVED__SHIFT 0x10 2639*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__ENABLE_DS_MASK 0x80000000 2640*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL__ENABLE_DS__SHIFT 0x1f 2641*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RFE_BUSY_MASK_MASK 0x1 2642*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RFE_BUSY_MASK__SHIFT 0x0 2643*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__BIF_CG_LCLK_BUSY_MASK_MASK 0x2 2644*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__BIF_CG_LCLK_BUSY_MASK__SHIFT 0x1 2645*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMU_SMU_IDLE_MASK_MASK 0x4 2646*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMU_SMU_IDLE_MASK__SHIFT 0x2 2647*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RESERVED_BIT3_MASK 0x8 2648*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RESERVED_BIT3__SHIFT 0x3 2649*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SCLK_RUNNING_MASK_MASK 0x10 2650*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SCLK_RUNNING_MASK__SHIFT 0x4 2651*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SMU_BUSY_MASK_MASK 0x20 2652*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SMU_BUSY_MASK__SHIFT 0x5 2653*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE1_MASK_MASK 0x40 2654*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE1_MASK__SHIFT 0x6 2655*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE2_MASK_MASK 0x80 2656*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE2_MASK__SHIFT 0x7 2657*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE3_MASK_MASK 0x100 2658*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE3_MASK__SHIFT 0x8 2659*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE4_MASK_MASK 0x200 2660*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__PCIE_LCLK_IDLE4_MASK__SHIFT 0x9 2661*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUGPP_IDLE_MASK_MASK 0x400 2662*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUGPP_IDLE_MASK__SHIFT 0xa 2663*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUGPPSB_IDLE_MASK_MASK 0x800 2664*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUGPPSB_IDLE_MASK__SHIFT 0xb 2665*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUBIF_IDLE_MASK_MASK 0x1000 2666*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUBIF_IDLE_MASK__SHIFT 0xc 2667*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUINTGEN_IDLE_MASK_MASK 0x2000 2668*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUINTGEN_IDLE_MASK__SHIFT 0xd 2669*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L2IMU_IDLE_MASK_MASK 0x4000 2670*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L2IMU_IDLE_MASK__SHIFT 0xe 2671*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ORB_IDLE_MASK_MASK 0x8000 2672*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ORB_IDLE_MASK__SHIFT 0xf 2673*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_MASK_MASK 0x10000 2674*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_MASK__SHIFT 0x10 2675*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_ACK_MASK_MASK 0x20000 2676*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_INB_WAKE_ACK_MASK__SHIFT 0x11 2677*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_MASK_MASK 0x40000 2678*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_MASK__SHIFT 0x12 2679*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_ACK_MASK_MASK 0x80000 2680*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__ON_OUTB_WAKE_ACK_MASK__SHIFT 0x13 2681*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__DMAACTIVE_MASK_MASK 0x100000 2682*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__DMAACTIVE_MASK__SHIFT 0x14 2683*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE0_IDLE_MASK_MASK 0x200000 2684*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE0_IDLE_MASK__SHIFT 0x15 2685*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE1_IDLE_MASK_MASK 0x400000 2686*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUPCIE1_IDLE_MASK__SHIFT 0x16 2687*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUIOAGR_IDLE_MASK_MASK 0x800000 2688*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__L1IMUIOAGR_IDLE_MASK__SHIFT 0x17 2689*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SPG_SMU_IDLE_MASK_MASK 0x1000000 2690*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__SPG_SMU_IDLE_MASK__SHIFT 0x18 2691*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__APG_SMU_IDLE_MASK_MASK 0x2000000 2692*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__APG_SMU_IDLE_MASK__SHIFT 0x19 2693*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE0_MASK_MASK 0x4000000 2694*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE0_MASK__SHIFT 0x1a 2695*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE1_MASK_MASK 0x8000000 2696*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE1_MASK__SHIFT 0x1b 2697*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE2_MASK_MASK 0x10000000 2698*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE2_MASK__SHIFT 0x1c 2699*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE3_MASK_MASK 0x20000000 2700*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__IP_SMU_IDLE3_MASK__SHIFT 0x1d 2701*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RESERVED_MASK 0xc0000000 2702*c59a5c48SFrançois Tigeot #define LCLK_DEEP_SLEEP_CNTL2__RESERVED__SHIFT 0x1e 2703*c59a5c48SFrançois Tigeot #define SMU_VOLTAGE_STATUS__SMU_VOLTAGE_STATUS_MASK 0x1 2704*c59a5c48SFrançois Tigeot #define SMU_VOLTAGE_STATUS__SMU_VOLTAGE_STATUS__SHIFT 0x0 2705*c59a5c48SFrançois Tigeot #define SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL_MASK 0x1fe 2706*c59a5c48SFrançois Tigeot #define SMU_VOLTAGE_STATUS__SMU_VOLTAGE_CURRENT_LEVEL__SHIFT 0x1 2707*c59a5c48SFrançois Tigeot #define CG_ULV_PARAMETER__ULV_THRESHOLD_MASK 0xffff 2708*c59a5c48SFrançois Tigeot #define CG_ULV_PARAMETER__ULV_THRESHOLD__SHIFT 0x0 2709*c59a5c48SFrançois Tigeot #define CG_ULV_PARAMETER__ULV_THRESHOLD_UNIT_MASK 0xf0000 2710*c59a5c48SFrançois Tigeot #define CG_ULV_PARAMETER__ULV_THRESHOLD_UNIT__SHIFT 0x10 2711*c59a5c48SFrançois Tigeot #define PWR_DC_RESP__RESPONSE_MASK 0x1 2712*c59a5c48SFrançois Tigeot #define PWR_DC_RESP__RESPONSE__SHIFT 0x0 2713*c59a5c48SFrançois Tigeot #define PWR_VCE_RESP__RESPONSE_MASK 0xffffffff 2714*c59a5c48SFrançois Tigeot #define PWR_VCE_RESP__RESPONSE__SHIFT 0x0 2715*c59a5c48SFrançois Tigeot #define PWR_UVD_RESP__RESPONSE_MASK 0xffffffff 2716*c59a5c48SFrançois Tigeot #define PWR_UVD_RESP__RESPONSE__SHIFT 0x0 2717*c59a5c48SFrançois Tigeot #define PWR_ACP_RESP__RESPONSE_MASK 0xffffffff 2718*c59a5c48SFrançois Tigeot #define PWR_ACP_RESP__RESPONSE__SHIFT 0x0 2719*c59a5c48SFrançois Tigeot #define PWR_DC_REQ__REQUEST_MASK 0x1 2720*c59a5c48SFrançois Tigeot #define PWR_DC_REQ__REQUEST__SHIFT 0x0 2721*c59a5c48SFrançois Tigeot #define SCLK_MIN_DIV__FRACV_MASK 0xfff 2722*c59a5c48SFrançois Tigeot #define SCLK_MIN_DIV__FRACV__SHIFT 0x0 2723*c59a5c48SFrançois Tigeot #define SCLK_MIN_DIV__INTV_MASK 0x7f000 2724*c59a5c48SFrançois Tigeot #define SCLK_MIN_DIV__INTV__SHIFT 0xc 2725*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__FSM_ADDR_MASK 0xff 2726*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__FSM_ADDR__SHIFT 0x0 2727*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Power_Down_MASK 0x100 2728*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Power_Down__SHIFT 0x8 2729*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Power_Up_MASK 0x200 2730*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Power_Up__SHIFT 0x9 2731*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__P1_Select_MASK 0x400 2732*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__P1_Select__SHIFT 0xa 2733*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__P2_Select_MASK 0x800 2734*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__P2_Select__SHIFT 0xb 2735*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Write_Op_MASK 0x1000 2736*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Write_Op__SHIFT 0xc 2737*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Read_Op_MASK 0x2000 2738*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Read_Op__SHIFT 0xd 2739*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Reserved_MASK 0xfffc000 2740*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__Reserved__SHIFT 0xe 2741*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__REG_ADDR_MASK 0xf0000000 2742*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_CONFIG__REG_ADDR__SHIFT 0x1c 2743*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_WRITE__Write_value_MASK 0xffffffff 2744*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_WRITE__Write_value__SHIFT 0x0 2745*c59a5c48SFrançois Tigeot #define SERDES_BUSY__PCIE_SERDES_BUSY_MASK 0x1 2746*c59a5c48SFrançois Tigeot #define SERDES_BUSY__PCIE_SERDES_BUSY__SHIFT 0x0 2747*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__FSM_ADDR_MASK 0xff 2748*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__FSM_ADDR__SHIFT 0x0 2749*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Power_Down_MASK 0x100 2750*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Power_Down__SHIFT 0x8 2751*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Power_Up_MASK 0x200 2752*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Power_Up__SHIFT 0x9 2753*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__P1_Select_MASK 0x400 2754*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__P1_Select__SHIFT 0xa 2755*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__P2_Select_MASK 0x800 2756*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__P2_Select__SHIFT 0xb 2757*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Write_Op_MASK 0x1000 2758*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Write_Op__SHIFT 0xc 2759*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Read_Op_MASK 0x2000 2760*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Read_Op__SHIFT 0xd 2761*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Reserved_MASK 0xfffc000 2762*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__Reserved__SHIFT 0xe 2763*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__REG_ADDR_MASK 0xf0000000 2764*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_CONFIG__REG_ADDR__SHIFT 0x1c 2765*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_WRITE__Write_value_MASK 0xffffffff 2766*c59a5c48SFrançois Tigeot #define PCIE_PGFSM2_WRITE__Write_value__SHIFT 0x0 2767*c59a5c48SFrançois Tigeot #define SERDES2_BUSY__PCIE_SERDES_BUSY_MASK 0x1 2768*c59a5c48SFrançois Tigeot #define SERDES2_BUSY__PCIE_SERDES_BUSY__SHIFT 0x0 2769*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_0_READ__Read_value_MASK 0xffffff 2770*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_0_READ__Read_value__SHIFT 0x0 2771*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_0_READ__Read_valid_MASK 0x1000000 2772*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_0_READ__Read_valid__SHIFT 0x18 2773*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_1_READ__Read_value_MASK 0xffffff 2774*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_1_READ__Read_value__SHIFT 0x0 2775*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_1_READ__Read_valid_MASK 0x1000000 2776*c59a5c48SFrançois Tigeot #define PCIE_PGFSM_1_READ__Read_valid__SHIFT 0x18 2777*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__BIF_CG_req_MASK 0x1 2778*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__BIF_CG_req__SHIFT 0x0 2779*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__AZ_CG_req_MASK 0x2 2780*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__AZ_CG_req__SHIFT 0x1 2781*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__AZ_CG_resp_MASK 0x4 2782*c59a5c48SFrançois Tigeot #define PWR_ACPI_INTERRUPT__AZ_CG_resp__SHIFT 0x2 2783*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_PARAMETER__VDDGFX_IDLE_THRESHOLD_MASK 0xffff 2784*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_PARAMETER__VDDGFX_IDLE_THRESHOLD__SHIFT 0x0 2785*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_PARAMETER__VDDGFX_IDLE_THRESHOLD_UNIT_MASK 0xf0000 2786*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_PARAMETER__VDDGFX_IDLE_THRESHOLD_UNIT__SHIFT 0x10 2787*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__VDDGFX_IDLE_EN_MASK 0x1 2788*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__VDDGFX_IDLE_EN__SHIFT 0x0 2789*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__VDDGFX_IDLE_DETECT_MASK 0x2 2790*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__VDDGFX_IDLE_DETECT__SHIFT 0x1 2791*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__FORCE_VDDGFX_IDLE_EXIT_MASK 0x4 2792*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__FORCE_VDDGFX_IDLE_EXIT__SHIFT 0x2 2793*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__SMC_VDDGFX_IDLE_STATE_MASK 0x8 2794*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_CONTROL__SMC_VDDGFX_IDLE_STATE__SHIFT 0x3 2795*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_EXIT__BIF_EXIT_REQ_MASK 0x1 2796*c59a5c48SFrançois Tigeot #define VDDGFX_IDLE_EXIT__BIF_EXIT_REQ__SHIFT 0x0 2797*c59a5c48SFrançois Tigeot #define REG_SCLK_DEEP_SLEEP_EXIT__REG_sclk_deep_sleep_exit_MASK 0x1 2798*c59a5c48SFrançois Tigeot #define REG_SCLK_DEEP_SLEEP_EXIT__REG_sclk_deep_sleep_exit__SHIFT 0x0 2799*c59a5c48SFrançois Tigeot #define CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG4_MASK 0xffff 2800*c59a5c48SFrançois Tigeot #define CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG4__SHIFT 0x0 2801*c59a5c48SFrançois Tigeot #define CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG5_MASK 0xffff0000 2802*c59a5c48SFrançois Tigeot #define CAC_WEIGHT_LKG_DC_3__WEIGHT_LKG_DC_SIG5__SHIFT 0x10 2803*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_ENABLE_MASK 0x1 2804*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_ENABLE__SHIFT 0x0 2805*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_THRESHOLD_MASK 0x1fffe 2806*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_THRESHOLD__SHIFT 0x1 2807*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_BLOCK_ID_MASK 0x3e0000 2808*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_BLOCK_ID__SHIFT 0x11 2809*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_SIGNAL_ID_MASK 0x3fc00000 2810*c59a5c48SFrançois Tigeot #define LCAC_MC0_CNTL__MC0_SIGNAL_ID__SHIFT 0x16 2811*c59a5c48SFrançois Tigeot #define LCAC_MC0_OVR_SEL__MC0_OVR_SEL_MASK 0xffffffff 2812*c59a5c48SFrançois Tigeot #define LCAC_MC0_OVR_SEL__MC0_OVR_SEL__SHIFT 0x0 2813*c59a5c48SFrançois Tigeot #define LCAC_MC0_OVR_VAL__MC0_OVR_VAL_MASK 0xffffffff 2814*c59a5c48SFrançois Tigeot #define LCAC_MC0_OVR_VAL__MC0_OVR_VAL__SHIFT 0x0 2815*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_ENABLE_MASK 0x1 2816*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_ENABLE__SHIFT 0x0 2817*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_THRESHOLD_MASK 0x1fffe 2818*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_THRESHOLD__SHIFT 0x1 2819*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_BLOCK_ID_MASK 0x3e0000 2820*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_BLOCK_ID__SHIFT 0x11 2821*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_SIGNAL_ID_MASK 0x3fc00000 2822*c59a5c48SFrançois Tigeot #define LCAC_MC1_CNTL__MC1_SIGNAL_ID__SHIFT 0x16 2823*c59a5c48SFrançois Tigeot #define LCAC_MC1_OVR_SEL__MC1_OVR_SEL_MASK 0xffffffff 2824*c59a5c48SFrançois Tigeot #define LCAC_MC1_OVR_SEL__MC1_OVR_SEL__SHIFT 0x0 2825*c59a5c48SFrançois Tigeot #define LCAC_MC1_OVR_VAL__MC1_OVR_VAL_MASK 0xffffffff 2826*c59a5c48SFrançois Tigeot #define LCAC_MC1_OVR_VAL__MC1_OVR_VAL__SHIFT 0x0 2827*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_ENABLE_MASK 0x1 2828*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_ENABLE__SHIFT 0x0 2829*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_THRESHOLD_MASK 0x1fffe 2830*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_THRESHOLD__SHIFT 0x1 2831*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_BLOCK_ID_MASK 0x3e0000 2832*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_BLOCK_ID__SHIFT 0x11 2833*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_SIGNAL_ID_MASK 0x3fc00000 2834*c59a5c48SFrançois Tigeot #define LCAC_MC2_CNTL__MC2_SIGNAL_ID__SHIFT 0x16 2835*c59a5c48SFrançois Tigeot #define LCAC_MC2_OVR_SEL__MC2_OVR_SEL_MASK 0xffffffff 2836*c59a5c48SFrançois Tigeot #define LCAC_MC2_OVR_SEL__MC2_OVR_SEL__SHIFT 0x0 2837*c59a5c48SFrançois Tigeot #define LCAC_MC2_OVR_VAL__MC2_OVR_VAL_MASK 0xffffffff 2838*c59a5c48SFrançois Tigeot #define LCAC_MC2_OVR_VAL__MC2_OVR_VAL__SHIFT 0x0 2839*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_ENABLE_MASK 0x1 2840*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_ENABLE__SHIFT 0x0 2841*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_THRESHOLD_MASK 0x1fffe 2842*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_THRESHOLD__SHIFT 0x1 2843*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_BLOCK_ID_MASK 0x3e0000 2844*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_BLOCK_ID__SHIFT 0x11 2845*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_SIGNAL_ID_MASK 0x3fc00000 2846*c59a5c48SFrançois Tigeot #define LCAC_MC3_CNTL__MC3_SIGNAL_ID__SHIFT 0x16 2847*c59a5c48SFrançois Tigeot #define LCAC_MC3_OVR_SEL__MC3_OVR_SEL_MASK 0xffffffff 2848*c59a5c48SFrançois Tigeot #define LCAC_MC3_OVR_SEL__MC3_OVR_SEL__SHIFT 0x0 2849*c59a5c48SFrançois Tigeot #define LCAC_MC3_OVR_VAL__MC3_OVR_VAL_MASK 0xffffffff 2850*c59a5c48SFrançois Tigeot #define LCAC_MC3_OVR_VAL__MC3_OVR_VAL__SHIFT 0x0 2851*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_ENABLE_MASK 0x1 2852*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_ENABLE__SHIFT 0x0 2853*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_THRESHOLD_MASK 0x1fffe 2854*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_THRESHOLD__SHIFT 0x1 2855*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_BLOCK_ID_MASK 0x3e0000 2856*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_BLOCK_ID__SHIFT 0x11 2857*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_SIGNAL_ID_MASK 0x3fc00000 2858*c59a5c48SFrançois Tigeot #define LCAC_CPL_CNTL__CPL_SIGNAL_ID__SHIFT 0x16 2859*c59a5c48SFrançois Tigeot #define LCAC_CPL_OVR_SEL__CPL_OVR_SEL_MASK 0xffffffff 2860*c59a5c48SFrançois Tigeot #define LCAC_CPL_OVR_SEL__CPL_OVR_SEL__SHIFT 0x0 2861*c59a5c48SFrançois Tigeot #define LCAC_CPL_OVR_VAL__CPL_OVR_VAL_MASK 0xffffffff 2862*c59a5c48SFrançois Tigeot #define LCAC_CPL_OVR_VAL__CPL_OVR_VAL__SHIFT 0x0 2863*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG0__TARGET_ADDR_MASK 0xffffffff 2864*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG0__TARGET_ADDR__SHIFT 0x0 2865*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__TIMER_EN_MASK 0x1 2866*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__TIMER_EN__SHIFT 0x0 2867*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__TIMER_INTERVAL_MASK 0x1fffe 2868*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__TIMER_INTERVAL__SHIFT 0x1 2869*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__INT_GEN_EN_MASK 0x20000 2870*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_CFG1__INT_GEN_EN__SHIFT 0x11 2871*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_CROSS_TRIGGER_MASK 0xf 2872*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_CROSS_TRIGGER__SHIFT 0x0 2873*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_PRE_SELF_REFRESH_MASK 0x10 2874*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_PRE_SELF_REFRESH__SHIFT 0x4 2875*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_REQ_NB_PSTATE_MASK 0x20 2876*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_REQ_NB_PSTATE__SHIFT 0x5 2877*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_FLUSH_ACK_TOGGLE_MASK 0x40 2878*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_FLUSH_ACK_TOGGLE__SHIFT 0x6 2879*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON_INB_WAKE_ACK_MASK 0x80 2880*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON_INB_WAKE_ACK__SHIFT 0x7 2881*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON3_CH0LINK_WAKE_ACK_MASK 0x100 2882*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON3_CH0LINK_WAKE_ACK__SHIFT 0x8 2883*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON3_CH1LINK_WAKE_ACK_MASK 0x200 2884*c59a5c48SFrançois Tigeot #define MISC_UNB_PWRMGT_DATA__NB_ON3_CH1LINK_WAKE_ACK__SHIFT 0x9 2885*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_AllCpusInCC6_MASK 0x1 2886*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_AllCpusInCC6__SHIFT 0x0 2887*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_HtcActive_MASK 0x2 2888*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_HtcActive__SHIFT 0x1 2889*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_SmuInt_MASK 0x4 2890*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_SmuInt__SHIFT 0x2 2891*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_SPARE_MASK 0xf8 2892*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_DATA__UNBPM_SPARE__SHIFT 0x3 2893*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__SAMPLING_TIMER_EN_MASK 0x1 2894*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__SAMPLING_TIMER_EN__SHIFT 0x0 2895*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__SAMPLING_TIMER_PERIOD_MASK 0x1fffe 2896*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__SAMPLING_TIMER_PERIOD__SHIFT 0x1 2897*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__DMA_ACTIVE_TRANS_CNT_MASK 0x60000 2898*c59a5c48SFrançois Tigeot #define DMA_ACTIVE_SAMPLER_CFG__DMA_ACTIVE_TRANS_CNT__SHIFT 0x11 2899*c59a5c48SFrançois Tigeot #define SOUTHBRIDGE_TYPE__DISCRETE_SB_MASK 0x1 2900*c59a5c48SFrançois Tigeot #define SOUTHBRIDGE_TYPE__DISCRETE_SB__SHIFT 0x0 2901*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllCpusInCC6_MASK 0x1 2902*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllCpusInCC6__SHIFT 0x0 2903*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_HtcActive_MASK 0x2 2904*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_HtcActive__SHIFT 0x1 2905*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_SmuInt_MASK 0x4 2906*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_SmuInt__SHIFT 0x2 2907*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_SmuIntSuperVminExit_MASK 0x8 2908*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_SmuIntSuperVminExit__SHIFT 0x3 2909*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_PreSelfRefresh_MASK 0x10 2910*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_PreSelfRefresh__SHIFT 0x4 2911*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_ReqNbPstate_MASK 0x20 2912*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_ReqNbPstate__SHIFT 0x5 2913*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllowNbPstate_MASK 0x40 2914*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllowNbPstate__SHIFT 0x6 2915*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllowSelfRefresh_MASK 0x80 2916*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_AllowSelfRefresh__SHIFT 0x7 2917*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_IntrWake_MASK 0x100 2918*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__PM_IntrWake__SHIFT 0x8 2919*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__SPARE_MASK 0xfe00 2920*c59a5c48SFrançois Tigeot #define GNBPM_SMU_PWRMGT_STATUS__SPARE__SHIFT 0x9 2921*c59a5c48SFrançois Tigeot #define ALLOW_SR_INTR_CTRL__ALLOW_SR_INTR_CTRL_MASK 0x3 2922*c59a5c48SFrançois Tigeot #define ALLOW_SR_INTR_CTRL__ALLOW_SR_INTR_CTRL__SHIFT 0x0 2923*c59a5c48SFrançois Tigeot #define GC_CAC_LKG_AGGR_LOWER__LKG_AGGR_31_0_MASK 0xffffffff 2924*c59a5c48SFrançois Tigeot #define GC_CAC_LKG_AGGR_LOWER__LKG_AGGR_31_0__SHIFT 0x0 2925*c59a5c48SFrançois Tigeot #define GC_CAC_LKG_AGGR_UPPER__LKG_AGGR_63_32_MASK 0xffffffff 2926*c59a5c48SFrançois Tigeot #define GC_CAC_LKG_AGGR_UPPER__LKG_AGGR_63_32__SHIFT 0x0 2927*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_0__WEIGHT_CU_SIG0_MASK 0xffff 2928*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_0__WEIGHT_CU_SIG0__SHIFT 0x0 2929*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_0__WEIGHT_CU_SIG1_MASK 0xffff0000 2930*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_0__WEIGHT_CU_SIG1__SHIFT 0x10 2931*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_1__WEIGHT_CU_SIG2_MASK 0xffff 2932*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_1__WEIGHT_CU_SIG2__SHIFT 0x0 2933*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_1__WEIGHT_CU_SIG3_MASK 0xffff0000 2934*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_1__WEIGHT_CU_SIG3__SHIFT 0x10 2935*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_2__WEIGHT_CU_SIG4_MASK 0xffff 2936*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_2__WEIGHT_CU_SIG4__SHIFT 0x0 2937*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_2__WEIGHT_CU_SIG5_MASK 0xffff0000 2938*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_2__WEIGHT_CU_SIG5__SHIFT 0x10 2939*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_3__WEIGHT_CU_SIG6_MASK 0xffff 2940*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_3__WEIGHT_CU_SIG6__SHIFT 0x0 2941*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_3__WEIGHT_CU_SIG7_MASK 0xffff0000 2942*c59a5c48SFrançois Tigeot #define GC_CAC_WEIGHT_CU_3__WEIGHT_CU_SIG7__SHIFT 0x10 2943*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU0__ACCUMULATOR_31_0_MASK 0xffffffff 2944*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU0__ACCUMULATOR_31_0__SHIFT 0x0 2945*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU1__ACCUMULATOR_31_0_MASK 0xffffffff 2946*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU1__ACCUMULATOR_31_0__SHIFT 0x0 2947*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU2__ACCUMULATOR_31_0_MASK 0xffffffff 2948*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU2__ACCUMULATOR_31_0__SHIFT 0x0 2949*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU3__ACCUMULATOR_31_0_MASK 0xffffffff 2950*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU3__ACCUMULATOR_31_0__SHIFT 0x0 2951*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU4__ACCUMULATOR_31_0_MASK 0xffffffff 2952*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU4__ACCUMULATOR_31_0__SHIFT 0x0 2953*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU5__ACCUMULATOR_31_0_MASK 0xffffffff 2954*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU5__ACCUMULATOR_31_0__SHIFT 0x0 2955*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU6__ACCUMULATOR_31_0_MASK 0xffffffff 2956*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU6__ACCUMULATOR_31_0__SHIFT 0x0 2957*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU7__ACCUMULATOR_31_0_MASK 0xffffffff 2958*c59a5c48SFrançois Tigeot #define GC_CAC_ACC_CU7__ACCUMULATOR_31_0__SHIFT 0x0 2959*c59a5c48SFrançois Tigeot #define GC_CAC_OVRD_CU__OVRRD_SELECT_MASK 0xffff 2960*c59a5c48SFrançois Tigeot #define GC_CAC_OVRD_CU__OVRRD_SELECT__SHIFT 0x0 2961*c59a5c48SFrançois Tigeot #define GC_CAC_OVRD_CU__OVRRD_VALUE_MASK 0xffff0000 2962*c59a5c48SFrançois Tigeot #define GC_CAC_OVRD_CU__OVRRD_VALUE__SHIFT 0x10 2963*c59a5c48SFrançois Tigeot 2964*c59a5c48SFrançois Tigeot #endif /* SMU_8_0_SH_MASK_H */ 2965