1 /* 2 * Copyright (C) 2017 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included 12 * in all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS 15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN 18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 20 */ 21 #ifndef _smuio_9_0_SH_MASK_HEADER 22 #define _smuio_9_0_SH_MASK_HEADER 23 24 25 // addressBlock: smuio_smuio_SmuSmuioDec 26 //ROM_CNTL 27 #define ROM_CNTL__CLOCK_GATING_EN__SHIFT 0x0 28 #define ROM_CNTL__CLOCK_GATING_EN_MASK 0x00000001L 29 //ROM_STATUS 30 #define ROM_STATUS__ROM_BUSY__SHIFT 0x0 31 #define ROM_STATUS__ROM_BUSY_MASK 0x00000001L 32 //CGTT_ROM_CLK_CTRL0 33 #define CGTT_ROM_CLK_CTRL0__ON_DELAY__SHIFT 0x0 34 #define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS__SHIFT 0x4 35 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1__SHIFT 0x1e 36 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0__SHIFT 0x1f 37 #define CGTT_ROM_CLK_CTRL0__ON_DELAY_MASK 0x0000000FL 38 #define CGTT_ROM_CLK_CTRL0__OFF_HYSTERESIS_MASK 0x00000FF0L 39 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE1_MASK 0x40000000L 40 #define CGTT_ROM_CLK_CTRL0__SOFT_OVERRIDE0_MASK 0x80000000L 41 //ROM_INDEX 42 #define ROM_INDEX__ROM_INDEX__SHIFT 0x0 43 #define ROM_INDEX__ROM_INDEX_MASK 0x00FFFFFFL 44 //ROM_DATA 45 #define ROM_DATA__ROM_DATA__SHIFT 0x0 46 #define ROM_DATA__ROM_DATA_MASK 0xFFFFFFFFL 47 //ROM_START 48 #define ROM_START__ROM_START__SHIFT 0x0 49 #define ROM_START__ROM_START_MASK 0x00FFFFFFL 50 //ROM_SW_CNTL 51 #define ROM_SW_CNTL__DATA_SIZE__SHIFT 0x0 52 #define ROM_SW_CNTL__COMMAND_SIZE__SHIFT 0x10 53 #define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE__SHIFT 0x12 54 #define ROM_SW_CNTL__DATA_SIZE_MASK 0x0000FFFFL 55 #define ROM_SW_CNTL__COMMAND_SIZE_MASK 0x00030000L 56 #define ROM_SW_CNTL__ROM_SW_RETURN_DATA_ENABLE_MASK 0x00040000L 57 //ROM_SW_STATUS 58 #define ROM_SW_STATUS__ROM_SW_DONE__SHIFT 0x0 59 #define ROM_SW_STATUS__ROM_SW_DONE_MASK 0x00000001L 60 //ROM_SW_COMMAND 61 #define ROM_SW_COMMAND__ROM_SW_INSTRUCTION__SHIFT 0x0 62 #define ROM_SW_COMMAND__ROM_SW_ADDRESS__SHIFT 0x8 63 #define ROM_SW_COMMAND__ROM_SW_INSTRUCTION_MASK 0x000000FFL 64 #define ROM_SW_COMMAND__ROM_SW_ADDRESS_MASK 0xFFFFFF00L 65 //ROM_SW_DATA_1 66 #define ROM_SW_DATA_1__ROM_SW_DATA__SHIFT 0x0 67 #define ROM_SW_DATA_1__ROM_SW_DATA_MASK 0xFFFFFFFFL 68 //ROM_SW_DATA_2 69 #define ROM_SW_DATA_2__ROM_SW_DATA__SHIFT 0x0 70 #define ROM_SW_DATA_2__ROM_SW_DATA_MASK 0xFFFFFFFFL 71 //ROM_SW_DATA_3 72 #define ROM_SW_DATA_3__ROM_SW_DATA__SHIFT 0x0 73 #define ROM_SW_DATA_3__ROM_SW_DATA_MASK 0xFFFFFFFFL 74 //ROM_SW_DATA_4 75 #define ROM_SW_DATA_4__ROM_SW_DATA__SHIFT 0x0 76 #define ROM_SW_DATA_4__ROM_SW_DATA_MASK 0xFFFFFFFFL 77 //ROM_SW_DATA_5 78 #define ROM_SW_DATA_5__ROM_SW_DATA__SHIFT 0x0 79 #define ROM_SW_DATA_5__ROM_SW_DATA_MASK 0xFFFFFFFFL 80 //ROM_SW_DATA_6 81 #define ROM_SW_DATA_6__ROM_SW_DATA__SHIFT 0x0 82 #define ROM_SW_DATA_6__ROM_SW_DATA_MASK 0xFFFFFFFFL 83 //ROM_SW_DATA_7 84 #define ROM_SW_DATA_7__ROM_SW_DATA__SHIFT 0x0 85 #define ROM_SW_DATA_7__ROM_SW_DATA_MASK 0xFFFFFFFFL 86 //ROM_SW_DATA_8 87 #define ROM_SW_DATA_8__ROM_SW_DATA__SHIFT 0x0 88 #define ROM_SW_DATA_8__ROM_SW_DATA_MASK 0xFFFFFFFFL 89 //ROM_SW_DATA_9 90 #define ROM_SW_DATA_9__ROM_SW_DATA__SHIFT 0x0 91 #define ROM_SW_DATA_9__ROM_SW_DATA_MASK 0xFFFFFFFFL 92 //ROM_SW_DATA_10 93 #define ROM_SW_DATA_10__ROM_SW_DATA__SHIFT 0x0 94 #define ROM_SW_DATA_10__ROM_SW_DATA_MASK 0xFFFFFFFFL 95 //ROM_SW_DATA_11 96 #define ROM_SW_DATA_11__ROM_SW_DATA__SHIFT 0x0 97 #define ROM_SW_DATA_11__ROM_SW_DATA_MASK 0xFFFFFFFFL 98 //ROM_SW_DATA_12 99 #define ROM_SW_DATA_12__ROM_SW_DATA__SHIFT 0x0 100 #define ROM_SW_DATA_12__ROM_SW_DATA_MASK 0xFFFFFFFFL 101 //ROM_SW_DATA_13 102 #define ROM_SW_DATA_13__ROM_SW_DATA__SHIFT 0x0 103 #define ROM_SW_DATA_13__ROM_SW_DATA_MASK 0xFFFFFFFFL 104 //ROM_SW_DATA_14 105 #define ROM_SW_DATA_14__ROM_SW_DATA__SHIFT 0x0 106 #define ROM_SW_DATA_14__ROM_SW_DATA_MASK 0xFFFFFFFFL 107 //ROM_SW_DATA_15 108 #define ROM_SW_DATA_15__ROM_SW_DATA__SHIFT 0x0 109 #define ROM_SW_DATA_15__ROM_SW_DATA_MASK 0xFFFFFFFFL 110 //ROM_SW_DATA_16 111 #define ROM_SW_DATA_16__ROM_SW_DATA__SHIFT 0x0 112 #define ROM_SW_DATA_16__ROM_SW_DATA_MASK 0xFFFFFFFFL 113 //ROM_SW_DATA_17 114 #define ROM_SW_DATA_17__ROM_SW_DATA__SHIFT 0x0 115 #define ROM_SW_DATA_17__ROM_SW_DATA_MASK 0xFFFFFFFFL 116 //ROM_SW_DATA_18 117 #define ROM_SW_DATA_18__ROM_SW_DATA__SHIFT 0x0 118 #define ROM_SW_DATA_18__ROM_SW_DATA_MASK 0xFFFFFFFFL 119 //ROM_SW_DATA_19 120 #define ROM_SW_DATA_19__ROM_SW_DATA__SHIFT 0x0 121 #define ROM_SW_DATA_19__ROM_SW_DATA_MASK 0xFFFFFFFFL 122 //ROM_SW_DATA_20 123 #define ROM_SW_DATA_20__ROM_SW_DATA__SHIFT 0x0 124 #define ROM_SW_DATA_20__ROM_SW_DATA_MASK 0xFFFFFFFFL 125 //ROM_SW_DATA_21 126 #define ROM_SW_DATA_21__ROM_SW_DATA__SHIFT 0x0 127 #define ROM_SW_DATA_21__ROM_SW_DATA_MASK 0xFFFFFFFFL 128 //ROM_SW_DATA_22 129 #define ROM_SW_DATA_22__ROM_SW_DATA__SHIFT 0x0 130 #define ROM_SW_DATA_22__ROM_SW_DATA_MASK 0xFFFFFFFFL 131 //ROM_SW_DATA_23 132 #define ROM_SW_DATA_23__ROM_SW_DATA__SHIFT 0x0 133 #define ROM_SW_DATA_23__ROM_SW_DATA_MASK 0xFFFFFFFFL 134 //ROM_SW_DATA_24 135 #define ROM_SW_DATA_24__ROM_SW_DATA__SHIFT 0x0 136 #define ROM_SW_DATA_24__ROM_SW_DATA_MASK 0xFFFFFFFFL 137 //ROM_SW_DATA_25 138 #define ROM_SW_DATA_25__ROM_SW_DATA__SHIFT 0x0 139 #define ROM_SW_DATA_25__ROM_SW_DATA_MASK 0xFFFFFFFFL 140 //ROM_SW_DATA_26 141 #define ROM_SW_DATA_26__ROM_SW_DATA__SHIFT 0x0 142 #define ROM_SW_DATA_26__ROM_SW_DATA_MASK 0xFFFFFFFFL 143 //ROM_SW_DATA_27 144 #define ROM_SW_DATA_27__ROM_SW_DATA__SHIFT 0x0 145 #define ROM_SW_DATA_27__ROM_SW_DATA_MASK 0xFFFFFFFFL 146 //ROM_SW_DATA_28 147 #define ROM_SW_DATA_28__ROM_SW_DATA__SHIFT 0x0 148 #define ROM_SW_DATA_28__ROM_SW_DATA_MASK 0xFFFFFFFFL 149 //ROM_SW_DATA_29 150 #define ROM_SW_DATA_29__ROM_SW_DATA__SHIFT 0x0 151 #define ROM_SW_DATA_29__ROM_SW_DATA_MASK 0xFFFFFFFFL 152 //ROM_SW_DATA_30 153 #define ROM_SW_DATA_30__ROM_SW_DATA__SHIFT 0x0 154 #define ROM_SW_DATA_30__ROM_SW_DATA_MASK 0xFFFFFFFFL 155 //ROM_SW_DATA_31 156 #define ROM_SW_DATA_31__ROM_SW_DATA__SHIFT 0x0 157 #define ROM_SW_DATA_31__ROM_SW_DATA_MASK 0xFFFFFFFFL 158 //ROM_SW_DATA_32 159 #define ROM_SW_DATA_32__ROM_SW_DATA__SHIFT 0x0 160 #define ROM_SW_DATA_32__ROM_SW_DATA_MASK 0xFFFFFFFFL 161 //ROM_SW_DATA_33 162 #define ROM_SW_DATA_33__ROM_SW_DATA__SHIFT 0x0 163 #define ROM_SW_DATA_33__ROM_SW_DATA_MASK 0xFFFFFFFFL 164 //ROM_SW_DATA_34 165 #define ROM_SW_DATA_34__ROM_SW_DATA__SHIFT 0x0 166 #define ROM_SW_DATA_34__ROM_SW_DATA_MASK 0xFFFFFFFFL 167 //ROM_SW_DATA_35 168 #define ROM_SW_DATA_35__ROM_SW_DATA__SHIFT 0x0 169 #define ROM_SW_DATA_35__ROM_SW_DATA_MASK 0xFFFFFFFFL 170 //ROM_SW_DATA_36 171 #define ROM_SW_DATA_36__ROM_SW_DATA__SHIFT 0x0 172 #define ROM_SW_DATA_36__ROM_SW_DATA_MASK 0xFFFFFFFFL 173 //ROM_SW_DATA_37 174 #define ROM_SW_DATA_37__ROM_SW_DATA__SHIFT 0x0 175 #define ROM_SW_DATA_37__ROM_SW_DATA_MASK 0xFFFFFFFFL 176 //ROM_SW_DATA_38 177 #define ROM_SW_DATA_38__ROM_SW_DATA__SHIFT 0x0 178 #define ROM_SW_DATA_38__ROM_SW_DATA_MASK 0xFFFFFFFFL 179 //ROM_SW_DATA_39 180 #define ROM_SW_DATA_39__ROM_SW_DATA__SHIFT 0x0 181 #define ROM_SW_DATA_39__ROM_SW_DATA_MASK 0xFFFFFFFFL 182 //ROM_SW_DATA_40 183 #define ROM_SW_DATA_40__ROM_SW_DATA__SHIFT 0x0 184 #define ROM_SW_DATA_40__ROM_SW_DATA_MASK 0xFFFFFFFFL 185 //ROM_SW_DATA_41 186 #define ROM_SW_DATA_41__ROM_SW_DATA__SHIFT 0x0 187 #define ROM_SW_DATA_41__ROM_SW_DATA_MASK 0xFFFFFFFFL 188 //ROM_SW_DATA_42 189 #define ROM_SW_DATA_42__ROM_SW_DATA__SHIFT 0x0 190 #define ROM_SW_DATA_42__ROM_SW_DATA_MASK 0xFFFFFFFFL 191 //ROM_SW_DATA_43 192 #define ROM_SW_DATA_43__ROM_SW_DATA__SHIFT 0x0 193 #define ROM_SW_DATA_43__ROM_SW_DATA_MASK 0xFFFFFFFFL 194 //ROM_SW_DATA_44 195 #define ROM_SW_DATA_44__ROM_SW_DATA__SHIFT 0x0 196 #define ROM_SW_DATA_44__ROM_SW_DATA_MASK 0xFFFFFFFFL 197 //ROM_SW_DATA_45 198 #define ROM_SW_DATA_45__ROM_SW_DATA__SHIFT 0x0 199 #define ROM_SW_DATA_45__ROM_SW_DATA_MASK 0xFFFFFFFFL 200 //ROM_SW_DATA_46 201 #define ROM_SW_DATA_46__ROM_SW_DATA__SHIFT 0x0 202 #define ROM_SW_DATA_46__ROM_SW_DATA_MASK 0xFFFFFFFFL 203 //ROM_SW_DATA_47 204 #define ROM_SW_DATA_47__ROM_SW_DATA__SHIFT 0x0 205 #define ROM_SW_DATA_47__ROM_SW_DATA_MASK 0xFFFFFFFFL 206 //ROM_SW_DATA_48 207 #define ROM_SW_DATA_48__ROM_SW_DATA__SHIFT 0x0 208 #define ROM_SW_DATA_48__ROM_SW_DATA_MASK 0xFFFFFFFFL 209 //ROM_SW_DATA_49 210 #define ROM_SW_DATA_49__ROM_SW_DATA__SHIFT 0x0 211 #define ROM_SW_DATA_49__ROM_SW_DATA_MASK 0xFFFFFFFFL 212 //ROM_SW_DATA_50 213 #define ROM_SW_DATA_50__ROM_SW_DATA__SHIFT 0x0 214 #define ROM_SW_DATA_50__ROM_SW_DATA_MASK 0xFFFFFFFFL 215 //ROM_SW_DATA_51 216 #define ROM_SW_DATA_51__ROM_SW_DATA__SHIFT 0x0 217 #define ROM_SW_DATA_51__ROM_SW_DATA_MASK 0xFFFFFFFFL 218 //ROM_SW_DATA_52 219 #define ROM_SW_DATA_52__ROM_SW_DATA__SHIFT 0x0 220 #define ROM_SW_DATA_52__ROM_SW_DATA_MASK 0xFFFFFFFFL 221 //ROM_SW_DATA_53 222 #define ROM_SW_DATA_53__ROM_SW_DATA__SHIFT 0x0 223 #define ROM_SW_DATA_53__ROM_SW_DATA_MASK 0xFFFFFFFFL 224 //ROM_SW_DATA_54 225 #define ROM_SW_DATA_54__ROM_SW_DATA__SHIFT 0x0 226 #define ROM_SW_DATA_54__ROM_SW_DATA_MASK 0xFFFFFFFFL 227 //ROM_SW_DATA_55 228 #define ROM_SW_DATA_55__ROM_SW_DATA__SHIFT 0x0 229 #define ROM_SW_DATA_55__ROM_SW_DATA_MASK 0xFFFFFFFFL 230 //ROM_SW_DATA_56 231 #define ROM_SW_DATA_56__ROM_SW_DATA__SHIFT 0x0 232 #define ROM_SW_DATA_56__ROM_SW_DATA_MASK 0xFFFFFFFFL 233 //ROM_SW_DATA_57 234 #define ROM_SW_DATA_57__ROM_SW_DATA__SHIFT 0x0 235 #define ROM_SW_DATA_57__ROM_SW_DATA_MASK 0xFFFFFFFFL 236 //ROM_SW_DATA_58 237 #define ROM_SW_DATA_58__ROM_SW_DATA__SHIFT 0x0 238 #define ROM_SW_DATA_58__ROM_SW_DATA_MASK 0xFFFFFFFFL 239 //ROM_SW_DATA_59 240 #define ROM_SW_DATA_59__ROM_SW_DATA__SHIFT 0x0 241 #define ROM_SW_DATA_59__ROM_SW_DATA_MASK 0xFFFFFFFFL 242 //ROM_SW_DATA_60 243 #define ROM_SW_DATA_60__ROM_SW_DATA__SHIFT 0x0 244 #define ROM_SW_DATA_60__ROM_SW_DATA_MASK 0xFFFFFFFFL 245 //ROM_SW_DATA_61 246 #define ROM_SW_DATA_61__ROM_SW_DATA__SHIFT 0x0 247 #define ROM_SW_DATA_61__ROM_SW_DATA_MASK 0xFFFFFFFFL 248 //ROM_SW_DATA_62 249 #define ROM_SW_DATA_62__ROM_SW_DATA__SHIFT 0x0 250 #define ROM_SW_DATA_62__ROM_SW_DATA_MASK 0xFFFFFFFFL 251 //ROM_SW_DATA_63 252 #define ROM_SW_DATA_63__ROM_SW_DATA__SHIFT 0x0 253 #define ROM_SW_DATA_63__ROM_SW_DATA_MASK 0xFFFFFFFFL 254 //ROM_SW_DATA_64 255 #define ROM_SW_DATA_64__ROM_SW_DATA__SHIFT 0x0 256 #define ROM_SW_DATA_64__ROM_SW_DATA_MASK 0xFFFFFFFFL 257 /* SMUSVI0_PLANE0_CURRENTVID */ 258 #define SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID__SHIFT 0x18 259 #define SMUSVI0_PLANE0_CURRENTVID__CURRENT_SVI0_PLANE0_VID_MASK 0xFF000000L 260 261 #endif 262