1*b843c749SSergey Zigachev /* 2*b843c749SSergey Zigachev * Copyright 2016 Advanced Micro Devices, Inc. 3*b843c749SSergey Zigachev * 4*b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a 5*b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"), 6*b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation 7*b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8*b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the 9*b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions: 10*b843c749SSergey Zigachev * 11*b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in 12*b843c749SSergey Zigachev * all copies or substantial portions of the Software. 13*b843c749SSergey Zigachev * 14*b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15*b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16*b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17*b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18*b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19*b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20*b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE. 21*b843c749SSergey Zigachev * 22*b843c749SSergey Zigachev */ 23*b843c749SSergey Zigachev 24*b843c749SSergey Zigachev #ifndef SMU9_H 25*b843c749SSergey Zigachev #define SMU9_H 26*b843c749SSergey Zigachev 27*b843c749SSergey Zigachev #pragma pack(push, 1) 28*b843c749SSergey Zigachev 29*b843c749SSergey Zigachev #define ENABLE_DEBUG_FEATURES 30*b843c749SSergey Zigachev 31*b843c749SSergey Zigachev /* Feature Control Defines */ 32*b843c749SSergey Zigachev #define FEATURE_DPM_PREFETCHER_BIT 0 33*b843c749SSergey Zigachev #define FEATURE_DPM_GFXCLK_BIT 1 34*b843c749SSergey Zigachev #define FEATURE_DPM_UCLK_BIT 2 35*b843c749SSergey Zigachev #define FEATURE_DPM_SOCCLK_BIT 3 36*b843c749SSergey Zigachev #define FEATURE_DPM_UVD_BIT 4 37*b843c749SSergey Zigachev #define FEATURE_DPM_VCE_BIT 5 38*b843c749SSergey Zigachev #define FEATURE_ULV_BIT 6 39*b843c749SSergey Zigachev #define FEATURE_DPM_MP0CLK_BIT 7 40*b843c749SSergey Zigachev #define FEATURE_DPM_LINK_BIT 8 41*b843c749SSergey Zigachev #define FEATURE_DPM_DCEFCLK_BIT 9 42*b843c749SSergey Zigachev #define FEATURE_AVFS_BIT 10 43*b843c749SSergey Zigachev #define FEATURE_DS_GFXCLK_BIT 11 44*b843c749SSergey Zigachev #define FEATURE_DS_SOCCLK_BIT 12 45*b843c749SSergey Zigachev #define FEATURE_DS_LCLK_BIT 13 46*b843c749SSergey Zigachev #define FEATURE_PPT_BIT 14 47*b843c749SSergey Zigachev #define FEATURE_TDC_BIT 15 48*b843c749SSergey Zigachev #define FEATURE_THERMAL_BIT 16 49*b843c749SSergey Zigachev #define FEATURE_GFX_PER_CU_CG_BIT 17 50*b843c749SSergey Zigachev #define FEATURE_RM_BIT 18 51*b843c749SSergey Zigachev #define FEATURE_DS_DCEFCLK_BIT 19 52*b843c749SSergey Zigachev #define FEATURE_ACDC_BIT 20 53*b843c749SSergey Zigachev #define FEATURE_VR0HOT_BIT 21 54*b843c749SSergey Zigachev #define FEATURE_VR1HOT_BIT 22 55*b843c749SSergey Zigachev #define FEATURE_FW_CTF_BIT 23 56*b843c749SSergey Zigachev #define FEATURE_LED_DISPLAY_BIT 24 57*b843c749SSergey Zigachev #define FEATURE_FAN_CONTROL_BIT 25 58*b843c749SSergey Zigachev #define FEATURE_FAST_PPT_BIT 26 59*b843c749SSergey Zigachev #define FEATURE_GFX_EDC_BIT 27 60*b843c749SSergey Zigachev #define FEATURE_ACG_BIT 28 61*b843c749SSergey Zigachev #define FEATURE_PCC_LIMIT_CONTROL_BIT 29 62*b843c749SSergey Zigachev #define FEATURE_SPARE_30_BIT 30 63*b843c749SSergey Zigachev #define FEATURE_SPARE_31_BIT 31 64*b843c749SSergey Zigachev 65*b843c749SSergey Zigachev #define NUM_FEATURES 32 66*b843c749SSergey Zigachev 67*b843c749SSergey Zigachev #define FFEATURE_DPM_PREFETCHER_MASK (1 << FEATURE_DPM_PREFETCHER_BIT ) 68*b843c749SSergey Zigachev #define FFEATURE_DPM_GFXCLK_MASK (1 << FEATURE_DPM_GFXCLK_BIT ) 69*b843c749SSergey Zigachev #define FFEATURE_DPM_UCLK_MASK (1 << FEATURE_DPM_UCLK_BIT ) 70*b843c749SSergey Zigachev #define FFEATURE_DPM_SOCCLK_MASK (1 << FEATURE_DPM_SOCCLK_BIT ) 71*b843c749SSergey Zigachev #define FFEATURE_DPM_UVD_MASK (1 << FEATURE_DPM_UVD_BIT ) 72*b843c749SSergey Zigachev #define FFEATURE_DPM_VCE_MASK (1 << FEATURE_DPM_VCE_BIT ) 73*b843c749SSergey Zigachev #define FFEATURE_ULV_MASK (1 << FEATURE_ULV_BIT ) 74*b843c749SSergey Zigachev #define FFEATURE_DPM_MP0CLK_MASK (1 << FEATURE_DPM_MP0CLK_BIT ) 75*b843c749SSergey Zigachev #define FFEATURE_DPM_LINK_MASK (1 << FEATURE_DPM_LINK_BIT ) 76*b843c749SSergey Zigachev #define FFEATURE_DPM_DCEFCLK_MASK (1 << FEATURE_DPM_DCEFCLK_BIT ) 77*b843c749SSergey Zigachev #define FFEATURE_AVFS_MASK (1 << FEATURE_AVFS_BIT ) 78*b843c749SSergey Zigachev #define FFEATURE_DS_GFXCLK_MASK (1 << FEATURE_DS_GFXCLK_BIT ) 79*b843c749SSergey Zigachev #define FFEATURE_DS_SOCCLK_MASK (1 << FEATURE_DS_SOCCLK_BIT ) 80*b843c749SSergey Zigachev #define FFEATURE_DS_LCLK_MASK (1 << FEATURE_DS_LCLK_BIT ) 81*b843c749SSergey Zigachev #define FFEATURE_PPT_MASK (1 << FEATURE_PPT_BIT ) 82*b843c749SSergey Zigachev #define FFEATURE_TDC_MASK (1 << FEATURE_TDC_BIT ) 83*b843c749SSergey Zigachev #define FFEATURE_THERMAL_MASK (1 << FEATURE_THERMAL_BIT ) 84*b843c749SSergey Zigachev #define FFEATURE_GFX_PER_CU_CG_MASK (1 << FEATURE_GFX_PER_CU_CG_BIT ) 85*b843c749SSergey Zigachev #define FFEATURE_RM_MASK (1 << FEATURE_RM_BIT ) 86*b843c749SSergey Zigachev #define FFEATURE_DS_DCEFCLK_MASK (1 << FEATURE_DS_DCEFCLK_BIT ) 87*b843c749SSergey Zigachev #define FFEATURE_ACDC_MASK (1 << FEATURE_ACDC_BIT ) 88*b843c749SSergey Zigachev #define FFEATURE_VR0HOT_MASK (1 << FEATURE_VR0HOT_BIT ) 89*b843c749SSergey Zigachev #define FFEATURE_VR1HOT_MASK (1 << FEATURE_VR1HOT_BIT ) 90*b843c749SSergey Zigachev #define FFEATURE_FW_CTF_MASK (1 << FEATURE_FW_CTF_BIT ) 91*b843c749SSergey Zigachev #define FFEATURE_LED_DISPLAY_MASK (1 << FEATURE_LED_DISPLAY_BIT ) 92*b843c749SSergey Zigachev #define FFEATURE_FAN_CONTROL_MASK (1 << FEATURE_FAN_CONTROL_BIT ) 93*b843c749SSergey Zigachev 94*b843c749SSergey Zigachev #define FEATURE_FAST_PPT_MASK (1 << FAST_PPT_BIT ) 95*b843c749SSergey Zigachev #define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT ) 96*b843c749SSergey Zigachev #define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT ) 97*b843c749SSergey Zigachev #define FEATURE_PCC_LIMIT_CONTROL_MASK (1 << FEATURE_PCC_LIMIT_CONTROL_BIT ) 98*b843c749SSergey Zigachev #define FFEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT ) 99*b843c749SSergey Zigachev #define FFEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT ) 100*b843c749SSergey Zigachev /* Workload types */ 101*b843c749SSergey Zigachev #define WORKLOAD_VR_BIT 0 102*b843c749SSergey Zigachev #define WORKLOAD_FRTC_BIT 1 103*b843c749SSergey Zigachev #define WORKLOAD_VIDEO_BIT 2 104*b843c749SSergey Zigachev #define WORKLOAD_COMPUTE_BIT 3 105*b843c749SSergey Zigachev #define NUM_WORKLOADS 4 106*b843c749SSergey Zigachev 107*b843c749SSergey Zigachev /* ULV Client Masks */ 108*b843c749SSergey Zigachev #define ULV_CLIENT_RLC_MASK 0x00000001 109*b843c749SSergey Zigachev #define ULV_CLIENT_UVD_MASK 0x00000002 110*b843c749SSergey Zigachev #define ULV_CLIENT_VCE_MASK 0x00000004 111*b843c749SSergey Zigachev #define ULV_CLIENT_SDMA0_MASK 0x00000008 112*b843c749SSergey Zigachev #define ULV_CLIENT_SDMA1_MASK 0x00000010 113*b843c749SSergey Zigachev #define ULV_CLIENT_JPEG_MASK 0x00000020 114*b843c749SSergey Zigachev #define ULV_CLIENT_GFXCLK_DPM_MASK 0x00000040 115*b843c749SSergey Zigachev #define ULV_CLIENT_UVD_DPM_MASK 0x00000080 116*b843c749SSergey Zigachev #define ULV_CLIENT_VCE_DPM_MASK 0x00000100 117*b843c749SSergey Zigachev #define ULV_CLIENT_MP0CLK_DPM_MASK 0x00000200 118*b843c749SSergey Zigachev #define ULV_CLIENT_UCLK_DPM_MASK 0x00000400 119*b843c749SSergey Zigachev #define ULV_CLIENT_SOCCLK_DPM_MASK 0x00000800 120*b843c749SSergey Zigachev #define ULV_CLIENT_DCEFCLK_DPM_MASK 0x00001000 121*b843c749SSergey Zigachev 122*b843c749SSergey Zigachev typedef struct { 123*b843c749SSergey Zigachev /* MP1_EXT_SCRATCH0 */ 124*b843c749SSergey Zigachev uint32_t CurrLevel_GFXCLK : 4; 125*b843c749SSergey Zigachev uint32_t CurrLevel_UVD : 4; 126*b843c749SSergey Zigachev uint32_t CurrLevel_VCE : 4; 127*b843c749SSergey Zigachev uint32_t CurrLevel_LCLK : 4; 128*b843c749SSergey Zigachev uint32_t CurrLevel_MP0CLK : 4; 129*b843c749SSergey Zigachev uint32_t CurrLevel_UCLK : 4; 130*b843c749SSergey Zigachev uint32_t CurrLevel_SOCCLK : 4; 131*b843c749SSergey Zigachev uint32_t CurrLevel_DCEFCLK : 4; 132*b843c749SSergey Zigachev /* MP1_EXT_SCRATCH1 */ 133*b843c749SSergey Zigachev uint32_t TargLevel_GFXCLK : 4; 134*b843c749SSergey Zigachev uint32_t TargLevel_UVD : 4; 135*b843c749SSergey Zigachev uint32_t TargLevel_VCE : 4; 136*b843c749SSergey Zigachev uint32_t TargLevel_LCLK : 4; 137*b843c749SSergey Zigachev uint32_t TargLevel_MP0CLK : 4; 138*b843c749SSergey Zigachev uint32_t TargLevel_UCLK : 4; 139*b843c749SSergey Zigachev uint32_t TargLevel_SOCCLK : 4; 140*b843c749SSergey Zigachev uint32_t TargLevel_DCEFCLK : 4; 141*b843c749SSergey Zigachev /* MP1_EXT_SCRATCH2-7 */ 142*b843c749SSergey Zigachev uint32_t Reserved[6]; 143*b843c749SSergey Zigachev } FwStatus_t; 144*b843c749SSergey Zigachev 145*b843c749SSergey Zigachev #pragma pack(pop) 146*b843c749SSergey Zigachev 147*b843c749SSergey Zigachev #endif 148*b843c749SSergey Zigachev 149