1b843c749SSergey Zigachev /*
2b843c749SSergey Zigachev * Copyright 2015 Advanced Micro Devices, Inc.
3b843c749SSergey Zigachev *
4b843c749SSergey Zigachev * Permission is hereby granted, free of charge, to any person obtaining a
5b843c749SSergey Zigachev * copy of this software and associated documentation files (the "Software"),
6b843c749SSergey Zigachev * to deal in the Software without restriction, including without limitation
7b843c749SSergey Zigachev * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8b843c749SSergey Zigachev * and/or sell copies of the Software, and to permit persons to whom the
9b843c749SSergey Zigachev * Software is furnished to do so, subject to the following conditions:
10b843c749SSergey Zigachev *
11b843c749SSergey Zigachev * The above copyright notice and this permission notice shall be included in
12b843c749SSergey Zigachev * all copies or substantial portions of the Software.
13b843c749SSergey Zigachev *
14b843c749SSergey Zigachev * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15b843c749SSergey Zigachev * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16b843c749SSergey Zigachev * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17b843c749SSergey Zigachev * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18b843c749SSergey Zigachev * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19b843c749SSergey Zigachev * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20b843c749SSergey Zigachev * OTHER DEALINGS IN THE SOFTWARE.
21b843c749SSergey Zigachev *
22b843c749SSergey Zigachev */
23b843c749SSergey Zigachev
24b843c749SSergey Zigachev
25b843c749SSergey Zigachev #include "pp_debug.h"
26b843c749SSergey Zigachev #include "smumgr.h"
27b843c749SSergey Zigachev #include "smu_ucode_xfer_vi.h"
28b843c749SSergey Zigachev #include "ppatomctrl.h"
29b843c749SSergey Zigachev #include "cgs_common.h"
30b843c749SSergey Zigachev #include "smu7_ppsmc.h"
31b843c749SSergey Zigachev #include "smu7_smumgr.h"
32b843c749SSergey Zigachev #include "smu7_common.h"
33b843c749SSergey Zigachev
34b843c749SSergey Zigachev #include "polaris10_pwrvirus.h"
35b843c749SSergey Zigachev
36b843c749SSergey Zigachev #define SMU7_SMC_SIZE 0x20000
37b843c749SSergey Zigachev
smu7_set_smc_sram_address(struct pp_hwmgr * hwmgr,uint32_t smc_addr,uint32_t limit)38b843c749SSergey Zigachev static int smu7_set_smc_sram_address(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t limit)
39b843c749SSergey Zigachev {
40b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((0 == (3 & smc_addr)), "SMC address must be 4 byte aligned.", return -EINVAL);
41b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((limit > (smc_addr + 3)), "SMC addr is beyond the SMC RAM area.", return -EINVAL);
42b843c749SSergey Zigachev
43b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, smc_addr);
44b843c749SSergey Zigachev PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0); /* on ci, SMC_IND_ACCESS_CNTL is different */
45b843c749SSergey Zigachev return 0;
46b843c749SSergey Zigachev }
47b843c749SSergey Zigachev
48b843c749SSergey Zigachev
smu7_copy_bytes_from_smc(struct pp_hwmgr * hwmgr,uint32_t smc_start_address,uint32_t * dest,uint32_t byte_count,uint32_t limit)49b843c749SSergey Zigachev int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address, uint32_t *dest, uint32_t byte_count, uint32_t limit)
50b843c749SSergey Zigachev {
51b843c749SSergey Zigachev uint32_t data;
52b843c749SSergey Zigachev uint32_t addr;
53b843c749SSergey Zigachev uint8_t *dest_byte;
54b843c749SSergey Zigachev uint8_t i, data_byte[4] = {0};
55b843c749SSergey Zigachev uint32_t *pdata = (uint32_t *)&data_byte;
56b843c749SSergey Zigachev
57b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((0 == (3 & smc_start_address)), "SMC address must be 4 byte aligned.", return -EINVAL);
58b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((limit > (smc_start_address + byte_count)), "SMC address is beyond the SMC RAM area.", return -EINVAL);
59b843c749SSergey Zigachev
60b843c749SSergey Zigachev addr = smc_start_address;
61b843c749SSergey Zigachev
62b843c749SSergey Zigachev while (byte_count >= 4) {
63b843c749SSergey Zigachev smu7_read_smc_sram_dword(hwmgr, addr, &data, limit);
64b843c749SSergey Zigachev
65b843c749SSergey Zigachev *dest = PP_SMC_TO_HOST_UL(data);
66b843c749SSergey Zigachev
67b843c749SSergey Zigachev dest += 1;
68b843c749SSergey Zigachev byte_count -= 4;
69b843c749SSergey Zigachev addr += 4;
70b843c749SSergey Zigachev }
71b843c749SSergey Zigachev
72b843c749SSergey Zigachev if (byte_count) {
73b843c749SSergey Zigachev smu7_read_smc_sram_dword(hwmgr, addr, &data, limit);
74b843c749SSergey Zigachev *pdata = PP_SMC_TO_HOST_UL(data);
75b843c749SSergey Zigachev /* Cast dest into byte type in dest_byte. This way, we don't overflow if the allocated memory is not 4-byte aligned. */
76b843c749SSergey Zigachev dest_byte = (uint8_t *)dest;
77b843c749SSergey Zigachev for (i = 0; i < byte_count; i++)
78b843c749SSergey Zigachev dest_byte[i] = data_byte[i];
79b843c749SSergey Zigachev }
80b843c749SSergey Zigachev
81b843c749SSergey Zigachev return 0;
82b843c749SSergey Zigachev }
83b843c749SSergey Zigachev
84b843c749SSergey Zigachev
smu7_copy_bytes_to_smc(struct pp_hwmgr * hwmgr,uint32_t smc_start_address,const uint8_t * src,uint32_t byte_count,uint32_t limit)85b843c749SSergey Zigachev int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
86b843c749SSergey Zigachev const uint8_t *src, uint32_t byte_count, uint32_t limit)
87b843c749SSergey Zigachev {
88b843c749SSergey Zigachev int result;
89b843c749SSergey Zigachev uint32_t data = 0;
90b843c749SSergey Zigachev uint32_t original_data;
91b843c749SSergey Zigachev uint32_t addr = 0;
92b843c749SSergey Zigachev uint32_t extra_shift;
93b843c749SSergey Zigachev
94b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((0 == (3 & smc_start_address)), "SMC address must be 4 byte aligned.", return -EINVAL);
95b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((limit > (smc_start_address + byte_count)), "SMC address is beyond the SMC RAM area.", return -EINVAL);
96b843c749SSergey Zigachev
97b843c749SSergey Zigachev addr = smc_start_address;
98b843c749SSergey Zigachev
99b843c749SSergey Zigachev while (byte_count >= 4) {
100b843c749SSergey Zigachev /* Bytes are written into the SMC addres space with the MSB first. */
101b843c749SSergey Zigachev data = src[0] * 0x1000000 + src[1] * 0x10000 + src[2] * 0x100 + src[3];
102b843c749SSergey Zigachev
103b843c749SSergey Zigachev result = smu7_set_smc_sram_address(hwmgr, addr, limit);
104b843c749SSergey Zigachev
105b843c749SSergey Zigachev if (0 != result)
106b843c749SSergey Zigachev return result;
107b843c749SSergey Zigachev
108b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data);
109b843c749SSergey Zigachev
110b843c749SSergey Zigachev src += 4;
111b843c749SSergey Zigachev byte_count -= 4;
112b843c749SSergey Zigachev addr += 4;
113b843c749SSergey Zigachev }
114b843c749SSergey Zigachev
115b843c749SSergey Zigachev if (0 != byte_count) {
116b843c749SSergey Zigachev
117b843c749SSergey Zigachev data = 0;
118b843c749SSergey Zigachev
119b843c749SSergey Zigachev result = smu7_set_smc_sram_address(hwmgr, addr, limit);
120b843c749SSergey Zigachev
121b843c749SSergey Zigachev if (0 != result)
122b843c749SSergey Zigachev return result;
123b843c749SSergey Zigachev
124b843c749SSergey Zigachev
125b843c749SSergey Zigachev original_data = cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);
126b843c749SSergey Zigachev
127b843c749SSergey Zigachev extra_shift = 8 * (4 - byte_count);
128b843c749SSergey Zigachev
129b843c749SSergey Zigachev while (byte_count > 0) {
130b843c749SSergey Zigachev /* Bytes are written into the SMC addres space with the MSB first. */
131b843c749SSergey Zigachev data = (0x100 * data) + *src++;
132b843c749SSergey Zigachev byte_count--;
133b843c749SSergey Zigachev }
134b843c749SSergey Zigachev
135b843c749SSergey Zigachev data <<= extra_shift;
136b843c749SSergey Zigachev
137b843c749SSergey Zigachev data |= (original_data & ~((~0UL) << extra_shift));
138b843c749SSergey Zigachev
139b843c749SSergey Zigachev result = smu7_set_smc_sram_address(hwmgr, addr, limit);
140b843c749SSergey Zigachev
141b843c749SSergey Zigachev if (0 != result)
142b843c749SSergey Zigachev return result;
143b843c749SSergey Zigachev
144b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, data);
145b843c749SSergey Zigachev }
146b843c749SSergey Zigachev
147b843c749SSergey Zigachev return 0;
148b843c749SSergey Zigachev }
149b843c749SSergey Zigachev
150b843c749SSergey Zigachev
smu7_program_jump_on_start(struct pp_hwmgr * hwmgr)151b843c749SSergey Zigachev int smu7_program_jump_on_start(struct pp_hwmgr *hwmgr)
152b843c749SSergey Zigachev {
153b843c749SSergey Zigachev static const unsigned char data[4] = { 0xE0, 0x00, 0x80, 0x40 };
154b843c749SSergey Zigachev
155b843c749SSergey Zigachev smu7_copy_bytes_to_smc(hwmgr, 0x0, data, 4, sizeof(data)+1);
156b843c749SSergey Zigachev
157b843c749SSergey Zigachev return 0;
158b843c749SSergey Zigachev }
159b843c749SSergey Zigachev
smu7_is_smc_ram_running(struct pp_hwmgr * hwmgr)160b843c749SSergey Zigachev bool smu7_is_smc_ram_running(struct pp_hwmgr *hwmgr)
161b843c749SSergey Zigachev {
162b843c749SSergey Zigachev return ((0 == PHM_READ_VFPF_INDIRECT_FIELD(hwmgr->device, CGS_IND_REG__SMC, SMC_SYSCON_CLOCK_CNTL_0, ck_disable))
163b843c749SSergey Zigachev && (0x20100 <= cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixSMC_PC_C)));
164b843c749SSergey Zigachev }
165b843c749SSergey Zigachev
smu7_send_msg_to_smc(struct pp_hwmgr * hwmgr,uint16_t msg)166b843c749SSergey Zigachev int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
167b843c749SSergey Zigachev {
168b843c749SSergey Zigachev int ret;
169b843c749SSergey Zigachev
170b843c749SSergey Zigachev PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
171b843c749SSergey Zigachev
172b843c749SSergey Zigachev ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
173b843c749SSergey Zigachev
174b843c749SSergey Zigachev if (ret == 0xFE)
175b843c749SSergey Zigachev pr_debug("last message was not supported\n");
176b843c749SSergey Zigachev else if (ret != 1)
177b843c749SSergey Zigachev pr_info("\n last message was failed ret is %d\n", ret);
178b843c749SSergey Zigachev
179b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_RESP_0, 0);
180b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
181b843c749SSergey Zigachev
182b843c749SSergey Zigachev PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
183b843c749SSergey Zigachev
184b843c749SSergey Zigachev ret = PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP);
185b843c749SSergey Zigachev
186b843c749SSergey Zigachev if (ret == 0xFE)
187b843c749SSergey Zigachev pr_debug("message %x was not supported\n", msg);
188b843c749SSergey Zigachev else if (ret != 1)
189b843c749SSergey Zigachev pr_info("\n failed to send message %x ret is %d \n", msg, ret);
190b843c749SSergey Zigachev
191b843c749SSergey Zigachev return 0;
192b843c749SSergey Zigachev }
193b843c749SSergey Zigachev
smu7_send_msg_to_smc_without_waiting(struct pp_hwmgr * hwmgr,uint16_t msg)194b843c749SSergey Zigachev int smu7_send_msg_to_smc_without_waiting(struct pp_hwmgr *hwmgr, uint16_t msg)
195b843c749SSergey Zigachev {
196b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, msg);
197b843c749SSergey Zigachev
198b843c749SSergey Zigachev return 0;
199b843c749SSergey Zigachev }
200b843c749SSergey Zigachev
smu7_send_msg_to_smc_with_parameter(struct pp_hwmgr * hwmgr,uint16_t msg,uint32_t parameter)201b843c749SSergey Zigachev int smu7_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter)
202b843c749SSergey Zigachev {
203b843c749SSergey Zigachev PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
204b843c749SSergey Zigachev
205b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
206b843c749SSergey Zigachev
207b843c749SSergey Zigachev return smu7_send_msg_to_smc(hwmgr, msg);
208b843c749SSergey Zigachev }
209b843c749SSergey Zigachev
smu7_send_msg_to_smc_with_parameter_without_waiting(struct pp_hwmgr * hwmgr,uint16_t msg,uint32_t parameter)210b843c749SSergey Zigachev int smu7_send_msg_to_smc_with_parameter_without_waiting(struct pp_hwmgr *hwmgr, uint16_t msg, uint32_t parameter)
211b843c749SSergey Zigachev {
212b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, parameter);
213b843c749SSergey Zigachev
214b843c749SSergey Zigachev return smu7_send_msg_to_smc_without_waiting(hwmgr, msg);
215b843c749SSergey Zigachev }
216b843c749SSergey Zigachev
smu7_send_msg_to_smc_offset(struct pp_hwmgr * hwmgr)217b843c749SSergey Zigachev int smu7_send_msg_to_smc_offset(struct pp_hwmgr *hwmgr)
218b843c749SSergey Zigachev {
219b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MSG_ARG_0, 0x20000);
220b843c749SSergey Zigachev
221b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_MESSAGE_0, PPSMC_MSG_Test);
222b843c749SSergey Zigachev
223b843c749SSergey Zigachev PHM_WAIT_FIELD_UNEQUAL(hwmgr, SMC_RESP_0, SMC_RESP, 0);
224b843c749SSergey Zigachev
225b843c749SSergey Zigachev if (1 != PHM_READ_FIELD(hwmgr->device, SMC_RESP_0, SMC_RESP))
226b843c749SSergey Zigachev pr_info("Failed to send Message.\n");
227b843c749SSergey Zigachev
228b843c749SSergey Zigachev return 0;
229b843c749SSergey Zigachev }
230b843c749SSergey Zigachev
smu7_convert_fw_type_to_cgs(uint32_t fw_type)231b843c749SSergey Zigachev enum cgs_ucode_id smu7_convert_fw_type_to_cgs(uint32_t fw_type)
232b843c749SSergey Zigachev {
233b843c749SSergey Zigachev enum cgs_ucode_id result = CGS_UCODE_ID_MAXIMUM;
234b843c749SSergey Zigachev
235b843c749SSergey Zigachev switch (fw_type) {
236b843c749SSergey Zigachev case UCODE_ID_SMU:
237b843c749SSergey Zigachev result = CGS_UCODE_ID_SMU;
238b843c749SSergey Zigachev break;
239b843c749SSergey Zigachev case UCODE_ID_SMU_SK:
240b843c749SSergey Zigachev result = CGS_UCODE_ID_SMU_SK;
241b843c749SSergey Zigachev break;
242b843c749SSergey Zigachev case UCODE_ID_SDMA0:
243b843c749SSergey Zigachev result = CGS_UCODE_ID_SDMA0;
244b843c749SSergey Zigachev break;
245b843c749SSergey Zigachev case UCODE_ID_SDMA1:
246b843c749SSergey Zigachev result = CGS_UCODE_ID_SDMA1;
247b843c749SSergey Zigachev break;
248b843c749SSergey Zigachev case UCODE_ID_CP_CE:
249b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_CE;
250b843c749SSergey Zigachev break;
251b843c749SSergey Zigachev case UCODE_ID_CP_PFP:
252b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_PFP;
253b843c749SSergey Zigachev break;
254b843c749SSergey Zigachev case UCODE_ID_CP_ME:
255b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_ME;
256b843c749SSergey Zigachev break;
257b843c749SSergey Zigachev case UCODE_ID_CP_MEC:
258b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_MEC;
259b843c749SSergey Zigachev break;
260b843c749SSergey Zigachev case UCODE_ID_CP_MEC_JT1:
261b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_MEC_JT1;
262b843c749SSergey Zigachev break;
263b843c749SSergey Zigachev case UCODE_ID_CP_MEC_JT2:
264b843c749SSergey Zigachev result = CGS_UCODE_ID_CP_MEC_JT2;
265b843c749SSergey Zigachev break;
266b843c749SSergey Zigachev case UCODE_ID_RLC_G:
267b843c749SSergey Zigachev result = CGS_UCODE_ID_RLC_G;
268b843c749SSergey Zigachev break;
269b843c749SSergey Zigachev case UCODE_ID_MEC_STORAGE:
270b843c749SSergey Zigachev result = CGS_UCODE_ID_STORAGE;
271b843c749SSergey Zigachev break;
272b843c749SSergey Zigachev default:
273b843c749SSergey Zigachev break;
274b843c749SSergey Zigachev }
275b843c749SSergey Zigachev
276b843c749SSergey Zigachev return result;
277b843c749SSergey Zigachev }
278b843c749SSergey Zigachev
279b843c749SSergey Zigachev
smu7_read_smc_sram_dword(struct pp_hwmgr * hwmgr,uint32_t smc_addr,uint32_t * value,uint32_t limit)280b843c749SSergey Zigachev int smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t *value, uint32_t limit)
281b843c749SSergey Zigachev {
282b843c749SSergey Zigachev int result;
283b843c749SSergey Zigachev
284b843c749SSergey Zigachev result = smu7_set_smc_sram_address(hwmgr, smc_addr, limit);
285b843c749SSergey Zigachev
286b843c749SSergey Zigachev *value = result ? 0 : cgs_read_register(hwmgr->device, mmSMC_IND_DATA_11);
287b843c749SSergey Zigachev
288b843c749SSergey Zigachev return result;
289b843c749SSergey Zigachev }
290b843c749SSergey Zigachev
smu7_write_smc_sram_dword(struct pp_hwmgr * hwmgr,uint32_t smc_addr,uint32_t value,uint32_t limit)291b843c749SSergey Zigachev int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr, uint32_t value, uint32_t limit)
292b843c749SSergey Zigachev {
293b843c749SSergey Zigachev int result;
294b843c749SSergey Zigachev
295b843c749SSergey Zigachev result = smu7_set_smc_sram_address(hwmgr, smc_addr, limit);
296b843c749SSergey Zigachev
297b843c749SSergey Zigachev if (result)
298b843c749SSergey Zigachev return result;
299b843c749SSergey Zigachev
300b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, value);
301b843c749SSergey Zigachev
302b843c749SSergey Zigachev return 0;
303b843c749SSergey Zigachev }
304b843c749SSergey Zigachev
305b843c749SSergey Zigachev /* Convert the firmware type to SMU type mask. For MEC, we need to check all MEC related type */
306b843c749SSergey Zigachev
smu7_get_mask_for_firmware_type(uint32_t fw_type)307b843c749SSergey Zigachev static uint32_t smu7_get_mask_for_firmware_type(uint32_t fw_type)
308b843c749SSergey Zigachev {
309b843c749SSergey Zigachev uint32_t result = 0;
310b843c749SSergey Zigachev
311b843c749SSergey Zigachev switch (fw_type) {
312b843c749SSergey Zigachev case UCODE_ID_SDMA0:
313b843c749SSergey Zigachev result = UCODE_ID_SDMA0_MASK;
314b843c749SSergey Zigachev break;
315b843c749SSergey Zigachev case UCODE_ID_SDMA1:
316b843c749SSergey Zigachev result = UCODE_ID_SDMA1_MASK;
317b843c749SSergey Zigachev break;
318b843c749SSergey Zigachev case UCODE_ID_CP_CE:
319b843c749SSergey Zigachev result = UCODE_ID_CP_CE_MASK;
320b843c749SSergey Zigachev break;
321b843c749SSergey Zigachev case UCODE_ID_CP_PFP:
322b843c749SSergey Zigachev result = UCODE_ID_CP_PFP_MASK;
323b843c749SSergey Zigachev break;
324b843c749SSergey Zigachev case UCODE_ID_CP_ME:
325b843c749SSergey Zigachev result = UCODE_ID_CP_ME_MASK;
326b843c749SSergey Zigachev break;
327b843c749SSergey Zigachev case UCODE_ID_CP_MEC:
328b843c749SSergey Zigachev case UCODE_ID_CP_MEC_JT1:
329b843c749SSergey Zigachev case UCODE_ID_CP_MEC_JT2:
330b843c749SSergey Zigachev result = UCODE_ID_CP_MEC_MASK;
331b843c749SSergey Zigachev break;
332b843c749SSergey Zigachev case UCODE_ID_RLC_G:
333b843c749SSergey Zigachev result = UCODE_ID_RLC_G_MASK;
334b843c749SSergey Zigachev break;
335b843c749SSergey Zigachev default:
336b843c749SSergey Zigachev pr_info("UCode type is out of range! \n");
337b843c749SSergey Zigachev result = 0;
338b843c749SSergey Zigachev }
339b843c749SSergey Zigachev
340b843c749SSergey Zigachev return result;
341b843c749SSergey Zigachev }
342b843c749SSergey Zigachev
smu7_populate_single_firmware_entry(struct pp_hwmgr * hwmgr,uint32_t fw_type,struct SMU_Entry * entry)343b843c749SSergey Zigachev static int smu7_populate_single_firmware_entry(struct pp_hwmgr *hwmgr,
344b843c749SSergey Zigachev uint32_t fw_type,
345b843c749SSergey Zigachev struct SMU_Entry *entry)
346b843c749SSergey Zigachev {
347b843c749SSergey Zigachev int result = 0;
348b843c749SSergey Zigachev struct cgs_firmware_info info = {0};
349b843c749SSergey Zigachev
350b843c749SSergey Zigachev result = cgs_get_firmware_info(hwmgr->device,
351b843c749SSergey Zigachev smu7_convert_fw_type_to_cgs(fw_type),
352b843c749SSergey Zigachev &info);
353b843c749SSergey Zigachev
354b843c749SSergey Zigachev if (!result) {
355b843c749SSergey Zigachev entry->version = info.fw_version;
356b843c749SSergey Zigachev entry->id = (uint16_t)fw_type;
357b843c749SSergey Zigachev entry->image_addr_high = upper_32_bits(info.mc_addr);
358b843c749SSergey Zigachev entry->image_addr_low = lower_32_bits(info.mc_addr);
359b843c749SSergey Zigachev entry->meta_data_addr_high = 0;
360b843c749SSergey Zigachev entry->meta_data_addr_low = 0;
361b843c749SSergey Zigachev
362b843c749SSergey Zigachev /* digest need be excluded out */
363b843c749SSergey Zigachev if (!hwmgr->not_vf)
364b843c749SSergey Zigachev info.image_size -= 20;
365b843c749SSergey Zigachev entry->data_size_byte = info.image_size;
366b843c749SSergey Zigachev entry->num_register_entries = 0;
367b843c749SSergey Zigachev }
368b843c749SSergey Zigachev
369b843c749SSergey Zigachev if ((fw_type == UCODE_ID_RLC_G)
370b843c749SSergey Zigachev || (fw_type == UCODE_ID_CP_MEC))
371b843c749SSergey Zigachev entry->flags = 1;
372b843c749SSergey Zigachev else
373b843c749SSergey Zigachev entry->flags = 0;
374b843c749SSergey Zigachev
375b843c749SSergey Zigachev return 0;
376b843c749SSergey Zigachev }
377b843c749SSergey Zigachev
smu7_request_smu_load_fw(struct pp_hwmgr * hwmgr)378b843c749SSergey Zigachev int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr)
379b843c749SSergey Zigachev {
380b843c749SSergey Zigachev struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
381b843c749SSergey Zigachev uint32_t fw_to_load;
382b843c749SSergey Zigachev int r = 0;
383b843c749SSergey Zigachev
384b843c749SSergey Zigachev if (!hwmgr->reload_fw) {
385b843c749SSergey Zigachev pr_info("skip reloading...\n");
386b843c749SSergey Zigachev return 0;
387b843c749SSergey Zigachev }
388b843c749SSergey Zigachev
389b843c749SSergey Zigachev if (smu_data->soft_regs_start)
390b843c749SSergey Zigachev cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC,
391b843c749SSergey Zigachev smu_data->soft_regs_start + smum_get_offsetof(hwmgr,
392b843c749SSergey Zigachev SMU_SoftRegisters, UcodeLoadStatus),
393b843c749SSergey Zigachev 0x0);
394b843c749SSergey Zigachev
395b843c749SSergey Zigachev if (hwmgr->chip_id > CHIP_TOPAZ) { /* add support for Topaz */
396b843c749SSergey Zigachev if (hwmgr->not_vf) {
397b843c749SSergey Zigachev smu7_send_msg_to_smc_with_parameter(hwmgr,
398b843c749SSergey Zigachev PPSMC_MSG_SMU_DRAM_ADDR_HI,
399b843c749SSergey Zigachev upper_32_bits(smu_data->smu_buffer.mc_addr));
400b843c749SSergey Zigachev smu7_send_msg_to_smc_with_parameter(hwmgr,
401b843c749SSergey Zigachev PPSMC_MSG_SMU_DRAM_ADDR_LO,
402b843c749SSergey Zigachev lower_32_bits(smu_data->smu_buffer.mc_addr));
403b843c749SSergey Zigachev }
404b843c749SSergey Zigachev fw_to_load = UCODE_ID_RLC_G_MASK
405b843c749SSergey Zigachev + UCODE_ID_SDMA0_MASK
406b843c749SSergey Zigachev + UCODE_ID_SDMA1_MASK
407b843c749SSergey Zigachev + UCODE_ID_CP_CE_MASK
408b843c749SSergey Zigachev + UCODE_ID_CP_ME_MASK
409b843c749SSergey Zigachev + UCODE_ID_CP_PFP_MASK
410b843c749SSergey Zigachev + UCODE_ID_CP_MEC_MASK;
411b843c749SSergey Zigachev } else {
412b843c749SSergey Zigachev fw_to_load = UCODE_ID_RLC_G_MASK
413b843c749SSergey Zigachev + UCODE_ID_SDMA0_MASK
414b843c749SSergey Zigachev + UCODE_ID_SDMA1_MASK
415b843c749SSergey Zigachev + UCODE_ID_CP_CE_MASK
416b843c749SSergey Zigachev + UCODE_ID_CP_ME_MASK
417b843c749SSergey Zigachev + UCODE_ID_CP_PFP_MASK
418b843c749SSergey Zigachev + UCODE_ID_CP_MEC_MASK
419b843c749SSergey Zigachev + UCODE_ID_CP_MEC_JT1_MASK
420b843c749SSergey Zigachev + UCODE_ID_CP_MEC_JT2_MASK;
421b843c749SSergey Zigachev }
422b843c749SSergey Zigachev
423b843c749SSergey Zigachev if (!smu_data->toc) {
424b843c749SSergey Zigachev struct SMU_DRAMData_TOC *toc;
425b843c749SSergey Zigachev
426b843c749SSergey Zigachev smu_data->toc = kzalloc(sizeof(struct SMU_DRAMData_TOC), GFP_KERNEL);
427b843c749SSergey Zigachev if (!smu_data->toc)
428b843c749SSergey Zigachev return -ENOMEM;
429b843c749SSergey Zigachev toc = smu_data->toc;
430b843c749SSergey Zigachev toc->num_entries = 0;
431b843c749SSergey Zigachev toc->structure_version = 1;
432b843c749SSergey Zigachev
433b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
434b843c749SSergey Zigachev UCODE_ID_RLC_G, &toc->entry[toc->num_entries++]),
435b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
436b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
437b843c749SSergey Zigachev UCODE_ID_CP_CE, &toc->entry[toc->num_entries++]),
438b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
439b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
440b843c749SSergey Zigachev UCODE_ID_CP_PFP, &toc->entry[toc->num_entries++]),
441b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
442b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
443b843c749SSergey Zigachev UCODE_ID_CP_ME, &toc->entry[toc->num_entries++]),
444b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
445b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
446b843c749SSergey Zigachev UCODE_ID_CP_MEC, &toc->entry[toc->num_entries++]),
447b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
448b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
449b843c749SSergey Zigachev UCODE_ID_CP_MEC_JT1, &toc->entry[toc->num_entries++]),
450b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
451b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
452b843c749SSergey Zigachev UCODE_ID_CP_MEC_JT2, &toc->entry[toc->num_entries++]),
453b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
454b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
455b843c749SSergey Zigachev UCODE_ID_SDMA0, &toc->entry[toc->num_entries++]),
456b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
457b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
458b843c749SSergey Zigachev UCODE_ID_SDMA1, &toc->entry[toc->num_entries++]),
459b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
460b843c749SSergey Zigachev if (!hwmgr->not_vf)
461b843c749SSergey Zigachev PP_ASSERT_WITH_CODE(0 == smu7_populate_single_firmware_entry(hwmgr,
462b843c749SSergey Zigachev UCODE_ID_MEC_STORAGE, &toc->entry[toc->num_entries++]),
463b843c749SSergey Zigachev "Failed to Get Firmware Entry.", r = -EINVAL; goto failed);
464b843c749SSergey Zigachev }
465b843c749SSergey Zigachev memcpy_toio(smu_data->header_buffer.kaddr, smu_data->toc,
466b843c749SSergey Zigachev sizeof(struct SMU_DRAMData_TOC));
467b843c749SSergey Zigachev smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_HI, upper_32_bits(smu_data->header_buffer.mc_addr));
468b843c749SSergey Zigachev smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_DRV_DRAM_ADDR_LO, lower_32_bits(smu_data->header_buffer.mc_addr));
469b843c749SSergey Zigachev
470b843c749SSergey Zigachev if (smu7_send_msg_to_smc_with_parameter(hwmgr, PPSMC_MSG_LoadUcodes, fw_to_load))
471b843c749SSergey Zigachev pr_err("Fail to Request SMU Load uCode");
472b843c749SSergey Zigachev
473b843c749SSergey Zigachev return r;
474b843c749SSergey Zigachev
475b843c749SSergey Zigachev failed:
476b843c749SSergey Zigachev kfree(smu_data->toc);
477b843c749SSergey Zigachev smu_data->toc = NULL;
478b843c749SSergey Zigachev return r;
479b843c749SSergey Zigachev }
480b843c749SSergey Zigachev
481b843c749SSergey Zigachev /* Check if the FW has been loaded, SMU will not return if loading has not finished. */
smu7_check_fw_load_finish(struct pp_hwmgr * hwmgr,uint32_t fw_type)482b843c749SSergey Zigachev int smu7_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t fw_type)
483b843c749SSergey Zigachev {
484b843c749SSergey Zigachev struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
485b843c749SSergey Zigachev uint32_t fw_mask = smu7_get_mask_for_firmware_type(fw_type);
486b843c749SSergey Zigachev uint32_t ret;
487b843c749SSergey Zigachev
488b843c749SSergey Zigachev ret = phm_wait_on_indirect_register(hwmgr, mmSMC_IND_INDEX_11,
489b843c749SSergey Zigachev smu_data->soft_regs_start + smum_get_offsetof(hwmgr,
490b843c749SSergey Zigachev SMU_SoftRegisters, UcodeLoadStatus),
491b843c749SSergey Zigachev fw_mask, fw_mask);
492b843c749SSergey Zigachev return ret;
493b843c749SSergey Zigachev }
494b843c749SSergey Zigachev
smu7_reload_firmware(struct pp_hwmgr * hwmgr)495b843c749SSergey Zigachev int smu7_reload_firmware(struct pp_hwmgr *hwmgr)
496b843c749SSergey Zigachev {
497b843c749SSergey Zigachev return hwmgr->smumgr_funcs->start_smu(hwmgr);
498b843c749SSergey Zigachev }
499b843c749SSergey Zigachev
smu7_upload_smc_firmware_data(struct pp_hwmgr * hwmgr,uint32_t length,uint32_t * src,uint32_t limit)500b843c749SSergey Zigachev static int smu7_upload_smc_firmware_data(struct pp_hwmgr *hwmgr, uint32_t length, uint32_t *src, uint32_t limit)
501b843c749SSergey Zigachev {
502b843c749SSergey Zigachev uint32_t byte_count = length;
503b843c749SSergey Zigachev
504b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((limit >= byte_count), "SMC address is beyond the SMC RAM area.", return -EINVAL);
505b843c749SSergey Zigachev
506b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_INDEX_11, 0x20000);
507b843c749SSergey Zigachev PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 1);
508b843c749SSergey Zigachev
509b843c749SSergey Zigachev for (; byte_count >= 4; byte_count -= 4)
510b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmSMC_IND_DATA_11, *src++);
511b843c749SSergey Zigachev
512b843c749SSergey Zigachev PHM_WRITE_FIELD(hwmgr->device, SMC_IND_ACCESS_CNTL, AUTO_INCREMENT_IND_11, 0);
513b843c749SSergey Zigachev
514b843c749SSergey Zigachev PP_ASSERT_WITH_CODE((0 == byte_count), "SMC size must be divisible by 4.", return -EINVAL);
515b843c749SSergey Zigachev
516b843c749SSergey Zigachev return 0;
517b843c749SSergey Zigachev }
518b843c749SSergey Zigachev
519b843c749SSergey Zigachev
smu7_upload_smu_firmware_image(struct pp_hwmgr * hwmgr)520b843c749SSergey Zigachev int smu7_upload_smu_firmware_image(struct pp_hwmgr *hwmgr)
521b843c749SSergey Zigachev {
522b843c749SSergey Zigachev int result = 0;
523b843c749SSergey Zigachev struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
524b843c749SSergey Zigachev
525b843c749SSergey Zigachev struct cgs_firmware_info info = {0};
526b843c749SSergey Zigachev
527b843c749SSergey Zigachev if (smu_data->security_hard_key == 1)
528b843c749SSergey Zigachev cgs_get_firmware_info(hwmgr->device,
529b843c749SSergey Zigachev smu7_convert_fw_type_to_cgs(UCODE_ID_SMU), &info);
530b843c749SSergey Zigachev else
531b843c749SSergey Zigachev cgs_get_firmware_info(hwmgr->device,
532b843c749SSergey Zigachev smu7_convert_fw_type_to_cgs(UCODE_ID_SMU_SK), &info);
533b843c749SSergey Zigachev
534b843c749SSergey Zigachev hwmgr->is_kicker = info.is_kicker;
535b843c749SSergey Zigachev hwmgr->smu_version = info.version;
536b843c749SSergey Zigachev result = smu7_upload_smc_firmware_data(hwmgr, info.image_size, (uint32_t *)info.kptr, SMU7_SMC_SIZE);
537b843c749SSergey Zigachev
538b843c749SSergey Zigachev return result;
539b843c749SSergey Zigachev }
540b843c749SSergey Zigachev
execute_pwr_table(struct pp_hwmgr * hwmgr,const PWR_Command_Table * pvirus,int size)541b843c749SSergey Zigachev static void execute_pwr_table(struct pp_hwmgr *hwmgr, const PWR_Command_Table *pvirus, int size)
542b843c749SSergey Zigachev {
543b843c749SSergey Zigachev int i;
544b843c749SSergey Zigachev uint32_t reg, data;
545b843c749SSergey Zigachev
546b843c749SSergey Zigachev for (i = 0; i < size; i++) {
547b843c749SSergey Zigachev reg = pvirus->reg;
548b843c749SSergey Zigachev data = pvirus->data;
549b843c749SSergey Zigachev if (reg != 0xffffffff)
550b843c749SSergey Zigachev cgs_write_register(hwmgr->device, reg, data);
551b843c749SSergey Zigachev else
552b843c749SSergey Zigachev break;
553b843c749SSergey Zigachev pvirus++;
554b843c749SSergey Zigachev }
555b843c749SSergey Zigachev }
556b843c749SSergey Zigachev
execute_pwr_dfy_table(struct pp_hwmgr * hwmgr,const PWR_DFY_Section * section)557b843c749SSergey Zigachev static void execute_pwr_dfy_table(struct pp_hwmgr *hwmgr, const PWR_DFY_Section *section)
558b843c749SSergey Zigachev {
559b843c749SSergey Zigachev int i;
560b843c749SSergey Zigachev
561b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmCP_DFY_CNTL, section->dfy_cntl);
562b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmCP_DFY_ADDR_HI, section->dfy_addr_hi);
563b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmCP_DFY_ADDR_LO, section->dfy_addr_lo);
564b843c749SSergey Zigachev for (i = 0; i < section->dfy_size; i++)
565b843c749SSergey Zigachev cgs_write_register(hwmgr->device, mmCP_DFY_DATA_0, section->dfy_data[i]);
566b843c749SSergey Zigachev }
567b843c749SSergey Zigachev
smu7_setup_pwr_virus(struct pp_hwmgr * hwmgr)568b843c749SSergey Zigachev int smu7_setup_pwr_virus(struct pp_hwmgr *hwmgr)
569b843c749SSergey Zigachev {
570b843c749SSergey Zigachev execute_pwr_table(hwmgr, pwr_virus_table_pre, ARRAY_SIZE(pwr_virus_table_pre));
571b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section1);
572b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section2);
573b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section3);
574b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section4);
575b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section5);
576b843c749SSergey Zigachev execute_pwr_dfy_table(hwmgr, &pwr_virus_section6);
577b843c749SSergey Zigachev execute_pwr_table(hwmgr, pwr_virus_table_post, ARRAY_SIZE(pwr_virus_table_post));
578b843c749SSergey Zigachev
579b843c749SSergey Zigachev return 0;
580b843c749SSergey Zigachev }
581b843c749SSergey Zigachev
smu7_init(struct pp_hwmgr * hwmgr)582b843c749SSergey Zigachev int smu7_init(struct pp_hwmgr *hwmgr)
583b843c749SSergey Zigachev {
584b843c749SSergey Zigachev struct smu7_smumgr *smu_data;
585b843c749SSergey Zigachev int r;
586b843c749SSergey Zigachev /* Allocate memory for backend private data */
587b843c749SSergey Zigachev smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
588b843c749SSergey Zigachev smu_data->header_buffer.data_size =
589b843c749SSergey Zigachev ((sizeof(struct SMU_DRAMData_TOC) / 4096) + 1) * 4096;
590b843c749SSergey Zigachev
591b843c749SSergey Zigachev /* Allocate FW image data structure and header buffer and
592b843c749SSergey Zigachev * send the header buffer address to SMU */
593b843c749SSergey Zigachev r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
594b843c749SSergey Zigachev smu_data->header_buffer.data_size,
595b843c749SSergey Zigachev PAGE_SIZE,
596b843c749SSergey Zigachev AMDGPU_GEM_DOMAIN_VRAM,
597b843c749SSergey Zigachev &smu_data->header_buffer.handle,
598*78973132SSergey Zigachev (u64 *)&smu_data->header_buffer.mc_addr,
599b843c749SSergey Zigachev &smu_data->header_buffer.kaddr);
600b843c749SSergey Zigachev
601b843c749SSergey Zigachev if (r)
602b843c749SSergey Zigachev return -EINVAL;
603b843c749SSergey Zigachev
604b843c749SSergey Zigachev if (!hwmgr->not_vf)
605b843c749SSergey Zigachev return 0;
606b843c749SSergey Zigachev
607b843c749SSergey Zigachev smu_data->smu_buffer.data_size = 200*4096;
608b843c749SSergey Zigachev r = amdgpu_bo_create_kernel((struct amdgpu_device *)hwmgr->adev,
609b843c749SSergey Zigachev smu_data->smu_buffer.data_size,
610b843c749SSergey Zigachev PAGE_SIZE,
611b843c749SSergey Zigachev AMDGPU_GEM_DOMAIN_VRAM,
612b843c749SSergey Zigachev &smu_data->smu_buffer.handle,
613*78973132SSergey Zigachev (u64 *)&smu_data->smu_buffer.mc_addr,
614b843c749SSergey Zigachev &smu_data->smu_buffer.kaddr);
615b843c749SSergey Zigachev
616b843c749SSergey Zigachev if (r) {
617b843c749SSergey Zigachev amdgpu_bo_free_kernel(&smu_data->header_buffer.handle,
618*78973132SSergey Zigachev (u64 *)&smu_data->header_buffer.mc_addr,
619b843c749SSergey Zigachev &smu_data->header_buffer.kaddr);
620b843c749SSergey Zigachev return -EINVAL;
621b843c749SSergey Zigachev }
622b843c749SSergey Zigachev
623b843c749SSergey Zigachev if (smum_is_hw_avfs_present(hwmgr))
624b843c749SSergey Zigachev hwmgr->avfs_supported = true;
625b843c749SSergey Zigachev
626b843c749SSergey Zigachev return 0;
627b843c749SSergey Zigachev }
628b843c749SSergey Zigachev
629b843c749SSergey Zigachev
smu7_smu_fini(struct pp_hwmgr * hwmgr)630b843c749SSergey Zigachev int smu7_smu_fini(struct pp_hwmgr *hwmgr)
631b843c749SSergey Zigachev {
632b843c749SSergey Zigachev struct smu7_smumgr *smu_data = (struct smu7_smumgr *)(hwmgr->smu_backend);
633b843c749SSergey Zigachev
634b843c749SSergey Zigachev amdgpu_bo_free_kernel(&smu_data->header_buffer.handle,
635*78973132SSergey Zigachev (u64 *)&smu_data->header_buffer.mc_addr,
636b843c749SSergey Zigachev &smu_data->header_buffer.kaddr);
637b843c749SSergey Zigachev
638b843c749SSergey Zigachev if (hwmgr->not_vf)
639b843c749SSergey Zigachev amdgpu_bo_free_kernel(&smu_data->smu_buffer.handle,
640*78973132SSergey Zigachev (u64 *)&smu_data->smu_buffer.mc_addr,
641b843c749SSergey Zigachev &smu_data->smu_buffer.kaddr);
642b843c749SSergey Zigachev
643b843c749SSergey Zigachev
644b843c749SSergey Zigachev kfree(smu_data->toc);
645b843c749SSergey Zigachev smu_data->toc = NULL;
646b843c749SSergey Zigachev kfree(hwmgr->smu_backend);
647b843c749SSergey Zigachev hwmgr->smu_backend = NULL;
648b843c749SSergey Zigachev return 0;
649b843c749SSergey Zigachev }
650