1 /* 2 * Copyright © 2009 Keith Packard 3 * 4 * Permission to use, copy, modify, distribute, and sell this software and its 5 * documentation for any purpose is hereby granted without fee, provided that 6 * the above copyright notice appear in all copies and that both that copyright 7 * notice and this permission notice appear in supporting documentation, and 8 * that the name of the copyright holders not be used in advertising or 9 * publicity pertaining to distribution of the software without specific, 10 * written prior permission. The copyright holders make no representations 11 * about the suitability of this software for any purpose. It is provided "as 12 * is" without express or implied warranty. 13 * 14 * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE, 15 * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO 16 * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR 17 * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, 18 * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER 19 * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE 20 * OF THIS SOFTWARE. 21 */ 22 23 #include <linux/kernel.h> 24 #include <linux/module.h> 25 #include <linux/delay.h> 26 #include <linux/errno.h> 27 #include <linux/sched.h> 28 #include <linux/i2c.h> 29 #include <drm/drm_dp_helper.h> 30 #include <drm/drmP.h> 31 32 /** 33 * DOC: dp helpers 34 * 35 * These functions contain some common logic and helpers at various abstraction 36 * levels to deal with Display Port sink devices and related things like DP aux 37 * channel transfers, EDID reading over DP aux channels, decoding certain DPCD 38 * blocks, ... 39 */ 40 41 /* Helpers for DP link training */ 42 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r) 43 { 44 return link_status[r - DP_LANE0_1_STATUS]; 45 } 46 47 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE], 48 int lane) 49 { 50 int i = DP_LANE0_1_STATUS + (lane >> 1); 51 int s = (lane & 1) * 4; 52 u8 l = dp_link_status(link_status, i); 53 return (l >> s) & 0xf; 54 } 55 56 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 57 int lane_count) 58 { 59 u8 lane_align; 60 u8 lane_status; 61 int lane; 62 63 lane_align = dp_link_status(link_status, 64 DP_LANE_ALIGN_STATUS_UPDATED); 65 if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0) 66 return false; 67 for (lane = 0; lane < lane_count; lane++) { 68 lane_status = dp_get_lane_status(link_status, lane); 69 if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS) 70 return false; 71 } 72 return true; 73 } 74 EXPORT_SYMBOL(drm_dp_channel_eq_ok); 75 76 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE], 77 int lane_count) 78 { 79 int lane; 80 u8 lane_status; 81 82 for (lane = 0; lane < lane_count; lane++) { 83 lane_status = dp_get_lane_status(link_status, lane); 84 if ((lane_status & DP_LANE_CR_DONE) == 0) 85 return false; 86 } 87 return true; 88 } 89 EXPORT_SYMBOL(drm_dp_clock_recovery_ok); 90 91 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE], 92 int lane) 93 { 94 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 95 int s = ((lane & 1) ? 96 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT : 97 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT); 98 u8 l = dp_link_status(link_status, i); 99 100 return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT; 101 } 102 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage); 103 104 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE], 105 int lane) 106 { 107 int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1); 108 int s = ((lane & 1) ? 109 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT : 110 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT); 111 u8 l = dp_link_status(link_status, i); 112 113 return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT; 114 } 115 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis); 116 117 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 118 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 119 udelay(100); 120 else 121 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); 122 } 123 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay); 124 125 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) { 126 if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0) 127 udelay(400); 128 else 129 mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4); 130 } 131 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay); 132 133 u8 drm_dp_link_rate_to_bw_code(int link_rate) 134 { 135 switch (link_rate) { 136 case 162000: 137 default: 138 return DP_LINK_BW_1_62; 139 case 270000: 140 return DP_LINK_BW_2_7; 141 case 540000: 142 return DP_LINK_BW_5_4; 143 } 144 } 145 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code); 146 147 int drm_dp_bw_code_to_link_rate(u8 link_bw) 148 { 149 switch (link_bw) { 150 case DP_LINK_BW_1_62: 151 default: 152 return 162000; 153 case DP_LINK_BW_2_7: 154 return 270000; 155 case DP_LINK_BW_5_4: 156 return 540000; 157 } 158 } 159 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate); 160 161 #define AUX_RETRY_INTERVAL 500 /* us */ 162 163 /** 164 * DOC: dp helpers 165 * 166 * The DisplayPort AUX channel is an abstraction to allow generic, driver- 167 * independent access to AUX functionality. Drivers can take advantage of 168 * this by filling in the fields of the drm_dp_aux structure. 169 * 170 * Transactions are described using a hardware-independent drm_dp_aux_msg 171 * structure, which is passed into a driver's .transfer() implementation. 172 * Both native and I2C-over-AUX transactions are supported. 173 */ 174 175 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request, 176 unsigned int offset, void *buffer, size_t size) 177 { 178 struct drm_dp_aux_msg msg; 179 unsigned int retry; 180 int err; 181 182 memset(&msg, 0, sizeof(msg)); 183 msg.address = offset; 184 msg.request = request; 185 msg.buffer = buffer; 186 msg.size = size; 187 188 /* 189 * The specification doesn't give any recommendation on how often to 190 * retry native transactions. We used to retry 7 times like for 191 * aux i2c transactions but real world devices this wasn't 192 * sufficient, bump to 32 which makes Dell 4k monitors happier. 193 */ 194 for (retry = 0; retry < 32; retry++) { 195 196 mutex_lock(&aux->hw_mutex); 197 err = aux->transfer(aux, &msg); 198 mutex_unlock(&aux->hw_mutex); 199 if (err < 0) { 200 if (err == -EBUSY) 201 continue; 202 203 return err; 204 } 205 206 207 switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) { 208 case DP_AUX_NATIVE_REPLY_ACK: 209 if (err < size) 210 return -EPROTO; 211 return err; 212 213 case DP_AUX_NATIVE_REPLY_NACK: 214 return -EIO; 215 216 case DP_AUX_NATIVE_REPLY_DEFER: 217 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 218 break; 219 } 220 } 221 222 DRM_DEBUG_KMS("too many retries, giving up\n"); 223 return -EIO; 224 } 225 226 /** 227 * drm_dp_dpcd_read() - read a series of bytes from the DPCD 228 * @aux: DisplayPort AUX channel 229 * @offset: address of the (first) register to read 230 * @buffer: buffer to store the register values 231 * @size: number of bytes in @buffer 232 * 233 * Returns the number of bytes transferred on success, or a negative error 234 * code on failure. -EIO is returned if the request was NAKed by the sink or 235 * if the retry count was exceeded. If not all bytes were transferred, this 236 * function returns -EPROTO. Errors from the underlying AUX channel transfer 237 * function, with the exception of -EBUSY (which causes the transaction to 238 * be retried), are propagated to the caller. 239 */ 240 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset, 241 void *buffer, size_t size) 242 { 243 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer, 244 size); 245 } 246 EXPORT_SYMBOL(drm_dp_dpcd_read); 247 248 /** 249 * drm_dp_dpcd_write() - write a series of bytes to the DPCD 250 * @aux: DisplayPort AUX channel 251 * @offset: address of the (first) register to write 252 * @buffer: buffer containing the values to write 253 * @size: number of bytes in @buffer 254 * 255 * Returns the number of bytes transferred on success, or a negative error 256 * code on failure. -EIO is returned if the request was NAKed by the sink or 257 * if the retry count was exceeded. If not all bytes were transferred, this 258 * function returns -EPROTO. Errors from the underlying AUX channel transfer 259 * function, with the exception of -EBUSY (which causes the transaction to 260 * be retried), are propagated to the caller. 261 */ 262 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset, 263 void *buffer, size_t size) 264 { 265 return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer, 266 size); 267 } 268 EXPORT_SYMBOL(drm_dp_dpcd_write); 269 270 /** 271 * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207) 272 * @aux: DisplayPort AUX channel 273 * @status: buffer to store the link status in (must be at least 6 bytes) 274 * 275 * Returns the number of bytes transferred on success or a negative error 276 * code on failure. 277 */ 278 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux, 279 u8 status[DP_LINK_STATUS_SIZE]) 280 { 281 return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status, 282 DP_LINK_STATUS_SIZE); 283 } 284 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status); 285 286 /** 287 * drm_dp_link_probe() - probe a DisplayPort link for capabilities 288 * @aux: DisplayPort AUX channel 289 * @link: pointer to structure in which to return link capabilities 290 * 291 * The structure filled in by this function can usually be passed directly 292 * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and 293 * configure the link based on the link's capabilities. 294 * 295 * Returns 0 on success or a negative error code on failure. 296 */ 297 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link) 298 { 299 u8 values[3]; 300 int err; 301 302 memset(link, 0, sizeof(*link)); 303 304 err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values)); 305 if (err < 0) 306 return err; 307 308 link->revision = values[0]; 309 link->rate = drm_dp_bw_code_to_link_rate(values[1]); 310 link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK; 311 312 if (values[2] & DP_ENHANCED_FRAME_CAP) 313 link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING; 314 315 return 0; 316 } 317 EXPORT_SYMBOL(drm_dp_link_probe); 318 319 /** 320 * drm_dp_link_power_up() - power up a DisplayPort link 321 * @aux: DisplayPort AUX channel 322 * @link: pointer to a structure containing the link configuration 323 * 324 * Returns 0 on success or a negative error code on failure. 325 */ 326 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link) 327 { 328 u8 value; 329 int err; 330 331 /* DP_SET_POWER register is only available on DPCD v1.1 and later */ 332 if (link->revision < 0x11) 333 return 0; 334 335 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); 336 if (err < 0) 337 return err; 338 339 value &= ~DP_SET_POWER_MASK; 340 value |= DP_SET_POWER_D0; 341 342 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); 343 if (err < 0) 344 return err; 345 346 /* 347 * According to the DP 1.1 specification, a "Sink Device must exit the 348 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink 349 * Control Field" (register 0x600). 350 */ 351 usleep_range(1000, 2000); 352 353 return 0; 354 } 355 EXPORT_SYMBOL(drm_dp_link_power_up); 356 357 /** 358 * drm_dp_link_power_down() - power down a DisplayPort link 359 * @aux: DisplayPort AUX channel 360 * @link: pointer to a structure containing the link configuration 361 * 362 * Returns 0 on success or a negative error code on failure. 363 */ 364 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link) 365 { 366 u8 value; 367 int err; 368 369 /* DP_SET_POWER register is only available on DPCD v1.1 and later */ 370 if (link->revision < 0x11) 371 return 0; 372 373 err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value); 374 if (err < 0) 375 return err; 376 377 value &= ~DP_SET_POWER_MASK; 378 value |= DP_SET_POWER_D3; 379 380 err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value); 381 if (err < 0) 382 return err; 383 384 return 0; 385 } 386 EXPORT_SYMBOL(drm_dp_link_power_down); 387 388 /** 389 * drm_dp_link_configure() - configure a DisplayPort link 390 * @aux: DisplayPort AUX channel 391 * @link: pointer to a structure containing the link configuration 392 * 393 * Returns 0 on success or a negative error code on failure. 394 */ 395 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link) 396 { 397 u8 values[2]; 398 int err; 399 400 values[0] = drm_dp_link_rate_to_bw_code(link->rate); 401 values[1] = link->num_lanes; 402 403 if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING) 404 values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN; 405 406 err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values)); 407 if (err < 0) 408 return err; 409 410 return 0; 411 } 412 EXPORT_SYMBOL(drm_dp_link_configure); 413 414 /* 415 * I2C-over-AUX implementation 416 */ 417 418 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter) 419 { 420 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL | 421 I2C_FUNC_SMBUS_READ_BLOCK_DATA | 422 I2C_FUNC_SMBUS_BLOCK_PROC_CALL | 423 I2C_FUNC_10BIT_ADDR; 424 } 425 426 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg) 427 { 428 /* 429 * In case of i2c defer or short i2c ack reply to a write, 430 * we need to switch to WRITE_STATUS_UPDATE to drain the 431 * rest of the message 432 */ 433 if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) { 434 msg->request &= DP_AUX_I2C_MOT; 435 msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE; 436 } 437 } 438 439 #define AUX_PRECHARGE_LEN 10 /* 10 to 16 */ 440 #define AUX_SYNC_LEN (16 + 4) /* preamble + AUX_SYNC_END */ 441 #define AUX_STOP_LEN 4 442 #define AUX_CMD_LEN 4 443 #define AUX_ADDRESS_LEN 20 444 #define AUX_REPLY_PAD_LEN 4 445 #define AUX_LENGTH_LEN 8 446 447 /* 448 * Calculate the duration of the AUX request/reply in usec. Gives the 449 * "best" case estimate, ie. successful while as short as possible. 450 */ 451 static int drm_dp_aux_req_duration(const struct drm_dp_aux_msg *msg) 452 { 453 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + 454 AUX_CMD_LEN + AUX_ADDRESS_LEN + AUX_LENGTH_LEN; 455 456 if ((msg->request & DP_AUX_I2C_READ) == 0) 457 len += msg->size * 8; 458 459 return len; 460 } 461 462 static int drm_dp_aux_reply_duration(const struct drm_dp_aux_msg *msg) 463 { 464 int len = AUX_PRECHARGE_LEN + AUX_SYNC_LEN + AUX_STOP_LEN + 465 AUX_CMD_LEN + AUX_REPLY_PAD_LEN; 466 467 /* 468 * For read we expect what was asked. For writes there will 469 * be 0 or 1 data bytes. Assume 0 for the "best" case. 470 */ 471 if (msg->request & DP_AUX_I2C_READ) 472 len += msg->size * 8; 473 474 return len; 475 } 476 477 #define I2C_START_LEN 1 478 #define I2C_STOP_LEN 1 479 #define I2C_ADDR_LEN 9 /* ADDRESS + R/W + ACK/NACK */ 480 #define I2C_DATA_LEN 9 /* DATA + ACK/NACK */ 481 482 /* 483 * Calculate the length of the i2c transfer in usec, assuming 484 * the i2c bus speed is as specified. Gives the the "worst" 485 * case estimate, ie. successful while as long as possible. 486 * Doesn't account the the "MOT" bit, and instead assumes each 487 * message includes a START, ADDRESS and STOP. Neither does it 488 * account for additional random variables such as clock stretching. 489 */ 490 static int drm_dp_i2c_msg_duration(const struct drm_dp_aux_msg *msg, 491 int i2c_speed_khz) 492 { 493 /* AUX bitrate is 1MHz, i2c bitrate as specified */ 494 return DIV_ROUND_UP((I2C_START_LEN + I2C_ADDR_LEN + 495 msg->size * I2C_DATA_LEN + 496 I2C_STOP_LEN) * 1000, i2c_speed_khz); 497 } 498 499 /* 500 * Deterine how many retries should be attempted to successfully transfer 501 * the specified message, based on the estimated durations of the 502 * i2c and AUX transfers. 503 */ 504 static int drm_dp_i2c_retry_count(const struct drm_dp_aux_msg *msg, 505 int i2c_speed_khz) 506 { 507 int aux_time_us = drm_dp_aux_req_duration(msg) + 508 drm_dp_aux_reply_duration(msg); 509 int i2c_time_us = drm_dp_i2c_msg_duration(msg, i2c_speed_khz); 510 511 return DIV_ROUND_UP(i2c_time_us, aux_time_us + AUX_RETRY_INTERVAL); 512 } 513 514 /* 515 * FIXME currently assumes 10 kHz as some real world devices seem 516 * to require it. We should query/set the speed via DPCD if supported. 517 */ 518 static int dp_aux_i2c_speed_khz __read_mostly = 10; 519 MODULE_PARM_DESC(dp_aux_i2c_speed_khz, 520 "Assumed speed of the i2c bus in kHz, (1-400, default 10)"); 521 522 /* 523 * Transfer a single I2C-over-AUX message and handle various error conditions, 524 * retrying the transaction as appropriate. It is assumed that the 525 * aux->transfer function does not modify anything in the msg other than the 526 * reply field. 527 * 528 * Returns bytes transferred on success, or a negative error code on failure. 529 */ 530 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) 531 { 532 unsigned int retry, defer_i2c; 533 int ret; 534 /* 535 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device 536 * is required to retry at least seven times upon receiving AUX_DEFER 537 * before giving up the AUX transaction. 538 * 539 * We also try to account for the i2c bus speed. 540 */ 541 int max_retries = max(7, drm_dp_i2c_retry_count(msg, dp_aux_i2c_speed_khz)); 542 543 for (retry = 0, defer_i2c = 0; retry < (max_retries + defer_i2c); retry++) { 544 mutex_lock(&aux->hw_mutex); 545 ret = aux->transfer(aux, msg); 546 mutex_unlock(&aux->hw_mutex); 547 if (ret < 0) { 548 if (ret == -EBUSY) 549 continue; 550 551 DRM_DEBUG_KMS("transaction failed: %d\n", ret); 552 return ret; 553 } 554 555 556 switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) { 557 case DP_AUX_NATIVE_REPLY_ACK: 558 /* 559 * For I2C-over-AUX transactions this isn't enough, we 560 * need to check for the I2C ACK reply. 561 */ 562 break; 563 564 case DP_AUX_NATIVE_REPLY_NACK: 565 DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size); 566 return -EREMOTEIO; 567 568 case DP_AUX_NATIVE_REPLY_DEFER: 569 DRM_DEBUG_KMS("native defer\n"); 570 /* 571 * We could check for I2C bit rate capabilities and if 572 * available adjust this interval. We could also be 573 * more careful with DP-to-legacy adapters where a 574 * long legacy cable may force very low I2C bit rates. 575 * 576 * For now just defer for long enough to hopefully be 577 * safe for all use-cases. 578 */ 579 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 580 continue; 581 582 default: 583 DRM_ERROR("invalid native reply %#04x\n", msg->reply); 584 return -EREMOTEIO; 585 } 586 587 switch (msg->reply & DP_AUX_I2C_REPLY_MASK) { 588 case DP_AUX_I2C_REPLY_ACK: 589 /* 590 * Both native ACK and I2C ACK replies received. We 591 * can assume the transfer was successful. 592 */ 593 if (ret != msg->size) 594 drm_dp_i2c_msg_write_status_update(msg); 595 return ret; 596 597 case DP_AUX_I2C_REPLY_NACK: 598 DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size); 599 aux->i2c_nack_count++; 600 return -EREMOTEIO; 601 602 case DP_AUX_I2C_REPLY_DEFER: 603 DRM_DEBUG_KMS("I2C defer\n"); 604 /* DP Compliance Test 4.2.2.5 Requirement: 605 * Must have at least 7 retries for I2C defers on the 606 * transaction to pass this test 607 */ 608 aux->i2c_defer_count++; 609 if (defer_i2c < 7) 610 defer_i2c++; 611 usleep_range(AUX_RETRY_INTERVAL, AUX_RETRY_INTERVAL + 100); 612 drm_dp_i2c_msg_write_status_update(msg); 613 614 continue; 615 616 default: 617 DRM_ERROR("invalid I2C reply %#04x\n", msg->reply); 618 return -EREMOTEIO; 619 } 620 } 621 622 DRM_DEBUG_KMS("too many retries, giving up\n"); 623 return -EREMOTEIO; 624 } 625 626 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg, 627 const struct i2c_msg *i2c_msg) 628 { 629 msg->request = (i2c_msg->flags & I2C_M_RD) ? 630 DP_AUX_I2C_READ : DP_AUX_I2C_WRITE; 631 msg->request |= DP_AUX_I2C_MOT; 632 } 633 634 /* 635 * Keep retrying drm_dp_i2c_do_msg until all data has been transferred. 636 * 637 * Returns an error code on failure, or a recommended transfer size on success. 638 */ 639 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg) 640 { 641 int err, ret = orig_msg->size; 642 struct drm_dp_aux_msg msg = *orig_msg; 643 644 while (msg.size > 0) { 645 err = drm_dp_i2c_do_msg(aux, &msg); 646 if (err <= 0) 647 return err == 0 ? -EPROTO : err; 648 649 if (err < msg.size && err < ret) { 650 DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n", 651 msg.size, err); 652 ret = err; 653 } 654 655 msg.size -= err; 656 msg.buffer += err; 657 } 658 659 return ret; 660 } 661 662 /* 663 * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX 664 * packets to be as large as possible. If not, the I2C transactions never 665 * succeed. Hence the default is maximum. 666 */ 667 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES; 668 MODULE_PARM_DESC(dp_aux_i2c_transfer_size, 669 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)"); 670 671 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, 672 int num) 673 { 674 struct drm_dp_aux *aux = adapter->algo_data; 675 unsigned int i, j; 676 unsigned transfer_size; 677 struct drm_dp_aux_msg msg; 678 int err = 0; 679 680 dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES); 681 682 memset(&msg, 0, sizeof(msg)); 683 684 for (i = 0; i < num; i++) { 685 msg.address = msgs[i].addr; 686 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 687 /* Send a bare address packet to start the transaction. 688 * Zero sized messages specify an address only (bare 689 * address) transaction. 690 */ 691 msg.buffer = NULL; 692 msg.size = 0; 693 err = drm_dp_i2c_do_msg(aux, &msg); 694 695 /* 696 * Reset msg.request in case in case it got 697 * changed into a WRITE_STATUS_UPDATE. 698 */ 699 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 700 701 if (err < 0) 702 break; 703 /* We want each transaction to be as large as possible, but 704 * we'll go to smaller sizes if the hardware gives us a 705 * short reply. 706 */ 707 transfer_size = dp_aux_i2c_transfer_size; 708 for (j = 0; j < msgs[i].len; j += msg.size) { 709 msg.buffer = msgs[i].buf + j; 710 msg.size = min(transfer_size, msgs[i].len - j); 711 712 err = drm_dp_i2c_drain_msg(aux, &msg); 713 714 /* 715 * Reset msg.request in case in case it got 716 * changed into a WRITE_STATUS_UPDATE. 717 */ 718 drm_dp_i2c_msg_set_request(&msg, &msgs[i]); 719 720 if (err < 0) 721 break; 722 transfer_size = err; 723 } 724 if (err < 0) 725 break; 726 } 727 if (err >= 0) 728 err = num; 729 /* Send a bare address packet to close out the transaction. 730 * Zero sized messages specify an address only (bare 731 * address) transaction. 732 */ 733 msg.request &= ~DP_AUX_I2C_MOT; 734 msg.buffer = NULL; 735 msg.size = 0; 736 (void)drm_dp_i2c_do_msg(aux, &msg); 737 738 return err; 739 } 740 741 static const struct i2c_algorithm drm_dp_i2c_algo = { 742 .functionality = drm_dp_i2c_functionality, 743 .master_xfer = drm_dp_i2c_xfer, 744 }; 745 746 /** 747 * drm_dp_aux_register() - initialise and register aux channel 748 * @aux: DisplayPort AUX channel 749 * 750 * Returns 0 on success or a negative error code on failure. 751 */ 752 int drm_dp_aux_register(struct drm_dp_aux *aux) 753 { 754 lockinit(&aux->hw_mutex, "ahwm", 0, LK_CANRECURSE); 755 756 aux->ddc.algo = &drm_dp_i2c_algo; 757 aux->ddc.algo_data = aux; 758 aux->ddc.retries = 3; 759 760 #if 0 761 aux->ddc.class = I2C_CLASS_DDC; 762 aux->ddc.owner = THIS_MODULE; 763 #endif 764 aux->ddc.dev.parent = aux->dev; 765 #if 0 766 aux->ddc.dev.of_node = aux->dev->of_node; 767 #endif 768 769 strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev), 770 sizeof(aux->ddc.name)); 771 772 return i2c_add_adapter(&aux->ddc); 773 } 774 EXPORT_SYMBOL(drm_dp_aux_register); 775 776 /** 777 * drm_dp_aux_unregister() - unregister an AUX adapter 778 * @aux: DisplayPort AUX channel 779 */ 780 void drm_dp_aux_unregister(struct drm_dp_aux *aux) 781 { 782 i2c_del_adapter(&aux->ddc); 783 } 784 EXPORT_SYMBOL(drm_dp_aux_unregister); 785