xref: /dragonfly/sys/dev/drm/drm_dp_helper.c (revision f2a91d31)
1 /*
2  * Copyright © 2009 Keith Packard
3  *
4  * Permission to use, copy, modify, distribute, and sell this software and its
5  * documentation for any purpose is hereby granted without fee, provided that
6  * the above copyright notice appear in all copies and that both that copyright
7  * notice and this permission notice appear in supporting documentation, and
8  * that the name of the copyright holders not be used in advertising or
9  * publicity pertaining to distribution of the software without specific,
10  * written prior permission.  The copyright holders make no representations
11  * about the suitability of this software for any purpose.  It is provided "as
12  * is" without express or implied warranty.
13  *
14  * THE COPYRIGHT HOLDERS DISCLAIM ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
15  * INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
16  * EVENT SHALL THE COPYRIGHT HOLDERS BE LIABLE FOR ANY SPECIAL, INDIRECT OR
17  * CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
18  * DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
19  * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE
20  * OF THIS SOFTWARE.
21  */
22 
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/delay.h>
26 #include <linux/errno.h>
27 #include <linux/sched.h>
28 #include <linux/i2c.h>
29 #include <drm/drm_dp_helper.h>
30 #include <drm/drmP.h>
31 
32 /**
33  * DOC: dp helpers
34  *
35  * These functions contain some common logic and helpers at various abstraction
36  * levels to deal with Display Port sink devices and related things like DP aux
37  * channel transfers, EDID reading over DP aux channels, decoding certain DPCD
38  * blocks, ...
39  */
40 
41 /* Helpers for DP link training */
42 static u8 dp_link_status(const u8 link_status[DP_LINK_STATUS_SIZE], int r)
43 {
44 	return link_status[r - DP_LANE0_1_STATUS];
45 }
46 
47 static u8 dp_get_lane_status(const u8 link_status[DP_LINK_STATUS_SIZE],
48 			     int lane)
49 {
50 	int i = DP_LANE0_1_STATUS + (lane >> 1);
51 	int s = (lane & 1) * 4;
52 	u8 l = dp_link_status(link_status, i);
53 	return (l >> s) & 0xf;
54 }
55 
56 bool drm_dp_channel_eq_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
57 			  int lane_count)
58 {
59 	u8 lane_align;
60 	u8 lane_status;
61 	int lane;
62 
63 	lane_align = dp_link_status(link_status,
64 				    DP_LANE_ALIGN_STATUS_UPDATED);
65 	if ((lane_align & DP_INTERLANE_ALIGN_DONE) == 0)
66 		return false;
67 	for (lane = 0; lane < lane_count; lane++) {
68 		lane_status = dp_get_lane_status(link_status, lane);
69 		if ((lane_status & DP_CHANNEL_EQ_BITS) != DP_CHANNEL_EQ_BITS)
70 			return false;
71 	}
72 	return true;
73 }
74 EXPORT_SYMBOL(drm_dp_channel_eq_ok);
75 
76 bool drm_dp_clock_recovery_ok(const u8 link_status[DP_LINK_STATUS_SIZE],
77 			      int lane_count)
78 {
79 	int lane;
80 	u8 lane_status;
81 
82 	for (lane = 0; lane < lane_count; lane++) {
83 		lane_status = dp_get_lane_status(link_status, lane);
84 		if ((lane_status & DP_LANE_CR_DONE) == 0)
85 			return false;
86 	}
87 	return true;
88 }
89 EXPORT_SYMBOL(drm_dp_clock_recovery_ok);
90 
91 u8 drm_dp_get_adjust_request_voltage(const u8 link_status[DP_LINK_STATUS_SIZE],
92 				     int lane)
93 {
94 	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
95 	int s = ((lane & 1) ?
96 		 DP_ADJUST_VOLTAGE_SWING_LANE1_SHIFT :
97 		 DP_ADJUST_VOLTAGE_SWING_LANE0_SHIFT);
98 	u8 l = dp_link_status(link_status, i);
99 
100 	return ((l >> s) & 0x3) << DP_TRAIN_VOLTAGE_SWING_SHIFT;
101 }
102 EXPORT_SYMBOL(drm_dp_get_adjust_request_voltage);
103 
104 u8 drm_dp_get_adjust_request_pre_emphasis(const u8 link_status[DP_LINK_STATUS_SIZE],
105 					  int lane)
106 {
107 	int i = DP_ADJUST_REQUEST_LANE0_1 + (lane >> 1);
108 	int s = ((lane & 1) ?
109 		 DP_ADJUST_PRE_EMPHASIS_LANE1_SHIFT :
110 		 DP_ADJUST_PRE_EMPHASIS_LANE0_SHIFT);
111 	u8 l = dp_link_status(link_status, i);
112 
113 	return ((l >> s) & 0x3) << DP_TRAIN_PRE_EMPHASIS_SHIFT;
114 }
115 EXPORT_SYMBOL(drm_dp_get_adjust_request_pre_emphasis);
116 
117 void drm_dp_link_train_clock_recovery_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
118 	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
119 		udelay(100);
120 	else
121 		mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
122 }
123 EXPORT_SYMBOL(drm_dp_link_train_clock_recovery_delay);
124 
125 void drm_dp_link_train_channel_eq_delay(const u8 dpcd[DP_RECEIVER_CAP_SIZE]) {
126 	if (dpcd[DP_TRAINING_AUX_RD_INTERVAL] == 0)
127 		udelay(400);
128 	else
129 		mdelay(dpcd[DP_TRAINING_AUX_RD_INTERVAL] * 4);
130 }
131 EXPORT_SYMBOL(drm_dp_link_train_channel_eq_delay);
132 
133 u8 drm_dp_link_rate_to_bw_code(int link_rate)
134 {
135 	switch (link_rate) {
136 	case 162000:
137 	default:
138 		return DP_LINK_BW_1_62;
139 	case 270000:
140 		return DP_LINK_BW_2_7;
141 	case 540000:
142 		return DP_LINK_BW_5_4;
143 	}
144 }
145 EXPORT_SYMBOL(drm_dp_link_rate_to_bw_code);
146 
147 int drm_dp_bw_code_to_link_rate(u8 link_bw)
148 {
149 	switch (link_bw) {
150 	case DP_LINK_BW_1_62:
151 	default:
152 		return 162000;
153 	case DP_LINK_BW_2_7:
154 		return 270000;
155 	case DP_LINK_BW_5_4:
156 		return 540000;
157 	}
158 }
159 EXPORT_SYMBOL(drm_dp_bw_code_to_link_rate);
160 
161 /**
162  * DOC: dp helpers
163  *
164  * The DisplayPort AUX channel is an abstraction to allow generic, driver-
165  * independent access to AUX functionality. Drivers can take advantage of
166  * this by filling in the fields of the drm_dp_aux structure.
167  *
168  * Transactions are described using a hardware-independent drm_dp_aux_msg
169  * structure, which is passed into a driver's .transfer() implementation.
170  * Both native and I2C-over-AUX transactions are supported.
171  */
172 
173 static int drm_dp_dpcd_access(struct drm_dp_aux *aux, u8 request,
174 			      unsigned int offset, void *buffer, size_t size)
175 {
176 	struct drm_dp_aux_msg msg;
177 	unsigned int retry;
178 	int err;
179 
180 	memset(&msg, 0, sizeof(msg));
181 	msg.address = offset;
182 	msg.request = request;
183 	msg.buffer = buffer;
184 	msg.size = size;
185 
186 	/*
187 	 * The specification doesn't give any recommendation on how often to
188 	 * retry native transactions. We used to retry 7 times like for
189 	 * aux i2c transactions but real world devices this wasn't
190 	 * sufficient, bump to 32 which makes Dell 4k monitors happier.
191 	 */
192 	for (retry = 0; retry < 32; retry++) {
193 
194 		mutex_lock(&aux->hw_mutex);
195 		err = aux->transfer(aux, &msg);
196 		mutex_unlock(&aux->hw_mutex);
197 		if (err < 0) {
198 			if (err == -EBUSY)
199 				continue;
200 
201 			return err;
202 		}
203 
204 
205 		switch (msg.reply & DP_AUX_NATIVE_REPLY_MASK) {
206 		case DP_AUX_NATIVE_REPLY_ACK:
207 			if (err < size)
208 				return -EPROTO;
209 			return err;
210 
211 		case DP_AUX_NATIVE_REPLY_NACK:
212 			return -EIO;
213 
214 		case DP_AUX_NATIVE_REPLY_DEFER:
215 			usleep_range(400, 500);
216 			break;
217 		}
218 	}
219 
220 	DRM_DEBUG_KMS("too many retries, giving up\n");
221 	return -EIO;
222 }
223 
224 /**
225  * drm_dp_dpcd_read() - read a series of bytes from the DPCD
226  * @aux: DisplayPort AUX channel
227  * @offset: address of the (first) register to read
228  * @buffer: buffer to store the register values
229  * @size: number of bytes in @buffer
230  *
231  * Returns the number of bytes transferred on success, or a negative error
232  * code on failure. -EIO is returned if the request was NAKed by the sink or
233  * if the retry count was exceeded. If not all bytes were transferred, this
234  * function returns -EPROTO. Errors from the underlying AUX channel transfer
235  * function, with the exception of -EBUSY (which causes the transaction to
236  * be retried), are propagated to the caller.
237  */
238 ssize_t drm_dp_dpcd_read(struct drm_dp_aux *aux, unsigned int offset,
239 			 void *buffer, size_t size)
240 {
241 	return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_READ, offset, buffer,
242 				  size);
243 }
244 EXPORT_SYMBOL(drm_dp_dpcd_read);
245 
246 /**
247  * drm_dp_dpcd_write() - write a series of bytes to the DPCD
248  * @aux: DisplayPort AUX channel
249  * @offset: address of the (first) register to write
250  * @buffer: buffer containing the values to write
251  * @size: number of bytes in @buffer
252  *
253  * Returns the number of bytes transferred on success, or a negative error
254  * code on failure. -EIO is returned if the request was NAKed by the sink or
255  * if the retry count was exceeded. If not all bytes were transferred, this
256  * function returns -EPROTO. Errors from the underlying AUX channel transfer
257  * function, with the exception of -EBUSY (which causes the transaction to
258  * be retried), are propagated to the caller.
259  */
260 ssize_t drm_dp_dpcd_write(struct drm_dp_aux *aux, unsigned int offset,
261 			  void *buffer, size_t size)
262 {
263 	return drm_dp_dpcd_access(aux, DP_AUX_NATIVE_WRITE, offset, buffer,
264 				  size);
265 }
266 EXPORT_SYMBOL(drm_dp_dpcd_write);
267 
268 /**
269  * drm_dp_dpcd_read_link_status() - read DPCD link status (bytes 0x202-0x207)
270  * @aux: DisplayPort AUX channel
271  * @status: buffer to store the link status in (must be at least 6 bytes)
272  *
273  * Returns the number of bytes transferred on success or a negative error
274  * code on failure.
275  */
276 int drm_dp_dpcd_read_link_status(struct drm_dp_aux *aux,
277 				 u8 status[DP_LINK_STATUS_SIZE])
278 {
279 	return drm_dp_dpcd_read(aux, DP_LANE0_1_STATUS, status,
280 				DP_LINK_STATUS_SIZE);
281 }
282 EXPORT_SYMBOL(drm_dp_dpcd_read_link_status);
283 
284 /**
285  * drm_dp_link_probe() - probe a DisplayPort link for capabilities
286  * @aux: DisplayPort AUX channel
287  * @link: pointer to structure in which to return link capabilities
288  *
289  * The structure filled in by this function can usually be passed directly
290  * into drm_dp_link_power_up() and drm_dp_link_configure() to power up and
291  * configure the link based on the link's capabilities.
292  *
293  * Returns 0 on success or a negative error code on failure.
294  */
295 int drm_dp_link_probe(struct drm_dp_aux *aux, struct drm_dp_link *link)
296 {
297 	u8 values[3];
298 	int err;
299 
300 	memset(link, 0, sizeof(*link));
301 
302 	err = drm_dp_dpcd_read(aux, DP_DPCD_REV, values, sizeof(values));
303 	if (err < 0)
304 		return err;
305 
306 	link->revision = values[0];
307 	link->rate = drm_dp_bw_code_to_link_rate(values[1]);
308 	link->num_lanes = values[2] & DP_MAX_LANE_COUNT_MASK;
309 
310 	if (values[2] & DP_ENHANCED_FRAME_CAP)
311 		link->capabilities |= DP_LINK_CAP_ENHANCED_FRAMING;
312 
313 	return 0;
314 }
315 EXPORT_SYMBOL(drm_dp_link_probe);
316 
317 /**
318  * drm_dp_link_power_up() - power up a DisplayPort link
319  * @aux: DisplayPort AUX channel
320  * @link: pointer to a structure containing the link configuration
321  *
322  * Returns 0 on success or a negative error code on failure.
323  */
324 int drm_dp_link_power_up(struct drm_dp_aux *aux, struct drm_dp_link *link)
325 {
326 	u8 value;
327 	int err;
328 
329 	/* DP_SET_POWER register is only available on DPCD v1.1 and later */
330 	if (link->revision < 0x11)
331 		return 0;
332 
333 	err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
334 	if (err < 0)
335 		return err;
336 
337 	value &= ~DP_SET_POWER_MASK;
338 	value |= DP_SET_POWER_D0;
339 
340 	err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
341 	if (err < 0)
342 		return err;
343 
344 	/*
345 	 * According to the DP 1.1 specification, a "Sink Device must exit the
346 	 * power saving state within 1 ms" (Section 2.5.3.1, Table 5-52, "Sink
347 	 * Control Field" (register 0x600).
348 	 */
349 	usleep_range(1000, 2000);
350 
351 	return 0;
352 }
353 EXPORT_SYMBOL(drm_dp_link_power_up);
354 
355 /**
356  * drm_dp_link_power_down() - power down a DisplayPort link
357  * @aux: DisplayPort AUX channel
358  * @link: pointer to a structure containing the link configuration
359  *
360  * Returns 0 on success or a negative error code on failure.
361  */
362 int drm_dp_link_power_down(struct drm_dp_aux *aux, struct drm_dp_link *link)
363 {
364 	u8 value;
365 	int err;
366 
367 	/* DP_SET_POWER register is only available on DPCD v1.1 and later */
368 	if (link->revision < 0x11)
369 		return 0;
370 
371 	err = drm_dp_dpcd_readb(aux, DP_SET_POWER, &value);
372 	if (err < 0)
373 		return err;
374 
375 	value &= ~DP_SET_POWER_MASK;
376 	value |= DP_SET_POWER_D3;
377 
378 	err = drm_dp_dpcd_writeb(aux, DP_SET_POWER, value);
379 	if (err < 0)
380 		return err;
381 
382 	return 0;
383 }
384 EXPORT_SYMBOL(drm_dp_link_power_down);
385 
386 /**
387  * drm_dp_link_configure() - configure a DisplayPort link
388  * @aux: DisplayPort AUX channel
389  * @link: pointer to a structure containing the link configuration
390  *
391  * Returns 0 on success or a negative error code on failure.
392  */
393 int drm_dp_link_configure(struct drm_dp_aux *aux, struct drm_dp_link *link)
394 {
395 	u8 values[2];
396 	int err;
397 
398 	values[0] = drm_dp_link_rate_to_bw_code(link->rate);
399 	values[1] = link->num_lanes;
400 
401 	if (link->capabilities & DP_LINK_CAP_ENHANCED_FRAMING)
402 		values[1] |= DP_LANE_COUNT_ENHANCED_FRAME_EN;
403 
404 	err = drm_dp_dpcd_write(aux, DP_LINK_BW_SET, values, sizeof(values));
405 	if (err < 0)
406 		return err;
407 
408 	return 0;
409 }
410 EXPORT_SYMBOL(drm_dp_link_configure);
411 
412 /*
413  * I2C-over-AUX implementation
414  */
415 
416 #if 0
417 static u32 drm_dp_i2c_functionality(struct i2c_adapter *adapter)
418 {
419 	return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL |
420 	       I2C_FUNC_SMBUS_READ_BLOCK_DATA |
421 	       I2C_FUNC_SMBUS_BLOCK_PROC_CALL |
422 	       I2C_FUNC_10BIT_ADDR;
423 }
424 
425 static void drm_dp_i2c_msg_write_status_update(struct drm_dp_aux_msg *msg)
426 {
427 	/*
428 	 * In case of i2c defer or short i2c ack reply to a write,
429 	 * we need to switch to WRITE_STATUS_UPDATE to drain the
430 	 * rest of the message
431 	 */
432 	if ((msg->request & ~DP_AUX_I2C_MOT) == DP_AUX_I2C_WRITE) {
433 		msg->request &= DP_AUX_I2C_MOT;
434 		msg->request |= DP_AUX_I2C_WRITE_STATUS_UPDATE;
435 	}
436 }
437 
438 /*
439  * Transfer a single I2C-over-AUX message and handle various error conditions,
440  * retrying the transaction as appropriate.  It is assumed that the
441  * aux->transfer function does not modify anything in the msg other than the
442  * reply field.
443  *
444  * Returns bytes transferred on success, or a negative error code on failure.
445  */
446 static int drm_dp_i2c_do_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
447 {
448 	unsigned int retry, defer_i2c;
449 	int ret;
450 
451 	/*
452 	 * DP1.2 sections 2.7.7.1.5.6.1 and 2.7.7.1.6.6.1: A DP Source device
453 	 * is required to retry at least seven times upon receiving AUX_DEFER
454 	 * before giving up the AUX transaction.
455 	 */
456 	for (retry = 0, defer_i2c = 0; retry < (7 + defer_i2c); retry++) {
457 		mutex_lock(&aux->hw_mutex);
458 		ret = aux->transfer(aux, msg);
459 		mutex_unlock(&aux->hw_mutex);
460 		if (ret < 0) {
461 			if (ret == -EBUSY)
462 				continue;
463 
464 			DRM_DEBUG_KMS("transaction failed: %d\n", ret);
465 			return ret;
466 		}
467 
468 
469 		switch (msg->reply & DP_AUX_NATIVE_REPLY_MASK) {
470 		case DP_AUX_NATIVE_REPLY_ACK:
471 			/*
472 			 * For I2C-over-AUX transactions this isn't enough, we
473 			 * need to check for the I2C ACK reply.
474 			 */
475 			break;
476 
477 		case DP_AUX_NATIVE_REPLY_NACK:
478 			DRM_DEBUG_KMS("native nack (result=%d, size=%zu)\n", ret, msg->size);
479 			return -EREMOTEIO;
480 
481 		case DP_AUX_NATIVE_REPLY_DEFER:
482 			DRM_DEBUG_KMS("native defer\n");
483 			/*
484 			 * We could check for I2C bit rate capabilities and if
485 			 * available adjust this interval. We could also be
486 			 * more careful with DP-to-legacy adapters where a
487 			 * long legacy cable may force very low I2C bit rates.
488 			 *
489 			 * For now just defer for long enough to hopefully be
490 			 * safe for all use-cases.
491 			 */
492 			usleep_range(500, 600);
493 			continue;
494 
495 		default:
496 			DRM_ERROR("invalid native reply %#04x\n", msg->reply);
497 			return -EREMOTEIO;
498 		}
499 
500 		switch (msg->reply & DP_AUX_I2C_REPLY_MASK) {
501 		case DP_AUX_I2C_REPLY_ACK:
502 			/*
503 			 * Both native ACK and I2C ACK replies received. We
504 			 * can assume the transfer was successful.
505 			 */
506 			if (ret != msg->size)
507 				drm_dp_i2c_msg_write_status_update(msg);
508 			return ret;
509 
510 		case DP_AUX_I2C_REPLY_NACK:
511 			DRM_DEBUG_KMS("I2C nack (result=%d, size=%zu\n", ret, msg->size);
512 			aux->i2c_nack_count++;
513 			return -EREMOTEIO;
514 
515 		case DP_AUX_I2C_REPLY_DEFER:
516 			DRM_DEBUG_KMS("I2C defer\n");
517 			/* DP Compliance Test 4.2.2.5 Requirement:
518 			 * Must have at least 7 retries for I2C defers on the
519 			 * transaction to pass this test
520 			 */
521 			aux->i2c_defer_count++;
522 			if (defer_i2c < 7)
523 				defer_i2c++;
524 			usleep_range(400, 500);
525 			drm_dp_i2c_msg_write_status_update(msg);
526 			continue;
527 
528 		default:
529 			DRM_ERROR("invalid I2C reply %#04x\n", msg->reply);
530 			return -EREMOTEIO;
531 		}
532 	}
533 
534 	DRM_DEBUG_KMS("too many retries, giving up\n");
535 	return -EREMOTEIO;
536 }
537 
538 static void drm_dp_i2c_msg_set_request(struct drm_dp_aux_msg *msg,
539 				       const struct i2c_msg *i2c_msg)
540 {
541 	msg->request = (i2c_msg->flags & I2C_M_RD) ?
542 		DP_AUX_I2C_READ : DP_AUX_I2C_WRITE;
543 	msg->request |= DP_AUX_I2C_MOT;
544 }
545 
546 /*
547  * Keep retrying drm_dp_i2c_do_msg until all data has been transferred.
548  *
549  * Returns an error code on failure, or a recommended transfer size on success.
550  */
551 static int drm_dp_i2c_drain_msg(struct drm_dp_aux *aux, struct drm_dp_aux_msg *orig_msg)
552 {
553 	int err, ret = orig_msg->size;
554 	struct drm_dp_aux_msg msg = *orig_msg;
555 
556 	while (msg.size > 0) {
557 		err = drm_dp_i2c_do_msg(aux, &msg);
558 		if (err <= 0)
559 			return err == 0 ? -EPROTO : err;
560 
561 		if (err < msg.size && err < ret) {
562 			DRM_DEBUG_KMS("Partial I2C reply: requested %zu bytes got %d bytes\n",
563 				      msg.size, err);
564 			ret = err;
565 		}
566 
567 		msg.size -= err;
568 		msg.buffer += err;
569 	}
570 
571 	return ret;
572 }
573 
574 /*
575  * Bizlink designed DP->DVI-D Dual Link adapters require the I2C over AUX
576  * packets to be as large as possible. If not, the I2C transactions never
577  * succeed. Hence the default is maximum.
578  */
579 static int dp_aux_i2c_transfer_size __read_mostly = DP_AUX_MAX_PAYLOAD_BYTES;
580 module_param_unsafe(dp_aux_i2c_transfer_size, int, 0644);
581 MODULE_PARM_DESC(dp_aux_i2c_transfer_size,
582 		 "Number of bytes to transfer in a single I2C over DP AUX CH message, (1-16, default 16)");
583 
584 static int drm_dp_i2c_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs,
585 			   int num)
586 {
587 	struct drm_dp_aux *aux = adapter->algo_data;
588 	unsigned int i, j;
589 	unsigned transfer_size;
590 	struct drm_dp_aux_msg msg;
591 	int err = 0;
592 
593 	dp_aux_i2c_transfer_size = clamp(dp_aux_i2c_transfer_size, 1, DP_AUX_MAX_PAYLOAD_BYTES);
594 
595 	memset(&msg, 0, sizeof(msg));
596 
597 	for (i = 0; i < num; i++) {
598 		msg.address = msgs[i].addr;
599 		drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
600 		/* Send a bare address packet to start the transaction.
601 		 * Zero sized messages specify an address only (bare
602 		 * address) transaction.
603 		 */
604 		msg.buffer = NULL;
605 		msg.size = 0;
606 		err = drm_dp_i2c_do_msg(aux, &msg);
607 
608 		/*
609 		 * Reset msg.request in case in case it got
610 		 * changed into a WRITE_STATUS_UPDATE.
611 		 */
612 		drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
613 
614 		if (err < 0)
615 			break;
616 		/* We want each transaction to be as large as possible, but
617 		 * we'll go to smaller sizes if the hardware gives us a
618 		 * short reply.
619 		 */
620 		transfer_size = dp_aux_i2c_transfer_size;
621 		for (j = 0; j < msgs[i].len; j += msg.size) {
622 			msg.buffer = msgs[i].buf + j;
623 			msg.size = min(transfer_size, msgs[i].len - j);
624 
625 			err = drm_dp_i2c_drain_msg(aux, &msg);
626 
627 			/*
628 			 * Reset msg.request in case in case it got
629 			 * changed into a WRITE_STATUS_UPDATE.
630 			 */
631 			drm_dp_i2c_msg_set_request(&msg, &msgs[i]);
632 
633 			if (err < 0)
634 				break;
635 			transfer_size = err;
636 		}
637 		if (err < 0)
638 			break;
639 	}
640 	if (err >= 0)
641 		err = num;
642 	/* Send a bare address packet to close out the transaction.
643 	 * Zero sized messages specify an address only (bare
644 	 * address) transaction.
645 	 */
646 	msg.request &= ~DP_AUX_I2C_MOT;
647 	msg.buffer = NULL;
648 	msg.size = 0;
649 	(void)drm_dp_i2c_do_msg(aux, &msg);
650 
651 	return err;
652 }
653 
654 static const struct i2c_algorithm drm_dp_i2c_algo = {
655 	.functionality = drm_dp_i2c_functionality,
656 	.master_xfer = drm_dp_i2c_xfer,
657 };
658 
659 /**
660  * drm_dp_aux_register() - initialise and register aux channel
661  * @aux: DisplayPort AUX channel
662  *
663  * Returns 0 on success or a negative error code on failure.
664  */
665 int drm_dp_aux_register(struct drm_dp_aux *aux)
666 {
667 	mutex_init(&aux->hw_mutex);
668 
669 	aux->ddc.algo = &drm_dp_i2c_algo;
670 	aux->ddc.algo_data = aux;
671 	aux->ddc.retries = 3;
672 
673 	aux->ddc.class = I2C_CLASS_DDC;
674 	aux->ddc.owner = THIS_MODULE;
675 	aux->ddc.dev.parent = aux->dev;
676 	aux->ddc.dev.of_node = aux->dev->of_node;
677 
678 	strlcpy(aux->ddc.name, aux->name ? aux->name : dev_name(aux->dev),
679 		sizeof(aux->ddc.name));
680 
681 	return i2c_add_adapter(&aux->ddc);
682 }
683 EXPORT_SYMBOL(drm_dp_aux_register);
684 #endif
685 
686 /**
687  * drm_dp_aux_unregister() - unregister an AUX adapter
688  * @aux: DisplayPort AUX channel
689  */
690 void drm_dp_aux_unregister(struct drm_dp_aux *aux)
691 {
692 #if 0
693 	i2c_del_adapter(&aux->ddc);
694 #endif
695 }
696 EXPORT_SYMBOL(drm_dp_aux_unregister);
697