1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/i2c.h> 32 #include <linux/module.h> 33 #include <drm/drmP.h> 34 #include <drm/drm_edid.h> 35 36 #include <bus/iicbus/iic.h> 37 #include <bus/iicbus/iiconf.h> 38 #include "iicbus_if.h" 39 40 #define version_greater(edid, maj, min) \ 41 (((edid)->version > (maj)) || \ 42 ((edid)->version == (maj) && (edid)->revision > (min))) 43 44 #define EDID_EST_TIMINGS 16 45 #define EDID_STD_TIMINGS 8 46 #define EDID_DETAILED_TIMINGS 4 47 48 /* 49 * EDID blocks out in the wild have a variety of bugs, try to collect 50 * them here (note that userspace may work around broken monitors first, 51 * but fixes should make their way here so that the kernel "just works" 52 * on as many displays as possible). 53 */ 54 55 /* First detailed mode wrong, use largest 60Hz mode */ 56 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 57 /* Reported 135MHz pixel clock is too high, needs adjustment */ 58 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 59 /* Prefer the largest mode at 75 Hz */ 60 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 61 /* Detail timing is in cm not mm */ 62 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 63 /* Detailed timing descriptors have bogus size values, so just take the 64 * maximum size and use that. 65 */ 66 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 67 /* Monitor forgot to set the first detailed is preferred bit. */ 68 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 69 /* use +hsync +vsync for detailed mode */ 70 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 71 /* Force reduced-blanking timings for detailed modes */ 72 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 73 74 struct detailed_mode_closure { 75 struct drm_connector *connector; 76 struct edid *edid; 77 bool preferred; 78 u32 quirks; 79 int modes; 80 }; 81 82 #define LEVEL_DMT 0 83 #define LEVEL_GTF 1 84 #define LEVEL_GTF2 2 85 #define LEVEL_CVT 3 86 87 static struct edid_quirk { 88 char vendor[4]; 89 int product_id; 90 u32 quirks; 91 } edid_quirk_list[] = { 92 /* Acer AL1706 */ 93 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 94 /* Acer F51 */ 95 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 96 /* Unknown Acer */ 97 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 98 99 /* Belinea 10 15 55 */ 100 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 101 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 102 103 /* Envision Peripherals, Inc. EN-7100e */ 104 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 105 /* Envision EN2028 */ 106 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 107 108 /* Funai Electronics PM36B */ 109 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 110 EDID_QUIRK_DETAILED_IN_CM }, 111 112 /* LG Philips LCD LP154W01-A5 */ 113 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 114 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 115 116 /* Philips 107p5 CRT */ 117 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 118 119 /* Proview AY765C */ 120 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 121 122 /* Samsung SyncMaster 205BW. Note: irony */ 123 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 124 /* Samsung SyncMaster 22[5-6]BW */ 125 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 126 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 127 128 /* ViewSonic VA2026w */ 129 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 130 }; 131 132 /* 133 * Autogenerated from the DMT spec. 134 * This table is copied from xfree86/modes/xf86EdidModes.c. 135 */ 136 static const struct drm_display_mode drm_dmt_modes[] = { 137 /* 640x350@85Hz */ 138 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 139 736, 832, 0, 350, 382, 385, 445, 0, 140 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 141 /* 640x400@85Hz */ 142 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 143 736, 832, 0, 400, 401, 404, 445, 0, 144 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 145 /* 720x400@85Hz */ 146 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 147 828, 936, 0, 400, 401, 404, 446, 0, 148 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 149 /* 640x480@60Hz */ 150 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 151 752, 800, 0, 480, 489, 492, 525, 0, 152 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 153 /* 640x480@72Hz */ 154 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 155 704, 832, 0, 480, 489, 492, 520, 0, 156 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 157 /* 640x480@75Hz */ 158 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 159 720, 840, 0, 480, 481, 484, 500, 0, 160 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 161 /* 640x480@85Hz */ 162 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 163 752, 832, 0, 480, 481, 484, 509, 0, 164 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 165 /* 800x600@56Hz */ 166 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 167 896, 1024, 0, 600, 601, 603, 625, 0, 168 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 169 /* 800x600@60Hz */ 170 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 171 968, 1056, 0, 600, 601, 605, 628, 0, 172 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 173 /* 800x600@72Hz */ 174 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 175 976, 1040, 0, 600, 637, 643, 666, 0, 176 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 177 /* 800x600@75Hz */ 178 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 179 896, 1056, 0, 600, 601, 604, 625, 0, 180 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 181 /* 800x600@85Hz */ 182 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 183 896, 1048, 0, 600, 601, 604, 631, 0, 184 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 185 /* 800x600@120Hz RB */ 186 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 187 880, 960, 0, 600, 603, 607, 636, 0, 188 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 189 /* 848x480@60Hz */ 190 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 191 976, 1088, 0, 480, 486, 494, 517, 0, 192 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 193 /* 1024x768@43Hz, interlace */ 194 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 195 1208, 1264, 0, 768, 768, 772, 817, 0, 196 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 197 DRM_MODE_FLAG_INTERLACE) }, 198 /* 1024x768@60Hz */ 199 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 200 1184, 1344, 0, 768, 771, 777, 806, 0, 201 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 202 /* 1024x768@70Hz */ 203 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 204 1184, 1328, 0, 768, 771, 777, 806, 0, 205 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 206 /* 1024x768@75Hz */ 207 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 208 1136, 1312, 0, 768, 769, 772, 800, 0, 209 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 210 /* 1024x768@85Hz */ 211 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 212 1168, 1376, 0, 768, 769, 772, 808, 0, 213 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 214 /* 1024x768@120Hz RB */ 215 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 216 1104, 1184, 0, 768, 771, 775, 813, 0, 217 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 218 /* 1152x864@75Hz */ 219 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 220 1344, 1600, 0, 864, 865, 868, 900, 0, 221 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 222 /* 1280x768@60Hz RB */ 223 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 224 1360, 1440, 0, 768, 771, 778, 790, 0, 225 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 226 /* 1280x768@60Hz */ 227 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 228 1472, 1664, 0, 768, 771, 778, 798, 0, 229 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 230 /* 1280x768@75Hz */ 231 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 232 1488, 1696, 0, 768, 771, 778, 805, 0, 233 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 234 /* 1280x768@85Hz */ 235 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 236 1496, 1712, 0, 768, 771, 778, 809, 0, 237 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 238 /* 1280x768@120Hz RB */ 239 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 240 1360, 1440, 0, 768, 771, 778, 813, 0, 241 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 242 /* 1280x800@60Hz RB */ 243 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 244 1360, 1440, 0, 800, 803, 809, 823, 0, 245 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 246 /* 1280x800@60Hz */ 247 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 248 1480, 1680, 0, 800, 803, 809, 831, 0, 249 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 250 /* 1280x800@75Hz */ 251 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 252 1488, 1696, 0, 800, 803, 809, 838, 0, 253 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 254 /* 1280x800@85Hz */ 255 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 256 1496, 1712, 0, 800, 803, 809, 843, 0, 257 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 258 /* 1280x800@120Hz RB */ 259 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 260 1360, 1440, 0, 800, 803, 809, 847, 0, 261 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 262 /* 1280x960@60Hz */ 263 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 264 1488, 1800, 0, 960, 961, 964, 1000, 0, 265 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 266 /* 1280x960@85Hz */ 267 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 268 1504, 1728, 0, 960, 961, 964, 1011, 0, 269 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 270 /* 1280x960@120Hz RB */ 271 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 272 1360, 1440, 0, 960, 963, 967, 1017, 0, 273 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 274 /* 1280x1024@60Hz */ 275 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 276 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 277 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 278 /* 1280x1024@75Hz */ 279 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 280 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 281 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 282 /* 1280x1024@85Hz */ 283 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 284 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 285 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 286 /* 1280x1024@120Hz RB */ 287 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 288 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 289 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 290 /* 1360x768@60Hz */ 291 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 292 1536, 1792, 0, 768, 771, 777, 795, 0, 293 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 294 /* 1360x768@120Hz RB */ 295 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 296 1440, 1520, 0, 768, 771, 776, 813, 0, 297 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 298 /* 1400x1050@60Hz RB */ 299 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 300 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 301 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 302 /* 1400x1050@60Hz */ 303 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 304 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 305 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 306 /* 1400x1050@75Hz */ 307 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 308 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 309 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 310 /* 1400x1050@85Hz */ 311 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 312 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 313 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 314 /* 1400x1050@120Hz RB */ 315 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 316 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 317 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 318 /* 1440x900@60Hz RB */ 319 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 320 1520, 1600, 0, 900, 903, 909, 926, 0, 321 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 322 /* 1440x900@60Hz */ 323 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 324 1672, 1904, 0, 900, 903, 909, 934, 0, 325 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 326 /* 1440x900@75Hz */ 327 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 328 1688, 1936, 0, 900, 903, 909, 942, 0, 329 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 330 /* 1440x900@85Hz */ 331 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 332 1696, 1952, 0, 900, 903, 909, 948, 0, 333 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 334 /* 1440x900@120Hz RB */ 335 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 336 1520, 1600, 0, 900, 903, 909, 953, 0, 337 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 338 /* 1600x1200@60Hz */ 339 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 340 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 341 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 342 /* 1600x1200@65Hz */ 343 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 344 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 345 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 346 /* 1600x1200@70Hz */ 347 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 348 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 349 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 350 /* 1600x1200@75Hz */ 351 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 352 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 353 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 354 /* 1600x1200@85Hz */ 355 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 356 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 357 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 358 /* 1600x1200@120Hz RB */ 359 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 360 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 361 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 362 /* 1680x1050@60Hz RB */ 363 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 364 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 365 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 366 /* 1680x1050@60Hz */ 367 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 368 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 369 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 370 /* 1680x1050@75Hz */ 371 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 372 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 373 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 374 /* 1680x1050@85Hz */ 375 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 376 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 377 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 378 /* 1680x1050@120Hz RB */ 379 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 380 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 381 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 382 /* 1792x1344@60Hz */ 383 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 384 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 385 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 386 /* 1792x1344@75Hz */ 387 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 388 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 389 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 390 /* 1792x1344@120Hz RB */ 391 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 392 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 393 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 394 /* 1856x1392@60Hz */ 395 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 396 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 397 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 398 /* 1856x1392@75Hz */ 399 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 400 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 401 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 402 /* 1856x1392@120Hz RB */ 403 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 404 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 405 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 406 /* 1920x1200@60Hz RB */ 407 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 408 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 409 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 410 /* 1920x1200@60Hz */ 411 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 412 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 413 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 414 /* 1920x1200@75Hz */ 415 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 416 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 417 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 418 /* 1920x1200@85Hz */ 419 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 420 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 421 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 422 /* 1920x1200@120Hz RB */ 423 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 424 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 425 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 426 /* 1920x1440@60Hz */ 427 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 428 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 429 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 430 /* 1920x1440@75Hz */ 431 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 432 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 433 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 434 /* 1920x1440@120Hz RB */ 435 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 436 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 438 /* 2560x1600@60Hz RB */ 439 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 440 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 441 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 442 /* 2560x1600@60Hz */ 443 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 444 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 445 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 446 /* 2560x1600@75HZ */ 447 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 448 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 449 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 450 /* 2560x1600@85HZ */ 451 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 452 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 453 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 454 /* 2560x1600@120Hz RB */ 455 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 456 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 457 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 458 }; 459 460 static const struct drm_display_mode edid_est_modes[] = { 461 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 462 968, 1056, 0, 600, 601, 605, 628, 0, 463 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 464 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 465 896, 1024, 0, 600, 601, 603, 625, 0, 466 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 467 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 468 720, 840, 0, 480, 481, 484, 500, 0, 469 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 470 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 471 704, 832, 0, 480, 489, 491, 520, 0, 472 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 473 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 474 768, 864, 0, 480, 483, 486, 525, 0, 475 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 476 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 477 752, 800, 0, 480, 490, 492, 525, 0, 478 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 479 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 480 846, 900, 0, 400, 421, 423, 449, 0, 481 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 482 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 483 846, 900, 0, 400, 412, 414, 449, 0, 484 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 485 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 486 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 488 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 489 1136, 1312, 0, 768, 769, 772, 800, 0, 490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 491 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 492 1184, 1328, 0, 768, 771, 777, 806, 0, 493 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 494 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 495 1184, 1344, 0, 768, 771, 777, 806, 0, 496 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 497 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 498 1208, 1264, 0, 768, 768, 776, 817, 0, 499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 500 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 501 928, 1152, 0, 624, 625, 628, 667, 0, 502 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 503 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 504 896, 1056, 0, 600, 601, 604, 625, 0, 505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 506 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 507 976, 1040, 0, 600, 637, 643, 666, 0, 508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 509 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 510 1344, 1600, 0, 864, 865, 868, 900, 0, 511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 512 }; 513 514 struct minimode { 515 short w; 516 short h; 517 short r; 518 short rb; 519 }; 520 521 static const struct minimode est3_modes[] = { 522 /* byte 6 */ 523 { 640, 350, 85, 0 }, 524 { 640, 400, 85, 0 }, 525 { 720, 400, 85, 0 }, 526 { 640, 480, 85, 0 }, 527 { 848, 480, 60, 0 }, 528 { 800, 600, 85, 0 }, 529 { 1024, 768, 85, 0 }, 530 { 1152, 864, 75, 0 }, 531 /* byte 7 */ 532 { 1280, 768, 60, 1 }, 533 { 1280, 768, 60, 0 }, 534 { 1280, 768, 75, 0 }, 535 { 1280, 768, 85, 0 }, 536 { 1280, 960, 60, 0 }, 537 { 1280, 960, 85, 0 }, 538 { 1280, 1024, 60, 0 }, 539 { 1280, 1024, 85, 0 }, 540 /* byte 8 */ 541 { 1360, 768, 60, 0 }, 542 { 1440, 900, 60, 1 }, 543 { 1440, 900, 60, 0 }, 544 { 1440, 900, 75, 0 }, 545 { 1440, 900, 85, 0 }, 546 { 1400, 1050, 60, 1 }, 547 { 1400, 1050, 60, 0 }, 548 { 1400, 1050, 75, 0 }, 549 /* byte 9 */ 550 { 1400, 1050, 85, 0 }, 551 { 1680, 1050, 60, 1 }, 552 { 1680, 1050, 60, 0 }, 553 { 1680, 1050, 75, 0 }, 554 { 1680, 1050, 85, 0 }, 555 { 1600, 1200, 60, 0 }, 556 { 1600, 1200, 65, 0 }, 557 { 1600, 1200, 70, 0 }, 558 /* byte 10 */ 559 { 1600, 1200, 75, 0 }, 560 { 1600, 1200, 85, 0 }, 561 { 1792, 1344, 60, 0 }, 562 { 1792, 1344, 85, 0 }, 563 { 1856, 1392, 60, 0 }, 564 { 1856, 1392, 75, 0 }, 565 { 1920, 1200, 60, 1 }, 566 { 1920, 1200, 60, 0 }, 567 /* byte 11 */ 568 { 1920, 1200, 75, 0 }, 569 { 1920, 1200, 85, 0 }, 570 { 1920, 1440, 60, 0 }, 571 { 1920, 1440, 75, 0 }, 572 }; 573 574 static const struct minimode extra_modes[] = { 575 { 1024, 576, 60, 0 }, 576 { 1366, 768, 60, 0 }, 577 { 1600, 900, 60, 0 }, 578 { 1680, 945, 60, 0 }, 579 { 1920, 1080, 60, 0 }, 580 { 2048, 1152, 60, 0 }, 581 { 2048, 1536, 60, 0 }, 582 }; 583 584 /* 585 * Probably taken from CEA-861 spec. 586 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 587 */ 588 static const struct drm_display_mode edid_cea_modes[] = { 589 /* 1 - 640x480@60Hz */ 590 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 591 752, 800, 0, 480, 490, 492, 525, 0, 592 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 593 /* 2 - 720x480@60Hz */ 594 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 595 798, 858, 0, 480, 489, 495, 525, 0, 596 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 597 /* 3 - 720x480@60Hz */ 598 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 599 798, 858, 0, 480, 489, 495, 525, 0, 600 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 601 /* 4 - 1280x720@60Hz */ 602 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 603 1430, 1650, 0, 720, 725, 730, 750, 0, 604 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 605 /* 5 - 1920x1080i@60Hz */ 606 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 607 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 608 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 609 DRM_MODE_FLAG_INTERLACE) }, 610 /* 6 - 1440x480i@60Hz */ 611 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 612 1602, 1716, 0, 480, 488, 494, 525, 0, 613 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 614 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 615 /* 7 - 1440x480i@60Hz */ 616 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 617 1602, 1716, 0, 480, 488, 494, 525, 0, 618 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 619 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 620 /* 8 - 1440x240@60Hz */ 621 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 622 1602, 1716, 0, 240, 244, 247, 262, 0, 623 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 624 DRM_MODE_FLAG_DBLCLK) }, 625 /* 9 - 1440x240@60Hz */ 626 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 627 1602, 1716, 0, 240, 244, 247, 262, 0, 628 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 629 DRM_MODE_FLAG_DBLCLK) }, 630 /* 10 - 2880x480i@60Hz */ 631 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 632 3204, 3432, 0, 480, 488, 494, 525, 0, 633 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 634 DRM_MODE_FLAG_INTERLACE) }, 635 /* 11 - 2880x480i@60Hz */ 636 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 637 3204, 3432, 0, 480, 488, 494, 525, 0, 638 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 639 DRM_MODE_FLAG_INTERLACE) }, 640 /* 12 - 2880x240@60Hz */ 641 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 642 3204, 3432, 0, 240, 244, 247, 262, 0, 643 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 644 /* 13 - 2880x240@60Hz */ 645 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 646 3204, 3432, 0, 240, 244, 247, 262, 0, 647 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 648 /* 14 - 1440x480@60Hz */ 649 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 650 1596, 1716, 0, 480, 489, 495, 525, 0, 651 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 652 /* 15 - 1440x480@60Hz */ 653 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 654 1596, 1716, 0, 480, 489, 495, 525, 0, 655 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 656 /* 16 - 1920x1080@60Hz */ 657 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 658 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 659 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 660 /* 17 - 720x576@50Hz */ 661 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 662 796, 864, 0, 576, 581, 586, 625, 0, 663 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 664 /* 18 - 720x576@50Hz */ 665 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 666 796, 864, 0, 576, 581, 586, 625, 0, 667 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 668 /* 19 - 1280x720@50Hz */ 669 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 670 1760, 1980, 0, 720, 725, 730, 750, 0, 671 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 672 /* 20 - 1920x1080i@50Hz */ 673 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 674 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 675 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 676 DRM_MODE_FLAG_INTERLACE) }, 677 /* 21 - 1440x576i@50Hz */ 678 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 679 1590, 1728, 0, 576, 580, 586, 625, 0, 680 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 681 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 682 /* 22 - 1440x576i@50Hz */ 683 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 684 1590, 1728, 0, 576, 580, 586, 625, 0, 685 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 686 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 687 /* 23 - 1440x288@50Hz */ 688 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 689 1590, 1728, 0, 288, 290, 293, 312, 0, 690 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 691 DRM_MODE_FLAG_DBLCLK) }, 692 /* 24 - 1440x288@50Hz */ 693 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 694 1590, 1728, 0, 288, 290, 293, 312, 0, 695 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 696 DRM_MODE_FLAG_DBLCLK) }, 697 /* 25 - 2880x576i@50Hz */ 698 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 699 3180, 3456, 0, 576, 580, 586, 625, 0, 700 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 701 DRM_MODE_FLAG_INTERLACE) }, 702 /* 26 - 2880x576i@50Hz */ 703 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 704 3180, 3456, 0, 576, 580, 586, 625, 0, 705 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 706 DRM_MODE_FLAG_INTERLACE) }, 707 /* 27 - 2880x288@50Hz */ 708 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 709 3180, 3456, 0, 288, 290, 293, 312, 0, 710 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 711 /* 28 - 2880x288@50Hz */ 712 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 713 3180, 3456, 0, 288, 290, 293, 312, 0, 714 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 715 /* 29 - 1440x576@50Hz */ 716 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 717 1592, 1728, 0, 576, 581, 586, 625, 0, 718 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 719 /* 30 - 1440x576@50Hz */ 720 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 721 1592, 1728, 0, 576, 581, 586, 625, 0, 722 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 723 /* 31 - 1920x1080@50Hz */ 724 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 725 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 726 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 727 /* 32 - 1920x1080@24Hz */ 728 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 729 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 730 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 731 /* 33 - 1920x1080@25Hz */ 732 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 733 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 734 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 735 /* 34 - 1920x1080@30Hz */ 736 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 737 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 738 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 739 /* 35 - 2880x480@60Hz */ 740 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 741 3192, 3432, 0, 480, 489, 495, 525, 0, 742 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 743 /* 36 - 2880x480@60Hz */ 744 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 745 3192, 3432, 0, 480, 489, 495, 525, 0, 746 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 747 /* 37 - 2880x576@50Hz */ 748 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 749 3184, 3456, 0, 576, 581, 586, 625, 0, 750 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 751 /* 38 - 2880x576@50Hz */ 752 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 753 3184, 3456, 0, 576, 581, 586, 625, 0, 754 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 755 /* 39 - 1920x1080i@50Hz */ 756 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 757 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 758 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 759 DRM_MODE_FLAG_INTERLACE) }, 760 /* 40 - 1920x1080i@100Hz */ 761 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 762 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 763 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 764 DRM_MODE_FLAG_INTERLACE) }, 765 /* 41 - 1280x720@100Hz */ 766 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 767 1760, 1980, 0, 720, 725, 730, 750, 0, 768 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 769 /* 42 - 720x576@100Hz */ 770 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 771 796, 864, 0, 576, 581, 586, 625, 0, 772 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 773 /* 43 - 720x576@100Hz */ 774 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 775 796, 864, 0, 576, 581, 586, 625, 0, 776 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 777 /* 44 - 1440x576i@100Hz */ 778 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 779 1590, 1728, 0, 576, 580, 586, 625, 0, 780 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 781 DRM_MODE_FLAG_DBLCLK) }, 782 /* 45 - 1440x576i@100Hz */ 783 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 784 1590, 1728, 0, 576, 580, 586, 625, 0, 785 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 786 DRM_MODE_FLAG_DBLCLK) }, 787 /* 46 - 1920x1080i@120Hz */ 788 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 789 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 790 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 791 DRM_MODE_FLAG_INTERLACE) }, 792 /* 47 - 1280x720@120Hz */ 793 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 794 1430, 1650, 0, 720, 725, 730, 750, 0, 795 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 796 /* 48 - 720x480@120Hz */ 797 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 798 798, 858, 0, 480, 489, 495, 525, 0, 799 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 800 /* 49 - 720x480@120Hz */ 801 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 802 798, 858, 0, 480, 489, 495, 525, 0, 803 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 804 /* 50 - 1440x480i@120Hz */ 805 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 806 1602, 1716, 0, 480, 488, 494, 525, 0, 807 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 808 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 809 /* 51 - 1440x480i@120Hz */ 810 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 811 1602, 1716, 0, 480, 488, 494, 525, 0, 812 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 813 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 814 /* 52 - 720x576@200Hz */ 815 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 816 796, 864, 0, 576, 581, 586, 625, 0, 817 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 818 /* 53 - 720x576@200Hz */ 819 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 820 796, 864, 0, 576, 581, 586, 625, 0, 821 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 822 /* 54 - 1440x576i@200Hz */ 823 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 824 1590, 1728, 0, 576, 580, 586, 625, 0, 825 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 826 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 827 /* 55 - 1440x576i@200Hz */ 828 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 829 1590, 1728, 0, 576, 580, 586, 625, 0, 830 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 831 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 832 /* 56 - 720x480@240Hz */ 833 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 834 798, 858, 0, 480, 489, 495, 525, 0, 835 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 836 /* 57 - 720x480@240Hz */ 837 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 838 798, 858, 0, 480, 489, 495, 525, 0, 839 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 840 /* 58 - 1440x480i@240 */ 841 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 842 1602, 1716, 0, 480, 488, 494, 525, 0, 843 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 844 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 845 /* 59 - 1440x480i@240 */ 846 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 847 1602, 1716, 0, 480, 488, 494, 525, 0, 848 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 849 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 850 /* 60 - 1280x720@24Hz */ 851 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 852 3080, 3300, 0, 720, 725, 730, 750, 0, 853 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 854 /* 61 - 1280x720@25Hz */ 855 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 856 3740, 3960, 0, 720, 725, 730, 750, 0, 857 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 858 /* 62 - 1280x720@30Hz */ 859 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 860 3080, 3300, 0, 720, 725, 730, 750, 0, 861 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 862 /* 63 - 1920x1080@120Hz */ 863 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 864 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 865 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 866 /* 64 - 1920x1080@100Hz */ 867 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 868 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 869 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 870 }; 871 872 /*** DDC fetch and block validation ***/ 873 874 static const u8 edid_header[] = { 875 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 876 }; 877 878 /* 879 * Sanity check the header of the base EDID block. Return 8 if the header 880 * is perfect, down to 0 if it's totally wrong. 881 */ 882 int drm_edid_header_is_valid(const u8 *raw_edid) 883 { 884 int i, score = 0; 885 886 for (i = 0; i < sizeof(edid_header); i++) 887 if (raw_edid[i] == edid_header[i]) 888 score++; 889 890 return score; 891 } 892 EXPORT_SYMBOL(drm_edid_header_is_valid); 893 894 static int edid_fixup __read_mostly = 6; 895 module_param_named(edid_fixup, edid_fixup, int, 0400); 896 MODULE_PARM_DESC(edid_fixup, 897 "Minimum number of valid EDID header bytes (0-8, default 6)"); 898 899 /* 900 * Sanity check the EDID block (base or extension). Return 0 if the block 901 * doesn't check out, or 1 if it's valid. 902 */ 903 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 904 { 905 int i; 906 u8 csum = 0; 907 struct edid *edid = (struct edid *)raw_edid; 908 909 if (edid_fixup > 8 || edid_fixup < 0) 910 edid_fixup = 6; 911 912 if (block == 0) { 913 int score = drm_edid_header_is_valid(raw_edid); 914 if (score == 8) ; 915 else if (score >= edid_fixup) { 916 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 917 memcpy(raw_edid, edid_header, sizeof(edid_header)); 918 } else { 919 goto bad; 920 } 921 } 922 923 for (i = 0; i < EDID_LENGTH; i++) 924 csum += raw_edid[i]; 925 if (csum) { 926 if (print_bad_edid) { 927 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 928 } 929 930 /* allow CEA to slide through, switches mangle this */ 931 if (raw_edid[0] != 0x02) 932 goto bad; 933 } 934 935 /* per-block-type checks */ 936 switch (raw_edid[0]) { 937 case 0: /* base */ 938 if (edid->version != 1) { 939 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 940 goto bad; 941 } 942 943 if (edid->revision > 4) 944 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 945 break; 946 947 default: 948 break; 949 } 950 951 return 1; 952 953 bad: 954 if (raw_edid && print_bad_edid) { 955 DRM_DEBUG_KMS("Raw EDID:\n"); 956 for (i = 0; i < EDID_LENGTH; ) { 957 kprintf("%02x", raw_edid[i]); 958 i++; 959 if (i % 16 == 0 || i == EDID_LENGTH) 960 kprintf("\n"); 961 else if (i % 8 == 0) 962 kprintf(" "); 963 else 964 kprintf(" "); 965 } 966 } 967 return 0; 968 } 969 EXPORT_SYMBOL(drm_edid_block_valid); 970 971 /** 972 * drm_edid_is_valid - sanity check EDID data 973 * @edid: EDID data 974 * 975 * Sanity-check an entire EDID record (including extensions) 976 */ 977 bool drm_edid_is_valid(struct edid *edid) 978 { 979 int i; 980 u8 *raw = (u8 *)edid; 981 982 if (!edid) 983 return false; 984 985 for (i = 0; i <= edid->extensions; i++) 986 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 987 return false; 988 989 return true; 990 } 991 EXPORT_SYMBOL(drm_edid_is_valid); 992 993 #define DDC_SEGMENT_ADDR 0x30 994 /** 995 * Get EDID information via I2C. 996 * 997 * \param adapter : i2c device adaptor 998 * \param buf : EDID data buffer to be filled 999 * \param len : EDID data buffer length 1000 * \return 0 on success or -1 on failure. 1001 * 1002 * Try to fetch EDID information by calling i2c driver function. 1003 */ 1004 static int 1005 drm_do_probe_ddc_edid(struct device *adapter, unsigned char *buf, 1006 int block, int len) 1007 { 1008 unsigned char start = block * EDID_LENGTH; 1009 unsigned char segment = block >> 1; 1010 unsigned char xfers = segment ? 3 : 2; 1011 int ret, retries = 5; 1012 1013 /* The core i2c driver will automatically retry the transfer if the 1014 * adapter reports EAGAIN. However, we find that bit-banging transfers 1015 * are susceptible to errors under a heavily loaded machine and 1016 * generate spurious NAKs and timeouts. Retrying the transfer 1017 * of the individual block a few times seems to overcome this. 1018 */ 1019 do { 1020 struct i2c_msg msgs[] = { 1021 { 1022 .slave = DDC_SEGMENT_ADDR << 1, 1023 .flags = 0, 1024 .len = 1, 1025 .buf = &segment, 1026 }, { 1027 .slave = DDC_ADDR << 1, 1028 .flags = 0, 1029 .len = 1, 1030 .buf = &start, 1031 }, { 1032 .slave = DDC_ADDR << 1, 1033 .flags = I2C_M_RD, 1034 .len = len, 1035 .buf = buf, 1036 } 1037 }; 1038 1039 /* 1040 * Avoid sending the segment addr to not upset non-compliant ddc 1041 * monitors. 1042 */ 1043 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers); 1044 1045 if (ret != 0) 1046 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n", 1047 retries, ret); 1048 } while (ret != 0 && --retries); 1049 1050 return (ret == 0 ? 0 : -1); 1051 } 1052 1053 static bool drm_edid_is_zero(u8 *in_edid, int length) 1054 { 1055 int i; 1056 u32 *raw_edid = (u32 *)in_edid; 1057 1058 for (i = 0; i < length / 4; i++) 1059 if (*(raw_edid + i) != 0) 1060 return false; 1061 1062 return true; 1063 } 1064 1065 static u8 * 1066 drm_do_get_edid(struct drm_connector *connector, struct device *adapter) 1067 { 1068 int i, j = 0, valid_extensions = 0; 1069 u8 *block, *new; 1070 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1071 1072 block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK | M_ZERO); 1073 1074 /* base block fetch */ 1075 for (i = 0; i < 4; i++) { 1076 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1077 goto out; 1078 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1079 break; 1080 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1081 connector->null_edid_counter++; 1082 goto carp; 1083 } 1084 } 1085 if (i == 4) 1086 goto carp; 1087 1088 /* if there's no extensions, we're done */ 1089 if (block[0x7e] == 0) 1090 return block; 1091 1092 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM, M_WAITOK); 1093 if (!new) 1094 goto out; 1095 block = new; 1096 1097 for (j = 1; j <= block[0x7e]; j++) { 1098 for (i = 0; i < 4; i++) { 1099 if (drm_do_probe_ddc_edid(adapter, 1100 block + (valid_extensions + 1) * EDID_LENGTH, 1101 j, EDID_LENGTH)) 1102 goto out; 1103 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1104 valid_extensions++; 1105 break; 1106 } 1107 } 1108 1109 if (i == 4 && print_bad_edid) { 1110 dev_warn(connector->dev->dev, 1111 "%s: Ignoring invalid EDID block %d.\n", 1112 drm_get_connector_name(connector), j); 1113 1114 connector->bad_edid_counter++; 1115 } 1116 } 1117 1118 if (valid_extensions != block[0x7e]) { 1119 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1120 block[0x7e] = valid_extensions; 1121 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, 1122 M_DRM, M_WAITOK); 1123 if (!new) 1124 goto out; 1125 block = new; 1126 } 1127 1128 return block; 1129 1130 carp: 1131 if (print_bad_edid) { 1132 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1133 drm_get_connector_name(connector), j); 1134 } 1135 connector->bad_edid_counter++; 1136 1137 out: 1138 kfree(block, M_DRM); 1139 return NULL; 1140 } 1141 1142 /** 1143 * Probe DDC presence. 1144 * 1145 * \param adapter : i2c device adaptor 1146 * \return 1 on success 1147 */ 1148 bool 1149 drm_probe_ddc(struct device *adapter) 1150 { 1151 unsigned char out; 1152 1153 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1154 } 1155 EXPORT_SYMBOL(drm_probe_ddc); 1156 1157 /** 1158 * drm_get_edid - get EDID data, if available 1159 * @connector: connector we're probing 1160 * @adapter: i2c adapter to use for DDC 1161 * 1162 * Poke the given i2c channel to grab EDID data if possible. If found, 1163 * attach it to the connector. 1164 * 1165 * Return edid data or NULL if we couldn't find any. 1166 */ 1167 struct edid *drm_get_edid(struct drm_connector *connector, 1168 struct device *adapter) 1169 { 1170 struct edid *edid = NULL; 1171 1172 if (drm_probe_ddc(adapter)) 1173 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1174 1175 return edid; 1176 } 1177 EXPORT_SYMBOL(drm_get_edid); 1178 1179 /*** EDID parsing ***/ 1180 1181 /** 1182 * edid_vendor - match a string against EDID's obfuscated vendor field 1183 * @edid: EDID to match 1184 * @vendor: vendor string 1185 * 1186 * Returns true if @vendor is in @edid, false otherwise 1187 */ 1188 static bool edid_vendor(struct edid *edid, char *vendor) 1189 { 1190 char edid_vendor[3]; 1191 1192 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1193 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1194 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1195 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1196 1197 return !strncmp(edid_vendor, vendor, 3); 1198 } 1199 1200 /** 1201 * edid_get_quirks - return quirk flags for a given EDID 1202 * @edid: EDID to process 1203 * 1204 * This tells subsequent routines what fixes they need to apply. 1205 */ 1206 static u32 edid_get_quirks(struct edid *edid) 1207 { 1208 struct edid_quirk *quirk; 1209 int i; 1210 1211 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1212 quirk = &edid_quirk_list[i]; 1213 1214 if (edid_vendor(edid, quirk->vendor) && 1215 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1216 return quirk->quirks; 1217 } 1218 1219 return 0; 1220 } 1221 1222 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1223 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 1224 1225 /** 1226 * edid_fixup_preferred - set preferred modes based on quirk list 1227 * @connector: has mode list to fix up 1228 * @quirks: quirks list 1229 * 1230 * Walk the mode list for @connector, clearing the preferred status 1231 * on existing modes and setting it anew for the right mode ala @quirks. 1232 */ 1233 static void edid_fixup_preferred(struct drm_connector *connector, 1234 u32 quirks) 1235 { 1236 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1237 int target_refresh = 0; 1238 1239 if (list_empty(&connector->probed_modes)) 1240 return; 1241 1242 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1243 target_refresh = 60; 1244 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1245 target_refresh = 75; 1246 1247 preferred_mode = list_first_entry(&connector->probed_modes, 1248 struct drm_display_mode, head); 1249 1250 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1251 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1252 1253 if (cur_mode == preferred_mode) 1254 continue; 1255 1256 /* Largest mode is preferred */ 1257 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1258 preferred_mode = cur_mode; 1259 1260 /* At a given size, try to get closest to target refresh */ 1261 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1262 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 1263 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 1264 preferred_mode = cur_mode; 1265 } 1266 } 1267 1268 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1269 } 1270 1271 static bool 1272 mode_is_rb(const struct drm_display_mode *mode) 1273 { 1274 return (mode->htotal - mode->hdisplay == 160) && 1275 (mode->hsync_end - mode->hdisplay == 80) && 1276 (mode->hsync_end - mode->hsync_start == 32) && 1277 (mode->vsync_start - mode->vdisplay == 3); 1278 } 1279 1280 /* 1281 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1282 * @dev: Device to duplicate against 1283 * @hsize: Mode width 1284 * @vsize: Mode height 1285 * @fresh: Mode refresh rate 1286 * @rb: Mode reduced-blanking-ness 1287 * 1288 * Walk the DMT mode list looking for a match for the given parameters. 1289 * Return a newly allocated copy of the mode, or NULL if not found. 1290 */ 1291 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1292 int hsize, int vsize, int fresh, 1293 bool rb) 1294 { 1295 int i; 1296 1297 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1298 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1299 if (hsize != ptr->hdisplay) 1300 continue; 1301 if (vsize != ptr->vdisplay) 1302 continue; 1303 if (fresh != drm_mode_vrefresh(ptr)) 1304 continue; 1305 if (rb != mode_is_rb(ptr)) 1306 continue; 1307 1308 return drm_mode_duplicate(dev, ptr); 1309 } 1310 1311 return NULL; 1312 } 1313 EXPORT_SYMBOL(drm_mode_find_dmt); 1314 1315 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1316 1317 static void 1318 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1319 { 1320 int i, n = 0; 1321 u8 d = ext[0x02]; 1322 u8 *det_base = ext + d; 1323 1324 n = (127 - d) / 18; 1325 for (i = 0; i < n; i++) 1326 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1327 } 1328 1329 static void 1330 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1331 { 1332 unsigned int i, n = min((int)ext[0x02], 6); 1333 u8 *det_base = ext + 5; 1334 1335 if (ext[0x01] != 1) 1336 return; /* unknown version */ 1337 1338 for (i = 0; i < n; i++) 1339 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1340 } 1341 1342 static void 1343 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1344 { 1345 int i; 1346 struct edid *edid = (struct edid *)raw_edid; 1347 1348 if (edid == NULL) 1349 return; 1350 1351 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1352 cb(&(edid->detailed_timings[i]), closure); 1353 1354 for (i = 1; i <= raw_edid[0x7e]; i++) { 1355 u8 *ext = raw_edid + (i * EDID_LENGTH); 1356 switch (*ext) { 1357 case CEA_EXT: 1358 cea_for_each_detailed_block(ext, cb, closure); 1359 break; 1360 case VTB_EXT: 1361 vtb_for_each_detailed_block(ext, cb, closure); 1362 break; 1363 default: 1364 break; 1365 } 1366 } 1367 } 1368 1369 static void 1370 is_rb(struct detailed_timing *t, void *data) 1371 { 1372 u8 *r = (u8 *)t; 1373 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1374 if (r[15] & 0x10) 1375 *(bool *)data = true; 1376 } 1377 1378 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1379 static bool 1380 drm_monitor_supports_rb(struct edid *edid) 1381 { 1382 if (edid->revision >= 4) { 1383 bool ret = false; 1384 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1385 return ret; 1386 } 1387 1388 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1389 } 1390 1391 static void 1392 find_gtf2(struct detailed_timing *t, void *data) 1393 { 1394 u8 *r = (u8 *)t; 1395 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1396 *(u8 **)data = r; 1397 } 1398 1399 /* Secondary GTF curve kicks in above some break frequency */ 1400 static int 1401 drm_gtf2_hbreak(struct edid *edid) 1402 { 1403 u8 *r = NULL; 1404 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1405 return r ? (r[12] * 2) : 0; 1406 } 1407 1408 static int 1409 drm_gtf2_2c(struct edid *edid) 1410 { 1411 u8 *r = NULL; 1412 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1413 return r ? r[13] : 0; 1414 } 1415 1416 static int 1417 drm_gtf2_m(struct edid *edid) 1418 { 1419 u8 *r = NULL; 1420 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1421 return r ? (r[15] << 8) + r[14] : 0; 1422 } 1423 1424 static int 1425 drm_gtf2_k(struct edid *edid) 1426 { 1427 u8 *r = NULL; 1428 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1429 return r ? r[16] : 0; 1430 } 1431 1432 static int 1433 drm_gtf2_2j(struct edid *edid) 1434 { 1435 u8 *r = NULL; 1436 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1437 return r ? r[17] : 0; 1438 } 1439 1440 /** 1441 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1442 * @edid: EDID block to scan 1443 */ 1444 static int standard_timing_level(struct edid *edid) 1445 { 1446 if (edid->revision >= 2) { 1447 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1448 return LEVEL_CVT; 1449 if (drm_gtf2_hbreak(edid)) 1450 return LEVEL_GTF2; 1451 return LEVEL_GTF; 1452 } 1453 return LEVEL_DMT; 1454 } 1455 1456 /* 1457 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1458 * monitors fill with ascii space (0x20) instead. 1459 */ 1460 static int 1461 bad_std_timing(u8 a, u8 b) 1462 { 1463 return (a == 0x00 && b == 0x00) || 1464 (a == 0x01 && b == 0x01) || 1465 (a == 0x20 && b == 0x20); 1466 } 1467 1468 /** 1469 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1470 * @t: standard timing params 1471 * @timing_level: standard timing level 1472 * 1473 * Take the standard timing params (in this case width, aspect, and refresh) 1474 * and convert them into a real mode using CVT/GTF/DMT. 1475 */ 1476 static struct drm_display_mode * 1477 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1478 struct std_timing *t, int revision) 1479 { 1480 struct drm_device *dev = connector->dev; 1481 struct drm_display_mode *m, *mode = NULL; 1482 int hsize, vsize; 1483 int vrefresh_rate; 1484 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1485 >> EDID_TIMING_ASPECT_SHIFT; 1486 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1487 >> EDID_TIMING_VFREQ_SHIFT; 1488 int timing_level = standard_timing_level(edid); 1489 1490 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1491 return NULL; 1492 1493 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1494 hsize = t->hsize * 8 + 248; 1495 /* vrefresh_rate = vfreq + 60 */ 1496 vrefresh_rate = vfreq + 60; 1497 /* the vdisplay is calculated based on the aspect ratio */ 1498 if (aspect_ratio == 0) { 1499 if (revision < 3) 1500 vsize = hsize; 1501 else 1502 vsize = (hsize * 10) / 16; 1503 } else if (aspect_ratio == 1) 1504 vsize = (hsize * 3) / 4; 1505 else if (aspect_ratio == 2) 1506 vsize = (hsize * 4) / 5; 1507 else 1508 vsize = (hsize * 9) / 16; 1509 1510 /* HDTV hack, part 1 */ 1511 if (vrefresh_rate == 60 && 1512 ((hsize == 1360 && vsize == 765) || 1513 (hsize == 1368 && vsize == 769))) { 1514 hsize = 1366; 1515 vsize = 768; 1516 } 1517 1518 /* 1519 * If this connector already has a mode for this size and refresh 1520 * rate (because it came from detailed or CVT info), use that 1521 * instead. This way we don't have to guess at interlace or 1522 * reduced blanking. 1523 */ 1524 list_for_each_entry(m, &connector->probed_modes, head) 1525 if (m->hdisplay == hsize && m->vdisplay == vsize && 1526 drm_mode_vrefresh(m) == vrefresh_rate) 1527 return NULL; 1528 1529 /* HDTV hack, part 2 */ 1530 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1531 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1532 false); 1533 mode->hdisplay = 1366; 1534 mode->hsync_start = mode->hsync_start - 1; 1535 mode->hsync_end = mode->hsync_end - 1; 1536 return mode; 1537 } 1538 1539 /* check whether it can be found in default mode table */ 1540 if (drm_monitor_supports_rb(edid)) { 1541 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1542 true); 1543 if (mode) 1544 return mode; 1545 } 1546 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1547 if (mode) 1548 return mode; 1549 1550 /* okay, generate it */ 1551 switch (timing_level) { 1552 case LEVEL_DMT: 1553 break; 1554 case LEVEL_GTF: 1555 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1556 break; 1557 case LEVEL_GTF2: 1558 /* 1559 * This is potentially wrong if there's ever a monitor with 1560 * more than one ranges section, each claiming a different 1561 * secondary GTF curve. Please don't do that. 1562 */ 1563 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1564 if (!mode) 1565 return NULL; 1566 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1567 drm_mode_destroy(dev, mode); 1568 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1569 vrefresh_rate, 0, 0, 1570 drm_gtf2_m(edid), 1571 drm_gtf2_2c(edid), 1572 drm_gtf2_k(edid), 1573 drm_gtf2_2j(edid)); 1574 } 1575 break; 1576 case LEVEL_CVT: 1577 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1578 false); 1579 break; 1580 } 1581 return mode; 1582 } 1583 1584 /* 1585 * EDID is delightfully ambiguous about how interlaced modes are to be 1586 * encoded. Our internal representation is of frame height, but some 1587 * HDTV detailed timings are encoded as field height. 1588 * 1589 * The format list here is from CEA, in frame size. Technically we 1590 * should be checking refresh rate too. Whatever. 1591 */ 1592 static void 1593 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1594 struct detailed_pixel_timing *pt) 1595 { 1596 int i; 1597 static const struct { 1598 int w, h; 1599 } cea_interlaced[] = { 1600 { 1920, 1080 }, 1601 { 720, 480 }, 1602 { 1440, 480 }, 1603 { 2880, 480 }, 1604 { 720, 576 }, 1605 { 1440, 576 }, 1606 { 2880, 576 }, 1607 }; 1608 1609 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1610 return; 1611 1612 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1613 if ((mode->hdisplay == cea_interlaced[i].w) && 1614 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1615 mode->vdisplay *= 2; 1616 mode->vsync_start *= 2; 1617 mode->vsync_end *= 2; 1618 mode->vtotal *= 2; 1619 mode->vtotal |= 1; 1620 } 1621 } 1622 1623 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1624 } 1625 1626 /** 1627 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1628 * @dev: DRM device (needed to create new mode) 1629 * @edid: EDID block 1630 * @timing: EDID detailed timing info 1631 * @quirks: quirks to apply 1632 * 1633 * An EDID detailed timing block contains enough info for us to create and 1634 * return a new struct drm_display_mode. 1635 */ 1636 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1637 struct edid *edid, 1638 struct detailed_timing *timing, 1639 u32 quirks) 1640 { 1641 struct drm_display_mode *mode; 1642 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1643 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1644 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1645 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1646 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1647 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1648 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1649 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1650 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1651 1652 /* ignore tiny modes */ 1653 if (hactive < 64 || vactive < 64) 1654 return NULL; 1655 1656 if (pt->misc & DRM_EDID_PT_STEREO) { 1657 kprintf("stereo mode not supported\n"); 1658 return NULL; 1659 } 1660 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1661 kprintf("composite sync not supported\n"); 1662 } 1663 1664 /* it is incorrect if hsync/vsync width is zero */ 1665 if (!hsync_pulse_width || !vsync_pulse_width) { 1666 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1667 "Wrong Hsync/Vsync pulse width\n"); 1668 return NULL; 1669 } 1670 1671 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1672 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1673 if (!mode) 1674 return NULL; 1675 1676 goto set_size; 1677 } 1678 1679 mode = drm_mode_create(dev); 1680 if (!mode) 1681 return NULL; 1682 1683 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1684 timing->pixel_clock = cpu_to_le16(1088); 1685 1686 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1687 1688 mode->hdisplay = hactive; 1689 mode->hsync_start = mode->hdisplay + hsync_offset; 1690 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1691 mode->htotal = mode->hdisplay + hblank; 1692 1693 mode->vdisplay = vactive; 1694 mode->vsync_start = mode->vdisplay + vsync_offset; 1695 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1696 mode->vtotal = mode->vdisplay + vblank; 1697 1698 /* Some EDIDs have bogus h/vtotal values */ 1699 if (mode->hsync_end > mode->htotal) 1700 mode->htotal = mode->hsync_end + 1; 1701 if (mode->vsync_end > mode->vtotal) 1702 mode->vtotal = mode->vsync_end + 1; 1703 1704 drm_mode_do_interlace_quirk(mode, pt); 1705 1706 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1707 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1708 } 1709 1710 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1711 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1712 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1713 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1714 1715 set_size: 1716 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1717 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1718 1719 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1720 mode->width_mm *= 10; 1721 mode->height_mm *= 10; 1722 } 1723 1724 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1725 mode->width_mm = edid->width_cm * 10; 1726 mode->height_mm = edid->height_cm * 10; 1727 } 1728 1729 mode->type = DRM_MODE_TYPE_DRIVER; 1730 mode->vrefresh = drm_mode_vrefresh(mode); 1731 drm_mode_set_name(mode); 1732 1733 return mode; 1734 } 1735 1736 static bool 1737 mode_in_hsync_range(const struct drm_display_mode *mode, 1738 struct edid *edid, u8 *t) 1739 { 1740 int hsync, hmin, hmax; 1741 1742 hmin = t[7]; 1743 if (edid->revision >= 4) 1744 hmin += ((t[4] & 0x04) ? 255 : 0); 1745 hmax = t[8]; 1746 if (edid->revision >= 4) 1747 hmax += ((t[4] & 0x08) ? 255 : 0); 1748 hsync = drm_mode_hsync(mode); 1749 1750 return (hsync <= hmax && hsync >= hmin); 1751 } 1752 1753 static bool 1754 mode_in_vsync_range(const struct drm_display_mode *mode, 1755 struct edid *edid, u8 *t) 1756 { 1757 int vsync, vmin, vmax; 1758 1759 vmin = t[5]; 1760 if (edid->revision >= 4) 1761 vmin += ((t[4] & 0x01) ? 255 : 0); 1762 vmax = t[6]; 1763 if (edid->revision >= 4) 1764 vmax += ((t[4] & 0x02) ? 255 : 0); 1765 vsync = drm_mode_vrefresh(mode); 1766 1767 return (vsync <= vmax && vsync >= vmin); 1768 } 1769 1770 static u32 1771 range_pixel_clock(struct edid *edid, u8 *t) 1772 { 1773 /* unspecified */ 1774 if (t[9] == 0 || t[9] == 255) 1775 return 0; 1776 1777 /* 1.4 with CVT support gives us real precision, yay */ 1778 if (edid->revision >= 4 && t[10] == 0x04) 1779 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1780 1781 /* 1.3 is pathetic, so fuzz up a bit */ 1782 return t[9] * 10000 + 5001; 1783 } 1784 1785 static bool 1786 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1787 struct detailed_timing *timing) 1788 { 1789 u32 max_clock; 1790 u8 *t = (u8 *)timing; 1791 1792 if (!mode_in_hsync_range(mode, edid, t)) 1793 return false; 1794 1795 if (!mode_in_vsync_range(mode, edid, t)) 1796 return false; 1797 1798 if ((max_clock = range_pixel_clock(edid, t))) 1799 if (mode->clock > max_clock) 1800 return false; 1801 1802 /* 1.4 max horizontal check */ 1803 if (edid->revision >= 4 && t[10] == 0x04) 1804 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1805 return false; 1806 1807 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1808 return false; 1809 1810 return true; 1811 } 1812 1813 static bool valid_inferred_mode(const struct drm_connector *connector, 1814 const struct drm_display_mode *mode) 1815 { 1816 struct drm_display_mode *m; 1817 bool ok = false; 1818 1819 list_for_each_entry(m, &connector->probed_modes, head) { 1820 if (mode->hdisplay == m->hdisplay && 1821 mode->vdisplay == m->vdisplay && 1822 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1823 return false; /* duplicated */ 1824 if (mode->hdisplay <= m->hdisplay && 1825 mode->vdisplay <= m->vdisplay) 1826 ok = true; 1827 } 1828 return ok; 1829 } 1830 1831 static int 1832 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1833 struct detailed_timing *timing) 1834 { 1835 int i, modes = 0; 1836 struct drm_display_mode *newmode; 1837 struct drm_device *dev = connector->dev; 1838 1839 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1840 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1841 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1842 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1843 if (newmode) { 1844 drm_mode_probed_add(connector, newmode); 1845 modes++; 1846 } 1847 } 1848 } 1849 1850 return modes; 1851 } 1852 1853 /* fix up 1366x768 mode from 1368x768; 1854 * GFT/CVT can't express 1366 width which isn't dividable by 8 1855 */ 1856 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1857 { 1858 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1859 mode->hdisplay = 1366; 1860 mode->hsync_start--; 1861 mode->hsync_end--; 1862 drm_mode_set_name(mode); 1863 } 1864 } 1865 1866 static int 1867 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1868 struct detailed_timing *timing) 1869 { 1870 int i, modes = 0; 1871 struct drm_display_mode *newmode; 1872 struct drm_device *dev = connector->dev; 1873 1874 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1875 const struct minimode *m = &extra_modes[i]; 1876 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 1877 if (!newmode) 1878 return modes; 1879 1880 fixup_mode_1366x768(newmode); 1881 if (!mode_in_range(newmode, edid, timing) || 1882 !valid_inferred_mode(connector, newmode)) { 1883 drm_mode_destroy(dev, newmode); 1884 continue; 1885 } 1886 1887 drm_mode_probed_add(connector, newmode); 1888 modes++; 1889 } 1890 1891 return modes; 1892 } 1893 1894 static int 1895 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1896 struct detailed_timing *timing) 1897 { 1898 int i, modes = 0; 1899 struct drm_display_mode *newmode; 1900 struct drm_device *dev = connector->dev; 1901 bool rb = drm_monitor_supports_rb(edid); 1902 1903 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1904 const struct minimode *m = &extra_modes[i]; 1905 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 1906 if (!newmode) 1907 return modes; 1908 1909 fixup_mode_1366x768(newmode); 1910 if (!mode_in_range(newmode, edid, timing) || 1911 !valid_inferred_mode(connector, newmode)) { 1912 drm_mode_destroy(dev, newmode); 1913 continue; 1914 } 1915 1916 drm_mode_probed_add(connector, newmode); 1917 modes++; 1918 } 1919 1920 return modes; 1921 } 1922 1923 static void 1924 do_inferred_modes(struct detailed_timing *timing, void *c) 1925 { 1926 struct detailed_mode_closure *closure = c; 1927 struct detailed_non_pixel *data = &timing->data.other_data; 1928 struct detailed_data_monitor_range *range = &data->data.range; 1929 1930 if (data->type != EDID_DETAIL_MONITOR_RANGE) 1931 return; 1932 1933 closure->modes += drm_dmt_modes_for_range(closure->connector, 1934 closure->edid, 1935 timing); 1936 1937 if (!version_greater(closure->edid, 1, 1)) 1938 return; /* GTF not defined yet */ 1939 1940 switch (range->flags) { 1941 case 0x02: /* secondary gtf, XXX could do more */ 1942 case 0x00: /* default gtf */ 1943 closure->modes += drm_gtf_modes_for_range(closure->connector, 1944 closure->edid, 1945 timing); 1946 break; 1947 case 0x04: /* cvt, only in 1.4+ */ 1948 if (!version_greater(closure->edid, 1, 3)) 1949 break; 1950 1951 closure->modes += drm_cvt_modes_for_range(closure->connector, 1952 closure->edid, 1953 timing); 1954 break; 1955 case 0x01: /* just the ranges, no formula */ 1956 default: 1957 break; 1958 } 1959 } 1960 1961 static int 1962 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 1963 { 1964 struct detailed_mode_closure closure = { 1965 connector, edid, 0, 0, 0 1966 }; 1967 1968 if (version_greater(edid, 1, 0)) 1969 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 1970 &closure); 1971 1972 return closure.modes; 1973 } 1974 1975 static int 1976 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1977 { 1978 int i, j, m, modes = 0; 1979 struct drm_display_mode *mode; 1980 u8 *est = ((u8 *)timing) + 5; 1981 1982 for (i = 0; i < 6; i++) { 1983 for (j = 7; j > 0; j--) { 1984 m = (i * 8) + (7 - j); 1985 if (m >= ARRAY_SIZE(est3_modes)) 1986 break; 1987 if (est[i] & (1 << j)) { 1988 mode = drm_mode_find_dmt(connector->dev, 1989 est3_modes[m].w, 1990 est3_modes[m].h, 1991 est3_modes[m].r, 1992 est3_modes[m].rb); 1993 if (mode) { 1994 drm_mode_probed_add(connector, mode); 1995 modes++; 1996 } 1997 } 1998 } 1999 } 2000 2001 return modes; 2002 } 2003 2004 static void 2005 do_established_modes(struct detailed_timing *timing, void *c) 2006 { 2007 struct detailed_mode_closure *closure = c; 2008 struct detailed_non_pixel *data = &timing->data.other_data; 2009 2010 if (data->type == EDID_DETAIL_EST_TIMINGS) 2011 closure->modes += drm_est3_modes(closure->connector, timing); 2012 } 2013 2014 /** 2015 * add_established_modes - get est. modes from EDID and add them 2016 * @edid: EDID block to scan 2017 * 2018 * Each EDID block contains a bitmap of the supported "established modes" list 2019 * (defined above). Tease them out and add them to the global modes list. 2020 */ 2021 static int 2022 add_established_modes(struct drm_connector *connector, struct edid *edid) 2023 { 2024 struct drm_device *dev = connector->dev; 2025 unsigned long est_bits = edid->established_timings.t1 | 2026 (edid->established_timings.t2 << 8) | 2027 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2028 int i, modes = 0; 2029 struct detailed_mode_closure closure = { 2030 connector, edid, 0, 0, 0 2031 }; 2032 2033 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2034 if (est_bits & (1<<i)) { 2035 struct drm_display_mode *newmode; 2036 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2037 if (newmode) { 2038 drm_mode_probed_add(connector, newmode); 2039 modes++; 2040 } 2041 } 2042 } 2043 2044 if (version_greater(edid, 1, 0)) 2045 drm_for_each_detailed_block((u8 *)edid, 2046 do_established_modes, &closure); 2047 2048 return modes + closure.modes; 2049 } 2050 2051 static void 2052 do_standard_modes(struct detailed_timing *timing, void *c) 2053 { 2054 struct detailed_mode_closure *closure = c; 2055 struct detailed_non_pixel *data = &timing->data.other_data; 2056 struct drm_connector *connector = closure->connector; 2057 struct edid *edid = closure->edid; 2058 2059 if (data->type == EDID_DETAIL_STD_MODES) { 2060 int i; 2061 for (i = 0; i < 6; i++) { 2062 struct std_timing *std; 2063 struct drm_display_mode *newmode; 2064 2065 std = &data->data.timings[i]; 2066 newmode = drm_mode_std(connector, edid, std, 2067 edid->revision); 2068 if (newmode) { 2069 drm_mode_probed_add(connector, newmode); 2070 closure->modes++; 2071 } 2072 } 2073 } 2074 } 2075 2076 /** 2077 * add_standard_modes - get std. modes from EDID and add them 2078 * @edid: EDID block to scan 2079 * 2080 * Standard modes can be calculated using the appropriate standard (DMT, 2081 * GTF or CVT. Grab them from @edid and add them to the list. 2082 */ 2083 static int 2084 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2085 { 2086 int i, modes = 0; 2087 struct detailed_mode_closure closure = { 2088 connector, edid, 0, 0, 0 2089 }; 2090 2091 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2092 struct drm_display_mode *newmode; 2093 2094 newmode = drm_mode_std(connector, edid, 2095 &edid->standard_timings[i], 2096 edid->revision); 2097 if (newmode) { 2098 drm_mode_probed_add(connector, newmode); 2099 modes++; 2100 } 2101 } 2102 2103 if (version_greater(edid, 1, 0)) 2104 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2105 &closure); 2106 2107 /* XXX should also look for standard codes in VTB blocks */ 2108 2109 return modes + closure.modes; 2110 } 2111 2112 static int drm_cvt_modes(struct drm_connector *connector, 2113 struct detailed_timing *timing) 2114 { 2115 int i, j, modes = 0; 2116 struct drm_display_mode *newmode; 2117 struct drm_device *dev = connector->dev; 2118 struct cvt_timing *cvt; 2119 const int rates[] = { 60, 85, 75, 60, 50 }; 2120 const u8 empty[3] = { 0, 0, 0 }; 2121 2122 for (i = 0; i < 4; i++) { 2123 int width = 0, height; 2124 cvt = &(timing->data.other_data.data.cvt[i]); 2125 2126 if (!memcmp(cvt->code, empty, 3)) 2127 continue; 2128 2129 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2130 switch (cvt->code[1] & 0x0c) { 2131 case 0x00: 2132 width = height * 4 / 3; 2133 break; 2134 case 0x04: 2135 width = height * 16 / 9; 2136 break; 2137 case 0x08: 2138 width = height * 16 / 10; 2139 break; 2140 case 0x0c: 2141 width = height * 15 / 9; 2142 break; 2143 } 2144 2145 for (j = 1; j < 5; j++) { 2146 if (cvt->code[2] & (1 << j)) { 2147 newmode = drm_cvt_mode(dev, width, height, 2148 rates[j], j == 0, 2149 false, false); 2150 if (newmode) { 2151 drm_mode_probed_add(connector, newmode); 2152 modes++; 2153 } 2154 } 2155 } 2156 } 2157 2158 return modes; 2159 } 2160 2161 static void 2162 do_cvt_mode(struct detailed_timing *timing, void *c) 2163 { 2164 struct detailed_mode_closure *closure = c; 2165 struct detailed_non_pixel *data = &timing->data.other_data; 2166 2167 if (data->type == EDID_DETAIL_CVT_3BYTE) 2168 closure->modes += drm_cvt_modes(closure->connector, timing); 2169 } 2170 2171 static int 2172 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2173 { 2174 struct detailed_mode_closure closure = { 2175 connector, edid, 0, 0, 0 2176 }; 2177 2178 if (version_greater(edid, 1, 2)) 2179 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2180 2181 /* XXX should also look for CVT codes in VTB blocks */ 2182 2183 return closure.modes; 2184 } 2185 2186 static void 2187 do_detailed_mode(struct detailed_timing *timing, void *c) 2188 { 2189 struct detailed_mode_closure *closure = c; 2190 struct drm_display_mode *newmode; 2191 2192 if (timing->pixel_clock) { 2193 newmode = drm_mode_detailed(closure->connector->dev, 2194 closure->edid, timing, 2195 closure->quirks); 2196 if (!newmode) 2197 return; 2198 2199 if (closure->preferred) 2200 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2201 2202 drm_mode_probed_add(closure->connector, newmode); 2203 closure->modes++; 2204 closure->preferred = 0; 2205 } 2206 } 2207 2208 /* 2209 * add_detailed_modes - Add modes from detailed timings 2210 * @connector: attached connector 2211 * @edid: EDID block to scan 2212 * @quirks: quirks to apply 2213 */ 2214 static int 2215 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2216 u32 quirks) 2217 { 2218 struct detailed_mode_closure closure = { 2219 connector, 2220 edid, 2221 1, 2222 quirks, 2223 0 2224 }; 2225 2226 if (closure.preferred && !version_greater(edid, 1, 3)) 2227 closure.preferred = 2228 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2229 2230 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2231 2232 return closure.modes; 2233 } 2234 2235 #define HDMI_IDENTIFIER 0x000C03 2236 #define AUDIO_BLOCK 0x01 2237 #define VIDEO_BLOCK 0x02 2238 #define VENDOR_BLOCK 0x03 2239 #define SPEAKER_BLOCK 0x04 2240 #define VIDEO_CAPABILITY_BLOCK 0x07 2241 #define EDID_BASIC_AUDIO (1 << 6) 2242 #define EDID_CEA_YCRCB444 (1 << 5) 2243 #define EDID_CEA_YCRCB422 (1 << 4) 2244 #define EDID_CEA_VCDB_QS (1 << 6) 2245 2246 /** 2247 * Search EDID for CEA extension block. 2248 */ 2249 u8 *drm_find_cea_extension(struct edid *edid) 2250 { 2251 u8 *edid_ext = NULL; 2252 int i; 2253 2254 /* No EDID or EDID extensions */ 2255 if (edid == NULL || edid->extensions == 0) 2256 return NULL; 2257 2258 /* Find CEA extension */ 2259 for (i = 0; i < edid->extensions; i++) { 2260 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2261 if (edid_ext[0] == CEA_EXT) 2262 break; 2263 } 2264 2265 if (i == edid->extensions) 2266 return NULL; 2267 2268 return edid_ext; 2269 } 2270 EXPORT_SYMBOL(drm_find_cea_extension); 2271 2272 /** 2273 * drm_match_cea_mode - look for a CEA mode matching given mode 2274 * @to_match: display mode 2275 * 2276 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2277 * mode. 2278 */ 2279 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2280 { 2281 const struct drm_display_mode *cea_mode; 2282 u8 mode; 2283 2284 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2285 cea_mode = &edid_cea_modes[mode]; 2286 2287 if (drm_mode_equal(to_match, cea_mode)) 2288 return mode + 1; 2289 } 2290 return 0; 2291 } 2292 EXPORT_SYMBOL(drm_match_cea_mode); 2293 2294 2295 static int 2296 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) 2297 { 2298 struct drm_device *dev = connector->dev; 2299 u8 * mode, cea_mode; 2300 int modes = 0; 2301 2302 for (mode = db; mode < db + len; mode++) { 2303 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ 2304 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { 2305 struct drm_display_mode *newmode; 2306 newmode = drm_mode_duplicate(dev, 2307 &edid_cea_modes[cea_mode]); 2308 if (newmode) { 2309 drm_mode_probed_add(connector, newmode); 2310 modes++; 2311 } 2312 } 2313 } 2314 2315 return modes; 2316 } 2317 2318 static int 2319 cea_db_payload_len(const u8 *db) 2320 { 2321 return db[0] & 0x1f; 2322 } 2323 2324 static int 2325 cea_db_tag(const u8 *db) 2326 { 2327 return db[0] >> 5; 2328 } 2329 2330 static int 2331 cea_revision(const u8 *cea) 2332 { 2333 return cea[1]; 2334 } 2335 2336 static int 2337 cea_db_offsets(const u8 *cea, int *start, int *end) 2338 { 2339 /* Data block offset in CEA extension block */ 2340 *start = 4; 2341 *end = cea[2]; 2342 if (*end == 0) 2343 *end = 127; 2344 if (*end < 4 || *end > 127) 2345 return -ERANGE; 2346 return 0; 2347 } 2348 2349 #define for_each_cea_db(cea, i, start, end) \ 2350 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2351 2352 static int 2353 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2354 { 2355 u8 * cea = drm_find_cea_extension(edid); 2356 u8 * db, dbl; 2357 int modes = 0; 2358 2359 if (cea && cea_revision(cea) >= 3) { 2360 int i, start, end; 2361 2362 if (cea_db_offsets(cea, &start, &end)) 2363 return 0; 2364 2365 for_each_cea_db(cea, i, start, end) { 2366 db = &cea[i]; 2367 dbl = cea_db_payload_len(db); 2368 2369 if (cea_db_tag(db) == VIDEO_BLOCK) 2370 modes += do_cea_modes (connector, db+1, dbl); 2371 } 2372 } 2373 2374 return modes; 2375 } 2376 2377 static void 2378 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2379 { 2380 u8 len = cea_db_payload_len(db); 2381 2382 if (len >= 6) { 2383 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2384 connector->dvi_dual = db[6] & 1; 2385 } 2386 if (len >= 7) 2387 connector->max_tmds_clock = db[7] * 5; 2388 if (len >= 8) { 2389 connector->latency_present[0] = db[8] >> 7; 2390 connector->latency_present[1] = (db[8] >> 6) & 1; 2391 } 2392 if (len >= 9) 2393 connector->video_latency[0] = db[9]; 2394 if (len >= 10) 2395 connector->audio_latency[0] = db[10]; 2396 if (len >= 11) 2397 connector->video_latency[1] = db[11]; 2398 if (len >= 12) 2399 connector->audio_latency[1] = db[12]; 2400 2401 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 2402 "max TMDS clock %d, " 2403 "latency present %d %d, " 2404 "video latency %d %d, " 2405 "audio latency %d %d\n", 2406 connector->dvi_dual, 2407 connector->max_tmds_clock, 2408 (int) connector->latency_present[0], 2409 (int) connector->latency_present[1], 2410 connector->video_latency[0], 2411 connector->video_latency[1], 2412 connector->audio_latency[0], 2413 connector->audio_latency[1]); 2414 } 2415 2416 static void 2417 monitor_name(struct detailed_timing *t, void *data) 2418 { 2419 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 2420 *(u8 **)data = t->data.other_data.data.str.str; 2421 } 2422 2423 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2424 { 2425 int hdmi_id; 2426 2427 if (cea_db_tag(db) != VENDOR_BLOCK) 2428 return false; 2429 2430 if (cea_db_payload_len(db) < 5) 2431 return false; 2432 2433 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2434 2435 return hdmi_id == HDMI_IDENTIFIER; 2436 } 2437 2438 /** 2439 * drm_edid_to_eld - build ELD from EDID 2440 * @connector: connector corresponding to the HDMI/DP sink 2441 * @edid: EDID to parse 2442 * 2443 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 2444 * Some ELD fields are left to the graphics driver caller: 2445 * - Conn_Type 2446 * - HDCP 2447 * - Port_ID 2448 */ 2449 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 2450 { 2451 uint8_t *eld = connector->eld; 2452 u8 *cea; 2453 u8 *name; 2454 u8 *db; 2455 int sad_count = 0; 2456 int mnl; 2457 int dbl; 2458 2459 memset(eld, 0, sizeof(connector->eld)); 2460 2461 cea = drm_find_cea_extension(edid); 2462 if (!cea) { 2463 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 2464 return; 2465 } 2466 2467 name = NULL; 2468 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 2469 for (mnl = 0; name && mnl < 13; mnl++) { 2470 if (name[mnl] == 0x0a) 2471 break; 2472 eld[20 + mnl] = name[mnl]; 2473 } 2474 eld[4] = (cea[1] << 5) | mnl; 2475 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 2476 2477 eld[0] = 2 << 3; /* ELD version: 2 */ 2478 2479 eld[16] = edid->mfg_id[0]; 2480 eld[17] = edid->mfg_id[1]; 2481 eld[18] = edid->prod_code[0]; 2482 eld[19] = edid->prod_code[1]; 2483 2484 if (cea_revision(cea) >= 3) { 2485 int i, start, end; 2486 2487 if (cea_db_offsets(cea, &start, &end)) { 2488 start = 0; 2489 end = 0; 2490 } 2491 2492 for_each_cea_db(cea, i, start, end) { 2493 db = &cea[i]; 2494 dbl = cea_db_payload_len(db); 2495 2496 switch (cea_db_tag(db)) { 2497 case AUDIO_BLOCK: 2498 /* Audio Data Block, contains SADs */ 2499 sad_count = dbl / 3; 2500 if (dbl >= 1) 2501 memcpy(eld + 20 + mnl, &db[1], dbl); 2502 break; 2503 case SPEAKER_BLOCK: 2504 /* Speaker Allocation Data Block */ 2505 if (dbl >= 1) 2506 eld[7] = db[1]; 2507 break; 2508 case VENDOR_BLOCK: 2509 /* HDMI Vendor-Specific Data Block */ 2510 if (cea_db_is_hdmi_vsdb(db)) 2511 parse_hdmi_vsdb(connector, db); 2512 break; 2513 default: 2514 break; 2515 } 2516 } 2517 } 2518 eld[5] |= sad_count << 4; 2519 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 2520 2521 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 2522 } 2523 EXPORT_SYMBOL(drm_edid_to_eld); 2524 2525 /** 2526 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 2527 * @connector: connector associated with the HDMI/DP sink 2528 * @mode: the display mode 2529 */ 2530 int drm_av_sync_delay(struct drm_connector *connector, 2531 struct drm_display_mode *mode) 2532 { 2533 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 2534 int a, v; 2535 2536 if (!connector->latency_present[0]) 2537 return 0; 2538 if (!connector->latency_present[1]) 2539 i = 0; 2540 2541 a = connector->audio_latency[i]; 2542 v = connector->video_latency[i]; 2543 2544 /* 2545 * HDMI/DP sink doesn't support audio or video? 2546 */ 2547 if (a == 255 || v == 255) 2548 return 0; 2549 2550 /* 2551 * Convert raw EDID values to millisecond. 2552 * Treat unknown latency as 0ms. 2553 */ 2554 if (a) 2555 a = min(2 * (a - 1), 500); 2556 if (v) 2557 v = min(2 * (v - 1), 500); 2558 2559 return max(v - a, 0); 2560 } 2561 EXPORT_SYMBOL(drm_av_sync_delay); 2562 2563 /** 2564 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 2565 * @encoder: the encoder just changed display mode 2566 * @mode: the adjusted display mode 2567 * 2568 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 2569 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 2570 */ 2571 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 2572 struct drm_display_mode *mode) 2573 { 2574 struct drm_connector *connector; 2575 struct drm_device *dev = encoder->dev; 2576 2577 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 2578 if (connector->encoder == encoder && connector->eld[0]) 2579 return connector; 2580 2581 return NULL; 2582 } 2583 EXPORT_SYMBOL(drm_select_eld); 2584 2585 /** 2586 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 2587 * @edid: monitor EDID information 2588 * 2589 * Parse the CEA extension according to CEA-861-B. 2590 * Return true if HDMI, false if not or unknown. 2591 */ 2592 bool drm_detect_hdmi_monitor(struct edid *edid) 2593 { 2594 u8 *edid_ext; 2595 int i; 2596 int start_offset, end_offset; 2597 2598 edid_ext = drm_find_cea_extension(edid); 2599 if (!edid_ext) 2600 return false; 2601 2602 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2603 return false; 2604 2605 /* 2606 * Because HDMI identifier is in Vendor Specific Block, 2607 * search it from all data blocks of CEA extension. 2608 */ 2609 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2610 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 2611 return true; 2612 } 2613 2614 return false; 2615 } 2616 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 2617 2618 /** 2619 * drm_detect_monitor_audio - check monitor audio capability 2620 * 2621 * Monitor should have CEA extension block. 2622 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 2623 * audio' only. If there is any audio extension block and supported 2624 * audio format, assume at least 'basic audio' support, even if 'basic 2625 * audio' is not defined in EDID. 2626 * 2627 */ 2628 bool drm_detect_monitor_audio(struct edid *edid) 2629 { 2630 u8 *edid_ext; 2631 int i, j; 2632 bool has_audio = false; 2633 int start_offset, end_offset; 2634 2635 edid_ext = drm_find_cea_extension(edid); 2636 if (!edid_ext) 2637 goto end; 2638 2639 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 2640 2641 if (has_audio) { 2642 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 2643 goto end; 2644 } 2645 2646 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2647 goto end; 2648 2649 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2650 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 2651 has_audio = true; 2652 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 2653 DRM_DEBUG_KMS("CEA audio format %d\n", 2654 (edid_ext[i + j] >> 3) & 0xf); 2655 goto end; 2656 } 2657 } 2658 end: 2659 return has_audio; 2660 } 2661 EXPORT_SYMBOL(drm_detect_monitor_audio); 2662 2663 /** 2664 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 2665 * 2666 * Check whether the monitor reports the RGB quantization range selection 2667 * as supported. The AVI infoframe can then be used to inform the monitor 2668 * which quantization range (full or limited) is used. 2669 */ 2670 bool drm_rgb_quant_range_selectable(struct edid *edid) 2671 { 2672 u8 *edid_ext; 2673 int i, start, end; 2674 2675 edid_ext = drm_find_cea_extension(edid); 2676 if (!edid_ext) 2677 return false; 2678 2679 if (cea_db_offsets(edid_ext, &start, &end)) 2680 return false; 2681 2682 for_each_cea_db(edid_ext, i, start, end) { 2683 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 2684 cea_db_payload_len(&edid_ext[i]) == 2) { 2685 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 2686 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 2687 } 2688 } 2689 2690 return false; 2691 } 2692 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 2693 2694 /** 2695 * drm_add_display_info - pull display info out if present 2696 * @edid: EDID data 2697 * @info: display info (attached to connector) 2698 * 2699 * Grab any available display info and stuff it into the drm_display_info 2700 * structure that's part of the connector. Useful for tracking bpp and 2701 * color spaces. 2702 */ 2703 static void drm_add_display_info(struct edid *edid, 2704 struct drm_display_info *info) 2705 { 2706 u8 *edid_ext; 2707 2708 info->width_mm = edid->width_cm * 10; 2709 info->height_mm = edid->height_cm * 10; 2710 2711 /* driver figures it out in this case */ 2712 info->bpc = 0; 2713 info->color_formats = 0; 2714 2715 if (edid->revision < 3) 2716 return; 2717 2718 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 2719 return; 2720 2721 /* Get data from CEA blocks if present */ 2722 edid_ext = drm_find_cea_extension(edid); 2723 if (edid_ext) { 2724 info->cea_rev = edid_ext[1]; 2725 2726 /* The existence of a CEA block should imply RGB support */ 2727 info->color_formats = DRM_COLOR_FORMAT_RGB444; 2728 if (edid_ext[3] & EDID_CEA_YCRCB444) 2729 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2730 if (edid_ext[3] & EDID_CEA_YCRCB422) 2731 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2732 } 2733 2734 /* Only defined for 1.4 with digital displays */ 2735 if (edid->revision < 4) 2736 return; 2737 2738 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 2739 case DRM_EDID_DIGITAL_DEPTH_6: 2740 info->bpc = 6; 2741 break; 2742 case DRM_EDID_DIGITAL_DEPTH_8: 2743 info->bpc = 8; 2744 break; 2745 case DRM_EDID_DIGITAL_DEPTH_10: 2746 info->bpc = 10; 2747 break; 2748 case DRM_EDID_DIGITAL_DEPTH_12: 2749 info->bpc = 12; 2750 break; 2751 case DRM_EDID_DIGITAL_DEPTH_14: 2752 info->bpc = 14; 2753 break; 2754 case DRM_EDID_DIGITAL_DEPTH_16: 2755 info->bpc = 16; 2756 break; 2757 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 2758 default: 2759 info->bpc = 0; 2760 break; 2761 } 2762 2763 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 2764 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 2765 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2766 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 2767 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2768 } 2769 2770 /** 2771 * drm_add_edid_modes - add modes from EDID data, if available 2772 * @connector: connector we're probing 2773 * @edid: edid data 2774 * 2775 * Add the specified modes to the connector's mode list. 2776 * 2777 * Return number of modes added or 0 if we couldn't find any. 2778 */ 2779 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 2780 { 2781 int num_modes = 0; 2782 u32 quirks; 2783 2784 if (edid == NULL) { 2785 return 0; 2786 } 2787 if (!drm_edid_is_valid(edid)) { 2788 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 2789 drm_get_connector_name(connector)); 2790 return 0; 2791 } 2792 2793 quirks = edid_get_quirks(edid); 2794 2795 /* 2796 * EDID spec says modes should be preferred in this order: 2797 * - preferred detailed mode 2798 * - other detailed modes from base block 2799 * - detailed modes from extension blocks 2800 * - CVT 3-byte code modes 2801 * - standard timing codes 2802 * - established timing codes 2803 * - modes inferred from GTF or CVT range information 2804 * 2805 * We get this pretty much right. 2806 * 2807 * XXX order for additional mode types in extension blocks? 2808 */ 2809 num_modes += add_detailed_modes(connector, edid, quirks); 2810 num_modes += add_cvt_modes(connector, edid); 2811 num_modes += add_standard_modes(connector, edid); 2812 num_modes += add_established_modes(connector, edid); 2813 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 2814 num_modes += add_inferred_modes(connector, edid); 2815 num_modes += add_cea_modes(connector, edid); 2816 2817 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 2818 edid_fixup_preferred(connector, quirks); 2819 2820 drm_add_display_info(edid, &connector->display_info); 2821 2822 return num_modes; 2823 } 2824 EXPORT_SYMBOL(drm_add_edid_modes); 2825 2826 /** 2827 * drm_add_modes_noedid - add modes for the connectors without EDID 2828 * @connector: connector we're probing 2829 * @hdisplay: the horizontal display limit 2830 * @vdisplay: the vertical display limit 2831 * 2832 * Add the specified modes to the connector's mode list. Only when the 2833 * hdisplay/vdisplay is not beyond the given limit, it will be added. 2834 * 2835 * Return number of modes added or 0 if we couldn't find any. 2836 */ 2837 int drm_add_modes_noedid(struct drm_connector *connector, 2838 int hdisplay, int vdisplay) 2839 { 2840 int i, count, num_modes = 0; 2841 struct drm_display_mode *mode; 2842 struct drm_device *dev = connector->dev; 2843 2844 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 2845 if (hdisplay < 0) 2846 hdisplay = 0; 2847 if (vdisplay < 0) 2848 vdisplay = 0; 2849 2850 for (i = 0; i < count; i++) { 2851 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 2852 if (hdisplay && vdisplay) { 2853 /* 2854 * Only when two are valid, they will be used to check 2855 * whether the mode should be added to the mode list of 2856 * the connector. 2857 */ 2858 if (ptr->hdisplay > hdisplay || 2859 ptr->vdisplay > vdisplay) 2860 continue; 2861 } 2862 if (drm_mode_vrefresh(ptr) > 61) 2863 continue; 2864 mode = drm_mode_duplicate(dev, ptr); 2865 if (mode) { 2866 drm_mode_probed_add(connector, mode); 2867 num_modes++; 2868 } 2869 } 2870 return num_modes; 2871 } 2872 EXPORT_SYMBOL(drm_add_modes_noedid); 2873