1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 * 30 * $FreeBSD: head/sys/dev/drm2/drm_edid.c 249041 2013-04-03 08:27:35Z dumbbell $ 31 */ 32 33 #include <drm/drmP.h> 34 #include <drm/drm_edid.h> 35 #include "drm_edid_modes.h" 36 #include <bus/iicbus/iic.h> 37 #include <bus/iicbus/iiconf.h> 38 #include "iicbus_if.h" 39 40 #define version_greater(edid, maj, min) \ 41 (((edid)->version > (maj)) || \ 42 ((edid)->version == (maj) && (edid)->revision > (min))) 43 44 #define EDID_EST_TIMINGS 16 45 #define EDID_STD_TIMINGS 8 46 #define EDID_DETAILED_TIMINGS 4 47 48 /* 49 * EDID blocks out in the wild have a variety of bugs, try to collect 50 * them here (note that userspace may work around broken monitors first, 51 * but fixes should make their way here so that the kernel "just works" 52 * on as many displays as possible). 53 */ 54 55 /* First detailed mode wrong, use largest 60Hz mode */ 56 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 57 /* Reported 135MHz pixel clock is too high, needs adjustment */ 58 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 59 /* Prefer the largest mode at 75 Hz */ 60 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 61 /* Detail timing is in cm not mm */ 62 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 63 /* Detailed timing descriptors have bogus size values, so just take the 64 * maximum size and use that. 65 */ 66 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 67 /* Monitor forgot to set the first detailed is preferred bit. */ 68 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 69 /* use +hsync +vsync for detailed mode */ 70 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 71 72 struct detailed_mode_closure { 73 struct drm_connector *connector; 74 struct edid *edid; 75 bool preferred; 76 u32 quirks; 77 int modes; 78 }; 79 80 #define LEVEL_DMT 0 81 #define LEVEL_GTF 1 82 #define LEVEL_GTF2 2 83 #define LEVEL_CVT 3 84 85 static struct edid_quirk { 86 char *vendor; 87 int product_id; 88 u32 quirks; 89 } edid_quirk_list[] = { 90 /* Acer AL1706 */ 91 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 92 /* Acer F51 */ 93 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 94 /* Unknown Acer */ 95 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 96 97 /* Belinea 10 15 55 */ 98 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 99 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 100 101 /* Envision Peripherals, Inc. EN-7100e */ 102 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 103 /* Envision EN2028 */ 104 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 105 106 /* Funai Electronics PM36B */ 107 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 108 EDID_QUIRK_DETAILED_IN_CM }, 109 110 /* LG Philips LCD LP154W01-A5 */ 111 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 112 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 113 114 /* Philips 107p5 CRT */ 115 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 116 117 /* Proview AY765C */ 118 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 119 120 /* Samsung SyncMaster 205BW. Note: irony */ 121 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 122 /* Samsung SyncMaster 22[5-6]BW */ 123 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 124 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 125 }; 126 127 /*** DDC fetch and block validation ***/ 128 129 static const u8 edid_header[] = { 130 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 131 }; 132 133 /* 134 * Sanity check the header of the base EDID block. Return 8 if the header 135 * is perfect, down to 0 if it's totally wrong. 136 */ 137 int drm_edid_header_is_valid(const u8 *raw_edid) 138 { 139 int i, score = 0; 140 141 for (i = 0; i < sizeof(edid_header); i++) 142 if (raw_edid[i] == edid_header[i]) 143 score++; 144 145 return score; 146 } 147 148 /* 149 * Sanity check the EDID block (base or extension). Return 0 if the block 150 * doesn't check out, or 1 if it's valid. 151 */ 152 static bool 153 drm_edid_block_valid(u8 *raw_edid) 154 { 155 int i; 156 u8 csum = 0; 157 struct edid *edid = (struct edid *)raw_edid; 158 159 if (raw_edid[0] == 0x00) { 160 int score = drm_edid_header_is_valid(raw_edid); 161 if (score == 8) ; 162 else if (score >= 6) { 163 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 164 memcpy(raw_edid, edid_header, sizeof(edid_header)); 165 } else { 166 goto bad; 167 } 168 } 169 170 for (i = 0; i < EDID_LENGTH; i++) 171 csum += raw_edid[i]; 172 if (csum) { 173 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 174 175 /* allow CEA to slide through, switches mangle this */ 176 if (raw_edid[0] != 0x02) 177 goto bad; 178 } 179 180 /* per-block-type checks */ 181 switch (raw_edid[0]) { 182 case 0: /* base */ 183 if (edid->version != 1) { 184 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 185 goto bad; 186 } 187 188 if (edid->revision > 4) 189 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 190 break; 191 192 default: 193 break; 194 } 195 196 return 1; 197 198 bad: 199 if (raw_edid) { 200 DRM_DEBUG_KMS("Raw EDID:\n"); 201 if ((drm_debug_flag & DRM_DEBUGBITS_KMS) != 0) { 202 for (i = 0; i < EDID_LENGTH; ) { 203 kprintf("%02x", raw_edid[i]); 204 i++; 205 if (i % 16 == 0 || i == EDID_LENGTH) 206 kprintf("\n"); 207 else if (i % 8 == 0) 208 kprintf(" "); 209 else 210 kprintf(" "); 211 } 212 } 213 } 214 return 0; 215 } 216 217 /** 218 * drm_edid_is_valid - sanity check EDID data 219 * @edid: EDID data 220 * 221 * Sanity-check an entire EDID record (including extensions) 222 */ 223 bool drm_edid_is_valid(struct edid *edid) 224 { 225 int i; 226 u8 *raw = (u8 *)edid; 227 228 if (!edid) 229 return false; 230 231 for (i = 0; i <= edid->extensions; i++) 232 if (!drm_edid_block_valid(raw + i * EDID_LENGTH)) 233 return false; 234 235 return true; 236 } 237 238 #define DDC_ADDR 0x50 239 #define DDC_SEGMENT_ADDR 0x30 240 /** 241 * Get EDID information via I2C. 242 * 243 * \param adapter : i2c device adaptor 244 * \param buf : EDID data buffer to be filled 245 * \param len : EDID data buffer length 246 * \return 0 on success or -1 on failure. 247 * 248 * Try to fetch EDID information by calling i2c driver function. 249 */ 250 static int 251 drm_do_probe_ddc_edid(device_t adapter, unsigned char *buf, 252 int block, int len) 253 { 254 unsigned char start = block * EDID_LENGTH; 255 unsigned char segment = block >> 1; 256 unsigned char xfers = segment ? 3 : 2; 257 int ret, retries = 5; 258 259 /* The core i2c driver will automatically retry the transfer if the 260 * adapter reports EAGAIN. However, we find that bit-banging transfers 261 * are susceptible to errors under a heavily loaded machine and 262 * generate spurious NAKs and timeouts. Retrying the transfer 263 * of the individual block a few times seems to overcome this. 264 */ 265 do { 266 struct iic_msg msgs[] = { 267 { 268 .slave = DDC_SEGMENT_ADDR << 1, 269 .flags = 0, 270 .len = 1, 271 .buf = &segment, 272 }, { 273 .slave = DDC_ADDR << 1, 274 .flags = IIC_M_WR, 275 .len = 1, 276 .buf = &start, 277 }, { 278 .slave = DDC_ADDR << 1, 279 .flags = IIC_M_RD, 280 .len = len, 281 .buf = buf, 282 } 283 }; 284 285 /* 286 * Avoid sending the segment addr to not upset non-compliant ddc 287 * monitors. 288 */ 289 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers); 290 291 if (ret != 0) 292 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n", 293 retries, ret); 294 } while (ret != 0 && --retries); 295 296 return (ret == 0 ? 0 : -1); 297 } 298 299 static bool drm_edid_is_zero(u8 *in_edid, int length) 300 { 301 int i; 302 u32 *raw_edid = (u32 *)in_edid; 303 304 for (i = 0; i < length / 4; i++) 305 if (*(raw_edid + i) != 0) 306 return false; 307 return true; 308 } 309 310 static u8 * 311 drm_do_get_edid(struct drm_connector *connector, device_t adapter) 312 { 313 int i, j = 0, valid_extensions = 0; 314 u8 *block, *new; 315 316 block = kmalloc(EDID_LENGTH, DRM_MEM_KMS, M_WAITOK | M_ZERO); 317 318 /* base block fetch */ 319 for (i = 0; i < 4; i++) { 320 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 321 goto out; 322 if (drm_edid_block_valid(block)) 323 break; 324 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 325 connector->null_edid_counter++; 326 goto carp; 327 } 328 } 329 if (i == 4) 330 goto carp; 331 332 /* if there's no extensions, we're done */ 333 if (block[0x7e] == 0) 334 return block; 335 336 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, DRM_MEM_KMS, 337 M_WAITOK); 338 block = new; 339 340 for (j = 1; j <= block[0x7e]; j++) { 341 for (i = 0; i < 4; i++) { 342 if (drm_do_probe_ddc_edid(adapter, 343 block + (valid_extensions + 1) * EDID_LENGTH, 344 j, EDID_LENGTH)) 345 goto out; 346 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) { 347 valid_extensions++; 348 break; 349 } 350 } 351 if (i == 4) 352 DRM_DEBUG_KMS("%s: Ignoring invalid EDID block %d.\n", 353 drm_get_connector_name(connector), j); 354 } 355 356 if (valid_extensions != block[0x7e]) { 357 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 358 block[0x7e] = valid_extensions; 359 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, 360 DRM_MEM_KMS, M_WAITOK); 361 block = new; 362 } 363 364 DRM_DEBUG_KMS("got EDID from %s\n", drm_get_connector_name(connector)); 365 return block; 366 367 carp: 368 DRM_ERROR("%s: EDID block %d invalid.\n", 369 drm_get_connector_name(connector), j); 370 371 out: 372 drm_free(block, DRM_MEM_KMS); 373 return NULL; 374 } 375 376 /** 377 * Probe DDC presence. 378 * 379 * \param adapter : i2c device adaptor 380 * \return 1 on success 381 */ 382 static bool 383 drm_probe_ddc(device_t adapter) 384 { 385 unsigned char out; 386 387 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 388 } 389 390 /** 391 * drm_get_edid - get EDID data, if available 392 * @connector: connector we're probing 393 * @adapter: i2c adapter to use for DDC 394 * 395 * Poke the given i2c channel to grab EDID data if possible. If found, 396 * attach it to the connector. 397 * 398 * Return edid data or NULL if we couldn't find any. 399 */ 400 struct edid *drm_get_edid(struct drm_connector *connector, 401 device_t adapter) 402 { 403 struct edid *edid = NULL; 404 405 if (drm_probe_ddc(adapter)) 406 edid = (struct edid *)drm_do_get_edid(connector, adapter); 407 408 connector->display_info.raw_edid = (char *)edid; 409 410 return edid; 411 412 } 413 414 /*** EDID parsing ***/ 415 416 /** 417 * edid_vendor - match a string against EDID's obfuscated vendor field 418 * @edid: EDID to match 419 * @vendor: vendor string 420 * 421 * Returns true if @vendor is in @edid, false otherwise 422 */ 423 static bool edid_vendor(struct edid *edid, char *vendor) 424 { 425 char edid_vendor[3]; 426 427 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 428 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 429 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 430 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 431 432 return !strncmp(edid_vendor, vendor, 3); 433 } 434 435 /** 436 * edid_get_quirks - return quirk flags for a given EDID 437 * @edid: EDID to process 438 * 439 * This tells subsequent routines what fixes they need to apply. 440 */ 441 static u32 edid_get_quirks(struct edid *edid) 442 { 443 struct edid_quirk *quirk; 444 int i; 445 446 for (i = 0; i < DRM_ARRAY_SIZE(edid_quirk_list); i++) { 447 quirk = &edid_quirk_list[i]; 448 449 if (edid_vendor(edid, quirk->vendor) && 450 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 451 return quirk->quirks; 452 } 453 454 return 0; 455 } 456 457 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 458 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 459 460 /** 461 * edid_fixup_preferred - set preferred modes based on quirk list 462 * @connector: has mode list to fix up 463 * @quirks: quirks list 464 * 465 * Walk the mode list for @connector, clearing the preferred status 466 * on existing modes and setting it anew for the right mode ala @quirks. 467 */ 468 static void edid_fixup_preferred(struct drm_connector *connector, 469 u32 quirks) 470 { 471 struct drm_display_mode *t, *cur_mode, *preferred_mode; 472 int target_refresh = 0; 473 474 if (list_empty(&connector->probed_modes)) 475 return; 476 477 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 478 target_refresh = 60; 479 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 480 target_refresh = 75; 481 482 preferred_mode = list_first_entry(&connector->probed_modes, 483 struct drm_display_mode, head); 484 485 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 486 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 487 488 if (cur_mode == preferred_mode) 489 continue; 490 491 /* Largest mode is preferred */ 492 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 493 preferred_mode = cur_mode; 494 495 /* At a given size, try to get closest to target refresh */ 496 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 497 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 498 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 499 preferred_mode = cur_mode; 500 } 501 } 502 503 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 504 } 505 506 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 507 int hsize, int vsize, int fresh) 508 { 509 struct drm_display_mode *mode = NULL; 510 int i; 511 512 for (i = 0; i < drm_num_dmt_modes; i++) { 513 struct drm_display_mode *ptr = &drm_dmt_modes[i]; 514 if (hsize == ptr->hdisplay && 515 vsize == ptr->vdisplay && 516 fresh == drm_mode_vrefresh(ptr)) { 517 /* get the expected default mode */ 518 mode = drm_mode_duplicate(dev, ptr); 519 break; 520 } 521 } 522 return mode; 523 } 524 525 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 526 527 static void 528 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 529 { 530 int i, n = 0; 531 u8 rev = ext[0x01], d = ext[0x02]; 532 u8 *det_base = ext + d; 533 534 switch (rev) { 535 case 0: 536 /* can't happen */ 537 return; 538 case 1: 539 /* have to infer how many blocks we have, check pixel clock */ 540 for (i = 0; i < 6; i++) 541 if (det_base[18*i] || det_base[18*i+1]) 542 n++; 543 break; 544 default: 545 /* explicit count */ 546 n = min(ext[0x03] & 0x0f, 6); 547 break; 548 } 549 550 for (i = 0; i < n; i++) 551 cb((struct detailed_timing *)(det_base + 18 * i), closure); 552 } 553 554 static void 555 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 556 { 557 unsigned int i, n = min((int)ext[0x02], 6); 558 u8 *det_base = ext + 5; 559 560 if (ext[0x01] != 1) 561 return; /* unknown version */ 562 563 for (i = 0; i < n; i++) 564 cb((struct detailed_timing *)(det_base + 18 * i), closure); 565 } 566 567 static void 568 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 569 { 570 int i; 571 struct edid *edid = (struct edid *)raw_edid; 572 573 if (edid == NULL) 574 return; 575 576 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 577 cb(&(edid->detailed_timings[i]), closure); 578 579 for (i = 1; i <= raw_edid[0x7e]; i++) { 580 u8 *ext = raw_edid + (i * EDID_LENGTH); 581 switch (*ext) { 582 case CEA_EXT: 583 cea_for_each_detailed_block(ext, cb, closure); 584 break; 585 case VTB_EXT: 586 vtb_for_each_detailed_block(ext, cb, closure); 587 break; 588 default: 589 break; 590 } 591 } 592 } 593 594 static void 595 is_rb(struct detailed_timing *t, void *data) 596 { 597 u8 *r = (u8 *)t; 598 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 599 if (r[15] & 0x10) 600 *(bool *)data = true; 601 } 602 603 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 604 static bool 605 drm_monitor_supports_rb(struct edid *edid) 606 { 607 if (edid->revision >= 4) { 608 bool ret; 609 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 610 return ret; 611 } 612 613 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 614 } 615 616 static void 617 find_gtf2(struct detailed_timing *t, void *data) 618 { 619 u8 *r = (u8 *)t; 620 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 621 *(u8 **)data = r; 622 } 623 624 /* Secondary GTF curve kicks in above some break frequency */ 625 static int 626 drm_gtf2_hbreak(struct edid *edid) 627 { 628 u8 *r = NULL; 629 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 630 return r ? (r[12] * 2) : 0; 631 } 632 633 static int 634 drm_gtf2_2c(struct edid *edid) 635 { 636 u8 *r = NULL; 637 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 638 return r ? r[13] : 0; 639 } 640 641 static int 642 drm_gtf2_m(struct edid *edid) 643 { 644 u8 *r = NULL; 645 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 646 return r ? (r[15] << 8) + r[14] : 0; 647 } 648 649 static int 650 drm_gtf2_k(struct edid *edid) 651 { 652 u8 *r = NULL; 653 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 654 return r ? r[16] : 0; 655 } 656 657 static int 658 drm_gtf2_2j(struct edid *edid) 659 { 660 u8 *r = NULL; 661 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 662 return r ? r[17] : 0; 663 } 664 665 /** 666 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 667 * @edid: EDID block to scan 668 */ 669 static int standard_timing_level(struct edid *edid) 670 { 671 if (edid->revision >= 2) { 672 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 673 return LEVEL_CVT; 674 if (drm_gtf2_hbreak(edid)) 675 return LEVEL_GTF2; 676 return LEVEL_GTF; 677 } 678 return LEVEL_DMT; 679 } 680 681 /* 682 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 683 * monitors fill with ascii space (0x20) instead. 684 */ 685 static int 686 bad_std_timing(u8 a, u8 b) 687 { 688 return (a == 0x00 && b == 0x00) || 689 (a == 0x01 && b == 0x01) || 690 (a == 0x20 && b == 0x20); 691 } 692 693 /** 694 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 695 * @t: standard timing params 696 * @timing_level: standard timing level 697 * 698 * Take the standard timing params (in this case width, aspect, and refresh) 699 * and convert them into a real mode using CVT/GTF/DMT. 700 */ 701 static struct drm_display_mode * 702 drm_mode_std(struct drm_connector *connector, struct edid *edid, 703 struct std_timing *t, int revision) 704 { 705 struct drm_device *dev = connector->dev; 706 struct drm_display_mode *m, *mode = NULL; 707 int hsize, vsize; 708 int vrefresh_rate; 709 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 710 >> EDID_TIMING_ASPECT_SHIFT; 711 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 712 >> EDID_TIMING_VFREQ_SHIFT; 713 int timing_level = standard_timing_level(edid); 714 715 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 716 return NULL; 717 718 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 719 hsize = t->hsize * 8 + 248; 720 /* vrefresh_rate = vfreq + 60 */ 721 vrefresh_rate = vfreq + 60; 722 /* the vdisplay is calculated based on the aspect ratio */ 723 if (aspect_ratio == 0) { 724 if (revision < 3) 725 vsize = hsize; 726 else 727 vsize = (hsize * 10) / 16; 728 } else if (aspect_ratio == 1) 729 vsize = (hsize * 3) / 4; 730 else if (aspect_ratio == 2) 731 vsize = (hsize * 4) / 5; 732 else 733 vsize = (hsize * 9) / 16; 734 735 /* HDTV hack, part 1 */ 736 if (vrefresh_rate == 60 && 737 ((hsize == 1360 && vsize == 765) || 738 (hsize == 1368 && vsize == 769))) { 739 hsize = 1366; 740 vsize = 768; 741 } 742 743 /* 744 * If this connector already has a mode for this size and refresh 745 * rate (because it came from detailed or CVT info), use that 746 * instead. This way we don't have to guess at interlace or 747 * reduced blanking. 748 */ 749 list_for_each_entry(m, &connector->probed_modes, head) 750 if (m->hdisplay == hsize && m->vdisplay == vsize && 751 drm_mode_vrefresh(m) == vrefresh_rate) 752 return NULL; 753 754 /* HDTV hack, part 2 */ 755 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 756 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 757 false); 758 mode->hdisplay = 1366; 759 mode->hsync_start = mode->hsync_start - 1; 760 mode->hsync_end = mode->hsync_end - 1; 761 return mode; 762 } 763 764 /* check whether it can be found in default mode table */ 765 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate); 766 if (mode) 767 return mode; 768 769 switch (timing_level) { 770 case LEVEL_DMT: 771 break; 772 case LEVEL_GTF: 773 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 774 break; 775 case LEVEL_GTF2: 776 /* 777 * This is potentially wrong if there's ever a monitor with 778 * more than one ranges section, each claiming a different 779 * secondary GTF curve. Please don't do that. 780 */ 781 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 782 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 783 drm_free(mode, DRM_MEM_KMS); 784 mode = drm_gtf_mode_complex(dev, hsize, vsize, 785 vrefresh_rate, 0, 0, 786 drm_gtf2_m(edid), 787 drm_gtf2_2c(edid), 788 drm_gtf2_k(edid), 789 drm_gtf2_2j(edid)); 790 } 791 break; 792 case LEVEL_CVT: 793 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 794 false); 795 break; 796 } 797 return mode; 798 } 799 800 /* 801 * EDID is delightfully ambiguous about how interlaced modes are to be 802 * encoded. Our internal representation is of frame height, but some 803 * HDTV detailed timings are encoded as field height. 804 * 805 * The format list here is from CEA, in frame size. Technically we 806 * should be checking refresh rate too. Whatever. 807 */ 808 static void 809 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 810 struct detailed_pixel_timing *pt) 811 { 812 int i; 813 static const struct { 814 int w, h; 815 } cea_interlaced[] = { 816 { 1920, 1080 }, 817 { 720, 480 }, 818 { 1440, 480 }, 819 { 2880, 480 }, 820 { 720, 576 }, 821 { 1440, 576 }, 822 { 2880, 576 }, 823 }; 824 825 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 826 return; 827 828 for (i = 0; i < DRM_ARRAY_SIZE(cea_interlaced); i++) { 829 if ((mode->hdisplay == cea_interlaced[i].w) && 830 (mode->vdisplay == cea_interlaced[i].h / 2)) { 831 mode->vdisplay *= 2; 832 mode->vsync_start *= 2; 833 mode->vsync_end *= 2; 834 mode->vtotal *= 2; 835 mode->vtotal |= 1; 836 } 837 } 838 839 mode->flags |= DRM_MODE_FLAG_INTERLACE; 840 } 841 842 /** 843 * drm_mode_detailed - create a new mode from an EDID detailed timing section 844 * @dev: DRM device (needed to create new mode) 845 * @edid: EDID block 846 * @timing: EDID detailed timing info 847 * @quirks: quirks to apply 848 * 849 * An EDID detailed timing block contains enough info for us to create and 850 * return a new struct drm_display_mode. 851 */ 852 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 853 struct edid *edid, 854 struct detailed_timing *timing, 855 u32 quirks) 856 { 857 struct drm_display_mode *mode; 858 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 859 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 860 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 861 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 862 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 863 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 864 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 865 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4; 866 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 867 868 /* ignore tiny modes */ 869 if (hactive < 64 || vactive < 64) 870 return NULL; 871 872 if (pt->misc & DRM_EDID_PT_STEREO) { 873 kprintf("stereo mode not supported\n"); 874 return NULL; 875 } 876 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 877 kprintf("composite sync not supported\n"); 878 } 879 880 /* it is incorrect if hsync/vsync width is zero */ 881 if (!hsync_pulse_width || !vsync_pulse_width) { 882 DRM_DEBUG_KMS("Incorrect Detailed timing. " 883 "Wrong Hsync/Vsync pulse width\n"); 884 return NULL; 885 } 886 mode = drm_mode_create(dev); 887 if (!mode) 888 return NULL; 889 890 mode->type = DRM_MODE_TYPE_DRIVER; 891 892 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 893 timing->pixel_clock = htole16(1088); 894 895 mode->clock = le16toh(timing->pixel_clock) * 10; 896 897 mode->hdisplay = hactive; 898 mode->hsync_start = mode->hdisplay + hsync_offset; 899 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 900 mode->htotal = mode->hdisplay + hblank; 901 902 mode->vdisplay = vactive; 903 mode->vsync_start = mode->vdisplay + vsync_offset; 904 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 905 mode->vtotal = mode->vdisplay + vblank; 906 907 /* Some EDIDs have bogus h/vtotal values */ 908 if (mode->hsync_end > mode->htotal) 909 mode->htotal = mode->hsync_end + 1; 910 if (mode->vsync_end > mode->vtotal) 911 mode->vtotal = mode->vsync_end + 1; 912 913 drm_mode_do_interlace_quirk(mode, pt); 914 915 drm_mode_set_name(mode); 916 917 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 918 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 919 } 920 921 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 922 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 923 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 924 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 925 926 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 927 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 928 929 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 930 mode->width_mm *= 10; 931 mode->height_mm *= 10; 932 } 933 934 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 935 mode->width_mm = edid->width_cm * 10; 936 mode->height_mm = edid->height_cm * 10; 937 } 938 939 return mode; 940 } 941 942 static bool 943 mode_is_rb(const struct drm_display_mode *mode) 944 { 945 return (mode->htotal - mode->hdisplay == 160) && 946 (mode->hsync_end - mode->hdisplay == 80) && 947 (mode->hsync_end - mode->hsync_start == 32) && 948 (mode->vsync_start - mode->vdisplay == 3); 949 } 950 951 static bool 952 mode_in_hsync_range(struct drm_display_mode *mode, 953 struct edid *edid, u8 *t) 954 { 955 int hsync, hmin, hmax; 956 957 hmin = t[7]; 958 if (edid->revision >= 4) 959 hmin += ((t[4] & 0x04) ? 255 : 0); 960 hmax = t[8]; 961 if (edid->revision >= 4) 962 hmax += ((t[4] & 0x08) ? 255 : 0); 963 hsync = drm_mode_hsync(mode); 964 965 return (hsync <= hmax && hsync >= hmin); 966 } 967 968 static bool 969 mode_in_vsync_range(struct drm_display_mode *mode, 970 struct edid *edid, u8 *t) 971 { 972 int vsync, vmin, vmax; 973 974 vmin = t[5]; 975 if (edid->revision >= 4) 976 vmin += ((t[4] & 0x01) ? 255 : 0); 977 vmax = t[6]; 978 if (edid->revision >= 4) 979 vmax += ((t[4] & 0x02) ? 255 : 0); 980 vsync = drm_mode_vrefresh(mode); 981 982 return (vsync <= vmax && vsync >= vmin); 983 } 984 985 static u32 986 range_pixel_clock(struct edid *edid, u8 *t) 987 { 988 /* unspecified */ 989 if (t[9] == 0 || t[9] == 255) 990 return 0; 991 992 /* 1.4 with CVT support gives us real precision, yay */ 993 if (edid->revision >= 4 && t[10] == 0x04) 994 return (t[9] * 10000) - ((t[12] >> 2) * 250); 995 996 /* 1.3 is pathetic, so fuzz up a bit */ 997 return t[9] * 10000 + 5001; 998 } 999 1000 static bool 1001 mode_in_range(struct drm_display_mode *mode, struct edid *edid, 1002 struct detailed_timing *timing) 1003 { 1004 u32 max_clock; 1005 u8 *t = (u8 *)timing; 1006 1007 if (!mode_in_hsync_range(mode, edid, t)) 1008 return false; 1009 1010 if (!mode_in_vsync_range(mode, edid, t)) 1011 return false; 1012 1013 if ((max_clock = range_pixel_clock(edid, t))) 1014 if (mode->clock > max_clock) 1015 return false; 1016 1017 /* 1.4 max horizontal check */ 1018 if (edid->revision >= 4 && t[10] == 0x04) 1019 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1020 return false; 1021 1022 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1023 return false; 1024 1025 return true; 1026 } 1027 1028 /* 1029 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will 1030 * need to account for them. 1031 */ 1032 static int 1033 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1034 struct detailed_timing *timing) 1035 { 1036 int i, modes = 0; 1037 struct drm_display_mode *newmode; 1038 struct drm_device *dev = connector->dev; 1039 1040 for (i = 0; i < drm_num_dmt_modes; i++) { 1041 if (mode_in_range(drm_dmt_modes + i, edid, timing)) { 1042 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1043 if (newmode) { 1044 drm_mode_probed_add(connector, newmode); 1045 modes++; 1046 } 1047 } 1048 } 1049 1050 return modes; 1051 } 1052 1053 static void 1054 do_inferred_modes(struct detailed_timing *timing, void *c) 1055 { 1056 struct detailed_mode_closure *closure = c; 1057 struct detailed_non_pixel *data = &timing->data.other_data; 1058 int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF); 1059 1060 if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE) 1061 closure->modes += drm_gtf_modes_for_range(closure->connector, 1062 closure->edid, 1063 timing); 1064 } 1065 1066 static int 1067 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 1068 { 1069 struct detailed_mode_closure closure = { 1070 connector, edid, 0, 0, 0 1071 }; 1072 1073 if (version_greater(edid, 1, 0)) 1074 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 1075 &closure); 1076 1077 return closure.modes; 1078 } 1079 1080 static int 1081 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1082 { 1083 int i, j, m, modes = 0; 1084 struct drm_display_mode *mode; 1085 u8 *est = ((u8 *)timing) + 5; 1086 1087 for (i = 0; i < 6; i++) { 1088 for (j = 7; j > 0; j--) { 1089 m = (i * 8) + (7 - j); 1090 if (m >= DRM_ARRAY_SIZE(est3_modes)) 1091 break; 1092 if (est[i] & (1 << j)) { 1093 mode = drm_mode_find_dmt(connector->dev, 1094 est3_modes[m].w, 1095 est3_modes[m].h, 1096 est3_modes[m].r 1097 /*, est3_modes[m].rb */); 1098 if (mode) { 1099 drm_mode_probed_add(connector, mode); 1100 modes++; 1101 } 1102 } 1103 } 1104 } 1105 1106 return modes; 1107 } 1108 1109 static void 1110 do_established_modes(struct detailed_timing *timing, void *c) 1111 { 1112 struct detailed_mode_closure *closure = c; 1113 struct detailed_non_pixel *data = &timing->data.other_data; 1114 1115 if (data->type == EDID_DETAIL_EST_TIMINGS) 1116 closure->modes += drm_est3_modes(closure->connector, timing); 1117 } 1118 1119 /** 1120 * add_established_modes - get est. modes from EDID and add them 1121 * @edid: EDID block to scan 1122 * 1123 * Each EDID block contains a bitmap of the supported "established modes" list 1124 * (defined above). Tease them out and add them to the global modes list. 1125 */ 1126 static int 1127 add_established_modes(struct drm_connector *connector, struct edid *edid) 1128 { 1129 struct drm_device *dev = connector->dev; 1130 unsigned long est_bits = edid->established_timings.t1 | 1131 (edid->established_timings.t2 << 8) | 1132 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 1133 int i, modes = 0; 1134 struct detailed_mode_closure closure = { 1135 connector, edid, 0, 0, 0 1136 }; 1137 1138 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 1139 if (est_bits & (1<<i)) { 1140 struct drm_display_mode *newmode; 1141 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 1142 if (newmode) { 1143 drm_mode_probed_add(connector, newmode); 1144 modes++; 1145 } 1146 } 1147 } 1148 1149 if (version_greater(edid, 1, 0)) 1150 drm_for_each_detailed_block((u8 *)edid, 1151 do_established_modes, &closure); 1152 1153 return modes + closure.modes; 1154 } 1155 1156 static void 1157 do_standard_modes(struct detailed_timing *timing, void *c) 1158 { 1159 struct detailed_mode_closure *closure = c; 1160 struct detailed_non_pixel *data = &timing->data.other_data; 1161 struct drm_connector *connector = closure->connector; 1162 struct edid *edid = closure->edid; 1163 1164 if (data->type == EDID_DETAIL_STD_MODES) { 1165 int i; 1166 for (i = 0; i < 6; i++) { 1167 struct std_timing *std; 1168 struct drm_display_mode *newmode; 1169 1170 std = &data->data.timings[i]; 1171 newmode = drm_mode_std(connector, edid, std, 1172 edid->revision); 1173 if (newmode) { 1174 drm_mode_probed_add(connector, newmode); 1175 closure->modes++; 1176 } 1177 } 1178 } 1179 } 1180 1181 /** 1182 * add_standard_modes - get std. modes from EDID and add them 1183 * @edid: EDID block to scan 1184 * 1185 * Standard modes can be calculated using the appropriate standard (DMT, 1186 * GTF or CVT. Grab them from @edid and add them to the list. 1187 */ 1188 static int 1189 add_standard_modes(struct drm_connector *connector, struct edid *edid) 1190 { 1191 int i, modes = 0; 1192 struct detailed_mode_closure closure = { 1193 connector, edid, 0, 0, 0 1194 }; 1195 1196 for (i = 0; i < EDID_STD_TIMINGS; i++) { 1197 struct drm_display_mode *newmode; 1198 1199 newmode = drm_mode_std(connector, edid, 1200 &edid->standard_timings[i], 1201 edid->revision); 1202 if (newmode) { 1203 drm_mode_probed_add(connector, newmode); 1204 modes++; 1205 } 1206 } 1207 1208 if (version_greater(edid, 1, 0)) 1209 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 1210 &closure); 1211 1212 /* XXX should also look for standard codes in VTB blocks */ 1213 1214 return modes + closure.modes; 1215 } 1216 1217 static int drm_cvt_modes(struct drm_connector *connector, 1218 struct detailed_timing *timing) 1219 { 1220 int i, j, modes = 0; 1221 struct drm_display_mode *newmode; 1222 struct drm_device *dev = connector->dev; 1223 struct cvt_timing *cvt; 1224 const int rates[] = { 60, 85, 75, 60, 50 }; 1225 const u8 empty[3] = { 0, 0, 0 }; 1226 1227 for (i = 0; i < 4; i++) { 1228 int width = 0, height; 1229 cvt = &(timing->data.other_data.data.cvt[i]); 1230 1231 if (!memcmp(cvt->code, empty, 3)) 1232 continue; 1233 1234 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 1235 switch (cvt->code[1] & 0x0c) { 1236 case 0x00: 1237 width = height * 4 / 3; 1238 break; 1239 case 0x04: 1240 width = height * 16 / 9; 1241 break; 1242 case 0x08: 1243 width = height * 16 / 10; 1244 break; 1245 case 0x0c: 1246 width = height * 15 / 9; 1247 break; 1248 } 1249 1250 for (j = 1; j < 5; j++) { 1251 if (cvt->code[2] & (1 << j)) { 1252 newmode = drm_cvt_mode(dev, width, height, 1253 rates[j], j == 0, 1254 false, false); 1255 if (newmode) { 1256 drm_mode_probed_add(connector, newmode); 1257 modes++; 1258 } 1259 } 1260 } 1261 } 1262 1263 return modes; 1264 } 1265 1266 static void 1267 do_cvt_mode(struct detailed_timing *timing, void *c) 1268 { 1269 struct detailed_mode_closure *closure = c; 1270 struct detailed_non_pixel *data = &timing->data.other_data; 1271 1272 if (data->type == EDID_DETAIL_CVT_3BYTE) 1273 closure->modes += drm_cvt_modes(closure->connector, timing); 1274 } 1275 1276 static int 1277 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 1278 { 1279 struct detailed_mode_closure closure = { 1280 connector, edid, 0, 0, 0 1281 }; 1282 1283 if (version_greater(edid, 1, 2)) 1284 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 1285 1286 /* XXX should also look for CVT codes in VTB blocks */ 1287 1288 return closure.modes; 1289 } 1290 1291 static void 1292 do_detailed_mode(struct detailed_timing *timing, void *c) 1293 { 1294 struct detailed_mode_closure *closure = c; 1295 struct drm_display_mode *newmode; 1296 1297 if (timing->pixel_clock) { 1298 newmode = drm_mode_detailed(closure->connector->dev, 1299 closure->edid, timing, 1300 closure->quirks); 1301 if (!newmode) 1302 return; 1303 1304 if (closure->preferred) 1305 newmode->type |= DRM_MODE_TYPE_PREFERRED; 1306 1307 drm_mode_probed_add(closure->connector, newmode); 1308 closure->modes++; 1309 closure->preferred = 0; 1310 } 1311 } 1312 1313 /* 1314 * add_detailed_modes - Add modes from detailed timings 1315 * @connector: attached connector 1316 * @edid: EDID block to scan 1317 * @quirks: quirks to apply 1318 */ 1319 static int 1320 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 1321 u32 quirks) 1322 { 1323 struct detailed_mode_closure closure = { 1324 connector, 1325 edid, 1326 1, 1327 quirks, 1328 0 1329 }; 1330 1331 if (closure.preferred && !version_greater(edid, 1, 3)) 1332 closure.preferred = 1333 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 1334 1335 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 1336 1337 return closure.modes; 1338 } 1339 1340 #define HDMI_IDENTIFIER 0x000C03 1341 #define AUDIO_BLOCK 0x01 1342 #define VENDOR_BLOCK 0x03 1343 #define SPEAKER_BLOCK 0x04 1344 #define EDID_BASIC_AUDIO (1 << 6) 1345 1346 /** 1347 * Search EDID for CEA extension block. 1348 */ 1349 u8 *drm_find_cea_extension(struct edid *edid) 1350 { 1351 u8 *edid_ext = NULL; 1352 int i; 1353 1354 /* No EDID or EDID extensions */ 1355 if (edid == NULL || edid->extensions == 0) 1356 return NULL; 1357 1358 /* Find CEA extension */ 1359 for (i = 0; i < edid->extensions; i++) { 1360 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 1361 if (edid_ext[0] == CEA_EXT) 1362 break; 1363 } 1364 1365 if (i == edid->extensions) 1366 return NULL; 1367 1368 return edid_ext; 1369 } 1370 1371 static void 1372 parse_hdmi_vsdb(struct drm_connector *connector, uint8_t *db) 1373 { 1374 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 1375 1376 connector->dvi_dual = db[6] & 1; 1377 connector->max_tmds_clock = db[7] * 5; 1378 1379 connector->latency_present[0] = db[8] >> 7; 1380 connector->latency_present[1] = (db[8] >> 6) & 1; 1381 connector->video_latency[0] = db[9]; 1382 connector->audio_latency[0] = db[10]; 1383 connector->video_latency[1] = db[11]; 1384 connector->audio_latency[1] = db[12]; 1385 1386 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 1387 "max TMDS clock %d, " 1388 "latency present %d %d, " 1389 "video latency %d %d, " 1390 "audio latency %d %d\n", 1391 connector->dvi_dual, 1392 connector->max_tmds_clock, 1393 (int) connector->latency_present[0], 1394 (int) connector->latency_present[1], 1395 connector->video_latency[0], 1396 connector->video_latency[1], 1397 connector->audio_latency[0], 1398 connector->audio_latency[1]); 1399 } 1400 1401 static void 1402 monitor_name(struct detailed_timing *t, void *data) 1403 { 1404 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 1405 *(u8 **)data = t->data.other_data.data.str.str; 1406 } 1407 1408 /** 1409 * drm_edid_to_eld - build ELD from EDID 1410 * @connector: connector corresponding to the HDMI/DP sink 1411 * @edid: EDID to parse 1412 * 1413 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 1414 * Some ELD fields are left to the graphics driver caller: 1415 * - Conn_Type 1416 * - HDCP 1417 * - Port_ID 1418 */ 1419 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 1420 { 1421 uint8_t *eld = connector->eld; 1422 u8 *cea; 1423 u8 *name; 1424 u8 *db; 1425 int sad_count = 0; 1426 int mnl; 1427 int dbl; 1428 1429 memset(eld, 0, sizeof(connector->eld)); 1430 1431 cea = drm_find_cea_extension(edid); 1432 if (!cea) { 1433 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 1434 return; 1435 } 1436 1437 name = NULL; 1438 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 1439 for (mnl = 0; name && mnl < 13; mnl++) { 1440 if (name[mnl] == 0x0a) 1441 break; 1442 eld[20 + mnl] = name[mnl]; 1443 } 1444 eld[4] = (cea[1] << 5) | mnl; 1445 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 1446 1447 eld[0] = 2 << 3; /* ELD version: 2 */ 1448 1449 eld[16] = edid->mfg_id[0]; 1450 eld[17] = edid->mfg_id[1]; 1451 eld[18] = edid->prod_code[0]; 1452 eld[19] = edid->prod_code[1]; 1453 1454 for (db = cea + 4; db < cea + cea[2]; db += dbl + 1) { 1455 dbl = db[0] & 0x1f; 1456 1457 switch ((db[0] & 0xe0) >> 5) { 1458 case AUDIO_BLOCK: /* Audio Data Block, contains SADs */ 1459 sad_count = dbl / 3; 1460 memcpy(eld + 20 + mnl, &db[1], dbl); 1461 break; 1462 case SPEAKER_BLOCK: /* Speaker Allocation Data Block */ 1463 eld[7] = db[1]; 1464 break; 1465 case VENDOR_BLOCK: 1466 /* HDMI Vendor-Specific Data Block */ 1467 if (db[1] == 0x03 && db[2] == 0x0c && db[3] == 0) 1468 parse_hdmi_vsdb(connector, db); 1469 break; 1470 default: 1471 break; 1472 } 1473 } 1474 eld[5] |= sad_count << 4; 1475 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 1476 1477 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 1478 } 1479 1480 /** 1481 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 1482 * @connector: connector associated with the HDMI/DP sink 1483 * @mode: the display mode 1484 */ 1485 int drm_av_sync_delay(struct drm_connector *connector, 1486 struct drm_display_mode *mode) 1487 { 1488 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 1489 int a, v; 1490 1491 if (!connector->latency_present[0]) 1492 return 0; 1493 if (!connector->latency_present[1]) 1494 i = 0; 1495 1496 a = connector->audio_latency[i]; 1497 v = connector->video_latency[i]; 1498 1499 /* 1500 * HDMI/DP sink doesn't support audio or video? 1501 */ 1502 if (a == 255 || v == 255) 1503 return 0; 1504 1505 /* 1506 * Convert raw EDID values to millisecond. 1507 * Treat unknown latency as 0ms. 1508 */ 1509 if (a) 1510 a = min(2 * (a - 1), 500); 1511 if (v) 1512 v = min(2 * (v - 1), 500); 1513 1514 return max(v - a, 0); 1515 } 1516 1517 /** 1518 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 1519 * @encoder: the encoder just changed display mode 1520 * @mode: the adjusted display mode 1521 * 1522 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 1523 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 1524 */ 1525 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 1526 struct drm_display_mode *mode) 1527 { 1528 struct drm_connector *connector; 1529 struct drm_device *dev = encoder->dev; 1530 1531 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 1532 if (connector->encoder == encoder && connector->eld[0]) 1533 return connector; 1534 1535 return NULL; 1536 } 1537 1538 /** 1539 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 1540 * @edid: monitor EDID information 1541 * 1542 * Parse the CEA extension according to CEA-861-B. 1543 * Return true if HDMI, false if not or unknown. 1544 */ 1545 bool drm_detect_hdmi_monitor(struct edid *edid) 1546 { 1547 u8 *edid_ext; 1548 int i, hdmi_id; 1549 int start_offset, end_offset; 1550 bool is_hdmi = false; 1551 1552 edid_ext = drm_find_cea_extension(edid); 1553 if (!edid_ext) 1554 goto end; 1555 1556 /* Data block offset in CEA extension block */ 1557 start_offset = 4; 1558 end_offset = edid_ext[2]; 1559 1560 /* 1561 * Because HDMI identifier is in Vendor Specific Block, 1562 * search it from all data blocks of CEA extension. 1563 */ 1564 for (i = start_offset; i < end_offset; 1565 /* Increased by data block len */ 1566 i += ((edid_ext[i] & 0x1f) + 1)) { 1567 /* Find vendor specific block */ 1568 if ((edid_ext[i] >> 5) == VENDOR_BLOCK) { 1569 hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) | 1570 edid_ext[i + 3] << 16; 1571 /* Find HDMI identifier */ 1572 if (hdmi_id == HDMI_IDENTIFIER) 1573 is_hdmi = true; 1574 break; 1575 } 1576 } 1577 1578 end: 1579 return is_hdmi; 1580 } 1581 1582 /** 1583 * drm_detect_monitor_audio - check monitor audio capability 1584 * 1585 * Monitor should have CEA extension block. 1586 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 1587 * audio' only. If there is any audio extension block and supported 1588 * audio format, assume at least 'basic audio' support, even if 'basic 1589 * audio' is not defined in EDID. 1590 * 1591 */ 1592 bool drm_detect_monitor_audio(struct edid *edid) 1593 { 1594 u8 *edid_ext; 1595 int i, j; 1596 bool has_audio = false; 1597 int start_offset, end_offset; 1598 1599 edid_ext = drm_find_cea_extension(edid); 1600 if (!edid_ext) 1601 goto end; 1602 1603 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 1604 1605 if (has_audio) { 1606 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 1607 goto end; 1608 } 1609 1610 /* Data block offset in CEA extension block */ 1611 start_offset = 4; 1612 end_offset = edid_ext[2]; 1613 1614 for (i = start_offset; i < end_offset; 1615 i += ((edid_ext[i] & 0x1f) + 1)) { 1616 if ((edid_ext[i] >> 5) == AUDIO_BLOCK) { 1617 has_audio = true; 1618 for (j = 1; j < (edid_ext[i] & 0x1f); j += 3) 1619 DRM_DEBUG_KMS("CEA audio format %d\n", 1620 (edid_ext[i + j] >> 3) & 0xf); 1621 goto end; 1622 } 1623 } 1624 end: 1625 return has_audio; 1626 } 1627 1628 /** 1629 * drm_add_display_info - pull display info out if present 1630 * @edid: EDID data 1631 * @info: display info (attached to connector) 1632 * 1633 * Grab any available display info and stuff it into the drm_display_info 1634 * structure that's part of the connector. Useful for tracking bpp and 1635 * color spaces. 1636 */ 1637 static void drm_add_display_info(struct edid *edid, 1638 struct drm_display_info *info) 1639 { 1640 u8 *edid_ext; 1641 1642 info->width_mm = edid->width_cm * 10; 1643 info->height_mm = edid->height_cm * 10; 1644 1645 /* driver figures it out in this case */ 1646 info->bpc = 0; 1647 info->color_formats = 0; 1648 1649 /* Only defined for 1.4 with digital displays */ 1650 if (edid->revision < 4) 1651 return; 1652 1653 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 1654 return; 1655 1656 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 1657 case DRM_EDID_DIGITAL_DEPTH_6: 1658 info->bpc = 6; 1659 break; 1660 case DRM_EDID_DIGITAL_DEPTH_8: 1661 info->bpc = 8; 1662 break; 1663 case DRM_EDID_DIGITAL_DEPTH_10: 1664 info->bpc = 10; 1665 break; 1666 case DRM_EDID_DIGITAL_DEPTH_12: 1667 info->bpc = 12; 1668 break; 1669 case DRM_EDID_DIGITAL_DEPTH_14: 1670 info->bpc = 14; 1671 break; 1672 case DRM_EDID_DIGITAL_DEPTH_16: 1673 info->bpc = 16; 1674 break; 1675 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 1676 default: 1677 info->bpc = 0; 1678 break; 1679 } 1680 1681 info->color_formats = DRM_COLOR_FORMAT_RGB444; 1682 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444) 1683 info->color_formats = DRM_COLOR_FORMAT_YCRCB444; 1684 if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422) 1685 info->color_formats = DRM_COLOR_FORMAT_YCRCB422; 1686 1687 /* Get data from CEA blocks if present */ 1688 edid_ext = drm_find_cea_extension(edid); 1689 if (!edid_ext) 1690 return; 1691 1692 info->cea_rev = edid_ext[1]; 1693 } 1694 1695 /** 1696 * drm_add_edid_modes - add modes from EDID data, if available 1697 * @connector: connector we're probing 1698 * @edid: edid data 1699 * 1700 * Add the specified modes to the connector's mode list. 1701 * 1702 * Return number of modes added or 0 if we couldn't find any. 1703 */ 1704 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 1705 { 1706 int num_modes = 0; 1707 u32 quirks; 1708 1709 if (edid == NULL) { 1710 return 0; 1711 } 1712 if (!drm_edid_is_valid(edid)) { 1713 device_printf(connector->dev->device, "%s: EDID invalid.\n", 1714 drm_get_connector_name(connector)); 1715 return 0; 1716 } 1717 1718 quirks = edid_get_quirks(edid); 1719 1720 /* 1721 * EDID spec says modes should be preferred in this order: 1722 * - preferred detailed mode 1723 * - other detailed modes from base block 1724 * - detailed modes from extension blocks 1725 * - CVT 3-byte code modes 1726 * - standard timing codes 1727 * - established timing codes 1728 * - modes inferred from GTF or CVT range information 1729 * 1730 * We get this pretty much right. 1731 * 1732 * XXX order for additional mode types in extension blocks? 1733 */ 1734 num_modes += add_detailed_modes(connector, edid, quirks); 1735 num_modes += add_cvt_modes(connector, edid); 1736 num_modes += add_standard_modes(connector, edid); 1737 num_modes += add_established_modes(connector, edid); 1738 num_modes += add_inferred_modes(connector, edid); 1739 1740 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 1741 edid_fixup_preferred(connector, quirks); 1742 1743 drm_add_display_info(edid, &connector->display_info); 1744 1745 return num_modes; 1746 } 1747 1748 /** 1749 * drm_add_modes_noedid - add modes for the connectors without EDID 1750 * @connector: connector we're probing 1751 * @hdisplay: the horizontal display limit 1752 * @vdisplay: the vertical display limit 1753 * 1754 * Add the specified modes to the connector's mode list. Only when the 1755 * hdisplay/vdisplay is not beyond the given limit, it will be added. 1756 * 1757 * Return number of modes added or 0 if we couldn't find any. 1758 */ 1759 int drm_add_modes_noedid(struct drm_connector *connector, 1760 int hdisplay, int vdisplay) 1761 { 1762 int i, count, num_modes = 0; 1763 struct drm_display_mode *mode; 1764 struct drm_device *dev = connector->dev; 1765 1766 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 1767 if (hdisplay < 0) 1768 hdisplay = 0; 1769 if (vdisplay < 0) 1770 vdisplay = 0; 1771 1772 for (i = 0; i < count; i++) { 1773 struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1774 if (hdisplay && vdisplay) { 1775 /* 1776 * Only when two are valid, they will be used to check 1777 * whether the mode should be added to the mode list of 1778 * the connector. 1779 */ 1780 if (ptr->hdisplay > hdisplay || 1781 ptr->vdisplay > vdisplay) 1782 continue; 1783 } 1784 if (drm_mode_vrefresh(ptr) > 61) 1785 continue; 1786 mode = drm_mode_duplicate(dev, ptr); 1787 if (mode) { 1788 drm_mode_probed_add(connector, mode); 1789 num_modes++; 1790 } 1791 } 1792 return num_modes; 1793 } 1794