1 /* 2 * Copyright (c) 2006 Luc Verhaegen (quirks list) 3 * Copyright (c) 2007-2008 Intel Corporation 4 * Jesse Barnes <jesse.barnes@intel.com> 5 * Copyright 2010 Red Hat, Inc. 6 * 7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from 8 * FB layer. 9 * Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com> 10 * 11 * Permission is hereby granted, free of charge, to any person obtaining a 12 * copy of this software and associated documentation files (the "Software"), 13 * to deal in the Software without restriction, including without limitation 14 * the rights to use, copy, modify, merge, publish, distribute, sub license, 15 * and/or sell copies of the Software, and to permit persons to whom the 16 * Software is furnished to do so, subject to the following conditions: 17 * 18 * The above copyright notice and this permission notice (including the 19 * next paragraph) shall be included in all copies or substantial portions 20 * of the Software. 21 * 22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 28 * DEALINGS IN THE SOFTWARE. 29 */ 30 #include <linux/kernel.h> 31 #include <linux/hdmi.h> 32 #include <linux/i2c.h> 33 #include <linux/module.h> 34 #include <drm/drmP.h> 35 #include <drm/drm_edid.h> 36 37 #include <bus/iicbus/iic.h> 38 #include <bus/iicbus/iiconf.h> 39 #include "iicbus_if.h" 40 41 #define version_greater(edid, maj, min) \ 42 (((edid)->version > (maj)) || \ 43 ((edid)->version == (maj) && (edid)->revision > (min))) 44 45 #define EDID_EST_TIMINGS 16 46 #define EDID_STD_TIMINGS 8 47 #define EDID_DETAILED_TIMINGS 4 48 49 /* 50 * EDID blocks out in the wild have a variety of bugs, try to collect 51 * them here (note that userspace may work around broken monitors first, 52 * but fixes should make their way here so that the kernel "just works" 53 * on as many displays as possible). 54 */ 55 56 /* First detailed mode wrong, use largest 60Hz mode */ 57 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0) 58 /* Reported 135MHz pixel clock is too high, needs adjustment */ 59 #define EDID_QUIRK_135_CLOCK_TOO_HIGH (1 << 1) 60 /* Prefer the largest mode at 75 Hz */ 61 #define EDID_QUIRK_PREFER_LARGE_75 (1 << 2) 62 /* Detail timing is in cm not mm */ 63 #define EDID_QUIRK_DETAILED_IN_CM (1 << 3) 64 /* Detailed timing descriptors have bogus size values, so just take the 65 * maximum size and use that. 66 */ 67 #define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE (1 << 4) 68 /* Monitor forgot to set the first detailed is preferred bit. */ 69 #define EDID_QUIRK_FIRST_DETAILED_PREFERRED (1 << 5) 70 /* use +hsync +vsync for detailed mode */ 71 #define EDID_QUIRK_DETAILED_SYNC_PP (1 << 6) 72 /* Force reduced-blanking timings for detailed modes */ 73 #define EDID_QUIRK_FORCE_REDUCED_BLANKING (1 << 7) 74 75 struct detailed_mode_closure { 76 struct drm_connector *connector; 77 struct edid *edid; 78 bool preferred; 79 u32 quirks; 80 int modes; 81 }; 82 83 #define LEVEL_DMT 0 84 #define LEVEL_GTF 1 85 #define LEVEL_GTF2 2 86 #define LEVEL_CVT 3 87 88 static struct edid_quirk { 89 char vendor[4]; 90 int product_id; 91 u32 quirks; 92 } edid_quirk_list[] = { 93 /* Acer AL1706 */ 94 { "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 }, 95 /* Acer F51 */ 96 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 }, 97 /* Unknown Acer */ 98 { "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 99 100 /* Belinea 10 15 55 */ 101 { "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 }, 102 { "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 }, 103 104 /* Envision Peripherals, Inc. EN-7100e */ 105 { "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH }, 106 /* Envision EN2028 */ 107 { "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 }, 108 109 /* Funai Electronics PM36B */ 110 { "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 | 111 EDID_QUIRK_DETAILED_IN_CM }, 112 113 /* LG Philips LCD LP154W01-A5 */ 114 { "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 115 { "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE }, 116 117 /* Philips 107p5 CRT */ 118 { "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 119 120 /* Proview AY765C */ 121 { "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED }, 122 123 /* Samsung SyncMaster 205BW. Note: irony */ 124 { "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP }, 125 /* Samsung SyncMaster 22[5-6]BW */ 126 { "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 }, 127 { "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 }, 128 129 /* ViewSonic VA2026w */ 130 { "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING }, 131 }; 132 133 /* 134 * Autogenerated from the DMT spec. 135 * This table is copied from xfree86/modes/xf86EdidModes.c. 136 */ 137 static const struct drm_display_mode drm_dmt_modes[] = { 138 /* 640x350@85Hz */ 139 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 140 736, 832, 0, 350, 382, 385, 445, 0, 141 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 142 /* 640x400@85Hz */ 143 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672, 144 736, 832, 0, 400, 401, 404, 445, 0, 145 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 146 /* 720x400@85Hz */ 147 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756, 148 828, 936, 0, 400, 401, 404, 446, 0, 149 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 150 /* 640x480@60Hz */ 151 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 152 752, 800, 0, 480, 489, 492, 525, 0, 153 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 154 /* 640x480@72Hz */ 155 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 156 704, 832, 0, 480, 489, 492, 520, 0, 157 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 158 /* 640x480@75Hz */ 159 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 160 720, 840, 0, 480, 481, 484, 500, 0, 161 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 162 /* 640x480@85Hz */ 163 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696, 164 752, 832, 0, 480, 481, 484, 509, 0, 165 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 166 /* 800x600@56Hz */ 167 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 168 896, 1024, 0, 600, 601, 603, 625, 0, 169 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 170 /* 800x600@60Hz */ 171 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 172 968, 1056, 0, 600, 601, 605, 628, 0, 173 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 174 /* 800x600@72Hz */ 175 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 176 976, 1040, 0, 600, 637, 643, 666, 0, 177 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 178 /* 800x600@75Hz */ 179 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 180 896, 1056, 0, 600, 601, 604, 625, 0, 181 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 182 /* 800x600@85Hz */ 183 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832, 184 896, 1048, 0, 600, 601, 604, 631, 0, 185 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 186 /* 800x600@120Hz RB */ 187 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848, 188 880, 960, 0, 600, 603, 607, 636, 0, 189 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 190 /* 848x480@60Hz */ 191 { DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864, 192 976, 1088, 0, 480, 486, 494, 517, 0, 193 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 194 /* 1024x768@43Hz, interlace */ 195 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032, 196 1208, 1264, 0, 768, 768, 772, 817, 0, 197 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 198 DRM_MODE_FLAG_INTERLACE) }, 199 /* 1024x768@60Hz */ 200 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 201 1184, 1344, 0, 768, 771, 777, 806, 0, 202 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 203 /* 1024x768@70Hz */ 204 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 205 1184, 1328, 0, 768, 771, 777, 806, 0, 206 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 207 /* 1024x768@75Hz */ 208 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040, 209 1136, 1312, 0, 768, 769, 772, 800, 0, 210 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 211 /* 1024x768@85Hz */ 212 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072, 213 1168, 1376, 0, 768, 769, 772, 808, 0, 214 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 215 /* 1024x768@120Hz RB */ 216 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072, 217 1104, 1184, 0, 768, 771, 775, 813, 0, 218 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 219 /* 1152x864@75Hz */ 220 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 221 1344, 1600, 0, 864, 865, 868, 900, 0, 222 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 223 /* 1280x768@60Hz RB */ 224 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328, 225 1360, 1440, 0, 768, 771, 778, 790, 0, 226 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 227 /* 1280x768@60Hz */ 228 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344, 229 1472, 1664, 0, 768, 771, 778, 798, 0, 230 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 231 /* 1280x768@75Hz */ 232 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360, 233 1488, 1696, 0, 768, 771, 778, 805, 0, 234 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 235 /* 1280x768@85Hz */ 236 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360, 237 1496, 1712, 0, 768, 771, 778, 809, 0, 238 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 239 /* 1280x768@120Hz RB */ 240 { DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328, 241 1360, 1440, 0, 768, 771, 778, 813, 0, 242 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 243 /* 1280x800@60Hz RB */ 244 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328, 245 1360, 1440, 0, 800, 803, 809, 823, 0, 246 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 247 /* 1280x800@60Hz */ 248 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352, 249 1480, 1680, 0, 800, 803, 809, 831, 0, 250 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 251 /* 1280x800@75Hz */ 252 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360, 253 1488, 1696, 0, 800, 803, 809, 838, 0, 254 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 255 /* 1280x800@85Hz */ 256 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360, 257 1496, 1712, 0, 800, 803, 809, 843, 0, 258 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 259 /* 1280x800@120Hz RB */ 260 { DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328, 261 1360, 1440, 0, 800, 803, 809, 847, 0, 262 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 263 /* 1280x960@60Hz */ 264 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376, 265 1488, 1800, 0, 960, 961, 964, 1000, 0, 266 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 267 /* 1280x960@85Hz */ 268 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344, 269 1504, 1728, 0, 960, 961, 964, 1011, 0, 270 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 271 /* 1280x960@120Hz RB */ 272 { DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328, 273 1360, 1440, 0, 960, 963, 967, 1017, 0, 274 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 275 /* 1280x1024@60Hz */ 276 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328, 277 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 278 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 279 /* 1280x1024@75Hz */ 280 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 281 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 282 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 283 /* 1280x1024@85Hz */ 284 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344, 285 1504, 1728, 0, 1024, 1025, 1028, 1072, 0, 286 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 287 /* 1280x1024@120Hz RB */ 288 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328, 289 1360, 1440, 0, 1024, 1027, 1034, 1084, 0, 290 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 291 /* 1360x768@60Hz */ 292 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424, 293 1536, 1792, 0, 768, 771, 777, 795, 0, 294 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 295 /* 1360x768@120Hz RB */ 296 { DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408, 297 1440, 1520, 0, 768, 771, 776, 813, 0, 298 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 299 /* 1400x1050@60Hz RB */ 300 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448, 301 1480, 1560, 0, 1050, 1053, 1057, 1080, 0, 302 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 303 /* 1400x1050@60Hz */ 304 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488, 305 1632, 1864, 0, 1050, 1053, 1057, 1089, 0, 306 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 307 /* 1400x1050@75Hz */ 308 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504, 309 1648, 1896, 0, 1050, 1053, 1057, 1099, 0, 310 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 311 /* 1400x1050@85Hz */ 312 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504, 313 1656, 1912, 0, 1050, 1053, 1057, 1105, 0, 314 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 315 /* 1400x1050@120Hz RB */ 316 { DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448, 317 1480, 1560, 0, 1050, 1053, 1057, 1112, 0, 318 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 319 /* 1440x900@60Hz RB */ 320 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488, 321 1520, 1600, 0, 900, 903, 909, 926, 0, 322 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 323 /* 1440x900@60Hz */ 324 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520, 325 1672, 1904, 0, 900, 903, 909, 934, 0, 326 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 327 /* 1440x900@75Hz */ 328 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536, 329 1688, 1936, 0, 900, 903, 909, 942, 0, 330 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 331 /* 1440x900@85Hz */ 332 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544, 333 1696, 1952, 0, 900, 903, 909, 948, 0, 334 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 335 /* 1440x900@120Hz RB */ 336 { DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488, 337 1520, 1600, 0, 900, 903, 909, 953, 0, 338 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 339 /* 1600x1200@60Hz */ 340 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664, 341 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 342 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 343 /* 1600x1200@65Hz */ 344 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664, 345 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 346 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 347 /* 1600x1200@70Hz */ 348 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664, 349 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 350 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 351 /* 1600x1200@75Hz */ 352 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664, 353 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 354 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 355 /* 1600x1200@85Hz */ 356 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664, 357 1856, 2160, 0, 1200, 1201, 1204, 1250, 0, 358 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 359 /* 1600x1200@120Hz RB */ 360 { DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648, 361 1680, 1760, 0, 1200, 1203, 1207, 1271, 0, 362 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 363 /* 1680x1050@60Hz RB */ 364 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728, 365 1760, 1840, 0, 1050, 1053, 1059, 1080, 0, 366 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 367 /* 1680x1050@60Hz */ 368 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784, 369 1960, 2240, 0, 1050, 1053, 1059, 1089, 0, 370 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 371 /* 1680x1050@75Hz */ 372 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800, 373 1976, 2272, 0, 1050, 1053, 1059, 1099, 0, 374 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 375 /* 1680x1050@85Hz */ 376 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808, 377 1984, 2288, 0, 1050, 1053, 1059, 1105, 0, 378 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 379 /* 1680x1050@120Hz RB */ 380 { DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728, 381 1760, 1840, 0, 1050, 1053, 1059, 1112, 0, 382 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 383 /* 1792x1344@60Hz */ 384 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920, 385 2120, 2448, 0, 1344, 1345, 1348, 1394, 0, 386 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 387 /* 1792x1344@75Hz */ 388 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888, 389 2104, 2456, 0, 1344, 1345, 1348, 1417, 0, 390 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 391 /* 1792x1344@120Hz RB */ 392 { DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840, 393 1872, 1952, 0, 1344, 1347, 1351, 1423, 0, 394 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 395 /* 1856x1392@60Hz */ 396 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952, 397 2176, 2528, 0, 1392, 1393, 1396, 1439, 0, 398 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 399 /* 1856x1392@75Hz */ 400 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984, 401 2208, 2560, 0, 1392, 1395, 1399, 1500, 0, 402 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 403 /* 1856x1392@120Hz RB */ 404 { DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904, 405 1936, 2016, 0, 1392, 1395, 1399, 1474, 0, 406 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 407 /* 1920x1200@60Hz RB */ 408 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968, 409 2000, 2080, 0, 1200, 1203, 1209, 1235, 0, 410 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 411 /* 1920x1200@60Hz */ 412 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056, 413 2256, 2592, 0, 1200, 1203, 1209, 1245, 0, 414 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 415 /* 1920x1200@75Hz */ 416 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056, 417 2264, 2608, 0, 1200, 1203, 1209, 1255, 0, 418 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 419 /* 1920x1200@85Hz */ 420 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064, 421 2272, 2624, 0, 1200, 1203, 1209, 1262, 0, 422 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 423 /* 1920x1200@120Hz RB */ 424 { DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968, 425 2000, 2080, 0, 1200, 1203, 1209, 1271, 0, 426 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 427 /* 1920x1440@60Hz */ 428 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048, 429 2256, 2600, 0, 1440, 1441, 1444, 1500, 0, 430 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 431 /* 1920x1440@75Hz */ 432 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064, 433 2288, 2640, 0, 1440, 1441, 1444, 1500, 0, 434 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 435 /* 1920x1440@120Hz RB */ 436 { DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968, 437 2000, 2080, 0, 1440, 1443, 1447, 1525, 0, 438 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 439 /* 2560x1600@60Hz RB */ 440 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608, 441 2640, 2720, 0, 1600, 1603, 1609, 1646, 0, 442 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 443 /* 2560x1600@60Hz */ 444 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752, 445 3032, 3504, 0, 1600, 1603, 1609, 1658, 0, 446 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 447 /* 2560x1600@75HZ */ 448 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768, 449 3048, 3536, 0, 1600, 1603, 1609, 1672, 0, 450 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 451 /* 2560x1600@85HZ */ 452 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768, 453 3048, 3536, 0, 1600, 1603, 1609, 1682, 0, 454 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, 455 /* 2560x1600@120Hz RB */ 456 { DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608, 457 2640, 2720, 0, 1600, 1603, 1609, 1694, 0, 458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) }, 459 }; 460 461 static const struct drm_display_mode edid_est_modes[] = { 462 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840, 463 968, 1056, 0, 600, 601, 605, 628, 0, 464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */ 465 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824, 466 896, 1024, 0, 600, 601, 603, 625, 0, 467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */ 468 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656, 469 720, 840, 0, 480, 481, 484, 500, 0, 470 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */ 471 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664, 472 704, 832, 0, 480, 489, 491, 520, 0, 473 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */ 474 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704, 475 768, 864, 0, 480, 483, 486, 525, 0, 476 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */ 477 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25200, 640, 656, 478 752, 800, 0, 480, 490, 492, 525, 0, 479 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */ 480 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738, 481 846, 900, 0, 400, 421, 423, 449, 0, 482 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */ 483 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738, 484 846, 900, 0, 400, 412, 414, 449, 0, 485 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */ 486 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296, 487 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, 488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */ 489 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78800, 1024, 1040, 490 1136, 1312, 0, 768, 769, 772, 800, 0, 491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */ 492 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048, 493 1184, 1328, 0, 768, 771, 777, 806, 0, 494 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */ 495 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048, 496 1184, 1344, 0, 768, 771, 777, 806, 0, 497 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */ 498 { DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032, 499 1208, 1264, 0, 768, 768, 776, 817, 0, 500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */ 501 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864, 502 928, 1152, 0, 624, 625, 628, 667, 0, 503 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */ 504 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816, 505 896, 1056, 0, 600, 601, 604, 625, 0, 506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */ 507 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856, 508 976, 1040, 0, 600, 637, 643, 666, 0, 509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */ 510 { DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216, 511 1344, 1600, 0, 864, 865, 868, 900, 0, 512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */ 513 }; 514 515 struct minimode { 516 short w; 517 short h; 518 short r; 519 short rb; 520 }; 521 522 static const struct minimode est3_modes[] = { 523 /* byte 6 */ 524 { 640, 350, 85, 0 }, 525 { 640, 400, 85, 0 }, 526 { 720, 400, 85, 0 }, 527 { 640, 480, 85, 0 }, 528 { 848, 480, 60, 0 }, 529 { 800, 600, 85, 0 }, 530 { 1024, 768, 85, 0 }, 531 { 1152, 864, 75, 0 }, 532 /* byte 7 */ 533 { 1280, 768, 60, 1 }, 534 { 1280, 768, 60, 0 }, 535 { 1280, 768, 75, 0 }, 536 { 1280, 768, 85, 0 }, 537 { 1280, 960, 60, 0 }, 538 { 1280, 960, 85, 0 }, 539 { 1280, 1024, 60, 0 }, 540 { 1280, 1024, 85, 0 }, 541 /* byte 8 */ 542 { 1360, 768, 60, 0 }, 543 { 1440, 900, 60, 1 }, 544 { 1440, 900, 60, 0 }, 545 { 1440, 900, 75, 0 }, 546 { 1440, 900, 85, 0 }, 547 { 1400, 1050, 60, 1 }, 548 { 1400, 1050, 60, 0 }, 549 { 1400, 1050, 75, 0 }, 550 /* byte 9 */ 551 { 1400, 1050, 85, 0 }, 552 { 1680, 1050, 60, 1 }, 553 { 1680, 1050, 60, 0 }, 554 { 1680, 1050, 75, 0 }, 555 { 1680, 1050, 85, 0 }, 556 { 1600, 1200, 60, 0 }, 557 { 1600, 1200, 65, 0 }, 558 { 1600, 1200, 70, 0 }, 559 /* byte 10 */ 560 { 1600, 1200, 75, 0 }, 561 { 1600, 1200, 85, 0 }, 562 { 1792, 1344, 60, 0 }, 563 { 1792, 1344, 85, 0 }, 564 { 1856, 1392, 60, 0 }, 565 { 1856, 1392, 75, 0 }, 566 { 1920, 1200, 60, 1 }, 567 { 1920, 1200, 60, 0 }, 568 /* byte 11 */ 569 { 1920, 1200, 75, 0 }, 570 { 1920, 1200, 85, 0 }, 571 { 1920, 1440, 60, 0 }, 572 { 1920, 1440, 75, 0 }, 573 }; 574 575 static const struct minimode extra_modes[] = { 576 { 1024, 576, 60, 0 }, 577 { 1366, 768, 60, 0 }, 578 { 1600, 900, 60, 0 }, 579 { 1680, 945, 60, 0 }, 580 { 1920, 1080, 60, 0 }, 581 { 2048, 1152, 60, 0 }, 582 { 2048, 1536, 60, 0 }, 583 }; 584 585 /* 586 * Probably taken from CEA-861 spec. 587 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c. 588 */ 589 static const struct drm_display_mode edid_cea_modes[] = { 590 /* 1 - 640x480@60Hz */ 591 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656, 592 752, 800, 0, 480, 490, 492, 525, 0, 593 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 594 /* 2 - 720x480@60Hz */ 595 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 596 798, 858, 0, 480, 489, 495, 525, 0, 597 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 598 /* 3 - 720x480@60Hz */ 599 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736, 600 798, 858, 0, 480, 489, 495, 525, 0, 601 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 602 /* 4 - 1280x720@60Hz */ 603 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390, 604 1430, 1650, 0, 720, 725, 730, 750, 0, 605 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 606 /* 5 - 1920x1080i@60Hz */ 607 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 608 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 609 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 610 DRM_MODE_FLAG_INTERLACE) }, 611 /* 6 - 1440x480i@60Hz */ 612 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 613 1602, 1716, 0, 480, 488, 494, 525, 0, 614 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 615 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 616 /* 7 - 1440x480i@60Hz */ 617 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 618 1602, 1716, 0, 480, 488, 494, 525, 0, 619 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 620 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 621 /* 8 - 1440x240@60Hz */ 622 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 623 1602, 1716, 0, 240, 244, 247, 262, 0, 624 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 625 DRM_MODE_FLAG_DBLCLK) }, 626 /* 9 - 1440x240@60Hz */ 627 { DRM_MODE("1440x240", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1478, 628 1602, 1716, 0, 240, 244, 247, 262, 0, 629 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 630 DRM_MODE_FLAG_DBLCLK) }, 631 /* 10 - 2880x480i@60Hz */ 632 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 633 3204, 3432, 0, 480, 488, 494, 525, 0, 634 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 635 DRM_MODE_FLAG_INTERLACE) }, 636 /* 11 - 2880x480i@60Hz */ 637 { DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 638 3204, 3432, 0, 480, 488, 494, 525, 0, 639 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 640 DRM_MODE_FLAG_INTERLACE) }, 641 /* 12 - 2880x240@60Hz */ 642 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 643 3204, 3432, 0, 240, 244, 247, 262, 0, 644 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 645 /* 13 - 2880x240@60Hz */ 646 { DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956, 647 3204, 3432, 0, 240, 244, 247, 262, 0, 648 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 649 /* 14 - 1440x480@60Hz */ 650 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 651 1596, 1716, 0, 480, 489, 495, 525, 0, 652 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 653 /* 15 - 1440x480@60Hz */ 654 { DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472, 655 1596, 1716, 0, 480, 489, 495, 525, 0, 656 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 657 /* 16 - 1920x1080@60Hz */ 658 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 659 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 660 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 661 /* 17 - 720x576@50Hz */ 662 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 663 796, 864, 0, 576, 581, 586, 625, 0, 664 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 665 /* 18 - 720x576@50Hz */ 666 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732, 667 796, 864, 0, 576, 581, 586, 625, 0, 668 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 669 /* 19 - 1280x720@50Hz */ 670 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720, 671 1760, 1980, 0, 720, 725, 730, 750, 0, 672 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 673 /* 20 - 1920x1080i@50Hz */ 674 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 675 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 676 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 677 DRM_MODE_FLAG_INTERLACE) }, 678 /* 21 - 1440x576i@50Hz */ 679 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 680 1590, 1728, 0, 576, 580, 586, 625, 0, 681 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 682 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 683 /* 22 - 1440x576i@50Hz */ 684 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 685 1590, 1728, 0, 576, 580, 586, 625, 0, 686 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 687 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 688 /* 23 - 1440x288@50Hz */ 689 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 690 1590, 1728, 0, 288, 290, 293, 312, 0, 691 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 692 DRM_MODE_FLAG_DBLCLK) }, 693 /* 24 - 1440x288@50Hz */ 694 { DRM_MODE("1440x288", DRM_MODE_TYPE_DRIVER, 27000, 1440, 1464, 695 1590, 1728, 0, 288, 290, 293, 312, 0, 696 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 697 DRM_MODE_FLAG_DBLCLK) }, 698 /* 25 - 2880x576i@50Hz */ 699 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 700 3180, 3456, 0, 576, 580, 586, 625, 0, 701 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 702 DRM_MODE_FLAG_INTERLACE) }, 703 /* 26 - 2880x576i@50Hz */ 704 { DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 705 3180, 3456, 0, 576, 580, 586, 625, 0, 706 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 707 DRM_MODE_FLAG_INTERLACE) }, 708 /* 27 - 2880x288@50Hz */ 709 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 710 3180, 3456, 0, 288, 290, 293, 312, 0, 711 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 712 /* 28 - 2880x288@50Hz */ 713 { DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928, 714 3180, 3456, 0, 288, 290, 293, 312, 0, 715 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 716 /* 29 - 1440x576@50Hz */ 717 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 718 1592, 1728, 0, 576, 581, 586, 625, 0, 719 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 720 /* 30 - 1440x576@50Hz */ 721 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 722 1592, 1728, 0, 576, 581, 586, 625, 0, 723 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 724 /* 31 - 1920x1080@50Hz */ 725 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 726 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 727 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 728 /* 32 - 1920x1080@24Hz */ 729 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558, 730 2602, 2750, 0, 1080, 1084, 1089, 1125, 0, 731 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 732 /* 33 - 1920x1080@25Hz */ 733 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448, 734 2492, 2640, 0, 1080, 1084, 1089, 1125, 0, 735 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 736 /* 34 - 1920x1080@30Hz */ 737 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008, 738 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 739 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 740 /* 35 - 2880x480@60Hz */ 741 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 742 3192, 3432, 0, 480, 489, 495, 525, 0, 743 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 744 /* 36 - 2880x480@60Hz */ 745 { DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944, 746 3192, 3432, 0, 480, 489, 495, 525, 0, 747 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 748 /* 37 - 2880x576@50Hz */ 749 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 750 3184, 3456, 0, 576, 581, 586, 625, 0, 751 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 752 /* 38 - 2880x576@50Hz */ 753 { DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928, 754 3184, 3456, 0, 576, 581, 586, 625, 0, 755 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 756 /* 39 - 1920x1080i@50Hz */ 757 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952, 758 2120, 2304, 0, 1080, 1126, 1136, 1250, 0, 759 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC | 760 DRM_MODE_FLAG_INTERLACE) }, 761 /* 40 - 1920x1080i@100Hz */ 762 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448, 763 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 764 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 765 DRM_MODE_FLAG_INTERLACE) }, 766 /* 41 - 1280x720@100Hz */ 767 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720, 768 1760, 1980, 0, 720, 725, 730, 750, 0, 769 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 770 /* 42 - 720x576@100Hz */ 771 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 772 796, 864, 0, 576, 581, 586, 625, 0, 773 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 774 /* 43 - 720x576@100Hz */ 775 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732, 776 796, 864, 0, 576, 581, 586, 625, 0, 777 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 778 /* 44 - 1440x576i@100Hz */ 779 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 780 1590, 1728, 0, 576, 580, 586, 625, 0, 781 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 782 DRM_MODE_FLAG_DBLCLK) }, 783 /* 45 - 1440x576i@100Hz */ 784 { DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464, 785 1590, 1728, 0, 576, 580, 586, 625, 0, 786 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 787 DRM_MODE_FLAG_DBLCLK) }, 788 /* 46 - 1920x1080i@120Hz */ 789 { DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008, 790 2052, 2200, 0, 1080, 1084, 1094, 1125, 0, 791 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | 792 DRM_MODE_FLAG_INTERLACE) }, 793 /* 47 - 1280x720@120Hz */ 794 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390, 795 1430, 1650, 0, 720, 725, 730, 750, 0, 796 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 797 /* 48 - 720x480@120Hz */ 798 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 799 798, 858, 0, 480, 489, 495, 525, 0, 800 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 801 /* 49 - 720x480@120Hz */ 802 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736, 803 798, 858, 0, 480, 489, 495, 525, 0, 804 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 805 /* 50 - 1440x480i@120Hz */ 806 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 807 1602, 1716, 0, 480, 488, 494, 525, 0, 808 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 809 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 810 /* 51 - 1440x480i@120Hz */ 811 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1478, 812 1602, 1716, 0, 480, 488, 494, 525, 0, 813 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 814 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 815 /* 52 - 720x576@200Hz */ 816 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 817 796, 864, 0, 576, 581, 586, 625, 0, 818 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 819 /* 53 - 720x576@200Hz */ 820 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732, 821 796, 864, 0, 576, 581, 586, 625, 0, 822 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 823 /* 54 - 1440x576i@200Hz */ 824 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 825 1590, 1728, 0, 576, 580, 586, 625, 0, 826 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 827 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 828 /* 55 - 1440x576i@200Hz */ 829 { DRM_MODE("1440x576i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1464, 830 1590, 1728, 0, 576, 580, 586, 625, 0, 831 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 832 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 833 /* 56 - 720x480@240Hz */ 834 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 835 798, 858, 0, 480, 489, 495, 525, 0, 836 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 837 /* 57 - 720x480@240Hz */ 838 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736, 839 798, 858, 0, 480, 489, 495, 525, 0, 840 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, 841 /* 58 - 1440x480i@240 */ 842 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 843 1602, 1716, 0, 480, 488, 494, 525, 0, 844 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 845 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 846 /* 59 - 1440x480i@240 */ 847 { DRM_MODE("1440x480i", DRM_MODE_TYPE_DRIVER, 108000, 1440, 1478, 848 1602, 1716, 0, 480, 488, 494, 525, 0, 849 DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC | 850 DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK) }, 851 /* 60 - 1280x720@24Hz */ 852 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040, 853 3080, 3300, 0, 720, 725, 730, 750, 0, 854 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 855 /* 61 - 1280x720@25Hz */ 856 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700, 857 3740, 3960, 0, 720, 725, 730, 750, 0, 858 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 859 /* 62 - 1280x720@30Hz */ 860 { DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040, 861 3080, 3300, 0, 720, 725, 730, 750, 0, 862 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 863 /* 63 - 1920x1080@120Hz */ 864 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008, 865 2052, 2200, 0, 1080, 1084, 1089, 1125, 0, 866 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 867 /* 64 - 1920x1080@100Hz */ 868 { DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448, 869 2492, 2640, 0, 1080, 1084, 1094, 1125, 0, 870 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, 871 }; 872 873 /*** DDC fetch and block validation ***/ 874 875 static const u8 edid_header[] = { 876 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 877 }; 878 879 /* 880 * Sanity check the header of the base EDID block. Return 8 if the header 881 * is perfect, down to 0 if it's totally wrong. 882 */ 883 int drm_edid_header_is_valid(const u8 *raw_edid) 884 { 885 int i, score = 0; 886 887 for (i = 0; i < sizeof(edid_header); i++) 888 if (raw_edid[i] == edid_header[i]) 889 score++; 890 891 return score; 892 } 893 EXPORT_SYMBOL(drm_edid_header_is_valid); 894 895 static int edid_fixup __read_mostly = 6; 896 module_param_named(edid_fixup, edid_fixup, int, 0400); 897 MODULE_PARM_DESC(edid_fixup, 898 "Minimum number of valid EDID header bytes (0-8, default 6)"); 899 900 /* 901 * Sanity check the EDID block (base or extension). Return 0 if the block 902 * doesn't check out, or 1 if it's valid. 903 */ 904 bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid) 905 { 906 int i; 907 u8 csum = 0; 908 struct edid *edid = (struct edid *)raw_edid; 909 910 if (edid_fixup > 8 || edid_fixup < 0) 911 edid_fixup = 6; 912 913 if (block == 0) { 914 int score = drm_edid_header_is_valid(raw_edid); 915 if (score == 8) ; 916 else if (score >= edid_fixup) { 917 DRM_DEBUG("Fixing EDID header, your hardware may be failing\n"); 918 memcpy(raw_edid, edid_header, sizeof(edid_header)); 919 } else { 920 goto bad; 921 } 922 } 923 924 for (i = 0; i < EDID_LENGTH; i++) 925 csum += raw_edid[i]; 926 if (csum) { 927 if (print_bad_edid) { 928 DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum); 929 } 930 931 /* allow CEA to slide through, switches mangle this */ 932 if (raw_edid[0] != 0x02) 933 goto bad; 934 } 935 936 /* per-block-type checks */ 937 switch (raw_edid[0]) { 938 case 0: /* base */ 939 if (edid->version != 1) { 940 DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version); 941 goto bad; 942 } 943 944 if (edid->revision > 4) 945 DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n"); 946 break; 947 948 default: 949 break; 950 } 951 952 return 1; 953 954 bad: 955 if (raw_edid && print_bad_edid) { 956 DRM_DEBUG_KMS("Raw EDID:\n"); 957 for (i = 0; i < EDID_LENGTH; ) { 958 kprintf("%02x", raw_edid[i]); 959 i++; 960 if (i % 16 == 0 || i == EDID_LENGTH) 961 kprintf("\n"); 962 else if (i % 8 == 0) 963 kprintf(" "); 964 else 965 kprintf(" "); 966 } 967 } 968 return 0; 969 } 970 EXPORT_SYMBOL(drm_edid_block_valid); 971 972 /** 973 * drm_edid_is_valid - sanity check EDID data 974 * @edid: EDID data 975 * 976 * Sanity-check an entire EDID record (including extensions) 977 */ 978 bool drm_edid_is_valid(struct edid *edid) 979 { 980 int i; 981 u8 *raw = (u8 *)edid; 982 983 if (!edid) 984 return false; 985 986 for (i = 0; i <= edid->extensions; i++) 987 if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true)) 988 return false; 989 990 return true; 991 } 992 EXPORT_SYMBOL(drm_edid_is_valid); 993 994 #define DDC_SEGMENT_ADDR 0x30 995 /** 996 * Get EDID information via I2C. 997 * 998 * \param adapter : i2c device adaptor 999 * \param buf : EDID data buffer to be filled 1000 * \param len : EDID data buffer length 1001 * \return 0 on success or -1 on failure. 1002 * 1003 * Try to fetch EDID information by calling i2c driver function. 1004 */ 1005 static int 1006 drm_do_probe_ddc_edid(struct device *adapter, unsigned char *buf, 1007 int block, int len) 1008 { 1009 unsigned char start = block * EDID_LENGTH; 1010 unsigned char segment = block >> 1; 1011 unsigned char xfers = segment ? 3 : 2; 1012 int ret, retries = 5; 1013 1014 /* The core i2c driver will automatically retry the transfer if the 1015 * adapter reports EAGAIN. However, we find that bit-banging transfers 1016 * are susceptible to errors under a heavily loaded machine and 1017 * generate spurious NAKs and timeouts. Retrying the transfer 1018 * of the individual block a few times seems to overcome this. 1019 */ 1020 do { 1021 struct i2c_msg msgs[] = { 1022 { 1023 .slave = DDC_SEGMENT_ADDR << 1, 1024 .flags = 0, 1025 .len = 1, 1026 .buf = &segment, 1027 }, { 1028 .slave = DDC_ADDR << 1, 1029 .flags = 0, 1030 .len = 1, 1031 .buf = &start, 1032 }, { 1033 .slave = DDC_ADDR << 1, 1034 .flags = I2C_M_RD, 1035 .len = len, 1036 .buf = buf, 1037 } 1038 }; 1039 1040 /* 1041 * Avoid sending the segment addr to not upset non-compliant ddc 1042 * monitors. 1043 */ 1044 ret = iicbus_transfer(adapter, &msgs[3 - xfers], xfers); 1045 1046 if (ret != 0) 1047 DRM_DEBUG_KMS("iicbus_transfer countdown %d error %d\n", 1048 retries, ret); 1049 } while (ret != 0 && --retries); 1050 1051 return (ret == 0 ? 0 : -1); 1052 } 1053 1054 static bool drm_edid_is_zero(u8 *in_edid, int length) 1055 { 1056 int i; 1057 u32 *raw_edid = (u32 *)in_edid; 1058 1059 for (i = 0; i < length / 4; i++) 1060 if (*(raw_edid + i) != 0) 1061 return false; 1062 1063 return true; 1064 } 1065 1066 static u8 * 1067 drm_do_get_edid(struct drm_connector *connector, struct device *adapter) 1068 { 1069 int i, j = 0, valid_extensions = 0; 1070 u8 *block, *new; 1071 bool print_bad_edid = !connector->bad_edid_counter || (drm_debug & DRM_UT_KMS); 1072 1073 block = kmalloc(EDID_LENGTH, M_DRM, M_WAITOK | M_ZERO); 1074 1075 /* base block fetch */ 1076 for (i = 0; i < 4; i++) { 1077 if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH)) 1078 goto out; 1079 if (drm_edid_block_valid(block, 0, print_bad_edid)) 1080 break; 1081 if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) { 1082 connector->null_edid_counter++; 1083 goto carp; 1084 } 1085 } 1086 if (i == 4) 1087 goto carp; 1088 1089 /* if there's no extensions, we're done */ 1090 if (block[0x7e] == 0) 1091 return block; 1092 1093 new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, M_DRM, M_WAITOK); 1094 if (!new) 1095 goto out; 1096 block = new; 1097 1098 for (j = 1; j <= block[0x7e]; j++) { 1099 for (i = 0; i < 4; i++) { 1100 if (drm_do_probe_ddc_edid(adapter, 1101 block + (valid_extensions + 1) * EDID_LENGTH, 1102 j, EDID_LENGTH)) 1103 goto out; 1104 if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH, j, print_bad_edid)) { 1105 valid_extensions++; 1106 break; 1107 } 1108 } 1109 1110 if (i == 4 && print_bad_edid) { 1111 dev_warn(connector->dev->dev, 1112 "%s: Ignoring invalid EDID block %d.\n", 1113 drm_get_connector_name(connector), j); 1114 1115 connector->bad_edid_counter++; 1116 } 1117 } 1118 1119 if (valid_extensions != block[0x7e]) { 1120 block[EDID_LENGTH-1] += block[0x7e] - valid_extensions; 1121 block[0x7e] = valid_extensions; 1122 new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, 1123 M_DRM, M_WAITOK); 1124 if (!new) 1125 goto out; 1126 block = new; 1127 } 1128 1129 return block; 1130 1131 carp: 1132 if (print_bad_edid) { 1133 dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n", 1134 drm_get_connector_name(connector), j); 1135 } 1136 connector->bad_edid_counter++; 1137 1138 out: 1139 kfree(block); 1140 return NULL; 1141 } 1142 1143 /** 1144 * Probe DDC presence. 1145 * 1146 * \param adapter : i2c device adaptor 1147 * \return 1 on success 1148 */ 1149 bool 1150 drm_probe_ddc(struct device *adapter) 1151 { 1152 unsigned char out; 1153 1154 return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0); 1155 } 1156 EXPORT_SYMBOL(drm_probe_ddc); 1157 1158 /** 1159 * drm_get_edid - get EDID data, if available 1160 * @connector: connector we're probing 1161 * @adapter: i2c adapter to use for DDC 1162 * 1163 * Poke the given i2c channel to grab EDID data if possible. If found, 1164 * attach it to the connector. 1165 * 1166 * Return edid data or NULL if we couldn't find any. 1167 */ 1168 struct edid *drm_get_edid(struct drm_connector *connector, 1169 struct device *adapter) 1170 { 1171 struct edid *edid = NULL; 1172 1173 if (drm_probe_ddc(adapter)) 1174 edid = (struct edid *)drm_do_get_edid(connector, adapter); 1175 1176 return edid; 1177 } 1178 EXPORT_SYMBOL(drm_get_edid); 1179 1180 /*** EDID parsing ***/ 1181 1182 /** 1183 * edid_vendor - match a string against EDID's obfuscated vendor field 1184 * @edid: EDID to match 1185 * @vendor: vendor string 1186 * 1187 * Returns true if @vendor is in @edid, false otherwise 1188 */ 1189 static bool edid_vendor(struct edid *edid, char *vendor) 1190 { 1191 char edid_vendor[3]; 1192 1193 edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@'; 1194 edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) | 1195 ((edid->mfg_id[1] & 0xe0) >> 5)) + '@'; 1196 edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@'; 1197 1198 return !strncmp(edid_vendor, vendor, 3); 1199 } 1200 1201 /** 1202 * edid_get_quirks - return quirk flags for a given EDID 1203 * @edid: EDID to process 1204 * 1205 * This tells subsequent routines what fixes they need to apply. 1206 */ 1207 static u32 edid_get_quirks(struct edid *edid) 1208 { 1209 struct edid_quirk *quirk; 1210 int i; 1211 1212 for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) { 1213 quirk = &edid_quirk_list[i]; 1214 1215 if (edid_vendor(edid, quirk->vendor) && 1216 (EDID_PRODUCT_ID(edid) == quirk->product_id)) 1217 return quirk->quirks; 1218 } 1219 1220 return 0; 1221 } 1222 1223 #define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay) 1224 #define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh)) 1225 1226 /** 1227 * edid_fixup_preferred - set preferred modes based on quirk list 1228 * @connector: has mode list to fix up 1229 * @quirks: quirks list 1230 * 1231 * Walk the mode list for @connector, clearing the preferred status 1232 * on existing modes and setting it anew for the right mode ala @quirks. 1233 */ 1234 static void edid_fixup_preferred(struct drm_connector *connector, 1235 u32 quirks) 1236 { 1237 struct drm_display_mode *t, *cur_mode, *preferred_mode; 1238 int target_refresh = 0; 1239 1240 if (list_empty(&connector->probed_modes)) 1241 return; 1242 1243 if (quirks & EDID_QUIRK_PREFER_LARGE_60) 1244 target_refresh = 60; 1245 if (quirks & EDID_QUIRK_PREFER_LARGE_75) 1246 target_refresh = 75; 1247 1248 preferred_mode = list_first_entry(&connector->probed_modes, 1249 struct drm_display_mode, head); 1250 1251 list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) { 1252 cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED; 1253 1254 if (cur_mode == preferred_mode) 1255 continue; 1256 1257 /* Largest mode is preferred */ 1258 if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode)) 1259 preferred_mode = cur_mode; 1260 1261 /* At a given size, try to get closest to target refresh */ 1262 if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) && 1263 MODE_REFRESH_DIFF(cur_mode, target_refresh) < 1264 MODE_REFRESH_DIFF(preferred_mode, target_refresh)) { 1265 preferred_mode = cur_mode; 1266 } 1267 } 1268 1269 preferred_mode->type |= DRM_MODE_TYPE_PREFERRED; 1270 } 1271 1272 static bool 1273 mode_is_rb(const struct drm_display_mode *mode) 1274 { 1275 return (mode->htotal - mode->hdisplay == 160) && 1276 (mode->hsync_end - mode->hdisplay == 80) && 1277 (mode->hsync_end - mode->hsync_start == 32) && 1278 (mode->vsync_start - mode->vdisplay == 3); 1279 } 1280 1281 /* 1282 * drm_mode_find_dmt - Create a copy of a mode if present in DMT 1283 * @dev: Device to duplicate against 1284 * @hsize: Mode width 1285 * @vsize: Mode height 1286 * @fresh: Mode refresh rate 1287 * @rb: Mode reduced-blanking-ness 1288 * 1289 * Walk the DMT mode list looking for a match for the given parameters. 1290 * Return a newly allocated copy of the mode, or NULL if not found. 1291 */ 1292 struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev, 1293 int hsize, int vsize, int fresh, 1294 bool rb) 1295 { 1296 int i; 1297 1298 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1299 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 1300 if (hsize != ptr->hdisplay) 1301 continue; 1302 if (vsize != ptr->vdisplay) 1303 continue; 1304 if (fresh != drm_mode_vrefresh(ptr)) 1305 continue; 1306 if (rb != mode_is_rb(ptr)) 1307 continue; 1308 1309 return drm_mode_duplicate(dev, ptr); 1310 } 1311 1312 return NULL; 1313 } 1314 EXPORT_SYMBOL(drm_mode_find_dmt); 1315 1316 typedef void detailed_cb(struct detailed_timing *timing, void *closure); 1317 1318 static void 1319 cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1320 { 1321 int i, n = 0; 1322 u8 d = ext[0x02]; 1323 u8 *det_base = ext + d; 1324 1325 n = (127 - d) / 18; 1326 for (i = 0; i < n; i++) 1327 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1328 } 1329 1330 static void 1331 vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure) 1332 { 1333 unsigned int i, n = min((int)ext[0x02], 6); 1334 u8 *det_base = ext + 5; 1335 1336 if (ext[0x01] != 1) 1337 return; /* unknown version */ 1338 1339 for (i = 0; i < n; i++) 1340 cb((struct detailed_timing *)(det_base + 18 * i), closure); 1341 } 1342 1343 static void 1344 drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure) 1345 { 1346 int i; 1347 struct edid *edid = (struct edid *)raw_edid; 1348 1349 if (edid == NULL) 1350 return; 1351 1352 for (i = 0; i < EDID_DETAILED_TIMINGS; i++) 1353 cb(&(edid->detailed_timings[i]), closure); 1354 1355 for (i = 1; i <= raw_edid[0x7e]; i++) { 1356 u8 *ext = raw_edid + (i * EDID_LENGTH); 1357 switch (*ext) { 1358 case CEA_EXT: 1359 cea_for_each_detailed_block(ext, cb, closure); 1360 break; 1361 case VTB_EXT: 1362 vtb_for_each_detailed_block(ext, cb, closure); 1363 break; 1364 default: 1365 break; 1366 } 1367 } 1368 } 1369 1370 static void 1371 is_rb(struct detailed_timing *t, void *data) 1372 { 1373 u8 *r = (u8 *)t; 1374 if (r[3] == EDID_DETAIL_MONITOR_RANGE) 1375 if (r[15] & 0x10) 1376 *(bool *)data = true; 1377 } 1378 1379 /* EDID 1.4 defines this explicitly. For EDID 1.3, we guess, badly. */ 1380 static bool 1381 drm_monitor_supports_rb(struct edid *edid) 1382 { 1383 if (edid->revision >= 4) { 1384 bool ret = false; 1385 drm_for_each_detailed_block((u8 *)edid, is_rb, &ret); 1386 return ret; 1387 } 1388 1389 return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0); 1390 } 1391 1392 static void 1393 find_gtf2(struct detailed_timing *t, void *data) 1394 { 1395 u8 *r = (u8 *)t; 1396 if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02) 1397 *(u8 **)data = r; 1398 } 1399 1400 /* Secondary GTF curve kicks in above some break frequency */ 1401 static int 1402 drm_gtf2_hbreak(struct edid *edid) 1403 { 1404 u8 *r = NULL; 1405 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1406 return r ? (r[12] * 2) : 0; 1407 } 1408 1409 static int 1410 drm_gtf2_2c(struct edid *edid) 1411 { 1412 u8 *r = NULL; 1413 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1414 return r ? r[13] : 0; 1415 } 1416 1417 static int 1418 drm_gtf2_m(struct edid *edid) 1419 { 1420 u8 *r = NULL; 1421 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1422 return r ? (r[15] << 8) + r[14] : 0; 1423 } 1424 1425 static int 1426 drm_gtf2_k(struct edid *edid) 1427 { 1428 u8 *r = NULL; 1429 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1430 return r ? r[16] : 0; 1431 } 1432 1433 static int 1434 drm_gtf2_2j(struct edid *edid) 1435 { 1436 u8 *r = NULL; 1437 drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r); 1438 return r ? r[17] : 0; 1439 } 1440 1441 /** 1442 * standard_timing_level - get std. timing level(CVT/GTF/DMT) 1443 * @edid: EDID block to scan 1444 */ 1445 static int standard_timing_level(struct edid *edid) 1446 { 1447 if (edid->revision >= 2) { 1448 if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)) 1449 return LEVEL_CVT; 1450 if (drm_gtf2_hbreak(edid)) 1451 return LEVEL_GTF2; 1452 return LEVEL_GTF; 1453 } 1454 return LEVEL_DMT; 1455 } 1456 1457 /* 1458 * 0 is reserved. The spec says 0x01 fill for unused timings. Some old 1459 * monitors fill with ascii space (0x20) instead. 1460 */ 1461 static int 1462 bad_std_timing(u8 a, u8 b) 1463 { 1464 return (a == 0x00 && b == 0x00) || 1465 (a == 0x01 && b == 0x01) || 1466 (a == 0x20 && b == 0x20); 1467 } 1468 1469 /** 1470 * drm_mode_std - convert standard mode info (width, height, refresh) into mode 1471 * @t: standard timing params 1472 * @timing_level: standard timing level 1473 * 1474 * Take the standard timing params (in this case width, aspect, and refresh) 1475 * and convert them into a real mode using CVT/GTF/DMT. 1476 */ 1477 static struct drm_display_mode * 1478 drm_mode_std(struct drm_connector *connector, struct edid *edid, 1479 struct std_timing *t, int revision) 1480 { 1481 struct drm_device *dev = connector->dev; 1482 struct drm_display_mode *m, *mode = NULL; 1483 int hsize, vsize; 1484 int vrefresh_rate; 1485 unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK) 1486 >> EDID_TIMING_ASPECT_SHIFT; 1487 unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK) 1488 >> EDID_TIMING_VFREQ_SHIFT; 1489 int timing_level = standard_timing_level(edid); 1490 1491 if (bad_std_timing(t->hsize, t->vfreq_aspect)) 1492 return NULL; 1493 1494 /* According to the EDID spec, the hdisplay = hsize * 8 + 248 */ 1495 hsize = t->hsize * 8 + 248; 1496 /* vrefresh_rate = vfreq + 60 */ 1497 vrefresh_rate = vfreq + 60; 1498 /* the vdisplay is calculated based on the aspect ratio */ 1499 if (aspect_ratio == 0) { 1500 if (revision < 3) 1501 vsize = hsize; 1502 else 1503 vsize = (hsize * 10) / 16; 1504 } else if (aspect_ratio == 1) 1505 vsize = (hsize * 3) / 4; 1506 else if (aspect_ratio == 2) 1507 vsize = (hsize * 4) / 5; 1508 else 1509 vsize = (hsize * 9) / 16; 1510 1511 /* HDTV hack, part 1 */ 1512 if (vrefresh_rate == 60 && 1513 ((hsize == 1360 && vsize == 765) || 1514 (hsize == 1368 && vsize == 769))) { 1515 hsize = 1366; 1516 vsize = 768; 1517 } 1518 1519 /* 1520 * If this connector already has a mode for this size and refresh 1521 * rate (because it came from detailed or CVT info), use that 1522 * instead. This way we don't have to guess at interlace or 1523 * reduced blanking. 1524 */ 1525 list_for_each_entry(m, &connector->probed_modes, head) 1526 if (m->hdisplay == hsize && m->vdisplay == vsize && 1527 drm_mode_vrefresh(m) == vrefresh_rate) 1528 return NULL; 1529 1530 /* HDTV hack, part 2 */ 1531 if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) { 1532 mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0, 1533 false); 1534 mode->hdisplay = 1366; 1535 mode->hsync_start = mode->hsync_start - 1; 1536 mode->hsync_end = mode->hsync_end - 1; 1537 return mode; 1538 } 1539 1540 /* check whether it can be found in default mode table */ 1541 if (drm_monitor_supports_rb(edid)) { 1542 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, 1543 true); 1544 if (mode) 1545 return mode; 1546 } 1547 mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false); 1548 if (mode) 1549 return mode; 1550 1551 /* okay, generate it */ 1552 switch (timing_level) { 1553 case LEVEL_DMT: 1554 break; 1555 case LEVEL_GTF: 1556 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1557 break; 1558 case LEVEL_GTF2: 1559 /* 1560 * This is potentially wrong if there's ever a monitor with 1561 * more than one ranges section, each claiming a different 1562 * secondary GTF curve. Please don't do that. 1563 */ 1564 mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0); 1565 if (!mode) 1566 return NULL; 1567 if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) { 1568 drm_mode_destroy(dev, mode); 1569 mode = drm_gtf_mode_complex(dev, hsize, vsize, 1570 vrefresh_rate, 0, 0, 1571 drm_gtf2_m(edid), 1572 drm_gtf2_2c(edid), 1573 drm_gtf2_k(edid), 1574 drm_gtf2_2j(edid)); 1575 } 1576 break; 1577 case LEVEL_CVT: 1578 mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0, 1579 false); 1580 break; 1581 } 1582 return mode; 1583 } 1584 1585 /* 1586 * EDID is delightfully ambiguous about how interlaced modes are to be 1587 * encoded. Our internal representation is of frame height, but some 1588 * HDTV detailed timings are encoded as field height. 1589 * 1590 * The format list here is from CEA, in frame size. Technically we 1591 * should be checking refresh rate too. Whatever. 1592 */ 1593 static void 1594 drm_mode_do_interlace_quirk(struct drm_display_mode *mode, 1595 struct detailed_pixel_timing *pt) 1596 { 1597 int i; 1598 static const struct { 1599 int w, h; 1600 } cea_interlaced[] = { 1601 { 1920, 1080 }, 1602 { 720, 480 }, 1603 { 1440, 480 }, 1604 { 2880, 480 }, 1605 { 720, 576 }, 1606 { 1440, 576 }, 1607 { 2880, 576 }, 1608 }; 1609 1610 if (!(pt->misc & DRM_EDID_PT_INTERLACED)) 1611 return; 1612 1613 for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) { 1614 if ((mode->hdisplay == cea_interlaced[i].w) && 1615 (mode->vdisplay == cea_interlaced[i].h / 2)) { 1616 mode->vdisplay *= 2; 1617 mode->vsync_start *= 2; 1618 mode->vsync_end *= 2; 1619 mode->vtotal *= 2; 1620 mode->vtotal |= 1; 1621 } 1622 } 1623 1624 mode->flags |= DRM_MODE_FLAG_INTERLACE; 1625 } 1626 1627 /** 1628 * drm_mode_detailed - create a new mode from an EDID detailed timing section 1629 * @dev: DRM device (needed to create new mode) 1630 * @edid: EDID block 1631 * @timing: EDID detailed timing info 1632 * @quirks: quirks to apply 1633 * 1634 * An EDID detailed timing block contains enough info for us to create and 1635 * return a new struct drm_display_mode. 1636 */ 1637 static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev, 1638 struct edid *edid, 1639 struct detailed_timing *timing, 1640 u32 quirks) 1641 { 1642 struct drm_display_mode *mode; 1643 struct detailed_pixel_timing *pt = &timing->data.pixel_data; 1644 unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo; 1645 unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo; 1646 unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo; 1647 unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo; 1648 unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo; 1649 unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo; 1650 unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4; 1651 unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf); 1652 1653 /* ignore tiny modes */ 1654 if (hactive < 64 || vactive < 64) 1655 return NULL; 1656 1657 if (pt->misc & DRM_EDID_PT_STEREO) { 1658 kprintf("stereo mode not supported\n"); 1659 return NULL; 1660 } 1661 if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) { 1662 kprintf("composite sync not supported\n"); 1663 } 1664 1665 /* it is incorrect if hsync/vsync width is zero */ 1666 if (!hsync_pulse_width || !vsync_pulse_width) { 1667 DRM_DEBUG_KMS("Incorrect Detailed timing. " 1668 "Wrong Hsync/Vsync pulse width\n"); 1669 return NULL; 1670 } 1671 1672 if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) { 1673 mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false); 1674 if (!mode) 1675 return NULL; 1676 1677 goto set_size; 1678 } 1679 1680 mode = drm_mode_create(dev); 1681 if (!mode) 1682 return NULL; 1683 1684 if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH) 1685 timing->pixel_clock = cpu_to_le16(1088); 1686 1687 mode->clock = le16_to_cpu(timing->pixel_clock) * 10; 1688 1689 mode->hdisplay = hactive; 1690 mode->hsync_start = mode->hdisplay + hsync_offset; 1691 mode->hsync_end = mode->hsync_start + hsync_pulse_width; 1692 mode->htotal = mode->hdisplay + hblank; 1693 1694 mode->vdisplay = vactive; 1695 mode->vsync_start = mode->vdisplay + vsync_offset; 1696 mode->vsync_end = mode->vsync_start + vsync_pulse_width; 1697 mode->vtotal = mode->vdisplay + vblank; 1698 1699 /* Some EDIDs have bogus h/vtotal values */ 1700 if (mode->hsync_end > mode->htotal) 1701 mode->htotal = mode->hsync_end + 1; 1702 if (mode->vsync_end > mode->vtotal) 1703 mode->vtotal = mode->vsync_end + 1; 1704 1705 drm_mode_do_interlace_quirk(mode, pt); 1706 1707 if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) { 1708 pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE; 1709 } 1710 1711 mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ? 1712 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC; 1713 mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ? 1714 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC; 1715 1716 set_size: 1717 mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4; 1718 mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8; 1719 1720 if (quirks & EDID_QUIRK_DETAILED_IN_CM) { 1721 mode->width_mm *= 10; 1722 mode->height_mm *= 10; 1723 } 1724 1725 if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) { 1726 mode->width_mm = edid->width_cm * 10; 1727 mode->height_mm = edid->height_cm * 10; 1728 } 1729 1730 mode->type = DRM_MODE_TYPE_DRIVER; 1731 mode->vrefresh = drm_mode_vrefresh(mode); 1732 drm_mode_set_name(mode); 1733 1734 return mode; 1735 } 1736 1737 static bool 1738 mode_in_hsync_range(const struct drm_display_mode *mode, 1739 struct edid *edid, u8 *t) 1740 { 1741 int hsync, hmin, hmax; 1742 1743 hmin = t[7]; 1744 if (edid->revision >= 4) 1745 hmin += ((t[4] & 0x04) ? 255 : 0); 1746 hmax = t[8]; 1747 if (edid->revision >= 4) 1748 hmax += ((t[4] & 0x08) ? 255 : 0); 1749 hsync = drm_mode_hsync(mode); 1750 1751 return (hsync <= hmax && hsync >= hmin); 1752 } 1753 1754 static bool 1755 mode_in_vsync_range(const struct drm_display_mode *mode, 1756 struct edid *edid, u8 *t) 1757 { 1758 int vsync, vmin, vmax; 1759 1760 vmin = t[5]; 1761 if (edid->revision >= 4) 1762 vmin += ((t[4] & 0x01) ? 255 : 0); 1763 vmax = t[6]; 1764 if (edid->revision >= 4) 1765 vmax += ((t[4] & 0x02) ? 255 : 0); 1766 vsync = drm_mode_vrefresh(mode); 1767 1768 return (vsync <= vmax && vsync >= vmin); 1769 } 1770 1771 static u32 1772 range_pixel_clock(struct edid *edid, u8 *t) 1773 { 1774 /* unspecified */ 1775 if (t[9] == 0 || t[9] == 255) 1776 return 0; 1777 1778 /* 1.4 with CVT support gives us real precision, yay */ 1779 if (edid->revision >= 4 && t[10] == 0x04) 1780 return (t[9] * 10000) - ((t[12] >> 2) * 250); 1781 1782 /* 1.3 is pathetic, so fuzz up a bit */ 1783 return t[9] * 10000 + 5001; 1784 } 1785 1786 static bool 1787 mode_in_range(const struct drm_display_mode *mode, struct edid *edid, 1788 struct detailed_timing *timing) 1789 { 1790 u32 max_clock; 1791 u8 *t = (u8 *)timing; 1792 1793 if (!mode_in_hsync_range(mode, edid, t)) 1794 return false; 1795 1796 if (!mode_in_vsync_range(mode, edid, t)) 1797 return false; 1798 1799 if ((max_clock = range_pixel_clock(edid, t))) 1800 if (mode->clock > max_clock) 1801 return false; 1802 1803 /* 1.4 max horizontal check */ 1804 if (edid->revision >= 4 && t[10] == 0x04) 1805 if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3)))) 1806 return false; 1807 1808 if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid)) 1809 return false; 1810 1811 return true; 1812 } 1813 1814 static bool valid_inferred_mode(const struct drm_connector *connector, 1815 const struct drm_display_mode *mode) 1816 { 1817 struct drm_display_mode *m; 1818 bool ok = false; 1819 1820 list_for_each_entry(m, &connector->probed_modes, head) { 1821 if (mode->hdisplay == m->hdisplay && 1822 mode->vdisplay == m->vdisplay && 1823 drm_mode_vrefresh(mode) == drm_mode_vrefresh(m)) 1824 return false; /* duplicated */ 1825 if (mode->hdisplay <= m->hdisplay && 1826 mode->vdisplay <= m->vdisplay) 1827 ok = true; 1828 } 1829 return ok; 1830 } 1831 1832 static int 1833 drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1834 struct detailed_timing *timing) 1835 { 1836 int i, modes = 0; 1837 struct drm_display_mode *newmode; 1838 struct drm_device *dev = connector->dev; 1839 1840 for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) { 1841 if (mode_in_range(drm_dmt_modes + i, edid, timing) && 1842 valid_inferred_mode(connector, drm_dmt_modes + i)) { 1843 newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]); 1844 if (newmode) { 1845 drm_mode_probed_add(connector, newmode); 1846 modes++; 1847 } 1848 } 1849 } 1850 1851 return modes; 1852 } 1853 1854 /* fix up 1366x768 mode from 1368x768; 1855 * GFT/CVT can't express 1366 width which isn't dividable by 8 1856 */ 1857 static void fixup_mode_1366x768(struct drm_display_mode *mode) 1858 { 1859 if (mode->hdisplay == 1368 && mode->vdisplay == 768) { 1860 mode->hdisplay = 1366; 1861 mode->hsync_start--; 1862 mode->hsync_end--; 1863 drm_mode_set_name(mode); 1864 } 1865 } 1866 1867 static int 1868 drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid, 1869 struct detailed_timing *timing) 1870 { 1871 int i, modes = 0; 1872 struct drm_display_mode *newmode; 1873 struct drm_device *dev = connector->dev; 1874 1875 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1876 const struct minimode *m = &extra_modes[i]; 1877 newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0); 1878 if (!newmode) 1879 return modes; 1880 1881 fixup_mode_1366x768(newmode); 1882 if (!mode_in_range(newmode, edid, timing) || 1883 !valid_inferred_mode(connector, newmode)) { 1884 drm_mode_destroy(dev, newmode); 1885 continue; 1886 } 1887 1888 drm_mode_probed_add(connector, newmode); 1889 modes++; 1890 } 1891 1892 return modes; 1893 } 1894 1895 static int 1896 drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid, 1897 struct detailed_timing *timing) 1898 { 1899 int i, modes = 0; 1900 struct drm_display_mode *newmode; 1901 struct drm_device *dev = connector->dev; 1902 bool rb = drm_monitor_supports_rb(edid); 1903 1904 for (i = 0; i < ARRAY_SIZE(extra_modes); i++) { 1905 const struct minimode *m = &extra_modes[i]; 1906 newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0); 1907 if (!newmode) 1908 return modes; 1909 1910 fixup_mode_1366x768(newmode); 1911 if (!mode_in_range(newmode, edid, timing) || 1912 !valid_inferred_mode(connector, newmode)) { 1913 drm_mode_destroy(dev, newmode); 1914 continue; 1915 } 1916 1917 drm_mode_probed_add(connector, newmode); 1918 modes++; 1919 } 1920 1921 return modes; 1922 } 1923 1924 static void 1925 do_inferred_modes(struct detailed_timing *timing, void *c) 1926 { 1927 struct detailed_mode_closure *closure = c; 1928 struct detailed_non_pixel *data = &timing->data.other_data; 1929 struct detailed_data_monitor_range *range = &data->data.range; 1930 1931 if (data->type != EDID_DETAIL_MONITOR_RANGE) 1932 return; 1933 1934 closure->modes += drm_dmt_modes_for_range(closure->connector, 1935 closure->edid, 1936 timing); 1937 1938 if (!version_greater(closure->edid, 1, 1)) 1939 return; /* GTF not defined yet */ 1940 1941 switch (range->flags) { 1942 case 0x02: /* secondary gtf, XXX could do more */ 1943 case 0x00: /* default gtf */ 1944 closure->modes += drm_gtf_modes_for_range(closure->connector, 1945 closure->edid, 1946 timing); 1947 break; 1948 case 0x04: /* cvt, only in 1.4+ */ 1949 if (!version_greater(closure->edid, 1, 3)) 1950 break; 1951 1952 closure->modes += drm_cvt_modes_for_range(closure->connector, 1953 closure->edid, 1954 timing); 1955 break; 1956 case 0x01: /* just the ranges, no formula */ 1957 default: 1958 break; 1959 } 1960 } 1961 1962 static int 1963 add_inferred_modes(struct drm_connector *connector, struct edid *edid) 1964 { 1965 struct detailed_mode_closure closure = { 1966 connector, edid, 0, 0, 0 1967 }; 1968 1969 if (version_greater(edid, 1, 0)) 1970 drm_for_each_detailed_block((u8 *)edid, do_inferred_modes, 1971 &closure); 1972 1973 return closure.modes; 1974 } 1975 1976 static int 1977 drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing) 1978 { 1979 int i, j, m, modes = 0; 1980 struct drm_display_mode *mode; 1981 u8 *est = ((u8 *)timing) + 5; 1982 1983 for (i = 0; i < 6; i++) { 1984 for (j = 7; j > 0; j--) { 1985 m = (i * 8) + (7 - j); 1986 if (m >= ARRAY_SIZE(est3_modes)) 1987 break; 1988 if (est[i] & (1 << j)) { 1989 mode = drm_mode_find_dmt(connector->dev, 1990 est3_modes[m].w, 1991 est3_modes[m].h, 1992 est3_modes[m].r, 1993 est3_modes[m].rb); 1994 if (mode) { 1995 drm_mode_probed_add(connector, mode); 1996 modes++; 1997 } 1998 } 1999 } 2000 } 2001 2002 return modes; 2003 } 2004 2005 static void 2006 do_established_modes(struct detailed_timing *timing, void *c) 2007 { 2008 struct detailed_mode_closure *closure = c; 2009 struct detailed_non_pixel *data = &timing->data.other_data; 2010 2011 if (data->type == EDID_DETAIL_EST_TIMINGS) 2012 closure->modes += drm_est3_modes(closure->connector, timing); 2013 } 2014 2015 /** 2016 * add_established_modes - get est. modes from EDID and add them 2017 * @edid: EDID block to scan 2018 * 2019 * Each EDID block contains a bitmap of the supported "established modes" list 2020 * (defined above). Tease them out and add them to the global modes list. 2021 */ 2022 static int 2023 add_established_modes(struct drm_connector *connector, struct edid *edid) 2024 { 2025 struct drm_device *dev = connector->dev; 2026 unsigned long est_bits = edid->established_timings.t1 | 2027 (edid->established_timings.t2 << 8) | 2028 ((edid->established_timings.mfg_rsvd & 0x80) << 9); 2029 int i, modes = 0; 2030 struct detailed_mode_closure closure = { 2031 connector, edid, 0, 0, 0 2032 }; 2033 2034 for (i = 0; i <= EDID_EST_TIMINGS; i++) { 2035 if (est_bits & (1<<i)) { 2036 struct drm_display_mode *newmode; 2037 newmode = drm_mode_duplicate(dev, &edid_est_modes[i]); 2038 if (newmode) { 2039 drm_mode_probed_add(connector, newmode); 2040 modes++; 2041 } 2042 } 2043 } 2044 2045 if (version_greater(edid, 1, 0)) 2046 drm_for_each_detailed_block((u8 *)edid, 2047 do_established_modes, &closure); 2048 2049 return modes + closure.modes; 2050 } 2051 2052 static void 2053 do_standard_modes(struct detailed_timing *timing, void *c) 2054 { 2055 struct detailed_mode_closure *closure = c; 2056 struct detailed_non_pixel *data = &timing->data.other_data; 2057 struct drm_connector *connector = closure->connector; 2058 struct edid *edid = closure->edid; 2059 2060 if (data->type == EDID_DETAIL_STD_MODES) { 2061 int i; 2062 for (i = 0; i < 6; i++) { 2063 struct std_timing *std; 2064 struct drm_display_mode *newmode; 2065 2066 std = &data->data.timings[i]; 2067 newmode = drm_mode_std(connector, edid, std, 2068 edid->revision); 2069 if (newmode) { 2070 drm_mode_probed_add(connector, newmode); 2071 closure->modes++; 2072 } 2073 } 2074 } 2075 } 2076 2077 /** 2078 * add_standard_modes - get std. modes from EDID and add them 2079 * @edid: EDID block to scan 2080 * 2081 * Standard modes can be calculated using the appropriate standard (DMT, 2082 * GTF or CVT. Grab them from @edid and add them to the list. 2083 */ 2084 static int 2085 add_standard_modes(struct drm_connector *connector, struct edid *edid) 2086 { 2087 int i, modes = 0; 2088 struct detailed_mode_closure closure = { 2089 connector, edid, 0, 0, 0 2090 }; 2091 2092 for (i = 0; i < EDID_STD_TIMINGS; i++) { 2093 struct drm_display_mode *newmode; 2094 2095 newmode = drm_mode_std(connector, edid, 2096 &edid->standard_timings[i], 2097 edid->revision); 2098 if (newmode) { 2099 drm_mode_probed_add(connector, newmode); 2100 modes++; 2101 } 2102 } 2103 2104 if (version_greater(edid, 1, 0)) 2105 drm_for_each_detailed_block((u8 *)edid, do_standard_modes, 2106 &closure); 2107 2108 /* XXX should also look for standard codes in VTB blocks */ 2109 2110 return modes + closure.modes; 2111 } 2112 2113 static int drm_cvt_modes(struct drm_connector *connector, 2114 struct detailed_timing *timing) 2115 { 2116 int i, j, modes = 0; 2117 struct drm_display_mode *newmode; 2118 struct drm_device *dev = connector->dev; 2119 struct cvt_timing *cvt; 2120 const int rates[] = { 60, 85, 75, 60, 50 }; 2121 const u8 empty[3] = { 0, 0, 0 }; 2122 2123 for (i = 0; i < 4; i++) { 2124 int width = 0, height; 2125 cvt = &(timing->data.other_data.data.cvt[i]); 2126 2127 if (!memcmp(cvt->code, empty, 3)) 2128 continue; 2129 2130 height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2; 2131 switch (cvt->code[1] & 0x0c) { 2132 case 0x00: 2133 width = height * 4 / 3; 2134 break; 2135 case 0x04: 2136 width = height * 16 / 9; 2137 break; 2138 case 0x08: 2139 width = height * 16 / 10; 2140 break; 2141 case 0x0c: 2142 width = height * 15 / 9; 2143 break; 2144 } 2145 2146 for (j = 1; j < 5; j++) { 2147 if (cvt->code[2] & (1 << j)) { 2148 newmode = drm_cvt_mode(dev, width, height, 2149 rates[j], j == 0, 2150 false, false); 2151 if (newmode) { 2152 drm_mode_probed_add(connector, newmode); 2153 modes++; 2154 } 2155 } 2156 } 2157 } 2158 2159 return modes; 2160 } 2161 2162 static void 2163 do_cvt_mode(struct detailed_timing *timing, void *c) 2164 { 2165 struct detailed_mode_closure *closure = c; 2166 struct detailed_non_pixel *data = &timing->data.other_data; 2167 2168 if (data->type == EDID_DETAIL_CVT_3BYTE) 2169 closure->modes += drm_cvt_modes(closure->connector, timing); 2170 } 2171 2172 static int 2173 add_cvt_modes(struct drm_connector *connector, struct edid *edid) 2174 { 2175 struct detailed_mode_closure closure = { 2176 connector, edid, 0, 0, 0 2177 }; 2178 2179 if (version_greater(edid, 1, 2)) 2180 drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure); 2181 2182 /* XXX should also look for CVT codes in VTB blocks */ 2183 2184 return closure.modes; 2185 } 2186 2187 static void 2188 do_detailed_mode(struct detailed_timing *timing, void *c) 2189 { 2190 struct detailed_mode_closure *closure = c; 2191 struct drm_display_mode *newmode; 2192 2193 if (timing->pixel_clock) { 2194 newmode = drm_mode_detailed(closure->connector->dev, 2195 closure->edid, timing, 2196 closure->quirks); 2197 if (!newmode) 2198 return; 2199 2200 if (closure->preferred) 2201 newmode->type |= DRM_MODE_TYPE_PREFERRED; 2202 2203 drm_mode_probed_add(closure->connector, newmode); 2204 closure->modes++; 2205 closure->preferred = 0; 2206 } 2207 } 2208 2209 /* 2210 * add_detailed_modes - Add modes from detailed timings 2211 * @connector: attached connector 2212 * @edid: EDID block to scan 2213 * @quirks: quirks to apply 2214 */ 2215 static int 2216 add_detailed_modes(struct drm_connector *connector, struct edid *edid, 2217 u32 quirks) 2218 { 2219 struct detailed_mode_closure closure = { 2220 connector, 2221 edid, 2222 1, 2223 quirks, 2224 0 2225 }; 2226 2227 if (closure.preferred && !version_greater(edid, 1, 3)) 2228 closure.preferred = 2229 (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING); 2230 2231 drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure); 2232 2233 return closure.modes; 2234 } 2235 2236 #define HDMI_IDENTIFIER 0x000C03 2237 #define AUDIO_BLOCK 0x01 2238 #define VIDEO_BLOCK 0x02 2239 #define VENDOR_BLOCK 0x03 2240 #define SPEAKER_BLOCK 0x04 2241 #define VIDEO_CAPABILITY_BLOCK 0x07 2242 #define EDID_BASIC_AUDIO (1 << 6) 2243 #define EDID_CEA_YCRCB444 (1 << 5) 2244 #define EDID_CEA_YCRCB422 (1 << 4) 2245 #define EDID_CEA_VCDB_QS (1 << 6) 2246 2247 /** 2248 * Search EDID for CEA extension block. 2249 */ 2250 u8 *drm_find_cea_extension(struct edid *edid) 2251 { 2252 u8 *edid_ext = NULL; 2253 int i; 2254 2255 /* No EDID or EDID extensions */ 2256 if (edid == NULL || edid->extensions == 0) 2257 return NULL; 2258 2259 /* Find CEA extension */ 2260 for (i = 0; i < edid->extensions; i++) { 2261 edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1); 2262 if (edid_ext[0] == CEA_EXT) 2263 break; 2264 } 2265 2266 if (i == edid->extensions) 2267 return NULL; 2268 2269 return edid_ext; 2270 } 2271 EXPORT_SYMBOL(drm_find_cea_extension); 2272 2273 /** 2274 * drm_match_cea_mode - look for a CEA mode matching given mode 2275 * @to_match: display mode 2276 * 2277 * Returns the CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861 2278 * mode. 2279 */ 2280 u8 drm_match_cea_mode(const struct drm_display_mode *to_match) 2281 { 2282 const struct drm_display_mode *cea_mode; 2283 u8 mode; 2284 2285 for (mode = 0; mode < ARRAY_SIZE(edid_cea_modes); mode++) { 2286 cea_mode = &edid_cea_modes[mode]; 2287 2288 if (drm_mode_equal(to_match, cea_mode)) 2289 return mode + 1; 2290 } 2291 return 0; 2292 } 2293 EXPORT_SYMBOL(drm_match_cea_mode); 2294 2295 2296 static int 2297 do_cea_modes (struct drm_connector *connector, u8 *db, u8 len) 2298 { 2299 struct drm_device *dev = connector->dev; 2300 u8 * mode, cea_mode; 2301 int modes = 0; 2302 2303 for (mode = db; mode < db + len; mode++) { 2304 cea_mode = (*mode & 127) - 1; /* CEA modes are numbered 1..127 */ 2305 if (cea_mode < ARRAY_SIZE(edid_cea_modes)) { 2306 struct drm_display_mode *newmode; 2307 newmode = drm_mode_duplicate(dev, 2308 &edid_cea_modes[cea_mode]); 2309 if (newmode) { 2310 drm_mode_probed_add(connector, newmode); 2311 modes++; 2312 } 2313 } 2314 } 2315 2316 return modes; 2317 } 2318 2319 static int 2320 cea_db_payload_len(const u8 *db) 2321 { 2322 return db[0] & 0x1f; 2323 } 2324 2325 static int 2326 cea_db_tag(const u8 *db) 2327 { 2328 return db[0] >> 5; 2329 } 2330 2331 static int 2332 cea_revision(const u8 *cea) 2333 { 2334 return cea[1]; 2335 } 2336 2337 static int 2338 cea_db_offsets(const u8 *cea, int *start, int *end) 2339 { 2340 /* Data block offset in CEA extension block */ 2341 *start = 4; 2342 *end = cea[2]; 2343 if (*end == 0) 2344 *end = 127; 2345 if (*end < 4 || *end > 127) 2346 return -ERANGE; 2347 return 0; 2348 } 2349 2350 #define for_each_cea_db(cea, i, start, end) \ 2351 for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1) 2352 2353 static int 2354 add_cea_modes(struct drm_connector *connector, struct edid *edid) 2355 { 2356 u8 * cea = drm_find_cea_extension(edid); 2357 u8 * db, dbl; 2358 int modes = 0; 2359 2360 if (cea && cea_revision(cea) >= 3) { 2361 int i, start, end; 2362 2363 if (cea_db_offsets(cea, &start, &end)) 2364 return 0; 2365 2366 for_each_cea_db(cea, i, start, end) { 2367 db = &cea[i]; 2368 dbl = cea_db_payload_len(db); 2369 2370 if (cea_db_tag(db) == VIDEO_BLOCK) 2371 modes += do_cea_modes (connector, db+1, dbl); 2372 } 2373 } 2374 2375 return modes; 2376 } 2377 2378 static void 2379 parse_hdmi_vsdb(struct drm_connector *connector, const u8 *db) 2380 { 2381 u8 len = cea_db_payload_len(db); 2382 2383 if (len >= 6) { 2384 connector->eld[5] |= (db[6] >> 7) << 1; /* Supports_AI */ 2385 connector->dvi_dual = db[6] & 1; 2386 } 2387 if (len >= 7) 2388 connector->max_tmds_clock = db[7] * 5; 2389 if (len >= 8) { 2390 connector->latency_present[0] = db[8] >> 7; 2391 connector->latency_present[1] = (db[8] >> 6) & 1; 2392 } 2393 if (len >= 9) 2394 connector->video_latency[0] = db[9]; 2395 if (len >= 10) 2396 connector->audio_latency[0] = db[10]; 2397 if (len >= 11) 2398 connector->video_latency[1] = db[11]; 2399 if (len >= 12) 2400 connector->audio_latency[1] = db[12]; 2401 2402 DRM_DEBUG_KMS("HDMI: DVI dual %d, " 2403 "max TMDS clock %d, " 2404 "latency present %d %d, " 2405 "video latency %d %d, " 2406 "audio latency %d %d\n", 2407 connector->dvi_dual, 2408 connector->max_tmds_clock, 2409 (int) connector->latency_present[0], 2410 (int) connector->latency_present[1], 2411 connector->video_latency[0], 2412 connector->video_latency[1], 2413 connector->audio_latency[0], 2414 connector->audio_latency[1]); 2415 } 2416 2417 static void 2418 monitor_name(struct detailed_timing *t, void *data) 2419 { 2420 if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME) 2421 *(u8 **)data = t->data.other_data.data.str.str; 2422 } 2423 2424 static bool cea_db_is_hdmi_vsdb(const u8 *db) 2425 { 2426 int hdmi_id; 2427 2428 if (cea_db_tag(db) != VENDOR_BLOCK) 2429 return false; 2430 2431 if (cea_db_payload_len(db) < 5) 2432 return false; 2433 2434 hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16); 2435 2436 return hdmi_id == HDMI_IDENTIFIER; 2437 } 2438 2439 /** 2440 * drm_edid_to_eld - build ELD from EDID 2441 * @connector: connector corresponding to the HDMI/DP sink 2442 * @edid: EDID to parse 2443 * 2444 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. 2445 * Some ELD fields are left to the graphics driver caller: 2446 * - Conn_Type 2447 * - HDCP 2448 * - Port_ID 2449 */ 2450 void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid) 2451 { 2452 uint8_t *eld = connector->eld; 2453 u8 *cea; 2454 u8 *name; 2455 u8 *db; 2456 int sad_count = 0; 2457 int mnl; 2458 int dbl; 2459 2460 memset(eld, 0, sizeof(connector->eld)); 2461 2462 cea = drm_find_cea_extension(edid); 2463 if (!cea) { 2464 DRM_DEBUG_KMS("ELD: no CEA Extension found\n"); 2465 return; 2466 } 2467 2468 name = NULL; 2469 drm_for_each_detailed_block((u8 *)edid, monitor_name, &name); 2470 for (mnl = 0; name && mnl < 13; mnl++) { 2471 if (name[mnl] == 0x0a) 2472 break; 2473 eld[20 + mnl] = name[mnl]; 2474 } 2475 eld[4] = (cea[1] << 5) | mnl; 2476 DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20); 2477 2478 eld[0] = 2 << 3; /* ELD version: 2 */ 2479 2480 eld[16] = edid->mfg_id[0]; 2481 eld[17] = edid->mfg_id[1]; 2482 eld[18] = edid->prod_code[0]; 2483 eld[19] = edid->prod_code[1]; 2484 2485 if (cea_revision(cea) >= 3) { 2486 int i, start, end; 2487 2488 if (cea_db_offsets(cea, &start, &end)) { 2489 start = 0; 2490 end = 0; 2491 } 2492 2493 for_each_cea_db(cea, i, start, end) { 2494 db = &cea[i]; 2495 dbl = cea_db_payload_len(db); 2496 2497 switch (cea_db_tag(db)) { 2498 case AUDIO_BLOCK: 2499 /* Audio Data Block, contains SADs */ 2500 sad_count = dbl / 3; 2501 if (dbl >= 1) 2502 memcpy(eld + 20 + mnl, &db[1], dbl); 2503 break; 2504 case SPEAKER_BLOCK: 2505 /* Speaker Allocation Data Block */ 2506 if (dbl >= 1) 2507 eld[7] = db[1]; 2508 break; 2509 case VENDOR_BLOCK: 2510 /* HDMI Vendor-Specific Data Block */ 2511 if (cea_db_is_hdmi_vsdb(db)) 2512 parse_hdmi_vsdb(connector, db); 2513 break; 2514 default: 2515 break; 2516 } 2517 } 2518 } 2519 eld[5] |= sad_count << 4; 2520 eld[2] = (20 + mnl + sad_count * 3 + 3) / 4; 2521 2522 DRM_DEBUG_KMS("ELD size %d, SAD count %d\n", (int)eld[2], sad_count); 2523 } 2524 EXPORT_SYMBOL(drm_edid_to_eld); 2525 2526 /** 2527 * drm_av_sync_delay - HDMI/DP sink audio-video sync delay in millisecond 2528 * @connector: connector associated with the HDMI/DP sink 2529 * @mode: the display mode 2530 */ 2531 int drm_av_sync_delay(struct drm_connector *connector, 2532 struct drm_display_mode *mode) 2533 { 2534 int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 2535 int a, v; 2536 2537 if (!connector->latency_present[0]) 2538 return 0; 2539 if (!connector->latency_present[1]) 2540 i = 0; 2541 2542 a = connector->audio_latency[i]; 2543 v = connector->video_latency[i]; 2544 2545 /* 2546 * HDMI/DP sink doesn't support audio or video? 2547 */ 2548 if (a == 255 || v == 255) 2549 return 0; 2550 2551 /* 2552 * Convert raw EDID values to millisecond. 2553 * Treat unknown latency as 0ms. 2554 */ 2555 if (a) 2556 a = min(2 * (a - 1), 500); 2557 if (v) 2558 v = min(2 * (v - 1), 500); 2559 2560 return max(v - a, 0); 2561 } 2562 EXPORT_SYMBOL(drm_av_sync_delay); 2563 2564 /** 2565 * drm_select_eld - select one ELD from multiple HDMI/DP sinks 2566 * @encoder: the encoder just changed display mode 2567 * @mode: the adjusted display mode 2568 * 2569 * It's possible for one encoder to be associated with multiple HDMI/DP sinks. 2570 * The policy is now hard coded to simply use the first HDMI/DP sink's ELD. 2571 */ 2572 struct drm_connector *drm_select_eld(struct drm_encoder *encoder, 2573 struct drm_display_mode *mode) 2574 { 2575 struct drm_connector *connector; 2576 struct drm_device *dev = encoder->dev; 2577 2578 list_for_each_entry(connector, &dev->mode_config.connector_list, head) 2579 if (connector->encoder == encoder && connector->eld[0]) 2580 return connector; 2581 2582 return NULL; 2583 } 2584 EXPORT_SYMBOL(drm_select_eld); 2585 2586 /** 2587 * drm_detect_hdmi_monitor - detect whether monitor is hdmi. 2588 * @edid: monitor EDID information 2589 * 2590 * Parse the CEA extension according to CEA-861-B. 2591 * Return true if HDMI, false if not or unknown. 2592 */ 2593 bool drm_detect_hdmi_monitor(struct edid *edid) 2594 { 2595 u8 *edid_ext; 2596 int i; 2597 int start_offset, end_offset; 2598 2599 edid_ext = drm_find_cea_extension(edid); 2600 if (!edid_ext) 2601 return false; 2602 2603 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2604 return false; 2605 2606 /* 2607 * Because HDMI identifier is in Vendor Specific Block, 2608 * search it from all data blocks of CEA extension. 2609 */ 2610 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2611 if (cea_db_is_hdmi_vsdb(&edid_ext[i])) 2612 return true; 2613 } 2614 2615 return false; 2616 } 2617 EXPORT_SYMBOL(drm_detect_hdmi_monitor); 2618 2619 /** 2620 * drm_detect_monitor_audio - check monitor audio capability 2621 * 2622 * Monitor should have CEA extension block. 2623 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic 2624 * audio' only. If there is any audio extension block and supported 2625 * audio format, assume at least 'basic audio' support, even if 'basic 2626 * audio' is not defined in EDID. 2627 * 2628 */ 2629 bool drm_detect_monitor_audio(struct edid *edid) 2630 { 2631 u8 *edid_ext; 2632 int i, j; 2633 bool has_audio = false; 2634 int start_offset, end_offset; 2635 2636 edid_ext = drm_find_cea_extension(edid); 2637 if (!edid_ext) 2638 goto end; 2639 2640 has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0); 2641 2642 if (has_audio) { 2643 DRM_DEBUG_KMS("Monitor has basic audio support\n"); 2644 goto end; 2645 } 2646 2647 if (cea_db_offsets(edid_ext, &start_offset, &end_offset)) 2648 goto end; 2649 2650 for_each_cea_db(edid_ext, i, start_offset, end_offset) { 2651 if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) { 2652 has_audio = true; 2653 for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3) 2654 DRM_DEBUG_KMS("CEA audio format %d\n", 2655 (edid_ext[i + j] >> 3) & 0xf); 2656 goto end; 2657 } 2658 } 2659 end: 2660 return has_audio; 2661 } 2662 EXPORT_SYMBOL(drm_detect_monitor_audio); 2663 2664 /** 2665 * drm_rgb_quant_range_selectable - is RGB quantization range selectable? 2666 * 2667 * Check whether the monitor reports the RGB quantization range selection 2668 * as supported. The AVI infoframe can then be used to inform the monitor 2669 * which quantization range (full or limited) is used. 2670 */ 2671 bool drm_rgb_quant_range_selectable(struct edid *edid) 2672 { 2673 u8 *edid_ext; 2674 int i, start, end; 2675 2676 edid_ext = drm_find_cea_extension(edid); 2677 if (!edid_ext) 2678 return false; 2679 2680 if (cea_db_offsets(edid_ext, &start, &end)) 2681 return false; 2682 2683 for_each_cea_db(edid_ext, i, start, end) { 2684 if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK && 2685 cea_db_payload_len(&edid_ext[i]) == 2) { 2686 DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]); 2687 return edid_ext[i + 2] & EDID_CEA_VCDB_QS; 2688 } 2689 } 2690 2691 return false; 2692 } 2693 EXPORT_SYMBOL(drm_rgb_quant_range_selectable); 2694 2695 /** 2696 * drm_add_display_info - pull display info out if present 2697 * @edid: EDID data 2698 * @info: display info (attached to connector) 2699 * 2700 * Grab any available display info and stuff it into the drm_display_info 2701 * structure that's part of the connector. Useful for tracking bpp and 2702 * color spaces. 2703 */ 2704 static void drm_add_display_info(struct edid *edid, 2705 struct drm_display_info *info) 2706 { 2707 u8 *edid_ext; 2708 2709 info->width_mm = edid->width_cm * 10; 2710 info->height_mm = edid->height_cm * 10; 2711 2712 /* driver figures it out in this case */ 2713 info->bpc = 0; 2714 info->color_formats = 0; 2715 2716 if (edid->revision < 3) 2717 return; 2718 2719 if (!(edid->input & DRM_EDID_INPUT_DIGITAL)) 2720 return; 2721 2722 /* Get data from CEA blocks if present */ 2723 edid_ext = drm_find_cea_extension(edid); 2724 if (edid_ext) { 2725 info->cea_rev = edid_ext[1]; 2726 2727 /* The existence of a CEA block should imply RGB support */ 2728 info->color_formats = DRM_COLOR_FORMAT_RGB444; 2729 if (edid_ext[3] & EDID_CEA_YCRCB444) 2730 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2731 if (edid_ext[3] & EDID_CEA_YCRCB422) 2732 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2733 } 2734 2735 /* Only defined for 1.4 with digital displays */ 2736 if (edid->revision < 4) 2737 return; 2738 2739 switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) { 2740 case DRM_EDID_DIGITAL_DEPTH_6: 2741 info->bpc = 6; 2742 break; 2743 case DRM_EDID_DIGITAL_DEPTH_8: 2744 info->bpc = 8; 2745 break; 2746 case DRM_EDID_DIGITAL_DEPTH_10: 2747 info->bpc = 10; 2748 break; 2749 case DRM_EDID_DIGITAL_DEPTH_12: 2750 info->bpc = 12; 2751 break; 2752 case DRM_EDID_DIGITAL_DEPTH_14: 2753 info->bpc = 14; 2754 break; 2755 case DRM_EDID_DIGITAL_DEPTH_16: 2756 info->bpc = 16; 2757 break; 2758 case DRM_EDID_DIGITAL_DEPTH_UNDEF: 2759 default: 2760 info->bpc = 0; 2761 break; 2762 } 2763 2764 info->color_formats |= DRM_COLOR_FORMAT_RGB444; 2765 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444) 2766 info->color_formats |= DRM_COLOR_FORMAT_YCRCB444; 2767 if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422) 2768 info->color_formats |= DRM_COLOR_FORMAT_YCRCB422; 2769 } 2770 2771 /** 2772 * drm_add_edid_modes - add modes from EDID data, if available 2773 * @connector: connector we're probing 2774 * @edid: edid data 2775 * 2776 * Add the specified modes to the connector's mode list. 2777 * 2778 * Return number of modes added or 0 if we couldn't find any. 2779 */ 2780 int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid) 2781 { 2782 int num_modes = 0; 2783 u32 quirks; 2784 2785 if (edid == NULL) { 2786 return 0; 2787 } 2788 if (!drm_edid_is_valid(edid)) { 2789 dev_warn(connector->dev->dev, "%s: EDID invalid.\n", 2790 drm_get_connector_name(connector)); 2791 return 0; 2792 } 2793 2794 quirks = edid_get_quirks(edid); 2795 2796 /* 2797 * EDID spec says modes should be preferred in this order: 2798 * - preferred detailed mode 2799 * - other detailed modes from base block 2800 * - detailed modes from extension blocks 2801 * - CVT 3-byte code modes 2802 * - standard timing codes 2803 * - established timing codes 2804 * - modes inferred from GTF or CVT range information 2805 * 2806 * We get this pretty much right. 2807 * 2808 * XXX order for additional mode types in extension blocks? 2809 */ 2810 num_modes += add_detailed_modes(connector, edid, quirks); 2811 num_modes += add_cvt_modes(connector, edid); 2812 num_modes += add_standard_modes(connector, edid); 2813 num_modes += add_established_modes(connector, edid); 2814 if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF) 2815 num_modes += add_inferred_modes(connector, edid); 2816 num_modes += add_cea_modes(connector, edid); 2817 2818 if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75)) 2819 edid_fixup_preferred(connector, quirks); 2820 2821 drm_add_display_info(edid, &connector->display_info); 2822 2823 return num_modes; 2824 } 2825 EXPORT_SYMBOL(drm_add_edid_modes); 2826 2827 /** 2828 * drm_add_modes_noedid - add modes for the connectors without EDID 2829 * @connector: connector we're probing 2830 * @hdisplay: the horizontal display limit 2831 * @vdisplay: the vertical display limit 2832 * 2833 * Add the specified modes to the connector's mode list. Only when the 2834 * hdisplay/vdisplay is not beyond the given limit, it will be added. 2835 * 2836 * Return number of modes added or 0 if we couldn't find any. 2837 */ 2838 int drm_add_modes_noedid(struct drm_connector *connector, 2839 int hdisplay, int vdisplay) 2840 { 2841 int i, count, num_modes = 0; 2842 struct drm_display_mode *mode; 2843 struct drm_device *dev = connector->dev; 2844 2845 count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode); 2846 if (hdisplay < 0) 2847 hdisplay = 0; 2848 if (vdisplay < 0) 2849 vdisplay = 0; 2850 2851 for (i = 0; i < count; i++) { 2852 const struct drm_display_mode *ptr = &drm_dmt_modes[i]; 2853 if (hdisplay && vdisplay) { 2854 /* 2855 * Only when two are valid, they will be used to check 2856 * whether the mode should be added to the mode list of 2857 * the connector. 2858 */ 2859 if (ptr->hdisplay > hdisplay || 2860 ptr->vdisplay > vdisplay) 2861 continue; 2862 } 2863 if (drm_mode_vrefresh(ptr) > 61) 2864 continue; 2865 mode = drm_mode_duplicate(dev, ptr); 2866 if (mode) { 2867 drm_mode_probed_add(connector, mode); 2868 num_modes++; 2869 } 2870 } 2871 return num_modes; 2872 } 2873 EXPORT_SYMBOL(drm_add_modes_noedid); 2874 2875 /** 2876 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with 2877 * data from a DRM display mode 2878 * @frame: HDMI AVI infoframe 2879 * @mode: DRM display mode 2880 * 2881 * Returns 0 on success or a negative error code on failure. 2882 */ 2883 int 2884 drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame, 2885 const struct drm_display_mode *mode) 2886 { 2887 int err; 2888 2889 if (!frame || !mode) 2890 return -EINVAL; 2891 2892 err = hdmi_avi_infoframe_init(frame); 2893 if (err < 0) 2894 return err; 2895 2896 frame->video_code = drm_match_cea_mode(mode); 2897 if (!frame->video_code) 2898 return 0; 2899 2900 frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE; 2901 frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE; 2902 2903 return 0; 2904 } 2905 EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode); 2906