1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 * 32 * $FreeBSD: src/sys/dev/drm2/drm_modes.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 33 */ 34 35 #include <drm/drmP.h> 36 #include <drm/drm_crtc.h> 37 38 #define KHZ2PICOS(a) (1000000000UL/(a)) 39 40 /** 41 * drm_mode_debug_printmodeline - debug print a mode 42 * @dev: DRM device 43 * @mode: mode to print 44 * 45 * LOCKING: 46 * None. 47 * 48 * Describe @mode using DRM_DEBUG. 49 */ 50 void drm_mode_debug_printmodeline(struct drm_display_mode *mode) 51 { 52 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 53 "0x%x 0x%x\n", 54 mode->base.id, mode->name, mode->vrefresh, mode->clock, 55 mode->hdisplay, mode->hsync_start, 56 mode->hsync_end, mode->htotal, 57 mode->vdisplay, mode->vsync_start, 58 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 59 } 60 61 /** 62 * drm_cvt_mode -create a modeline based on CVT algorithm 63 * @dev: DRM device 64 * @hdisplay: hdisplay size 65 * @vdisplay: vdisplay size 66 * @vrefresh : vrefresh rate 67 * @reduced : Whether the GTF calculation is simplified 68 * @interlaced:Whether the interlace is supported 69 * 70 * LOCKING: 71 * none. 72 * 73 * return the modeline based on CVT algorithm 74 * 75 * This function is called to generate the modeline based on CVT algorithm 76 * according to the hdisplay, vdisplay, vrefresh. 77 * It is based from the VESA(TM) Coordinated Video Timing Generator by 78 * Graham Loveridge April 9, 2003 available at 79 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 80 * 81 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 82 * What I have done is to translate it by using integer calculation. 83 */ 84 #define HV_FACTOR 1000 85 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 86 int vdisplay, int vrefresh, 87 bool reduced, bool interlaced, bool margins) 88 { 89 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 90 #define CVT_MARGIN_PERCENTAGE 18 91 /* 2) character cell horizontal granularity (pixels) - default 8 */ 92 #define CVT_H_GRANULARITY 8 93 /* 3) Minimum vertical porch (lines) - default 3 */ 94 #define CVT_MIN_V_PORCH 3 95 /* 4) Minimum number of vertical back porch lines - default 6 */ 96 #define CVT_MIN_V_BPORCH 6 97 /* Pixel Clock step (kHz) */ 98 #define CVT_CLOCK_STEP 250 99 struct drm_display_mode *drm_mode; 100 unsigned int vfieldrate, hperiod; 101 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 102 int interlace; 103 104 /* allocate the drm_display_mode structure. If failure, we will 105 * return directly 106 */ 107 drm_mode = drm_mode_create(dev); 108 if (!drm_mode) 109 return NULL; 110 111 /* the CVT default refresh rate is 60Hz */ 112 if (!vrefresh) 113 vrefresh = 60; 114 115 /* the required field fresh rate */ 116 if (interlaced) 117 vfieldrate = vrefresh * 2; 118 else 119 vfieldrate = vrefresh; 120 121 /* horizontal pixels */ 122 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 123 124 /* determine the left&right borders */ 125 hmargin = 0; 126 if (margins) { 127 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 128 hmargin -= hmargin % CVT_H_GRANULARITY; 129 } 130 /* find the total active pixels */ 131 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 132 133 /* find the number of lines per field */ 134 if (interlaced) 135 vdisplay_rnd = vdisplay / 2; 136 else 137 vdisplay_rnd = vdisplay; 138 139 /* find the top & bottom borders */ 140 vmargin = 0; 141 if (margins) 142 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 143 144 drm_mode->vdisplay = vdisplay + 2 * vmargin; 145 146 /* Interlaced */ 147 if (interlaced) 148 interlace = 1; 149 else 150 interlace = 0; 151 152 /* Determine VSync Width from aspect ratio */ 153 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 154 vsync = 4; 155 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 156 vsync = 5; 157 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 158 vsync = 6; 159 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 160 vsync = 7; 161 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 162 vsync = 7; 163 else /* custom */ 164 vsync = 10; 165 166 if (!reduced) { 167 /* simplify the GTF calculation */ 168 /* 4) Minimum time of vertical sync + back porch interval (µs) 169 * default 550.0 170 */ 171 int tmp1, tmp2; 172 #define CVT_MIN_VSYNC_BP 550 173 /* 3) Nominal HSync width (% of line period) - default 8 */ 174 #define CVT_HSYNC_PERCENTAGE 8 175 unsigned int hblank_percentage; 176 int vsyncandback_porch, vback_porch, hblank; 177 178 /* estimated the horizontal period */ 179 tmp1 = HV_FACTOR * 1000000 - 180 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 181 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 182 interlace; 183 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 184 185 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 186 /* 9. Find number of lines in sync + backporch */ 187 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 188 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 189 else 190 vsyncandback_porch = tmp1; 191 /* 10. Find number of lines in back porch */ 192 vback_porch = vsyncandback_porch - vsync; 193 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 194 vsyncandback_porch + CVT_MIN_V_PORCH; 195 /* 5) Definition of Horizontal blanking time limitation */ 196 /* Gradient (%/kHz) - default 600 */ 197 #define CVT_M_FACTOR 600 198 /* Offset (%) - default 40 */ 199 #define CVT_C_FACTOR 40 200 /* Blanking time scaling factor - default 128 */ 201 #define CVT_K_FACTOR 128 202 /* Scaling factor weighting - default 20 */ 203 #define CVT_J_FACTOR 20 204 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 205 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 206 CVT_J_FACTOR) 207 /* 12. Find ideal blanking duty cycle from formula */ 208 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 209 hperiod / 1000; 210 /* 13. Blanking time */ 211 if (hblank_percentage < 20 * HV_FACTOR) 212 hblank_percentage = 20 * HV_FACTOR; 213 hblank = drm_mode->hdisplay * hblank_percentage / 214 (100 * HV_FACTOR - hblank_percentage); 215 hblank -= hblank % (2 * CVT_H_GRANULARITY); 216 /* 14. find the total pixes per line */ 217 drm_mode->htotal = drm_mode->hdisplay + hblank; 218 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 219 drm_mode->hsync_start = drm_mode->hsync_end - 220 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 221 drm_mode->hsync_start += CVT_H_GRANULARITY - 222 drm_mode->hsync_start % CVT_H_GRANULARITY; 223 /* fill the Vsync values */ 224 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 225 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 226 } else { 227 /* Reduced blanking */ 228 /* Minimum vertical blanking interval time (µs)- default 460 */ 229 #define CVT_RB_MIN_VBLANK 460 230 /* Fixed number of clocks for horizontal sync */ 231 #define CVT_RB_H_SYNC 32 232 /* Fixed number of clocks for horizontal blanking */ 233 #define CVT_RB_H_BLANK 160 234 /* Fixed number of lines for vertical front porch - default 3*/ 235 #define CVT_RB_VFPORCH 3 236 int vbilines; 237 int tmp1, tmp2; 238 /* 8. Estimate Horizontal period. */ 239 tmp1 = HV_FACTOR * 1000000 - 240 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 241 tmp2 = vdisplay_rnd + 2 * vmargin; 242 hperiod = tmp1 / (tmp2 * vfieldrate); 243 /* 9. Find number of lines in vertical blanking */ 244 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 245 /* 10. Check if vertical blanking is sufficient */ 246 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 247 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 248 /* 11. Find total number of lines in vertical field */ 249 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 250 /* 12. Find total number of pixels in a line */ 251 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 252 /* Fill in HSync values */ 253 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 254 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 255 /* Fill in VSync values */ 256 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 257 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 258 } 259 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 260 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 261 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 262 /* 18/16. Find actual vertical frame frequency */ 263 /* ignore - just set the mode flag for interlaced */ 264 if (interlaced) { 265 drm_mode->vtotal *= 2; 266 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 267 } 268 /* Fill the mode line name */ 269 drm_mode_set_name(drm_mode); 270 if (reduced) 271 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 272 DRM_MODE_FLAG_NVSYNC); 273 else 274 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 275 DRM_MODE_FLAG_NHSYNC); 276 277 return drm_mode; 278 } 279 280 /** 281 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 282 * 283 * @dev :drm device 284 * @hdisplay :hdisplay size 285 * @vdisplay :vdisplay size 286 * @vrefresh :vrefresh rate. 287 * @interlaced :whether the interlace is supported 288 * @margins :desired margin size 289 * @GTF_[MCKJ] :extended GTF formula parameters 290 * 291 * LOCKING. 292 * none. 293 * 294 * return the modeline based on full GTF algorithm. 295 * 296 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 297 * in here multiplied by two. For a C of 40, pass in 80. 298 */ 299 struct drm_display_mode * 300 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 301 int vrefresh, bool interlaced, int margins, 302 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 303 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 304 #define GTF_MARGIN_PERCENTAGE 18 305 /* 2) character cell horizontal granularity (pixels) - default 8 */ 306 #define GTF_CELL_GRAN 8 307 /* 3) Minimum vertical porch (lines) - default 3 */ 308 #define GTF_MIN_V_PORCH 1 309 /* width of vsync in lines */ 310 #define V_SYNC_RQD 3 311 /* width of hsync as % of total line */ 312 #define H_SYNC_PERCENT 8 313 /* min time of vsync + back porch (microsec) */ 314 #define MIN_VSYNC_PLUS_BP 550 315 /* C' and M' are part of the Blanking Duty Cycle computation */ 316 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 317 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 318 struct drm_display_mode *drm_mode; 319 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 320 int top_margin, bottom_margin; 321 int interlace; 322 unsigned int hfreq_est; 323 int vsync_plus_bp, vback_porch; 324 unsigned int vtotal_lines, vfieldrate_est, hperiod; 325 unsigned int vfield_rate, vframe_rate; 326 int left_margin, right_margin; 327 unsigned int total_active_pixels, ideal_duty_cycle; 328 unsigned int hblank, total_pixels, pixel_freq; 329 int hsync, hfront_porch, vodd_front_porch_lines; 330 unsigned int tmp1, tmp2; 331 332 drm_mode = drm_mode_create(dev); 333 if (!drm_mode) 334 return NULL; 335 336 /* 1. In order to give correct results, the number of horizontal 337 * pixels requested is first processed to ensure that it is divisible 338 * by the character size, by rounding it to the nearest character 339 * cell boundary: 340 */ 341 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 342 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 343 344 /* 2. If interlace is requested, the number of vertical lines assumed 345 * by the calculation must be halved, as the computation calculates 346 * the number of vertical lines per field. 347 */ 348 if (interlaced) 349 vdisplay_rnd = vdisplay / 2; 350 else 351 vdisplay_rnd = vdisplay; 352 353 /* 3. Find the frame rate required: */ 354 if (interlaced) 355 vfieldrate_rqd = vrefresh * 2; 356 else 357 vfieldrate_rqd = vrefresh; 358 359 /* 4. Find number of lines in Top margin: */ 360 top_margin = 0; 361 if (margins) 362 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 363 1000; 364 /* 5. Find number of lines in bottom margin: */ 365 bottom_margin = top_margin; 366 367 /* 6. If interlace is required, then set variable interlace: */ 368 if (interlaced) 369 interlace = 1; 370 else 371 interlace = 0; 372 373 /* 7. Estimate the Horizontal frequency */ 374 { 375 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 376 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 377 2 + interlace; 378 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 379 } 380 381 /* 8. Find the number of lines in V sync + back porch */ 382 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 383 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 384 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 385 /* 9. Find the number of lines in V back porch alone: */ 386 vback_porch = vsync_plus_bp - V_SYNC_RQD; 387 /* 10. Find the total number of lines in Vertical field period: */ 388 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 389 vsync_plus_bp + GTF_MIN_V_PORCH; 390 /* 11. Estimate the Vertical field frequency: */ 391 vfieldrate_est = hfreq_est / vtotal_lines; 392 /* 12. Find the actual horizontal period: */ 393 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 394 395 /* 13. Find the actual Vertical field frequency: */ 396 vfield_rate = hfreq_est / vtotal_lines; 397 /* 14. Find the Vertical frame frequency: */ 398 if (interlaced) 399 vframe_rate = vfield_rate / 2; 400 else 401 vframe_rate = vfield_rate; 402 /* 15. Find number of pixels in left margin: */ 403 if (margins) 404 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 405 1000; 406 else 407 left_margin = 0; 408 409 /* 16.Find number of pixels in right margin: */ 410 right_margin = left_margin; 411 /* 17.Find total number of active pixels in image and left and right */ 412 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 413 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 414 ideal_duty_cycle = GTF_C_PRIME * 1000 - 415 (GTF_M_PRIME * 1000000 / hfreq_est); 416 /* 19.Find the number of pixels in the blanking time to the nearest 417 * double character cell: */ 418 hblank = total_active_pixels * ideal_duty_cycle / 419 (100000 - ideal_duty_cycle); 420 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 421 hblank = hblank * 2 * GTF_CELL_GRAN; 422 /* 20.Find total number of pixels: */ 423 total_pixels = total_active_pixels + hblank; 424 /* 21.Find pixel clock frequency: */ 425 pixel_freq = total_pixels * hfreq_est / 1000; 426 /* Stage 1 computations are now complete; I should really pass 427 * the results to another function and do the Stage 2 computations, 428 * but I only need a few more values so I'll just append the 429 * computations here for now */ 430 /* 17. Find the number of pixels in the horizontal sync period: */ 431 hsync = H_SYNC_PERCENT * total_pixels / 100; 432 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 433 hsync = hsync * GTF_CELL_GRAN; 434 /* 18. Find the number of pixels in horizontal front porch period */ 435 hfront_porch = hblank / 2 - hsync; 436 /* 36. Find the number of lines in the odd front porch period: */ 437 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 438 439 /* finally, pack the results in the mode struct */ 440 drm_mode->hdisplay = hdisplay_rnd; 441 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 442 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 443 drm_mode->htotal = total_pixels; 444 drm_mode->vdisplay = vdisplay_rnd; 445 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 446 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 447 drm_mode->vtotal = vtotal_lines; 448 449 drm_mode->clock = pixel_freq; 450 451 if (interlaced) { 452 drm_mode->vtotal *= 2; 453 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 454 } 455 456 drm_mode_set_name(drm_mode); 457 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 458 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 459 else 460 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 461 462 return drm_mode; 463 } 464 465 /** 466 * drm_gtf_mode - create the modeline based on GTF algorithm 467 * 468 * @dev :drm device 469 * @hdisplay :hdisplay size 470 * @vdisplay :vdisplay size 471 * @vrefresh :vrefresh rate. 472 * @interlaced :whether the interlace is supported 473 * @margins :whether the margin is supported 474 * 475 * LOCKING. 476 * none. 477 * 478 * return the modeline based on GTF algorithm 479 * 480 * This function is to create the modeline based on the GTF algorithm. 481 * Generalized Timing Formula is derived from: 482 * GTF Spreadsheet by Andy Morrish (1/5/97) 483 * available at http://www.vesa.org 484 * 485 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 486 * What I have done is to translate it by using integer calculation. 487 * I also refer to the function of fb_get_mode in the file of 488 * drivers/video/fbmon.c 489 * 490 * Standard GTF parameters: 491 * M = 600 492 * C = 40 493 * K = 128 494 * J = 20 495 */ 496 struct drm_display_mode * 497 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 498 bool lace, int margins) 499 { 500 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 501 margins, 600, 40 * 2, 128, 20 * 2); 502 } 503 504 /** 505 * drm_mode_set_name - set the name on a mode 506 * @mode: name will be set in this mode 507 * 508 * LOCKING: 509 * None. 510 * 511 * Set the name of @mode to a standard format. 512 */ 513 void drm_mode_set_name(struct drm_display_mode *mode) 514 { 515 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 516 517 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 518 mode->hdisplay, mode->vdisplay, 519 interlaced ? "i" : ""); 520 } 521 522 /** 523 * drm_mode_list_concat - move modes from one list to another 524 * @head: source list 525 * @new: dst list 526 * 527 * LOCKING: 528 * Caller must ensure both lists are locked. 529 * 530 * Move all the modes from @head to @new. 531 */ 532 void drm_mode_list_concat(struct list_head *head, struct list_head *new) 533 { 534 535 struct list_head *entry, *tmp; 536 537 list_for_each_safe(entry, tmp, head) { 538 list_move_tail(entry, new); 539 } 540 } 541 542 /** 543 * drm_mode_width - get the width of a mode 544 * @mode: mode 545 * 546 * LOCKING: 547 * None. 548 * 549 * Return @mode's width (hdisplay) value. 550 * 551 * FIXME: is this needed? 552 * 553 * RETURNS: 554 * @mode->hdisplay 555 */ 556 int drm_mode_width(struct drm_display_mode *mode) 557 { 558 return mode->hdisplay; 559 560 } 561 562 /** 563 * drm_mode_height - get the height of a mode 564 * @mode: mode 565 * 566 * LOCKING: 567 * None. 568 * 569 * Return @mode's height (vdisplay) value. 570 * 571 * FIXME: is this needed? 572 * 573 * RETURNS: 574 * @mode->vdisplay 575 */ 576 int drm_mode_height(struct drm_display_mode *mode) 577 { 578 return mode->vdisplay; 579 } 580 581 /** drm_mode_hsync - get the hsync of a mode 582 * @mode: mode 583 * 584 * LOCKING: 585 * None. 586 * 587 * Return @modes's hsync rate in kHz, rounded to the nearest int. 588 */ 589 int drm_mode_hsync(const struct drm_display_mode *mode) 590 { 591 unsigned int calc_val; 592 593 if (mode->hsync) 594 return mode->hsync; 595 596 if (mode->htotal < 0) 597 return 0; 598 599 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 600 calc_val += 500; /* round to 1000Hz */ 601 calc_val /= 1000; /* truncate to kHz */ 602 603 return calc_val; 604 } 605 606 /** 607 * drm_mode_vrefresh - get the vrefresh of a mode 608 * @mode: mode 609 * 610 * LOCKING: 611 * None. 612 * 613 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 614 * 615 * FIXME: why is this needed? shouldn't vrefresh be set already? 616 * 617 * RETURNS: 618 * Vertical refresh rate. It will be the result of actual value plus 0.5. 619 * If it is 70.288, it will return 70Hz. 620 * If it is 59.6, it will return 60Hz. 621 */ 622 int drm_mode_vrefresh(const struct drm_display_mode *mode) 623 { 624 int refresh = 0; 625 unsigned int calc_val; 626 627 if (mode->vrefresh > 0) 628 refresh = mode->vrefresh; 629 else if (mode->htotal > 0 && mode->vtotal > 0) { 630 int vtotal; 631 vtotal = mode->vtotal; 632 /* work out vrefresh the value will be x1000 */ 633 calc_val = (mode->clock * 1000); 634 calc_val /= mode->htotal; 635 refresh = (calc_val + vtotal / 2) / vtotal; 636 637 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 638 refresh *= 2; 639 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 640 refresh /= 2; 641 if (mode->vscan > 1) 642 refresh /= mode->vscan; 643 } 644 return refresh; 645 } 646 647 /** 648 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 649 * @p: mode 650 * @adjust_flags: unused? (FIXME) 651 * 652 * LOCKING: 653 * None. 654 * 655 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 656 */ 657 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 658 { 659 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 660 return; 661 662 p->crtc_hdisplay = p->hdisplay; 663 p->crtc_hsync_start = p->hsync_start; 664 p->crtc_hsync_end = p->hsync_end; 665 p->crtc_htotal = p->htotal; 666 p->crtc_hskew = p->hskew; 667 p->crtc_vdisplay = p->vdisplay; 668 p->crtc_vsync_start = p->vsync_start; 669 p->crtc_vsync_end = p->vsync_end; 670 p->crtc_vtotal = p->vtotal; 671 672 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 673 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 674 p->crtc_vdisplay /= 2; 675 p->crtc_vsync_start /= 2; 676 p->crtc_vsync_end /= 2; 677 p->crtc_vtotal /= 2; 678 } 679 680 p->crtc_vtotal |= 1; 681 } 682 683 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 684 p->crtc_vdisplay *= 2; 685 p->crtc_vsync_start *= 2; 686 p->crtc_vsync_end *= 2; 687 p->crtc_vtotal *= 2; 688 } 689 690 if (p->vscan > 1) { 691 p->crtc_vdisplay *= p->vscan; 692 p->crtc_vsync_start *= p->vscan; 693 p->crtc_vsync_end *= p->vscan; 694 p->crtc_vtotal *= p->vscan; 695 } 696 697 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 698 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 699 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 700 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 701 702 p->crtc_hadjusted = false; 703 p->crtc_vadjusted = false; 704 } 705 706 707 /** 708 * drm_mode_duplicate - allocate and duplicate an existing mode 709 * @m: mode to duplicate 710 * 711 * LOCKING: 712 * None. 713 * 714 * Just allocate a new mode, copy the existing mode into it, and return 715 * a pointer to it. Used to create new instances of established modes. 716 */ 717 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 718 const struct drm_display_mode *mode) 719 { 720 struct drm_display_mode *nmode; 721 int new_id; 722 723 nmode = drm_mode_create(dev); 724 if (!nmode) 725 return NULL; 726 727 new_id = nmode->base.id; 728 *nmode = *mode; 729 nmode->base.id = new_id; 730 INIT_LIST_HEAD(&nmode->head); 731 return nmode; 732 } 733 734 /** 735 * drm_mode_equal - test modes for equality 736 * @mode1: first mode 737 * @mode2: second mode 738 * 739 * LOCKING: 740 * None. 741 * 742 * Check to see if @mode1 and @mode2 are equivalent. 743 * 744 * RETURNS: 745 * true if the modes are equal, false otherwise. 746 */ 747 bool drm_mode_equal(struct drm_display_mode *mode1, struct drm_display_mode *mode2) 748 { 749 /* do clock check convert to PICOS so fb modes get matched 750 * the same */ 751 if (mode1->clock && mode2->clock) { 752 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 753 return false; 754 } else if (mode1->clock != mode2->clock) 755 return false; 756 757 if (mode1->hdisplay == mode2->hdisplay && 758 mode1->hsync_start == mode2->hsync_start && 759 mode1->hsync_end == mode2->hsync_end && 760 mode1->htotal == mode2->htotal && 761 mode1->hskew == mode2->hskew && 762 mode1->vdisplay == mode2->vdisplay && 763 mode1->vsync_start == mode2->vsync_start && 764 mode1->vsync_end == mode2->vsync_end && 765 mode1->vtotal == mode2->vtotal && 766 mode1->vscan == mode2->vscan && 767 mode1->flags == mode2->flags) 768 return true; 769 770 return false; 771 } 772 773 /** 774 * drm_mode_validate_size - make sure modes adhere to size constraints 775 * @dev: DRM device 776 * @mode_list: list of modes to check 777 * @maxX: maximum width 778 * @maxY: maximum height 779 * @maxPitch: max pitch 780 * 781 * LOCKING: 782 * Caller must hold a lock protecting @mode_list. 783 * 784 * The DRM device (@dev) has size and pitch limits. Here we validate the 785 * modes we probed for @dev against those limits and set their status as 786 * necessary. 787 */ 788 void drm_mode_validate_size(struct drm_device *dev, 789 struct list_head *mode_list, 790 int maxX, int maxY, int maxPitch) 791 { 792 struct drm_display_mode *mode; 793 794 list_for_each_entry(mode, mode_list, head) { 795 if (maxPitch > 0 && mode->hdisplay > maxPitch) 796 mode->status = MODE_BAD_WIDTH; 797 798 if (maxX > 0 && mode->hdisplay > maxX) 799 mode->status = MODE_VIRTUAL_X; 800 801 if (maxY > 0 && mode->vdisplay > maxY) 802 mode->status = MODE_VIRTUAL_Y; 803 } 804 } 805 806 /** 807 * drm_mode_validate_clocks - validate modes against clock limits 808 * @dev: DRM device 809 * @mode_list: list of modes to check 810 * @min: minimum clock rate array 811 * @max: maximum clock rate array 812 * @n_ranges: number of clock ranges (size of arrays) 813 * 814 * LOCKING: 815 * Caller must hold a lock protecting @mode_list. 816 * 817 * Some code may need to check a mode list against the clock limits of the 818 * device in question. This function walks the mode list, testing to make 819 * sure each mode falls within a given range (defined by @min and @max 820 * arrays) and sets @mode->status as needed. 821 */ 822 void drm_mode_validate_clocks(struct drm_device *dev, 823 struct list_head *mode_list, 824 int *min, int *max, int n_ranges) 825 { 826 struct drm_display_mode *mode; 827 int i; 828 829 list_for_each_entry(mode, mode_list, head) { 830 bool good = false; 831 for (i = 0; i < n_ranges; i++) { 832 if (mode->clock >= min[i] && mode->clock <= max[i]) { 833 good = true; 834 break; 835 } 836 } 837 if (!good) 838 mode->status = MODE_CLOCK_RANGE; 839 } 840 } 841 842 /** 843 * drm_mode_prune_invalid - remove invalid modes from mode list 844 * @dev: DRM device 845 * @mode_list: list of modes to check 846 * @verbose: be verbose about it 847 * 848 * LOCKING: 849 * Caller must hold a lock protecting @mode_list. 850 * 851 * Once mode list generation is complete, a caller can use this routine to 852 * remove invalid modes from a mode list. If any of the modes have a 853 * status other than %MODE_OK, they are removed from @mode_list and freed. 854 */ 855 void drm_mode_prune_invalid(struct drm_device *dev, 856 struct list_head *mode_list, bool verbose) 857 { 858 struct drm_display_mode *mode, *t; 859 860 list_for_each_entry_safe(mode, t, mode_list, head) { 861 if (mode->status != MODE_OK) { 862 list_del(&mode->head); 863 if (verbose) { 864 drm_mode_debug_printmodeline(mode); 865 DRM_DEBUG_KMS("Not using %s mode %d\n", 866 mode->name, mode->status); 867 } 868 drm_mode_destroy(dev, mode); 869 } 870 } 871 } 872 873 /** 874 * drm_mode_compare - compare modes for favorability 875 * @priv: unused 876 * @lh_a: list_head for first mode 877 * @lh_b: list_head for second mode 878 * 879 * LOCKING: 880 * None. 881 * 882 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 883 * which is better. 884 * 885 * RETURNS: 886 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 887 * positive if @lh_b is better than @lh_a. 888 */ 889 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 890 { 891 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 892 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 893 int diff; 894 895 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 896 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 897 if (diff) 898 return diff; 899 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 900 if (diff) 901 return diff; 902 diff = b->clock - a->clock; 903 return diff; 904 } 905 906 /** 907 * drm_mode_sort - sort mode list 908 * @mode_list: list to sort 909 * 910 * LOCKING: 911 * Caller must hold a lock protecting @mode_list. 912 * 913 * Sort @mode_list by favorability, putting good modes first. 914 */ 915 void drm_mode_sort(struct list_head *mode_list) 916 { 917 drm_list_sort(NULL, mode_list, drm_mode_compare); 918 } 919 920 /** 921 * drm_mode_connector_list_update - update the mode list for the connector 922 * @connector: the connector to update 923 * 924 * LOCKING: 925 * Caller must hold a lock protecting @mode_list. 926 * 927 * This moves the modes from the @connector probed_modes list 928 * to the actual mode list. It compares the probed mode against the current 929 * list and only adds different modes. All modes unverified after this point 930 * will be removed by the prune invalid modes. 931 */ 932 void drm_mode_connector_list_update(struct drm_connector *connector) 933 { 934 struct drm_display_mode *mode; 935 struct drm_display_mode *pmode, *pt; 936 int found_it; 937 938 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 939 head) { 940 found_it = 0; 941 /* go through current modes checking for the new probed mode */ 942 list_for_each_entry(mode, &connector->modes, head) { 943 if (drm_mode_equal(pmode, mode)) { 944 found_it = 1; 945 /* if equal delete the probed mode */ 946 mode->status = pmode->status; 947 /* Merge type bits together */ 948 mode->type |= pmode->type; 949 list_del(&pmode->head); 950 drm_mode_destroy(connector->dev, pmode); 951 break; 952 } 953 } 954 955 if (!found_it) { 956 list_move_tail(&pmode->head, &connector->modes); 957 } 958 } 959 } 960 961 /** 962 * drm_mode_parse_command_line_for_connector - parse command line for connector 963 * @mode_option - per connector mode option 964 * @connector - connector to parse line for 965 * 966 * This parses the connector specific then generic command lines for 967 * modes and options to configure the connector. 968 * 969 * This uses the same parameters as the fb modedb.c, except for extra 970 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 971 * 972 * enable/enable Digital/disable bit at the end 973 */ 974 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 975 struct drm_connector *connector, 976 struct drm_cmdline_mode *mode) 977 { 978 const char *name; 979 unsigned int namelen; 980 bool res_specified = false, bpp_specified = false, refresh_specified = false; 981 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 982 bool yres_specified = false, cvt = false, rb = false; 983 bool interlace = false, margins = false, was_digit = false; 984 int i; 985 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 986 987 #ifdef XXX_CONFIG_FB 988 if (!mode_option) 989 mode_option = fb_mode_option; 990 #endif 991 992 if (!mode_option) { 993 mode->specified = false; 994 return false; 995 } 996 997 name = mode_option; 998 namelen = strlen(name); 999 for (i = namelen-1; i >= 0; i--) { 1000 switch (name[i]) { 1001 case '@': 1002 if (!refresh_specified && !bpp_specified && 1003 !yres_specified && !cvt && !rb && was_digit) { 1004 refresh = strtol(&name[i+1], NULL, 10); 1005 refresh_specified = true; 1006 was_digit = false; 1007 } else 1008 goto done; 1009 break; 1010 case '-': 1011 if (!bpp_specified && !yres_specified && !cvt && 1012 !rb && was_digit) { 1013 bpp = strtol(&name[i+1], NULL, 10); 1014 bpp_specified = true; 1015 was_digit = false; 1016 } else 1017 goto done; 1018 break; 1019 case 'x': 1020 if (!yres_specified && was_digit) { 1021 yres = strtol(&name[i+1], NULL, 10); 1022 yres_specified = true; 1023 was_digit = false; 1024 } else 1025 goto done; 1026 case '0' ... '9': 1027 was_digit = true; 1028 break; 1029 case 'M': 1030 if (yres_specified || cvt || was_digit) 1031 goto done; 1032 cvt = true; 1033 break; 1034 case 'R': 1035 if (yres_specified || cvt || rb || was_digit) 1036 goto done; 1037 rb = true; 1038 break; 1039 case 'm': 1040 if (cvt || yres_specified || was_digit) 1041 goto done; 1042 margins = true; 1043 break; 1044 case 'i': 1045 if (cvt || yres_specified || was_digit) 1046 goto done; 1047 interlace = true; 1048 break; 1049 case 'e': 1050 if (yres_specified || bpp_specified || refresh_specified || 1051 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1052 goto done; 1053 1054 force = DRM_FORCE_ON; 1055 break; 1056 case 'D': 1057 if (yres_specified || bpp_specified || refresh_specified || 1058 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1059 goto done; 1060 1061 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1062 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1063 force = DRM_FORCE_ON; 1064 else 1065 force = DRM_FORCE_ON_DIGITAL; 1066 break; 1067 case 'd': 1068 if (yres_specified || bpp_specified || refresh_specified || 1069 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1070 goto done; 1071 1072 force = DRM_FORCE_OFF; 1073 break; 1074 default: 1075 goto done; 1076 } 1077 } 1078 1079 if (i < 0 && yres_specified) { 1080 char *ch; 1081 xres = strtol(name, &ch, 10); 1082 if ((ch != NULL) && (*ch == 'x')) 1083 res_specified = true; 1084 else 1085 i = ch - name; 1086 } else if (!yres_specified && was_digit) { 1087 /* catch mode that begins with digits but has no 'x' */ 1088 i = 0; 1089 } 1090 done: 1091 if (i >= 0) { 1092 kprintf("parse error at position %i in video mode '%s'\n", 1093 i, name); 1094 mode->specified = false; 1095 return false; 1096 } 1097 1098 if (res_specified) { 1099 mode->specified = true; 1100 mode->xres = xres; 1101 mode->yres = yres; 1102 } 1103 1104 if (refresh_specified) { 1105 mode->refresh_specified = true; 1106 mode->refresh = refresh; 1107 } 1108 1109 if (bpp_specified) { 1110 mode->bpp_specified = true; 1111 mode->bpp = bpp; 1112 } 1113 mode->rb = rb; 1114 mode->cvt = cvt; 1115 mode->interlace = interlace; 1116 mode->margins = margins; 1117 mode->force = force; 1118 1119 return true; 1120 } 1121 1122 struct drm_display_mode * 1123 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1124 struct drm_cmdline_mode *cmd) 1125 { 1126 struct drm_display_mode *mode; 1127 1128 if (cmd->cvt) 1129 mode = drm_cvt_mode(dev, 1130 cmd->xres, cmd->yres, 1131 cmd->refresh_specified ? cmd->refresh : 60, 1132 cmd->rb, cmd->interlace, 1133 cmd->margins); 1134 else 1135 mode = drm_gtf_mode(dev, 1136 cmd->xres, cmd->yres, 1137 cmd->refresh_specified ? cmd->refresh : 60, 1138 cmd->interlace, 1139 cmd->margins); 1140 if (!mode) 1141 return NULL; 1142 1143 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1144 return mode; 1145 } 1146