1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <linux/list.h> 34 #include <linux/list_sort.h> 35 #include <linux/export.h> 36 #include <drm/drmP.h> 37 #include <drm/drm_crtc.h> 38 #include <video/videomode.h> 39 #include <drm/drm_modes.h> 40 41 #include "drm_crtc_internal.h" 42 43 /** 44 * drm_mode_debug_printmodeline - print a mode to dmesg 45 * @mode: mode to print 46 * 47 * Describe @mode using DRM_DEBUG. 48 */ 49 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 50 { 51 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 52 "0x%x 0x%x\n", 53 mode->base.id, mode->name, mode->vrefresh, mode->clock, 54 mode->hdisplay, mode->hsync_start, 55 mode->hsync_end, mode->htotal, 56 mode->vdisplay, mode->vsync_start, 57 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 58 } 59 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 60 61 /** 62 * drm_mode_create - create a new display mode 63 * @dev: DRM device 64 * 65 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it 66 * and return it. 67 * 68 * Returns: 69 * Pointer to new mode on success, NULL on error. 70 */ 71 struct drm_display_mode *drm_mode_create(struct drm_device *dev) 72 { 73 struct drm_display_mode *nmode; 74 75 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL); 76 if (!nmode) 77 return NULL; 78 79 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) { 80 kfree(nmode); 81 return NULL; 82 } 83 84 return nmode; 85 } 86 EXPORT_SYMBOL(drm_mode_create); 87 88 /** 89 * drm_mode_destroy - remove a mode 90 * @dev: DRM device 91 * @mode: mode to remove 92 * 93 * Release @mode's unique ID, then free it @mode structure itself using kfree. 94 */ 95 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode) 96 { 97 if (!mode) 98 return; 99 100 drm_mode_object_put(dev, &mode->base); 101 102 kfree(mode); 103 } 104 EXPORT_SYMBOL(drm_mode_destroy); 105 106 /** 107 * drm_mode_probed_add - add a mode to a connector's probed_mode list 108 * @connector: connector the new mode 109 * @mode: mode data 110 * 111 * Add @mode to @connector's probed_mode list for later use. This list should 112 * then in a second step get filtered and all the modes actually supported by 113 * the hardware moved to the @connector's modes list. 114 */ 115 void drm_mode_probed_add(struct drm_connector *connector, 116 struct drm_display_mode *mode) 117 { 118 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); 119 120 list_add_tail(&mode->head, &connector->probed_modes); 121 } 122 EXPORT_SYMBOL(drm_mode_probed_add); 123 124 /** 125 * drm_cvt_mode -create a modeline based on the CVT algorithm 126 * @dev: drm device 127 * @hdisplay: hdisplay size 128 * @vdisplay: vdisplay size 129 * @vrefresh: vrefresh rate 130 * @reduced: whether to use reduced blanking 131 * @interlaced: whether to compute an interlaced mode 132 * @margins: whether to add margins (borders) 133 * 134 * This function is called to generate the modeline based on CVT algorithm 135 * according to the hdisplay, vdisplay, vrefresh. 136 * It is based from the VESA(TM) Coordinated Video Timing Generator by 137 * Graham Loveridge April 9, 2003 available at 138 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 139 * 140 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 141 * What I have done is to translate it by using integer calculation. 142 * 143 * Returns: 144 * The modeline based on the CVT algorithm stored in a drm_display_mode object. 145 * The display mode object is allocated with drm_mode_create(). Returns NULL 146 * when no mode could be allocated. 147 */ 148 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 149 int vdisplay, int vrefresh, 150 bool reduced, bool interlaced, bool margins) 151 { 152 #define HV_FACTOR 1000 153 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 154 #define CVT_MARGIN_PERCENTAGE 18 155 /* 2) character cell horizontal granularity (pixels) - default 8 */ 156 #define CVT_H_GRANULARITY 8 157 /* 3) Minimum vertical porch (lines) - default 3 */ 158 #define CVT_MIN_V_PORCH 3 159 /* 4) Minimum number of vertical back porch lines - default 6 */ 160 #define CVT_MIN_V_BPORCH 6 161 /* Pixel Clock step (kHz) */ 162 #define CVT_CLOCK_STEP 250 163 struct drm_display_mode *drm_mode; 164 unsigned int vfieldrate, hperiod; 165 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 166 int interlace; 167 168 /* allocate the drm_display_mode structure. If failure, we will 169 * return directly 170 */ 171 drm_mode = drm_mode_create(dev); 172 if (!drm_mode) 173 return NULL; 174 175 /* the CVT default refresh rate is 60Hz */ 176 if (!vrefresh) 177 vrefresh = 60; 178 179 /* the required field fresh rate */ 180 if (interlaced) 181 vfieldrate = vrefresh * 2; 182 else 183 vfieldrate = vrefresh; 184 185 /* horizontal pixels */ 186 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 187 188 /* determine the left&right borders */ 189 hmargin = 0; 190 if (margins) { 191 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 192 hmargin -= hmargin % CVT_H_GRANULARITY; 193 } 194 /* find the total active pixels */ 195 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 196 197 /* find the number of lines per field */ 198 if (interlaced) 199 vdisplay_rnd = vdisplay / 2; 200 else 201 vdisplay_rnd = vdisplay; 202 203 /* find the top & bottom borders */ 204 vmargin = 0; 205 if (margins) 206 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 207 208 drm_mode->vdisplay = vdisplay + 2 * vmargin; 209 210 /* Interlaced */ 211 if (interlaced) 212 interlace = 1; 213 else 214 interlace = 0; 215 216 /* Determine VSync Width from aspect ratio */ 217 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 218 vsync = 4; 219 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 220 vsync = 5; 221 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 222 vsync = 6; 223 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 224 vsync = 7; 225 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 226 vsync = 7; 227 else /* custom */ 228 vsync = 10; 229 230 if (!reduced) { 231 /* simplify the GTF calculation */ 232 /* 4) Minimum time of vertical sync + back porch interval (µs) 233 * default 550.0 234 */ 235 int tmp1, tmp2; 236 #define CVT_MIN_VSYNC_BP 550 237 /* 3) Nominal HSync width (% of line period) - default 8 */ 238 #define CVT_HSYNC_PERCENTAGE 8 239 unsigned int hblank_percentage; 240 int vsyncandback_porch, vback_porch, hblank; 241 242 /* estimated the horizontal period */ 243 tmp1 = HV_FACTOR * 1000000 - 244 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 245 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 246 interlace; 247 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 248 249 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 250 /* 9. Find number of lines in sync + backporch */ 251 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 252 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 253 else 254 vsyncandback_porch = tmp1; 255 /* 10. Find number of lines in back porch */ 256 vback_porch = vsyncandback_porch - vsync; 257 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 258 vsyncandback_porch + CVT_MIN_V_PORCH; 259 /* 5) Definition of Horizontal blanking time limitation */ 260 /* Gradient (%/kHz) - default 600 */ 261 #define CVT_M_FACTOR 600 262 /* Offset (%) - default 40 */ 263 #define CVT_C_FACTOR 40 264 /* Blanking time scaling factor - default 128 */ 265 #define CVT_K_FACTOR 128 266 /* Scaling factor weighting - default 20 */ 267 #define CVT_J_FACTOR 20 268 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 269 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 270 CVT_J_FACTOR) 271 /* 12. Find ideal blanking duty cycle from formula */ 272 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 273 hperiod / 1000; 274 /* 13. Blanking time */ 275 if (hblank_percentage < 20 * HV_FACTOR) 276 hblank_percentage = 20 * HV_FACTOR; 277 hblank = drm_mode->hdisplay * hblank_percentage / 278 (100 * HV_FACTOR - hblank_percentage); 279 hblank -= hblank % (2 * CVT_H_GRANULARITY); 280 /* 14. find the total pixes per line */ 281 drm_mode->htotal = drm_mode->hdisplay + hblank; 282 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 283 drm_mode->hsync_start = drm_mode->hsync_end - 284 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 285 drm_mode->hsync_start += CVT_H_GRANULARITY - 286 drm_mode->hsync_start % CVT_H_GRANULARITY; 287 /* fill the Vsync values */ 288 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 289 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 290 } else { 291 /* Reduced blanking */ 292 /* Minimum vertical blanking interval time (µs)- default 460 */ 293 #define CVT_RB_MIN_VBLANK 460 294 /* Fixed number of clocks for horizontal sync */ 295 #define CVT_RB_H_SYNC 32 296 /* Fixed number of clocks for horizontal blanking */ 297 #define CVT_RB_H_BLANK 160 298 /* Fixed number of lines for vertical front porch - default 3*/ 299 #define CVT_RB_VFPORCH 3 300 int vbilines; 301 int tmp1, tmp2; 302 /* 8. Estimate Horizontal period. */ 303 tmp1 = HV_FACTOR * 1000000 - 304 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 305 tmp2 = vdisplay_rnd + 2 * vmargin; 306 hperiod = tmp1 / (tmp2 * vfieldrate); 307 /* 9. Find number of lines in vertical blanking */ 308 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 309 /* 10. Check if vertical blanking is sufficient */ 310 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 311 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 312 /* 11. Find total number of lines in vertical field */ 313 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 314 /* 12. Find total number of pixels in a line */ 315 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 316 /* Fill in HSync values */ 317 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 318 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 319 /* Fill in VSync values */ 320 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 321 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 322 } 323 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 324 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 325 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 326 /* 18/16. Find actual vertical frame frequency */ 327 /* ignore - just set the mode flag for interlaced */ 328 if (interlaced) { 329 drm_mode->vtotal *= 2; 330 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 331 } 332 /* Fill the mode line name */ 333 drm_mode_set_name(drm_mode); 334 if (reduced) 335 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 336 DRM_MODE_FLAG_NVSYNC); 337 else 338 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 339 DRM_MODE_FLAG_NHSYNC); 340 341 return drm_mode; 342 } 343 EXPORT_SYMBOL(drm_cvt_mode); 344 345 /** 346 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm 347 * @dev: drm device 348 * @hdisplay: hdisplay size 349 * @vdisplay: vdisplay size 350 * @vrefresh: vrefresh rate. 351 * @interlaced: whether to compute an interlaced mode 352 * @margins: desired margin (borders) size 353 * @GTF_M: extended GTF formula parameters 354 * @GTF_2C: extended GTF formula parameters 355 * @GTF_K: extended GTF formula parameters 356 * @GTF_2J: extended GTF formula parameters 357 * 358 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 359 * in here multiplied by two. For a C of 40, pass in 80. 360 * 361 * Returns: 362 * The modeline based on the full GTF algorithm stored in a drm_display_mode object. 363 * The display mode object is allocated with drm_mode_create(). Returns NULL 364 * when no mode could be allocated. 365 */ 366 struct drm_display_mode * 367 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 368 int vrefresh, bool interlaced, int margins, 369 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 370 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 371 #define GTF_MARGIN_PERCENTAGE 18 372 /* 2) character cell horizontal granularity (pixels) - default 8 */ 373 #define GTF_CELL_GRAN 8 374 /* 3) Minimum vertical porch (lines) - default 3 */ 375 #define GTF_MIN_V_PORCH 1 376 /* width of vsync in lines */ 377 #define V_SYNC_RQD 3 378 /* width of hsync as % of total line */ 379 #define H_SYNC_PERCENT 8 380 /* min time of vsync + back porch (microsec) */ 381 #define MIN_VSYNC_PLUS_BP 550 382 /* C' and M' are part of the Blanking Duty Cycle computation */ 383 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 384 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 385 struct drm_display_mode *drm_mode; 386 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 387 int top_margin, bottom_margin; 388 int interlace; 389 unsigned int hfreq_est; 390 int vsync_plus_bp, vback_porch; 391 unsigned int vtotal_lines, vfieldrate_est, hperiod; 392 unsigned int vfield_rate, vframe_rate; 393 int left_margin, right_margin; 394 unsigned int total_active_pixels, ideal_duty_cycle; 395 unsigned int hblank, total_pixels, pixel_freq; 396 int hsync, hfront_porch, vodd_front_porch_lines; 397 unsigned int tmp1, tmp2; 398 399 drm_mode = drm_mode_create(dev); 400 if (!drm_mode) 401 return NULL; 402 403 /* 1. In order to give correct results, the number of horizontal 404 * pixels requested is first processed to ensure that it is divisible 405 * by the character size, by rounding it to the nearest character 406 * cell boundary: 407 */ 408 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 409 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 410 411 /* 2. If interlace is requested, the number of vertical lines assumed 412 * by the calculation must be halved, as the computation calculates 413 * the number of vertical lines per field. 414 */ 415 if (interlaced) 416 vdisplay_rnd = vdisplay / 2; 417 else 418 vdisplay_rnd = vdisplay; 419 420 /* 3. Find the frame rate required: */ 421 if (interlaced) 422 vfieldrate_rqd = vrefresh * 2; 423 else 424 vfieldrate_rqd = vrefresh; 425 426 /* 4. Find number of lines in Top margin: */ 427 top_margin = 0; 428 if (margins) 429 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 430 1000; 431 /* 5. Find number of lines in bottom margin: */ 432 bottom_margin = top_margin; 433 434 /* 6. If interlace is required, then set variable interlace: */ 435 if (interlaced) 436 interlace = 1; 437 else 438 interlace = 0; 439 440 /* 7. Estimate the Horizontal frequency */ 441 { 442 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 443 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 444 2 + interlace; 445 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 446 } 447 448 /* 8. Find the number of lines in V sync + back porch */ 449 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 450 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 451 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 452 /* 9. Find the number of lines in V back porch alone: */ 453 vback_porch = vsync_plus_bp - V_SYNC_RQD; 454 /* 10. Find the total number of lines in Vertical field period: */ 455 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 456 vsync_plus_bp + GTF_MIN_V_PORCH; 457 /* 11. Estimate the Vertical field frequency: */ 458 vfieldrate_est = hfreq_est / vtotal_lines; 459 /* 12. Find the actual horizontal period: */ 460 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 461 462 /* 13. Find the actual Vertical field frequency: */ 463 vfield_rate = hfreq_est / vtotal_lines; 464 /* 14. Find the Vertical frame frequency: */ 465 if (interlaced) 466 vframe_rate = vfield_rate / 2; 467 else 468 vframe_rate = vfield_rate; 469 /* 15. Find number of pixels in left margin: */ 470 if (margins) 471 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 472 1000; 473 else 474 left_margin = 0; 475 476 /* 16.Find number of pixels in right margin: */ 477 right_margin = left_margin; 478 /* 17.Find total number of active pixels in image and left and right */ 479 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 480 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 481 ideal_duty_cycle = GTF_C_PRIME * 1000 - 482 (GTF_M_PRIME * 1000000 / hfreq_est); 483 /* 19.Find the number of pixels in the blanking time to the nearest 484 * double character cell: */ 485 hblank = total_active_pixels * ideal_duty_cycle / 486 (100000 - ideal_duty_cycle); 487 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 488 hblank = hblank * 2 * GTF_CELL_GRAN; 489 /* 20.Find total number of pixels: */ 490 total_pixels = total_active_pixels + hblank; 491 /* 21.Find pixel clock frequency: */ 492 pixel_freq = total_pixels * hfreq_est / 1000; 493 /* Stage 1 computations are now complete; I should really pass 494 * the results to another function and do the Stage 2 computations, 495 * but I only need a few more values so I'll just append the 496 * computations here for now */ 497 /* 17. Find the number of pixels in the horizontal sync period: */ 498 hsync = H_SYNC_PERCENT * total_pixels / 100; 499 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 500 hsync = hsync * GTF_CELL_GRAN; 501 /* 18. Find the number of pixels in horizontal front porch period */ 502 hfront_porch = hblank / 2 - hsync; 503 /* 36. Find the number of lines in the odd front porch period: */ 504 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 505 506 /* finally, pack the results in the mode struct */ 507 drm_mode->hdisplay = hdisplay_rnd; 508 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 509 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 510 drm_mode->htotal = total_pixels; 511 drm_mode->vdisplay = vdisplay_rnd; 512 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 513 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 514 drm_mode->vtotal = vtotal_lines; 515 516 drm_mode->clock = pixel_freq; 517 518 if (interlaced) { 519 drm_mode->vtotal *= 2; 520 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 521 } 522 523 drm_mode_set_name(drm_mode); 524 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 525 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 526 else 527 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 528 529 return drm_mode; 530 } 531 EXPORT_SYMBOL(drm_gtf_mode_complex); 532 533 /** 534 * drm_gtf_mode - create the modeline based on the GTF algorithm 535 * @dev: drm device 536 * @hdisplay: hdisplay size 537 * @vdisplay: vdisplay size 538 * @vrefresh: vrefresh rate. 539 * @interlaced: whether to compute an interlaced mode 540 * @margins: desired margin (borders) size 541 * 542 * return the modeline based on GTF algorithm 543 * 544 * This function is to create the modeline based on the GTF algorithm. 545 * Generalized Timing Formula is derived from: 546 * GTF Spreadsheet by Andy Morrish (1/5/97) 547 * available at http://www.vesa.org 548 * 549 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 550 * What I have done is to translate it by using integer calculation. 551 * I also refer to the function of fb_get_mode in the file of 552 * drivers/video/fbmon.c 553 * 554 * Standard GTF parameters: 555 * M = 600 556 * C = 40 557 * K = 128 558 * J = 20 559 * 560 * Returns: 561 * The modeline based on the GTF algorithm stored in a drm_display_mode object. 562 * The display mode object is allocated with drm_mode_create(). Returns NULL 563 * when no mode could be allocated. 564 */ 565 struct drm_display_mode * 566 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 567 bool interlaced, int margins) 568 { 569 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, 570 interlaced, margins, 571 600, 40 * 2, 128, 20 * 2); 572 } 573 EXPORT_SYMBOL(drm_gtf_mode); 574 575 #ifdef CONFIG_VIDEOMODE_HELPERS 576 /** 577 * drm_display_mode_from_videomode - fill in @dmode using @vm, 578 * @vm: videomode structure to use as source 579 * @dmode: drm_display_mode structure to use as destination 580 * 581 * Fills out @dmode using the display mode specified in @vm. 582 */ 583 void drm_display_mode_from_videomode(const struct videomode *vm, 584 struct drm_display_mode *dmode) 585 { 586 dmode->hdisplay = vm->hactive; 587 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; 588 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; 589 dmode->htotal = dmode->hsync_end + vm->hback_porch; 590 591 dmode->vdisplay = vm->vactive; 592 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; 593 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; 594 dmode->vtotal = dmode->vsync_end + vm->vback_porch; 595 596 dmode->clock = vm->pixelclock / 1000; 597 598 dmode->flags = 0; 599 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) 600 dmode->flags |= DRM_MODE_FLAG_PHSYNC; 601 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) 602 dmode->flags |= DRM_MODE_FLAG_NHSYNC; 603 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) 604 dmode->flags |= DRM_MODE_FLAG_PVSYNC; 605 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) 606 dmode->flags |= DRM_MODE_FLAG_NVSYNC; 607 if (vm->flags & DISPLAY_FLAGS_INTERLACED) 608 dmode->flags |= DRM_MODE_FLAG_INTERLACE; 609 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) 610 dmode->flags |= DRM_MODE_FLAG_DBLSCAN; 611 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 612 dmode->flags |= DRM_MODE_FLAG_DBLCLK; 613 drm_mode_set_name(dmode); 614 } 615 616 /** 617 * drm_display_mode_to_videomode - fill in @vm using @dmode, 618 * @dmode: drm_display_mode structure to use as source 619 * @vm: videomode structure to use as destination 620 * 621 * Fills out @vm using the display mode specified in @dmode. 622 */ 623 void drm_display_mode_to_videomode(const struct drm_display_mode *dmode, 624 struct videomode *vm) 625 { 626 vm->hactive = dmode->hdisplay; 627 vm->hfront_porch = dmode->hsync_start - dmode->hdisplay; 628 vm->hsync_len = dmode->hsync_end - dmode->hsync_start; 629 vm->hback_porch = dmode->htotal - dmode->hsync_end; 630 631 vm->vactive = dmode->vdisplay; 632 vm->vfront_porch = dmode->vsync_start - dmode->vdisplay; 633 vm->vsync_len = dmode->vsync_end - dmode->vsync_start; 634 vm->vback_porch = dmode->vtotal - dmode->vsync_end; 635 636 vm->pixelclock = dmode->clock * 1000; 637 638 vm->flags = 0; 639 if (dmode->flags & DRM_MODE_FLAG_PHSYNC) 640 vm->flags |= DISPLAY_FLAGS_HSYNC_HIGH; 641 else if (dmode->flags & DRM_MODE_FLAG_NHSYNC) 642 vm->flags |= DISPLAY_FLAGS_HSYNC_LOW; 643 if (dmode->flags & DRM_MODE_FLAG_PVSYNC) 644 vm->flags |= DISPLAY_FLAGS_VSYNC_HIGH; 645 else if (dmode->flags & DRM_MODE_FLAG_NVSYNC) 646 vm->flags |= DISPLAY_FLAGS_VSYNC_LOW; 647 if (dmode->flags & DRM_MODE_FLAG_INTERLACE) 648 vm->flags |= DISPLAY_FLAGS_INTERLACED; 649 if (dmode->flags & DRM_MODE_FLAG_DBLSCAN) 650 vm->flags |= DISPLAY_FLAGS_DOUBLESCAN; 651 if (dmode->flags & DRM_MODE_FLAG_DBLCLK) 652 vm->flags |= DISPLAY_FLAGS_DOUBLECLK; 653 } 654 655 #ifdef CONFIG_OF 656 /** 657 * of_get_drm_display_mode - get a drm_display_mode from devicetree 658 * @np: device_node with the timing specification 659 * @dmode: will be set to the return value 660 * @index: index into the list of display timings in devicetree 661 * 662 * This function is expensive and should only be used, if only one mode is to be 663 * read from DT. To get multiple modes start with of_get_display_timings and 664 * work with that instead. 665 * 666 * Returns: 667 * 0 on success, a negative errno code when no of videomode node was found. 668 */ 669 int of_get_drm_display_mode(struct device_node *np, 670 struct drm_display_mode *dmode, int index) 671 { 672 struct videomode vm; 673 int ret; 674 675 ret = of_get_videomode(np, &vm, index); 676 if (ret) 677 return ret; 678 679 drm_display_mode_from_videomode(&vm, dmode); 680 681 pr_debug("%s: got %dx%d display mode from %s\n", 682 of_node_full_name(np), vm.hactive, vm.vactive, np->name); 683 drm_mode_debug_printmodeline(dmode); 684 685 return 0; 686 } 687 #endif /* CONFIG_OF */ 688 #endif /* CONFIG_VIDEOMODE_HELPERS */ 689 690 /** 691 * drm_mode_set_name - set the name on a mode 692 * @mode: name will be set in this mode 693 * 694 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay> 695 * with an optional 'i' suffix for interlaced modes. 696 */ 697 void drm_mode_set_name(struct drm_display_mode *mode) 698 { 699 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 700 701 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 702 mode->hdisplay, mode->vdisplay, 703 interlaced ? "i" : ""); 704 } 705 EXPORT_SYMBOL(drm_mode_set_name); 706 707 /** drm_mode_hsync - get the hsync of a mode 708 * @mode: mode 709 * 710 * Returns: 711 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the 712 * value first if it is not yet set. 713 */ 714 int drm_mode_hsync(const struct drm_display_mode *mode) 715 { 716 unsigned int calc_val; 717 718 if (mode->hsync) 719 return mode->hsync; 720 721 if (mode->htotal < 0) 722 return 0; 723 724 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 725 calc_val += 500; /* round to 1000Hz */ 726 calc_val /= 1000; /* truncate to kHz */ 727 728 return calc_val; 729 } 730 EXPORT_SYMBOL(drm_mode_hsync); 731 732 /** 733 * drm_mode_vrefresh - get the vrefresh of a mode 734 * @mode: mode 735 * 736 * Returns: 737 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the 738 * value first if it is not yet set. 739 */ 740 int drm_mode_vrefresh(const struct drm_display_mode *mode) 741 { 742 int refresh = 0; 743 unsigned int calc_val; 744 745 if (mode->vrefresh > 0) 746 refresh = mode->vrefresh; 747 else if (mode->htotal > 0 && mode->vtotal > 0) { 748 int vtotal; 749 vtotal = mode->vtotal; 750 /* work out vrefresh the value will be x1000 */ 751 calc_val = (mode->clock * 1000); 752 calc_val /= mode->htotal; 753 refresh = (calc_val + vtotal / 2) / vtotal; 754 755 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 756 refresh *= 2; 757 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 758 refresh /= 2; 759 if (mode->vscan > 1) 760 refresh /= mode->vscan; 761 } 762 return refresh; 763 } 764 EXPORT_SYMBOL(drm_mode_vrefresh); 765 766 /** 767 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 768 * @p: mode 769 * @adjust_flags: a combination of adjustment flags 770 * 771 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 772 * 773 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 774 * interlaced modes. 775 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 776 * buffers containing two eyes (only adjust the timings when needed, eg. for 777 * "frame packing" or "side by side full"). 778 * - The CRTC_NO_DBLSCAN and CRTC_NO_VSCAN flags request that adjustment *not* 779 * be performed for doublescan and vscan > 1 modes respectively. 780 */ 781 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 782 { 783 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 784 return; 785 786 p->crtc_clock = p->clock; 787 p->crtc_hdisplay = p->hdisplay; 788 p->crtc_hsync_start = p->hsync_start; 789 p->crtc_hsync_end = p->hsync_end; 790 p->crtc_htotal = p->htotal; 791 p->crtc_hskew = p->hskew; 792 p->crtc_vdisplay = p->vdisplay; 793 p->crtc_vsync_start = p->vsync_start; 794 p->crtc_vsync_end = p->vsync_end; 795 p->crtc_vtotal = p->vtotal; 796 797 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 798 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 799 p->crtc_vdisplay /= 2; 800 p->crtc_vsync_start /= 2; 801 p->crtc_vsync_end /= 2; 802 p->crtc_vtotal /= 2; 803 } 804 } 805 806 if (!(adjust_flags & CRTC_NO_DBLSCAN)) { 807 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 808 p->crtc_vdisplay *= 2; 809 p->crtc_vsync_start *= 2; 810 p->crtc_vsync_end *= 2; 811 p->crtc_vtotal *= 2; 812 } 813 } 814 815 if (!(adjust_flags & CRTC_NO_VSCAN)) { 816 if (p->vscan > 1) { 817 p->crtc_vdisplay *= p->vscan; 818 p->crtc_vsync_start *= p->vscan; 819 p->crtc_vsync_end *= p->vscan; 820 p->crtc_vtotal *= p->vscan; 821 } 822 } 823 824 if (adjust_flags & CRTC_STEREO_DOUBLE) { 825 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 826 827 switch (layout) { 828 case DRM_MODE_FLAG_3D_FRAME_PACKING: 829 p->crtc_clock *= 2; 830 p->crtc_vdisplay += p->crtc_vtotal; 831 p->crtc_vsync_start += p->crtc_vtotal; 832 p->crtc_vsync_end += p->crtc_vtotal; 833 p->crtc_vtotal += p->crtc_vtotal; 834 break; 835 } 836 } 837 838 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 839 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 840 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 841 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 842 } 843 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 844 845 /** 846 * drm_mode_copy - copy the mode 847 * @dst: mode to overwrite 848 * @src: mode to copy 849 * 850 * Copy an existing mode into another mode, preserving the object id and 851 * list head of the destination mode. 852 */ 853 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 854 { 855 int id = dst->base.id; 856 struct list_head head = dst->head; 857 858 *dst = *src; 859 dst->base.id = id; 860 dst->head = head; 861 } 862 EXPORT_SYMBOL(drm_mode_copy); 863 864 /** 865 * drm_mode_duplicate - allocate and duplicate an existing mode 866 * @dev: drm_device to allocate the duplicated mode for 867 * @mode: mode to duplicate 868 * 869 * Just allocate a new mode, copy the existing mode into it, and return 870 * a pointer to it. Used to create new instances of established modes. 871 * 872 * Returns: 873 * Pointer to duplicated mode on success, NULL on error. 874 */ 875 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 876 const struct drm_display_mode *mode) 877 { 878 struct drm_display_mode *nmode; 879 880 nmode = drm_mode_create(dev); 881 if (!nmode) 882 return NULL; 883 884 drm_mode_copy(nmode, mode); 885 886 return nmode; 887 } 888 EXPORT_SYMBOL(drm_mode_duplicate); 889 890 /** 891 * drm_mode_equal - test modes for equality 892 * @mode1: first mode 893 * @mode2: second mode 894 * 895 * Check to see if @mode1 and @mode2 are equivalent. 896 * 897 * Returns: 898 * True if the modes are equal, false otherwise. 899 */ 900 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 901 { 902 /* do clock check convert to PICOS so fb modes get matched 903 * the same */ 904 if (mode1->clock && mode2->clock) { 905 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 906 return false; 907 } else if (mode1->clock != mode2->clock) 908 return false; 909 910 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != 911 (mode2->flags & DRM_MODE_FLAG_3D_MASK)) 912 return false; 913 914 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); 915 } 916 EXPORT_SYMBOL(drm_mode_equal); 917 918 /** 919 * drm_mode_equal_no_clocks_no_stereo - test modes for equality 920 * @mode1: first mode 921 * @mode2: second mode 922 * 923 * Check to see if @mode1 and @mode2 are equivalent, but 924 * don't check the pixel clocks nor the stereo layout. 925 * 926 * Returns: 927 * True if the modes are equal, false otherwise. 928 */ 929 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, 930 const struct drm_display_mode *mode2) 931 { 932 if (mode1->hdisplay == mode2->hdisplay && 933 mode1->hsync_start == mode2->hsync_start && 934 mode1->hsync_end == mode2->hsync_end && 935 mode1->htotal == mode2->htotal && 936 mode1->hskew == mode2->hskew && 937 mode1->vdisplay == mode2->vdisplay && 938 mode1->vsync_start == mode2->vsync_start && 939 mode1->vsync_end == mode2->vsync_end && 940 mode1->vtotal == mode2->vtotal && 941 mode1->vscan == mode2->vscan && 942 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == 943 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) 944 return true; 945 946 return false; 947 } 948 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); 949 950 /** 951 * drm_mode_validate_basic - make sure the mode is somewhat sane 952 * @mode: mode to check 953 * 954 * Check that the mode timings are at least somewhat reasonable. 955 * Any hardware specific limits are left up for each driver to check. 956 * 957 * Returns: 958 * The mode status 959 */ 960 enum drm_mode_status 961 drm_mode_validate_basic(const struct drm_display_mode *mode) 962 { 963 if (mode->clock == 0) 964 return MODE_CLOCK_LOW; 965 966 if (mode->hdisplay == 0 || 967 mode->hsync_start < mode->hdisplay || 968 mode->hsync_end < mode->hsync_start || 969 mode->htotal < mode->hsync_end) 970 return MODE_H_ILLEGAL; 971 972 if (mode->vdisplay == 0 || 973 mode->vsync_start < mode->vdisplay || 974 mode->vsync_end < mode->vsync_start || 975 mode->vtotal < mode->vsync_end) 976 return MODE_V_ILLEGAL; 977 978 return MODE_OK; 979 } 980 EXPORT_SYMBOL(drm_mode_validate_basic); 981 982 /** 983 * drm_mode_validate_size - make sure modes adhere to size constraints 984 * @mode: mode to check 985 * @maxX: maximum width 986 * @maxY: maximum height 987 * 988 * This function is a helper which can be used to validate modes against size 989 * limitations of the DRM device/connector. If a mode is too big its status 990 * member is updated with the appropriate validation failure code. The list 991 * itself is not changed. 992 * 993 * Returns: 994 * The mode status 995 */ 996 enum drm_mode_status 997 drm_mode_validate_size(const struct drm_display_mode *mode, 998 int maxX, int maxY) 999 { 1000 if (maxX > 0 && mode->hdisplay > maxX) 1001 return MODE_VIRTUAL_X; 1002 1003 if (maxY > 0 && mode->vdisplay > maxY) 1004 return MODE_VIRTUAL_Y; 1005 1006 return MODE_OK; 1007 } 1008 EXPORT_SYMBOL(drm_mode_validate_size); 1009 1010 /** 1011 * drm_mode_prune_invalid - remove invalid modes from mode list 1012 * @dev: DRM device 1013 * @mode_list: list of modes to check 1014 * @verbose: be verbose about it 1015 * 1016 * This helper function can be used to prune a display mode list after 1017 * validation has been completed. All modes who's status is not MODE_OK will be 1018 * removed from the list, and if @verbose the status code and mode name is also 1019 * printed to dmesg. 1020 */ 1021 void drm_mode_prune_invalid(struct drm_device *dev, 1022 struct list_head *mode_list, bool verbose) 1023 { 1024 struct drm_display_mode *mode, *t; 1025 1026 list_for_each_entry_safe(mode, t, mode_list, head) { 1027 if (mode->status != MODE_OK) { 1028 list_del(&mode->head); 1029 if (verbose) { 1030 drm_mode_debug_printmodeline(mode); 1031 DRM_DEBUG_KMS("Not using %s mode %d\n", 1032 mode->name, mode->status); 1033 } 1034 drm_mode_destroy(dev, mode); 1035 } 1036 } 1037 } 1038 EXPORT_SYMBOL(drm_mode_prune_invalid); 1039 1040 /** 1041 * drm_mode_compare - compare modes for favorability 1042 * @priv: unused 1043 * @lh_a: list_head for first mode 1044 * @lh_b: list_head for second mode 1045 * 1046 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 1047 * which is better. 1048 * 1049 * Returns: 1050 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 1051 * positive if @lh_b is better than @lh_a. 1052 */ 1053 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 1054 { 1055 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 1056 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 1057 int diff; 1058 1059 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 1060 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 1061 if (diff) 1062 return diff; 1063 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 1064 if (diff) 1065 return diff; 1066 1067 diff = b->vrefresh - a->vrefresh; 1068 if (diff) 1069 return diff; 1070 1071 diff = b->clock - a->clock; 1072 return diff; 1073 } 1074 1075 /** 1076 * drm_mode_sort - sort mode list 1077 * @mode_list: list of drm_display_mode structures to sort 1078 * 1079 * Sort @mode_list by favorability, moving good modes to the head of the list. 1080 */ 1081 void drm_mode_sort(struct list_head *mode_list) 1082 { 1083 list_sort(NULL, mode_list, drm_mode_compare); 1084 } 1085 EXPORT_SYMBOL(drm_mode_sort); 1086 1087 /** 1088 * drm_mode_connector_list_update - update the mode list for the connector 1089 * @connector: the connector to update 1090 * @merge_type_bits: whether to merge or overright type bits. 1091 * 1092 * This moves the modes from the @connector probed_modes list 1093 * to the actual mode list. It compares the probed mode against the current 1094 * list and only adds different/new modes. 1095 * 1096 * This is just a helper functions doesn't validate any modes itself and also 1097 * doesn't prune any invalid modes. Callers need to do that themselves. 1098 */ 1099 void drm_mode_connector_list_update(struct drm_connector *connector, 1100 bool merge_type_bits) 1101 { 1102 struct drm_display_mode *mode; 1103 struct drm_display_mode *pmode, *pt; 1104 int found_it; 1105 1106 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); 1107 1108 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1109 head) { 1110 found_it = 0; 1111 /* go through current modes checking for the new probed mode */ 1112 list_for_each_entry(mode, &connector->modes, head) { 1113 if (drm_mode_equal(pmode, mode)) { 1114 found_it = 1; 1115 /* if equal delete the probed mode */ 1116 mode->status = pmode->status; 1117 /* Merge type bits together */ 1118 if (merge_type_bits) 1119 mode->type |= pmode->type; 1120 else 1121 mode->type = pmode->type; 1122 list_del(&pmode->head); 1123 drm_mode_destroy(connector->dev, pmode); 1124 break; 1125 } 1126 } 1127 1128 if (!found_it) { 1129 list_move_tail(&pmode->head, &connector->modes); 1130 } 1131 } 1132 } 1133 EXPORT_SYMBOL(drm_mode_connector_list_update); 1134 1135 /** 1136 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector 1137 * @mode_option: optional per connector mode option 1138 * @connector: connector to parse modeline for 1139 * @mode: preallocated drm_cmdline_mode structure to fill out 1140 * 1141 * This parses @mode_option command line modeline for modes and options to 1142 * configure the connector. If @mode_option is NULL the default command line 1143 * modeline in fb_mode_option will be parsed instead. 1144 * 1145 * This uses the same parameters as the fb modedb.c, except for an extra 1146 * force-enable, force-enable-digital and force-disable bit at the end: 1147 * 1148 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1149 * 1150 * The intermediate drm_cmdline_mode structure is required to store additional 1151 * options from the command line modline like the force-enabel/disable flag. 1152 * 1153 * Returns: 1154 * True if a valid modeline has been parsed, false otherwise. 1155 */ 1156 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1157 struct drm_connector *connector, 1158 struct drm_cmdline_mode *mode) 1159 { 1160 const char *name; 1161 unsigned int namelen; 1162 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1163 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1164 bool yres_specified = false, cvt = false, rb = false; 1165 bool interlace = false, margins = false, was_digit = false; 1166 int i; 1167 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1168 1169 #ifdef CONFIG_FB 1170 if (!mode_option) 1171 mode_option = fb_mode_option; 1172 #endif 1173 1174 if (!mode_option) { 1175 mode->specified = false; 1176 return false; 1177 } 1178 1179 name = mode_option; 1180 namelen = strlen(name); 1181 for (i = namelen-1; i >= 0; i--) { 1182 switch (name[i]) { 1183 case '@': 1184 if (!refresh_specified && !bpp_specified && 1185 !yres_specified && !cvt && !rb && was_digit) { 1186 refresh = simple_strtol(&name[i+1], NULL, 10); 1187 refresh_specified = true; 1188 was_digit = false; 1189 } else 1190 goto done; 1191 break; 1192 case '-': 1193 if (!bpp_specified && !yres_specified && !cvt && 1194 !rb && was_digit) { 1195 bpp = simple_strtol(&name[i+1], NULL, 10); 1196 bpp_specified = true; 1197 was_digit = false; 1198 } else 1199 goto done; 1200 break; 1201 case 'x': 1202 if (!yres_specified && was_digit) { 1203 yres = simple_strtol(&name[i+1], NULL, 10); 1204 yres_specified = true; 1205 was_digit = false; 1206 } else 1207 goto done; 1208 break; 1209 case '0' ... '9': 1210 was_digit = true; 1211 break; 1212 case 'M': 1213 if (yres_specified || cvt || was_digit) 1214 goto done; 1215 cvt = true; 1216 break; 1217 case 'R': 1218 if (yres_specified || cvt || rb || was_digit) 1219 goto done; 1220 rb = true; 1221 break; 1222 case 'm': 1223 if (cvt || yres_specified || was_digit) 1224 goto done; 1225 margins = true; 1226 break; 1227 case 'i': 1228 if (cvt || yres_specified || was_digit) 1229 goto done; 1230 interlace = true; 1231 break; 1232 case 'e': 1233 if (yres_specified || bpp_specified || refresh_specified || 1234 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1235 goto done; 1236 1237 force = DRM_FORCE_ON; 1238 break; 1239 case 'D': 1240 if (yres_specified || bpp_specified || refresh_specified || 1241 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1242 goto done; 1243 1244 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1245 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1246 force = DRM_FORCE_ON; 1247 else 1248 force = DRM_FORCE_ON_DIGITAL; 1249 break; 1250 case 'd': 1251 if (yres_specified || bpp_specified || refresh_specified || 1252 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1253 goto done; 1254 1255 force = DRM_FORCE_OFF; 1256 break; 1257 default: 1258 goto done; 1259 } 1260 } 1261 1262 if (i < 0 && yres_specified) { 1263 char *ch; 1264 xres = simple_strtol(name, &ch, 10); 1265 if ((ch != NULL) && (*ch == 'x')) 1266 res_specified = true; 1267 else 1268 i = ch - name; 1269 } else if (!yres_specified && was_digit) { 1270 /* catch mode that begins with digits but has no 'x' */ 1271 i = 0; 1272 } 1273 done: 1274 if (i >= 0) { 1275 printk(KERN_WARNING 1276 "parse error at position %i in video mode '%s'\n", 1277 i, name); 1278 mode->specified = false; 1279 return false; 1280 } 1281 1282 if (res_specified) { 1283 mode->specified = true; 1284 mode->xres = xres; 1285 mode->yres = yres; 1286 } 1287 1288 if (refresh_specified) { 1289 mode->refresh_specified = true; 1290 mode->refresh = refresh; 1291 } 1292 1293 if (bpp_specified) { 1294 mode->bpp_specified = true; 1295 mode->bpp = bpp; 1296 } 1297 mode->rb = rb; 1298 mode->cvt = cvt; 1299 mode->interlace = interlace; 1300 mode->margins = margins; 1301 mode->force = force; 1302 1303 return true; 1304 } 1305 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1306 1307 /** 1308 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode 1309 * @dev: DRM device to create the new mode for 1310 * @cmd: input command line modeline 1311 * 1312 * Returns: 1313 * Pointer to converted mode on success, NULL on error. 1314 */ 1315 struct drm_display_mode * 1316 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1317 struct drm_cmdline_mode *cmd) 1318 { 1319 struct drm_display_mode *mode; 1320 1321 if (cmd->cvt) 1322 mode = drm_cvt_mode(dev, 1323 cmd->xres, cmd->yres, 1324 cmd->refresh_specified ? cmd->refresh : 60, 1325 cmd->rb, cmd->interlace, 1326 cmd->margins); 1327 else 1328 mode = drm_gtf_mode(dev, 1329 cmd->xres, cmd->yres, 1330 cmd->refresh_specified ? cmd->refresh : 60, 1331 cmd->interlace, 1332 cmd->margins); 1333 if (!mode) 1334 return NULL; 1335 1336 mode->type |= DRM_MODE_TYPE_USERDEF; 1337 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1338 return mode; 1339 } 1340 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1341