1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <linux/list.h> 34 #include <linux/export.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_crtc.h> 37 38 /** 39 * drm_mode_debug_printmodeline - debug print a mode 40 * @dev: DRM device 41 * @mode: mode to print 42 * 43 * LOCKING: 44 * None. 45 * 46 * Describe @mode using DRM_DEBUG. 47 */ 48 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 49 { 50 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 51 "0x%x 0x%x\n", 52 mode->base.id, mode->name, mode->vrefresh, mode->clock, 53 mode->hdisplay, mode->hsync_start, 54 mode->hsync_end, mode->htotal, 55 mode->vdisplay, mode->vsync_start, 56 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 57 } 58 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 59 60 /** 61 * drm_cvt_mode -create a modeline based on CVT algorithm 62 * @dev: DRM device 63 * @hdisplay: hdisplay size 64 * @vdisplay: vdisplay size 65 * @vrefresh : vrefresh rate 66 * @reduced : Whether the GTF calculation is simplified 67 * @interlaced:Whether the interlace is supported 68 * 69 * LOCKING: 70 * none. 71 * 72 * return the modeline based on CVT algorithm 73 * 74 * This function is called to generate the modeline based on CVT algorithm 75 * according to the hdisplay, vdisplay, vrefresh. 76 * It is based from the VESA(TM) Coordinated Video Timing Generator by 77 * Graham Loveridge April 9, 2003 available at 78 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 79 * 80 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 81 * What I have done is to translate it by using integer calculation. 82 */ 83 #define HV_FACTOR 1000 84 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 85 int vdisplay, int vrefresh, 86 bool reduced, bool interlaced, bool margins) 87 { 88 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 89 #define CVT_MARGIN_PERCENTAGE 18 90 /* 2) character cell horizontal granularity (pixels) - default 8 */ 91 #define CVT_H_GRANULARITY 8 92 /* 3) Minimum vertical porch (lines) - default 3 */ 93 #define CVT_MIN_V_PORCH 3 94 /* 4) Minimum number of vertical back porch lines - default 6 */ 95 #define CVT_MIN_V_BPORCH 6 96 /* Pixel Clock step (kHz) */ 97 #define CVT_CLOCK_STEP 250 98 struct drm_display_mode *drm_mode; 99 unsigned int vfieldrate, hperiod; 100 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 101 int interlace; 102 103 /* allocate the drm_display_mode structure. If failure, we will 104 * return directly 105 */ 106 drm_mode = drm_mode_create(dev); 107 if (!drm_mode) 108 return NULL; 109 110 /* the CVT default refresh rate is 60Hz */ 111 if (!vrefresh) 112 vrefresh = 60; 113 114 /* the required field fresh rate */ 115 if (interlaced) 116 vfieldrate = vrefresh * 2; 117 else 118 vfieldrate = vrefresh; 119 120 /* horizontal pixels */ 121 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 122 123 /* determine the left&right borders */ 124 hmargin = 0; 125 if (margins) { 126 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 127 hmargin -= hmargin % CVT_H_GRANULARITY; 128 } 129 /* find the total active pixels */ 130 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 131 132 /* find the number of lines per field */ 133 if (interlaced) 134 vdisplay_rnd = vdisplay / 2; 135 else 136 vdisplay_rnd = vdisplay; 137 138 /* find the top & bottom borders */ 139 vmargin = 0; 140 if (margins) 141 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 142 143 drm_mode->vdisplay = vdisplay + 2 * vmargin; 144 145 /* Interlaced */ 146 if (interlaced) 147 interlace = 1; 148 else 149 interlace = 0; 150 151 /* Determine VSync Width from aspect ratio */ 152 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 153 vsync = 4; 154 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 155 vsync = 5; 156 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 157 vsync = 6; 158 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 159 vsync = 7; 160 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 161 vsync = 7; 162 else /* custom */ 163 vsync = 10; 164 165 if (!reduced) { 166 /* simplify the GTF calculation */ 167 /* 4) Minimum time of vertical sync + back porch interval (µs) 168 * default 550.0 169 */ 170 int tmp1, tmp2; 171 #define CVT_MIN_VSYNC_BP 550 172 /* 3) Nominal HSync width (% of line period) - default 8 */ 173 #define CVT_HSYNC_PERCENTAGE 8 174 unsigned int hblank_percentage; 175 int vsyncandback_porch, vback_porch, hblank; 176 177 /* estimated the horizontal period */ 178 tmp1 = HV_FACTOR * 1000000 - 179 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 180 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 181 interlace; 182 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 183 184 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 185 /* 9. Find number of lines in sync + backporch */ 186 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 187 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 188 else 189 vsyncandback_porch = tmp1; 190 /* 10. Find number of lines in back porch */ 191 vback_porch = vsyncandback_porch - vsync; 192 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 193 vsyncandback_porch + CVT_MIN_V_PORCH; 194 /* 5) Definition of Horizontal blanking time limitation */ 195 /* Gradient (%/kHz) - default 600 */ 196 #define CVT_M_FACTOR 600 197 /* Offset (%) - default 40 */ 198 #define CVT_C_FACTOR 40 199 /* Blanking time scaling factor - default 128 */ 200 #define CVT_K_FACTOR 128 201 /* Scaling factor weighting - default 20 */ 202 #define CVT_J_FACTOR 20 203 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 204 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 205 CVT_J_FACTOR) 206 /* 12. Find ideal blanking duty cycle from formula */ 207 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 208 hperiod / 1000; 209 /* 13. Blanking time */ 210 if (hblank_percentage < 20 * HV_FACTOR) 211 hblank_percentage = 20 * HV_FACTOR; 212 hblank = drm_mode->hdisplay * hblank_percentage / 213 (100 * HV_FACTOR - hblank_percentage); 214 hblank -= hblank % (2 * CVT_H_GRANULARITY); 215 /* 14. find the total pixes per line */ 216 drm_mode->htotal = drm_mode->hdisplay + hblank; 217 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 218 drm_mode->hsync_start = drm_mode->hsync_end - 219 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 220 drm_mode->hsync_start += CVT_H_GRANULARITY - 221 drm_mode->hsync_start % CVT_H_GRANULARITY; 222 /* fill the Vsync values */ 223 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 224 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 225 } else { 226 /* Reduced blanking */ 227 /* Minimum vertical blanking interval time (µs)- default 460 */ 228 #define CVT_RB_MIN_VBLANK 460 229 /* Fixed number of clocks for horizontal sync */ 230 #define CVT_RB_H_SYNC 32 231 /* Fixed number of clocks for horizontal blanking */ 232 #define CVT_RB_H_BLANK 160 233 /* Fixed number of lines for vertical front porch - default 3*/ 234 #define CVT_RB_VFPORCH 3 235 int vbilines; 236 int tmp1, tmp2; 237 /* 8. Estimate Horizontal period. */ 238 tmp1 = HV_FACTOR * 1000000 - 239 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 240 tmp2 = vdisplay_rnd + 2 * vmargin; 241 hperiod = tmp1 / (tmp2 * vfieldrate); 242 /* 9. Find number of lines in vertical blanking */ 243 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 244 /* 10. Check if vertical blanking is sufficient */ 245 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 246 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 247 /* 11. Find total number of lines in vertical field */ 248 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 249 /* 12. Find total number of pixels in a line */ 250 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 251 /* Fill in HSync values */ 252 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 253 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 254 /* Fill in VSync values */ 255 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 256 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 257 } 258 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 259 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 260 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 261 /* 18/16. Find actual vertical frame frequency */ 262 /* ignore - just set the mode flag for interlaced */ 263 if (interlaced) { 264 drm_mode->vtotal *= 2; 265 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 266 } 267 /* Fill the mode line name */ 268 drm_mode_set_name(drm_mode); 269 if (reduced) 270 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 271 DRM_MODE_FLAG_NVSYNC); 272 else 273 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 274 DRM_MODE_FLAG_NHSYNC); 275 276 return drm_mode; 277 } 278 EXPORT_SYMBOL(drm_cvt_mode); 279 280 /** 281 * drm_gtf_mode_complex - create the modeline based on full GTF algorithm 282 * 283 * @dev :drm device 284 * @hdisplay :hdisplay size 285 * @vdisplay :vdisplay size 286 * @vrefresh :vrefresh rate. 287 * @interlaced :whether the interlace is supported 288 * @margins :desired margin size 289 * @GTF_[MCKJ] :extended GTF formula parameters 290 * 291 * LOCKING. 292 * none. 293 * 294 * return the modeline based on full GTF algorithm. 295 * 296 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 297 * in here multiplied by two. For a C of 40, pass in 80. 298 */ 299 struct drm_display_mode * 300 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 301 int vrefresh, bool interlaced, int margins, 302 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 303 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 304 #define GTF_MARGIN_PERCENTAGE 18 305 /* 2) character cell horizontal granularity (pixels) - default 8 */ 306 #define GTF_CELL_GRAN 8 307 /* 3) Minimum vertical porch (lines) - default 3 */ 308 #define GTF_MIN_V_PORCH 1 309 /* width of vsync in lines */ 310 #define V_SYNC_RQD 3 311 /* width of hsync as % of total line */ 312 #define H_SYNC_PERCENT 8 313 /* min time of vsync + back porch (microsec) */ 314 #define MIN_VSYNC_PLUS_BP 550 315 /* C' and M' are part of the Blanking Duty Cycle computation */ 316 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 317 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 318 struct drm_display_mode *drm_mode; 319 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 320 int top_margin, bottom_margin; 321 int interlace; 322 unsigned int hfreq_est; 323 int vsync_plus_bp, vback_porch; 324 unsigned int vtotal_lines, vfieldrate_est, hperiod; 325 unsigned int vfield_rate, vframe_rate; 326 int left_margin, right_margin; 327 unsigned int total_active_pixels, ideal_duty_cycle; 328 unsigned int hblank, total_pixels, pixel_freq; 329 int hsync, hfront_porch, vodd_front_porch_lines; 330 unsigned int tmp1, tmp2; 331 332 drm_mode = drm_mode_create(dev); 333 if (!drm_mode) 334 return NULL; 335 336 /* 1. In order to give correct results, the number of horizontal 337 * pixels requested is first processed to ensure that it is divisible 338 * by the character size, by rounding it to the nearest character 339 * cell boundary: 340 */ 341 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 342 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 343 344 /* 2. If interlace is requested, the number of vertical lines assumed 345 * by the calculation must be halved, as the computation calculates 346 * the number of vertical lines per field. 347 */ 348 if (interlaced) 349 vdisplay_rnd = vdisplay / 2; 350 else 351 vdisplay_rnd = vdisplay; 352 353 /* 3. Find the frame rate required: */ 354 if (interlaced) 355 vfieldrate_rqd = vrefresh * 2; 356 else 357 vfieldrate_rqd = vrefresh; 358 359 /* 4. Find number of lines in Top margin: */ 360 top_margin = 0; 361 if (margins) 362 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 363 1000; 364 /* 5. Find number of lines in bottom margin: */ 365 bottom_margin = top_margin; 366 367 /* 6. If interlace is required, then set variable interlace: */ 368 if (interlaced) 369 interlace = 1; 370 else 371 interlace = 0; 372 373 /* 7. Estimate the Horizontal frequency */ 374 { 375 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 376 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 377 2 + interlace; 378 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 379 } 380 381 /* 8. Find the number of lines in V sync + back porch */ 382 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 383 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 384 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 385 /* 9. Find the number of lines in V back porch alone: */ 386 vback_porch = vsync_plus_bp - V_SYNC_RQD; 387 /* 10. Find the total number of lines in Vertical field period: */ 388 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 389 vsync_plus_bp + GTF_MIN_V_PORCH; 390 /* 11. Estimate the Vertical field frequency: */ 391 vfieldrate_est = hfreq_est / vtotal_lines; 392 /* 12. Find the actual horizontal period: */ 393 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 394 395 /* 13. Find the actual Vertical field frequency: */ 396 vfield_rate = hfreq_est / vtotal_lines; 397 /* 14. Find the Vertical frame frequency: */ 398 if (interlaced) 399 vframe_rate = vfield_rate / 2; 400 else 401 vframe_rate = vfield_rate; 402 /* 15. Find number of pixels in left margin: */ 403 if (margins) 404 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 405 1000; 406 else 407 left_margin = 0; 408 409 /* 16.Find number of pixels in right margin: */ 410 right_margin = left_margin; 411 /* 17.Find total number of active pixels in image and left and right */ 412 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 413 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 414 ideal_duty_cycle = GTF_C_PRIME * 1000 - 415 (GTF_M_PRIME * 1000000 / hfreq_est); 416 /* 19.Find the number of pixels in the blanking time to the nearest 417 * double character cell: */ 418 hblank = total_active_pixels * ideal_duty_cycle / 419 (100000 - ideal_duty_cycle); 420 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 421 hblank = hblank * 2 * GTF_CELL_GRAN; 422 /* 20.Find total number of pixels: */ 423 total_pixels = total_active_pixels + hblank; 424 /* 21.Find pixel clock frequency: */ 425 pixel_freq = total_pixels * hfreq_est / 1000; 426 /* Stage 1 computations are now complete; I should really pass 427 * the results to another function and do the Stage 2 computations, 428 * but I only need a few more values so I'll just append the 429 * computations here for now */ 430 /* 17. Find the number of pixels in the horizontal sync period: */ 431 hsync = H_SYNC_PERCENT * total_pixels / 100; 432 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 433 hsync = hsync * GTF_CELL_GRAN; 434 /* 18. Find the number of pixels in horizontal front porch period */ 435 hfront_porch = hblank / 2 - hsync; 436 /* 36. Find the number of lines in the odd front porch period: */ 437 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 438 439 /* finally, pack the results in the mode struct */ 440 drm_mode->hdisplay = hdisplay_rnd; 441 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 442 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 443 drm_mode->htotal = total_pixels; 444 drm_mode->vdisplay = vdisplay_rnd; 445 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 446 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 447 drm_mode->vtotal = vtotal_lines; 448 449 drm_mode->clock = pixel_freq; 450 451 if (interlaced) { 452 drm_mode->vtotal *= 2; 453 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 454 } 455 456 drm_mode_set_name(drm_mode); 457 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 458 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 459 else 460 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 461 462 return drm_mode; 463 } 464 EXPORT_SYMBOL(drm_gtf_mode_complex); 465 466 /** 467 * drm_gtf_mode - create the modeline based on GTF algorithm 468 * 469 * @dev :drm device 470 * @hdisplay :hdisplay size 471 * @vdisplay :vdisplay size 472 * @vrefresh :vrefresh rate. 473 * @interlaced :whether the interlace is supported 474 * @margins :whether the margin is supported 475 * 476 * LOCKING. 477 * none. 478 * 479 * return the modeline based on GTF algorithm 480 * 481 * This function is to create the modeline based on the GTF algorithm. 482 * Generalized Timing Formula is derived from: 483 * GTF Spreadsheet by Andy Morrish (1/5/97) 484 * available at http://www.vesa.org 485 * 486 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 487 * What I have done is to translate it by using integer calculation. 488 * I also refer to the function of fb_get_mode in the file of 489 * drivers/video/fbmon.c 490 * 491 * Standard GTF parameters: 492 * M = 600 493 * C = 40 494 * K = 128 495 * J = 20 496 */ 497 struct drm_display_mode * 498 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 499 bool lace, int margins) 500 { 501 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace, 502 margins, 600, 40 * 2, 128, 20 * 2); 503 } 504 EXPORT_SYMBOL(drm_gtf_mode); 505 506 #ifdef CONFIG_VIDEOMODE_HELPERS 507 int drm_display_mode_from_videomode(const struct videomode *vm, 508 struct drm_display_mode *dmode) 509 { 510 dmode->hdisplay = vm->hactive; 511 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; 512 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; 513 dmode->htotal = dmode->hsync_end + vm->hback_porch; 514 515 dmode->vdisplay = vm->vactive; 516 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; 517 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; 518 dmode->vtotal = dmode->vsync_end + vm->vback_porch; 519 520 dmode->clock = vm->pixelclock / 1000; 521 522 dmode->flags = 0; 523 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) 524 dmode->flags |= DRM_MODE_FLAG_PHSYNC; 525 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) 526 dmode->flags |= DRM_MODE_FLAG_NHSYNC; 527 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) 528 dmode->flags |= DRM_MODE_FLAG_PVSYNC; 529 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) 530 dmode->flags |= DRM_MODE_FLAG_NVSYNC; 531 if (vm->flags & DISPLAY_FLAGS_INTERLACED) 532 dmode->flags |= DRM_MODE_FLAG_INTERLACE; 533 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) 534 dmode->flags |= DRM_MODE_FLAG_DBLSCAN; 535 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 536 dmode->flags |= DRM_MODE_FLAG_DBLCLK; 537 drm_mode_set_name(dmode); 538 539 return 0; 540 } 541 542 #ifdef CONFIG_OF 543 /** 544 * of_get_drm_display_mode - get a drm_display_mode from devicetree 545 * @np: device_node with the timing specification 546 * @dmode: will be set to the return value 547 * @index: index into the list of display timings in devicetree 548 * 549 * This function is expensive and should only be used, if only one mode is to be 550 * read from DT. To get multiple modes start with of_get_display_timings and 551 * work with that instead. 552 */ 553 int of_get_drm_display_mode(struct device_node *np, 554 struct drm_display_mode *dmode, int index) 555 { 556 struct videomode vm; 557 int ret; 558 559 ret = of_get_videomode(np, &vm, index); 560 if (ret) 561 return ret; 562 563 drm_display_mode_from_videomode(&vm, dmode); 564 565 pr_debug("%s: got %dx%d display mode from %s\n", 566 of_node_full_name(np), vm.hactive, vm.vactive, np->name); 567 drm_mode_debug_printmodeline(dmode); 568 569 return 0; 570 } 571 #endif /* CONFIG_OF */ 572 #endif /* CONFIG_VIDEOMODE_HELPERS */ 573 574 /** 575 * drm_mode_set_name - set the name on a mode 576 * @mode: name will be set in this mode 577 * 578 * LOCKING: 579 * None. 580 * 581 * Set the name of @mode to a standard format. 582 */ 583 void drm_mode_set_name(struct drm_display_mode *mode) 584 { 585 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 586 587 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 588 mode->hdisplay, mode->vdisplay, 589 interlaced ? "i" : ""); 590 } 591 EXPORT_SYMBOL(drm_mode_set_name); 592 593 /** 594 * drm_mode_width - get the width of a mode 595 * @mode: mode 596 * 597 * LOCKING: 598 * None. 599 * 600 * Return @mode's width (hdisplay) value. 601 * 602 * FIXME: is this needed? 603 * 604 * RETURNS: 605 * @mode->hdisplay 606 */ 607 int drm_mode_width(const struct drm_display_mode *mode) 608 { 609 return mode->hdisplay; 610 611 } 612 EXPORT_SYMBOL(drm_mode_width); 613 614 /** 615 * drm_mode_height - get the height of a mode 616 * @mode: mode 617 * 618 * LOCKING: 619 * None. 620 * 621 * Return @mode's height (vdisplay) value. 622 * 623 * FIXME: is this needed? 624 * 625 * RETURNS: 626 * @mode->vdisplay 627 */ 628 int drm_mode_height(const struct drm_display_mode *mode) 629 { 630 return mode->vdisplay; 631 } 632 EXPORT_SYMBOL(drm_mode_height); 633 634 /** drm_mode_hsync - get the hsync of a mode 635 * @mode: mode 636 * 637 * LOCKING: 638 * None. 639 * 640 * Return @modes's hsync rate in kHz, rounded to the nearest int. 641 */ 642 int drm_mode_hsync(const struct drm_display_mode *mode) 643 { 644 unsigned int calc_val; 645 646 if (mode->hsync) 647 return mode->hsync; 648 649 if (mode->htotal < 0) 650 return 0; 651 652 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 653 calc_val += 500; /* round to 1000Hz */ 654 calc_val /= 1000; /* truncate to kHz */ 655 656 return calc_val; 657 } 658 EXPORT_SYMBOL(drm_mode_hsync); 659 660 /** 661 * drm_mode_vrefresh - get the vrefresh of a mode 662 * @mode: mode 663 * 664 * LOCKING: 665 * None. 666 * 667 * Return @mode's vrefresh rate in Hz or calculate it if necessary. 668 * 669 * FIXME: why is this needed? shouldn't vrefresh be set already? 670 * 671 * RETURNS: 672 * Vertical refresh rate. It will be the result of actual value plus 0.5. 673 * If it is 70.288, it will return 70Hz. 674 * If it is 59.6, it will return 60Hz. 675 */ 676 int drm_mode_vrefresh(const struct drm_display_mode *mode) 677 { 678 int refresh = 0; 679 unsigned int calc_val; 680 681 if (mode->vrefresh > 0) 682 refresh = mode->vrefresh; 683 else if (mode->htotal > 0 && mode->vtotal > 0) { 684 int vtotal; 685 vtotal = mode->vtotal; 686 /* work out vrefresh the value will be x1000 */ 687 calc_val = (mode->clock * 1000); 688 calc_val /= mode->htotal; 689 refresh = (calc_val + vtotal / 2) / vtotal; 690 691 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 692 refresh *= 2; 693 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 694 refresh /= 2; 695 if (mode->vscan > 1) 696 refresh /= mode->vscan; 697 } 698 return refresh; 699 } 700 EXPORT_SYMBOL(drm_mode_vrefresh); 701 702 /** 703 * drm_mode_set_crtcinfo - set CRTC modesetting parameters 704 * @p: mode 705 * @adjust_flags: a combination of adjustment flags 706 * 707 * LOCKING: 708 * None. 709 * 710 * Setup the CRTC modesetting parameters for @p, adjusting if necessary. 711 * 712 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 713 * interlaced modes. 714 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 715 * buffers containing two eyes (only adjust the timings when needed, eg. for 716 * "frame packing" or "side by side full"). 717 */ 718 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 719 { 720 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 721 return; 722 723 p->crtc_clock = p->clock; 724 p->crtc_hdisplay = p->hdisplay; 725 p->crtc_hsync_start = p->hsync_start; 726 p->crtc_hsync_end = p->hsync_end; 727 p->crtc_htotal = p->htotal; 728 p->crtc_hskew = p->hskew; 729 p->crtc_vdisplay = p->vdisplay; 730 p->crtc_vsync_start = p->vsync_start; 731 p->crtc_vsync_end = p->vsync_end; 732 p->crtc_vtotal = p->vtotal; 733 734 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 735 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 736 p->crtc_vdisplay /= 2; 737 p->crtc_vsync_start /= 2; 738 p->crtc_vsync_end /= 2; 739 p->crtc_vtotal /= 2; 740 } 741 } 742 743 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 744 p->crtc_vdisplay *= 2; 745 p->crtc_vsync_start *= 2; 746 p->crtc_vsync_end *= 2; 747 p->crtc_vtotal *= 2; 748 } 749 750 if (p->vscan > 1) { 751 p->crtc_vdisplay *= p->vscan; 752 p->crtc_vsync_start *= p->vscan; 753 p->crtc_vsync_end *= p->vscan; 754 p->crtc_vtotal *= p->vscan; 755 } 756 757 if (adjust_flags & CRTC_STEREO_DOUBLE) { 758 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 759 760 switch (layout) { 761 case DRM_MODE_FLAG_3D_FRAME_PACKING: 762 p->crtc_clock *= 2; 763 p->crtc_vdisplay += p->crtc_vtotal; 764 p->crtc_vsync_start += p->crtc_vtotal; 765 p->crtc_vsync_end += p->crtc_vtotal; 766 p->crtc_vtotal += p->crtc_vtotal; 767 break; 768 } 769 } 770 771 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 772 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 773 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 774 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 775 } 776 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 777 778 779 /** 780 * drm_mode_copy - copy the mode 781 * @dst: mode to overwrite 782 * @src: mode to copy 783 * 784 * LOCKING: 785 * None. 786 * 787 * Copy an existing mode into another mode, preserving the object id and 788 * list head of the destination mode. 789 */ 790 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 791 { 792 int id = dst->base.id; 793 struct list_head head = dst->head; 794 795 *dst = *src; 796 dst->base.id = id; 797 dst->head = head; 798 } 799 EXPORT_SYMBOL(drm_mode_copy); 800 801 /** 802 * drm_mode_duplicate - allocate and duplicate an existing mode 803 * @m: mode to duplicate 804 * 805 * LOCKING: 806 * None. 807 * 808 * Just allocate a new mode, copy the existing mode into it, and return 809 * a pointer to it. Used to create new instances of established modes. 810 */ 811 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 812 const struct drm_display_mode *mode) 813 { 814 struct drm_display_mode *nmode; 815 816 nmode = drm_mode_create(dev); 817 if (!nmode) 818 return NULL; 819 820 drm_mode_copy(nmode, mode); 821 822 return nmode; 823 } 824 EXPORT_SYMBOL(drm_mode_duplicate); 825 826 /** 827 * drm_mode_equal - test modes for equality 828 * @mode1: first mode 829 * @mode2: second mode 830 * 831 * LOCKING: 832 * None. 833 * 834 * Check to see if @mode1 and @mode2 are equivalent. 835 * 836 * RETURNS: 837 * True if the modes are equal, false otherwise. 838 */ 839 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 840 { 841 /* do clock check convert to PICOS so fb modes get matched 842 * the same */ 843 if (mode1->clock && mode2->clock) { 844 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 845 return false; 846 } else if (mode1->clock != mode2->clock) 847 return false; 848 849 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != 850 (mode2->flags & DRM_MODE_FLAG_3D_MASK)) 851 return false; 852 853 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); 854 } 855 EXPORT_SYMBOL(drm_mode_equal); 856 857 /** 858 * drm_mode_equal_no_clocks_no_stereo - test modes for equality 859 * @mode1: first mode 860 * @mode2: second mode 861 * 862 * LOCKING: 863 * None. 864 * 865 * Check to see if @mode1 and @mode2 are equivalent, but 866 * don't check the pixel clocks nor the stereo layout. 867 * 868 * RETURNS: 869 * True if the modes are equal, false otherwise. 870 */ 871 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, 872 const struct drm_display_mode *mode2) 873 { 874 if (mode1->hdisplay == mode2->hdisplay && 875 mode1->hsync_start == mode2->hsync_start && 876 mode1->hsync_end == mode2->hsync_end && 877 mode1->htotal == mode2->htotal && 878 mode1->hskew == mode2->hskew && 879 mode1->vdisplay == mode2->vdisplay && 880 mode1->vsync_start == mode2->vsync_start && 881 mode1->vsync_end == mode2->vsync_end && 882 mode1->vtotal == mode2->vtotal && 883 mode1->vscan == mode2->vscan && 884 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == 885 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) 886 return true; 887 888 return false; 889 } 890 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); 891 892 /** 893 * drm_mode_validate_size - make sure modes adhere to size constraints 894 * @dev: DRM device 895 * @mode_list: list of modes to check 896 * @maxX: maximum width 897 * @maxY: maximum height 898 * @maxPitch: max pitch 899 * 900 * LOCKING: 901 * Caller must hold a lock protecting @mode_list. 902 * 903 * The DRM device (@dev) has size and pitch limits. Here we validate the 904 * modes we probed for @dev against those limits and set their status as 905 * necessary. 906 */ 907 void drm_mode_validate_size(struct drm_device *dev, 908 struct list_head *mode_list, 909 int maxX, int maxY, int maxPitch) 910 { 911 struct drm_display_mode *mode; 912 913 list_for_each_entry(mode, mode_list, head) { 914 if (maxPitch > 0 && mode->hdisplay > maxPitch) 915 mode->status = MODE_BAD_WIDTH; 916 917 if (maxX > 0 && mode->hdisplay > maxX) 918 mode->status = MODE_VIRTUAL_X; 919 920 if (maxY > 0 && mode->vdisplay > maxY) 921 mode->status = MODE_VIRTUAL_Y; 922 } 923 } 924 EXPORT_SYMBOL(drm_mode_validate_size); 925 926 /** 927 * drm_mode_prune_invalid - remove invalid modes from mode list 928 * @dev: DRM device 929 * @mode_list: list of modes to check 930 * @verbose: be verbose about it 931 * 932 * LOCKING: 933 * Caller must hold a lock protecting @mode_list. 934 * 935 * Once mode list generation is complete, a caller can use this routine to 936 * remove invalid modes from a mode list. If any of the modes have a 937 * status other than %MODE_OK, they are removed from @mode_list and freed. 938 */ 939 void drm_mode_prune_invalid(struct drm_device *dev, 940 struct list_head *mode_list, bool verbose) 941 { 942 struct drm_display_mode *mode, *t; 943 944 list_for_each_entry_safe(mode, t, mode_list, head) { 945 if (mode->status != MODE_OK) { 946 list_del(&mode->head); 947 if (verbose) { 948 drm_mode_debug_printmodeline(mode); 949 DRM_DEBUG_KMS("Not using %s mode %d\n", 950 mode->name, mode->status); 951 } 952 drm_mode_destroy(dev, mode); 953 } 954 } 955 } 956 EXPORT_SYMBOL(drm_mode_prune_invalid); 957 958 /** 959 * drm_mode_compare - compare modes for favorability 960 * @priv: unused 961 * @lh_a: list_head for first mode 962 * @lh_b: list_head for second mode 963 * 964 * LOCKING: 965 * None. 966 * 967 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 968 * which is better. 969 * 970 * RETURNS: 971 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 972 * positive if @lh_b is better than @lh_a. 973 */ 974 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 975 { 976 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 977 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 978 int diff; 979 980 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 981 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 982 if (diff) 983 return diff; 984 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 985 if (diff) 986 return diff; 987 988 diff = b->vrefresh - a->vrefresh; 989 if (diff) 990 return diff; 991 992 diff = b->clock - a->clock; 993 return diff; 994 } 995 996 /** 997 * drm_mode_sort - sort mode list 998 * @mode_list: list to sort 999 * 1000 * LOCKING: 1001 * Caller must hold a lock protecting @mode_list. 1002 * 1003 * Sort @mode_list by favorability, putting good modes first. 1004 */ 1005 void drm_mode_sort(struct list_head *mode_list) 1006 { 1007 drm_list_sort(NULL, mode_list, drm_mode_compare); 1008 } 1009 EXPORT_SYMBOL(drm_mode_sort); 1010 1011 /** 1012 * drm_mode_connector_list_update - update the mode list for the connector 1013 * @connector: the connector to update 1014 * 1015 * LOCKING: 1016 * Caller must hold a lock protecting @mode_list. 1017 * 1018 * This moves the modes from the @connector probed_modes list 1019 * to the actual mode list. It compares the probed mode against the current 1020 * list and only adds different modes. All modes unverified after this point 1021 * will be removed by the prune invalid modes. 1022 */ 1023 void drm_mode_connector_list_update(struct drm_connector *connector) 1024 { 1025 struct drm_display_mode *mode; 1026 struct drm_display_mode *pmode, *pt; 1027 int found_it; 1028 1029 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1030 head) { 1031 found_it = 0; 1032 /* go through current modes checking for the new probed mode */ 1033 list_for_each_entry(mode, &connector->modes, head) { 1034 if (drm_mode_equal(pmode, mode)) { 1035 found_it = 1; 1036 /* if equal delete the probed mode */ 1037 mode->status = pmode->status; 1038 /* Merge type bits together */ 1039 mode->type |= pmode->type; 1040 list_del(&pmode->head); 1041 drm_mode_destroy(connector->dev, pmode); 1042 break; 1043 } 1044 } 1045 1046 if (!found_it) { 1047 list_move_tail(&pmode->head, &connector->modes); 1048 } 1049 } 1050 } 1051 EXPORT_SYMBOL(drm_mode_connector_list_update); 1052 1053 /** 1054 * drm_mode_parse_command_line_for_connector - parse command line for connector 1055 * @mode_option - per connector mode option 1056 * @connector - connector to parse line for 1057 * 1058 * This parses the connector specific then generic command lines for 1059 * modes and options to configure the connector. 1060 * 1061 * This uses the same parameters as the fb modedb.c, except for extra 1062 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1063 * 1064 * enable/enable Digital/disable bit at the end 1065 */ 1066 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1067 struct drm_connector *connector, 1068 struct drm_cmdline_mode *mode) 1069 { 1070 const char *name; 1071 unsigned int namelen; 1072 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1073 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1074 bool yres_specified = false, cvt = false, rb = false; 1075 bool interlace = false, margins = false, was_digit = false; 1076 int i; 1077 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1078 1079 #ifdef CONFIG_FB 1080 if (!mode_option) 1081 mode_option = fb_mode_option; 1082 #endif 1083 1084 if (!mode_option) { 1085 mode->specified = false; 1086 return false; 1087 } 1088 1089 name = mode_option; 1090 namelen = strlen(name); 1091 for (i = namelen-1; i >= 0; i--) { 1092 switch (name[i]) { 1093 case '@': 1094 if (!refresh_specified && !bpp_specified && 1095 !yres_specified && !cvt && !rb && was_digit) { 1096 refresh = simple_strtol(&name[i+1], NULL, 10); 1097 refresh_specified = true; 1098 was_digit = false; 1099 } else 1100 goto done; 1101 break; 1102 case '-': 1103 if (!bpp_specified && !yres_specified && !cvt && 1104 !rb && was_digit) { 1105 bpp = simple_strtol(&name[i+1], NULL, 10); 1106 bpp_specified = true; 1107 was_digit = false; 1108 } else 1109 goto done; 1110 break; 1111 case 'x': 1112 if (!yres_specified && was_digit) { 1113 yres = simple_strtol(&name[i+1], NULL, 10); 1114 yres_specified = true; 1115 was_digit = false; 1116 } else 1117 goto done; 1118 break; 1119 case '0' ... '9': 1120 was_digit = true; 1121 break; 1122 case 'M': 1123 if (yres_specified || cvt || was_digit) 1124 goto done; 1125 cvt = true; 1126 break; 1127 case 'R': 1128 if (yres_specified || cvt || rb || was_digit) 1129 goto done; 1130 rb = true; 1131 break; 1132 case 'm': 1133 if (cvt || yres_specified || was_digit) 1134 goto done; 1135 margins = true; 1136 break; 1137 case 'i': 1138 if (cvt || yres_specified || was_digit) 1139 goto done; 1140 interlace = true; 1141 break; 1142 case 'e': 1143 if (yres_specified || bpp_specified || refresh_specified || 1144 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1145 goto done; 1146 1147 force = DRM_FORCE_ON; 1148 break; 1149 case 'D': 1150 if (yres_specified || bpp_specified || refresh_specified || 1151 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1152 goto done; 1153 1154 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1155 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1156 force = DRM_FORCE_ON; 1157 else 1158 force = DRM_FORCE_ON_DIGITAL; 1159 break; 1160 case 'd': 1161 if (yres_specified || bpp_specified || refresh_specified || 1162 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1163 goto done; 1164 1165 force = DRM_FORCE_OFF; 1166 break; 1167 default: 1168 goto done; 1169 } 1170 } 1171 1172 if (i < 0 && yres_specified) { 1173 char *ch; 1174 xres = simple_strtol(name, &ch, 10); 1175 if ((ch != NULL) && (*ch == 'x')) 1176 res_specified = true; 1177 else 1178 i = ch - name; 1179 } else if (!yres_specified && was_digit) { 1180 /* catch mode that begins with digits but has no 'x' */ 1181 i = 0; 1182 } 1183 done: 1184 if (i >= 0) { 1185 printk(KERN_WARNING 1186 "parse error at position %i in video mode '%s'\n", 1187 i, name); 1188 mode->specified = false; 1189 return false; 1190 } 1191 1192 if (res_specified) { 1193 mode->specified = true; 1194 mode->xres = xres; 1195 mode->yres = yres; 1196 } 1197 1198 if (refresh_specified) { 1199 mode->refresh_specified = true; 1200 mode->refresh = refresh; 1201 } 1202 1203 if (bpp_specified) { 1204 mode->bpp_specified = true; 1205 mode->bpp = bpp; 1206 } 1207 mode->rb = rb; 1208 mode->cvt = cvt; 1209 mode->interlace = interlace; 1210 mode->margins = margins; 1211 mode->force = force; 1212 1213 return true; 1214 } 1215 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1216 1217 struct drm_display_mode * 1218 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1219 struct drm_cmdline_mode *cmd) 1220 { 1221 struct drm_display_mode *mode; 1222 1223 if (cmd->cvt) 1224 mode = drm_cvt_mode(dev, 1225 cmd->xres, cmd->yres, 1226 cmd->refresh_specified ? cmd->refresh : 60, 1227 cmd->rb, cmd->interlace, 1228 cmd->margins); 1229 else 1230 mode = drm_gtf_mode(dev, 1231 cmd->xres, cmd->yres, 1232 cmd->refresh_specified ? cmd->refresh : 60, 1233 cmd->interlace, 1234 cmd->margins); 1235 if (!mode) 1236 return NULL; 1237 1238 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1239 return mode; 1240 } 1241 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1242