1 /* 2 * Copyright © 1997-2003 by The XFree86 Project, Inc. 3 * Copyright © 2007 Dave Airlie 4 * Copyright © 2007-2008 Intel Corporation 5 * Jesse Barnes <jesse.barnes@intel.com> 6 * Copyright 2005-2006 Luc Verhaegen 7 * Copyright (c) 2001, Andy Ritger aritger@nvidia.com 8 * 9 * Permission is hereby granted, free of charge, to any person obtaining a 10 * copy of this software and associated documentation files (the "Software"), 11 * to deal in the Software without restriction, including without limitation 12 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 13 * and/or sell copies of the Software, and to permit persons to whom the 14 * Software is furnished to do so, subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice shall be included in 17 * all copies or substantial portions of the Software. 18 * 19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 22 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 25 * OTHER DEALINGS IN THE SOFTWARE. 26 * 27 * Except as contained in this notice, the name of the copyright holder(s) 28 * and author(s) shall not be used in advertising or otherwise to promote 29 * the sale, use or other dealings in this Software without prior written 30 * authorization from the copyright holder(s) and author(s). 31 */ 32 33 #include <linux/list.h> 34 #include <linux/export.h> 35 #include <drm/drmP.h> 36 #include <drm/drm_crtc.h> 37 #include <drm/drm_modes.h> 38 39 #include "drm_crtc_internal.h" 40 41 /** 42 * drm_mode_debug_printmodeline - print a mode to dmesg 43 * @mode: mode to print 44 * 45 * Describe @mode using DRM_DEBUG. 46 */ 47 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode) 48 { 49 DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d " 50 "0x%x 0x%x\n", 51 mode->base.id, mode->name, mode->vrefresh, mode->clock, 52 mode->hdisplay, mode->hsync_start, 53 mode->hsync_end, mode->htotal, 54 mode->vdisplay, mode->vsync_start, 55 mode->vsync_end, mode->vtotal, mode->type, mode->flags); 56 } 57 EXPORT_SYMBOL(drm_mode_debug_printmodeline); 58 59 /** 60 * drm_mode_create - create a new display mode 61 * @dev: DRM device 62 * 63 * Create a new, cleared drm_display_mode with kzalloc, allocate an ID for it 64 * and return it. 65 * 66 * Returns: 67 * Pointer to new mode on success, NULL on error. 68 */ 69 struct drm_display_mode *drm_mode_create(struct drm_device *dev) 70 { 71 struct drm_display_mode *nmode; 72 73 nmode = kzalloc(sizeof(struct drm_display_mode), GFP_KERNEL); 74 if (!nmode) 75 return NULL; 76 77 if (drm_mode_object_get(dev, &nmode->base, DRM_MODE_OBJECT_MODE)) { 78 kfree(nmode); 79 return NULL; 80 } 81 82 return nmode; 83 } 84 EXPORT_SYMBOL(drm_mode_create); 85 86 /** 87 * drm_mode_destroy - remove a mode 88 * @dev: DRM device 89 * @mode: mode to remove 90 * 91 * Release @mode's unique ID, then free it @mode structure itself using kfree. 92 */ 93 void drm_mode_destroy(struct drm_device *dev, struct drm_display_mode *mode) 94 { 95 if (!mode) 96 return; 97 98 drm_mode_object_put(dev, &mode->base); 99 100 kfree(mode); 101 } 102 EXPORT_SYMBOL(drm_mode_destroy); 103 104 /** 105 * drm_mode_probed_add - add a mode to a connector's probed_mode list 106 * @connector: connector the new mode 107 * @mode: mode data 108 * 109 * Add @mode to @connector's probed_mode list for later use. This list should 110 * then in a second step get filtered and all the modes actually supported by 111 * the hardware moved to the @connector's modes list. 112 */ 113 void drm_mode_probed_add(struct drm_connector *connector, 114 struct drm_display_mode *mode) 115 { 116 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); 117 118 list_add_tail(&mode->head, &connector->probed_modes); 119 } 120 EXPORT_SYMBOL(drm_mode_probed_add); 121 122 /** 123 * drm_cvt_mode -create a modeline based on the CVT algorithm 124 * @dev: drm device 125 * @hdisplay: hdisplay size 126 * @vdisplay: vdisplay size 127 * @vrefresh: vrefresh rate 128 * @reduced: whether to use reduced blanking 129 * @interlaced: whether to compute an interlaced mode 130 * @margins: whether to add margins (borders) 131 * 132 * This function is called to generate the modeline based on CVT algorithm 133 * according to the hdisplay, vdisplay, vrefresh. 134 * It is based from the VESA(TM) Coordinated Video Timing Generator by 135 * Graham Loveridge April 9, 2003 available at 136 * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls 137 * 138 * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c. 139 * What I have done is to translate it by using integer calculation. 140 * 141 * Returns: 142 * The modeline based on the CVT algorithm stored in a drm_display_mode object. 143 * The display mode object is allocated with drm_mode_create(). Returns NULL 144 * when no mode could be allocated. 145 */ 146 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay, 147 int vdisplay, int vrefresh, 148 bool reduced, bool interlaced, bool margins) 149 { 150 #define HV_FACTOR 1000 151 /* 1) top/bottom margin size (% of height) - default: 1.8, */ 152 #define CVT_MARGIN_PERCENTAGE 18 153 /* 2) character cell horizontal granularity (pixels) - default 8 */ 154 #define CVT_H_GRANULARITY 8 155 /* 3) Minimum vertical porch (lines) - default 3 */ 156 #define CVT_MIN_V_PORCH 3 157 /* 4) Minimum number of vertical back porch lines - default 6 */ 158 #define CVT_MIN_V_BPORCH 6 159 /* Pixel Clock step (kHz) */ 160 #define CVT_CLOCK_STEP 250 161 struct drm_display_mode *drm_mode; 162 unsigned int vfieldrate, hperiod; 163 int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync; 164 int interlace; 165 166 /* allocate the drm_display_mode structure. If failure, we will 167 * return directly 168 */ 169 drm_mode = drm_mode_create(dev); 170 if (!drm_mode) 171 return NULL; 172 173 /* the CVT default refresh rate is 60Hz */ 174 if (!vrefresh) 175 vrefresh = 60; 176 177 /* the required field fresh rate */ 178 if (interlaced) 179 vfieldrate = vrefresh * 2; 180 else 181 vfieldrate = vrefresh; 182 183 /* horizontal pixels */ 184 hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY); 185 186 /* determine the left&right borders */ 187 hmargin = 0; 188 if (margins) { 189 hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 190 hmargin -= hmargin % CVT_H_GRANULARITY; 191 } 192 /* find the total active pixels */ 193 drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin; 194 195 /* find the number of lines per field */ 196 if (interlaced) 197 vdisplay_rnd = vdisplay / 2; 198 else 199 vdisplay_rnd = vdisplay; 200 201 /* find the top & bottom borders */ 202 vmargin = 0; 203 if (margins) 204 vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000; 205 206 drm_mode->vdisplay = vdisplay + 2 * vmargin; 207 208 /* Interlaced */ 209 if (interlaced) 210 interlace = 1; 211 else 212 interlace = 0; 213 214 /* Determine VSync Width from aspect ratio */ 215 if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay)) 216 vsync = 4; 217 else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay)) 218 vsync = 5; 219 else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay)) 220 vsync = 6; 221 else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay)) 222 vsync = 7; 223 else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay)) 224 vsync = 7; 225 else /* custom */ 226 vsync = 10; 227 228 if (!reduced) { 229 /* simplify the GTF calculation */ 230 /* 4) Minimum time of vertical sync + back porch interval (µs) 231 * default 550.0 232 */ 233 int tmp1, tmp2; 234 #define CVT_MIN_VSYNC_BP 550 235 /* 3) Nominal HSync width (% of line period) - default 8 */ 236 #define CVT_HSYNC_PERCENTAGE 8 237 unsigned int hblank_percentage; 238 int vsyncandback_porch, vback_porch, hblank; 239 240 /* estimated the horizontal period */ 241 tmp1 = HV_FACTOR * 1000000 - 242 CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate; 243 tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 + 244 interlace; 245 hperiod = tmp1 * 2 / (tmp2 * vfieldrate); 246 247 tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1; 248 /* 9. Find number of lines in sync + backporch */ 249 if (tmp1 < (vsync + CVT_MIN_V_PORCH)) 250 vsyncandback_porch = vsync + CVT_MIN_V_PORCH; 251 else 252 vsyncandback_porch = tmp1; 253 /* 10. Find number of lines in back porch */ 254 vback_porch = vsyncandback_porch - vsync; 255 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + 256 vsyncandback_porch + CVT_MIN_V_PORCH; 257 /* 5) Definition of Horizontal blanking time limitation */ 258 /* Gradient (%/kHz) - default 600 */ 259 #define CVT_M_FACTOR 600 260 /* Offset (%) - default 40 */ 261 #define CVT_C_FACTOR 40 262 /* Blanking time scaling factor - default 128 */ 263 #define CVT_K_FACTOR 128 264 /* Scaling factor weighting - default 20 */ 265 #define CVT_J_FACTOR 20 266 #define CVT_M_PRIME (CVT_M_FACTOR * CVT_K_FACTOR / 256) 267 #define CVT_C_PRIME ((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \ 268 CVT_J_FACTOR) 269 /* 12. Find ideal blanking duty cycle from formula */ 270 hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME * 271 hperiod / 1000; 272 /* 13. Blanking time */ 273 if (hblank_percentage < 20 * HV_FACTOR) 274 hblank_percentage = 20 * HV_FACTOR; 275 hblank = drm_mode->hdisplay * hblank_percentage / 276 (100 * HV_FACTOR - hblank_percentage); 277 hblank -= hblank % (2 * CVT_H_GRANULARITY); 278 /* 14. find the total pixes per line */ 279 drm_mode->htotal = drm_mode->hdisplay + hblank; 280 drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2; 281 drm_mode->hsync_start = drm_mode->hsync_end - 282 (drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100; 283 drm_mode->hsync_start += CVT_H_GRANULARITY - 284 drm_mode->hsync_start % CVT_H_GRANULARITY; 285 /* fill the Vsync values */ 286 drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH; 287 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 288 } else { 289 /* Reduced blanking */ 290 /* Minimum vertical blanking interval time (µs)- default 460 */ 291 #define CVT_RB_MIN_VBLANK 460 292 /* Fixed number of clocks for horizontal sync */ 293 #define CVT_RB_H_SYNC 32 294 /* Fixed number of clocks for horizontal blanking */ 295 #define CVT_RB_H_BLANK 160 296 /* Fixed number of lines for vertical front porch - default 3*/ 297 #define CVT_RB_VFPORCH 3 298 int vbilines; 299 int tmp1, tmp2; 300 /* 8. Estimate Horizontal period. */ 301 tmp1 = HV_FACTOR * 1000000 - 302 CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate; 303 tmp2 = vdisplay_rnd + 2 * vmargin; 304 hperiod = tmp1 / (tmp2 * vfieldrate); 305 /* 9. Find number of lines in vertical blanking */ 306 vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1; 307 /* 10. Check if vertical blanking is sufficient */ 308 if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH)) 309 vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH; 310 /* 11. Find total number of lines in vertical field */ 311 drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines; 312 /* 12. Find total number of pixels in a line */ 313 drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK; 314 /* Fill in HSync values */ 315 drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2; 316 drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC; 317 /* Fill in VSync values */ 318 drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH; 319 drm_mode->vsync_end = drm_mode->vsync_start + vsync; 320 } 321 /* 15/13. Find pixel clock frequency (kHz for xf86) */ 322 drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod; 323 drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP; 324 /* 18/16. Find actual vertical frame frequency */ 325 /* ignore - just set the mode flag for interlaced */ 326 if (interlaced) { 327 drm_mode->vtotal *= 2; 328 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 329 } 330 /* Fill the mode line name */ 331 drm_mode_set_name(drm_mode); 332 if (reduced) 333 drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC | 334 DRM_MODE_FLAG_NVSYNC); 335 else 336 drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC | 337 DRM_MODE_FLAG_NHSYNC); 338 339 return drm_mode; 340 } 341 EXPORT_SYMBOL(drm_cvt_mode); 342 343 /** 344 * drm_gtf_mode_complex - create the modeline based on the full GTF algorithm 345 * @dev: drm device 346 * @hdisplay: hdisplay size 347 * @vdisplay: vdisplay size 348 * @vrefresh: vrefresh rate. 349 * @interlaced: whether to compute an interlaced mode 350 * @margins: desired margin (borders) size 351 * @GTF_M: extended GTF formula parameters 352 * @GTF_2C: extended GTF formula parameters 353 * @GTF_K: extended GTF formula parameters 354 * @GTF_2J: extended GTF formula parameters 355 * 356 * GTF feature blocks specify C and J in multiples of 0.5, so we pass them 357 * in here multiplied by two. For a C of 40, pass in 80. 358 * 359 * Returns: 360 * The modeline based on the full GTF algorithm stored in a drm_display_mode object. 361 * The display mode object is allocated with drm_mode_create(). Returns NULL 362 * when no mode could be allocated. 363 */ 364 struct drm_display_mode * 365 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay, 366 int vrefresh, bool interlaced, int margins, 367 int GTF_M, int GTF_2C, int GTF_K, int GTF_2J) 368 { /* 1) top/bottom margin size (% of height) - default: 1.8, */ 369 #define GTF_MARGIN_PERCENTAGE 18 370 /* 2) character cell horizontal granularity (pixels) - default 8 */ 371 #define GTF_CELL_GRAN 8 372 /* 3) Minimum vertical porch (lines) - default 3 */ 373 #define GTF_MIN_V_PORCH 1 374 /* width of vsync in lines */ 375 #define V_SYNC_RQD 3 376 /* width of hsync as % of total line */ 377 #define H_SYNC_PERCENT 8 378 /* min time of vsync + back porch (microsec) */ 379 #define MIN_VSYNC_PLUS_BP 550 380 /* C' and M' are part of the Blanking Duty Cycle computation */ 381 #define GTF_C_PRIME ((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2) 382 #define GTF_M_PRIME (GTF_K * GTF_M / 256) 383 struct drm_display_mode *drm_mode; 384 unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd; 385 int top_margin, bottom_margin; 386 int interlace; 387 unsigned int hfreq_est; 388 int vsync_plus_bp, vback_porch; 389 unsigned int vtotal_lines, vfieldrate_est, hperiod; 390 unsigned int vfield_rate, vframe_rate; 391 int left_margin, right_margin; 392 unsigned int total_active_pixels, ideal_duty_cycle; 393 unsigned int hblank, total_pixels, pixel_freq; 394 int hsync, hfront_porch, vodd_front_porch_lines; 395 unsigned int tmp1, tmp2; 396 397 drm_mode = drm_mode_create(dev); 398 if (!drm_mode) 399 return NULL; 400 401 /* 1. In order to give correct results, the number of horizontal 402 * pixels requested is first processed to ensure that it is divisible 403 * by the character size, by rounding it to the nearest character 404 * cell boundary: 405 */ 406 hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 407 hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN; 408 409 /* 2. If interlace is requested, the number of vertical lines assumed 410 * by the calculation must be halved, as the computation calculates 411 * the number of vertical lines per field. 412 */ 413 if (interlaced) 414 vdisplay_rnd = vdisplay / 2; 415 else 416 vdisplay_rnd = vdisplay; 417 418 /* 3. Find the frame rate required: */ 419 if (interlaced) 420 vfieldrate_rqd = vrefresh * 2; 421 else 422 vfieldrate_rqd = vrefresh; 423 424 /* 4. Find number of lines in Top margin: */ 425 top_margin = 0; 426 if (margins) 427 top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 428 1000; 429 /* 5. Find number of lines in bottom margin: */ 430 bottom_margin = top_margin; 431 432 /* 6. If interlace is required, then set variable interlace: */ 433 if (interlaced) 434 interlace = 1; 435 else 436 interlace = 0; 437 438 /* 7. Estimate the Horizontal frequency */ 439 { 440 tmp1 = (1000000 - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500; 441 tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) * 442 2 + interlace; 443 hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1; 444 } 445 446 /* 8. Find the number of lines in V sync + back porch */ 447 /* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */ 448 vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000; 449 vsync_plus_bp = (vsync_plus_bp + 500) / 1000; 450 /* 9. Find the number of lines in V back porch alone: */ 451 vback_porch = vsync_plus_bp - V_SYNC_RQD; 452 /* 10. Find the total number of lines in Vertical field period: */ 453 vtotal_lines = vdisplay_rnd + top_margin + bottom_margin + 454 vsync_plus_bp + GTF_MIN_V_PORCH; 455 /* 11. Estimate the Vertical field frequency: */ 456 vfieldrate_est = hfreq_est / vtotal_lines; 457 /* 12. Find the actual horizontal period: */ 458 hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines); 459 460 /* 13. Find the actual Vertical field frequency: */ 461 vfield_rate = hfreq_est / vtotal_lines; 462 /* 14. Find the Vertical frame frequency: */ 463 if (interlaced) 464 vframe_rate = vfield_rate / 2; 465 else 466 vframe_rate = vfield_rate; 467 /* 15. Find number of pixels in left margin: */ 468 if (margins) 469 left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) / 470 1000; 471 else 472 left_margin = 0; 473 474 /* 16.Find number of pixels in right margin: */ 475 right_margin = left_margin; 476 /* 17.Find total number of active pixels in image and left and right */ 477 total_active_pixels = hdisplay_rnd + left_margin + right_margin; 478 /* 18.Find the ideal blanking duty cycle from blanking duty cycle */ 479 ideal_duty_cycle = GTF_C_PRIME * 1000 - 480 (GTF_M_PRIME * 1000000 / hfreq_est); 481 /* 19.Find the number of pixels in the blanking time to the nearest 482 * double character cell: */ 483 hblank = total_active_pixels * ideal_duty_cycle / 484 (100000 - ideal_duty_cycle); 485 hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN); 486 hblank = hblank * 2 * GTF_CELL_GRAN; 487 /* 20.Find total number of pixels: */ 488 total_pixels = total_active_pixels + hblank; 489 /* 21.Find pixel clock frequency: */ 490 pixel_freq = total_pixels * hfreq_est / 1000; 491 /* Stage 1 computations are now complete; I should really pass 492 * the results to another function and do the Stage 2 computations, 493 * but I only need a few more values so I'll just append the 494 * computations here for now */ 495 /* 17. Find the number of pixels in the horizontal sync period: */ 496 hsync = H_SYNC_PERCENT * total_pixels / 100; 497 hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN; 498 hsync = hsync * GTF_CELL_GRAN; 499 /* 18. Find the number of pixels in horizontal front porch period */ 500 hfront_porch = hblank / 2 - hsync; 501 /* 36. Find the number of lines in the odd front porch period: */ 502 vodd_front_porch_lines = GTF_MIN_V_PORCH ; 503 504 /* finally, pack the results in the mode struct */ 505 drm_mode->hdisplay = hdisplay_rnd; 506 drm_mode->hsync_start = hdisplay_rnd + hfront_porch; 507 drm_mode->hsync_end = drm_mode->hsync_start + hsync; 508 drm_mode->htotal = total_pixels; 509 drm_mode->vdisplay = vdisplay_rnd; 510 drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines; 511 drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD; 512 drm_mode->vtotal = vtotal_lines; 513 514 drm_mode->clock = pixel_freq; 515 516 if (interlaced) { 517 drm_mode->vtotal *= 2; 518 drm_mode->flags |= DRM_MODE_FLAG_INTERLACE; 519 } 520 521 drm_mode_set_name(drm_mode); 522 if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40) 523 drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC; 524 else 525 drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC; 526 527 return drm_mode; 528 } 529 EXPORT_SYMBOL(drm_gtf_mode_complex); 530 531 /** 532 * drm_gtf_mode - create the modeline based on the GTF algorithm 533 * @dev: drm device 534 * @hdisplay: hdisplay size 535 * @vdisplay: vdisplay size 536 * @vrefresh: vrefresh rate. 537 * @interlaced: whether to compute an interlaced mode 538 * @margins: desired margin (borders) size 539 * 540 * return the modeline based on GTF algorithm 541 * 542 * This function is to create the modeline based on the GTF algorithm. 543 * Generalized Timing Formula is derived from: 544 * GTF Spreadsheet by Andy Morrish (1/5/97) 545 * available at http://www.vesa.org 546 * 547 * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c. 548 * What I have done is to translate it by using integer calculation. 549 * I also refer to the function of fb_get_mode in the file of 550 * drivers/video/fbmon.c 551 * 552 * Standard GTF parameters: 553 * M = 600 554 * C = 40 555 * K = 128 556 * J = 20 557 * 558 * Returns: 559 * The modeline based on the GTF algorithm stored in a drm_display_mode object. 560 * The display mode object is allocated with drm_mode_create(). Returns NULL 561 * when no mode could be allocated. 562 */ 563 struct drm_display_mode * 564 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh, 565 bool interlaced, int margins) 566 { 567 return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, 568 interlaced, margins, 569 600, 40 * 2, 128, 20 * 2); 570 } 571 EXPORT_SYMBOL(drm_gtf_mode); 572 573 #ifdef CONFIG_VIDEOMODE_HELPERS 574 /** 575 * drm_display_mode_from_videomode - fill in @dmode using @vm, 576 * @vm: videomode structure to use as source 577 * @dmode: drm_display_mode structure to use as destination 578 * 579 * Fills out @dmode using the display mode specified in @vm. 580 */ 581 void drm_display_mode_from_videomode(const struct videomode *vm, 582 struct drm_display_mode *dmode) 583 { 584 dmode->hdisplay = vm->hactive; 585 dmode->hsync_start = dmode->hdisplay + vm->hfront_porch; 586 dmode->hsync_end = dmode->hsync_start + vm->hsync_len; 587 dmode->htotal = dmode->hsync_end + vm->hback_porch; 588 589 dmode->vdisplay = vm->vactive; 590 dmode->vsync_start = dmode->vdisplay + vm->vfront_porch; 591 dmode->vsync_end = dmode->vsync_start + vm->vsync_len; 592 dmode->vtotal = dmode->vsync_end + vm->vback_porch; 593 594 dmode->clock = vm->pixelclock / 1000; 595 596 dmode->flags = 0; 597 if (vm->flags & DISPLAY_FLAGS_HSYNC_HIGH) 598 dmode->flags |= DRM_MODE_FLAG_PHSYNC; 599 else if (vm->flags & DISPLAY_FLAGS_HSYNC_LOW) 600 dmode->flags |= DRM_MODE_FLAG_NHSYNC; 601 if (vm->flags & DISPLAY_FLAGS_VSYNC_HIGH) 602 dmode->flags |= DRM_MODE_FLAG_PVSYNC; 603 else if (vm->flags & DISPLAY_FLAGS_VSYNC_LOW) 604 dmode->flags |= DRM_MODE_FLAG_NVSYNC; 605 if (vm->flags & DISPLAY_FLAGS_INTERLACED) 606 dmode->flags |= DRM_MODE_FLAG_INTERLACE; 607 if (vm->flags & DISPLAY_FLAGS_DOUBLESCAN) 608 dmode->flags |= DRM_MODE_FLAG_DBLSCAN; 609 if (vm->flags & DISPLAY_FLAGS_DOUBLECLK) 610 dmode->flags |= DRM_MODE_FLAG_DBLCLK; 611 drm_mode_set_name(dmode); 612 } 613 614 #ifdef CONFIG_OF 615 /** 616 * of_get_drm_display_mode - get a drm_display_mode from devicetree 617 * @np: device_node with the timing specification 618 * @dmode: will be set to the return value 619 * @index: index into the list of display timings in devicetree 620 * 621 * This function is expensive and should only be used, if only one mode is to be 622 * read from DT. To get multiple modes start with of_get_display_timings and 623 * work with that instead. 624 * 625 * Returns: 626 * 0 on success, a negative errno code when no of videomode node was found. 627 */ 628 int of_get_drm_display_mode(struct device_node *np, 629 struct drm_display_mode *dmode, int index) 630 { 631 struct videomode vm; 632 int ret; 633 634 ret = of_get_videomode(np, &vm, index); 635 if (ret) 636 return ret; 637 638 drm_display_mode_from_videomode(&vm, dmode); 639 640 pr_debug("%s: got %dx%d display mode from %s\n", 641 of_node_full_name(np), vm.hactive, vm.vactive, np->name); 642 drm_mode_debug_printmodeline(dmode); 643 644 return 0; 645 } 646 #endif /* CONFIG_OF */ 647 #endif /* CONFIG_VIDEOMODE_HELPERS */ 648 649 /** 650 * drm_mode_set_name - set the name on a mode 651 * @mode: name will be set in this mode 652 * 653 * Set the name of @mode to a standard format which is <hdisplay>x<vdisplay> 654 * with an optional 'i' suffix for interlaced modes. 655 */ 656 void drm_mode_set_name(struct drm_display_mode *mode) 657 { 658 bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE); 659 660 ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s", 661 mode->hdisplay, mode->vdisplay, 662 interlaced ? "i" : ""); 663 } 664 EXPORT_SYMBOL(drm_mode_set_name); 665 666 /** drm_mode_hsync - get the hsync of a mode 667 * @mode: mode 668 * 669 * Returns: 670 * @modes's hsync rate in kHz, rounded to the nearest integer. Calculates the 671 * value first if it is not yet set. 672 */ 673 int drm_mode_hsync(const struct drm_display_mode *mode) 674 { 675 unsigned int calc_val; 676 677 if (mode->hsync) 678 return mode->hsync; 679 680 if (mode->htotal < 0) 681 return 0; 682 683 calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */ 684 calc_val += 500; /* round to 1000Hz */ 685 calc_val /= 1000; /* truncate to kHz */ 686 687 return calc_val; 688 } 689 EXPORT_SYMBOL(drm_mode_hsync); 690 691 /** 692 * drm_mode_vrefresh - get the vrefresh of a mode 693 * @mode: mode 694 * 695 * Returns: 696 * @modes's vrefresh rate in Hz, rounded to the nearest integer. Calculates the 697 * value first if it is not yet set. 698 */ 699 int drm_mode_vrefresh(const struct drm_display_mode *mode) 700 { 701 int refresh = 0; 702 unsigned int calc_val; 703 704 if (mode->vrefresh > 0) 705 refresh = mode->vrefresh; 706 else if (mode->htotal > 0 && mode->vtotal > 0) { 707 int vtotal; 708 vtotal = mode->vtotal; 709 /* work out vrefresh the value will be x1000 */ 710 calc_val = (mode->clock * 1000); 711 calc_val /= mode->htotal; 712 refresh = (calc_val + vtotal / 2) / vtotal; 713 714 if (mode->flags & DRM_MODE_FLAG_INTERLACE) 715 refresh *= 2; 716 if (mode->flags & DRM_MODE_FLAG_DBLSCAN) 717 refresh /= 2; 718 if (mode->vscan > 1) 719 refresh /= mode->vscan; 720 } 721 return refresh; 722 } 723 EXPORT_SYMBOL(drm_mode_vrefresh); 724 725 /** 726 * drm_mode_set_crtcinfo - set CRTC modesetting timing parameters 727 * @p: mode 728 * @adjust_flags: a combination of adjustment flags 729 * 730 * Setup the CRTC modesetting timing parameters for @p, adjusting if necessary. 731 * 732 * - The CRTC_INTERLACE_HALVE_V flag can be used to halve vertical timings of 733 * interlaced modes. 734 * - The CRTC_STEREO_DOUBLE flag can be used to compute the timings for 735 * buffers containing two eyes (only adjust the timings when needed, eg. for 736 * "frame packing" or "side by side full"). 737 */ 738 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags) 739 { 740 if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN)) 741 return; 742 743 p->crtc_clock = p->clock; 744 p->crtc_hdisplay = p->hdisplay; 745 p->crtc_hsync_start = p->hsync_start; 746 p->crtc_hsync_end = p->hsync_end; 747 p->crtc_htotal = p->htotal; 748 p->crtc_hskew = p->hskew; 749 p->crtc_vdisplay = p->vdisplay; 750 p->crtc_vsync_start = p->vsync_start; 751 p->crtc_vsync_end = p->vsync_end; 752 p->crtc_vtotal = p->vtotal; 753 754 if (p->flags & DRM_MODE_FLAG_INTERLACE) { 755 if (adjust_flags & CRTC_INTERLACE_HALVE_V) { 756 p->crtc_vdisplay /= 2; 757 p->crtc_vsync_start /= 2; 758 p->crtc_vsync_end /= 2; 759 p->crtc_vtotal /= 2; 760 } 761 } 762 763 if (p->flags & DRM_MODE_FLAG_DBLSCAN) { 764 p->crtc_vdisplay *= 2; 765 p->crtc_vsync_start *= 2; 766 p->crtc_vsync_end *= 2; 767 p->crtc_vtotal *= 2; 768 } 769 770 if (p->vscan > 1) { 771 p->crtc_vdisplay *= p->vscan; 772 p->crtc_vsync_start *= p->vscan; 773 p->crtc_vsync_end *= p->vscan; 774 p->crtc_vtotal *= p->vscan; 775 } 776 777 if (adjust_flags & CRTC_STEREO_DOUBLE) { 778 unsigned int layout = p->flags & DRM_MODE_FLAG_3D_MASK; 779 780 switch (layout) { 781 case DRM_MODE_FLAG_3D_FRAME_PACKING: 782 p->crtc_clock *= 2; 783 p->crtc_vdisplay += p->crtc_vtotal; 784 p->crtc_vsync_start += p->crtc_vtotal; 785 p->crtc_vsync_end += p->crtc_vtotal; 786 p->crtc_vtotal += p->crtc_vtotal; 787 break; 788 } 789 } 790 791 p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay); 792 p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal); 793 p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay); 794 p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal); 795 } 796 EXPORT_SYMBOL(drm_mode_set_crtcinfo); 797 798 /** 799 * drm_mode_copy - copy the mode 800 * @dst: mode to overwrite 801 * @src: mode to copy 802 * 803 * Copy an existing mode into another mode, preserving the object id and 804 * list head of the destination mode. 805 */ 806 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src) 807 { 808 int id = dst->base.id; 809 struct list_head head = dst->head; 810 811 *dst = *src; 812 dst->base.id = id; 813 dst->head = head; 814 } 815 EXPORT_SYMBOL(drm_mode_copy); 816 817 /** 818 * drm_mode_duplicate - allocate and duplicate an existing mode 819 * @dev: drm_device to allocate the duplicated mode for 820 * @mode: mode to duplicate 821 * 822 * Just allocate a new mode, copy the existing mode into it, and return 823 * a pointer to it. Used to create new instances of established modes. 824 * 825 * Returns: 826 * Pointer to duplicated mode on success, NULL on error. 827 */ 828 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev, 829 const struct drm_display_mode *mode) 830 { 831 struct drm_display_mode *nmode; 832 833 nmode = drm_mode_create(dev); 834 if (!nmode) 835 return NULL; 836 837 drm_mode_copy(nmode, mode); 838 839 return nmode; 840 } 841 EXPORT_SYMBOL(drm_mode_duplicate); 842 843 /** 844 * drm_mode_equal - test modes for equality 845 * @mode1: first mode 846 * @mode2: second mode 847 * 848 * Check to see if @mode1 and @mode2 are equivalent. 849 * 850 * Returns: 851 * True if the modes are equal, false otherwise. 852 */ 853 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2) 854 { 855 /* do clock check convert to PICOS so fb modes get matched 856 * the same */ 857 if (mode1->clock && mode2->clock) { 858 if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock)) 859 return false; 860 } else if (mode1->clock != mode2->clock) 861 return false; 862 863 if ((mode1->flags & DRM_MODE_FLAG_3D_MASK) != 864 (mode2->flags & DRM_MODE_FLAG_3D_MASK)) 865 return false; 866 867 return drm_mode_equal_no_clocks_no_stereo(mode1, mode2); 868 } 869 EXPORT_SYMBOL(drm_mode_equal); 870 871 /** 872 * drm_mode_equal_no_clocks_no_stereo - test modes for equality 873 * @mode1: first mode 874 * @mode2: second mode 875 * 876 * Check to see if @mode1 and @mode2 are equivalent, but 877 * don't check the pixel clocks nor the stereo layout. 878 * 879 * Returns: 880 * True if the modes are equal, false otherwise. 881 */ 882 bool drm_mode_equal_no_clocks_no_stereo(const struct drm_display_mode *mode1, 883 const struct drm_display_mode *mode2) 884 { 885 if (mode1->hdisplay == mode2->hdisplay && 886 mode1->hsync_start == mode2->hsync_start && 887 mode1->hsync_end == mode2->hsync_end && 888 mode1->htotal == mode2->htotal && 889 mode1->hskew == mode2->hskew && 890 mode1->vdisplay == mode2->vdisplay && 891 mode1->vsync_start == mode2->vsync_start && 892 mode1->vsync_end == mode2->vsync_end && 893 mode1->vtotal == mode2->vtotal && 894 mode1->vscan == mode2->vscan && 895 (mode1->flags & ~DRM_MODE_FLAG_3D_MASK) == 896 (mode2->flags & ~DRM_MODE_FLAG_3D_MASK)) 897 return true; 898 899 return false; 900 } 901 EXPORT_SYMBOL(drm_mode_equal_no_clocks_no_stereo); 902 903 /** 904 * drm_mode_validate_size - make sure modes adhere to size constraints 905 * @dev: DRM device 906 * @mode_list: list of modes to check 907 * @maxX: maximum width 908 * @maxY: maximum height 909 * 910 * This function is a helper which can be used to validate modes against size 911 * limitations of the DRM device/connector. If a mode is too big its status 912 * memeber is updated with the appropriate validation failure code. The list 913 * itself is not changed. 914 */ 915 void drm_mode_validate_size(struct drm_device *dev, 916 struct list_head *mode_list, 917 int maxX, int maxY) 918 { 919 struct drm_display_mode *mode; 920 921 list_for_each_entry(mode, mode_list, head) { 922 if (maxX > 0 && mode->hdisplay > maxX) 923 mode->status = MODE_VIRTUAL_X; 924 925 if (maxY > 0 && mode->vdisplay > maxY) 926 mode->status = MODE_VIRTUAL_Y; 927 } 928 } 929 EXPORT_SYMBOL(drm_mode_validate_size); 930 931 /** 932 * drm_mode_prune_invalid - remove invalid modes from mode list 933 * @dev: DRM device 934 * @mode_list: list of modes to check 935 * @verbose: be verbose about it 936 * 937 * This helper function can be used to prune a display mode list after 938 * validation has been completed. All modes who's status is not MODE_OK will be 939 * removed from the list, and if @verbose the status code and mode name is also 940 * printed to dmesg. 941 */ 942 void drm_mode_prune_invalid(struct drm_device *dev, 943 struct list_head *mode_list, bool verbose) 944 { 945 struct drm_display_mode *mode, *t; 946 947 list_for_each_entry_safe(mode, t, mode_list, head) { 948 if (mode->status != MODE_OK) { 949 list_del(&mode->head); 950 if (verbose) { 951 drm_mode_debug_printmodeline(mode); 952 DRM_DEBUG_KMS("Not using %s mode %d\n", 953 mode->name, mode->status); 954 } 955 drm_mode_destroy(dev, mode); 956 } 957 } 958 } 959 EXPORT_SYMBOL(drm_mode_prune_invalid); 960 961 /** 962 * drm_mode_compare - compare modes for favorability 963 * @priv: unused 964 * @lh_a: list_head for first mode 965 * @lh_b: list_head for second mode 966 * 967 * Compare two modes, given by @lh_a and @lh_b, returning a value indicating 968 * which is better. 969 * 970 * Returns: 971 * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or 972 * positive if @lh_b is better than @lh_a. 973 */ 974 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b) 975 { 976 struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head); 977 struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head); 978 int diff; 979 980 diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) - 981 ((a->type & DRM_MODE_TYPE_PREFERRED) != 0); 982 if (diff) 983 return diff; 984 diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay; 985 if (diff) 986 return diff; 987 988 diff = b->vrefresh - a->vrefresh; 989 if (diff) 990 return diff; 991 992 diff = b->clock - a->clock; 993 return diff; 994 } 995 996 /** 997 * drm_mode_sort - sort mode list 998 * @mode_list: list of drm_display_mode structures to sort 999 * 1000 * Sort @mode_list by favorability, moving good modes to the head of the list. 1001 */ 1002 void drm_mode_sort(struct list_head *mode_list) 1003 { 1004 drm_list_sort(NULL, mode_list, drm_mode_compare); 1005 } 1006 EXPORT_SYMBOL(drm_mode_sort); 1007 1008 /** 1009 * drm_mode_connector_list_update - update the mode list for the connector 1010 * @connector: the connector to update 1011 * @merge_type_bits: whether to merge or overright type bits. 1012 * 1013 * This moves the modes from the @connector probed_modes list 1014 * to the actual mode list. It compares the probed mode against the current 1015 * list and only adds different/new modes. 1016 * 1017 * This is just a helper functions doesn't validate any modes itself and also 1018 * doesn't prune any invalid modes. Callers need to do that themselves. 1019 */ 1020 void drm_mode_connector_list_update(struct drm_connector *connector, 1021 bool merge_type_bits) 1022 { 1023 struct drm_display_mode *mode; 1024 struct drm_display_mode *pmode, *pt; 1025 int found_it; 1026 1027 WARN_ON(!mutex_is_locked(&connector->dev->mode_config.mutex)); 1028 1029 list_for_each_entry_safe(pmode, pt, &connector->probed_modes, 1030 head) { 1031 found_it = 0; 1032 /* go through current modes checking for the new probed mode */ 1033 list_for_each_entry(mode, &connector->modes, head) { 1034 if (drm_mode_equal(pmode, mode)) { 1035 found_it = 1; 1036 /* if equal delete the probed mode */ 1037 mode->status = pmode->status; 1038 /* Merge type bits together */ 1039 if (merge_type_bits) 1040 mode->type |= pmode->type; 1041 else 1042 mode->type = pmode->type; 1043 list_del(&pmode->head); 1044 drm_mode_destroy(connector->dev, pmode); 1045 break; 1046 } 1047 } 1048 1049 if (!found_it) { 1050 list_move_tail(&pmode->head, &connector->modes); 1051 } 1052 } 1053 } 1054 EXPORT_SYMBOL(drm_mode_connector_list_update); 1055 1056 /** 1057 * drm_mode_parse_command_line_for_connector - parse command line modeline for connector 1058 * @mode_option: optional per connector mode option 1059 * @connector: connector to parse modeline for 1060 * @mode: preallocated drm_cmdline_mode structure to fill out 1061 * 1062 * This parses @mode_option command line modeline for modes and options to 1063 * configure the connector. If @mode_option is NULL the default command line 1064 * modeline in fb_mode_option will be parsed instead. 1065 * 1066 * This uses the same parameters as the fb modedb.c, except for an extra 1067 * force-enable, force-enable-digital and force-disable bit at the end: 1068 * 1069 * <xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd] 1070 * 1071 * The intermediate drm_cmdline_mode structure is required to store additional 1072 * options from the command line modline like the force-enabel/disable flag. 1073 * 1074 * Returns: 1075 * True if a valid modeline has been parsed, false otherwise. 1076 */ 1077 bool drm_mode_parse_command_line_for_connector(const char *mode_option, 1078 struct drm_connector *connector, 1079 struct drm_cmdline_mode *mode) 1080 { 1081 const char *name; 1082 unsigned int namelen; 1083 bool res_specified = false, bpp_specified = false, refresh_specified = false; 1084 unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0; 1085 bool yres_specified = false, cvt = false, rb = false; 1086 bool interlace = false, margins = false, was_digit = false; 1087 int i; 1088 enum drm_connector_force force = DRM_FORCE_UNSPECIFIED; 1089 1090 #ifdef CONFIG_FB 1091 if (!mode_option) 1092 mode_option = fb_mode_option; 1093 #endif 1094 1095 if (!mode_option) { 1096 mode->specified = false; 1097 return false; 1098 } 1099 1100 name = mode_option; 1101 namelen = strlen(name); 1102 for (i = namelen-1; i >= 0; i--) { 1103 switch (name[i]) { 1104 case '@': 1105 if (!refresh_specified && !bpp_specified && 1106 !yres_specified && !cvt && !rb && was_digit) { 1107 refresh = simple_strtol(&name[i+1], NULL, 10); 1108 refresh_specified = true; 1109 was_digit = false; 1110 } else 1111 goto done; 1112 break; 1113 case '-': 1114 if (!bpp_specified && !yres_specified && !cvt && 1115 !rb && was_digit) { 1116 bpp = simple_strtol(&name[i+1], NULL, 10); 1117 bpp_specified = true; 1118 was_digit = false; 1119 } else 1120 goto done; 1121 break; 1122 case 'x': 1123 if (!yres_specified && was_digit) { 1124 yres = simple_strtol(&name[i+1], NULL, 10); 1125 yres_specified = true; 1126 was_digit = false; 1127 } else 1128 goto done; 1129 break; 1130 case '0' ... '9': 1131 was_digit = true; 1132 break; 1133 case 'M': 1134 if (yres_specified || cvt || was_digit) 1135 goto done; 1136 cvt = true; 1137 break; 1138 case 'R': 1139 if (yres_specified || cvt || rb || was_digit) 1140 goto done; 1141 rb = true; 1142 break; 1143 case 'm': 1144 if (cvt || yres_specified || was_digit) 1145 goto done; 1146 margins = true; 1147 break; 1148 case 'i': 1149 if (cvt || yres_specified || was_digit) 1150 goto done; 1151 interlace = true; 1152 break; 1153 case 'e': 1154 if (yres_specified || bpp_specified || refresh_specified || 1155 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1156 goto done; 1157 1158 force = DRM_FORCE_ON; 1159 break; 1160 case 'D': 1161 if (yres_specified || bpp_specified || refresh_specified || 1162 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1163 goto done; 1164 1165 if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) && 1166 (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB)) 1167 force = DRM_FORCE_ON; 1168 else 1169 force = DRM_FORCE_ON_DIGITAL; 1170 break; 1171 case 'd': 1172 if (yres_specified || bpp_specified || refresh_specified || 1173 was_digit || (force != DRM_FORCE_UNSPECIFIED)) 1174 goto done; 1175 1176 force = DRM_FORCE_OFF; 1177 break; 1178 default: 1179 goto done; 1180 } 1181 } 1182 1183 if (i < 0 && yres_specified) { 1184 char *ch; 1185 xres = simple_strtol(name, &ch, 10); 1186 if ((ch != NULL) && (*ch == 'x')) 1187 res_specified = true; 1188 else 1189 i = ch - name; 1190 } else if (!yres_specified && was_digit) { 1191 /* catch mode that begins with digits but has no 'x' */ 1192 i = 0; 1193 } 1194 done: 1195 if (i >= 0) { 1196 printk(KERN_WARNING 1197 "parse error at position %i in video mode '%s'\n", 1198 i, name); 1199 mode->specified = false; 1200 return false; 1201 } 1202 1203 if (res_specified) { 1204 mode->specified = true; 1205 mode->xres = xres; 1206 mode->yres = yres; 1207 } 1208 1209 if (refresh_specified) { 1210 mode->refresh_specified = true; 1211 mode->refresh = refresh; 1212 } 1213 1214 if (bpp_specified) { 1215 mode->bpp_specified = true; 1216 mode->bpp = bpp; 1217 } 1218 mode->rb = rb; 1219 mode->cvt = cvt; 1220 mode->interlace = interlace; 1221 mode->margins = margins; 1222 mode->force = force; 1223 1224 return true; 1225 } 1226 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector); 1227 1228 /** 1229 * drm_mode_create_from_cmdline_mode - convert a command line modeline into a DRM display mode 1230 * @dev: DRM device to create the new mode for 1231 * @cmd: input command line modeline 1232 * 1233 * Returns: 1234 * Pointer to converted mode on success, NULL on error. 1235 */ 1236 struct drm_display_mode * 1237 drm_mode_create_from_cmdline_mode(struct drm_device *dev, 1238 struct drm_cmdline_mode *cmd) 1239 { 1240 struct drm_display_mode *mode; 1241 1242 if (cmd->cvt) 1243 mode = drm_cvt_mode(dev, 1244 cmd->xres, cmd->yres, 1245 cmd->refresh_specified ? cmd->refresh : 60, 1246 cmd->rb, cmd->interlace, 1247 cmd->margins); 1248 else 1249 mode = drm_gtf_mode(dev, 1250 cmd->xres, cmd->yres, 1251 cmd->refresh_specified ? cmd->refresh : 60, 1252 cmd->interlace, 1253 cmd->margins); 1254 if (!mode) 1255 return NULL; 1256 1257 drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V); 1258 return mode; 1259 } 1260 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode); 1261