xref: /dragonfly/sys/dev/drm/drm_modes.c (revision d4ef6694)
1 /*
2  * Copyright © 1997-2003 by The XFree86 Project, Inc.
3  * Copyright © 2007 Dave Airlie
4  * Copyright © 2007-2008 Intel Corporation
5  *   Jesse Barnes <jesse.barnes@intel.com>
6  * Copyright 2005-2006 Luc Verhaegen
7  * Copyright (c) 2001, Andy Ritger  aritger@nvidia.com
8  *
9  * Permission is hereby granted, free of charge, to any person obtaining a
10  * copy of this software and associated documentation files (the "Software"),
11  * to deal in the Software without restriction, including without limitation
12  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13  * and/or sell copies of the Software, and to permit persons to whom the
14  * Software is furnished to do so, subject to the following conditions:
15  *
16  * The above copyright notice and this permission notice shall be included in
17  * all copies or substantial portions of the Software.
18  *
19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
22  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
23  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
25  * OTHER DEALINGS IN THE SOFTWARE.
26  *
27  * Except as contained in this notice, the name of the copyright holder(s)
28  * and author(s) shall not be used in advertising or otherwise to promote
29  * the sale, use or other dealings in this Software without prior written
30  * authorization from the copyright holder(s) and author(s).
31  */
32 
33 #include <linux/kernel.h>
34 #include <linux/list.h>
35 #include <linux/export.h>
36 #include <drm/drmP.h>
37 #include <drm/drm_crtc.h>
38 
39 #define	KHZ2PICOS(a)	(1000000000UL/(a))
40 
41 /**
42  * drm_mode_debug_printmodeline - debug print a mode
43  * @dev: DRM device
44  * @mode: mode to print
45  *
46  * LOCKING:
47  * None.
48  *
49  * Describe @mode using DRM_DEBUG.
50  */
51 void drm_mode_debug_printmodeline(const struct drm_display_mode *mode)
52 {
53 	DRM_DEBUG_KMS("Modeline %d:\"%s\" %d %d %d %d %d %d %d %d %d %d "
54 			"0x%x 0x%x\n",
55 		mode->base.id, mode->name, mode->vrefresh, mode->clock,
56 		mode->hdisplay, mode->hsync_start,
57 		mode->hsync_end, mode->htotal,
58 		mode->vdisplay, mode->vsync_start,
59 		mode->vsync_end, mode->vtotal, mode->type, mode->flags);
60 }
61 EXPORT_SYMBOL(drm_mode_debug_printmodeline);
62 
63 /**
64  * drm_cvt_mode -create a modeline based on CVT algorithm
65  * @dev: DRM device
66  * @hdisplay: hdisplay size
67  * @vdisplay: vdisplay size
68  * @vrefresh  : vrefresh rate
69  * @reduced : Whether the GTF calculation is simplified
70  * @interlaced:Whether the interlace is supported
71  *
72  * LOCKING:
73  * none.
74  *
75  * return the modeline based on CVT algorithm
76  *
77  * This function is called to generate the modeline based on CVT algorithm
78  * according to the hdisplay, vdisplay, vrefresh.
79  * It is based from the VESA(TM) Coordinated Video Timing Generator by
80  * Graham Loveridge April 9, 2003 available at
81  * http://www.elo.utfsm.cl/~elo212/docs/CVTd6r1.xls
82  *
83  * And it is copied from xf86CVTmode in xserver/hw/xfree86/modes/xf86cvt.c.
84  * What I have done is to translate it by using integer calculation.
85  */
86 #define HV_FACTOR			1000
87 struct drm_display_mode *drm_cvt_mode(struct drm_device *dev, int hdisplay,
88 				      int vdisplay, int vrefresh,
89 				      bool reduced, bool interlaced, bool margins)
90 {
91 	/* 1) top/bottom margin size (% of height) - default: 1.8, */
92 #define	CVT_MARGIN_PERCENTAGE		18
93 	/* 2) character cell horizontal granularity (pixels) - default 8 */
94 #define	CVT_H_GRANULARITY		8
95 	/* 3) Minimum vertical porch (lines) - default 3 */
96 #define	CVT_MIN_V_PORCH			3
97 	/* 4) Minimum number of vertical back porch lines - default 6 */
98 #define	CVT_MIN_V_BPORCH		6
99 	/* Pixel Clock step (kHz) */
100 #define CVT_CLOCK_STEP			250
101 	struct drm_display_mode *drm_mode;
102 	unsigned int vfieldrate, hperiod;
103 	int hdisplay_rnd, hmargin, vdisplay_rnd, vmargin, vsync;
104 	int interlace;
105 
106 	/* allocate the drm_display_mode structure. If failure, we will
107 	 * return directly
108 	 */
109 	drm_mode = drm_mode_create(dev);
110 	if (!drm_mode)
111 		return NULL;
112 
113 	/* the CVT default refresh rate is 60Hz */
114 	if (!vrefresh)
115 		vrefresh = 60;
116 
117 	/* the required field fresh rate */
118 	if (interlaced)
119 		vfieldrate = vrefresh * 2;
120 	else
121 		vfieldrate = vrefresh;
122 
123 	/* horizontal pixels */
124 	hdisplay_rnd = hdisplay - (hdisplay % CVT_H_GRANULARITY);
125 
126 	/* determine the left&right borders */
127 	hmargin = 0;
128 	if (margins) {
129 		hmargin = hdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
130 		hmargin -= hmargin % CVT_H_GRANULARITY;
131 	}
132 	/* find the total active pixels */
133 	drm_mode->hdisplay = hdisplay_rnd + 2 * hmargin;
134 
135 	/* find the number of lines per field */
136 	if (interlaced)
137 		vdisplay_rnd = vdisplay / 2;
138 	else
139 		vdisplay_rnd = vdisplay;
140 
141 	/* find the top & bottom borders */
142 	vmargin = 0;
143 	if (margins)
144 		vmargin = vdisplay_rnd * CVT_MARGIN_PERCENTAGE / 1000;
145 
146 	drm_mode->vdisplay = vdisplay + 2 * vmargin;
147 
148 	/* Interlaced */
149 	if (interlaced)
150 		interlace = 1;
151 	else
152 		interlace = 0;
153 
154 	/* Determine VSync Width from aspect ratio */
155 	if (!(vdisplay % 3) && ((vdisplay * 4 / 3) == hdisplay))
156 		vsync = 4;
157 	else if (!(vdisplay % 9) && ((vdisplay * 16 / 9) == hdisplay))
158 		vsync = 5;
159 	else if (!(vdisplay % 10) && ((vdisplay * 16 / 10) == hdisplay))
160 		vsync = 6;
161 	else if (!(vdisplay % 4) && ((vdisplay * 5 / 4) == hdisplay))
162 		vsync = 7;
163 	else if (!(vdisplay % 9) && ((vdisplay * 15 / 9) == hdisplay))
164 		vsync = 7;
165 	else /* custom */
166 		vsync = 10;
167 
168 	if (!reduced) {
169 		/* simplify the GTF calculation */
170 		/* 4) Minimum time of vertical sync + back porch interval (µs)
171 		 * default 550.0
172 		 */
173 		int tmp1, tmp2;
174 #define CVT_MIN_VSYNC_BP	550
175 		/* 3) Nominal HSync width (% of line period) - default 8 */
176 #define CVT_HSYNC_PERCENTAGE	8
177 		unsigned int hblank_percentage;
178 		int vsyncandback_porch, vback_porch, hblank;
179 
180 		/* estimated the horizontal period */
181 		tmp1 = HV_FACTOR * 1000000  -
182 				CVT_MIN_VSYNC_BP * HV_FACTOR * vfieldrate;
183 		tmp2 = (vdisplay_rnd + 2 * vmargin + CVT_MIN_V_PORCH) * 2 +
184 				interlace;
185 		hperiod = tmp1 * 2 / (tmp2 * vfieldrate);
186 
187 		tmp1 = CVT_MIN_VSYNC_BP * HV_FACTOR / hperiod + 1;
188 		/* 9. Find number of lines in sync + backporch */
189 		if (tmp1 < (vsync + CVT_MIN_V_PORCH))
190 			vsyncandback_porch = vsync + CVT_MIN_V_PORCH;
191 		else
192 			vsyncandback_porch = tmp1;
193 		/* 10. Find number of lines in back porch */
194 		vback_porch = vsyncandback_porch - vsync;
195 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin +
196 				vsyncandback_porch + CVT_MIN_V_PORCH;
197 		/* 5) Definition of Horizontal blanking time limitation */
198 		/* Gradient (%/kHz) - default 600 */
199 #define CVT_M_FACTOR	600
200 		/* Offset (%) - default 40 */
201 #define CVT_C_FACTOR	40
202 		/* Blanking time scaling factor - default 128 */
203 #define CVT_K_FACTOR	128
204 		/* Scaling factor weighting - default 20 */
205 #define CVT_J_FACTOR	20
206 #define CVT_M_PRIME	(CVT_M_FACTOR * CVT_K_FACTOR / 256)
207 #define CVT_C_PRIME	((CVT_C_FACTOR - CVT_J_FACTOR) * CVT_K_FACTOR / 256 + \
208 			 CVT_J_FACTOR)
209 		/* 12. Find ideal blanking duty cycle from formula */
210 		hblank_percentage = CVT_C_PRIME * HV_FACTOR - CVT_M_PRIME *
211 					hperiod / 1000;
212 		/* 13. Blanking time */
213 		if (hblank_percentage < 20 * HV_FACTOR)
214 			hblank_percentage = 20 * HV_FACTOR;
215 		hblank = drm_mode->hdisplay * hblank_percentage /
216 			 (100 * HV_FACTOR - hblank_percentage);
217 		hblank -= hblank % (2 * CVT_H_GRANULARITY);
218 		/* 14. find the total pixes per line */
219 		drm_mode->htotal = drm_mode->hdisplay + hblank;
220 		drm_mode->hsync_end = drm_mode->hdisplay + hblank / 2;
221 		drm_mode->hsync_start = drm_mode->hsync_end -
222 			(drm_mode->htotal * CVT_HSYNC_PERCENTAGE) / 100;
223 		drm_mode->hsync_start += CVT_H_GRANULARITY -
224 			drm_mode->hsync_start % CVT_H_GRANULARITY;
225 		/* fill the Vsync values */
226 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_MIN_V_PORCH;
227 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
228 	} else {
229 		/* Reduced blanking */
230 		/* Minimum vertical blanking interval time (µs)- default 460 */
231 #define CVT_RB_MIN_VBLANK	460
232 		/* Fixed number of clocks for horizontal sync */
233 #define CVT_RB_H_SYNC		32
234 		/* Fixed number of clocks for horizontal blanking */
235 #define CVT_RB_H_BLANK		160
236 		/* Fixed number of lines for vertical front porch - default 3*/
237 #define CVT_RB_VFPORCH		3
238 		int vbilines;
239 		int tmp1, tmp2;
240 		/* 8. Estimate Horizontal period. */
241 		tmp1 = HV_FACTOR * 1000000 -
242 			CVT_RB_MIN_VBLANK * HV_FACTOR * vfieldrate;
243 		tmp2 = vdisplay_rnd + 2 * vmargin;
244 		hperiod = tmp1 / (tmp2 * vfieldrate);
245 		/* 9. Find number of lines in vertical blanking */
246 		vbilines = CVT_RB_MIN_VBLANK * HV_FACTOR / hperiod + 1;
247 		/* 10. Check if vertical blanking is sufficient */
248 		if (vbilines < (CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH))
249 			vbilines = CVT_RB_VFPORCH + vsync + CVT_MIN_V_BPORCH;
250 		/* 11. Find total number of lines in vertical field */
251 		drm_mode->vtotal = vdisplay_rnd + 2 * vmargin + vbilines;
252 		/* 12. Find total number of pixels in a line */
253 		drm_mode->htotal = drm_mode->hdisplay + CVT_RB_H_BLANK;
254 		/* Fill in HSync values */
255 		drm_mode->hsync_end = drm_mode->hdisplay + CVT_RB_H_BLANK / 2;
256 		drm_mode->hsync_start = drm_mode->hsync_end - CVT_RB_H_SYNC;
257 		/* Fill in VSync values */
258 		drm_mode->vsync_start = drm_mode->vdisplay + CVT_RB_VFPORCH;
259 		drm_mode->vsync_end = drm_mode->vsync_start + vsync;
260 	}
261 	/* 15/13. Find pixel clock frequency (kHz for xf86) */
262 	drm_mode->clock = drm_mode->htotal * HV_FACTOR * 1000 / hperiod;
263 	drm_mode->clock -= drm_mode->clock % CVT_CLOCK_STEP;
264 	/* 18/16. Find actual vertical frame frequency */
265 	/* ignore - just set the mode flag for interlaced */
266 	if (interlaced) {
267 		drm_mode->vtotal *= 2;
268 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
269 	}
270 	/* Fill the mode line name */
271 	drm_mode_set_name(drm_mode);
272 	if (reduced)
273 		drm_mode->flags |= (DRM_MODE_FLAG_PHSYNC |
274 					DRM_MODE_FLAG_NVSYNC);
275 	else
276 		drm_mode->flags |= (DRM_MODE_FLAG_PVSYNC |
277 					DRM_MODE_FLAG_NHSYNC);
278 
279 	return drm_mode;
280 }
281 EXPORT_SYMBOL(drm_cvt_mode);
282 
283 /**
284  * drm_gtf_mode_complex - create the modeline based on full GTF algorithm
285  *
286  * @dev		:drm device
287  * @hdisplay	:hdisplay size
288  * @vdisplay	:vdisplay size
289  * @vrefresh	:vrefresh rate.
290  * @interlaced	:whether the interlace is supported
291  * @margins	:desired margin size
292  * @GTF_[MCKJ]  :extended GTF formula parameters
293  *
294  * LOCKING.
295  * none.
296  *
297  * return the modeline based on full GTF algorithm.
298  *
299  * GTF feature blocks specify C and J in multiples of 0.5, so we pass them
300  * in here multiplied by two.  For a C of 40, pass in 80.
301  */
302 struct drm_display_mode *
303 drm_gtf_mode_complex(struct drm_device *dev, int hdisplay, int vdisplay,
304 		     int vrefresh, bool interlaced, int margins,
305 		     int GTF_M, int GTF_2C, int GTF_K, int GTF_2J)
306 {	/* 1) top/bottom margin size (% of height) - default: 1.8, */
307 #define	GTF_MARGIN_PERCENTAGE		18
308 	/* 2) character cell horizontal granularity (pixels) - default 8 */
309 #define	GTF_CELL_GRAN			8
310 	/* 3) Minimum vertical porch (lines) - default 3 */
311 #define	GTF_MIN_V_PORCH			1
312 	/* width of vsync in lines */
313 #define V_SYNC_RQD			3
314 	/* width of hsync as % of total line */
315 #define H_SYNC_PERCENT			8
316 	/* min time of vsync + back porch (microsec) */
317 #define MIN_VSYNC_PLUS_BP		550
318 	/* C' and M' are part of the Blanking Duty Cycle computation */
319 #define GTF_C_PRIME	((((GTF_2C - GTF_2J) * GTF_K / 256) + GTF_2J) / 2)
320 #define GTF_M_PRIME	(GTF_K * GTF_M / 256)
321 	struct drm_display_mode *drm_mode;
322 	unsigned int hdisplay_rnd, vdisplay_rnd, vfieldrate_rqd;
323 	int top_margin, bottom_margin;
324 	int interlace;
325 	unsigned int hfreq_est;
326 	int vsync_plus_bp, vback_porch;
327 	unsigned int vtotal_lines, vfieldrate_est, hperiod;
328 	unsigned int vfield_rate, vframe_rate;
329 	int left_margin, right_margin;
330 	unsigned int total_active_pixels, ideal_duty_cycle;
331 	unsigned int hblank, total_pixels, pixel_freq;
332 	int hsync, hfront_porch, vodd_front_porch_lines;
333 	unsigned int tmp1, tmp2;
334 
335 	drm_mode = drm_mode_create(dev);
336 	if (!drm_mode)
337 		return NULL;
338 
339 	/* 1. In order to give correct results, the number of horizontal
340 	 * pixels requested is first processed to ensure that it is divisible
341 	 * by the character size, by rounding it to the nearest character
342 	 * cell boundary:
343 	 */
344 	hdisplay_rnd = (hdisplay + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
345 	hdisplay_rnd = hdisplay_rnd * GTF_CELL_GRAN;
346 
347 	/* 2. If interlace is requested, the number of vertical lines assumed
348 	 * by the calculation must be halved, as the computation calculates
349 	 * the number of vertical lines per field.
350 	 */
351 	if (interlaced)
352 		vdisplay_rnd = vdisplay / 2;
353 	else
354 		vdisplay_rnd = vdisplay;
355 
356 	/* 3. Find the frame rate required: */
357 	if (interlaced)
358 		vfieldrate_rqd = vrefresh * 2;
359 	else
360 		vfieldrate_rqd = vrefresh;
361 
362 	/* 4. Find number of lines in Top margin: */
363 	top_margin = 0;
364 	if (margins)
365 		top_margin = (vdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
366 				1000;
367 	/* 5. Find number of lines in bottom margin: */
368 	bottom_margin = top_margin;
369 
370 	/* 6. If interlace is required, then set variable interlace: */
371 	if (interlaced)
372 		interlace = 1;
373 	else
374 		interlace = 0;
375 
376 	/* 7. Estimate the Horizontal frequency */
377 	{
378 		tmp1 = (1000000  - MIN_VSYNC_PLUS_BP * vfieldrate_rqd) / 500;
379 		tmp2 = (vdisplay_rnd + 2 * top_margin + GTF_MIN_V_PORCH) *
380 				2 + interlace;
381 		hfreq_est = (tmp2 * 1000 * vfieldrate_rqd) / tmp1;
382 	}
383 
384 	/* 8. Find the number of lines in V sync + back porch */
385 	/* [V SYNC+BP] = RINT(([MIN VSYNC+BP] * hfreq_est / 1000000)) */
386 	vsync_plus_bp = MIN_VSYNC_PLUS_BP * hfreq_est / 1000;
387 	vsync_plus_bp = (vsync_plus_bp + 500) / 1000;
388 	/*  9. Find the number of lines in V back porch alone: */
389 	vback_porch = vsync_plus_bp - V_SYNC_RQD;
390 	/*  10. Find the total number of lines in Vertical field period: */
391 	vtotal_lines = vdisplay_rnd + top_margin + bottom_margin +
392 			vsync_plus_bp + GTF_MIN_V_PORCH;
393 	/*  11. Estimate the Vertical field frequency: */
394 	vfieldrate_est = hfreq_est / vtotal_lines;
395 	/*  12. Find the actual horizontal period: */
396 	hperiod = 1000000 / (vfieldrate_rqd * vtotal_lines);
397 
398 	/*  13. Find the actual Vertical field frequency: */
399 	vfield_rate = hfreq_est / vtotal_lines;
400 	/*  14. Find the Vertical frame frequency: */
401 	if (interlaced)
402 		vframe_rate = vfield_rate / 2;
403 	else
404 		vframe_rate = vfield_rate;
405 	/*  15. Find number of pixels in left margin: */
406 	if (margins)
407 		left_margin = (hdisplay_rnd * GTF_MARGIN_PERCENTAGE + 500) /
408 				1000;
409 	else
410 		left_margin = 0;
411 
412 	/* 16.Find number of pixels in right margin: */
413 	right_margin = left_margin;
414 	/* 17.Find total number of active pixels in image and left and right */
415 	total_active_pixels = hdisplay_rnd + left_margin + right_margin;
416 	/* 18.Find the ideal blanking duty cycle from blanking duty cycle */
417 	ideal_duty_cycle = GTF_C_PRIME * 1000 -
418 				(GTF_M_PRIME * 1000000 / hfreq_est);
419 	/* 19.Find the number of pixels in the blanking time to the nearest
420 	 * double character cell: */
421 	hblank = total_active_pixels * ideal_duty_cycle /
422 			(100000 - ideal_duty_cycle);
423 	hblank = (hblank + GTF_CELL_GRAN) / (2 * GTF_CELL_GRAN);
424 	hblank = hblank * 2 * GTF_CELL_GRAN;
425 	/* 20.Find total number of pixels: */
426 	total_pixels = total_active_pixels + hblank;
427 	/* 21.Find pixel clock frequency: */
428 	pixel_freq = total_pixels * hfreq_est / 1000;
429 	/* Stage 1 computations are now complete; I should really pass
430 	 * the results to another function and do the Stage 2 computations,
431 	 * but I only need a few more values so I'll just append the
432 	 * computations here for now */
433 	/* 17. Find the number of pixels in the horizontal sync period: */
434 	hsync = H_SYNC_PERCENT * total_pixels / 100;
435 	hsync = (hsync + GTF_CELL_GRAN / 2) / GTF_CELL_GRAN;
436 	hsync = hsync * GTF_CELL_GRAN;
437 	/* 18. Find the number of pixels in horizontal front porch period */
438 	hfront_porch = hblank / 2 - hsync;
439 	/*  36. Find the number of lines in the odd front porch period: */
440 	vodd_front_porch_lines = GTF_MIN_V_PORCH ;
441 
442 	/* finally, pack the results in the mode struct */
443 	drm_mode->hdisplay = hdisplay_rnd;
444 	drm_mode->hsync_start = hdisplay_rnd + hfront_porch;
445 	drm_mode->hsync_end = drm_mode->hsync_start + hsync;
446 	drm_mode->htotal = total_pixels;
447 	drm_mode->vdisplay = vdisplay_rnd;
448 	drm_mode->vsync_start = vdisplay_rnd + vodd_front_porch_lines;
449 	drm_mode->vsync_end = drm_mode->vsync_start + V_SYNC_RQD;
450 	drm_mode->vtotal = vtotal_lines;
451 
452 	drm_mode->clock = pixel_freq;
453 
454 	if (interlaced) {
455 		drm_mode->vtotal *= 2;
456 		drm_mode->flags |= DRM_MODE_FLAG_INTERLACE;
457 	}
458 
459 	drm_mode_set_name(drm_mode);
460 	if (GTF_M == 600 && GTF_2C == 80 && GTF_K == 128 && GTF_2J == 40)
461 		drm_mode->flags = DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC;
462 	else
463 		drm_mode->flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC;
464 
465 	return drm_mode;
466 }
467 EXPORT_SYMBOL(drm_gtf_mode_complex);
468 
469 /**
470  * drm_gtf_mode - create the modeline based on GTF algorithm
471  *
472  * @dev		:drm device
473  * @hdisplay	:hdisplay size
474  * @vdisplay	:vdisplay size
475  * @vrefresh	:vrefresh rate.
476  * @interlaced	:whether the interlace is supported
477  * @margins	:whether the margin is supported
478  *
479  * LOCKING.
480  * none.
481  *
482  * return the modeline based on GTF algorithm
483  *
484  * This function is to create the modeline based on the GTF algorithm.
485  * Generalized Timing Formula is derived from:
486  *	GTF Spreadsheet by Andy Morrish (1/5/97)
487  *	available at http://www.vesa.org
488  *
489  * And it is copied from the file of xserver/hw/xfree86/modes/xf86gtf.c.
490  * What I have done is to translate it by using integer calculation.
491  * I also refer to the function of fb_get_mode in the file of
492  * drivers/video/fbmon.c
493  *
494  * Standard GTF parameters:
495  * M = 600
496  * C = 40
497  * K = 128
498  * J = 20
499  */
500 struct drm_display_mode *
501 drm_gtf_mode(struct drm_device *dev, int hdisplay, int vdisplay, int vrefresh,
502 	     bool lace, int margins)
503 {
504 	return drm_gtf_mode_complex(dev, hdisplay, vdisplay, vrefresh, lace,
505 				    margins, 600, 40 * 2, 128, 20 * 2);
506 }
507 EXPORT_SYMBOL(drm_gtf_mode);
508 
509 /**
510  * drm_mode_set_name - set the name on a mode
511  * @mode: name will be set in this mode
512  *
513  * LOCKING:
514  * None.
515  *
516  * Set the name of @mode to a standard format.
517  */
518 void drm_mode_set_name(struct drm_display_mode *mode)
519 {
520 	bool interlaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
521 
522 	ksnprintf(mode->name, DRM_DISPLAY_MODE_LEN, "%dx%d%s",
523 		 mode->hdisplay, mode->vdisplay,
524 		 interlaced ? "i" : "");
525 }
526 EXPORT_SYMBOL(drm_mode_set_name);
527 
528 /**
529  * drm_mode_list_concat - move modes from one list to another
530  * @head: source list
531  * @new: dst list
532  *
533  * LOCKING:
534  * Caller must ensure both lists are locked.
535  *
536  * Move all the modes from @head to @new.
537  */
538 void drm_mode_list_concat(struct list_head *head, struct list_head *new)
539 {
540 
541 	struct list_head *entry, *tmp;
542 
543 	list_for_each_safe(entry, tmp, head) {
544 		list_move_tail(entry, new);
545 	}
546 }
547 EXPORT_SYMBOL(drm_mode_list_concat);
548 
549 /**
550  * drm_mode_width - get the width of a mode
551  * @mode: mode
552  *
553  * LOCKING:
554  * None.
555  *
556  * Return @mode's width (hdisplay) value.
557  *
558  * FIXME: is this needed?
559  *
560  * RETURNS:
561  * @mode->hdisplay
562  */
563 int drm_mode_width(const struct drm_display_mode *mode)
564 {
565 	return mode->hdisplay;
566 
567 }
568 EXPORT_SYMBOL(drm_mode_width);
569 
570 /**
571  * drm_mode_height - get the height of a mode
572  * @mode: mode
573  *
574  * LOCKING:
575  * None.
576  *
577  * Return @mode's height (vdisplay) value.
578  *
579  * FIXME: is this needed?
580  *
581  * RETURNS:
582  * @mode->vdisplay
583  */
584 int drm_mode_height(const struct drm_display_mode *mode)
585 {
586 	return mode->vdisplay;
587 }
588 EXPORT_SYMBOL(drm_mode_height);
589 
590 /** drm_mode_hsync - get the hsync of a mode
591  * @mode: mode
592  *
593  * LOCKING:
594  * None.
595  *
596  * Return @modes's hsync rate in kHz, rounded to the nearest int.
597  */
598 int drm_mode_hsync(const struct drm_display_mode *mode)
599 {
600 	unsigned int calc_val;
601 
602 	if (mode->hsync)
603 		return mode->hsync;
604 
605 	if (mode->htotal < 0)
606 		return 0;
607 
608 	calc_val = (mode->clock * 1000) / mode->htotal; /* hsync in Hz */
609 	calc_val += 500;				/* round to 1000Hz */
610 	calc_val /= 1000;				/* truncate to kHz */
611 
612 	return calc_val;
613 }
614 EXPORT_SYMBOL(drm_mode_hsync);
615 
616 /**
617  * drm_mode_vrefresh - get the vrefresh of a mode
618  * @mode: mode
619  *
620  * LOCKING:
621  * None.
622  *
623  * Return @mode's vrefresh rate in Hz or calculate it if necessary.
624  *
625  * FIXME: why is this needed?  shouldn't vrefresh be set already?
626  *
627  * RETURNS:
628  * Vertical refresh rate. It will be the result of actual value plus 0.5.
629  * If it is 70.288, it will return 70Hz.
630  * If it is 59.6, it will return 60Hz.
631  */
632 int drm_mode_vrefresh(const struct drm_display_mode *mode)
633 {
634 	int refresh = 0;
635 	unsigned int calc_val;
636 
637 	if (mode->vrefresh > 0)
638 		refresh = mode->vrefresh;
639 	else if (mode->htotal > 0 && mode->vtotal > 0) {
640 		int vtotal;
641 		vtotal = mode->vtotal;
642 		/* work out vrefresh the value will be x1000 */
643 		calc_val = (mode->clock * 1000);
644 		calc_val /= mode->htotal;
645 		refresh = (calc_val + vtotal / 2) / vtotal;
646 
647 		if (mode->flags & DRM_MODE_FLAG_INTERLACE)
648 			refresh *= 2;
649 		if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
650 			refresh /= 2;
651 		if (mode->vscan > 1)
652 			refresh /= mode->vscan;
653 	}
654 	return refresh;
655 }
656 EXPORT_SYMBOL(drm_mode_vrefresh);
657 
658 /**
659  * drm_mode_set_crtcinfo - set CRTC modesetting parameters
660  * @p: mode
661  * @adjust_flags: unused? (FIXME)
662  *
663  * LOCKING:
664  * None.
665  *
666  * Setup the CRTC modesetting parameters for @p, adjusting if necessary.
667  */
668 void drm_mode_set_crtcinfo(struct drm_display_mode *p, int adjust_flags)
669 {
670 	if ((p == NULL) || ((p->type & DRM_MODE_TYPE_CRTC_C) == DRM_MODE_TYPE_BUILTIN))
671 		return;
672 
673 	p->crtc_hdisplay = p->hdisplay;
674 	p->crtc_hsync_start = p->hsync_start;
675 	p->crtc_hsync_end = p->hsync_end;
676 	p->crtc_htotal = p->htotal;
677 	p->crtc_hskew = p->hskew;
678 	p->crtc_vdisplay = p->vdisplay;
679 	p->crtc_vsync_start = p->vsync_start;
680 	p->crtc_vsync_end = p->vsync_end;
681 	p->crtc_vtotal = p->vtotal;
682 
683 	if (p->flags & DRM_MODE_FLAG_INTERLACE) {
684 		if (adjust_flags & CRTC_INTERLACE_HALVE_V) {
685 			p->crtc_vdisplay /= 2;
686 			p->crtc_vsync_start /= 2;
687 			p->crtc_vsync_end /= 2;
688 			p->crtc_vtotal /= 2;
689 		}
690 	}
691 
692 	if (p->flags & DRM_MODE_FLAG_DBLSCAN) {
693 		p->crtc_vdisplay *= 2;
694 		p->crtc_vsync_start *= 2;
695 		p->crtc_vsync_end *= 2;
696 		p->crtc_vtotal *= 2;
697 	}
698 
699 	if (p->vscan > 1) {
700 		p->crtc_vdisplay *= p->vscan;
701 		p->crtc_vsync_start *= p->vscan;
702 		p->crtc_vsync_end *= p->vscan;
703 		p->crtc_vtotal *= p->vscan;
704 	}
705 
706 	p->crtc_vblank_start = min(p->crtc_vsync_start, p->crtc_vdisplay);
707 	p->crtc_vblank_end = max(p->crtc_vsync_end, p->crtc_vtotal);
708 	p->crtc_hblank_start = min(p->crtc_hsync_start, p->crtc_hdisplay);
709 	p->crtc_hblank_end = max(p->crtc_hsync_end, p->crtc_htotal);
710 }
711 EXPORT_SYMBOL(drm_mode_set_crtcinfo);
712 
713 
714 /**
715  * drm_mode_copy - copy the mode
716  * @dst: mode to overwrite
717  * @src: mode to copy
718  *
719  * LOCKING:
720  * None.
721  *
722  * Copy an existing mode into another mode, preserving the object id
723  * of the destination mode.
724  */
725 void drm_mode_copy(struct drm_display_mode *dst, const struct drm_display_mode *src)
726 {
727 	int id = dst->base.id;
728 
729 	*dst = *src;
730 	dst->base.id = id;
731 	INIT_LIST_HEAD(&dst->head);
732 }
733 EXPORT_SYMBOL(drm_mode_copy);
734 
735 /**
736  * drm_mode_duplicate - allocate and duplicate an existing mode
737  * @m: mode to duplicate
738  *
739  * LOCKING:
740  * None.
741  *
742  * Just allocate a new mode, copy the existing mode into it, and return
743  * a pointer to it.  Used to create new instances of established modes.
744  */
745 struct drm_display_mode *drm_mode_duplicate(struct drm_device *dev,
746 					    const struct drm_display_mode *mode)
747 {
748 	struct drm_display_mode *nmode;
749 
750 	nmode = drm_mode_create(dev);
751 	if (!nmode)
752 		return NULL;
753 
754 	drm_mode_copy(nmode, mode);
755 
756 	return nmode;
757 }
758 EXPORT_SYMBOL(drm_mode_duplicate);
759 
760 /**
761  * drm_mode_equal - test modes for equality
762  * @mode1: first mode
763  * @mode2: second mode
764  *
765  * LOCKING:
766  * None.
767  *
768  * Check to see if @mode1 and @mode2 are equivalent.
769  *
770  * RETURNS:
771  * True if the modes are equal, false otherwise.
772  */
773 bool drm_mode_equal(const struct drm_display_mode *mode1, const struct drm_display_mode *mode2)
774 {
775 	/* do clock check convert to PICOS so fb modes get matched
776 	 * the same */
777 	if (mode1->clock && mode2->clock) {
778 		if (KHZ2PICOS(mode1->clock) != KHZ2PICOS(mode2->clock))
779 			return false;
780 	} else if (mode1->clock != mode2->clock)
781 		return false;
782 
783 	if (mode1->hdisplay == mode2->hdisplay &&
784 	    mode1->hsync_start == mode2->hsync_start &&
785 	    mode1->hsync_end == mode2->hsync_end &&
786 	    mode1->htotal == mode2->htotal &&
787 	    mode1->hskew == mode2->hskew &&
788 	    mode1->vdisplay == mode2->vdisplay &&
789 	    mode1->vsync_start == mode2->vsync_start &&
790 	    mode1->vsync_end == mode2->vsync_end &&
791 	    mode1->vtotal == mode2->vtotal &&
792 	    mode1->vscan == mode2->vscan &&
793 	    mode1->flags == mode2->flags)
794 		return true;
795 
796 	return false;
797 }
798 EXPORT_SYMBOL(drm_mode_equal);
799 
800 /**
801  * drm_mode_validate_size - make sure modes adhere to size constraints
802  * @dev: DRM device
803  * @mode_list: list of modes to check
804  * @maxX: maximum width
805  * @maxY: maximum height
806  * @maxPitch: max pitch
807  *
808  * LOCKING:
809  * Caller must hold a lock protecting @mode_list.
810  *
811  * The DRM device (@dev) has size and pitch limits.  Here we validate the
812  * modes we probed for @dev against those limits and set their status as
813  * necessary.
814  */
815 void drm_mode_validate_size(struct drm_device *dev,
816 			    struct list_head *mode_list,
817 			    int maxX, int maxY, int maxPitch)
818 {
819 	struct drm_display_mode *mode;
820 
821 	list_for_each_entry(mode, mode_list, head) {
822 		if (maxPitch > 0 && mode->hdisplay > maxPitch)
823 			mode->status = MODE_BAD_WIDTH;
824 
825 		if (maxX > 0 && mode->hdisplay > maxX)
826 			mode->status = MODE_VIRTUAL_X;
827 
828 		if (maxY > 0 && mode->vdisplay > maxY)
829 			mode->status = MODE_VIRTUAL_Y;
830 	}
831 }
832 EXPORT_SYMBOL(drm_mode_validate_size);
833 
834 /**
835  * drm_mode_prune_invalid - remove invalid modes from mode list
836  * @dev: DRM device
837  * @mode_list: list of modes to check
838  * @verbose: be verbose about it
839  *
840  * LOCKING:
841  * Caller must hold a lock protecting @mode_list.
842  *
843  * Once mode list generation is complete, a caller can use this routine to
844  * remove invalid modes from a mode list.  If any of the modes have a
845  * status other than %MODE_OK, they are removed from @mode_list and freed.
846  */
847 void drm_mode_prune_invalid(struct drm_device *dev,
848 			    struct list_head *mode_list, bool verbose)
849 {
850 	struct drm_display_mode *mode, *t;
851 
852 	list_for_each_entry_safe(mode, t, mode_list, head) {
853 		if (mode->status != MODE_OK) {
854 			list_del(&mode->head);
855 			if (verbose) {
856 				drm_mode_debug_printmodeline(mode);
857 				DRM_DEBUG_KMS("Not using %s mode %d\n",
858 					mode->name, mode->status);
859 			}
860 			drm_mode_destroy(dev, mode);
861 		}
862 	}
863 }
864 EXPORT_SYMBOL(drm_mode_prune_invalid);
865 
866 /**
867  * drm_mode_compare - compare modes for favorability
868  * @priv: unused
869  * @lh_a: list_head for first mode
870  * @lh_b: list_head for second mode
871  *
872  * LOCKING:
873  * None.
874  *
875  * Compare two modes, given by @lh_a and @lh_b, returning a value indicating
876  * which is better.
877  *
878  * RETURNS:
879  * Negative if @lh_a is better than @lh_b, zero if they're equivalent, or
880  * positive if @lh_b is better than @lh_a.
881  */
882 static int drm_mode_compare(void *priv, struct list_head *lh_a, struct list_head *lh_b)
883 {
884 	struct drm_display_mode *a = list_entry(lh_a, struct drm_display_mode, head);
885 	struct drm_display_mode *b = list_entry(lh_b, struct drm_display_mode, head);
886 	int diff;
887 
888 	diff = ((b->type & DRM_MODE_TYPE_PREFERRED) != 0) -
889 		((a->type & DRM_MODE_TYPE_PREFERRED) != 0);
890 	if (diff)
891 		return diff;
892 	diff = b->hdisplay * b->vdisplay - a->hdisplay * a->vdisplay;
893 	if (diff)
894 		return diff;
895 	diff = b->clock - a->clock;
896 	return diff;
897 }
898 
899 /**
900  * drm_mode_sort - sort mode list
901  * @mode_list: list to sort
902  *
903  * LOCKING:
904  * Caller must hold a lock protecting @mode_list.
905  *
906  * Sort @mode_list by favorability, putting good modes first.
907  */
908 void drm_mode_sort(struct list_head *mode_list)
909 {
910 	drm_list_sort(NULL, mode_list, drm_mode_compare);
911 }
912 EXPORT_SYMBOL(drm_mode_sort);
913 
914 /**
915  * drm_mode_connector_list_update - update the mode list for the connector
916  * @connector: the connector to update
917  *
918  * LOCKING:
919  * Caller must hold a lock protecting @mode_list.
920  *
921  * This moves the modes from the @connector probed_modes list
922  * to the actual mode list. It compares the probed mode against the current
923  * list and only adds different modes. All modes unverified after this point
924  * will be removed by the prune invalid modes.
925  */
926 void drm_mode_connector_list_update(struct drm_connector *connector)
927 {
928 	struct drm_display_mode *mode;
929 	struct drm_display_mode *pmode, *pt;
930 	int found_it;
931 
932 	list_for_each_entry_safe(pmode, pt, &connector->probed_modes,
933 				 head) {
934 		found_it = 0;
935 		/* go through current modes checking for the new probed mode */
936 		list_for_each_entry(mode, &connector->modes, head) {
937 			if (drm_mode_equal(pmode, mode)) {
938 				found_it = 1;
939 				/* if equal delete the probed mode */
940 				mode->status = pmode->status;
941 				/* Merge type bits together */
942 				mode->type |= pmode->type;
943 				list_del(&pmode->head);
944 				drm_mode_destroy(connector->dev, pmode);
945 				break;
946 			}
947 		}
948 
949 		if (!found_it) {
950 			list_move_tail(&pmode->head, &connector->modes);
951 		}
952 	}
953 }
954 EXPORT_SYMBOL(drm_mode_connector_list_update);
955 
956 /**
957  * drm_mode_parse_command_line_for_connector - parse command line for connector
958  * @mode_option - per connector mode option
959  * @connector - connector to parse line for
960  *
961  * This parses the connector specific then generic command lines for
962  * modes and options to configure the connector.
963  *
964  * This uses the same parameters as the fb modedb.c, except for extra
965  *	<xres>x<yres>[M][R][-<bpp>][@<refresh>][i][m][eDd]
966  *
967  * enable/enable Digital/disable bit at the end
968  */
969 bool drm_mode_parse_command_line_for_connector(const char *mode_option,
970 					       struct drm_connector *connector,
971 					       struct drm_cmdline_mode *mode)
972 {
973 	const char *name;
974 	unsigned int namelen;
975 	bool res_specified = false, bpp_specified = false, refresh_specified = false;
976 	unsigned int xres = 0, yres = 0, bpp = 32, refresh = 0;
977 	bool yres_specified = false, cvt = false, rb = false;
978 	bool interlace = false, margins = false, was_digit = false;
979 	int i;
980 	enum drm_connector_force force = DRM_FORCE_UNSPECIFIED;
981 
982 #ifdef XXX_CONFIG_FB
983 	if (!mode_option)
984 		mode_option = fb_mode_option;
985 #endif
986 
987 	if (!mode_option) {
988 		mode->specified = false;
989 		return false;
990 	}
991 
992 	name = mode_option;
993 	namelen = strlen(name);
994 	for (i = namelen-1; i >= 0; i--) {
995 		switch (name[i]) {
996 		case '@':
997 			if (!refresh_specified && !bpp_specified &&
998 			    !yres_specified && !cvt && !rb && was_digit) {
999 				refresh = simple_strtol(&name[i+1], NULL, 10);
1000 				refresh_specified = true;
1001 				was_digit = false;
1002 			} else
1003 				goto done;
1004 			break;
1005 		case '-':
1006 			if (!bpp_specified && !yres_specified && !cvt &&
1007 			    !rb && was_digit) {
1008 				bpp = simple_strtol(&name[i+1], NULL, 10);
1009 				bpp_specified = true;
1010 				was_digit = false;
1011 			} else
1012 				goto done;
1013 			break;
1014 		case 'x':
1015 			if (!yres_specified && was_digit) {
1016 				yres = simple_strtol(&name[i+1], NULL, 10);
1017 				yres_specified = true;
1018 				was_digit = false;
1019 			} else
1020 				goto done;
1021 		case '0' ... '9':
1022 			was_digit = true;
1023 			break;
1024 		case 'M':
1025 			if (yres_specified || cvt || was_digit)
1026 				goto done;
1027 			cvt = true;
1028 			break;
1029 		case 'R':
1030 			if (yres_specified || cvt || rb || was_digit)
1031 				goto done;
1032 			rb = true;
1033 			break;
1034 		case 'm':
1035 			if (cvt || yres_specified || was_digit)
1036 				goto done;
1037 			margins = true;
1038 			break;
1039 		case 'i':
1040 			if (cvt || yres_specified || was_digit)
1041 				goto done;
1042 			interlace = true;
1043 			break;
1044 		case 'e':
1045 			if (yres_specified || bpp_specified || refresh_specified ||
1046 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1047 				goto done;
1048 
1049 			force = DRM_FORCE_ON;
1050 			break;
1051 		case 'D':
1052 			if (yres_specified || bpp_specified || refresh_specified ||
1053 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1054 				goto done;
1055 
1056 			if ((connector->connector_type != DRM_MODE_CONNECTOR_DVII) &&
1057 			    (connector->connector_type != DRM_MODE_CONNECTOR_HDMIB))
1058 				force = DRM_FORCE_ON;
1059 			else
1060 				force = DRM_FORCE_ON_DIGITAL;
1061 			break;
1062 		case 'd':
1063 			if (yres_specified || bpp_specified || refresh_specified ||
1064 			    was_digit || (force != DRM_FORCE_UNSPECIFIED))
1065 				goto done;
1066 
1067 			force = DRM_FORCE_OFF;
1068 			break;
1069 		default:
1070 			goto done;
1071 		}
1072 	}
1073 
1074 	if (i < 0 && yres_specified) {
1075 		char *ch;
1076 		xres = simple_strtol(name, &ch, 10);
1077 		if ((ch != NULL) && (*ch == 'x'))
1078 			res_specified = true;
1079 		else
1080 			i = ch - name;
1081 	} else if (!yres_specified && was_digit) {
1082 		/* catch mode that begins with digits but has no 'x' */
1083 		i = 0;
1084 	}
1085 done:
1086 	if (i >= 0) {
1087 		kprintf("parse error at position %i in video mode '%s'\n",
1088 			i, name);
1089 		mode->specified = false;
1090 		return false;
1091 	}
1092 
1093 	if (res_specified) {
1094 		mode->specified = true;
1095 		mode->xres = xres;
1096 		mode->yres = yres;
1097 	}
1098 
1099 	if (refresh_specified) {
1100 		mode->refresh_specified = true;
1101 		mode->refresh = refresh;
1102 	}
1103 
1104 	if (bpp_specified) {
1105 		mode->bpp_specified = true;
1106 		mode->bpp = bpp;
1107 	}
1108 	mode->rb = rb;
1109 	mode->cvt = cvt;
1110 	mode->interlace = interlace;
1111 	mode->margins = margins;
1112 	mode->force = force;
1113 
1114 	return true;
1115 }
1116 EXPORT_SYMBOL(drm_mode_parse_command_line_for_connector);
1117 
1118 struct drm_display_mode *
1119 drm_mode_create_from_cmdline_mode(struct drm_device *dev,
1120 				  struct drm_cmdline_mode *cmd)
1121 {
1122 	struct drm_display_mode *mode;
1123 
1124 	if (cmd->cvt)
1125 		mode = drm_cvt_mode(dev,
1126 				    cmd->xres, cmd->yres,
1127 				    cmd->refresh_specified ? cmd->refresh : 60,
1128 				    cmd->rb, cmd->interlace,
1129 				    cmd->margins);
1130 	else
1131 		mode = drm_gtf_mode(dev,
1132 				    cmd->xres, cmd->yres,
1133 				    cmd->refresh_specified ? cmd->refresh : 60,
1134 				    cmd->interlace,
1135 				    cmd->margins);
1136 	if (!mode)
1137 		return NULL;
1138 
1139 	drm_mode_set_crtcinfo(mode, CRTC_INTERLACE_HALVE_V);
1140 	return mode;
1141 }
1142 EXPORT_SYMBOL(drm_mode_create_from_cmdline_mode);
1143