1 /*- 2 * Copyright 2003 Eric Anholt. 3 * All Rights Reserved. 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 9 * and/or sell copies of the Software, and to permit persons to whom the 10 * Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHOR BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN 20 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 21 * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * $FreeBSD: src/sys/dev/drm2/drm_pci.c,v 1.1 2012/05/22 11:07:44 kib Exp $ 24 */ 25 26 /** 27 * \file drm_pci.h 28 * \brief PCI consistent, DMA-accessible memory allocation. 29 * 30 * \author Eric Anholt <anholt@FreeBSD.org> 31 */ 32 33 #include <drm/drmP.h> 34 35 /**********************************************************************/ 36 /** \name PCI memory */ 37 /*@{*/ 38 39 static void 40 drm_pci_busdma_callback(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 41 { 42 drm_dma_handle_t *dmah = arg; 43 44 if (error != 0) 45 return; 46 47 KASSERT(nsegs == 1, ("drm_pci_busdma_callback: bad dma segment count")); 48 dmah->busaddr = segs[0].ds_addr; 49 } 50 51 /** 52 * \brief Allocate a physically contiguous DMA-accessible consistent 53 * memory block. 54 */ 55 drm_dma_handle_t * 56 drm_pci_alloc(struct drm_device *dev, size_t size, 57 size_t align, dma_addr_t maxaddr) 58 { 59 drm_dma_handle_t *dmah; 60 int ret; 61 62 /* Need power-of-two alignment, so fail the allocation if it isn't. */ 63 if ((align & (align - 1)) != 0) { 64 DRM_ERROR("drm_pci_alloc with non-power-of-two alignment %d\n", 65 (int)align); 66 return NULL; 67 } 68 69 dmah = kmalloc(sizeof(drm_dma_handle_t), M_DRM, 70 M_ZERO | M_WAITOK | M_NULLOK); 71 if (dmah == NULL) 72 return NULL; 73 74 #if 0 /* HT XXX XXX XXX */ 75 /* Make sure we aren't holding locks here */ 76 mtx_assert(&dev->dev_lock, MA_NOTOWNED); 77 if (mtx_owned(&dev->dev_lock)) 78 DRM_ERROR("called while holding dev_lock\n"); 79 mtx_assert(&dev->dma_lock, MA_NOTOWNED); 80 if (mtx_owned(&dev->dma_lock)) 81 DRM_ERROR("called while holding dma_lock\n"); 82 #endif 83 84 ret = bus_dma_tag_create(NULL, align, 0, /* tag, align, boundary */ 85 maxaddr, BUS_SPACE_MAXADDR, /* lowaddr, highaddr */ 86 NULL, NULL, /* filtfunc, filtfuncargs */ 87 size, 1, size, /* maxsize, nsegs, maxsegsize */ 88 0, /* flags */ 89 &dmah->tag); 90 if (ret != 0) { 91 drm_free(dmah, M_DRM); 92 return NULL; 93 } 94 95 ret = bus_dmamem_alloc(dmah->tag, &dmah->vaddr, 96 BUS_DMA_WAITOK | BUS_DMA_ZERO | BUS_DMA_NOCACHE, &dmah->map); 97 if (ret != 0) { 98 bus_dma_tag_destroy(dmah->tag); 99 drm_free(dmah, M_DRM); 100 return NULL; 101 } 102 103 ret = bus_dmamap_load(dmah->tag, dmah->map, dmah->vaddr, size, 104 drm_pci_busdma_callback, dmah, BUS_DMA_NOWAIT); 105 if (ret != 0) { 106 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 107 bus_dma_tag_destroy(dmah->tag); 108 drm_free(dmah, M_DRM); 109 return NULL; 110 } 111 112 return dmah; 113 } 114 115 /** 116 * \brief Free a DMA-accessible consistent memory block. 117 */ 118 void 119 drm_pci_free(struct drm_device *dev, drm_dma_handle_t *dmah) 120 { 121 if (dmah == NULL) 122 return; 123 124 bus_dmamem_free(dmah->tag, dmah->vaddr, dmah->map); 125 bus_dma_tag_destroy(dmah->tag); 126 127 drm_free(dmah, M_DRM); 128 } 129 130 /*@}*/ 131 132 int drm_pcie_get_speed_cap_mask(struct drm_device *dev, u32 *mask) 133 { 134 device_t root; 135 int pos; 136 u32 lnkcap = 0, lnkcap2 = 0; 137 138 *mask = 0; 139 if (!drm_device_is_pcie(dev)) 140 return -EINVAL; 141 142 root = device_get_parent(dev->dev); 143 144 pos = 0; 145 pci_find_extcap(root, PCIY_EXPRESS, &pos); 146 if (!pos) 147 return -EINVAL; 148 149 /* we've been informed via and serverworks don't make the cut */ 150 if (pci_get_vendor(root) == PCI_VENDOR_ID_VIA || 151 pci_get_vendor(root) == PCI_VENDOR_ID_SERVERWORKS) 152 return -EINVAL; 153 154 lnkcap = pci_read_config(root, pos + PCIER_LINKCAP, 4); 155 lnkcap2 = pci_read_config(root, pos + PCIER_LINK_CAP2, 4); 156 157 lnkcap &= PCIEM_LNKCAP_SPEED_MASK; 158 lnkcap2 &= 0xfe; 159 160 #define PCI_EXP_LNKCAP2_SLS_2_5GB 0x02 /* Supported Link Speed 2.5GT/s */ 161 #define PCI_EXP_LNKCAP2_SLS_5_0GB 0x04 /* Supported Link Speed 5.0GT/s */ 162 #define PCI_EXP_LNKCAP2_SLS_8_0GB 0x08 /* Supported Link Speed 8.0GT/s */ 163 164 if (lnkcap2) { /* PCIE GEN 3.0 */ 165 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_2_5GB) 166 *mask |= DRM_PCIE_SPEED_25; 167 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_5_0GB) 168 *mask |= DRM_PCIE_SPEED_50; 169 if (lnkcap2 & PCI_EXP_LNKCAP2_SLS_8_0GB) 170 *mask |= DRM_PCIE_SPEED_80; 171 } else { 172 if (lnkcap & 1) 173 *mask |= DRM_PCIE_SPEED_25; 174 if (lnkcap & 2) 175 *mask |= DRM_PCIE_SPEED_50; 176 } 177 178 DRM_INFO("probing gen 2 caps for device %x:%x = %x/%x\n", pci_get_vendor(root), pci_get_device(root), lnkcap, lnkcap2); 179 return 0; 180 } 181